Image sensor array with ramp generator and comparing circuit

EP4494357A1Pending Publication Date: 2025-01-22SONY SEMICON SOLUTIONS CORP +1
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Patent Information

Application Number
EP2023705606
Authority / Receiving Office
EP · EP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-03-18
Filing Date
2023-02-22
Publication Date
2025-01-22

AI Technical Summary

Technical Problem

Existing image sensor arrays in solid-state imaging devices face challenges in reducing power consumption without compromising the signal-to-noise ratio (SNR) and requiring additional chip area during intensity readout.

Method used

The image sensor array incorporates a pixel circuit with an amplification transistor and selection transistor connected in series between a power supply node and a data signal line, a constant current circuit, a ramp generator, and a comparing circuit with a voltage-controlled switching element. The comparing circuit generates an active comparator output signal when the voltage difference between the voltage ramp signal and the pixel output signal exceeds a threshold, allowing current division between the pixel circuit and the voltage-controlled switching element, thereby reducing overall current consumption.

Benefits of technology

This configuration reduces total electric losses in the column readout circuit without affecting the SNR or increasing chip area, achieving lower power consumption and minimizing noise in the output stage.

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Abstract

A pixel circuit (100) of an image sensor array (10) includes an amplification transistor (103) and a selection transistor (109) electrically connected in series between a first positive voltage supply node (VDDP) and a data signal line (VSL). The pixel circuit (100) outputs a pixel output signal (Vout) on the data signal line (VSL). A constant current circuit (210) is electrically connected between the data signal line (VSL) and a first negative voltage supply node (VDDP). A ramp generator (220) generates a voltage ramp signal (Vrmp). A comparing circuit (230) includes a voltage-controlled switching element (231). The comparing circuit (230) generates an active comparator output signal (Vcout1) at a comparator output node (239) when a voltage difference between the voltage ramp signal (Vrmp) and the pixel output signal (Vout) exceeds a threshold voltage of the voltage-controlled switching element (231).
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