Method for stabilizing a surface of a semiconductor material

Abstract

The invention relates to a method for stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or beads, said method comprising the formation, on said surface, of a vitreous carbon layer (30) in the gaseous phase at a pressure greater than or equal to 80 kPa (800 mbar).

Description

[0001] METHOD FOR STABILIZING A SURFACE IN A SEMICONDUCTOR MATERIAL

[0002] FIELD OF THE INVENTION

[0003] The present invention relates to a method for stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material. The invention further relates to a heat treatment method and a method for manufacturing a semiconductor structure comprising a step of stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material.

[0004] STATE OF THE ART

[0005] Semiconductor materials, particularly silicon carbide (SiC), are widely used in the manufacture of power and radio frequency electronic components. In some applications, substrates made of bulk monocrystalline SiC, substrates with a surface layer of monocrystalline SiC, or substrates containing other semiconductor materials such as aluminum nitride (AIN), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP), or gallium arsenide (GaAs) are used. In some cases, the semiconductor substrates or semiconductor layers are polycrystalline.

[0006] Substrates for electronic applications often require thermal treatments during their manufacture, for example, annealing to heal defects in the crystal lattice caused during ion implantation or to modify the crystal structure of the substrate. Such treatments are often carried out at high temperatures of up to 2000°C.

[0007] However, the surface of the semiconductor materials considered is likely to destabilize under the effect of high temperature. This destabilization can result in degradation of the surface, in particular by a modification of its morphology and / or composition.

[0008] In particular, as illustrated in Figure 1, smooth SiC surfaces are sensitive to high temperature treatments, typically from about 1300°C. In the absence of adequate protection of said surface, the morphology reorganizes to minimize the surface energy, forming terraces. This effect is known as "step bunching". The reorganization of the 222 surface is due to a diffusion of atoms on the surface when it is exposed to high temperatures. It further depends on the atmosphere and pressure to which the surface is exposed. It also depends on the misorientation angle of the surface with respect to a high symmetry axis of the semiconductor material crystal. Such misorientation is used to facilitate the control of the 4H polytype of the SIC during subsequent epitaxy of single-crystal SIC and to avoid polytype changes during the growth of single-crystal SiC.An angle of 4° is often chosen for such an epitaxial process. However, the greater this tilt angle, the higher the steps between the terraces.

[0009] Such misorientations can also appear spontaneously on a polycrystalline SiC surface, whose grain orientation is random.

[0010] The surfaces of other semiconductor materials can exhibit the same type of steps. On surfaces containing GaN, gallium beads can appear on the surface during exposure to high temperatures.

[0011] In order to obtain smooth surfaces, we therefore seek to avoid the formation of terraces or to remove them in a later stage, and, if necessary, to avoid the appearance of gallium balls or other material.

[0012] For example, mechanical or chemical-mechanical polishing (CMP) can be carried out after heat treatment. However, if the height of the terraces formed is too great, for example greater than 80 nm between two consecutive plates, the thickness to be removed is too great, which involves a long and laborious process. In addition, the remaining thickness is often too thin for the intended applications.

[0013] Another method is to use very rapid annealing ramps to limit the appearance of terraces. This method requires very rapid temperature increases of around 400°C per minute and is therefore not compatible with industrial furnaces.

[0014] Alternatively, silane overpressure can be applied to limit silicon sublimation into SiC, thus preventing terrace formation. This method is described in the article by R. Zhang et al. However, it requires the introduction of a SiFL gas and the equipment to create the overpressure. In addition, silicon droplets can appear on the SiC surface at temperatures above 1600°C.

[0015] Another possibility to avoid terrace formation is to use a protective layer. The article by J. Bao et al. proposes a carbon protective layer obtained by a process of centrifugation of a resin on a SiC surface. The resin is annealed at 750°C - 900°C to form a carbon film of approximately 1 μm thickness. This technique involves the addition of additional steps in the formation process, the use of additional equipment and carries a risk of contamination of the substrate by the resin.

[0016] In some cases, the protective layer can also be formed from aluminum nitride (AIN). However, this material is difficult to remove, especially after heat treatment at high temperatures.

[0017] STATEMENT OF THE INVENTION An aim of the invention is to provide a method for stabilizing a substrate having a surface of a semiconductor material, aimed in particular at avoiding the formation of terraces and / or balls by a step that is simple to implement. This stabilization treatment must be easy to integrate into the manufacturing method of a substrate having a surface of a semiconductor material, and not present any risk of contamination of such a substrate.

[0018] To this end, the invention provides a method for stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or balls, said method comprising the formation, on said surface, of a layer of glassy carbon in the gas phase at a pressure greater than or equal to 80 kPa (800 mbar).

[0019] In the present text, the surface which is sought to be stabilized is a free surface of the semiconductor material, that is to say an external surface forming an interface with the external environment of a substrate comprising said semiconductor material.

[0020] Advantageously, the semiconductor material is silicon carbide.

[0021] Advantageously, the formation of the carbon layer is carried out at a temperature between 1000°C and 1200°C. Advantageously, the method further comprises a step of thickening the carbon layer at a temperature higher than the carbon layer formation temperature.

[0022] Preferably, the carbon layer has a thickness of between 5 nm and 500 nm, preferably between 50 nm and 150 nm.

[0023] In some embodiments, the deposition of the carbon layer is carried out in a gas stream comprising a carbonaceous gas and a carrier gas, the carrier gas preferably being argon or a mixture of argon and hydrogen.

[0024] In other embodiments, the deposition of the carbon layer is carried out by evaporation of carbonaceous gas from a solid carbon source.

[0025] In some embodiments, the formation of the carbon layer is carried out in a substrate annealing furnace. Preferably, the annealing furnace comprises interior walls and support elements configured to hold at least one substrate, said interior walls, said supports and the gas inside the annealing furnace having a same temperature.

[0026] Advantageously, the annealing furnace contains a plurality of substrates comprising a surface of said semiconductor material, said substrates being vertically superimposed, a vertical space being provided between two adjacent substrates, a carbon layer being formed on the surface of the semiconductor material of each of said substrates.

[0027] In other embodiments, the deposition of the carbon layer is carried out in a chemical vapor deposition chamber. Another subject of the invention relates to a method for treating a substrate having a free surface of a semiconductor material, in particular a monocrystalline semiconductor material, comprising a method for stabilizing said surface as described above and a heat treatment of said substrate after stabilization of said surface.

[0028] Advantageously, at least part of the heat treatment is carried out at a temperature above 1700°C.

[0029] In some embodiments, the deposition of the carbon layer and the heat treatment are carried out in the same substrate annealing furnace. Preferably, the heat treatment successively comprises a first phase carried out at a temperature between 1000 and 1200°C, comprising the formation of the carbon layer, and at least one second phase carried out at a temperature above 1200°C, preferably above 1700°C, in which the carbon layer formed during the first phase limits the reorganization of the surface into a semiconductor material in the form of terraces. Advantageously, the method further comprises, after the heat treatment, a step of removing the carbon layer by reactive ion etching or by plasma etching. Advantageously, the method comprises a step of injecting oxygen into the furnace to create a reactive plasma during the step of removing the carbon layer.

[0030] Another subject of the invention relates to a method for manufacturing a semiconductor structure, comprising the following steps: o the formation of a weakening zone by implantation of ionic species in a donor substrate made of a semiconductor material, in particular a monocrystalline semiconductor material, o the bonding of said donor substrate to a support substrate, o the detachment of the donor substrate along the weakening zone so as to transfer a layer of the semiconductor material onto the support substrate, o a treatment method as described above so as to heal the defects created in the layer of the semiconductor material during the implantation of the ionic species, in which the carbon layer is formed on the free surface of the layer of the semiconductor material transferred onto the support substrate.

[0031] Preferably, the donor substrate is silicon carbide.

[0032] BRIEF DESCRIPTION OF THE FIGURES

[0033] Other characteristics and advantages of the invention will emerge from the detailed description which follows, with reference to the appended drawings, in which:

[0034] Figure 1 illustrates the formation of terraces on a front face of a monocrystalline semiconductor material. Figure 2 illustrates a substrate having a portion of a monocrystalline semiconductor material on its front face.

[0035] Figure 3 illustrates the substrate of Figure 2 after deposition of a carbon layer.

[0036] Figure 4 illustrates the substrate of Figure 3 after ablation of the carbon layer.

[0037] Figures 5A to 5C illustrate the fabrication of a substrate having a portion of a single-crystal semiconductor material on its front face.

[0038] Figure 6 shows the thermal profile used for a process according to the invention.

[0039] Figure 7 shows the terrace-induced roughness as a function of annealing temperature for different substrates.

[0040] Figure 8 illustrates an annealing furnace suitable for forming a carbon layer according to a preferred embodiment of the invention.

[0041] DETAILED DESCRIPTION OF EMBODIMENTS

[0042] Figure 2 illustrates a substrate 10 comprising a support substrate 11 and a portion 20 made of monocrystalline semiconductor material on its front face. The support substrate 11 may be any type of support substrate suitable for the deposition or transfer of a portion 20 made of a monocrystalline semiconductor material, for example a support substrate made of a polycrystalline semiconductor material.

[0043] Alternatively, the substrate 10 may be a bulk substrate made of a monocrystalline semiconductor material, i.e. the support substrate 11 and the portion 20 together constitute a single portion made of a bulk monocrystalline semiconductor material.

[0044] It should be noted that the semiconductor material which forms the front face of the substrate 10, and which therefore makes up either the portion 20 (in the case of a substrate 10 comprising a support substrate 11 and a portion 20) or the substrate 10 (in the case of a solid substrate) is also likely to be a polycrystalline material.

[0045] In the remainder of the description, since the case of a substrate 10 comprising a support substrate 11 and a monocrystalline portion 20 is detailed, the material which composes the portion 20 will be designated by the expression “monocrystalline semiconductor material” to distinguish it from the material composing the support substrate 11. However, the method described below is also applicable to the case of a polycrystalline semiconductor material, each grain then being capable of being considered as a monocrystal.

[0046] According to a preferred embodiment, the monocrystalline semiconductor material is silicon carbide.

[0047] According to other embodiments, the monocrystalline semiconductor material is chosen from: Aluminum nitride (AIN), gallium nitride (GaN), alloys of these nitrides Al x Cheerful- X)N, x being a number between 0 and 1, indium phosphide (InP) or gallium arsenide (GaAs). Typically, the surface 200 of the portion 20 made of a single-crystal semiconductor material or, where appropriate, of the substrate made of a bulk single-crystal semiconductor material, is slightly off-axis. For example, if the semiconductor material is SiC, the surface may be off-axis relative to the SiC crystal structure to facilitate control of the 4H polytype during growth.

[0048] In the case of a polycrystalline semiconductor material, some of the grains may exhibit such misalignment relative to the crystalline structure of the SiC. For example, following cutting or polishing of the substrate 10 so as to reveal a specific face of the substrate 10, grains whose orientation is randomly oriented relative to this face will exhibit misalignment.

[0049] Formation of the protective layer

[0050] Subsequently, with reference to FIG. 3, a carbon layer 30 is formed on the surface 200 of the portion 20 made of a monocrystalline semiconductor material.

[0051] Preferably, the carbon layer 30 is glassy carbon. Alternatively, the carbon layer 30 may be in another form of carbon, for example amorphous carbon, graphene or diamond.

[0052] The carbon layer is continuous and covers the entire surface to be protected, i.e. the front face of the monocrystalline material.

[0053] Said carbon layer protects the substrate surface against the formation of terraces during heating to a high temperature. It thus stabilizes the crystalline structure of the surface. The carbon layer is removed after completion of the high-temperature treatments to obtain a clean surface of the monocrystalline semiconductor material with good crystalline quality. The thickness of the carbon layer is preferably less than 200 nm to allow easy removal at the end of a high-temperature process.

[0054] In the case of a glassy carbon layer, the glassiness is achieved from a carbon thickness of a few nanometers; for a smaller thickness, the carbon is in the form of one or two graphene monolayers. When the thickness is sufficient to obtain glassy carbon, the protective layer has a long-distance scale, unorganized three-dimensional structure, which is stable over the entire temperature range to which the surface is exposed during the process, and which allows for total coverage of the substrate surface. The uniformity of a glassy carbon layer is easier to control over the extent of the substrate surface.

[0055] Advantageously, the thickness of the protective carbon layer is between 50 nm and 150 nm.

[0056] Advantageously, the formation of the carbon layer is carried out in a deposition chamber which will be described later. The carbon layer 30 is formed in the gas phase, that is to say that the carbon is present in the deposition chamber in a gaseous form. The substrate is heated in the deposition chamber to a deposition temperature of the protective layer, and the gaseous phase of carbon transforms into solid carbon by a reaction with the hot surface of the substrate.

[0057] The temperature and gas pressure in the deposition chamber are chosen so as not to cause degradation of the surface to be protected during the deposition of the carbon layer.

[0058] Advantageously, the carbon source is a carbonaceous gas, for example propane (CsHs) or acetylene (C2H4) gas mixed with a carrier gas, for example argon or a mixture of argon and hydrogen. The flow rate of such a carbon source can be easily controlled and adjusted to the deposition conditions of the carbon layer. The carrier gas is a neutral gas that does not participate in the chemical reaction of layer formation. The use of such a gas makes it possible to increase the pressure in the deposition chamber to a value greater than or equal to 80 kPa (800 mbar), which makes it possible to limit surface recombinations during the deposition of the carbon layer and thus avoid the formation of terraces during the deposition of the carbon layer.

[0059] The use of high pressure and a large flow of carrier gas also allows for better homogenization of the carbon and better uniformity of the temperature inside the deposition chamber, and to carry out the deposition in a homogeneous manner on a plurality of substrates superimposed in the same deposition chamber. During the deposition of the carbon layer, the atmosphere in the deposition chamber is free of oxygen. Furthermore, unlike known deposition methods, this method does not use any primary or secondary vacuum step. This method is therefore faster and simpler than methods that require such vacuums, since it is not necessary to provide a pumping time for the chamber, since heat exchanges are facilitated there and since it is not necessary to provide complex equipment.

[0060] The carbon gas is mixed with the carrier gas at a carbon gas percentage of 0.01% to 10%, ideally 0.1% to 1%. For example, propane diluted in a 1% argon carrier gas can be used. Such a concentration is relatively low and avoids saturation of the deposition chamber atmosphere, which allows better control of the thickness of the deposited carbon layer. Thus, even if there is an additional source of the carrier gas to obtain the desired pressure, only low concentrations of carbon gases such as propane or acetylene are used, which implies a lower risk of contamination and is less harmful to the deposition chamber and the substrate.

[0061] Alternatively, the carbon layer can be deposited from another carbon source, for example a solid source placed in the same chamber as the substrate. Such a solid source is, for example, a quantity of resin deposited on a substrate made of a semiconductor material and then crosslinked in an oven or on a heating plate. In this case, the evaporation, in the deposition chamber, of carbon gas(es) present in the resin is sufficient to generate, in the atmosphere, a sufficient concentration to cause a carbon layer to appear on the surfaces made of a semiconductor material.

[0062] The carbon layer can be characterized by surface analysis techniques, for example, atomic force microscopy (AFM), X-ray reflectometry (XRR), Raman spectroscopy or low energy electron microscopy (LEEM).

[0063] The carbon layer is stable at least up to a temperature of 2000°C and helps limit terrace formation while the substrate is exposed to a temperature above the terrace formation temperature.

[0064] High temperature steps requiring the protective layer

[0065] After the formation of the carbon layer, further steps may be performed on the substrate at a temperature higher than the terrace formation temperature. Such steps are, for example, annealing to heal defects in the crystal lattice caused during implantation of ionic species, to modify the crystal structure of the substrate, or for the activation of dopants. During these steps, the surface of the monocrystalline semiconductor material is protected by the carbon layer and the formation of terraces on said surface is prevented. The annealing steps are performed at temperatures between 1300°C and 2000°C, typically above 1700°C.

[0066] Removing the protective layer

[0067] At the end of the annealing steps, the temperature is lowered to a temperature below the terrace formation temperature, i.e. below 1300°C. Advantageously, the temperature is lowered to 900°C for ablation of the carbon layer. The carbon layer can then be removed because the temperature is low enough that no terrace formation occurs on the surface of the semiconductor material. The low thickness of the carbon layer promotes rapid removal without leaving any residue on the substrate.

[0068] The removal of the carbon layer can be carried out by a reactive plasma, for example an oxygen plasma according to the reaction:

[0069] C(solid)+O2(gaseous)-> CChfgaseous)

[0070] In some cases, removal can be performed in the same deposition chamber in which the carbon layer formation steps and / or the high temperature steps were performed. However, if any elements of the deposition chamber are made of unprotected graphite or other materials that could be damaged by contact with the reactive plasma, it is preferable to transfer the substrate to another chamber for carbon layer removal.

[0071] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example by oxygen ions or a mixture of oxygen and sulfur hexafluoride.

[0072] In some cases, the carbon layer is removed during a substrate finishing step, for example a mechanical polishing step, without a specific removal step.

[0073] In order to remove any carbon residues and / or to ensure good surface quality of the monocrystalline semiconductor material, a suitable chemical-mechanical polishing step can be carried out after removing the carbon layer.

[0074] At the end of this step, with reference to Figure 4, the substrate 11 is finalized and the carbon layer is removed. The substrate 11 and the free surface of the monocrystalline semiconductor material can now be used for the epitaxial growth of a layer of a monocrystalline semiconductor material (identical or different from that of the substrate 11) and / or the manufacture of a power or radiofrequency electronic component.

[0075] Sequence of a manufacturing process for a semiconductor structure

[0076] We will now describe a method for manufacturing a semiconductor structure for electronic applications, having a monocrystalline silicon carbide surface.

[0077] A donor substrate 220 made of monocrystalline silicon carbide is provided from which the surface layer of monocrystalline silicon carbide will be formed. With reference to FIG. 5A, as shown schematically by the arrows, an implantation of ionic species, such as hydrogen and / or helium, is carried out so as to form a weakening zone 21 in the donor substrate 220. Said weakening zone 21 defines a layer 20 of monocrystalline silicon carbide to be transferred.

[0078] With reference to Figure 5B, the donor substrate 220 thus implanted is bonded to a base substrate 11. The donor substrate can be bonded directly to the base substrate as illustrated in Figure 5B, or via one or more intermediate layers which can be arranged on the donor substrate and / or on the base substrate before bonding (not shown).

[0079] Referring to Figure 5C, the donor substrate 220 is then detached along the weakening zone 21, which leads to the transfer of the monocrystalline silicon carbide layer onto the base substrate 11, thus forming the support substrate 10 as shown in Figure 2. The detached portion 221 of the donor substrate can be reused for the transfer of other monocrystalline silicon carbide layers onto other base substrates. A treatment method is then carried out, successively comprising a step of stabilizing the surface by forming a protective carbon layer, a high-temperature annealing intended to heal the defects created in the monocrystalline silicon carbide layer during the implantation of the ionic species, and the subsequent removal of the protective carbon layer.

[0080] In some embodiments, the method of treating a substrate having a monocrystalline silicon carbide surface is carried out in a single annealing furnace. In this case, the deposition of the carbon layer is also carried out in the annealing furnace. Thus, a transfer from a deposition chamber dedicated to the deposition of the protective layer to an annealing furnace during the ongoing process is avoided, and thus a simpler, faster process is obtained without risk of contamination of the substrate.

[0081] Figure 6 illustrates a temperature profile for such a process in an annealing furnace as a function of elapsed time. Three main sequences of the process can be distinguished, which correspond to the formation of a protective carbon layer (S1), high-temperature annealing (S2), i.e. above the temperature at which terrace formation begins, and a step of removing the protective layer (S3).

[0082] The gas injected at the top of the furnace is evacuated under a flow of carrier gas is evacuated from the bottom of the furnace during all sequences of the process.

[0083] The first sequence S1 begins at a time t0. The substrate is at room temperature, which is typically about 20°C or below the terrace formation temperature. The substrate is introduced into the deposition chamber. The substrate is heated to a temperature T1 for deposition of the carbon layer. The deposition temperature T1 is between 1000°C and 1200°C. Thus, T1 is below the terrace formation onset temperature, which is about 1300°C at a pressure of 101 kPa (1 atm).

[0084] The deposition temperature T1 is kept constant and the carbon layer is deposited. During this time, the pressure in the furnace is maintained at 80 kPa (800 mbar) or 100 kPa (1 bar).

[0085] The duration of carbon layer formation is typically between 10 and 30 minutes. The flow rate of propane injected to obtain carbon gas depends on the volume of the chamber and is for example approximately 10 sccm. These parameters can be adjusted to obtain a carbon layer with a desired thickness and homogeneity adapted for optimal protection during the following sequence, and for a time short enough to optimize the process in terms of duration and cost.

[0086] The deposition of the carbon layer begins at time t1.

[0087] In some cases (not shown), the deposition of the carbon layer is followed by a step of thickening the carbon layer at a temperature higher than T1. Step S1 thus comprises several stages of different temperatures. The use of a first stage makes it possible to obtain a protective layer at a temperature at which the formation of terraces is very reduced and therefore negligible. The use of a second stage at a higher temperature makes it possible to obtain faster growth to thicken the carbon layer.

[0088] The carbon dioxide supply is stopped at the end of sequence S1. The carbon dioxide residues are evacuated under the flow of the carrier gas.

[0089] When the deposition of the carbon layer is completed at a time t2, the second sequence S2 is carried out. The second sequence S2 comprises heating from the deposition temperature T1 to an annealing temperature T2 and a temperature plateau of a duration which is typically between 30 and 120 min. The annealing temperature T2 and the duration of the treatment are chosen according to the state and the substrate before the current process, and the crystalline structure of the substrate envisaged. Typically, the annealing is carried out at a temperature T2 between 1600°C and 2000°C.

[0090] At the end of sequence S2, the substrate is cooled to maintain the crystalline properties obtained during annealing. At time t3, the substrate reaches a third temperature T3 of 900°C.

[0091] The third sequence S3 is then carried out during which the protective carbon layer is removed by oxidation, as previously described. During this step, the temperature T3 = 900°C is kept constant. The removal time is typically between 10 and 120s at a stripping rate of approximately 100nm per minute. The total duration of the sequence S3 also includes stabilization of the furnace and is between 5 and 60 min. When, at time t4, the carbon layer is completely removed, the substrate is cooled in order to remove it from the furnace.

[0092] Alternatively, the deposition of the protective layer can be carried out in a chemical vapor deposition chamber. In this case, a transfer step from the deposition chamber to the substrate annealing furnace is added at time t2. This step typically involves cooling the substrate and subsequent heating.

[0093] In some embodiments, when elements of the annealing furnace are not to be exposed to an oxygen atmosphere, a step of transferring the annealing furnace to a protective layer removal enclosure is added. The removal enclosure may be adapted to the removal of the layer by reactive ion etching or by plasma etching. Such a step involves cooling the substrate to t3 and reheating to the removal temperature at the start of sequence S3.

[0094] When the substrate treatment process includes a transfer step, the different sequences can be carried out separately in time.

[0095] Effect of the protective layer on terrace formation Figure 7 shows the root mean square (RMS) value of the surface roughness caused by terrace formation on a single-crystal SiC surface measured by AFM. In this example, the presence of a carbon protective layer was confirmed by Raman spectroscopy measurements.

[0096] Bar 50 corresponds to a reference measurement of a monocrystalline SiC layer with an orientation in the C crystal axis with a 4° offset in the [11-20] direction of the silicon carbide crystal, not covered with a carbon layer, having not undergone any heat treatment likely to generate terraces. All other measurements are carried out on samples with the same orientation and the same crystalline quality of SiC.

[0097] Bars 51 and 52 correspond to monocrystalline SiC samples without a carbon protective layer. The sample corresponding to bar 51 was annealed at 1635°C and the sample corresponding to bar 52 was annealed at 1765°C. All annealings lasted 30 minutes. Terrace formation with steps is observed, responsible for a surface roughness greater than 11 nm RMS or 15 nm RMS, respectively, which can be problematic for the manufacture of electronic components.

[0098] The conditions for carbon layer formation are summarized in the table

[0099] 1.

[0100] [Table 1]

[0101] Bars 53A to 58C correspond to samples on which a protective carbon layer was deposited according to the parameters indicated in Table 1. In the case of bars 53A to 57C, the duration of the hold is 10 minutes. For bars 58A - 58C, the duration of the hold is 30 minutes.

[0102] Bars 53A, 54A, 55A, 56A, 57A and 58A correspond to different samples on which a protective carbon layer was deposited and subsequently removed.

[0103] These samples were not annealed. For measurements 53A, 54A, and 55A, the terrace formation is slightly above the reference measurement, however the roughness remains below 1 nm RMS. Measurements 56A, 57A, and 58A result in a roughness comparable to that of the reference.

[0104] For bars 53B, 54B, 55B, 56B, 57B and 58B, a carbon protective layer was deposited on a single-crystal SiC surface according to the conditions in Table 1, and annealing at 1700°C was carried out. The annealing times ranged from 30 to 60 minutes. Subsequently, the carbon layer was removed for RMS measurement. For all samples, the roughness was less than 2 nm RMS.

[0105] For bars 53C, 54C, 55C, 56C, 57C and 58C, a carbon protective layer was deposited on a single-crystal SiC surface according to the conditions in Table 1, and annealing at 1800°C was performed. Subsequently, the carbon layer was removed for RMS measurement. For all samples, the roughness is less than 5 nm RMS.

[0106] A considerable reduction in terrace formation is therefore observed for all deposited carbon layers. The most favorable results were obtained for samples 58A - 58C for which the carbon layer deposition time is 30 minutes, which is longer than the formation time of the other protective layers. Depending on the step bunching reduction needs, the process duration and the planned annealing temperature and the necessary annealing time, the protective layer deposition parameters can be adjusted to best reduce the appearance of terraces without unnecessarily prolonging the process.

[0107] In another example, a GaN layer is transferred onto a support substrate such as a polycrystalline silicon carbide, polycrystalline aluminum nitride, or other semiconductor support substrate. A carbon protection layer is deposited by a method as described above on the free surface of the GaN layer. Since the formation of gallium balls is likely to occur from a temperature of 850°C under a nitrogen atmosphere at atmospheric pressure, the deposition of the carbon layer is, for example, carried out at a temperature below 800°C. However, higher temperature depositions are also likely to be carried out under certain circumstances, for example if a high gallium partial pressure limits the appearance of gallium balls.

[0108] A heat treatment can then be carried out to activate the dopants present in the GaN layer and / or to strengthen the bonding following the transfer of the GaN layer. During the heat treatment, the GaN surface is protected against the formation of terraces and the formation of gallium balls.

[0109] The carbon layer is then removed by reactive ion etching or plasma etching and / or chemical-mechanical polishing.

[0110] Presentation of the oven

[0111] In order to make a process for treating a plurality of substrates efficient and rapid, an annealing furnace is preferably used that can simultaneously treat a maximum number of substrates under identical conditions. Such a furnace is conventionally called a "batch anneal" furnace in the field of microelectronics.

[0112] Figure 8 illustrates a furnace adapted to receive a quantity of between 120 and 150 substrates in an annealing chamber. The substrates 10 are positioned horizontally in the furnace and are stacked vertically in order to treat a maximum number of substrates in the same flow 73 of hot gas. A free space is maintained between each substrate 10 and the adjacent substrates 10 to optimize the gas flow and facilitate the formation of the carbon layer.

[0113] Such a furnace uses a "top flow" type configuration, that is to say that a gas flow is conveyed into the furnace from the top 71 and, after passing through the furnace, is discharged through an outlet 79 at the bottom of the furnace. Typically a gas flow called carrier gas, transports the carbonaceous gas (typically propane) for the formation of the carbonaceous layer. In some cases, other gases are added to the furnace, for example catalyst type gases to promote the decomposition of the carbonaceous gas.

[0114] When a solid source is used, it is, for example, placed at the top of the furnace, so that the carrier gas transports the carbon gases from the solid source to the substrates to be coated located downstream. However, the position of the solid source can vary.

[0115] All elements of the annealing chamber inside the furnace, i.e. the inner walls 75, the substrate holders for holding the substrates in a horizontal and vertically superimposed position, and the gas included in the annealing chamber are at the same temperature during use of the furnace, with the exception of the outer elements such as the outer wall 76 and the ends of the gas inlet pipes. By the same temperature, it is meant that the temperature difference between the top end 74 of the furnace and the bottom end 78 of the furnace is minimal, typically a few degrees °C, for example less than 3 degrees for a temperature in the furnace between 800 and 1200°C.

[0116] The substrates are heated mainly by conduction from the furnace walls. The gas streams are injected at the same temperature as the temperature inside the furnace.

[0117] An annealing furnace is not intended for the deposition of layers but for the application of a heat treatment of the substrates placed in the furnace. These furnaces are therefore optimized for a high temperature homogeneity of the substrates received there, but not to allow an optimization of a material deposition, in particular to ensure a homogeneity of gas flow on the surface of the substrates. The superimposed positioning of the substrates is particularly detrimental to this homogeneity since the gases have more difficulty accessing the center of the substrates than the edges thereof. However, this type of furnace is nevertheless suitable for the deposition of carbon layers to protect the surface of a semiconductor material against the formation of terraces, in particular because the homogeneity of the thickness of the carbon layer is not a determining criterion as long as the entire surface to be protected is covered. Temporary use of the carbon layer does not require increased homogeneity of this layer.However, it is necessary to control the thickness so as to obtain a sufficient thickness over the entire surface area of ​​all the substrates contained in the furnace. Unlike an epitaxy chamber, such a furnace allows a large number of substrates to be processed simultaneously thanks to the vertically stacked arrangement. In addition, such a furnace allows the carbon layer deposition and annealing steps to be carried out in the same chamber, which avoids the risk of contamination during a transfer between two different chambers. Transfer steps between a carbon layer deposition chamber and an annealing furnace are avoided, thus avoiding cooling between the respective steps, the need for labor for the transfer and thus a loss of time and efficiency.

[0118] REFERENCES R. Zhang et al. “Growth of large Domains of Epitaxial Graphene on the C-face of

[0119] SiC”, J. of App. Phys. 2012, 112 (10); doi: 10.1063 / 1.4765666

[0120] J. Bao et al. “Sequential Control of Step-Bunching During Graphene Growth on SiC (0001 )”, App. Phys. Lett. 2016, 109(8); doi: 10.1063 / 1.4961630

Claims

CLAIMS 1. Method for stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or balls, said method comprising the formation, on said surface, of a layer of vitreous carbon (30) in the gas phase at a pressure greater than or equal to 80 kPa (800 mbar).

2. Stabilization method according to claim 1, in which the semiconductor material is silicon carbide.

3. A stabilization method according to claim 1 or claim 2, wherein the formation of the carbon layer is carried out at a carbon layer formation temperature of between 1000°C and 1200°C.

4. Stabilization method according to claim 3, further comprising a step of thickening the carbon layer (30) at a temperature higher than the carbon layer formation temperature (T 1 ).

5. Stabilization method according to any one of the preceding claims, in which the carbon layer (30) has a thickness of between 5 nm and 500 nm, preferably between 50 nm and 150 nm.

6. Stabilization method according to any one of the preceding claims, in which the deposition of the carbon layer is carried out in a gas flow comprising a carbonaceous gas and a carrier gas, the carrier gas preferably being argon or a mixture of argon and hydrogen.

7. Stabilization method according to any one of claims 1 to 5, in which the deposition of the carbon layer is carried out by evaporation of carbon gas from a solid carbon source.

8. Stabilization method according to one of claims 1 to 7, in which the formation of the carbon layer (30) is carried out in a substrate annealing furnace (70).

9. The stabilization method of claim 8, wherein the annealing furnace (70) comprises interior walls (75) and support members configured to maintaining at least one substrate (10), said interior walls (75), said supports and the gas inside the annealing furnace (70) having the same temperature.

10. A stabilization method according to claim 8 or claim 9, wherein the annealing furnace (70) contains a plurality of substrates comprising a surface of said semiconductor material, said substrates being vertically superimposed, a vertical space being provided between two adjacent substrates, a carbon layer (30) being formed on the surface of the semiconductor material of each of said substrates.

11. Stabilization method according to one of claims 1 to 8, in which the deposition of the carbon layer (30) is carried out in a chemical vapor deposition chamber.

12. Method for treating a substrate having a free surface of a semiconductor material, in particular of a monocrystalline semiconductor material, comprising a method for stabilizing said surface according to one of claims 1 to 11 and a heat treatment of said substrate after stabilization of said surface.

13. A treatment method according to claim 12, wherein at least part of the heat treatment is carried out at a temperature above 1700°C.

14. Treatment method according to one of claims 12 to 13 in combination with claim 6, in which the deposition of the carbon layer (30) and the heat treatment are carried out in the same substrate annealing furnace.

15. Treatment method according to claim 14, in which the heat treatment successively comprises a first phase carried out at a temperature between 1000 and 1200°C, comprising the formation of the carbon layer (30), and at least a second phase carried out at a temperature above 1200°C, preferably above 1700°C, in which the glassy carbon layer (30) formed during the first phase limits the reorganization of the surface into a semiconductor material in the form of terraces.

16. Treatment method according to any one of claims 14 to 15, further comprising, after the heat treatment, a step of removing the carbon layer (30) by reactive ion etching or by plasma etching.

17. Treatment method according to claim 16, comprising a step of injecting oxygen into the furnace to create a reactive plasma during the step of removing the carbon layer (30).

18. Treatment method according to any one of claims 12 to 17, further comprising a chemical-mechanical polishing step adapted to remove the carbon layer (30).

19. A method of manufacturing a semiconductor structure, comprising the following steps: o forming a weakening zone (21) by implanting ionic species in a donor substrate (220) made of a semiconductor material, in particular a monocrystalline semiconductor material, o bonding said donor substrate (220) to a support substrate (11), o detaching the donor substrate (220) along the weakening zone (21) so as to transfer a layer (20) of the semiconductor material onto the support substrate (11), o a treatment method according to one of claims 11 to 15 so as to heal the defects created in the layer of the semiconductor material (20) during the implantation of the ionic species, in which the carbon layer (30) is formed on the free surface (200) of the layer (20) of the semiconductor material transferred onto the support substrate.

20. A method of manufacturing a semiconductor structure according to claim 19, wherein the donor substrate (220) is made of silicon carbide.

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