Power arrangement and method for operating a power arrangement

Abstract

A power arrangement (10) comprises a first number N of power circuits (11 to 15), a DC link line (16), and a control circuit (17). Each power circuit of the first number N of power circuits (11 to 15) comprises a circuit breaker (21 to 25) and a converter (31 to 35) which is coupled via the circuit breaker to the DC link line (16). Each circuit breaker (21 to 25) of the first number N of power circuits (11 to 15) and each converter (31 to 35) of the first number N of power circuits (11 to 15) are coupled to the control circuit (17). Moreover, a method for operating a power arrangement (10) is provided.

Description

[0001] DESCRIPTION

[0002] POWER ARRANGEMENT AND METHOD FOR OPERATING A POWER ARRANGEMENT

[0003] TECHNICAL FIELD

[0004] A power arrangement and a method for operating a power arrangement are provided .

[0005] BACKGROUND

[0006] A power arrangement typically comprises energy sources , energy consumers or prosumers . Examples for an energy source are photovoltaic cells or wind turbines . Energy consumers are loads . Prosumers are parts which are able to provide energy or alternatively to consume energy . Examples for a prosumer are a battery, a storage capacitor or a flywheel . Moreover, the power arrangement comprises a DC link, circuit breakers and convertors such as DC / DC, AC / DC or DC / AC converters .

[0007] There is the risk that a fault occurs in a load or other part of the power arrangement . A fault is e . g . a short-circuit . In the case of a fault in the load, the circuit breaker between the load and the DC link detects an overcurrent and trips . However, the fault may cause an overcurrent in other circuit breaker also such that some of the other circuit breakers also trip . This may result in a complete shut-down of the microgrid despite that most parts of the power arrangement are able to operate .

[0008] It is an obj ect of the present application to provide a power arrangement and a method for operating a power arrangement with increased stability . This obj ect is achieved by the sub ect-matter of the independent claims . Further embodiments and developments are given in the dependent claims .

[0009] SUMMARY

[0010] In an embodiment , a power arrangement comprises a DC link line , a first number N of power circuits , and a control circuit . Each power circuit of the first number N of power circuits comprises a circuit breaker and a converter . The converter is coupled via the circuit breaker to the DC link line . Each circuit breaker of the first number N of power circuits and each converter of the first number N of power circuits are coupled or connected to the control circuit .

[0011] Advantageously, the control circuit is able to receive information from the circuit breakers . In case a circuit breaker trips , the circuit breaker is configured to provide this information to the control circuit . The control circuit is able to provide information to the other circuit breakers and to the converters .

[0012] In an embodiment of the power arrangement , each circuit breaker of the first number N of power circuits is configured to provide a fault signal to the control circuit in case of a fault . A fault is e . g . an overcurrent , an overvoltage or a high temperature detected by the circuit breaker . The control circuit is configured to provide a mode signal to the converters of the first number N of power circuits after receiving the fault signal . In an embodiment of the power arrangement , the first number N is larger than 1 , larger than 2 or larger than 5 .

[0013] In an embodiment of the power arrangement , the first number N is in a range 1 < N < 101 or 1 < N < 21 or 1 < N < 11 or 1 < N < 6 .

[0014] In an embodiment of the power arrangement , the control circuit is configured such that each converter with the exception of the converter that is connected to the circuit breaker providing the fault signal changes its mode from normal mode to fault mode . In the normal mode , the power circuit provides e . g . a constant power to the DC link line or receives a power from the DC link line . In the fault mode , the power circuit provides a constant current or a constant voltage to the DC link line or receives a power from the DC link line . A power circuit which acts as energy source changes its mode from normal mode to fault mode .

[0015] In an example , a power circuit which acts as energy consumer does not change its mode .

[0016] In an alternative example , a power circuit which acts as energy consumer changes its mode . In an example , the converter comprises filter capacitors . The power circuit which acts as energy consumer is also a source for a fault current because of the filter capacitors which the converter of the power circuit is not able to decouple during the fault event . Therefore , the converter might change its mode from a constant power mode to a constant current mode .

[0017] In an embodiment of the power arrangement , in the normal mode , the converter operates according to a droop control . Thus , the converter operates according to a droop curve or to droop curves . The droop curve or the droop curves are e . g . defined or predefined . In an example , a droop curve is reali zed as a voltage droop curve . A droop curve is configured to intentionally reduce an output voltage provided by the converter as the converter drives a load .

[0018] Advantageously, a droop curve in a voltage regulation circuit increases the headroom for load transients .

[0019] In an embodiment , the power arrangement comprises at least one cable to couple the output of the converter of one of the power circuits to a load in another power circuit via the DC link line . The cable results e . g . in a resistance between the output of the converter of one of the power circuits and the load in another power circuit . At high currents , even a small resistance results in substantial voltage drop between the converter and the load . Conversely, when the output current is (near ) zero , the voltage at the load is higher . Rather than increasing the output voltage of the converter at high current to try to maintain the same voltage at the DC link line , droop control instead allows this drop to take place . The power arrangement with droop control has a more stable behavior in comparison to a power arrangement without droop control .

[0020] In an embodiment of the power arrangement , in the fault mode , once the converter has been informed, the converter leaves the droop control and switches in a mode in which the converter supports the fault . This mode of the converter is similar e . g . to a low voltage ride through in photovoltaic and wind converter applications . This mode of the converter is identical to a low voltage ride through . Low voltage ride through can also be named under-voltage ride through . Low voltage ride through is the capability of the power circuit and / or the converter to stay connected to the DC link line in short periods of a lower voltage tapped at the DC link line .

[0021] In an embodiment of the power arrangement , in case the converter is in a status of an operating converter, when the converter receives the mode signal , the converter is configured to remain in the status of an operating converter after receiving the mode signal . Thus , the converter is configured not to switch in the status of an idle or blocking converter in this case . However, the converter which is connected to the circuit breaker that generated the fault signal is already set in a status of an idle or blocking converter by the circuit breaker or will be set in the status of an idle or blocking converter by the circuit breaker .

[0022] In an embodiment of the power arrangement , in case the converter is in a status of an idle or blocking converter, when the converter receives the mode signal , the converter is configured to remain in the status of an idle or blocking converter after receiving the mode signal by the converter . Thus , an idle power circuit remains idle despite the mode signal .

[0023] In an embodiment of the power arrangement , the fault signal is implemented as analog signal . The control circuit is configured to evaluate analog signals .

[0024] In an example , the fault signal is an analog current signal . For example , the fault signal uses a 4-20 mA current loop ( also named 4 mA-to-20 mA current loop ) . In an alternative example , the fault signal is an analog voltage signal .

[0025] In an embodiment of the power arrangement , each of the first number N of power circuits comprises an inductor which is coupled to the converter and to the circuit breaker . Advantageously, the inductor hinders an abrupt rise of current . The inductor is implemented as short circuit choke and / or as a stray inductance , e . g . of a cable that couples the converter to the circuit breaker . Such a cable may be long resulting in a measurable stray capacitance .

[0026] In an embodiment of the power arrangement , the power arrangement comprises at least one signaling line , such as one signaling line , two signaling lines or a first number N of signaling lines . The control circuit comprises at least one input which is connected to outputs of the circuit breakers of the first number N of power circuits via the at least one signaling line . The at least one signaling line is implemented to provide the fault signal generated by the circuit breaker after detecting a fault or parallel to detecting a fault to the control circuit . In an example , the circuit breaker of the first number N of power circuits have a main contact and an auxiliary contact . The auxiliary contact is connected via the output of the circuit breaker to the signaling line . Thus , the fault signal is generated immediately, when the circuit breaker opens the main contact of the circuit breaker due to detection of a fault .

[0027] In an embodiment of the power arrangement , the control circuit comprises a first number N of inputs which are connected to outputs of the circuit breakers of the first number N of power circuits via a first number N of signaling lines .

[0028] In an embodiment of the power arrangement , the power arrangement comprises at least one alert line , such as e . g . one alert line , two alert lines , a first number N of alert lines or more than a first number N of alert lines .

[0029] In an embodiment of the power arrangement , the control circuit comprises a first number N of outputs which are connected to inputs of the circuit breakers and of the converters of the first number N of power circuits via the at least one alert line . The at least one alert line is implemented to provide the mode signal of the control circuit to each circuit breaker and to each converter . The circuit breaker which detects the fault and the converter which is connected to the circuit breaker which detects the fault remain in the idle or blocking status .

[0030] In an embodiment of the power arrangement , a circuit breaker of the first number N of power circuits is implemented as hybrid circuit breaker or / and solid-state circuit breaker .

[0031] In an embodiment , a method is configured for operating a power arrangement . The power arrangement comprises a first number N of power circuits . Each power circuit of the first number N of power circuits comprises a circuit breaker and a converter which is coupled via the circuit breaker to a DC link line . The method comprises :

[0032] Providing electrical power from and to the first number N of power circuits via the DC link line , and providing a fault signal to a control circuit by a circuit breaker of the first number N of power circuits in case of a fault detected by the circuit breaker .

[0033] The power arrangement described above is particularly suitable for the method for operating a power arrangement . Features described in connection with the power arrangement can therefore be used for the method and vice versa .

[0034] In an embodiment , the power arrangement is configured as microgrid, e . g . as a DC or AC microgrid . For example , the power arrangement comprises an analog fault indication and sense line in a DC microgrid . In case , the power arrangement is configured as AC microgrid, the power arrangement comprises an AC link line instead of a DC link line .

[0035] In an embodiment , a power arrangement comprises sources , consumers , prosumers , the DC link, converters and circuit breakers .

[0036] In an embodiment , the DC microgrid usually comprises converters which are implemented as bidirectional AC / DC conversion units , DC / DC battery storage converters , unidirectional DC / DC photovoltaic converters and unidirectional AC-DC load interface converters . All these sources , consumers and prosumers are coupled to each other in the DC link .

[0037] In an embodiment , an analog fault indication and sense line is implemented to inform converters and circuit breakers to change their mode from normal mode to fault mode in the DC microgrid . In an embodiment , the power arrangement informs the converters to change their modality such as from constant power to constant voltage and / or constant current during such as short circuit in a part of the DC microgrid . By these way, the converters are able to support the DC link during fault event instead of turning of f theirsel f under fault event . By this way, a possible black out in the grid is avoided and inertia of the grid is increased against short circuits .

[0038] In an embodiment , the breaker and / or the converter receive information so that they do not trip due to back forward currents resulting from an overvoltage protection device . As the grid is e . g . capacitive , the capacitors at the output of the converters act as a turn-of f snubber network even though metal-oxide varistors , abbreviated MOVs , or transient- voltage-suppression diodes , abbreviated TVS diodes , are utili zed . In an example , neither converters nor breakers shall nuisance trip due to backward currents .

[0039] In an embodiment , the cables placed between the DC link line and converters are protected by circuit breakers . Due to no zero crossing DC current and low inertia of the grid against short-circuits , total or quasi arc- free circuit breakers based on hybrid and solid-state circuit breakers are an option due to arc- free switching and from 10 to 1000 times faster switching . During a fault in the DC microgrid, first all filter capacitances of the converters are discharged with signi ficantly high change of rate of fault current . When converters once have a current larger than their maximum operational current , they trip immediately which results in complete blackout . In case of using a solid-state circuit breaker, abbreviated SSCB, due to their ultra- fast operation in range of 10 to 100 ps , the fault current is turned of f before converters trip due to overcurrent detected . In case of a hybrid circuit breaker, abbreviated HCB, due to relatively slow operation time smaller than 1 ms , the fault current reaches a very high magnitude even though an additional short circuit choke might be present .

[0040] In an embodiment , in case of a fault detection by a circuit breaker, especially in case of HCB, the circuit breaker drives an auxiliary global low voltage line { 12-36V) so that all converters placed in the grid can be globally informed about faults such as a short circuit . In an example , driving the auxiliary global low voltage line is done analog and voltage sensing is also analog . By analog drive and sense structure , driving and sensing can be done faster than digital communication line . All circuits breaker in the DC grid are able to drive this global information line . All converters are able to sense the line by mean of analog . Once converters have sensed the line for a short circuit , the converters change their modality from normal operation to support DC link voltage mode . By this , the converters will stay on support the DC link voltage instead of tripping immediately .

[0041] In an embodiment , the power arrangement makes it possible to inform the converters to change their modality such as from constant power to constant voltage or constant current during such as short circuit in a part of the DC microgrid . By this way, the converters can support the DC link during fault event instead of turning of their sel f under fault event . By this way, a possible black out in grid is avoided and inertia of the grid increased against short circuits .

[0042] BRIEF DESCRIPTION OF THE DRAWINGS The following description of figures of examples or embodiments may further illustrate and explain aspects of the power arrangement and the method for operating a power arrangement . Arrangements , circuits and devices with the same structure and the same ef fect , respectively, appear with equivalent reference symbols . In so far as arrangements , circuits and devices correspond to one another in terms of their function in di f ferent figures , the description thereof is not repeated for each of the following figures .

[0043] Figure 1 shows an exemplary embodiment of a power arrangement ; and

[0044] Figure 2 shows an exemplary embodiment of a power arrangement with a fault .

[0045] DETAILED DESCRIPTION

[0046] Figure 1 shows an exemplary embodiment of a power arrangement 10 . The power arrangement 10 comprises a first number N of power circuits 11 to 15 , a DC link line 16 and a control circuit 17 . Each power circuit of the first number N of power circuits 11 to 15 comprises a circuit breaker 21 to 25 and a converter 31 to 35 which is coupled via the circuit breaker to the DC link line 16 . Each circuit breaker 21 to 25 of the first number N of power circuits 11 to 15 and each converter 31 to 35 of the first number N of power circuits 11 to 15 are coupled to the control circuit 17 .

[0047] The first number N is larger than 1 . Typically, the first number N is between 5 and 100 . In the example shown in Figure 1 , the first number N is five . A converter 31 to 35 of the first number N of power circuits 11 to 15 is one of a group consisting of a DC / DC converter, an AC / DC converter and a DC / AC converter. An AC / DC converter is e.g. implemented as rectifier. The rectifier is realized e.g. as a passive or an active rectifier. For example, the rectifier is a bidirectional active rectifier. A DC / AC converter is e.g. implemented as inverter. A DC / DC converter is e.g. implemented as buck converter, boost converter or buck / boost converter. The converters 31 to 35 typically are different. The converters 31 to 35 are coupled e.g. to loads, energy sources or prosumers.

[0048] In the example shown in Figure 1, a first converter 31 is a DC / DC converter coupled to an energy source comprising photovoltaic cells. A second converter 32 is an AC / DC converter coupled to an energy source comprising an AC grid or a wind turbine. A third converter 32 is a DC / DC converter coupled to an energy storage device such as a battery. The third converter 32 is a bidirectional converter because the battery is a prosumer. A fourth converter 34 is a DC / AC converter coupled to an AC load. A fifth converter 35 is a DC / DC converter coupled to a DC load. Figure 1 shows only examples; other, additional or less loads, sources or prosumers are also possible.

[0049] A DC voltage at the DC link line 16 is e.g. in a range between 0 V and 1000 V or between 0 V and 750 V or between 0 V and 1500 V or between 0 V and 2000 V.

[0050] In an example, the DC voltage at the DC link line 16 is bipolar such as e.g. -+350 V, -+750 V, or -+ 1500 V. Each of the first number N of power circuits 11 to 15 comprises an inductor 41 to 45 which is coupled to the converter 31 to 35 and to the circuit breaker 21 to 25 .

[0051] The control circuit 17 comprises a first number N of inputs 51 to 55 which are connected to outputs of the circuit breakers 21 to 25 via a first number N of signaling lines 61 to 65 of the power arrangement 10 .

[0052] The control circuit 17 comprises a first number N of outputs 71 to 75 which are connected to inputs of the circuit breakers 21 to 25 and of the converters 31 to 35 of the first number N of power circuits 11 to 15 via alert lines 81 to 85 , e . g . via a first number N of alert lines 81 to 85 .

[0053] Each circuit breaker 21 to 25 of the first number N of power circuits 11 to 15 is designed to provide a fault signal SF to the control circuit 17 in case of a fault . The control circuit 17 provides a mode signal SM to the converters 31 to 35 of the first number N of power circuits 11 to 15 after receiving the fault signal SF . The control circuit 17 also provides the mode signal SM to the circuit breakers 21 to 25 of the first number N of power circuits 11 to 15 after receiving the fault signal SF .

[0054] Each converter 31 to 35 with the exception of the converter that is connected to the circuit breaker that had provided the fault signal SF changes its mode from normal mode to fault mode after receiving the mode signal SM . The converter 31 to 35 which is in the fault mode is in a support DC link voltage mode . In case the converter 31 to 35 is in a status of an operating converter, when the converter 31 to 35 receives the mode signal SM, the converter 31 to 35 is configured to remain in the status of an operating converter after receiving the mode signal SM .

[0055] In case the converter 31 to 35 is in a status of an idle or blocking converter, when the converter 31 to 35 receives the mode signal SM, this converter 31 to 35 remains in the status of an idle or blocking converter after receiving the mode signal SM . Thus , this converter will not change its status in case of a mode signal SM .

[0056] Thus , the converter which is connected to the circuit breaker that generated the fault signal SF, is already set in a status of an idle or blocking converter or will be set in the status of an idle or blocking converter and does not react on the mode signal SM .

[0057] Advantageously, the inductors 41 to 45 prevent a quick increase of current . A circuit breaker that is not connected to the faulty load or faulty converter receives the mode signal SM before this circuit breaker itsel f can detect an over current and trips due to over current .

[0058] The signaling lines 61 to 65 are implemented to provide the fault signal SF of the circuit breaker that detects a fault to the control circuit 17 .

[0059] The fault signal SF is implemented as analog signal . The fault signal SF is an analog current signal ; the fault signal SF uses e . g . a 4-20 mA current loop also named 4 mA-to-20 mA current loop . Alternatively, the fault signal SF is an analog voltage signal such as e . g . a 12 to 36 V signal . For example , the fault signal SF is a simple signal as voltage to activate a driver of the transistor 79 which is e . g . a MOSFET . For example , the fault signal SF is at least 3 . 3V or 5V gate voltage .

[0060] The alert lines 81 to 85 are implemented to provide the mode signal SM of the control circuit 17 to the circuit breakers 21 to 25 and to the converters 31 to 35 .

[0061] The control circuit 17 comprises a signal combiner 76 which is connected to the first number N of inputs 51 to 55 . The signal combiner 76 generates a combined fault signal SFC by combining the signals at the first number N of inputs 51 to 55 . The signal combiner 76 generates the combined fault signal SFC as a function of the signals on the signaling lines 61 to 65 . In case one circuit breaker ( or more than one circuit breaker ) generates the fault signal SF, the combined fault signal SFC indicates a fault in the power arrangement 10 .

[0062] The control circuit 17 comprises an internal analog circuit 77 with a voltage source 78 , a transistor 79 , a resistor 80 , a voltage detector 86 and a signal generator 87 . The transistor 79 is reali zed as field-ef fect transistor such as a metal-oxide-semiconductor field-ef fect transistor, abbreviated MOSFET . The control circuit 17 furthermore comprises a diode 88 which is connected parallel to a controlled section of the transistor 79 . An output of the signal combiner 76 is connected to a control terminal of the transistor 79 . A series circuit of the controlled section of the transistor 79 and of the resistor 80 couples a first terminal of the voltage source 78 to a second terminal of the voltage source 78 . Two inputs of the voltage detector 86 are connected to two terminals or nodes of the control circuit 17 , e . g . to two terminals of the resistor 80 . An output of the voltage detector 86 is connected or coupled to an input of the signal generator 87 . The signal generator 87 is connected via the first number N of outputs 71 to 75 to the first number N of alert lines 81 to 85 . The signal generator 87 generates the mode signal SM .

[0063] Thus , the mode signal SM is provided to each of the circuit breakers 21 to 25 and to each of the converters 31 to 35 . Since the circuit breaker which detected the fault already had tripped, the mode signal SM does not change the operation of this circuit breaker . Furthermore , the mode signal SM does not change the operation of the converter that is connected to the circuit breaker which had detected the fault .

[0064] The signaling lines 61 to 65 implement a global information line connected with all circuit breakers 21 to 25 . The signaling lines 61 to 65 are auxiliary low-voltage lines , operating e . g . at 24-36V . The control circuit 17 is connected with the signaling lines 61 to 65 called global information line . The control circuit 17 is implemented as pull-up circuit . Components / features of the control circuit 17 are low-voltage power supply; diode 88 and MOSFET 79 in parallel for sensing the fault signal SF which is reali zed as drive / fault information signal . A resistor tap is designed for the mode signal SM which implements a sending mode switching signal . The driving / sending information (by the circuit breaker that senses the fault ) is analog . Sensing (by the other circuit breakers in the DC microgrid) is analog .

[0065] After sensing fault ( as informed via the global information line reali zed by the signaling lines 61 to 65 ) , modality of converters 31 to 35 is changed from normal operation to support DC link voltage mode or fault mode . Normal mode : constant power ; support DC link voltage mode or fault mode : constant current or constant voltage .

[0066] Thus , the power circuits of the first number N of power circuits 11 to 15 provide a constant power in the normal mode . The power circuits of the first number N of power circuits 11 to 15 provide a constant current or a constant voltage in the fault mode . Only a power circuit acting as energy source for the DC link line 16 change their mode . The ef fect is to reduce load via interface converters so that a DC link voltage does not drop fast .

[0067] A method comprises :

[0068] Sensing a fault by one circuit breaker 11 to 15 , sending an information or drive command via the global information line ( reali zed by the signaling line or signaling lines 61 to 65 ) by the sensing circuit breaker 11 to 15 , sending information or drive command in analog manner, sensing information or drive command by the remaining circuit breakers in the power arrangement 10 , and changing mode from normal mode to fault mode ( instead of tripping immediately) .

[0069] Advantageously, analog fault sensing and detection is faster than digital sensing and detection ( controller etc . ) . Advantageously, the power arrangement 10 is configured for an analog fault indication and sense line in DC microgrids . A circuit breaker sends an analog signal called fault signal SF to an analog voltage detection system called control circuit 17 to alert the converters so that the converters stay in support mode to the DC link voltage instead of tripping immediately .

[0070] In an alternative , not shown embodiment , the first number N of signaling lines 61 to 65 are combined in one or two signaling lines 61 , 62 which are connected to one input 71 of the control circuit 17 and to the first number N of circuit breakers 21 to 25 , e . g . in a star or a ring configuration . The combination of the signals provided by the first number N of circuit breakers 21 to 25 is performed by the signaling lines 61 , 62 and the protocol used for these signaling lines 61 , 62 and the fault signal SF . The signal combiner 76 can be omitted and replaced by a connection line .

[0071] In an alternative , not shown embodiment , the fault signal SF obtains a first value in case of a pre-alarm and a second value in case a fault . Thus , a circuit breaker indicates a rise above a first level of current , voltage and / or temperature with the first value of the fault signal SF . The circuit breaker indicates the rise above a second level of current , voltage and / or temperature with the second value of the fault signal SF . The second level is higher than the first level . The first and the second values are represented by two di f ferent analog values of the fault signal SF .

[0072] In an alternative , not shown embodiment , the fault signal SF is implemented as a digital signal . The signal combiner 76 reali zes the function of an OR combination of the signals provided on the signaling lines . The control circuit 17 is reali zed as a digital circuit .

[0073] In an alternative , not shown embodiment , the power arrangement 10 additionally comprises a further DC link line and a link switch coupling the DC link line 16 to the further DC link line . The link switch is coupled or connected to the control circuit 17 . The link switch is configured to receive the mode signal SM . Optionally, the link switch is configured to generate the fault signal SF in case of a fault and to provide the fault signal SF to the control circuit 17 .

[0074] Figure 2 shows an exemplary embodiment of a power arrangement 10 with a fault which is a further development of the embodiment shown in Figure 1 . In this example , the load of the fourth power circuit 14 generates a fault such as a short circuit . A fourth circuit breaker 24 of the fourth power circuit 14 is set in an idle or blocking state that means that this circuit breaker 24 trips . The circuit breakers 21 to 23 , 25 , 101 and the converters 31 to 33 of the first , second, third, fi fth and sixth power circuit 11 to 13 , 15 , 100 change from normal mode to fault mode ( they are encircled with blocks marked with * ) . Said circuit breakers 21 to 23 , 25 , 101 do not trip even i f a current flowing in the circuit breaker normally would result in tripping . Thus , the power arrangement 10 continues to operate and only the load that caused the fault is disconnected from the DC link line 16 . The first to the third power circuits 11 to 13 comprise parasitic capacitances 102 to 104 . Advantageously, values of the parasitic capacitances 102 to 104 are kept low to avoid a rapid increase of current in the power arrangement 10 in case of a fault . In an alternative embodiment, an arrangement comprises the power arrangement 10 (as shown e.g. in Figure 1) and at least one further power arrangement which is realized e.g. similar to the power arrangement 10 of Figure 1. The power arrangement 10 is coupled to the at least one further power arrangement. The power arrangement 10 can be named DC sector. The mode signal SM is also sent to the at least one further power arrangement. The DC sector it is coupled to other nearby sectors.

[0075] The invention is not limited to the description of the embodiments. Rather, the invention comprises each new feature as well as each combination of features, particularly each combination of features of the claims, even if the feature or the combination of features itself is not explicitly given in the claims or embodiments.

[0076] Reference numerals

[0077] 10 power arrangement

[0078] 11 to 15 power circuit

[0079] 16 DC link line

[0080] 17 control circuit

[0081] 21 to 25 circuit breaker

[0082] 31 to 35 converter

[0083] 41 to 45 inductor

[0084] 51 to 55 input

[0085] 61 to 65 signaling lines

[0086] 71 to 75 output

[0087] 76 signal combiner

[0088] 77 internal analog circuit

[0089] 78 voltage source

[0090] 79 transistor

[0091] 80 resistor

[0092] 81 to 85 alert line

[0093] 86 voltage detector

[0094] 87 signal generator

[0095] 88 diode

[0096] 100 power circuit

[0097] 101 circuit breaker

[0098] 102 to 104 capacitance

[0099] SF fault signal

[0100] SFC combined fault signal

[0101] SM mode signal

Claims

Claims1. A power arrangement (10) , comprising: a first number N of power circuits (11 to 15) , a DC link line (16) , and a control circuit (17) , wherein each power circuit of the first number N of power circuits (11 to 15) comprises a circuit breaker (21 to 25) and a converter (31 to 35) which is coupled via the circuit breaker to the DC link line (16) , wherein each circuit breaker (21 to 25) of the first number N of power circuits (11 to 15) and each converter (31 to 35) of the first number N of power circuits (11 to 15) are coupled to the control circuit (17) , wherein each circuit breaker (21 to 25) of the first number N of power circuits (11 to 15) is configured to provide a fault signal (SF) to the control circuit (17) in case of a fault, and wherein the control circuit (17) is configured to provide a mode signal (SM) to the converters (31 to 35) of the first number N of power circuits (11 to 15) .

2. The power arrangement (10) of claim 1, wherein the control circuit (17) is configured such that each converter (31 to 35) with the exception of the converter that is connected to the circuit breaker providing the fault signal (SF) changes its mode from normal mode to fault mode.

3. The power arrangement (10) of claim 2, wherein the converter (31 to 35) which is in the fault mode applies a constant current or a constant voltage to the DC link line (16) .

4. The power arrangement (10) of any one of claims 1 to 3, wherein in case the converter (31 to 35) is in a status of an operating converter, when the converter (31 to 35) receives the mode signal (SM) , the converter (31 to 35) is configured to remain in the status of an operating converter after receiving the mode signal (SM) .

5. The power arrangement (10) of any one of claims 1 to 4, wherein in case the converter (31 to 35) is in a status of an idle or blocking converter, when the converter receives the mode signal (SM) , the converter (31 to 35) is configured to remain in the status of an idle or blocking converter after receiving the mode signal (SM) .

6. The power arrangement (10) of any one of claims 1 to 5, wherein the fault signal (SF) is implemented as analog signal, and wherein the control circuit (17) is configured to evaluate analog signals.

7. The power arrangement (10) of any one of claims 1 to 6 wherein the fault signal (SF) is implemented as an analog current signal realized for a 4-20 mA current loop.

8. The power arrangement (10) of any one of claims 1 to 6 wherein the fault signal (SF) is implemented as an analog voltage signal.

9. The power arrangement (10) of any one of claims 1 to 8, wherein each of the first number N of power circuits (11 to 15) further comprises an inductor (41 to 45) which is coupled to the converter (31 to 35) and to the circuit breaker (21 to 25) .

10. The power arrangement (10) of any one of claims 1 to9, wherein the power arrangement (10) comprises at least one signaling line (61 to 65) , wherein the control circuit (17) comprises at least one input (51 to 55) which is connected to outputs of the circuit breakers (21 to 25) of the first number N of power circuits (11 to 15) via the at least one signaling line (61 to 65) , and wherein the at least one signaling line (61 to 65) is implemented to provide the fault signal (SF) generated by the circuit breaker after detecting a fault or parallel to detecting a fault to the control circuit (17) .

11. The power arrangement (10) of any one of claims 1 to 10, wherein the power arrangement (10) comprises at least one alert line (81 to 85) , wherein the control circuit (17) comprises a first number N of outputs (71 to 75) which are connected to inputs of the circuit breakers (21 to 25) and of the converters (31 to 35) of the first number N of power circuits (11 to 15) via the at least one alert line (81 to 85) , and wherein the at least one alert line (81 to 85) is implemented to provide the mode signal (SM) of the control circuit (17) to the circuit breakers (21 to 25) and to the converters (31 to 35) .

12. The power arrangement (10) of any one of claims 1 to11,wherein the converter (31 to 35) of the first number N of power circuits (11 to 15) is one of a group consisting of a DC / DC converter, an AC / DC converter and a DC / AC converter.

13. A method for operating a power arrangement (10) , wherein the power arrangement (10) comprises a first number N of power circuits (11 to 15) , wherein each power circuit of the first number N of power circuits (11 to 15) comprises a circuit breaker (21 to 25) and a converter (31 to 35) which is coupled via the circuit breaker to a DC link line (16) , and wherein the method comprises: providing electrical power from and to the first number N of power circuits (11 to 15) via the DC link line (16) , providing a fault signal (SF) to a control circuit (17) by a circuit breaker of the first number N of power circuits (11 to 15) in case of a fault detected by the circuit breaker, and providing a mode signal (SM) by the control circuit (17) to the converters (31 to 35) of the first number N of power circuits (11 to 15) after receiving the fault signal (SF) .

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