Component carrier and method of producing the same

Abstract

The invention concerns a component carrier comprising a stack (1) comprising at least one electrically conductive layer structure (2) and at least one electrically insulating layer structure (3), said at least one electrically conductive layer structure (2) comprising two portions (P1, P2) adjacent one to each other placed on a common layer (5), each portion (P1, P2) having a base (6) in contact with the common layer (5), an upper extremity (7) opposite to said base (6) and at least one lateral wall(8) connecting the base (6) and the upper extremity (7), wherein the base (6) of each portion (P1, P2) is connected to the at least one lateral wall (8), thereby forming a base edge (9), the side wall (8) faces the adjacent portion (P1, P2) and has an inclination (a) relative to the base (6) of less than 90°, and wherein a distance between the base edges (9) of the two adjacent portions (P1, P2) is below 10µm. The invention also concerns a method of manufacturing such component carrier.

Description

[0001] COMPONENT CARRIER AND METHOD OF PRODUCING THE SAME

[0002] The present invention concerns a component carrier, according to the preamble of claim 1, and a method of producing such carrier, according to the preamble of claim 23.

[0003] Known component carriers are typically stacks comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, said at least one electrically conductive layer structure comprising two portions adjacent one to each other placed on a common layer, each portion having a base in contact with the common layer, an upper extremity opposite to said base and at least one lateral wall connecting the base and the upper extremity.

[0004] Known methods for producing such stacks contain steps of manufacturing fine lines structure portions like the traces on said stacks by lithography steps, with LDI for instance. It means that lamination of the resist, developing and stripping steps must be performed. For fine line structures <5pm, a seed layer of sputtered Ti / Cu is required to enable a good adhesion of the plated copper on the dielectric. After the photo structuring and galvanic plating processes, the seed layer needs to be etched away. A special chemistry is required to etch away Ti.

[0005] The CN 108282964 A proposes fine line structuring (1-110pm spaces with 0.2-500pm depth) in conductive layer with glue line below (acrylic or epoxy film). After laser ablation a protective sheet is laminated above the board substrate.

[0006] The CN 113068310 A discloses laser ablation of a conductive paste to form micro / nano spaces for the circuit board. In top of the conductive layer, a metal can be optionally plated before ablation.

[0007] A conductive layer is deposited on a dielectric presenting already trenches, according to the teachings of TW 201026168 A. Laser ablation of the conductive layer within the trenches and on top of the dielectric is applied. Portions in the form of fine lines (<10pm) are therefore formed within the trenches. The seed layer can be observed below the lines and on one wall side. The dielectric needs to be already patterned before plating. The CN 110572945 A describes the formation of lines in copper by means of a laser for a PCB. The copper surface needs to be polished, brushed, cleaned and dried before the laser ablation, and a CMP process needs to be performed.

[0008] It is the object of the present invention to overcome the disadvantages of the prior art and to provide an improved component carrier and an improved method of its production.

[0009] The scope of the present invention is as defined by the subject-matter of the independent claims. The dependent claims specify particular embodiments of the present invention.

[0010] To provide an enhanced component carrier the present invention proposes a stack, wherein the base of each portion is connected to the at least one lateral wall, thereby forming a base edge, the side wall faces the adjacent portion and has an inclination relative to the base of less than 90°, and wherein a distance between the base edges of the two adjacent portions is below 10pm.

[0011] This may bring the advantage that a high density of electrically conductive portions may be created in at least one portion of the component carrier. Moreover, this can assist the miniaturization of the component carrier, in particular because of the proper use of a specific removal, properly set to obtain a distance between two adjacent portions below 10 pm. The actual shape of the portion with the specific inclination of the at least one lateral wall is the clear footprint of the formation of the space between said portions through removal process such as a laser subtracting process

[0012] A preferred embodiment is characterized by a rounded lateral transition area between the at least one lateral wall and the upper extremity of the portion. This shape with rounded upper contours may result in at least one of a better mechanical reliability, protection from material migration, reduced signal path and higher current load capacity. For protection from material migration, it is meant the optimized shape and material of the portion in a manner to reduce or eventually to eliminate the migration of material of the electrically conductive layer structure into an electrically insulating layer structure. This effect may be pronounced at edges due to higher current densities. Rounded contours may have lower current densities compared to edges and therefor may protect the material from migration. A further embodiment according to the present invention is a component carrier, wherein at least one of the two adjacent portions has a thickness in the range between 1 pm to 20 pm, in particular with the ratio of the thickness difference being in the range between 80% and 120%. This may bring the advantage of high design flexibility through an easy subtractive step. Furthermore, portions with different respective application purpose, e.g. transmitting an electrical signal or transmitting thermal energy (heat conduction), can be easily integrated within a component carrier. As for thickness difference it is meant the difference of thickness (height, along the vertical direction) between the two adjacent portions one to each other and / or between the two lateral extremities of a specific portion, for example through a removal of a top portion of a portion or due to an inclined and / or an uneven external plane of the laser ablated electrical conductive layer structure.

[0013] A contour of the portion which is simple to produce is achieved with an embodiment, wherein the at least one lateral wall on each position along its length extends linearly or in curved shape from the upper extremity, in particular from the rounded lateral transition area to the base edge. This may bring the additional advantage of highly reliable and fast signal transmission. Furthermore, this may prevent the event of short-circuit between the two portions adjacent on to each other.

[0014] A preferred embodiment according to the invention is characterized in that the two portions comprise two traces adjacent one to each other. This may bring the advantage of an easy to produce component carrier with easily integrated structures for e.g. transmitting an electrical signal or transmitting thermal energy (heat conduction), in particular with highly reliable and fast signal transmission and prevention of any event of short-circuit between the traces, reaching at the same time fine lines conductive layouts.

[0015] Preferred, at least one of said traces comprises the base in contact with the common layer, the upper extremity opposite to said base and two lateral walls connecting the base and the upper extremity. This allows a highly reliable and mechanically stable arrangement of the traces. A component carrier is preferred, wherein the base of at least one of said two traces has a width smaller than 20 pm, in particular smaller than 10 pm, most preferably smaller than 6 pm. This may bring the advantage of creating of small electrically conductive traces, which in particular may be used in high density interconnection layers through the use of the proper material removal process, such as a laser ablation, to obtain these fine lines / traces. Furthermore, said small traces may be connected to active components, for example chips.

[0016] A further advantageous embodiment is characterized in that more than two traces are provided along each other, wherein a distance between the closest base edges of the two adjacent traces is below 10pm. This may bring the advantage of precisely creating electrically conductive traces without product related dimension limitation. In particular, this may bring a high process and / or product flexibility.

[0017] Further preferred is an embodiment, wherein at least one of the two traces comprises a cross section area in the range between 1 pm2to 120 pm2, in particular in the range between 4 pm2to 35 pm2. This may bring the advantage, that a high density of electrically conductive traces may be created in at least one portion of the component carrier. Moreover, this can assist the miniaturization of component carrier due to the precise manufacturing method using the material removal proves, in particular a laser beam. The specific cross section allows for proper current passage, avoiding that the traces become overheated, and properly balanced with the small dimension(s) of the trace.

[0018] Preferred, the ratio between the distance of two adjacent base edges and the portion thickness is less than 1, in particular less than 0,5. This feature may bring the advantage of creating two portions, e.g. electrically conductive traces, closely distanced from each other. This may create a very high local electrically conductive material density enabling fast data transmission and / or heat dissipation. Through the specific material removal process, the distance between the two adjacent gaps eventually forming the single trace can be decreased, arriving to a base of the portion with a width smaller in comparison of the thickness of the electrically conductive layer structure where the material is removed.

[0019] A further embodiment according to the invention shows a side wall facing the adjacent portion having an inclination relative to the base in a range of 75° to 85°. This may bring the advantage of reliably creating electrically conductive portions like e.g. traces without risk of short junction. A connection of the two portions adjacent to each other at respective upper extremity can be prevented, due to the fact that the inclination(s) enlarge(s) the distance between the portions compared with the distance between the closest base edges. Another embodiment is characterized in that the base forms a sharp edge transition to the adjacent side wall. This may bring the advantage of ensuring high integrity of the respective electrically conductive portion with the stack, since the gap between two adjacent portions defining the sharp edge is formed after providing the electrically conductive layer structure. Furthermore, the sharp edge transition may help transmitting an electrical signal.

[0020] According to an advantageous embodiment of the invention, the outside contour of at least one of the portions above the base and elevating above the base is free of sharp edges. This may bring the advantage of fast signal transmission while ensuring low signal losses, since edges may disturb proper signal transmission. Furthermore, edges free portions may protect the portions from electrically conductive material migration.

[0021] Preferred, all portions, in particular the lateral walls, have a roughness parameter Ra smaller than 15 pm, in particular smaller than 5pm, more in particular smaller than 2pm. This may bring the advantage of reduction of signal losses due to skin effect. Furthermore, this may ensure low surface area which may be prone to chemical decomposition, for example oxidation.

[0022] Further preferred is an embodiment, wherein the common layer comprises a material different from the material of the portions, in particular electrically insulating material, more in particular organic polymeric material. This may ensure the electrical integrity and prevention of short circuits within the component carrier.

[0023] According to an advantageous embodiment of the invention, an electrically insulating material is placed in the gap between at least the two adjacent portions. This may bring the advantage of reduction of chemical decomposition, in particular on the side walls. Furthermore, this may improve the mechanical stability of the component carrier since between the portions no cavities may be available, which enhances the mechanical property.

[0024] A preferred embodiment is characterized by an electrically insulating material comprising embedded fillers. This may bring the advantage of amending the physical properties of the electrically insulating material, for example the Youngs modulus.

[0025] Further preferred is an embodiment, wherein a portion of the common layer located between the two adjacent portions has a tray-like shape. This feature may bring the advantage of preventing an electrical connection between the respective two adjacent portions, which is in particular of advantage with portions in form of traces. Furthermore, the tray-like portion may additionally enhance the mechanical stability of the stack.

[0026] A further very advantageous embodiment of the present invention is a component carrier further comprising a further electrically conductive layer structure, said further electrically conductive layer structure comprising two or more further portions adjacent one to each other placed on a further common layer, each further portion having a further base in contact with the further common layer and a further upper extremity opposite to said further base and at least one further lateral wall connecting the further base and the further upper extremity, wherein the further base of each further portion is connected to its respective at least one further lateral wall at the extremity, each forming a further base edge, the further lateral side wall facing an adjacent portion having an inclination relative to the further base of less than 90°, and wherein a further distance between the closest further base edges of the two further adjacent portions is below 10pm.

[0027] This may bring the advantage of having a higher flexibility of the design of the component carrier. Furthermore, the further electrically conductive portions, e.g. in form of traces, may enable more complex designs of the component carrier while enabling precise formation of further portions created by the material removal process.

[0028] Preferred, the further two portions are located such that further two portions are shifted in stack thickness direction compared to the two portions, which are below or above, seen in stack thickness direction. This may bring the advantage of creating a highly dense three-dimensional matrix of electrically conductive material / structure in an easy and efficient manner created by the material removal process. Furthermore, compared to standard component carrier manufacturing processes, fewer process steps may be need (to create same or similar component carriers).

[0029] A further preferred embodiment of the invention is characterized in that at least the bottom of the gap between adjacent portions is provided with or comprises a laser-stop layer. This feature may ensure high precise manufacture of the component carrier and may assist to ensure a defined geometry of the portion created by the material removal process, in particular a laser beam. A still further preferred embodiment of the invention provides a component carrier, wherein at least one of the two portions defines a connecting pad. This may bring the advantage that also these structures can easily be manufactured in highly precise manner and are easily integrated in complex designs and with high mechanical stability and improved electrical and electronical properties.

[0030] A component carrier according to a further embodiment of the inventions, wherein the two portions are connected one to each other, in particular defining two opposed sides of a hole or groove, allows the easy manufacture of structures like degassing holes or grooves, and compared to standard component carrier manufacturing processes, also with fewer process steps. The holes can have every form needed, with circular or ellipsoid shape, even with edges in the form of polygons or irregular closed curves. Grooves can be straight or with curved longitudinal extension, or even with both shapes present.

[0031] The object of the invention is further solved by a method of producing a component carrier according to any one of preceding paragraphs, this method comprising the steps of providing a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, thereafter performing a material removal process, wherein the material removal process is applied to the at least one electrically conductive layer structure. This may bring the advantage of having high production throughput due to fewer manufacturing steps, while at the same time ensuring highly reliable products having well defined trace geometries created by the material removal process.

[0032] A preferred embodiment of this method is characterized in that the material removal process comprises applying electromagnetic waves, in particular a laser beam. This method of using laser ablation of mostly elongated depressions in the electrically conductive layer, for example a copper layer, allows a precise fine line patterning with a selective process in an easy manner, with less process steps as no lithography loop, no CMP and no Ti etching is required. Traces with defined shape and high aspect ratios can be achieved. This may bring the advantage of creating the component carrier in a highly precise way taking advantage of the possibility of precisely manipulating electromagnetic waves. Furthermore, properties of a laser beam may be tuned very accurately, for example applying a laser beam for few femto-seconds (fs). Preferred, a laser beam is applied which comprises a wavelength range of at least one of: a green light of 480nm-580nm, a UV ultraviolet light of 280nm-410nm, a laser light source of 218nm-299nm or a CO2 laser light of 750nm-2500nm. This allows for the most precise and effective material processing for the materials present in component carriers and the materials used for the traces.

[0033] A further advantageous embodiment of the above method comprises providing a laser-stop layer at the position of the later bottom of the gap between adjacent portions and preferred the removal of said laser-stop layer after the formation of the portions by an etching process. This may bring the advantage of improving the accuracy of the material removal process while reducing the process steps compared to state-of-the-art manufacturing processes.

[0034] Preferred, the material removal process is free from applying a mask. This may bring the advantage of simplifying the manufacturing process, in particular applying less process steps, while having highly precise and well-defined portions inside to component carrier by use of the material removal process.

[0035] The component carrier can further be configured as one of the group consisting of a printed circuit board, and a substrate (in particular an IC substrate). In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a component carrier (which may be plate-shaped (i.e. planar), three-dimensionally curved (for instance when manufactured using 3D printing) or which may have any other shape) which is formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for instance by applying pressure, if desired accompanied by the supply of thermal energy. As preferred materials for PCB technology, the electrically conductive layer structures are made of metal, for example copper, whereas the electrically insulating layer structures may comprise resin and / or glass fibers, so-called prepreg or FR4 material. The various electrically conductive layer structures may be connected to one another in a desired way by forming through-holes through the laminate, for instance by laser drilling or mechanical drilling, and by filling them with electrically conductive material (in particular copper), thereby forming vias as through-hole connections. Apart from one or more components which may be embedded in a printed circuit board, a printed circuit board is usually configured for accommodating one or more components on one or both opposing surfaces of the plate-shaped printed circuit board. They may be connected to the respective main surface by soldering. A dielectric part of a PCB may be composed of resin with reinforcing fibers (such as glass fibers).

[0036] In the context of the present application, the term "substrate" may particularly denote a small component carrier having substantially the same size as a component (in particular an electronic component) to be mounted thereon. More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks as well as component carrier comparable to a printed circuit board (PCB), however with a considerably higher density of laterally and / or vertically arranged connections. Lateral connections are for example conductive paths, whereas vertical connections may be for example drill holes. These lateral and / or vertical connections are arranged within the substrate and can be used to provide electrical and / or mechanical connections of housed components or unhoused components (such as bare dies), particularly of IC chips, with a printed circuit board or intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". A dielectric part of a substrate may be composed of resin with reinforcing spheres (such as glass spheres).

[0037] The at least one electrically insulating layer structure can comprise at least one of the group consisting of resin (such as reinforced or non-reinforced resins, for instance epoxy resin or Bismaleimide-Triazine resin, more specifically FR-4 or FR-5), cyanate ester, polyphenylene derivate, glass (in particular glass fibers, multi-layer glass, glass-like materials), prepreg material, polyimide, polyamide, liquid crystal polymer (LCP), epoxy-based Build-Up Film, polytetrafluoroethylene (Teflon), a ceramic, and a metal oxide. Reinforcing materials such as webs, fibers or spheres, for example made of glass (multilayer glass) may be used as well. Although prepreg or FR4 are usually preferred, other materials may be used as well. For high frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymer and / or cyanate ester resins may be implemented in the component carrier as electrically insulating layer structure. The electrically insulating layer structure may comprise a plurality of electrically insulating layer structures with optionally electrically conductive layer structures (multilayer core).

[0038] The at least one electrically conductive layer structure may comprise at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, tin, titanium, cobalt, manganese, platinum. Although copper is usually preferred, other materials or coated versions thereof are possible as well, in particular coated with supra-conductive material such as graphene. The electrically conductive layer structure may comprise a surface finish. Further, the electrically conductive layer structure may comprising material like electrically conductive polymers like graphene or poly (3, 4-ethylenedioxy thiophene) (PEDOT). Furthermore it may have an electrically insulating core which is covered by an electrically conductive shell. Moreover it may be a metal having fluid or solid particles inside like a gel or a foam.

[0039] The conductive layer may form electrical or electronical components, conductive traces, vias or the like. A trace is a highly conductive track that is used to connect components on a circuit carrier or stack to each other. Since a trace is used to conduct electricity it is made of a highly conductive and stable material. The primary parameters that need to be considered comprise the trace width, trace thickness, trace resistance, trace impedance and trace current.

[0040] The at least one component can be selected from a group consisting of e.g. an electrically non-conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (for example a heat pipe), a light guiding element (for example an optical waveguide or a light conductor connection), an electronic component, or combinations thereof. For example, the component can be an active electronic component, a passive electronic component, an electronic chip, a storage device (for instance a DRAM or another data memory), a filter, an integrated circuit, a signal processing component, a power management component, an optoelectronic interface element, a voltage converter (for example a DC / DC converter or an AC / DC converter), a cryptographic component, a transmitter and / or receiver, an electromechanical transducer, a sensor, an actuator, a microelectromechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a soft magnetic element, in particular a ferromagnetic element, an antiferromagnetic element or a ferrimagnetic element, for instance a ferrite core or may be a paramagnetic element. However, the component may also be a further component carrier, for example in a board-in-board configuration. The component may be surface mounted on the component carrier and / or may be embedded in an interior thereof. Moreover, also other components, in particular those which generate and emit electromagnetic radiation and / or are sensitive with regard to electromagnetic radiation propagating from an environment, may be used as component. In an embodiment, the component carrier is a laminate-type component carrier, also called stack. In such an embodiment, the component carrier is a compound of multiple layer structures which are stacked, in particular parallel stacked, and connected together by applying a pressing force, if desired accompanied by heat. The component carrier may be configured to carry further electric and / or electronic components, such as resistances, capacitors, diodes, transistors, or integrated circuits. Stack thickness is the dimension of said stack perpendicular to the plane of the layers of the stack.

[0041] Embodiments of the present invention are now described with reference to the accompanying drawings. The invention is not limited to the illustrated or described embodiments.

[0042] Fig. 1 Shows the basic structure of a component carrier

[0043] Fig. 2 Shows a top view of a first, simple arrangement of two portions according to invention, the portions being a conductive area and an adjacent trace

[0044] Fig. 3 Shows a top view of a second arrangement of two portions, both in the form of adjacent traces of curved longitudinal extension

[0045] Fig. 4 Shows a further embodiment of two portions according to the invention, said portions being an arrangement of a connecting pad and a short, straight trace

[0046] Fig. 5 Shows an arrangement of two portions defining an essentially circular hole

[0047] Fig. 6 Shows a vertical cross section of a schematic cross-sectional view of two adjacent traces according to the invention

[0048] Fig. 7 Shows a schematic cross-sectional view of two adjacent traces of different shape

[0049] Fig. 8 Shows three different arrangements of traces on a component carrier

[0050] Fig. 9 Shows an arrangement of traces in different levels within a component carrier

[0051] Fig. 10 Shows three stages during the production process of a component carrier

[0052] Fig. 11 Shows an embodiment of a component carrier with a laser-stop layer

[0053] Detailed description of embodiments of the present invention A component carrier as used in the present invention comprises a stack 1 with at least one electrically conductive layer structure 2, preferred copper or copper-based material, and at least one electrically insulating layer structure 3. The electrically conductive layer structure 2 comprises at least two portions Pl, P2, which may be traces 4 adjacent one to each other placed on a common layer 5, typically an electrically and possibly also thermally insulating layer structure, as for example glass. Further or alternatively to such traces 4, the electrically conductive layer structure 2 may comprise connecting pads 25, typically of circular design, constituting another embodiment of a portion Pl, P2. Said portions Pl, P2 might also be mixed arrangements of connecting pads 25 and traces 4 and pads, or may even be defining holes 26 (see Fig. 5) or grooves in the material of the at least one electrically conductive layer structure 2 and eventually the at least one electrically insulating layer structure 3.

[0054] Fig. 2 shows an arrangement according to the invention comprising two portions Pl and P2 in the form of a border area of an extended conductive structure 27 - for Pl - and an adjacent narrow trace 4 - for P2. While the portions of Fig. 2 exemplarily shows straight structures, Fig. 3 is an example for curved structures, in this example in the form of two adjacent traces 4 of curved longitudinal extension, one narrow trace 4 for each of both portions Pl and P2.

[0055] Further or alternatively to traces 4 or segments 27 of broad electrically conductive structures, at least one of the portions Pl, P2 may also comprise a connecting pad 25. Such connecting pads 25 - P2 in Fig. 4 - are exposed regions of electrically conductive material on the stack 1 that components can be soldered to, here in the form of surface mount pads. They are constituted by spatially limited structures and can be of rectangle, round, square, oblong or any other appropriate design, as a result of the removal process, for example by a laser ablation, dividing the pad 25 from the adjacent portion of the electrically conductive layer structure; as for the pad 25 in figure 4, also the traces 4 in figures 1,2 and 3 are the result of the removal process applied to the electrically conductive layer structure, providing its separation in portions, obtaining the desired shapes of portions. These pads 25 can be arranged adjacent to other similar pads 25 or to an adjacent trace 4, as shown in Fig. 4 by portion Pl.

[0056] The portions Pl, P2 may also be connected one to each other in a way to define a recess, hole, groove or bore in a specific material. As shown in Fig. 5, the portions Pl and P2 may define in particular two opposed sides of a hole 26 or a groove. In analogue manner as for the pads 25, said holes 26 can be of rectangle, round, square, oblong or any other appropriate design. Grooves may be of any desired longitudinal extension and may be straight or curved or comprising both kinds of extension. Also according to that embodiment, the portion are the result of the removal process applied on the electrically conductive layer structure, in that case representing a through hole or groove, for example obtained by a laser ablation.

[0057] The features and explanations of the present invention, explained in the following and referring to Figs. 6 to 11 for an arrangement of portions Pl, P2 comprising two adjacent traces 4, apply in similar or analogue manner to all structures of portions Pl, P2, may they be traces 4, pads 25, holes 26 or grooves.

[0058] The traces 4 may be straight linear structures but could also be one or more times bent with sharp or rounded bends, can be curved, spiral-shaped (to define flat coil structures), meandering or have any other geometrical form necessary in the integrated circuit structure. Even gaps or recesses could be provided within one and the same trace 4 of any of the portions Pl, P2.

[0059] The layer sandwiched between the two parts of the insulating layer structure 3 will typically also comprise structures like traces and pads, as the part of the electrically conductive layer structure 2 at the top surface of the stack 1.

[0060] As better shown in Fig. 6, each trace 4 has a base 6 in contact with the common layer 5, an upper extremity 7 opposite to said base 6 and two lateral walls 8 connecting the base 6 and the upper extremity 7.

[0061] The base 6 need not be a continuous plane but could also have at least one recess in the direction of the center of the trace 4, and / or might have at least one protrusion penetrating into the supporting layer. The supporting layer, in particular the common layer 5, could be designed to at least partially protruding in possible recesses in the base 6 of the trace 4, filling the recess with its own common layer material.

[0062] The upper extremity 7 of the trace 4 could be arranged in parallel to the base 6. Other possible embodiments of the upper extremity 7 include upper extremities 7 inclined against the base 6, with roof-like shape, with indentations or continuous or consecutive grooves, step-like design 24 on one or both sides of the trace 4, defining concave recesses in the upper transition section of the trace 4 or any other structures needed for special purposes. Each trace 4 is elevating above the common layer 5. The common layer 5 comprises preferred a material different from the material of the traces 4, in particular electrically insulating material, more in particular organic polymeric material.

[0063] The base 6 of each trace 4 is connected to the respective two lateral walls 8 at its opposed extremities, each one forming a base edge 9. Preferred, the base 6 forms a sharp edge transition to at least one of the adjacent side walls 8, most preferred to both adjacent side walls 8, although at least one rounded edge structure, preferably on the side opposite to the nearest adjacent trace 4.

[0064] At least the side wall 8 facing the adjacent trace 4 has an overall inclination (a) of less than 90° relative to the base 6. Overall inclination means the inclination when drawing a straight line from the base edge 9 to the upper transition area from the side wall 8 to the upper extremity. Between said end points, the side walls 8 may deviate from said straight line or more times. As the base 6 is essentially parallel to the plane of the common layer 5 and the overall plane of the stack 1, the side wall 8 has essentially the same inclination (a) to the common layer 5 and the whole stack 1. Preferred, the inclination (a) is in the range between 50° and 85°, preferred but not necessarily for both side walls 8 of one and the same trace 4. Most preferred is a range for the inclination (a) between 75° and 85°. Moreover, the inclination (a) can be different for the two nearest adjacent traces 4, possibly different for all side walls 8 of said traces 4. The exact value of the inclination (a) may be changing one or more times along the longitudinal extension of the trace 4, with sloped or sharp transitions between the sections with different inclination. These transitions sections also may have a non-shape transition between the inclinations, for example when at least one parameter for working out the gap between two traces 4 was changed.

[0065] The distance D between the base edges 9 of the two adjacent traces 4 at their nearest position is below 10pm, and can be greater at other locations, if necessary or in deliberate manner, bringing the advantage of greater flexibility of the design.

[0066] Each of the traces 4 advantageously shows a rounded lateral transition area 10 between each of the said two lateral walls 8 and the upper extremity 7, as shown for example in Fig. 6. Other than that, also sharp edge transition areas could be provided between the side wall 8 and the upper extremity 7, as shown in Fig. 7 for another embodiment of a portion Pl, P2. As shown in Fig. 8, upper arrangement, all kinds of transition design could also be provided in one and the same trace 4.

[0067] Preferably, the rounded lateral transition area 10 has convex shape. Additionally and / or alternatively, the rounded lateral transition area 10 can also have concave shape. Each of the two lateral walls 8, however, on each position along the length of the trace 4, extends preferably linearly from the upper extremity 7, in particular from the rounded lateral transition area 10, to the base edge 9.

[0068] Preferred, at least one of the traces 4 comprises a cross section area in the range between 1 pm2 to 120 pm2, in particular in the range between 4 pm2 to 35 pm2. The overall aspect ratios of the traces 4 and the arrangement of adjacent traces 4 are for the upper extremity plateau to the base width of 1:1,5, for the base width to the trace thickness of 5:1, preferred 2:1, or most preferred 1:1, at minimum, and for the base width to the distance between the traces 4 of 5:1, preferred 2:1, or most preferred 1:1, at minimum. The maximum thickness of the copper traces 4 is dependent on the thickness of the copper layer when provided by a lamination process or when provided by an electrochemical plating process or by any non-electrical process like chemical or physical deposition. The base 6 of at least one of said two traces 4 has a width smaller than 20 pm, in particular smaller than 10 pm, most preferably smaller than 6 pm. Alternatively the width is in the range between 20-50 pm.

[0069] As shown in Fig. 7, the adjacent traces 4 could have different shape and cross section. Alternatively to the rounded transition areas 10, preferably through the proper arrangement of the parameters of the removal process, the side walls 8 and the upper extremity 7 could also form sharp upper edges 11. Preferred is further an arrangement of portions Pl, P2, wherein at least one of the two adjacent traces 4 has a thickness in the range between 1 pm to 20 pm, in particular with the ratio of the thickness difference being in the range between 80% and 120%. Preferably, the area ratio between adjacent traces 4 may be in the range between 50-100%

[0070] Referring again to Fig. 1, a further embodiment of the component carrier according to the invention comprises a stack 1 where more than two portions Pl, P2, for example more than two traces 4, are provided running along and possible parallel to each other over great lengths, wherein each distance between the two adjacent base edges 9 of every two adjacent traces 4 is below 10pm. For all embodiments with arbitrary number of traces 4 it is preferred that the ratio between the distance of two adjacent base edges 9 and the thickness of the trace 4 is less than 1, in particular less than 0,5. Alternatively, it is in the range between 1 and 5.

[0071] Alternatively, for all embodiments of the component carrier according to the invention, the outside contour of at least one of the traces 4 above the base 6 and elevating above the base 6 and the common layer 5 is free of edges. This may include half-circular / half elliptical shape in the cross section. Further, it is of advantage if all traces 4, in particular their lateral walls 8, have a roughness parameter Ra smaller than 15 pm. In particular, Ra is smaller than 5pm, most preferred even smaller than 2pm. Alternatively, Ra is in the range between 15-30pm.

[0072] As shown in all three alternatives depicted in Fig. 8, an electrically insulating material 12 could be placed in the gap between at least two adjacent traces 4 or if necessary any possible holes 26 or grooves 23 (see Fig. 8, bottom arrangement) or step-like recesses 24 defined by or in portions Pl, P2. Grooves 23 in the upper section of the traces 4 could also kept free from any fillers 12 (see Fig. 8, upper arrangement). Preferably, the gap is totally filled. Alternatively, the gap comprising voids filled with fluid, for example, gas (air), or liquid (water).

[0073] This insulating material 12 for filling the gaps between the traces 4 can be different from the material for the common layer 5, although the choice of the same material for both is possible. The gap-filling insulating material 12 can comprise embedded fillers. Also on any outer layer any gaps will preferably be filled using any solder resist (also non-conductive, insulating materials as described here), as no lines are exposed at any layer. Preferably the fillers may have round shapes like spheres. Further preferably, the fillers may have a diameter smaller than 1pm, more preferably smaller than 500nm. The filler material may be made of organic material such as organic polymers, or of inorganic material such as ceramic or glass or glass sphere free materials, or any nano sized particle, like flame retardants or stabilizers. Moreover the filler may be fluid or solid, if solid they may be porous.

[0074] Also depicted in Fig. 8, in the middle line, is an embodiment of a component carrier, wherein at least a portion of the common layer 5 located between two adjacent traces 4 has a tray-like shape 13, with rounded or sharp edges.

[0075] Fig. 9 shows another embodiment of portions Pl, P2 according to the present invention, with a component carrier the stack 1 of which comprises at least one further electrically conductive layer structure 14, said further electrically conductive layer structure 14 comprising two further traces 15 adjacent one to each other placed on a further common layer 16. Said further common layer 16 could be a further separate layer of the stack 1, with the advantage of free choice of material independent from all other materials or could also be an integral part of the electrically insulating structure 3.

[0076] Each further trace 15 again has a further base 17 in contact with the further common layer 16 and a further upper extremity 18 opposite to said further base 17. Each further trace 15 again has two further lateral walls 19 connecting the further base 17 and the further upper extremity 18. As in the embodiments described above, also here the further base 17 of each further trace 15 is connected to its respective two further lateral walls 19 at the opposite extremities, each forming a further base edge. Preferred, all geometric and other features of the further traces 15 are similar to the embodiments described above, in particular the inclination (P) of the further lateral side wall 19 facing an adjacent trace 15 relative to the further base 17 of less than 90°, preferred between 75° and 85°. And also a further distance between the closest further base edges of the two further adjacent traces 15 of below 10pm is preferred.

[0077] As clearly visible in Fig. 9, in a further embodiment of the invention, the further two traces 15 are located such that said further two traces 15 are shifted preferred in stack thickness direction compared to the two traces 4. Thus, the base 17 of the further traces 15 are facing the upper extremity 7 of the traces 4. Alternatively the further upper extremity 18 may fact the upper extremity 7. The traces 15 could be connected by vias or other conducting elements with the traces 4 or could be a completely independent circuitry.

[0078] Referring now to Fig. 10, a preferred embodiment of a method of producing a component carrier with portions Pl and P2 as explained with referral to particular embodiments comprising traces 4, pads 25, holes 26 or grooves will be explained.

[0079] The method comprises a step of providing a stack 1 comprising at least one electrically conductive layer structure 2 - which will later become a structured layer with pads and traces - and at least one electrically insulating layer structure 3. This can include or be followed by formation of vias 20 in a dielectric 21, which is part of the insulating layer structure 3. Next, a further electrically conducting material 22 for later forming the traces 4 is applied to result in an intermediate product shown in the middle of Fig. 10; alternatively or additionally, the traces can be formed on the electrically conductive layer structure 2. Between the electrically insulating layer structure 3 and the respective electrically conductive layer structure a seed layer may be provided e.g. a non-electrically deposited copper, which is typically use for seed layer formation, can also reach already the needed conductive material thickness, preferably made of the same as the electrically conducting material. It is also possible to use even other conductive and / or also organic insulating materials as the seed layer.

[0080] Thereafter, a material removal process is performed, preferred by applying electromagnetic waves to the electrically conducting material 22, which electromagnetic waves are preferred a laser beam, in particular laser pulses. The stack 1 is moved along a track according to the shape of the trace 4 to be worked out below the processing device, with the depth of the gap between adjacent traces 4 being a function of the process parameters. Also the inclination and shape of the side walls 8 of the traces 4 is defined by the process parameters, in particular the wavelength, energy and pulse width of the laser device.

[0081] For example, the following parameters have been found out as being of advantage:

[0082] Example 1:

[0083] L / S ~ 2pm, 343nm, 6kHz, 0,026W, 10-40 repetitions per line, with a speed of 0,5-5mm / s on pulse energy ~ 50nJ

[0084] Example 2:

[0085] L / S > 10pm, 355nm, 1000kHz, lOps pulse length with energy 0,25-0,5pJ and a speed of 1- 2m / s, with the optimum at 0,5pJ, 2m / s and 30 repetitions

[0086] At last, a component carrier as shown in the last line of Fig. 10 and also shown in Fig. 1 is achieved, with the desired structure of portions Pl, P2, for example of the traces 4. In this process, the fine line structures are directly ablated into for example a copper layer by laser. The seed layer is removed at the same time. Preferably, laser ablation is also used for forming the pads (like the ones around the laser vias). Even the traces can also have round shapes with different diameters.

[0087] Preferred, laser radiation is used in at least one of the following ranges: a green light of 480nm-580nm, a UV ultraviolet light of 280nm-410nm, a laser light source of 218nm-299nm, and a CO2 laser light of 750nm-2500nm. The choice of the laser parameters will determine the ablated width and the quality. Ultrashort pulsed lasers (fs or ps) with UV or green wavelengths are the most suitable ones for fine line. As depicted in Fig. 11, a laser-stop layer 28 could be provided at the position of the later bottom of the gap between adjacent traces 4. The material removal process for ablating the electrically conducting material, in particular copper, for creating the gaps between adjacent traces 4, proceeds from the top to the bottom of the gap, until the laser-stop layer 28 is reached. Here, the laser action is blocked by the laser stop layer 28.

[0088] The laser-stop layer 28 may comprise carbon-based material, in particular polyhydric carbon structures (poly alcohols or sugar like molecules), or silicon-based material, in particular (poly)silicate structures. The laser-stop layer 28 can be easily and selectively removed using polar solvents, for example water or an alcohol or a mixture thereof. A laser stop layer 28 of different material could possibly be removed in a subsequent step by an etching process after forming the traces 4. A further embodiment of the invention provides a laser-stop layer 28 that could be kept in the stack 1. The traces 4 or any other structure on and in the stack are not affected by said etching step that does not further amend the geometry of the formed copper traces 4. Alternatively, at least lOOnm of the exposed electrically conductive trace / structure is further removed.

[0089] The process can be also used to form fine lines in selective areas such as RDL layers for chips interconnections. The thickness of the traces 4 can be amended (reduced), too, by laser ablation. This results in lower electric resistance which simultaneously enhances the (electrical) signal transmission in case the traces 4 and / or pads 25 are connected to (active) components like chips.

[0090] List of reference numerals

[0091] Stack 27 Extended conductive structure

[0092] Electrically conductive layer 28 Easer-stop layer structure (a) Inclination of side wall

[0093] Electrically insulating layer (P) Inclination of further side wall structure Pl Portion of electrically conductive layer

[0094] Trace structure

[0095] Common layer P2 Portion of electrically conductive layer

[0096] Base structure

[0097] Upper Extremity P3 Further portion of further electrically

[0098] Side wall conductive layer structure

[0099] Base edge P4 Further portion of further electrically

[0100] Rounded lateral transition area conductive layer structure

[0101] Upper edge

[0102] Electrically insulating material Tray-like shaped gap bottom Further electrically conductive structure

[0103] Further trace

[0104] Further common layer

[0105] Further base

[0106] Further upper extremity

[0107] Further side wall

[0108] Via

[0109] Dielectric

[0110] Seed layer

[0111] Groove

[0112] Step-like transition section

[0113] Connecting pad

[0114] Degassing hole

Claims

C l a i m s1. A component carrier comprising: a stack (1) comprising at least one electrically conductive layer structure (2) and at least one electrically insulating layer structure (3), said at least one electrically conductive layer structure (2) comprising two portions (Pl, P2) adjacent one to each other placed on a common layer (5), each portion (Pl, P2) having a base (6) in contact with the common layer (5), an upper extremity (7) opposite to said base (6) and at least one lateral wall(8) connecting the base (6) and the upper extremity (7), wherein the base (6) of each portion (Pl, P2) is connected to the at least one lateral wall (8), thereby forming a base edge (9), the side wall (8) faces the adjacent portion (Pl, P2) and has an inclination (a) relative to the base (6) of less than 90°, and wherein a distance between the base edges (9) of the two adjacent portions (Pl, P2) is below 10pm.

2. A component carrier according to claim 1, wherein there is a rounded lateral transition area (10) between the at least one lateral wall (8) and the upper extremity (7) of the portion (Pl, P2).

3. A component carrier according to claim 1 or 2, wherein the at least one lateral wall (8) on each position along its length extends linearly or in curved shape from the upper extremity (7), in particular from the rounded lateral transition area (10), to the base edge (9).

4. A component carrier according to any one of claims 1 to 3, wherein the two portions (Pl, P2) comprise two traces (4) adjacent one to each other.

5. A component carrier according to claim 4, wherein at least one of said traces (4) comprises the base (6) in contact with the common layer (5), the upper extremity (7) opposite to said base (6) and two lateral walls (8) connecting the base (6) and the upper extremity (7).

6. A component carrier according to claim 5, wherein the base (6) of at least one of said two traces (4) has a width smaller than 20 pm, in particular smaller than 10 pm, most preferably smaller than 6 pm.

7. A component carrier according to any one of claims 5 or 6, wherein more than two traces (4) are provided along each other, wherein a distance between the closest base edges (9) of two adjacent traces (4) is below 10pm.

8. A component carrier according to any one of claims 5 to 7, wherein at least one of the traces (4) comprises a cross section area in the range between 1 pm2to 120 pm2, in particular in the range between 4 pm2to 35 pm2.

9. A component carrier according to any one of claims 1 to 8, wherein the ratio between the distance of two adjacent base edges (9) and the portion (Pl, P2) thickness is less than 1, in particular less than 0,5.

10. A component carrier according to any one of claims 1 to 9, wherein the side wall (8) facing the adjacent portion (Pl, P2) has an inclination (a) relative to the base (6) in a range of 75° to 85°.

11. A component carrier according to any one of claims 1 to 10, wherein the base (6) forms a sharp edge transition to the adjacent side wall (8).

12. A component carrier according to any one of claims 1 to 11, wherein the outside contour of at least one of the portions (Pl, P2) above the base (6) and elevating above the base (6) is free of sharp edges.

13. A component carrier according to any one of claims 1 to 12, wherein all portions (Pl, P2), in particular the lateral walls (8), have a roughness parameter Ra smaller than 15 pm, in particular smaller than 5pm, more in particular smaller than 2pm.

14. A component carrier according to any one of claims 1 to 13, wherein the common layer (5) comprises a material different from the material of the portions (Pl, P2), in particular electrically insulating material, more in particular organic polymeric material.

15. A component carrier according to any one of claims 1 to 14, wherein an electrically insulating material (12) is placed in the gap between at least two adjacent portions (Pl, P2).

16. A component carrier according to claim 15, wherein the electrically insulating material (12) comprises embedded fillers.

17. A component carrier according to any one of claims 1 to claim 15, wherein a portion of the common layer (5) located between two adjacent portions (Pl, P2) has a traylike shape.

18. A component carrier according to any one of claims 1 to claim 17, wherein the component carrier further comprises: a further electrically conductive layer structure (14), said further electrically conductive layer structure comprising two further portions (P3, P4) adjacent one to each other placed on a further common layer (16), each further portion having a further base (17) in contact with the further common layer (16) and a further upper extremity (18) opposite to said further base (17) and at least one further lateral wall(19) connecting the further base (17) and the further upper extremity (18), wherein the further base (17) of each further portion (P3, P4) is connected to its at least one further lateral wall (19) at the extremity (18), each forming a further base edge, the further lateral side wall (19) facing an adjacent portion (P3, P4) having an inclination (P) relative to the further base (17) of less than 90°, and wherein a further distance between the closest further base edges of the two further adjacent portions (P3, P4) is below 10pm.

19. A component carrier according to claim 18, wherein the further two portions (P3, P4) are located such that further two portions (P3, P4) are shifted in stack thickness direction compared to the two portions (Pl, P2).

20. A component carrier according to any of claims 1 to 19, wherein at least the bottom of the gap between adjacent portions (Pl, P2) is provided with or comprises a laserstop layer (27).

21. A component carrier according to any of claims 1 to 20, wherein at least one of the two portions (Pl, P2) defines a connecting pad (25).

22. A component carrier according to any of claims 1 to 3 or 10 to 21, wherein the two portions (Pl, P2) are connected one to each other, in particular defining two opposed sides of a hole (26) or groove.

23. A method of producing a component carrier according to any one of claims 1 to claim 22, the method comprising: providing a stack (1) comprising at least one electrically conductive layer structure (2) and at least one electrically insulating layer structure (3), thereafter performing a material removal process, wherein the material removal process is applied to the at least one electrically conductive layer structure (2).

24. A method according to claim 23, wherein the material removal process comprises applying electromagnetic waves, in particular a laser beam.

25. A method according to claim 24, wherein the laser beam comprises a wavelength range of at least one of: a green light of 480nm-580nm, a UV ultraviolet light of 280nm-410nm, a laser light source of 218nm-299nm, a CO2 laser light of 750nm-2500nm.

26. A method according to any of claims 24 or 25, the method comprising providing a laser-stop layer (27) at the position of the later bottom (13) of the gap between adjacent portions (Pl, P2) and preferred removing said laser-stop layer (27) after the formation of the portions (Pl, P2) by an etching process.

27. A method of producing a component carrier according to any one of claims 23 to 26, wherein the material removal process is free from applying a mask.

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