Quantum computing arrangement, quantum computing system comprising a plurality of said quantum computing arrangements and method of implementing a quantum error correction code on said quantum computing arrangement or system

Abstract

The present invention is related to a quantum computing arrangement comprising a plurality of qubits, to a quantum computing system comprising a plurality of said quantum computing arrangements, to a method of implementing, on a quantum computing system, a quantum error correction code, said quantum computing system comprising the quantum computing arrangement, and to the use of a quantum computing system or a quantum computing arrangement for implementing a quantum error correction code.

Description

[0001] Quantum computing arrangement, Quantum computing system comprising a plurality of said quantum computing arrangements and Method of implementing a quantum error correction code on said quantum computing arrangement or system

[0002] The present invention relates to the field of quantum computing, and especially to a quantum computing arrangement comprising a plurality of qubits, and to a quantum computing system comprising a plurality of said quantum computing arrangements. Furthermore, the invention relates to a method of implementing, on a quantum computing system, a quantum error correction code, in particular a sparse quantum error correction code, even more particular, a quantum low density parity-check code, said quantum computing system comprising the quantum computing arrangement according to the invention. Furthermore, the invention relates to the use of a quantum computing system or a quantum computing arrangement for implementing a quantum error correction code, in particular a sparse quantum error correction code, more in particular a quantum low density parity-check code.

[0003] The implementation of quantum algorithms on a quantum processor generally relies on the ability to perform two-qubit gates between any two pairs of qubits of the quantum processor. In practice, constructing such a processor is often impractical or even impossible. This problem is especially daunting for qubits of solid-state platforms, like superconducting qubits or quantum dots. Until recently, on these platforms two-qubit gates were only possible between qubits that are adjacent in space. Prominent examples of such quantum processors are Heavy Hex processors such as IBM Eagle and Falcon.

[0004] An implementation of a two-qubit gate between qubits that are distant in space generally requires qubit routing. That is, a sequence of SWAP operations is applied between adjacent qubits to thereby move the qubit states of the two distant qubits to two qubits that are adjacent in space. Then, the two-qubit gate is performed between the adjacent qubits.

[0005] While qubit routing works well in theory, the resulting SWAP gate overhead may in practice hinder the efficient implementation of the quantum algorithm on the quantum processor thereby degrading the performance of the quantum algorithm and potentially reducing the algorithm fidelity. This problem is especially daunting for sparse quantum error correction codes. These codes, and in particular the quantum low density parity-check (QLDPC) codes require long range couplings of qubits arranged in two or three dimensions. When these codes are implemented on the current available quantum processors, the resulting SWAP gate overhead makes the implementation impractical. Recently, several qubits’ arrangements have been proposed wherein a plurality of qubits is connectable to a resonator extending along a path thereby creating connectivity between all qubits of the plurality, also referred to as an all-to-all connectivity between qubits of an arrangement of qubits. In C. Song et al, PRL 119, 180511 , 2017, ten super-conducting qubits (transmons) are arranged at the antinodes of a bus resonator. When a pair of the qubits is tuned into resonance with the bus, a two-qubit gate may be realized between said pair of qubits without the need of qubit routing. Thus, the bus resonator creates a connectivity between all ten qubits.

[0006] One problem of using a resonator for creating connectivity of the qubits is that the total number of qubits that can be coupled to the resonator is limited thereby preventing scalability. To overcome this problem, several solutions are known in the art. In WO2023041833A1 , a plurality of linear resonators, each extending along a path in the same first direction and pairs of resonators being spaced apart in a second direction, is disclosed. Each of the resonators is connectable with a plurality of qubits along the path. Thereby, connectivity between all qubits connectable to the same resonator is created, resulting in an all-to-all connectivity of the qubits. Furthermore, pairs of adjacent resonators are coupled by a chain of a tunable coupler, a qubit and another tunable coupler. Thereby, qubit states of two qubits on two adjacent resonators can be transferred to connected qubits by two SWAP or MOVE operations. To perform operations on the qubits, a first arbitrary qubit state is prepared in one of the qubits. The first state is transferred from the qubit into the resonator via the tunable coupler coupling the qubit to the resonator. One may call this a Move operation since the state of the qubit is moved to the resonator. Once the first state has been transferred into the resonator, two qubit gate operations, such as a conditional phase gate, can be performed between the resonator and one or more of the other qubits by manipulating the tunable couplers between the resonator and other qubits. In this way, the resonator is acting as an information storage component, rather than simply as an information bus as is commonly the case. Measurement can be performed by transferring the state of the resonator back to the central qubit, or any qubit whose state can be measured. This arrangement therefore enables any of the qubits to be coupled with any of the other qubits via the resonator and enables all-to-all coupling by swapping or moving the state of each qubit into the resonator sequentially. For applications and algorithms in which many-to-many couplings are required, this qubit arrangement significantly reduces the number of two qubit gate operations that must be performed compared to other qubit arrangements. In S. Hazara et al, Phys. Rev. Appl. 16, 024018, 2021 , several qubits are arranged in the vicinity of a ring resonator. When a pair of qubits is coupled to the resonator, a two-qubit gate may be realized between the pair. This arrangement provides good qubit addressability and negligible qubit crosstalk. Several rings may be coupled together to form a larger platform thereby allowing scalability.

[0007] While these solutions are promising approaches for designing quantum computing arrangements with an improved connectivity, many quantum computing applications, in particular quantum error correction codes, require even further improved connectivity and / or density.

[0008] In view of these problems in the prior art, it is therefore the object of the present invention to provide a quantum computing arrangement with an improved connectivity between qubits and to provide a method for implementing quantum error correction on such a quantum computing arrangement.

[0009] According to a first aspect of the present invention, this objective is attained with a quantum computing arrangement comprising a plurality of qubits, a first coupling structure extending along a first path and being configured to couple to qubits of a first plurality of said qubits in the vicinity of said first path thereby creating a connectivity between any qubits of said first plurality, a second coupling structure extending along a second path and being configured to couple to qubits of a second plurality of said qubits in the vicinity of said second path thereby creating a connectivity between any qubits of said second plurality, wherein the arrangement comprises a connectivity of qubits for a first implementation of a two-qubit gate between a first qubit which is in said first but not in said second plurality and a second qubit which is in said second but not in said first plurality, and said quantum computing arrangement further comprises a shortcut coupling structure extending along a shortcut path between the first qubit and the second qubit and being configured to couple to the first qubit and the second qubit thereby creating a connectivity between the first qubit and the second qubit for a second implementation of the two-qubit gate via the shortcut coupling structure, and wherein said first implementation is without use of the shortcut coupling structure.

[0010] The qubits of the first and second plurality are computational qubits (e.g., data qubits and / or syndrome qubits), in particular for use in a quantum information application.

[0011] The first and second pluralities are different from each other. In one example, there is no qubit which is a member of both, the first and the second, pluralities. In this case, one may say that the first and second pluralities do not overlap. In another example, there is at least one qubit which is a member of both, the first and the second pluralities. In this case, one may say that the first and second pluralities overlap. The first, second and shortcut coupling structures are three distinct coupling structures. The first path is different from the second path.

[0012] The first (second) coupling structure is configured to couple to selected ones among the qubits of the first (second) plurality in the vicinity of said first (second) path. In a preferred embodiment, the first (second) coupling structure is configured to couple each qubit of the first (second) plurality in the vicinity of said first (second) path. I.e., there may be no further computational qubit between the coupling structure and the connectable qubit of the first (second) plurality in one example.

[0013] The first coupling structure is configured to couple to a first plurality of said qubits in the vicinity of said first path so that by coupling any two qubits of said first plurality to said first coupling structure, a two-qubit gate may be implemented between the two qubits without the use of any other qubit or additional coupling element. Within the disclosure of the invention, one may also say that the first coupling structure provides for a nearest-neighbor connectivity between any two qubits of the first plurality. Furthermore, the first coupling structure creates an all-to-all connectivity between the qubits of the first plurality of qubits. The second coupling structure is configured to couple to a second plurality of said qubits in the vicinity of said second path so that by coupling any two qubits of said second plurality to said second coupling structure, a two-qubit gate may be implemented between the two qubits without the use of any other qubit or additional coupling element. Thus, any two qubits of the second plurality have a nearest neighbor connectivity. Furthermore, the second coupling structure creates an all-to-all connectivity between the qubits of the second plurality. In general, the coupled qubits of the first (second) plurality may comprise pairs of qubits which are not nearest neighbors in space. For example, the first (second) plurality may comprise at least four, in particular at least six, even more particular at least eight qubits, and at least one pair of qubits of the plurality is such that the two qubits of the pair are not nearest neighbors in space, but there are other qubits, in particular other (computational) qubits of the plurality, arranged between the two qubits of said pair. Therefore, the first and second coupling structures may also provide, in certain examples, a connectivity between qubits which are next-to-nearest neighbors or beyond in space. Therefore, the connectivity of the arrangement according to the present invention is beyond the connectivity provided by state of the art superconducting quantum computing architectures achieved by direct coupling, tunable couplers or bus resonators connecting spatially neighboring qubits. Obviously, the first and second coupling structures create a connectivity between any two qubits of their respective pluralities. i The arrangement comprises connectivity of the qubits for the first implementation of the two- qubit gate without use of the shortcut coupling structure. In one example, the first implementation of the two-qubit gate may comprise moving a state of a qubit (i.e. , application of a MOVE-operation) of the first and / or second qubits via the first and / or second coupling structures. In another example, the first implementation may comprise use of a further qubit of the plurality. In one example where the first and second pluralities overlap, the further qubit may be a qubit of the overlap. In yet another example, the first implementation may comprise the use of a further coupling structure which is different from the first, second and shortcut coupling structures.

[0014] The second implementation makes use of a connectivity between the first qubit of the first plurality and the second qubit of the second plurality provided by the shortcut coupling structure. In particular, the first and second qubits are not nearest neighbors in space but are spatially next-to-nearest neighbors or beyond. Le., the shortcut coupling structure creates a nearest-neighbor connectivity between qubits which are spatially next-to-nearest neighbors or beyond.

[0015] The shortcut coupling structure allows for long-range interaction independent of the physical location of the qubits thereby reducing the gate overhead of the conventional quantum computing arrangements. In this way, the circuit depth for executing a quantum algorithm on the quantum computing arrangement may be reduced. In this way, the quantum computing arrangement according to the first aspect of the invention has an improved operability. In one example, the two-qubit gate between the first qubit and the second qubit may be performed according to the second implementation by use of the shortcut coupling structure. At the same time, two further qubits of the first (second) plurality may be coupled to the first (second) coupling structure to thereby implement a two-qubit gate between these further qubits. This parallelism may not be possible for certain quantum computing arrangements of the prior art without the shortcut coupling structure.

[0016] In the present invention, the qubits are not limited to a special kind. Preferably, all qubits are of the same kind, but the invention is not limited to this. The qubits may be superconducting qubits, in particular transmons, quantum dots, ions, but the invention is not limited to this. The qubits are arranged in space so that they are spaced apart. Thereby, there is a distance between each pair of qubits. The coupling structures of the present invention are not limited as long as they may extend along a path. Their extension may be at least the distance of two neighboring qubits. The coupling structures may be quasi one-dimensional structures in one embodiment. At least one, and preferably all coupling structures, may support at least one linear or nonlinear mode for coupling with the qubits. In one example, the linear or nonlinear mode may be a bosonic mode, in particular a microwave photonic mode.

[0017] The relative arrangement between the coupling structures and the qubits is such that the qubits are selectively connectable to the respective coupling structure, for example by tuning the qubits in and out of resonance with the at least one mode of the coupling structure. In one embodiment, a two-qubit gate may be implemented by simultaneous coupling of two qubits with the same coupling structure. In another embodiment where the coupling structure supports a linear or nonlinear mode, a two-qubit gate may be implemented by moving the state of one qubit to the mode of the coupling structure, implementing a two-qubit gate, such as CZ gates or others, by coupling the other qubit with the coupling structure and then moving the state of the mode of the coupling structure back to the one qubit or applying it to the state of the mode in the coupling structure. In general, the quantum computing arrangement may comprise means for realizing the first and / or second implementation of the two-qubit gate.

[0018] All coupling structures may have similar or identical properties, in particular they may support the same type of linear or nonlinear mode, preferably with similar frequencies, etc.

[0019] In some examples, at least some of the qubits of the arrangement, potentially including qubits of the first and second pluralities, may comprise connectivity, in particular between spatially nearest-neighbor qubits, e.g., by direct coupling or capacitive couplers or tunable couplers. Some of the qubits with nearest-neighbor connectivity may not be connectable to a coupling structure. In addition, some of the qubits may have at least two nearest-neighbor connectivity with other qubits of the arrangement. Then, the connectivity of the arrangement may be such that it is adapted for implementing quantum error correction, in particular quantum Low Density Parity Check Codes, and may be in particular adapted for implementing gates for realizing stabilizer operators of QEC codes.

[0020] In one example, the first and second paths may extend at least partially in the same direction. In one example, the first and second paths may extend completely in the same direction. E.g., the first and second paths may be parallel. In one example, the first and second paths may not be parallel but at an angle to each other, however they do not cross each other in the arrangement. In one example, the first and second paths may extend along straight lines in a first direction and be spaced apart from each other in a second direction orthogonal to the first and direction.

[0021] The first and second plurality of qubits may be separate pluralities, i.e., the pluralities do not overlap, in one example. That is, there is no qubit which is simultaneously a member of the first plurality and a member of the second plurality. In another example, the first and second pluralities may be such that there is at least one qubit which is simultaneously a qubit of the first plurality and a qubit of the second plurality, i.e., the pluralities overlap. Each plurality comprises at least two, and preferably more qubits, for example up to 10, 20, or 30 qubits. In particular, there is at least one pair, and in particular there is a plurality of pairs of qubits of the plurality which are not nearest neighbors in space. In practice, the number of qubits in each plurality is limited by the type of coupling structure. Namely, realistic coupling structures allow for a coupling to only a limited number of qubits.

[0022] As an example, a case of N identical transmon qubits coupled capacitively to one transmon (central qubit) in a star-shape topology (all-to one coupling) is considered. In order to get an estimation of the maximal number of coupled qubits, the capacitive energy Hcof the circuit is calculated and terms which correspond to the energy stored in the self-capacitance of the qubits and interaction energy are compared. Following the approach presented in G. Wenden and V. S. Shumeiker, “Superconducting Quantum Circuits, Qubits and Computing”, p 28. https: / / arxiv.org / abs / cond-mat / 0508729 and A. Blais et.al ..Circuit Quantum Electrodynamics”, column vector for the charges at the islands of the qubits [Qc, Q1, Q2••• , <2W], and [C] is a capacitance matrix. where Csis the self-capacitance of the central qubit, = C2... = CN= C are self-capacitances of the coupled identical qubits, Cois the coupling capacitance. After calculating the inverse of the capacitance matrix one finds that the interaction term V between the central qubit and any For the numerical calculations typical circuit parameters from R Barends, et.al “Diabatic Gates for Frequency-Tunable Superconducting Qubits”, Phys. Rev. Lett. 123, 210501 , 2019 are considered for the case of one qubit coupled to the central one. Self-capacitances of the qubits is Cs= Ct= 80 fF, coupling capacitance Co= 0.45 fF, and qubit frequency is 6.16 GHz, which correspond to the interaction term V =17 MHz. Coupling more qubits to the central one gives rise to a rescaling of the self and interaction terms in the capacitive energy. One finds, that in order to achieve the same coupling strength, one can couple only a limited number of qubits to the central one.

[0023] N ~ 6 in case of equal self-capacitance Cs= Ct... = CN= C. However, one can couple more qubits if self-capacitance of the central qubit is reduced: N « 24 for Cs= 0.9 C, and up to N « 170 if Csis reduced to a capacitance of the Josephson junction itself (few fF). However, this is not achievable in practice, because adding coupling capacitance increases the size of the qubit island, and hence it’s self-capacitance to ground.

[0024] In an example where the first implementation comprises moving a state of a qubit of the first and / or second qubits via the first and / or second coupling structures by an application of a MOVE operation by moving the qubit state of the first and / or second qubits in the first and / or second coupling structures, the quantum computing arrangement may be such that it allows for the implementation of the move operation. I.e., the quantum computing arrangement may comprise means for implementing a qubit move operation and / or a qubit routing. In particular, the quantum computing arrangement may comprise means for applying a MOVE operation between the first and / or second qubits and the first and / or second coupling structures.

[0025] The quantum computing arrangement may comprise means for applying quantum gates.

[0026] In one embodiment, the shortcut coupling structure may be configured to provide a connectivity between more than two qubits of the plurality of qubits, in particular between the first qubit of the first plurality and at least two of the qubits of the second plurality of said qubits or between the second qubit of the second plurality and at least two of the qubits of the first plurality of said qubits. In this way, the shortcut coupling structure increases the connectivity of the qubits and may further reduce the number of gates, for example the number of SWAP gates required for the implementation of a quantum algorithm by the quantum computing arrangement thereby reducing the circuit depth. In addition, the shortcut coupling structure may enhance the possibility for the parallel implementation of two-qubit gates. I.e., according to this embodiment, the gate overhead compared to conventional quantum computing arrangements may be further reduced. Even further, an all-to-all connectivity between more than two qubits may be provided by the shortcut coupling structure.

[0027] In another embodiment, said arrangement may further comprise one or more additional coupling structure(s), each additional coupling structure extending along its respective additional path and being configured to couple to a respective additional plurality of qubits in the vicinity of said additional path to thereby creating a connectivity between any qubits of said respective additional plurality of qubits. In particular, the additional coupling structure creates an all-to-all connectivity between the qubits of the respective additional plurality, and further creates a nearest-neighbor connectivity between any pair of qubits of the additional plurality. In one embodiment, none of the additional qubits is connectable to the shortcut coupling structure. In particular, the shortcut coupling structure may be configured to provide a connectivity between at least one qubit of one of the additional pluralities of qubits and at least one qubit of the first and / or second plurality of qubits. In this way, a quantum computing arrangement with many qubits may be provided which has an improved connectivity between the qubits compared to the prior art, thereby further improving the ability to perform two-qubit gates in parallel and reducing the gate overhead.

[0028] According to yet another embodiment of the present invention, at least one of said one additional coupling structures may be an intermediate coupling structure extending along a respective intermediate path which is at least partially arranged between said first and second paths, said intermediate coupling structure being configured to couple to an intermediate plurality of said qubits in the vicinity of said intermediate path thereby creating a connectivity between any qubits of said intermediate plurality of qubits, wherein the connectivity of the arrangement is in particular such that the first implementation of the two-qubit gate comprises a use of a qubit of said intermediate plurality and / or the intermediate coupling structure. In one embodiment, the intermediate path may be completely provided between the first and second paths. The intermediate plurality of qubits may be separate from the first and second pluralities. In one example, the intermediate plurality may comprise at least one qubit which is in the first or second plurality of qubits. The intermediate coupling structure creates an all-to-all connectivity between the qubits of the intermediate plurality and a nearest-neighbor connectivity between any two qubits of the intermediate plurality. This arrangement has an even further enhanced connectivity between qubits.

[0029] When the first implementation of the two-qubit gate comprises the use of a qubit of said intermediate plurality and / or the intermediate coupling structure, the first implementation may comprise use of said intermediate qubit (that is, the qubit state of the first and / or second qubit is swapped to the intermediate qubit) and / or the intermediate coupling structure (that is, the first implementation may comprise coupling of at least one qubit to the intermediate coupling structure).

[0030] In another embodiment of the present invention, at least one of said additional coupling structures may be an outer coupling structure. The outer coupling structure is such that it extends along an outer path for which no path portion is arranged between the first path and the second path.

[0031] In one example of the above embodiments, the arrangement may comprise at least two additional coupling structures, wherein said at least two additional coupling structures comprise at least said intermediate coupling structure, more than one of such intermediate coupling structures and / or at least one outer coupling structure.

[0032] In one embodiment, said shortcut coupling structure may be configured to or may be part of a set of shortcut coupling structures configured to allow for implementing a two-qubit gate between any two qubits of the plurality of qubits, in particular by using connectivity and qubit routing comprising at most six, preferably at most four, more preferably at most three and even more preferably two swaps. In this way an enhanced connectivity, e.g., for the implementation of qLDPC codes may be provided.

[0033] In one embodiment, the coupling structure mediates an interaction between any two qubits coupled with the coupling structure thereby implementing a two-qubit gate between the two qubits of the plurality so that the coupling structure operates as a bus. In this embodiment, no swap-gates may be required for implementation of any two-qubit gate. The coupling between the bus (coupling structure) and a qubit may be by use of a tunable coupler in one example. In another example, coupling of the qubits and the bus (coupling structure) may be such that one may apply quantum gates between multiple pairs of qubits coupled to the same bus, in parallel. In this case, there is no excitation transfer from the qubits to the coupling structure. The second implementation of the two-qubit gate may have shorter gate time than the first implementation for this embodiment.

[0034] In yet another embodiment, the shortcut coupling structure may be configured to create connectivity between the first qubit and at least one additional qubit of the plurality of additional qubits, in particular between the first qubit and at least one intermediate qubit of the plurality of intermediate qubits, and / or between the second qubit and at least one additional qubit of the plurality of additional qubits, in particular between the second qubit and at least one intermediate qubit of the plurality of intermediate qubits. This is yet another embodiment providing a favorable connectivity.

[0035] In one embodiment, there may be at least one qubit which is simultaneously a qubit of the first plurality and one of the plurality of intermediate qubits, and / or there is at least one qubit which is simultaneously a qubit of the second plurality and one of the plurality of intermediate qubits. Thus, the at least one qubit is connectable to the first and / or second coupling structure and the intermediate coupling structure. This further enhances the connectivity.

[0036] In one embodiment, the arrangement may comprise at least one additional ancillary qubit, preferably without a coupling to any coupling structure of the arrangement, wherein there is a connectivity between at least one qubit of the plurality of qubits and the ancillary qubit. This arrangement is preferable when the ancillary qubit is not for use as a logical qubit in a quantum computation. For example, when the quantum computing arrangement is used for the implementation of a quantum error correcting code, syndrome qubits for the storing of syndrome information may be required. In particular, the ancillary qubit may be used as a flag qubit. In one example, there is an ancillary qubit for at least one, and in particular for each stabilizer operator of the quantum error correction code. Thereby, fault-tolerant quantum error correction may be enabled. The use of flag qubits is explained, for example, in R. Chow et al., Quantum error correction with only two extra qubits, Phys. Rev. Lett., 2021 : 050502, 2018.

[0037] In one embodiment, at least one of the coupling structures may comprise a resonator or a waveguide. Preferably, each of the coupling structures may comprise a resonator or a waveguide. This embodiment is particularly suited for the case when the qubits are superconducting qubits. The resonator may be used as a bus in one example, and as mentioned above. In another example, the coupling structure may be used as a logical element, e.g.., by coupling the qubit to the resonator, the state of the qubits may be mapped into the resonator.

[0038] The shortcut coupling structure may be integrally formed in one example, i.e., it may comprise an integral resonator of waveguide in on example. In another example the shortcut coupling structure may comprise several separate parts (e.g., several resonators or waveguides in one example) which are coupled to each other either directly or via an additional qubit or via a coupler, in particular a tunable coupler, to thereby allow for creating the all-to-all connectivity between all qubits which are connectable to the shortcut coupling structure. In another embodiment, for at least one qubit, its coupling interaction with one of the coupling structures may be tunable, in particular by a tunable coupler of the quantum computing arrangement. That is, the quantum computing arrangement may comprise a tunable coupler which is connectable to the qubit and to the respective coupling structure. Preferably, the coupling interaction for every qubit with the respective coupling structure(s) is tunable, in particular by a tunable coupler of the quantum computing arrangement. In this case, the quantum computing arrangement comprises a tunable coupler for each qubit of the plurality. In one example, the tunable coupler may comprise a qubit which is not a computational qubit for realizing the coupling between one of the computational qubits and one of the coupling structures. In one example, the tunable coupler may comprise a transmon.

[0039] According to a second aspect of the present invention, there is provided a quantum computing system comprising a plurality of quantum computing arrangements, said quantum computing arrangements being according to anyone of the above, wherein at least two quantum computing arrangements of the plurality of quantum computing arrangements are connected to each other, in particular via a coupling structure. In this way, a scalable quantum computing system with an enhanced connectivity compared with the prior art is provided.

[0040] In one example, the connecting coupling structure, namely a link coupling structure, which connects at least two quantum computing arrangements may be connected with the coupling structures of at least two of the connected arrangements. Preferably, the link coupling structure may be connected with the at least one shortcut coupling structure of each of the two arrangements thereby forming a single coupling structure. In one embodiment, the link coupling structure connecting the at least two quantum computing arrangements may be a supplemental coupling structure which is not connected with any coupling structure of the at least two arrangements. The link coupling structure may extend at least partially along a connecting path between at least two of the arrangements. In one embodiment, the link coupling structure may extend along the connecting path between a first connection qubit of one of the pluralities of arrangements and a second connection qubit of another one of the plurality of arrangements so as to be connectable to the first and second connection qubits. Preferably, the first and second connection qubits are connectable to the at least one coupling structure of the respective arrangement other than the link coupling structure. The quantum computing arrangements may thus be seen as modules that are used for constructing a larger quantum computing system with an enhanced connectivity compared to the prior art.

[0041] In one embodiment wherein the quantum computing system comprises more than two quantum computing arrangements, there may be a plurality of coupling structures, each of the plurality of coupling structures connecting a pair of quantum computing arrangements. Each of the connecting coupling structures may either be connected with at least one coupling structure of each of the two arrangements which it connects thereby forming a single coupling structure or it may be a supplemental coupling structure which is not connected with a coupling structure of the two arrangements.

[0042] In one embodiment, the quantum computing system may comprise at least two arrangements of pluralities of qubits having different or the same number of qubits and having different or the same connectivity of qubits. In one embodiment, at least two, and preferably all arrangements may have the same number of qubits. Preferably, at least two, and preferably all arrangements have at least one of the following in common: number of qubits of the arrangements, connectivity, layout of the arrangement regarding position of the qubits in space. In one embodiment, all quantum computing arrangements of the quantum computing systems may be identical.

[0043] In the following, further preferred embodiments of the quantum computing arrangement according to the first aspect and the quantum computing system according to the second aspect are presented.

[0044] In a preferred embodiment, said first plurality of qubits has a third qubit which is located apart from the first qubit, said first path having a first path portion extending between the first qubit and the third qubit in a first direction, said shortcut path having a shortcut path portion between the first qubit and the second qubit which at least partially extends with a component of direction in a second direction which is transverse, e.g., orthogonal to said first direction. In a further preferred embodiment, said second plurality of qubits comprises a fourth qubit, said second path having a second path portion between the second qubit and the fourth qubit extending at least partially with a direction of components in a plane transverse, e.g., orthogonal to the shortcut direction and in particular at least partially extending with a component of direction in the first direction. In this context, as seen along the second direction, the intermediate path may extend at least partially between the first path and the second path.

[0045] In an envisaged embodiment, the first qubit and / or the second qubit is / are arranged at a boundary of a sub-arrangement comprising the first plurality and the second plurality of qubits and in particular also the plurality of intermediate qubits. In this context, the first coupling structure and / or the second coupling structure is / are mostly, in particular completely, located within said boundary and / or the shortcut coupling structure is at least partially, in particular mostly, even more particular completely, located outside said boundary. Further, it is envisaged that the shortcut coupling structure may at least partially surround said boundary.

[0046] In one embodiment, the arrangement may comprise two, three, four or more shortcut coupling structures. When the arrangement comprising the plurality of qubits defines a qubit boundary with an inside where the qubits are arranged and an outside where no qubits are arranged, at least one, and preferably all shortcut coupling structures extend along a path which is at least partially and preferably completely arranged outside the qubit boundary. In one example, the shortcut coupling structure at least partially surrounds the plurality of qubits. In another embodiment, the shortcut coupling structure completely surrounds the plurality of qubits. In one embodiment, where there may be a plurality of shortcut coupling structures, the shortcut coupling structures may be arranged outside the qubit boundary such that each qubit of the plurality arranged at the boundary is connectable with at least one shortcut coupling structure. In this way, an improved connectivity of the qubits with a simple layout may be obtained.

[0047] In a preferred embodiment at least one of the coupling structures may confine a bosonic mode, in particular, a microwave photonic mode, wherein creating the coupling between the qubits by the coupling structure comprises coupling of the qubits to the bosonic mode, and wherein the at least one coupling structure comprises in particular a resonator or a waveguide for confining the mode.

[0048] In an envisaged embodiment the qubits may be arranged in a two-dimensional array and in particular at least one, in particular all coupling structures may be arranged in the same plane as the two-dimensional array. In this context, the two-dimensional array may comprise an oblique lattice, a square lattice, a hexagonal lattice or a rectangular lattice.

[0049] It is envisaged that the qubits of the arrangement may be arranged on a first substrate as support structure. Other additional arrangements of a quantum computing system may be arranged on the same first substrate or on a second substrate different from the first substrate. In one embodiment, each arrangement of a quantum computing system having several quantum computing arrangements may be arranged on its own substrate which is separate from all other substrates.

[0050] In a specific embodiment, the two-dimensional array may comprise a rectangular or a square lattice with rows of qubits arranged in the first direction and columns of qubits arranged in the second direction, wherein the arrangement may comprise for at least one, and preferably for each set of qubits in adjacent rows a linear coupling structure extending in the first direction and creating connectivity between any qubits of the two adjacent rows, said linear coupling structure being arranged mostly, preferably, completely, inside the two-dimensional array, and wherein the shortcut path may at least partially surround the two-dimensional array. In one embodiment, the first and second direction may be orthogonal to each other. In particular, each row and column of qubits comprises at least three, in particular at least four, and even more particular more than four qubits.

[0051] In a preferred embodiment, for each set of qubits, a linear coupling structure extends in the first direction and creates connectivity between each qubit of the two adjacent rows.

[0052] In a preferred embodiment, for more than 60 %, preferably more than 80 %, in particular more than 90 % of the plurality of qubits of the arrangement which are coupled to a coupling structure a two-qubit gate may be implemented by involvement of at most three different coupling structures.

[0053] According to a third aspect of the present invention, there is provided a method of implementing, on a quantum computing system, a quantum error correction code, in particular a sparse quantum error correction code, even more particular a quantum low-density paritycheck code, said quantum error correction code being defined by a parity check matrix, said quantum computing system comprising a quantum computing arrangement according to anyone of the above, said method comprising:

[0054] - designating, among the qubits of the quantum computing arrangement, a plurality of data and syndrome qubits for the implementation of the quantum error correction code on the quantum computing system with a shortest quantum error correction cycle according to the parity check matrix;

[0055] - initializing each of the plurality of data and syndrome qubits in a predetermined initial state;

[0056] - executing the quantum error correction cycle on the quantum computing system, wherein the execution comprises an error detection step which comprises implementation of quantum gates on the data and syndrome qubits followed by a measurement of the state of the syndrome qubits to thereby obtain a plurality of syndrome bits associated with said cycle, the syndrome bits being indicative of an error, wherein the implementation of the quantum gate comprises implementation of a two-qubit gate in particular according to the second implementation by use of the shortcut coupling structure. The method according to the third aspect allows for an efficient implementation of quantum error correction (QEC) codes by use of the quantum computing arrangement according to the first aspect of the present invention. Sparse QEC codes such as the quantum Low-Density Parity-Check Codes are highly interesting as they require only low-weight parity checks and have a non-vanishing rate and relative minimum distance as the qubit count scales up. In Panteleev et a!., "Degenerate quantum LDPC codes with a good code performance", arXiv: 1904.02703, 2019, it is disclosed that it is possible to have good code performance using small, degenerate stabilizers so that qLDPC codes are preferable over other QEC codes. That is, a larger noise threshold and minimum distance are possible by using qLDPC codes when compared with bi-dimensional lattice-based stabilizer codes, such as standard surface codes. Up to now, the limited connectivity of super-conducting / semi-conducting quantum processing arrangements precluded the usage of efficient qLDPC codes. As the quantum computing arrangement used in the method of the third aspect of the present invention has an enhanced connectivity, an efficient implementation of the quantum error correction code, in particular of the qLDPC code is possible. In particular, the gate overhead may be significantly reduced by use of the shortcut coupling structure(s) for the implementation of two-qubit gates.

[0057] One major goal in coding theory is to provide optimal codes with the largest rate given a minimum distance or optimal codes with the largest minimum distance given a rate (see e.g., F.J. Freibert et al, “Optimal subcodes and optimum distance profiles of self-dual codes", Finite Fields Appl. Vol. 25, 146-164, 2014). In one example, the quantum error correction code implemented in the method according to the second aspect of the present invention may in particular be such that it has a suitable code minimum distance. Here, suitable means that the code with the lowest minimum distance that can produce the required performance is chosen.

[0058] According to the method of the second aspect of the present invention, syndrome and data qubits are designated among the plurality of qubits of the quantum computing arrangement in a way that allows for an efficient implementation of the quantum error correction code on the quantum computing system. For the implementation of the quantum error correction code, the quantum computing system may comprise means for implementing single-qubit gates on the qubits of the plurality and to perform measurements, in particular single-qubit measurements, and, in particular, in the computation basis, on the qubits. Two-qubit gates between the qubits of the plurality may be implemented by use of the coupling structures, and, potentially, but additional use of SWAP-gates or MOVE operations in certain embodiments, as explained above.

[0059] The data and syndrome qubits are designated in accordance with the parity check matrix of the quantum error correction code and by considering the connectivity of the qubits such that the quantum error correction code is implementable on the quantum computing system with a shortest quantum error correction cycle according to the parity check matrix. I.e., the syndrome and data qubits are designated such that the time required for the implementation of one quantum error correction cycle is minimal.

[0060] In one example, the data qubits are initialized such that they encode a predetermined logical qubit state. This may be achieved by preparing all data qubits in a known state. In one example, this may be achieved by preparing all data qubits in the IO> state, and by applying a sequence of quantum gates to the data qubits, in particular a sequence of single- and two-qubit gates. In a further example, all syndrome qubits may be initialized in the ground state.

[0061] The execution of the quantum error correction cycle comprises an error detection step which comprises an implementation of a quantum gate and a measurement of the states of the syndrome qubits. In general, a sequence of single- and two-qubit gates is applied to the data and syndrome qubits followed by a measurement of the state of the syndrome qubits, in particular in the computational basis. In one example where the quantum error correction code is a stabilizer code, the quantum error correction cycle may implement a measurement of the stabilizer operators. The quantum computing arrangement used in the method may have a connectivity which allows for an efficient implementation of the certain kinds of quantum error correction codes.

[0062] According to the method of the second aspect, the execution of the quantum error correction cycle comprises in particular the implementation of a two-qubit gate according to the second implementation by use of the shortcut coupling structure. In such an example, the connectivity of the quantum computing arrangement is used in an efficient way for the implementation of the quantum error correction code.

[0063] In one embodiment in which the arrangement comprises at least one additional ancillary qubit, in particular without a coupling to any coupling structure of the arrangement, and wherein there is a connectivity between at least one qubit of the plurality of qubits and the ancillary qubit, the ancillary qubit may be used as a flag qubit, and the execution of the quantum error correction cycle may comprise a measurement of the state of the flag qubit. This embodiment may be used for fault tolerant quantum error correction as known in the art.

[0064] According to another embodiment of the method, at least one of the shortcut coupling structures and / or the first, second and additional coupling structures may be configured to be used as a bus. In particular, each qubit of the plurality may be connectable with the bus by use of a tunable coupler in one example. In one example, the bus may be a resonator. The bus may support a plurality of coupling channels, e.g., a plurality of different bosonic modes, and different pairs of qubits may couple to different coupling channels. When two qubits couple to a coupling channel, an interaction may be mediated between the two qubits thereby implementing a two-qubit gate. This embodiment may enable parallel two-qubit gates between several different pairs of qubits, in particular up to 5 pairs, more particular up to 6 pairs, even more particular up to 10 pairs. Alternatively, at least one of the coupling structures may be used as a logical element, in which case the two-qubit gates may be performed by swapping / moving a qubit state with the state of the coupling structure, applying the two-qubit gate between the other qubit and the coupling structure. A result-readout via an additional readout qubit or a qubit of the plurality of qubits may be performed in one embodiment.

[0065] In yet another embodiment, the error correction step may comprise a parallel application of gates between a plurality of pairs of qubits, wherein at least one of said applications is in particular according to the second implementation by use of the shortcut coupling structure. The enhanced connectivity of the quantum computing system used for the implementation of the method enables an efficient implementation of these two-qubit gates, sometimes even in parallel. Thereby, the duration of the QEC cycle may be reduced.

[0066] In yet another embodiment of the method according to the second aspect of the invention, the method may further comprise use of the syndrome bits in a decoding algorithm to identify the error, and wherein the method may further comprise an application of a quantum error correction operation to the data qubits, wherein application of said quantum error correction operation comprises an application of quantum gates to the data qubits which are affected by an error, the quantum gate depending on said error. The quantum error correction cycle and the quantum error correction operation may be consecutively implemented. In this way, the method according to the second aspect may implement active quantum error correction. In one example, the quantum error correction operation may comprise an application of a sequence of quantum gates to the data qubits. The enhanced connectivity of the quantum computing arrangement allows for an efficient implementation of the quantum error correction operation. The decoding algorithm may be implemented on a classical computer.

[0067] In one example of the above embodiment, said quantum computing system may comprise at least two quantum computing arrangements according to anyone of the above and said method may further comprise an implementation of a logical qubit gate, wherein said implementation comprises an implementation of a single-qubit gate and / or a two-qubit gate on at least one of the data qubits using the shortcut coupling structure connecting two or more separate quantum computing arrangements. In another embodiment of the method according to the second aspect of the present invention, the method may further comprise repeatedly executing the quantum error correction cycle to thereby obtain a plurality of syndrome bits in each cycle, post-processing the plurality of syndrome bits of each cycle, storing the syndrome bits on a memory, and obtaining error information indicative of an error associated with the respective cycle using the syndrome bits of this cycle and of the previous cycles. In this embodiment, an error correction step may be only applied once, when all cycles are executed, and not after every execution of the QEC cycle as it is the case for active error correction. This approach is also called passive error correction, and may be useful when the quantum computing system is used as a quantum memory. Passive quantum error correction may be efficiently executed by the quantum computing system due to its enhanced connectivity of the qubits. Post-processing may be executed by a classical computer.

[0068] In one example of the above embodiment, the method may further comprise an implementation of a logical operation by use of classical postprocessing of the syndrome data. See, e.g., as a reference for implementing logical operations D. Horsman et al, “Surface code quantum computation by lattice surgery”, New J. Phys. 14 123011 , 2023 in particular Section 3. Furthermore, A. Cowtan, “Towards surgery with good quantum LDPC codes”, arXiv:2309.16406 describes the process for qLDPC codes.

[0069] In yet another example, the method may further comprise, during at least one quantum error correction cycle, performing a dynamical decoupling sequence on idling qubits to thereby reduce decoherence. In this way, errors in the execution of the QEC cycle may be suppressed.

[0070] In one embodiment of the method, one or more logical qubits and / or memories are created from the plurality of qubits by encoding according to the quantum error correction code, wherein in particular some of the qubits of a respective logical qubit or memory are part of a respective plurality of qubits having connectivity by coupling to the same respective coupling structure. Thereby, the logical qubit(s) or memory(ies) may be efficiently created and QEC may be efficiently implemented due to the connectivity of the arrangement.

[0071] In a further embodiment, the quantum computing system may comprise a plurality of quantum computing arrangements, in particular according to anyone of the above, and one or more of the arrangements may be used in a configuration as separate logical qubits or memories, and in particular different logical qubits or memories. This embodiment is particularly favorable for systems requiring a large number of logical qubits. In one example of the above embodiments, the method may further comprise an implementation of a quantum gate on data qubits of at least two different quantum computing arrangements to thereby implement a quantum gate between at least two logical qubits encoded in the qubits of the quantum computing system. Thereby, a scalable architecture may be provided. In one example, one of the logical qubits may be encoded in the qubits of one of the two quantum computing arrangements, and the other qubit may be encoded in the qubits of the other quantum computing arrangement.

[0072] According to a fourth aspect of the present invention, there is provided use of a quantum computing system according to anyone of the above or of a quantum computing arrangement according to anyone of the above for implementing a quantum error correction code, in particular a sparse quantum error correction code, more particular a quantum low-density parity-check code.

[0073] In the following description, the invention will be described in greater detail by way of example, with reference to the drawings. In the drawings,

[0074] Fig. 1 is a schematic representation of a first embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0075] Fig. 2 is a schematic representation of a second embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0076] Fig. 3 is a schematic representation of a third embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0077] Fig. 4 is a schematic representation of a fourth embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0078] Fig. 5 is a schematic representation of a fifth embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0079] Fig. 6 is a schematic representation of a sixth embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0080] Fig. 7 is a schematic representation of a seventh embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0081] Fig. 8 is a schematic representation of an eighth embodiment of a quantum computing arrangement according to the first aspect of the present invention,

[0082] Fig. 9 is a schematic representation of a ninth embodiment of a quantum computing arrangement according to the first aspect of the present invention, Fig. 10 is a schematic representation of a first embodiment of a quantum computing system according to the second aspect of the present invention comprising two quantum computing arrangements,

[0083] Fig. 11 is a schematic representation of a second embodiment of a quantum computing system according to the second aspect of the present invention,

[0084] Fig. 12 is a schematic representation of a third embodiment of a quantum computing system comprising a quantum computing arrangement according to the first aspect of the present invention as a subsystem,

[0085] Fig. 13a is a diagram of a first embodiment of a method of implementing quantum error correction on a quantum computing arrangement according to the third aspect of the present invention,

[0086] Fig. 13b is a diagram of a second embodiment of a method of implementing quantum error correction on a quantum computing arrangement according to the third aspect of the present invention,

[0087] Fig. 14 is a schematic representation of a quantum computing arrangement for use of an implementation of a qLDPC code.

[0088] In the following Figures, schematic representations of quantum computing arrangements and systems are presented. For ease of understanding and representation, the figures depict 2D quantum computing arrangements, but the invention is not limited to 2D and covers also other dimensions. In all these Figures, each circle represents one qubit. In each Figure only those qubits that are relevant for the explanation of a certain embodiment are associated with a reference sign to improve legibility. Each solid line in a Figure represents a coupling structure. Each dashed line between a qubit and a coupling structure or another qubit represents the ability to create a coupling between said qubit and said coupling structure or said other qubit. In one example, the coupling may be created by a tunable coupler (not shown).

[0089] In one example of the embodiments below, the qubits may be superconducting qubits, in particular transmons, and the coupling structures may comprise a waveguide or a resonator. Coupling between the resonators / waveguides and the qubits may comprise use of a tunable coupler. However, the embodiments are not limited to this special setting.

[0090] Figure 1 is a schematic representation of a first embodiment of a quantum computing arrangement 101 according to the first aspect of the present invention and illustrates the general idea of the invention. In Figure 1 , 25 qubits (represented by open circles) are arranged on a two-dimensional rectangular lattice defining rows in a first direction X and columns in a second direction Y being different from the X direction. In Fig. 1 , the Y direction is orthogonal to the X direction. However, the Y direction can also be not orthogonal to the X direction and lattices in other dimensions than 2D are also covered by the present invention. For each plurality of qubits in adjacent rows there is a coupling structure extending in the first direction along a path and the qubits of the plurality are connectable to said coupling structure. Thereby, the coupling structure creates connectivity between any two qubits of the respective plurality, in particular a nearest-neighbor connectivity. Furthermore, the coupling structures enable an all-to-all connectivity between the qubits of their respective plurality of qubits. In particular, each qubit is selectively connectable to one or two coupling structures in its vicinity as indicated by the dashed lines. In Figure 1 , the coupling structures 21 , 22, 23a, b are completely arranged inside the qubit lattice.

[0091] The quantum computing arrangement 101 according to the first embodiment shown in Figure 1 comprises a first coupling structure 21 configured to couple to a first plurality 11 of qubits (indicated by curly bracket) thereby creating an all-to-all connectivity between the qubits of the first plurality 11 and a nearest-neighbor connectivity between any pair of qubits of the first plurality 11 of qubits. The first plurality 11 of qubits comprises a first qubit 1. The quantum computing arrangement 101 further comprises a second coupling structure 22 configured to couple to a second plurality 12 of qubits (indicated by curly bracket) thereby creating an all-to- all connectivity between the qubits of the second plurality 12 and nearest-neighbor connectivity between any pair of qubits of the second plurality 12 of qubits. The second plurality 12 of qubits comprises a second qubit 2.

[0092] Furthermore, the quantum computing arrangement 101 comprises two intermediates coupling structures 23a, b which are additional coupling structures to the first and second coupling structures. The intermediate coupling structures 23a, b are arranged / provided between the first coupling structure 21 and the second coupling structure 22. First and second intermediate pluralities 13a, b of qubits are connectable, as indicated by the dashed lines, to their respective adjacent intermediate coupling structure 23a, b whereby an all-to-all connectivity between the respectively connectable qubits of each intermediate plurality 13a, b is created. In the first embodiment, there are qubits (second row) which are simultaneously qubits of the first plurality 11 and of the first intermediate plurality 13a of qubits, and there are qubits (fourth row) which are simultaneously qubits of the second plurality 12 and the second intermediate plurality 13b of qubits.

[0093] In one modification of the quantum computing arrangement 101 , at least some of the qubits of the respective pluralities, and in particular all qubits of the respective pluralities, are also directly coupled, i.e. , not via the respective coupling structure, to adjacent qubits, e.g. Such a direct coupling may include coupling of the qubits via a tunable coupler. Each qubit may be directly coupled to as many as six to ten other qubits as well as being coupled indirectly to other qubits via the respective coupling structure. Furthermore, it will be appreciated that such direct qubits-qubit couplings may also be present in other systems disclosed in this application, and in particular in the embodiments below. Such direct qubit-qubit couplings may exist between qubits connected to the same coupling structure and even different coupling structures.

[0094] The quantum computing arrangement 101 further comprises a shortcut coupling structure 30 extending along a shortcut path in the second direction Y between the first qubit 1 and the second qubit 2. The shortcut coupling structure 30 is configured to couple to the first qubit 1 and the second qubit 2 thereby creating a connectivity between the first qubit 1 and the second qubit 2. The shortcut 30 enables connectivity between the first qubit 1 and the second qubit 2 which are beyond nearest neighbors in space. I.e., one may say that a nearest neighbor connectivity between qubits which are spatially next-to-nearest neighbors or beyond is created by the shortcut coupling structure.

[0095] In the example of Fig. 1 , only one qubit of the first plurality of qubits, namely the first qubit 1 , and only one qubit of the second plurality of qubits, namely the second qubit 2, are connectable to the shortcut coupling structure 30. In another example, another qubit of the first and second plurality of qubits and intermediate pluralities of qubits may be connectable to the shortcut coupling structure 30. For example, one of the qubits being located on the edge of the plurality of qubits, the closest to the shortcut coupling structure in terms of physical distance, for example, the qubit 3 of the intermediate plurality 13a of qubits, or the qubit 1 b or 2b.

[0096] The first coupling structure 21 enables a connectivity between any two qubits of said first plurality 11 , i.e. a nearest-neighbor connectivity between any two qubits of the first plurality 11. That is, when two qubits of the first plurality 11 are coupled to the first coupling structure 21 , a two-qubit gate can be implemented between any two qubits. Furthermore, the first coupling structure 21 provides an all-to-all connectivity between the qubits of the first plurality 11. Similarly, the second coupling structure 22 creates connectivity between any two qubits of the second plurality 12, i.e., an all-to-all connectivity between the qubits of the second plurality 12 and a nearest-neighbor connectivity between any pair of qubits of the second plurality 12. As there are qubits of the first (second) plurality which are next-to-nearest neighbors or beyond, this arrangement also allows to create a connectivity which is beyond the connectivity between spatially neighboring qubits achieved by direct capacitive coupling, tunable couplers or bus resonators known in the art. Coupling between the qubits and the coupling structures may be via a tunable coupler in some embodiments. I.e., the dashed line may also be representative of the presence of tunable couplers.

[0097] The arrangement 101 comprises a connectivity of qubits for a first implementation of a two- qubit gate between the first qubit 1 in the first row of qubits (and which is thereby not in the second plurality 12) and the second qubit 2 (which is in the fifth row of qubits and thereby not in the first plurality 11), via the first and / or second coupling structures 21 , 22 and without use of the shortcut coupling structure. In one example, the first implementation may comprise qubit routing. For example, as indicated in Figure 1 , a two-qubit gate between the first qubit 1 and the second qubit 2 may be implemented by routing qubit 1 to the location of qubit 2b as indicated by the arrows. That is, the state of qubit 1 is swapped / moved into the first coupling structure 21 , then swapped / moved to qubit 1b, then swapped / moved to the intermediate coupling structure 23a, then swapped / moved to an intermediate qubit 3 of the intermediate plurality 13, then swapped / moved to the other intermediate coupling structure 23b and then swapped / moved to the qubit 2b of the second plurality 12. A two-qubit gate may then be implemented by coupling the second qubit 2 and qubit 2b to the second coupling structure 22. After the two-qubit gate has been implemented, the state of qubit 2b may be swapped / moved back to qubit 1 e.g., by reversing the routing via qubits 3 and 1 b as explained above. Thus, in total 12 swap / move operations are necessary to implement the two-qubit gate between qubit 1 and qubit 2. In another example, the coupling structures 21 , 22, 23a may be configured to be used as a bus, and the first implementation may comprise coupling qubits to their respective coupling structures to thereby implement a two-qubit gate without the use of swap / move operations.

[0098] Alternatively, the two-qubit gate may be realized by a second implementation via the shortcut coupling structure 30. To this end, the first and second qubits 1 , 2 are coupled to the shortcut coupling structure 30 thereby allowing an implementation of the two-qubit gate between the two qubits. This second implementation does not require the use of any other qubits and / or additional coupling elements or structures and is thus very efficient. The shortcut coupling structure 30 allows to implement two-qubit gates between qubits which are far away in space in a very efficient manner. Le., the shortcut coupling structure creates a nearest-neighbor connectivity between qubits which are next-to-nearest-neighbors or even beyond in space.

[0099] Figure 2 is a schematic representation of a second embodiment of a quantum computing arrangement 102 according to the first aspect of the present invention. The quantum computing arrangement 102 of the second embodiment comprises the same qubit lattice as in the first embodiment and the same arrangement of the first, second and intermediate coupling structures 21 , 22, 23a, b. However, in the second embodiment shown in Figure 2, a shortcut coupling structure 31 is configured to provide a connectivity between more than two qubits of the plurality of qubits. In particular, the shortcut coupling structure 31 is configured to provide connectivity between any qubits in the first row (qubits 1 , 1a) and any qubits in the last row of qubits (qubits 2, 2a). To this end, the shortcut coupling structure 31 surrounds the qubit lattice partially, e.g. like a square “C”. However, the corners of the “C” may be rounded in one embodiment. In a preferred embodiment, the shortcut coupling structure 31 is configured to provide connectivity between each qubit in the first row (qubits 1 , 1a) and each qubit in the last row of qubits (qubits 2, 2a).

[0100] Figure 3 is a schematic representation of a third embodiment of a quantum computing arrangement 103 according to the first aspect of the present invention. The third embodiment is similar to the second embodiment shown in Figure 3. In particular, the third embodiment comprises the same qubit lattice and the same arrangement of the first, second, intermediate and shortcut coupling structures 21 , 22, 23a, 23b, 31 as the second embodiment. The third embodiment is different from the second embodiment in that qubits in the intermediate pluralities 13a, b which are in the first column of the two-dimensional lattice (qubits 1 b, 3, 2b) are also connectable to the shortcut coupling structure 31. For example, as shown on Fig. 3, the qubits located on the edge of the plurality of qubits are connectable to the shortcut coupling structure 31 , namely qubit 1 b, 3 and 2b. Thereby, as illustrated in Fig. 3, for a quantum computing arrangement comprising two intermediate pluralities 13a, b, a two-qubit gate between any two qubits may be implemented by use of at most four swap / move operations in the example. For a quantum computing arrangement comprising more than two intermediate pluralities 13, a two-qubit gate between any two qubits may be implemented by use of at most six swap / move operations.

[0101] In another example where shortcut coupling structure is used as a bus, one may need at most two to three swap operations to perform any quantum gate between any pair of qubits. In another example where the coupling between a coupling structure and another coupling structure is realized via a tunable coupler and the coupling structures are configured to be used as a bus, the quantum computing arrangement may have all-to-all connectivity.

[0102] Figure 4 is a schematic representation of a fourth embodiment of a quantum computing arrangement 104 according to the first aspect of the present invention. The quantum computing arrangement 104 according to the fourth embodiment is similar to the quantum computing arrangement 103 according to the third embodiment shown in Figure 3. However, there are no intermediate coupling structures 23a, b in the fourth embodiment. Coupling to the intermediate qubits 3 may be via a direct coupling, for example via a direct coupling between one intermediate qubit 3 and one qubit 1 b in the first plurality of qubits 11 and / or one qubit 2b in the second plurality of qubits 12. In the case of superconducting qubits, the direct coupling may comprise a capacitive coupling in one example. Another example may comprise tunable couplers. The layout of the fourth embodiment is simplified compared to embodiments with intermediate coupling structures at the price of requiring more gates to implement two-qubit gates between qubits which are not directly coupled with each other, or which are not connectable to the same coupling structure, as shown for example in Figure 4 with qubit Q1 b and qubit Q3. However, this layout enables a decrease in depth of the circuit for executing the algorithm / quantum error correction cycle.

[0103] Figure 5 is a schematic representation of a fifth embodiment of a quantum computing arrangement 105 according to the first aspect of the present invention. The quantum computing arrangement 105 of the fifth embodiment comprises the same qubit lattice as in the first to fourth embodiments and comprises a first coupling structure 21 coupling to a first plurality 11 of qubits and a second coupling structure 22 coupling to a second plurality 12 of qubits. However, in contrast to the first to third embodiments, the fifth embodiment does not comprise an intermediate coupling structure, but it comprises an outer coupling structure 24. However, there may also be examples which comprise an intermediate coupling structure in addition to the outer coupling structure. The outer coupling structure 24 is such that it extends along an outer path for which no path portion is arranged between the first path of the first coupling structure 21 and the second path of the second coupling structure 22 of the quantum computing arrangement 105 according to the fifth embodiment. In the quantum computing arrangement 105 there are qubits 4 (second row) which are simultaneously members of the first plurality 11 and the second plurality 12 of qubits. Further in contrast to the first to third embodiment, the shortcut coupling structure 32 of the fifth embodiment has a first shortcut path portion 32a which is arranged outside the two-dimensional lattice of qubits, and it has a second shortcut path portion 32b which is arranged inside the two-dimensional lattice. The quantum computing arrangement 105 according to the fifth embodiment allows for a more compact layout than the quantum computing arrangements 101 , 102, 103, 104 according to the first to fourth embodiments, wherein the shortcut coupling structures 30, 31 are arranged completely outside the two-dimensional array of qubits. The quantum computing arrangement 105 according to the fifth embodiment still provides a very good connectivity between qubits which are far apart in space and may thereby provide a good compromise between a high connectivity and a compact layout of the arrangement. Figure 6 schematically illustrates a sixth embodiment of a quantum computing arrangement 106 according to the first aspect of the present invention. The quantum computing arrangement 106 according to the sixth embodiment comprises the same qubit lattice as the first to third embodiment and the same arrangement of the first, second and intermediate coupling structures 21 , 22, 23a, b. In contrast to the quantum computing arrangements 101 , 102, 103, 104, 105 according to the first to fifth embodiment, the quantum computing arrangement 106 according to the sixth embodiment comprises a plurality of shortcut coupling structures 30a, 30b, 30c and 30d. The shortcut coupling structures 30a, 30c provide connectivity between all qubits in the first, respectively last row of qubits. The shortcut coupling structures 30a, 30c are optional in the sixth embodiment, i.e., they may not be present in certain examples of the sixth embodiment. The shortcut coupling structures 30b, 30d provide connectivity between all qubits in the first, respectively last column of qubits. This arrangement is especially preferable when the number of qubits that may be connectable with a coupling structure is limited, as it provides a good compromise between enhanced connectivity and limitation of coupling ability. Furthermore, this arrangement may allow for parallel implementation of two-qubit gate by parallel use of the multiple coupling structures.

[0104] Figure 7 is a schematic representation of a seventh embodiment of a quantum computing arrangement 107 according to the first aspect of the present invention. The quantum computing arrangement 107 of the seventh embodiment comprises the same qubit lattice as the first to sixth embodiments and the same arrangement of the first, second and intermediate coupling structures 21 , 22, 23a, b as the first to third, fifth and sixth embodiment. Contrary to the first to sixth embodiments, the shortcut coupling structure 33 of the seventh embodiment surrounds the boundary of the two-dimensional array so that every qubit at the boundary of the two- dimensional array is connectable to the shortcut coupling structure 33. Thereby, the connectivity is such that any two-qubit gate may be implemented by use of at most four swap / move operations, in many cases involving only two swap / move operations, and in some cases requiring no swap / move operation. For a quantum computing arrangement comprising more than two intermediate pluralities 13, a two-qubit gate between any two qubits may be implemented by use of at most six swap / move operations. The shortcut coupling structure may be integrally formed in one example, i.e., it may comprise an integral resonator or waveguide in one example. In another example the shortcut coupling structure may comprise several separate parts (e.g., several resonators or waveguides in one example) which are coupled to each other or via a tunable coupler or via a qubit to thereby allow for creating the all-to-all connectivity between all qubits which are connectable to the shortcut coupling structure. Figure 8 is a schematic representation of an eighth embodiment of a quantum computing arrangement 108 according to the first aspect of the present invention. In the quantum computing arrangement 108, 40 qubits are arranged in a lattice structure. The quantum computing arrangement 108 comprises a first coupling structure 21 , and a second coupling structure 22 and a plurality of intermediate coupling structures 23a, b, c, d. The shortcut coupling structure 34 comprises first shortcut path portions 34a which are arranged completely outside the qubit lattice and a second shortcut path portion 34b which is arranged within the qubit lattice. All qubits 1 , 1a in the first row and all qubits 2, 2a in the last row are connectable to the shortcut coupling structure 34. Furthermore, intermediate qubits 3a in the vicinity of the second shortcut path portion 34b are connectable to the shortcut coupling structure 34. The quantum computing arrangement 108 according to the eighth embodiment is particularly useful for large qubit lattices requiring long-range interactions between very distant qubits, while keeping the number of qubits that are connectable to the shortcut coupling structure 34 relatively low.

[0105] Figure 9 is a schematic representation of a ninth embodiment of a quantum computing arrangement 109 according to the first aspect of the present invention. The quantum computing arrangement 109 according to the ninth embodiment is similar to the quantum computing arrangement 103 according to the third embodiment in that it comprises a qubit lattice of 25 qubits and the same arrangement of coupling structures 21 , 22, 23a, 23b, 31 as in the third embodiment which are configured to couple to the same qubits as in the quantum computing arrangement 103 of the third embodiment. The quantum computing arrangement 109 of the ninth embodiment differs from the quantum computing arrangement 103 of the third embodiment in that it comprises five additional ancillary qubits 9a, b, c, d, e without a coupling to any coupling structure of the arrangement 109. However, there is a direct coupling between one qubit Q9a and each ancillary qubit 9a, b, c, d, and there is a direct coupling between another qubit Q9b and the ancillary qubit 9e, e.g., a direct capacitive coupling or a direct connection via a tunable coupler or qubit. The arrangement 109 may comprise further ancillary qubits coupled to further qubits of the rectangular lattice. The quantum computing arrangement 109 is particularly useful for the implementation of quantum error correction codes wherein the ancillary qubits may be used as flag qubits.

[0106] Figure 10 is a schematic representation of a first embodiment of a quantum computing system 1001 according to the second aspect of the present invention. Here, two quantum computing arrangements 105, 105’ according to the fifth embodiment (see Figure 5) are arranged on the same support structure 60, e.g., a substrate. The substrate / support structure 60 may be integral in one example. In another example, the two arrangements 105, 105’ may be arranged on separate support structures. In one example, the quantum computing arrangements 105, 105’ are connected by use of a coupling structure which comprises the shortcut coupling structures 32a, 32a’ of the first and second quantum computing arrangements 105, 105’ and a connecting coupling structure 41 extending between the shortcut coupling structures 32a, 32a’ of the arrangements 105, 105’. The coupling structure may be an integral structure in one example. In another embodiment, the shortcut coupling structures 32a, 32a’ and the connecting coupling structure 41 may be three separate entities, and the shortcut coupling structures 32a, 32a’ are connected with each other via the connecting coupling structure 41 without forming an integral element. The shortcut coupling structures 32a, 32a’ and the connecting coupling structure may comprise a resonator or a waveguide in one example, but they are not limited to this. In one example, the connecting coupling structure may be configured to be used as a bus.

[0107] The quantum computing arrangements 105, 105' may be used as modules to create a larger quantum computing system 10001 with 50 qubits which has a favorable connectivity, in particular between qubits which are far away in space. The modules 105, 105’ may be used as different modules of logical qubit and / or memory, but they can also be used as same modules of logical qubit and / or memory.

[0108] Figure 11 is a schematic representation of a second embodiment of a quantum computing system 1002 according to the second aspect of the present invention. The quantum computing system shown in Figure 11 comprises two quantum computing arrangements 103, 103' according to the third embodiment shown in Figure 3. The quantum computing arrangements or modules 103, 103’ may be used as different modules of logical qubit and / or memory, but they can also be used as same modules of logical qubit and / or memory. One of the quantum computing arrangements 103 is arranged on a first support structure 61 and the other quantum computing arrangement 103’ is arranged on a second support structure 62. In another example, both arrangements 103, 103’ may be arranged on the same integral support structure. The support structures may be substrates in one example. The first support structure 61 and the second support structure 62 are separate from each other. The quantum computing arrangements 103, 103' are connected with each other via a connecting coupling structure 42. The connecting coupling structure 42 is configured to couple to any qubits in the last column of the quantum computing arrangement 103 and to any qubits in the first column of the quantum computing arrangement 103'. In a preferred embodiment, the connecting coupling structure 42 is configured to couple to each qubit in the last column of the quantum computing arrangement 103 and to each qubit in the first column of the quantum computing arrangement 103’. Thereby, a quantum computing system 1002 with many qubits and a high connectivity is created.

[0109] Figure 12 is a schematic representation of a third embodiment of a quantum computing system 1003 according to the second embodiment of the invention. The quantum computing system 1003 comprises a quantum computing arrangement (formed by the dash-dotted square) with a shortcut coupling structure 30, and further, a plurality of qubits and coupling structures 200 which are not part of the quantum computing arrangement and which may, e.g., be directly coupled with each other or via a tunable coupler (see dashed lines), and which do not comprise a shortcut coupling structure according to the present invention. Le., the quantum computing arrangement is a module of the larger arrangement of qubits and coupling structures.

[0110] Figure 13a is a diagram of a first embodiment of a method of implementing quantum error correction on a quantum computing system comprising a quantum computing arrangement according to the third aspect of the present invention. The quantum computing system comprises a quantum computing arrangement according to anyone of the above. In one example, the quantum error correction code has in particular a suitable code minimum distance.

[0111] The method starts at S1 with designating, among the qubits of the quantum computing arrangement, a plurality of data and syndrome qubits for the implementation of the quantum error correction code on the quantum computing system with a shortest quantum error correction cycle according to the parity check matrix of the code.

[0112] Then, at step S2, each of the plurality of data and syndrome qubits is initialized in a predetermined initial state. E.g., a predetermined logical state is determined and encoded in the data qubits according to the quantum error correction code. In one example, each syndrome qubit may be prepared in the IO> state.

[0113] At step S3, a quantum error correction cycle may be executed on the quantum computing system. The execution comprises an error detection step which comprises implementation of a sequence of quantum gates on the data and syndrome qubits followed by a measurement of the state of the syndrome qubit according to the QEC code, in particular in the computational basis, to thereby obtain a plurality of syndrome bits associated with said cycle. The syndrome bits may be indicative of an error. At step S4, the syndrome bits are used in a decoding algorithm executed by a classical computer to identify the error.

[0114] Then, at step S5, a quantum error correction operation is applied to the data qubits, wherein application of said quantum error correction operation comprises an application of a sequence of quantum gates to the data qubits which are affected by an error, the sequence depending on identified error.

[0115] Then, at step S6, it is determined whether a predetermined number of quantum error correction cycles is reached. If the answer is NO, the method returns to step S3. If the answer is YES, the method terminates at step S7. In this way, active quantum error correction may be achieved. Similar techniques may be used to perform logical gates.

[0116] Figure 13b is a diagram of a second embodiment of a method of implementing quantum error correction on a quantum computing system comprising a quantum computing arrangement according to the third aspect of the present invention. The quantum computing system comprises a quantum computing arrangement according to anyone of the above.

[0117] The method starts at S10 with designating, among the qubits of the quantum computing arrangement, a plurality of data and syndrome qubits for the implementation of the quantum error correction code on the quantum computing system with an optimum code minimum distance and a shortest quantum error correction cycle according to the parity check matrix of the code.

[0118] Then, at step S11 , each of the plurality of data and syndrome qubits is initialized in a predetermined initial state. E.g., a predetermined logical state is determined and encoded in the data qubits according to the quantum error correction code. In one example, each syndrome qubit may be prepared in the IO> state.

[0119] At step S12, a quantum error correction cycle may be executed on the quantum computing system. The execution comprises an implementation of a sequence of quantum gates on the data and syndrome qubits followed by a measurement of the state of the syndrome qubit, in particular in the computational basis, according to the QEC code, to thereby obtain a plurality of syndrome bits associated with said cycle and indicative of an error. The syndrome bits are stored on a memory. Then, at step S13, it is determined whether a predetermined number of quantum error correction cycles is reached. If the answer is NO, the method returns to step S12. If the answer is YES, the method proceeds with step S14. At step S14, the syndrome bits are postprocessed to obtain error information indicative of an error, and the error information is stored, e.g., on a memory. Postprocessing may be implemented by a classical computer. In this way, passive quantum error correction may be achieved.

[0120] In the following, an example of a method of implementing a quantum error correction code according to the third aspect of the present invention is presented. The quantum error correction code is example code A3 of Pantaleev etal., arXiv: 1904.02703, 2019. The quantum error correction code of example A3 is a [[48, 6, 8]] QLDPC code. In particular, it is a so-called generalized bicycle code. These codes are defined by their parity check matrix H = )> wherein Hx= [A B] and Hz= [BTAT] are concatenated matrixes of the 24 x 24 circulant matrices A and B, respectively BTand AT. A has the associated generating polynomial a(x) = 1 + x2+ x8+ x15, and B has the associated generating polynomial b(x) = 1 + x2+ x12+ x17. A first stabilizer generator defined via the first column of said parity check matrix is of the form X0X2X8X15X24X25X36X41. Implementing this stabilizer generator on a standard square or heavy hex lattice would involve either multiple SWAP operations which might be very noisy, or multiple layers of overlapping nonlocal couplers as shown in Fig. 1 of S. Bravyi et al. “The future of quantum computing with superconducting qubits”, arXiv: 2209.06841 v1 , 2022. This would lead to very low thresholds and / or significant fabrication challenges via multiple metallic routing layers in a flip chip design. To overcome these challenges, the present invention proposes to implement the quantum error correcting code on a quantum computing system with a quantum computing arrangement 112 shown in Fig. 14. The quantum computing arrangement 112 comprises 48 qubits (qubits qo to q4?) arranged in a two-dimensional lattice in six rows and eight columns. The quantum computing arrangement 112 may further comprise additional qubits for use as syndrome qubits, but these are omitted in Fig. 14 for ease of representation. The quantum computing arrangement 112 comprises a first coupling structure 21 , a second coupling structure 22 and three intermediate coupling structures 23a, 23b, 23c, the coupling structures being connectable to qubits as indicated by the dashed lines. Furthermore, the quantum computing arrangement 112 comprises a shortcut coupling structure 31 which has the shape of a cornered "C" and partially surrounds the qubit lattice and is connectable to qubits as indicated by the dashed lines. Qubits qo, q2, qs, q , q24, q26, q36, and q4ion which the operator XoX2X8Xi 5X24X26X35X41 acts are depicted as solid circles in Fig. 14. It is obvious from Fig. 14, that every pair of physical qubits of each logical qubit can be mapped to two coupled qubits by at most four SWAP operations which preferably involve the shortcut coupling structure 31. For a quantum computing arrangement comprising more than two intermediate pluralities of qubits 13a, 13b, a two-qubit gate between any two qubits may be implemented by use of at most six swap / move operations. Thereby, the quantum error correction code A3 can be implemented efficiently on the quantum computing system shown in Fig. 14.

[0121] List of Reference Numerals

[0122] 1, 1a, 1b, 1a’ first qubit

[0123] 2, 2a, 2b, 2’, 2a’ second qubit

[0124] 3, 3a intermediate qubit

[0125] 4, 4’ qubit of first and second plurality of qubits

[0126] 9a, b, c, d, e ancillary qubit

[0127] Q9a, b qubit coupled to ancillary qubit(s)

[0128] 11 first plurality of qubits

[0129] 12 second plurality of qubits

[0130] 13a, b intermediate plurality of qubits

[0131] 21 first coupling structure

[0132] 22 second coupling structure

[0133] 23a, b, c, d intermediate coupling structure

[0134] 24 outer coupling structure

[0135] 30, 30a, b, c, d shortcut coupling structure

[0136] 31 , 32, 33, 34 shortcut coupling structure

[0137] 32a, 34a first shortcut path portion

[0138] 32b, 34b second shortcut path portion

[0139] 41 connecting coupling structure

[0140] 42 connecting coupling structure

[0141] 60 support structure

[0142] 61 first support structure

[0143] 62 second support structure

[0144] 102, 102, 103, quantum computing arrangement

[0145] 104, 105, 106, quantum computing arrangement

[0146] 107, 108, 109 quantum computing arrangement

[0147] 112 quantum computing arrangement

[0148] 1001 , 1002 quantum computing system

Claims

CLAIMS1. Quantum computing arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 113) comprising: a plurality of qubits; a first coupling structure (21 ) extending along a first path and being configured to couple to qubits (1 , 1a, 1 b) of a first plurality (11 ) of said qubits in the vicinity of said first path thereby creating a connectivity between any qubits (1 , 1a, 1 b) of said first plurality (11 ); a second coupling structure (22) extending along a second path and being configured to couple to qubits (2, 2a, 2b) of a second plurality (12) of said qubits in the vicinity of said second path thereby creating a connectivity between any qubits (2, 2a, 2b) of said second plurality (12); wherein the arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 113) comprises connectivity of the qubits for a first implementation of a two-qubit gate between a first qubit (1 ) which is in said first (11 ) but not in said second (12) plurality and a second qubit (2) which is in said second (12) but not in said first (11 ) plurality; characterized in that said quantum computing arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 113) further comprises a shortcut coupling structure (30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34) extending along a shortcut path between the first qubit (1 ) and the second qubit (2) and being configured to couple to the first qubit (1 ) and the second qubit (2) thereby creating a connectivity between the first qubit (1 ) and the second qubit (2) so that the arrangement allows for a second implementation of the two-qubit gate via the shortcut coupling structure (30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34), and wherein said first implementation is without use of the shortcut coupling structure (30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34).

2. Quantum computing arrangement (102, 103, 104, 105, 106, 107, 108, 109, 113) according to claim 1 , wherein the shortcut coupling structure (30a, 30b, 30c, 30d, 31 , 32, 33, 34) is configured to provide a connectivity between more than two qubits (1 , 1a, 2, 2a) of the plurality of qubits, in particular between the first qubit (1 ) of the first plurality (11 ) and at least two of the qubits (2, 2a) of the second plurality (12) of said qubits or between the second qubit (2) of the second plurality (12) and at least two of the qubits (1 , 1a) of the first plurality (11 ) of said qubits.

3. Quantum computing arrangement (101 , 102, 103, 105, 106, 107, 108, 109, 113) according to claim 1 or 2, said arrangement further comprising one or more additional coupling structure(s) (23a, b, c, d, 24), each additional coupling structure (23a, b, c, d, 24) extending along its respective additional path and being configured to couple to a respective additionalplurality of qubits in the vicinity of said additional path to thereby creating a connectivity between any qubits of said respective additional plurality of qubits.

4. Quantum computing arrangement (103, 105, 106, 107, 108, 109, 112) according to claim 3, wherein the shortcut coupling structure (30b, 30d, 31 , 32, 33, 34) is configured to provide a connectivity between at least one qubit (3) of one of the additional pluralities of qubits and at least one qubit (1 , 1a, 1 b, 2, 2a, 2b) of the first and / or second plurality (11 , 12) of qubits.

5. Quantum computing arrangement (101 , 102, 103, 106, 107, 108, 109, 111 , 113) according to claim 3 or 4, wherein at least one of said one additional coupling structures is an intermediate coupling structure (23a, b, c, d) extending along an intermediate path which is at least partially arranged between said first and second paths so as to be connectable to an intermediate plurality (13a, 13b) of said qubits in the vicinity of said intermediate path thereby creating a connectivity between any qubits (3) of said intermediate plurality (13a, b) of qubits, wherein the connectivity of the arrangement is in particular such that the first implementation of the two-qubit gate comprises a use of a qubit of said intermediate plurality (13a, b) and / or the intermediate coupling structure (23a, b, c, d).

6. Quantum computing arrangement (105) according to anyone of claims 3 - 5, wherein at least one of said additional coupling structures is an outer coupling structure (24).

7. Quantum computing arrangement according to any one of the previous claims, wherein said shortcut coupling structure is configured to be or is part of a set of shortcut coupling structures configured to allow for implementing a two-qubit gate between any two qubits of the plurality of qubits, in particular by using connectivity and qubit routing comprising at most six, preferably at most four, more preferably at most three and even more preferably at most two swaps.

8. Quantum computing arrangement according to anyone of the preceding claims, wherein the coupling structure mediates an interaction between any two qubits coupled with the coupling structure thereby implementing a two-qubit gate between the two qubits of the plurality so that the coupling structure operates as a bus.

9. Quantum computing arrangement (103, 106, 107, 108, 109, 113) according to any one of claims 3 - 8, wherein the shortcut coupling structure (31 , 33, 34) is configured to create connectivity between the first qubit (1 ) of the first plurality (11 ) and at least one additional qubit (3) of the plurality of additional qubits, in particular between the first qubit ( 1 ) of the first plurality (11 ) and at least one intermediate qubit (3) of the plurality of intermediate qubits, and / orbetween the second qubit (2) of the second plurality (12) and at least one additional qubit (3) of the plurality of additional qubits, in particular between the second qubit (2) of the second plurality (12) and at least one intermediate qubit (3) of the plurality of intermediate qubits.

10. Quantum computing arrangement (101 , 102, 103, 106, 107, 108, 109) according to anyone of claims 4 to 9, wherein there is at least one qubit (1 b) which is simultaneously a qubit of the first plurality (11 ) and one of the plurality (13) of intermediate qubits, and / or there is at least one qubit (2b) which is simultaneously a qubit of the second plurality (12) and one of the plurality (13) of intermediate qubits.11 . Quantum computing arrangement (109) according to one of the previous claims, wherein the arrangement comprises at least one additional ancillary qubit (9a, b, c, d, e), preferably without a coupling to any coupling structure of the arrangement, wherein there is a connectivity between at least one qubit (Q9a, Q9b) of the plurality of qubits and the ancillary qubit (9a, b, c, d, e).

12. Quantum computing arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 113) according to anyone of the preceding claims, wherein at least one of the coupling structures (21 , 22, 23, 24, 30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34) comprises a resonator or a waveguide.

13. Quantum computing arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 113) according to anyone of the preceding claims, wherein for at least one qubit its coupling interaction with one of the coupling structures (21 , 22, 23, 24, 30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34) is tunable, in particular is provided by a tunable coupler of the quantum computing arrangement.

14. Quantum computing system (1001 , 1002) comprising a plurality of quantum computing arrangements (103, 103', 105, 105'), said quantum computing arrangements being according to any one of the preceding claims, wherein at least two quantum computing arrangements (103, 103', 105, 105') of the plurality of quantum computing arrangements are connected to each other, in particular via a coupling structure (41 , 42).

15. Quantum computing system (1001 , 1002) according to claim 14 comprising at least two quantum computing arrangements (103, 103', 105, 105') of pluralities of qubits having different or the same number of qubits and having different or the same connectivity of qubits.

16. Method of implementing, on a quantum computing system, a quantum error correction code, in particular a sparse quantum error correction code, even more particular a quantumlow-density parity-check code, said quantum error correction code being defined by a parity check matrix, said quantum computing system comprising a quantum computing arrangement (101 , 102, 103, 104, 105, 106, 107, 108, 109, 112) according to anyone of claims 1 to 13, said , method comprising:- designating, among the qubits of the quantum computing arrangement, a plurality of data and syndrome qubits for the implementation of the quantum error correction code on the quantum computing system with a shortest quantum error correction cycle according to the parity check matrix;- initializing each of the plurality of data and syndrome qubits in a predetermined initial state;- executing the quantum error correction cycle on the quantum computing system, wherein the execution comprises an error detection step which comprises implementation of quantum gates on the data and syndrome qubits followed by a measurement of the state of the syndrome qubits to thereby obtain a plurality of syndrome bits associated with said cycle, the syndrome bits being indicative of an error, wherein the implementation of the quantum gate comprises implementation of a two-qubit gate in particular according to the second implementation by use of the shortcut coupling structure.

17. Method according to claim 16, wherein the quantum computing arrangement is according to claim 11 , the ancillary qubit (9a, b, c, d, e) is used as a flag qubit, and wherein the execution of the quantum error correction cycle comprises a measurement of the state of the flag qubit.

18. Method according to claim 16 or 17, wherein at least one of the shortcut coupling structures (30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34) and / or the first, second and additional coupling structures (21 , 22, 23, 24) are configured for operation as a bus.

19. Method according to anyone of claims 16-18, wherein the error correction step comprises a parallel application of gates between a plurality of pairs of qubits, wherein at least one of said applications is in particular according to the second implementation by use of the shortcut coupling structure.

20. Method according to anyone of claims 16-19, wherein the method further comprises use of the syndrome bits in a decoding algorithm to identify the error, and wherein the method further comprises an application of a quantum error correction operation to the data qubits, wherein application of said quantum error correction operation comprises an application of quantum gates to the data qubits which are affected by an error, the quantum gates depending on said error.

21. Method according to claim 20, wherein said quantum computing system comprises at least two quantum computing arrangements according to any one of claims 1 to 13 and said method further comprises an implementation of a logical qubit gate, wherein said implementation comprises an implementation of a single-qubit gate and / or a two-qubit gate on at least one of the data qubits, using the shortcut coupling structure connecting two or more separate quantum computing arrangements.

22. Method according to anyone of claims 16-19, wherein the method further comprises repeatedly executing the quantum error correction cycle to thereby obtain a plurality of syndrome bits in each cycle, post-processing the plurality of syndrome bits of each cycle, storing the syndrome bits on a memory and obtaining error information indicative of an error associated with the respective cycle using the syndrome bits of this cycle and of the previous cycles.

23. Method according to claim 22, said method further comprising an implementation of a logical operation by use of classical post-processing of the syndrome data.

24. Method according to anyone of claims 16-23, wherein said method further comprises, during at least one quantum error correction cycle, performing a dynamical decoupling sequence on idling qubits to thereby reduce decoherence.

25. Method according to anyone of claims 16 to 24, wherein one or more logical qubits and / or memories are created from the plurality of qubits by encoding according to the quantum error correction code, wherein in particular some of the qubits of a respective logical qubit or memory are part of a respective plurality of qubits having connectivity by coupling to the same respective coupling structure (21 , 22, 23, 24, 30, 30a, 30b, 30c, 30d, 31 , 32, 33, 34).

26. Method according to any one of claims 16 to 25, wherein the quantum computing system (1001 , 1002) is according to claim 14 or 15 and one or more of the quantum arrangements are used in a configuration as separate logical qubits or memories, in particular different logical qubits or memories.

27. Method according to claim 26, further comprising an implementation of a quantum gate on data qubits of at least two different quantum computing arrangements to thereby implement a quantum gate between at least two logical qubits encoded in the qubits of the quantum computing system.

28. Use of a quantum computing system (1001 , 1002) according to anyone of claims 14 oraccording to anyone of claims 1-13 for implementing a quantum error correction code, in particular a sparse quantum error correction code, more particular a quantum low-density parity-check code.

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