Inverting buck-boost hybrid converter topologies

Abstract

Embodiments of a voltage converter are disclosed. The voltage converter includes an output capacitor and a charging circuit. The output capacitor is coupled to an output node. An output voltage is generated at the output node and the charging circuit is coupled to the output node. The charging circuit includes a fly capacitor, a fly inductor, a power node configured to receive an input voltage, and a set of switches. The set of switches are configured to magnetize the fly inductor in at least one switch configuration with the input voltage, energize the fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the fly capacitor, and transfer the energy from the fly capacitor to the output node in at least one switch configuration.

Description

INVERTING BUCK-BOOST HYBRID CONVERTER TOPOLOGIESRelated Applications

[0001] This application claims the benefit of provisional patent application serial number 63 / 638,071 , filed April 24, 2024, which claims the benefit of provisional patent application serial number 63 / 594,385, filed October 30, 2023, the disclosures of which are hereby incorporated herein by reference in their entireties.Field of the Disclosure

[0002] This disclosure relates generally to voltage converters and methods of operating the same.Background

[0003] Voltage converters for Radio Frequency (RF) circuits play a crucial role in ensuring optimal performance and efficiency. Voltage converters convert Direct Current (DC) voltages to another DC voltage at a different voltage level. RF circuits require precise and stable voltage levels to function correctly, as deviations can lead to signal distortion and performance degradation. By efficiently managing voltage levels within the RF circuits, these converters contribute to maintaining signal integrity, minimizing interference, and optimizing overall system reliability.

[0004] One type of design for a voltage converter is an inverting buck boost converter that converts a positive voltage to a negative voltage. In some existing applications, the inverting buck boost converter uses two transistors and an inductor. In some applications, the size of the inductor is constrained (e.g., mobile applications with a height < 1 mm) and / or the transistors suffer from performance inefficiencies. For example, in display power applications for cell phones, the typical implementation of an inverting buck-boost converter converts power at 87% efficiency in a nominal condition and less than 80% efficiency at amaximum output power. For portable applications, this level of efficiency limits the battery life and thermal performance.

[0005] In some embodiments, a voltage converter includes: an output capacitor coupled to an output node, wherein an output voltage is generated at the output node; and a charging circuit coupled to the output node, the charging circuit including: a fly capacitor; a fly inductor; a power source node configured to receive an input voltage; and a set of switches configured to: magnetize the fly inductor in at least one switch configuration with the input voltage; energize the fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the fly capacitor; and transfer energy from the fly capacitor to the output node in at least one switch configuration. In some embodiments, the set of switches is further configured to demagnetize the fly inductor in at least one switch configuration. In some embodiments, the set of switches includes a switch configured to be closed so that energy from the fly capacitor is transferred to the output node. In some embodiments, the switch is a first switch having a first switch node and a second switch node, wherein the first switch node is coupled to the output capacitor; and the set of switches further includes a second switch coupled between the second switch node and ground. In some embodiments, the set of switches includes: a first switch coupled between the power source node and a first inductor node of the fly inductor, wherein a second inductor node of the fly inductor is coupled to the fly capacitor. In some embodiments, the fly capacitor is coupled between the second inductor node and the first switch. In some embodiments, the set of switches further includes: a second switch coupled between the first inductor node and ground. In some embodiments, the set of switches further includes: a third switch coupled between the second inductor node and ground. In some embodiments, the set of switches further includes: a fourth switch coupled between the second inductor node and the fly capacitor. In some embodiments, the fly capacitor is a first fly capacitor, wherein: the charging circuit is coupled to the output node, and thecharging circuit further includes a second fly capacitor, wherein the set of switches is further configured to: energize the second fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the second fly capacitor; and transfer energy from the second fly capacitor to the output node in at least one switch configuration. In some embodiments, the set of switches is further configured to demagnetize the fly inductor in at least one switch configuration. In some embodiments, the set of switches includes: a first switch configured to be closed so that energy from the first fly capacitor is transferred to the output node; and a second switch configured to be closed so that energy from the second fly capacitor is transferred to the output node.

[0006] In some embodiments, the first switch has a first switch node and a second switch node, wherein: the first switch node is coupled to the output capacitor; the second switch has a third switch node and a fourth switch node, wherein the third switch node is coupled to the output capacitor; and the set of switches further includes: a third switch coupled between the second switch node and ground; and a fourth switch coupled between the fourth switch node and ground. In some embodiments, the set of switches includes: a first switch coupled between the power source node and a first inductor node of the fly inductor, wherein a second inductor node of the fly inductor is coupled to the first fly capacitor; and a second switch coupled between the power source node and the first inductor node of the fly inductor, wherein the second inductor node of the fly inductor is coupled to the second fly capacitor. In some embodiments, the first fly capacitor is coupled between the second inductor node and the first switch; and the second fly capacitor is coupled between the second inductor node and the first switch. In some embodiments, the set of switches further includes: a third switch coupled between the first inductor node and ground. In some embodiments, the set of switches further includes: a fourth switch coupled between the second inductor node and ground. In some embodiments, the set of switches further includes: a fifth switch coupled between the second inductor node and the first flyback capacitor; and a sixth switch coupled between the second inductor node and the second flyback capacitor.

[0007] In some embodiments, a method of converting an input voltage into an output voltage includes: magnetizing a fly inductor with the input voltage; energizing a fly capacitor by transferring energy from the fly inductor to the fly capacitor; and transferring energy from the fly capacitor to an output node in at least one switch configuration, wherein the output voltage is generated at the output node and an output capacitor is coupled to the output node.

[0008] A user element, the user element including a voltage converter, wherein the voltage converter includes: an output capacitor coupled to an output node, wherein an output voltage is generated at the output node; and a charging circuit coupled to the output node, the charging circuit includes: a fly capacitor; a fly inductor; a power source node configured to receive an input voltage; and a set of switches configured to: magnetize the fly inductor in at least one switch configuration with the input voltage; energize the fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the fly capacitor; and transfer energy from the fly capacitor to the output node in at least one switch configuration.

[0009] In another aspect, any of the foregoing aspects individually or together, and / or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.

[0010] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.Brief Description of the Drawing Figures

[0011] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.

[0012] FIG. 1 A illustrates one embodiment of a voltage converter, in accordance with some embodiments;

[0013] FIG. 1 B illustrates the voltage converter shown in FIG. 1 A with closed circuit paths when the switches are in different switch configurations;

[0014] FIG. 2A illustrates another embodiment of a voltage converter, in accordance with some embodiments;

[0015] FIGs. 2B and 2C illustrate the voltage converter shown in FIG. 2A with closed circuit paths when the switches are in different switch configurations; and

[0016] FIG. 3 illustrates a user element, in accordance with some embodiments.Detailed Description

[0017] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0018] It should be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0019] It should also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Incontrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0020] It should be understood that, although the terms “upper,” “lower,” “bottom,” “intermediate,” “middle,” “top,” and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed an “upper” element and, similarly, a second element could be termed an “upper” element depending on the relative orientations of these elements, without departing from the scope of the present disclosure.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0022] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having meanings that are consistent with their meanings in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0023] FIG. 1 A illustrates one embodiment of a voltage converter 100, in accordance with some embodiments.

[0024] The voltage converter 100 includes a charging circuit 102 and an output circuit 104. The charging circuit 102 includes switches S1 , S2, S3, S5, a fly inductor IFLY, and a fly capacitor CFLY. In some embodiments, the switchesS1 , S2, S3, S5 are Field Effect Transistors (FETs), Microelectromechanical Switches (MEMs), and / or the like. In some embodiments, the fly capacitor CFLY is a Metal-lnsulator-Metal (MIM) Capacitor, a Metal-Oxide-Semiconductor (MOS) Capacitor, a poly capacitor, a thin-film capacitor, a varactor, a trench capacitor, a parallel plate capacitor, an interdigitated capacitor, a varactor, a high-K dielectric capacitor, an array of capacitive devices, a combination of one or more of the capacitors listed, and / or the like.

[0025] The charging circuit 102 includes a power source node 106, a ground node 108, an inductor node 1 10, an inductor node 112, and a switch node 1 14. The charging circuit 102 is connected to an output node 1 16 in the output circuit 104. With respect to the charging circuit 102 shown in FIG. 1 A, the power source node 106 is configured to receive a power source voltage VIN (also referred to as an input voltage VIN throughout this disclosure), which is a reference voltage with a non-zero voltage magnitude and a positive polarity. The power source voltage VIN is an input voltage and is generally a Direct Current (DC) voltage. The ground node 108 is configured to receive a ground voltage, which is a reference voltage that defines a zero voltage magnitude and, thus, has no polarity.

[0026] In some embodiments, the fly inductor IFLY is a wire-wound inductor, a ferrite bead inductor, a transformer or a portion of a transformer, a multilayer chip inductor, a molded power inductor, an integrated inductor, a shielded inductor, and / or the like. The fly inductor IFLY has the inductor node 110 at one end of the fly inductor IFLY and the inductor node 1 12 at another end of the fly inductor IFLY. In other embodiments, the inductor node 1 10 and / or the inductor node 1 12 are intermediary tapped nodes in the fly inductor IFLY.

[0027] In this embodiment, the inductor node 112 is also a capacitor node connected to one side of the fly capacitor CFLY. In some embodiments, the fly capacitor CFLY is a MIM Capacitor, a MOS Capacitor, a poly capacitor, a thin- film capacitor, a varactor, a trench capacitor, a parallel plate capacitor, an interdigitated capacitor, a varactor, a high-K dielectric capacitor, an array of capacitive devices, a combination of one or more of the capacitors listed, and / orthe like. In other embodiments, the inductor node 11 and the capacitor node on the side of the fly capacitor CFLY are independent nodes because, for example, intermediary components may be coupled between the inductor node 112 and the capacitor node. The other side of the fly capacitor CFLY is connected to the output node 116. In other embodiments, the capacitor node and the output node 1 16 are independent nodes because, for example, intermediary components may be coupled in between the capacitor node and the output node 116.

[0028] The switch S1 is coupled between the power source node 106 and the inductor node 110. The switch S1 is configured to open and close a path between the power source node 106 and the inductor node 1 10. The switch S2 is coupled between the inductor node 1 10 and the ground node 108. The switch S2 is configured to open and close a path between the inductor node 1 10 and the ground node 108. The switch S3 is coupled between the inductor node 112 and the ground node 108. The switch S3 is configured to open and close a path between the inductor node 112 and the ground node 108. The switch S5 is coupled between the switch node 114 and an output node 116 in the output circuit 104. The switch S5 is configured to open and close a path between the switch node 114 and the output node 1 16. In this embodiment, the output node 1 16 is another switch node of the switch S5. In other embodiments, the switch node 114 and the output node 116 are independent nodes because, for example, intermediary components may be coupled in between. A switch S6 is coupled between the switch node 114 and the ground node 108. The switch S6 is configured to open and close a path between the switch node 114 and the ground node 108.

[0029] The output circuit 104 includes an output capacitor 1 18. In some embodiments, the output capacitor 118 is a MIM Capacitor, a MOS Capacitor, a poly capacitor, a thin-film capacitor, a varactor, a trench capacitor, a parallel plate capacitor, an interdigitated capacitor, a varactor, a high-K dielectric capacitor, an array of capacitive devices, a combination of one or more of the capacitors listed, and / or the like. The output capacitor 118 is coupled between the output node 1 16 and the ground node 108. While a load 120 is shown as a part of the outputcircuit 104, the load 1 0 is generally not a part of the output circuit 104 (e.g., generally, the load 120 is external) and is shown herein for the convenience of explanation. The output circuit 104 includes the output node 1 16, wherein an output voltage VOUT is presented by the output circuit 104 at the output node 1 16. The load 120 simply refers to a circuit or device that consumes power from the output node 116. For example, one application of the voltage converter 100 is to provide power to Radio Frequency (RF) circuitry in a user element. Another exemplary application of the voltage converter 100 is for powering Light Emitting Diode (LED) displays. Please note that these applications are considered exemplary and are not limiting. Thus, the load 120 refers to RF circuitry or LED circuitry, in some embodiments.

[0030] The output circuit 104 includes the output node 1 16, the output capacitor 1 18, and the ground node 108. The output capacitor 118 is coupled between the output node 116 and the ground node 108.

[0031] The charging circuit 102 and the output circuit 104 are configured to convert the power source voltage VIN into the output voltage VOUT. In this embodiment, the output voltage VOUT has a non-zero magnitude with a negative polarity. Accordingly, this embodiment of the charging circuit 102 and the output circuit 104 is an inverting voltage conversion circuit, since the input voltage VIN has a positive voltage polarity and the output voltage VOUT has a negative voltage polarity. To do this, the fly inductor IFLY is magnetized by generating a current with the input voltage VIN that increases the intensity of the magnetic field generated by the fly inductor IFLY. The fly capacitor CFLY is then charged by transferring energy from the fly inductor IFLY to the fly capacitor CFLY. The fly capacitor CFLY is discharged to transfer energy from the fly capacitor CFLY to the output node 116 which, thereby, generates the output voltage VOUT. The fly inductor IFLY is demagnetized by opening the path from the inductor node 110 to the power source node 106. During demagnetization of the fly inductor IFLY, the magnetic energy in the fly inductor IFLY is released, thereby decreasing the intensity of the magnetic field generated by the fly inductor IFLY.

[0032] The output capacitor 118 acts as an energy reservoir and absorbs and supplies the charge to reduce periodic amplitude voltage fluctuations (i.e., ripple current) of the output voltage VOIIT. The output capacitor 1 18, the fly inductor IFLY, and fly capacitor CFLY are configured as low-pass filters to reduce voltage ripple and provide a more regulated output voltage VOUT. The output voltage VOIIT is considered a DC voltage despite the ripple voltage in the voltage magnitude.

[0033] The charging circuit 102 is configured to magnetize the fly inductor IFLY with the input voltage VIN. The input voltage VIN thus results in a voltage VIFLY across the fly inductor IFLY. Once the fly inductor IFLY is magnetized, the fly capacitor CFLY is charged by the current from the fly inductor IFLY to the fly capacitor CFLY. The fly capacitor CFLY is coupled to the output node 1 16 and is discharged in order to charge the output capacitor 118 and, thereby, increase the magnitude of the output voltage VOUT. In this manner, the fly capacitor CFLY is configured to present a voltage VCFLY at the switch node 114. By presenting the voltage VCFLY at the switch node 114, the peak magnitude of the current through the fly inductor IFLY is reduced. Furthermore, the root mean squared current through the fly inductor IFLY is also further reduced.

[0034] The switches S1 , S2, S3, S5, S6 are closed and opened in order to magnetize the fly inductor IFLY, demagnetize the fly inductor IFLY, charge the fly capacitor CFLY, and discharge the fly capacitor CFLY. As explained in further detail below, different operating techniques for opening and closing the switches S1 , S2, S3, S5, S6 will result in different operations.

[0035] The voltage converter 100 has a control circuit 121 . The control circuit 121 is configured to generate a control output 122 that is configured to operate the switches S1 , S2, S3, S5, S6. More specifically, the control circuit 121 is configured to generate the control output 122 that opens and closes the switches S1 , S2, S3, S5, S6 in accordance with a switch configuration. As explained below, by switching through different switch configurations, the voltage converter 100 operates as a particular type of voltage converter (i.e., buck, boost, or buck boost converter). In some embodiments, the control circuit 121 is a voltagemode controller, a current mode controller, an average current mode controller, a hysteresis controller, a bang-bang controller, a predictive current controller, a digital controller, an analog controller, an adaptive controller, a voltage feedforward controller, a Proportional-Integral (PI) controller, a Proportional- Integral-Derivative (PID) controller, and / or the like.

[0036] FIG. 1 B illustrates the voltage converter 100 shown in FIG. 1 A with closed circuit paths when the switches S1 , S2, S3, S5, S6 are in different switch configurations.

[0037] More specifically, FIG. 1 B illustrates the voltage converter 100 in four different switch configurations named switch configuration 1 -4. The lines corresponding to each one of the switch configurations 1 -4 are closed circuit paths, thereby indicating which of the switches S1 , S2, S3, S5, S6 are closed. For a particular one of the switch configurations 1 -4, all other switches S1 , S2, S3, S5, S6 that are not provided along a particular line in FIG. 1 B are considered to be open. Table I, shown below, indicates the particular switch state of each of the switches S1 , S2, S3, S5, S6 in each configuration.

[0038] The integer X is an integer that corresponds to a particular switch configuration for the switches S1 , S2, S3, S5, S6. Thus, the integer X has a value of 1 -4 to indicate a particular switch configuration.

[0039] With respect to the voltage converter 100 in FIG. 1 B, the following sentence is completed for each switch configuration 1 -4 in accordance with Table I.

[0040] In switch configuration X, the control circuit 121 is configured to generate the control output 122 such that:• the switch S1 is (Row X, Column S1 Switch State from Table I);• the switch S2 is (Row X, Column S2 Switch State from Table I);• the switch S3 is (Row X, Column S3 Switch State from Table I);• the switch S5 is (Row X, Column S5 Switch State from Table I); and• the switch S6 is (Row X, Column S6 Switch State from Table I).

[0041] In switch configuration 1 , energy from the input voltage VIN at the power source node 106 is utilized to magnetize the fly inductor IFLY. In addition, the fly capacitor CLY is connected to the output node 116 and the fly capacitor CFLY gets discharged to the output node 116. The fly capacitor CFLY therefore delivers charge to the output capacitor 118 and increases the magnitude of the output voltage VOUT (which has a negative voltage polarity). Therefore, the magnitude of the voltage across the fly capacitor CFLY decreases while the magnitude of the output voltage VOUT increases. Furthermore, the magnitude of the inductor current increases.

[0042] In switch configuration 2, the fly capacitor CFLY is charged while the fly inductor IFLY is demagnetized. The magnetic energy in the fly inductor IFLY is transferred as energy in the electric field of the fly capacitor CFLY. The voltage across the fly capacitor CFLY therefore increases while the magnitude of the output voltage VOUT decreases. The magnitude of the inductor current decreases.

[0043] In switch configuration 3, the fly capacitor CFLY is charged and either a) the fly inductor IFLY is magnetized in response to |Vout| < | Vin | , or b) the fly inductor IFLY is demagnetized in response to |Vout| > | Vin |. In response to | Vout| < | Vin | , the inductor current increases. In response to |Vout| > |Vin|, the inductor current decreases. In response to |Vout| < | Vin |, a fly voltage across thefly capacitor CFLY decreases. In response to | Vout| > |Vin|, the fly voltage across the fly capacitor CFLY increases.

[0044] In switch configuration 4, the fly inductor IFLY stores the magnetic energy (with a small loss) while discharging the fly capacitor CFLY into the output node 116. The fly inductor IFLY is shorted. Thus, any magnetic energy in the fly inductor IFLY decays very slowly. As a result, the magnitude of the inductor current of the fly inductor IFLY will decrease slowly. The magnitude of the voltage across the fly capacitor CFLY is equal to the magnitude of the output voltage VOUT at the output node 116, but with the opposite voltage polarity.

[0045] In one buck mode example, the input voltage VIN has a voltage of 4V, the output voltage VOUT is generated at -2V with a load current of 50 mA, the fly inductor IFLY has an inductance of 2.2 pH, and the output capacitor 118 has a capacitance of 10 pF. Thus, the output voltage VOUT is able to regulate to the desired target at -2V.

[0046] In the buck mode example discussed above, the fly inductor IFLY is first magnetized when the control circuit 121 is operated to provide the voltage converter 100 in switch configuration 3. Next, the fly inductor IFLY is demagnetized when the control circuit 121 is operated to provide the voltage converter 100 in switch configuration 2. Subsequently, the fly capacitor CFLY is discharged to transfer charge to the output node 116 in switch configuration 4. This technique allows the output voltage VOUT to reach a voltage magnitude of VOUT = OV, but the technique cannot regulate the output voltage VOUT when the output voltage VOUT is equal to the input voltage VIN or when the output voltage VOUT approaches the input voltage VIN.

[0047] In boost mode, the fly inductor IFLY is first magnetized when the control circuit 121 is operated to provide the voltage converter 100 in switch configuration 1 . In switch configuration 1 , the fly capacitor CFLY is discharged to the output node 116 to charge the output capacitor 1 18. Next, the fly inductor IFLY is demagnetized when the control circuit 121 is operated to provide the voltage converter 100 in switch configuration 3. In switch configuration 3, the fly inductor IFLY is discharged when the control circuit 121 is operated to providethe voltage converter 100 , which charges the fly capacitor CFLY. This technique allows for the output voltage VOUT to be controlled beyond a negative value of the input voltage -VIN (i.e., |VOUT| > | VIN | is allowed). Pulse Frequency Modulation (PFM) methods are made possible by turning off all of the switches51 , S2, S3, S5, S6 or by turning off the switches S1 , S3, S6 but not the switches52, S5.

[0048] FIG. 2A illustrates another embodiment of a voltage converter 200, in accordance with some embodiments.

[0049] The voltage converter 200 includes a charging circuit 202 and an output circuit 204. In FIG. 2A, the output circuit 204 is the same as the output circuit 104 as described above with respect to FIG. 1 A. Furthermore, the charging circuit 202 includes the power source node 106, the inductor node 1 10, the inductor node 1 12, and the switches S1 , S2, S3, as described above with respect to FIG. 1A.

[0050] However, in this embodiment, the charging circuit 202 includes a first capacitive phase 250(1 ) and a second capacitive phase 250(2). The first capacitive phase 250(1 ) includes a switch S4(1 ), a node 113(1 ), a fly capacitor CFLY(1 ), a node 115(1 ), a switch S5(1 ), a switch S6(1 ), and a switch S7(1 ). The node 113(1 ) is a capacitor node on one side of the fly capacitor CFLY(1 ) and the node 115(1 ) is a capacitor node on another side of the fly capacitor CFLY(1 ).

[0051] The switch S4(1 ) is connected between the inductor node 112 and the node 113(1 ). The switch S7(1 ) is coupled between the node 1 13(1 ) and the ground node 108. The fly capacitor CFLY(1 ) is coupled between the node 113(1 ) and the node 115(1 ). The switch S6(1 ) is coupled between the node 1 15(1 ) and the ground node 108. The switch S5(1 ) is coupled between the node 115(1 ) and the output node 116.

[0052] The second capacitive phase 250(2) includes a switch S4(2), a node 1 13(2), fly capacitor CFLY(2), a node 1 15(2), a switch S5(2), a switch S6(2), and a switch S7(2). The node 1 13(2) is a capacitor node on one side of the fly capacitor CFLY(2) and the node 1 15(2) is a capacitor node on another side of the fly capacitor CFLY(2).

[0053] The switch S4(2) is connected between the inductor node 112 and the node 113(2). The switch S7(2) is coupled between the node 1 13(2) and the ground node 108. The fly capacitor CFLY(2) is coupled between the node 113(2) and the node 115(2). The switch S6(2) is coupled between the node 1 15(2) and the ground node 108. The switch S5(2) is coupled between the node 115(2) and the output node 116.

[0054] FIGs. 2B and 2C illustrate the voltage converter 200 shown in FIG. 2A with closed circuit paths when the switches S1 , S2, S3, S4(1 )-S7(1 ), S4(2)-S7(2) are in different switch configurations.

[0055] More specifically, FIGs. 2B and 2C illustrate the voltage converter 200 in six different switch configurations named switch configurations 1 -6. The lines corresponding to each one of the switch configurations 1 -6 are closed circuit paths, thereby indicating which of the switches S1 , S2, S3, S4(1 )-S7(1 ), S4(2)- S7(2) are closed. For a particular one of the switch configurations 1 -6, all other switches S1 , S2, S3, S4(1 )-S7(1 ), S4(2)-S7(2) that are not provided along a particular line in FIGs. 2A and 2B are considered open.

[0056] The integer Yis an integer that corresponds to a particular switch configuration, where Yhas a value of 1 -6 to indicate a particular one of the switch configurations 1 -6. Table II indicates whether a particular one of the switches S1 , S2, S3, S4(1 )-S7(1 ) is opened or closed in the first capacitive phase 250(1 ) in switch configurations 1 -6. Table III indicates whether a particular one of the switches S1 , S2, S3, S4(2)-S7(2) is opened or closed in the second capacitive phase 250(2) in switch configurations 1 -6.

[0057] In switch configuration Y, the control circuit 121 is configured to generate the control output 122 such that:• the switch S1 is (Row Y, Column S1 Switch State from Table II); • the switch S2 is (Row Y, Column S2 Switch State from Table II);• the switch S3 is (Row Y, Column S3 Switch State from Table II);• the switch S4(1 ) is (Row Y, Column S4(1 ) Switch State from Table II);• the switch S5(1 ) is (Row Y, Column S5(1 ) Switch State from Table II);• the switch S6(1 ) is (Row Y, Column S6(1 ) Switch State from Table II); and • the switch S7(1 ) is (Row Y, Column S7(1 ) Switch State from Table II).

[0058] In switch configuration Y, the control circuit 121 is configured to generate the control output 122 such that: • the switch S1 is (Row Y, Column S1 Switch State from Table III);• the switch S2 is (Row Y, Column S2 Switch State from Table III);• the switch S3 is (Row Y, Column S3 Switch State from Table III);• the switch S4(2) is (Row Y, Column S4(2) Switch State from Table III);• the switch S5(2) is (Row Y, Column S5(2) Switch State from Table III);• the switch S6(2) is (Row Y, Column S6(2) Switch State from Table III); and• the switch S7(2) is (Row Y, Column S7(2) Switch State from Table III).

[0059] In switch configuration 1 , the fly inductor IFLY is magnetized in response to |VOUT| < |VIN| and is demagnetized in response to |VOUT| > | VIN |. Energy from the input voltage VIN at the power source node 106 is transferred to the fly capacitor CFLY(1 ) of the first capacitive phase 250(1 ). In response to the fly capacitor CFLY(1 ) being charged to a voltage magnitude greater than the magnitude of the input voltage VIN, the fly inductor IFLY loses energy and is demagnetized. In response to the fly capacitor CFLY(1 ) being charged to a voltage magnitude less than the magnitude of the input voltage VIN, the fly inductor IFLY gains energy and is magnetized. In switch configuration 1 , the fly capacitor CFLY(2) in the second capacitive phase 250(2) is connected between the output node 116 and the ground node 108 and recharges the output capacitor 1 18 to increase the magnitude of the output voltage VOUT.

[0060] In switch configuration 2, the fly inductor IFLY is magnetized and the fly capacitor CFLY(1 ) is connected between the output node 116 and the ground node 108 to recharge the output voltage VOUT. In switch configuration 2, the fly capacitor CFLY(2) in the second capacitive phase 250(2) is connected between the output node 116 and the ground node 108 and recharges the output capacitor 1 18 to increase the magnitude of the output voltage VOUT.

[0061] In switch configuration 3, the fly inductor IFLY is demagnetized and the fly capacitor CFLY(1 ) is recharged in the first capacitive phase 250(1 ) while the fly capacitor CFLY(2) in the second capacitive phase 250(2) discharges to the output node 116. Energy flows from the fly inductor IFLY to the fly capacitor CFLY(1 ) in the first capacitive phase 250(1 ) while energy stored in the fly capacitor CFLY(2) in the second capacitive phase 250(2) is transferred to the output node 116.

[0062] In switch configuration 4, either the inductor current of the fly inductor IFLY is recirculated through the switches S2, S3 or the inductor current of the fly inductor IFLY is held at or near zero. Additionally, both of the fly capacitors CFLY(1 ), CFLY(2) are discharged into the output node 116.

[0063] In switch configuration 5, the fly inductor IFLY is magnetized in response to |VOUT| < |VIN| and is demagnetized in response to |VOUT| > | VIN |. Energy from the input voltage VIN at the power source node 106 is transferred to the fly capacitor CFLY(2) of the second capacitive phase 250(2). In response to the fly capacitor CFLY(2) being charged to a voltage magnitude greater than the magnitude of the input voltage VIN, the fly inductor IFLY loses energy and is demagnetized. In response to the fly capacitor CFLY(2) being charged to a voltage magnitude less than the magnitude of the input voltage VIN, the fly inductor IFLY gains energy and is magnetized. In switch configuration 5, the fly capacitor CFLY(1 ) in the first capacitive phase 250(1 ) is connected between the output node 116 and the ground node 108 and recharges the output capacitor 1 18 to increase the magnitude of the output voltage VOUT.

[0064] In switch configuration 6, the fly inductor IFLY is demagnetized and recharges the fly capacitor CFLY(2) in the second capacitive phase 250(2) while the fly capacitor CFLY(1 ) in the first capacitive phase 250(1 ) is discharged into the output node 116. Energy flows from the fly inductor IFLY to the fly capacitor CFLY(2) in the second capacitive phase 250(2) while energy stored in fly capacitor CFLY(1 ) of the first capacitive phase 250(1 ) is transferred to the output node 116.

[0065] Switch configurations 1 -6 can be combined in different orders and with different duty cycles to provide buck, boost, and buck-boost modes of operation.

[0066] With reference to FIG. 3, the concepts described above may be implemented in various types of user elements 300, such as mobile terminals, smart watches, tablets, computers, navigation devices, access points, and like wireless communication devices that support wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, and near field communications. The user element 300 will generally include a control system302, a baseband processor 304, transmit circuitry 306, receive circuitry 308, antenna switching circuitry 310, multiple antennas 312, and user interface circuitry 314. In a non-limiting example, the control system 302 may be a field- programmable gate array (FPGA) or an application-specific integrated circuit (ASIC). In this regard, the control system 302 may include at least microprocessor(s), embedded memory circuit(s), and communication bus interface(s). The receive circuitry 308 receives radio frequency signals via the antennas 312 and through the antenna switching circuitry 310 from one or more base stations. A low noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing.Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using analog-to-digital converter(s) (ADC).

[0067] The baseband processor 304 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 304 is generally implemented in one or more digital signal processors (DSPs) and ASICs.

[0068] For transmission, the baseband processor 304 receives digitized data, which may represent voice, data, or control information, from the control system 302, which it encodes for transmission. The encoded data is output to the transmit circuitry 306, where a digital-to analog (DAC) converter converts the digitally encoded data into an analog signal and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated carrier signal to a level appropriate for transmission and deliver the modulated carrier signal to the antennas 312 through the antenna switching circuitry 310. The multiple antennas 312 and the replicated transmit and receive circuitries 306, 308 mayprovide spatial diversity. Modulation and processing details will be understood by those skilled in the art.

[0069] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

ClaimsWhat is claimed is:1 . A voltage converter, comprising: an output capacitor coupled to an output node, wherein an output voltage is generated at the output node; and a charging circuit coupled to the output node, the charging circuit comprising: a fly capacitor; a fly inductor; a power source node configured to receive an input voltage; and a set of switches configured to: magnetize the fly inductor in at least one switch configuration with the input voltage; energize the fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the fly capacitor; and transfer the energy from the fly capacitor to the output node in at least one switch configuration.

2. The voltage converter of claim 1 , wherein the set of switches is further configured to demagnetize the fly inductor in at least one switch configuration.

3. The voltage converter of claim 1 , wherein the set of switches comprises a switch configured to be closed so that the energy from the fly capacitor is transferred to the output node.

4. The voltage converter of claim 3, wherein the switch is a first switch having a first switch node and a second switch node, wherein the first switch node is coupled to the output capacitor, the set of switches further comprising a second switch coupled between the second switch node and ground.

5. The voltage converter of claim 1 , wherein the set of switches comprises: a first switch coupled between the power source node and a first inductor node of the fly inductor, wherein a second inductor node of the fly inductor is coupled to the fly capacitor.

6. The voltage converter of claim 5, wherein the fly capacitor is coupled between the second inductor node and the first switch.

7. The voltage converter of claim 6, wherein the set of switches further comprises: a second switch coupled between the first inductor node and ground.

8. The voltage converter of claim 7, wherein the set of switches further comprises: a third switch coupled between the second inductor node and ground.

9. The voltage converter of claim 8, wherein the set of switches further comprises a fourth switch coupled between the second inductor node and the fly capacitor.

10. The voltage converter of claim 1 , wherein the fly capacitor is a first fly capacitor, wherein: the charging circuit is coupled to the output node, the charging circuit further comprising a second fly capacitor, wherein: the set of switches is further configured to: energize the second fly capacitor in at least one switch configuration by transferring the energy from the fly inductor to the second fly capacitor; and transfer the energy from the second fly capacitor to the output node in at least one switch configuration.1 1 . The voltage converter of claim 10, wherein the set of switches is further configured to demagnetize the fly inductor in at least one switch configuration.

12. The voltage converter of claim 10, wherein the set of switches comprises: a first switch configured to be closed so that the energy from the first fly capacitor is transferred to the output node; and a second switch configured to be closed so that the energy from the second fly capacitor is transferred to the output node.

13. The voltage converter of claim 12, wherein: the first switch has a first switch node and a second switch node, wherein the first switch node is coupled to the output capacitor; the second switch has a third switch node and a fourth switch node, wherein the third switch node is coupled to the output capacitor; and the set of switches further comprising: a third switch coupled between the second switch node and ground; and a fourth switch coupled between the fourth switch node and ground.

14. The voltage converter of claim 10, wherein the set of switches comprises: a first switch coupled between the power source node and a first inductor node of the fly inductor, wherein a second inductor node of the fly inductor is coupled to the first fly capacitor; and a second switch coupled between the power source node and the first inductor node of the fly inductor, wherein the second inductor node of the fly inductor is coupled to the second fly capacitor.

15. The voltage converter of claim 14, wherein: the first fly capacitor is coupled between the second inductor node and the first switch; andthe second fly capacitor is coupled between the second inductor node and the first switch.

16. The voltage converter of claim 15, wherein the set of switches further comprises: a third switch coupled between the first inductor node and ground.

17. The voltage converter of claim 16, wherein the set of switches further comprises: a fourth switch coupled between the second inductor node and ground.

18. The voltage converter of claim 17, wherein the set of switches further comprises: a fifth switch coupled between the second inductor node and the first fly capacitor; and a sixth switch coupled between the second inductor node and the second fly capacitor.

19. A method of converting an input voltage into an output voltage, the method comprising: magnetizing a fly inductor with the input voltage; energizing a fly capacitor by transferring energy from the fly inductor to the fly capacitor; and transferring the energy from the fly capacitor to an output node in at least one switch configuration, wherein the output voltage is generated at the output node and an output capacitor is coupled to the output node.

20. A user element, the user element comprising a voltage converter, wherein the voltage converter comprises: an output capacitor coupled to an output node, wherein an output voltage is generated at the output node; anda charging circuit coupled to the output node, the charging circuit comprising: a fly capacitor; a fly inductor; a power source node configured to receive an input voltage; and a set of switches configured to: magnetize the fly inductor in at least one switch configuration with the input voltage; energize the fly capacitor in at least one switch configuration by transferring energy from the fly inductor to the fly capacitor; and transfer the energy from the fly capacitor to the output node in at least one switch configuration.

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