High bandwidth ge avalanche photodiode bearing high responsivities

Abstract

A high-bandwidth Germanium, Ge, Avalanche Photodiode, APD, (100, 200) includes a silicon-on-insulator, SOI, layer (14); a Ge slab (20) on the SOI layer (14); a photodiode region (104) configured to absorb photons and generate carriers from an optical signal; an intrinsic multiplication region (102) configured to amplify the optical signal through avalanche multiplication for high responsivity; and a plurality of electrodes (22, 24, 106), wherein first and second electrodes (22, 24) apply a reverse bias across the photodiode region (104), and a third electrode (106) provides an additional bias in the intrinsic multiplication region (102). The electrodes (22, 24) apply a reverse bias across the photodiode section (104), and the electrode (106) provides an additional bias in the intrinsic multiplication region (102).

Description

High Bandwidth Ge Avalanche Photodiode Bearing High ResponsivitiesCROSS-REFERENCE

[0001] The present disclosure claims priority to U.S. Provisional Patent Application No. 63 / 614,484, filed December 22, 2023, the contents of which are incorporated by reference in their entirety.FIELD OF THE DISCLOSURE

[0002] The present disclosure relates generally to semiconductor devices. More particularly, the present disclosure relates to a high bandwidth Germanium (Ge) Avalanche Photodiode (APD) bearing high responsivities.BACKGROUND OF THE DISCLOSURE

[0003] An Avalanche Photodiode (APD) is a specialized semiconductor device designed to convert incoming light into an electrical signal. APDs are widely utilized in various applications, including as optical receivers in optical communication systems. With the rapid expansion of networks and increasing demand for higher data transmission rates, optical communication systems are trending toward higher bandwidths. Achieving exceptionally high bandwidths, such as 50 GHz or greater, presents significant challenges when using APDs. At these high frequencies, the optical signal experiences noticeable attenuation, which can adversely impact system performance. Responsivity, a key parameter of photodetectors, is defined as the ratio of the electrical output signal to the optical input signal, effectively measuring the input-output gain of the device. To support higher bandwidths, improvements in the core photodiode structure are necessary to enhance its frequency response, which directly affects responsivity. Additionally, amplification of the electrical signal generated by the APD may be required to compensate for inherent losses at high frequencies. Therefore, achieving higher bandwidth necessitates advancements in APD design, signal amplification techniques, or a combination of both.BRIEF SUMMARY OF THE DISCLOSURE

[0004] The present disclosure relates to high-bandwidth Germanium (Ge) Avalanche Photodiodes (APDs) with high responsivities and mitigated impact on Radio Frequency (RF) response. Novel semiconductor arrangements within the APD are provided that enhance signal amplification through the process of avalanche multiplication. Avalanche multiplication improves responsivity by leveraging a high electric field to accelerate charge carriers, triggering impact ionization and generating additional electron-hole pairs. The disclosure presents two example embodiments: a horizontal APD and a vertical APD, each employing distinct structural arrangements but both aimed at achieving high responsivity with preserved RF bandwidth. These designs build upon existing APD technologies, incorporating additional fabrication steps to optimize performance.

[0005] In the horizontal APD, the avalanche multiplication region is integrated laterally alongside the Ge photodetection region and includes a thin layer of intrinsic Silicon (Si). This lateral configuration is critical in maintaining a compact device structure that reduces capacitance, which directly impacts the RF response. An electrical contact strategically differentiates the electric field between the photodetection and multiplication regions, ensuring efficient separation and optimization of both processes. The electric field within the multiplication region is precisely modulated by the intrinsic width of the Si layer and its total surface area, which are shaped using a non-linear implantation scheme. By aligning the photodetection and avalanche electric fields in series, the device achieves a streamlined charge carrier flow. Additionally, the series connection of the capacitive effects from the photodetection and multiplication regions reduces the overall capacitance, enhancing high- frequency operation. This design not only improves responsivity through avalanche multiplication but also ensures minimal impact on RF performance by maintaining a low RC time constant.

[0006] In the vertical APD, the avalanche multiplication region is positioned directly above the Ge photodetection region, creating a compact and efficient vertical configuration. This region includes a thin layer of intrinsic crystal Si, which is grown using advanced local and selective epitaxy techniques to ensure high material quality and precise layer control. The vertical structure aligns the photodetection and avalanche electric fields, facilitating efficient carrier multiplication and collection while minimizing transit time, which is critical forpreserving RF bandwidth. To enhance charge collection, highly doped polycrystalline or crystalline Si is deposited in situ to rapidly extract carriers from the multiplication region, reducing recombination losses and maintaining high-speed performance. An intermediate thin layer of doped Ge is introduced to regulate the differential bias between the photodetection and multiplication regions, allowing precise control of the electric fields. This controlled biasing ensures optimal avalanche multiplication without compromising the RF response.

[0007] Both the horizontal and vertical APD designs leverage avalanche multiplication to achieve high responsivity while addressing challenges associated with capacitance, noise, and high-frequency performance. These approaches demonstrate how precise material engineering, electric field modulation, and advanced manufacturing techniques can be combined to meet the demands of modern high-speed optical communication systems.BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present disclosure is detailed through various drawings, where like components or steps are indicated by identical reference numbers for clarity and consistency.

[0009] FIGS. 1 and 2 illustrate a conventional Avalanche Photodiode (APD) 10, with FIG. 1 providing a cross-sectional view and FIG. 2 showing a top-down perspective.

[0010] FIGS. 3 to 5 illustrate a high-bandwidth Germanium (Ge) horizontal Avalanche Photodiode (APD) 100. FIG. 3 illustrates a cross-sectional view of the APD, showcasing its structural design. FIG. 4 illustrates a detailed cross-sectional diagram, highlighting key parameters and dimensions of the APD. FIG. 5 illustrates a top-down view, illustrating the layout and arrangement of the device components.

[0011] FIG. 6 illustrates a cross-sectional diagram of an alternative embodiment of the high-bandwidth Ge horizontal APD, featuring a variation in the doping configuration beneath the electrode (A).

[0012] FIG. 7 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge horizontal APD, featuring a design variation where the multiplication region is located on the n-side of the photodiode.

[0013] FIG. 8 illustrates another embodiment of the high-bandwidth Ge horizontal APD, expanding on the design where the multiplication region is positioned on the n-side of the photodiode in FIG. 7.

[0014] FIG. 9 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge horizontal APD, incorporating advanced design modifications to further improve performance and fabrication robustness.

[0015] FIG. 10 illustrates a top view diagram of another embodiment of the high- bandwidth Ge horizontal APD, showcasing a flexible approach to designing the intrinsic regions of both the multiplication and PIN sections.

[0016] FIGS. 11 and 12 illustrate a high-bandwidth Germanium (Ge) vertical Avalanche Photodiode (APD), showcasing a design optimized for high-speed operation and enhanced responsivity. FIG. 11 illustrates a cross-sectional diagram of a high-bandwidth Germanium (Ge) vertical Avalanche Photodiode (APD), and FIG. 12 illustrates a detailed cross-sectional view of the vertical APD, highlighting its key parameters and dimensions.

[0017] FIG. 13 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge vertical APD, featuring the addition of a thin silicide layer on key conductive regions.

[0018] FIG. 14 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge vertical APD, featuring the addition of a Silicon Nitride (SiN) layer as a Contact Etch Stop Layer (CESL).DETAILED DESCRIPTION OF THE DISCLOSURE

[0019] The present disclosure focuses on high-bandwidth Germanium (Ge) Avalanche Photodiodes (APDs) designed to achieve high responsivities while minimizing the impact on Radio Frequency (RF) performance. This is accomplished through novel semiconductor arrangements that leverage avalanche multiplication, a process in which a high electric fieldinduces impact ionization, generating additional charge carriers and amplifying the photodetection signal. This approach balances the need for increased responsivity with the stringent requirements of high-speed performance essential for RF applications. In particular, the arrangement includes three electrodes with two electrodes each focusing solely on providing either a reverse bias for photodetection in a photodiode section or for avalanche multiplication in an intrinsic multiplication region, and with a third common electrode that is used for both the reverse bias and the avalanche multiplication.

[0020] The disclosure presents two example APD configurations: a horizontal APD and a vertical APD, each with unique structural and operational advantages. Both designs represent significant advancements over conventional APDs by integrating additional manufacturing steps and incorporating innovative process strategies to optimize performance. These configurations specifically address challenges such as capacitance, electric field control, and noise, ensuring superior device performance across a wide range of optical communication applications.

[0021] In the horizontal APD, the avalanche multiplication region is fabricated laterally adjacent to the Ge photodetection region and includes a thin layer of intrinsic Silicon (Si). This lateral configuration is carefully engineered to localize the high electric field required for avalanche multiplication within a confined area, ensuring efficient signal amplification without introducing excessive parasitics. An electrical contact is strategically positioned to differentiate the electric fields between the photodetection and multiplication regions, enabling independent optimization of both processes.

[0022] The multiplication field is modulated by two critical factors: the intrinsic width of the Si layer and its total surface area, both of which are precisely controlled through a nonlinear implantation scheme. This modulation ensures that the avalanche process is both efficient and uniform, preventing localized breakdowns that could degrade device reliability. By aligning the photodetection and avalanche electric fields in series, the design achieves a streamlined carrier flow, reducing overall transit time and maintaining high-speed operation. Furthermore, the capacitive effects of the two intrinsic regions are connected in series, resulting in a significantly reduced overall capacitance. This reduction enhances the APD's RF response, making the horizontal configuration ideal for applications requiring both high responsivity and bandwidth.

[0023] In the vertical APD, the avalanche multiplication region is positioned directly above the Ge photodetection region, creating a compact and vertically stacked structure. The amplification region comprises a thin layer of intrinsic crystalline Si, grown using local and selective epitaxy. This precise growth technique ensures a high-quality Si layer with minimal defects, which is critical for efficient avalanche multiplication. Moreover, the epitaxial growth technique used to generate the intrinsic multiplication region is very powerful to achieve high thickness accuracy and reproducibility. Thus, such device fabrication is very robust and reliable. The vertically aligned structure inherently aligns the photodetection and avalanche electric fields, enhancing carrier motion and reducing transit delays.

[0024] To further optimize charge collection, in-situ deposited polycrystalline Si is highly doped and integrated into the design. This layer ensures rapid extraction of carriers from the multiplication region, minimizing recombination losses and preserving signal integrity at high frequencies. Additionally, an intermediate thin layer of doped Ge is introduced to precisely control the differential bias between the photodetection and multiplication regions. This configuration allows independent optimization of the electric fields, ensuring efficient photodetection while enabling higher biasing in the multiplication region for enhanced avalanche gain. The vertical APD design's compactness and efficient charge handling make it particularly suited for high-density, high-performance optical communication systems.

[0025] These innovative horizontal and vertical APD designs exemplify advanced solutions that enhance responsivity through avalanche multiplication while maintaining excellent RF performance. By addressing critical challenges such as capacitance, field control, and carrier dynamics, the disclosed configurations provide a robust foundation for next-generation high-speed photodetectors. In an embodiment, these horizontal and vertical APD designs contemplate use in a Passive Optical Network (PON), in a receiver supporting wavelengths in the C-Band and / or L-Band and / or O-Band.Conventional APD

[0026] FIGS. 1 and 2 illustrate a conventional Avalanche Photodiode (APD) 10, with FIG.1 providing a cross-sectional view and FIG. 2 showing a top-down perspective. The APD 10 includes a buried oxide (BOX) layer 12 for electrical isolation, a silicon-on-insulator (SOI) layer 14 interspersed with SiO2gap-filled portions 16 for structural support, and a SiO2layer18 serving as an insulating and protective layer. Embedded within the SiO2layer is a Ge slab 20, which acts as the photodetection region. Electrical connections are established through two electrodes, 22 and 24. The SOI layer 14 is strategically doped with various concentrations of p-type and n-type impurities, labeled as p++, p+, n+, and n++, to form the p-n junctions required for photodetection and avalanche multiplication. On the doped Si surface, a layer of intrinsic Ge (i-Ge) 26 is grown epitaxially to absorb photons and convert them into electron-hole pairs. To create an electrical link between the Ge and Si layers, a portion of the Ge is doped with n-type impurities, forming an n+ Ge region 28. Additionally, the APD features two optical input ports, 30 and 32, designed to guide incident light into the photodiode, maximizing photon absorption efficiency.

[0027] The Ge slab 20 includes a conductive channel formed by implanting one sidewall of the Ge with dopants, matched with the same dopant type in the adjacent Si layer. This configuration creates a continuous conductive pathway extending from the top surface of the Ge slab 20, along its sidewall, and onto the Si top surface. This conductive channel enhances carrier transport and delocalizes the electrical contact from the top of the Ge slab to the lateral Si section, reducing localized electric field concentrations and improving device reliability. The topographical epitaxial growth of the Ge layer eliminates the need for a buried Ge section, simplifying the design and focusing the electric field on the critical regions of the device.

[0028] The conventional APD 10 design faces notable challenges with responsivity at high RF frequencies. The vertical geometry of the Ge slab and sidewall conductive channel contribute to significant parasitic capacitance, limiting bandwidth and slowing high-frequency response. A relatively thick intrinsic Ge absorption layer and extended conductive channel increase carrier transit time, further degrading performance. Non-uniform electric field distribution reduces avalanche multiplication efficiency, while strain at the Ge-Si interface introduces inconsistencies in carrier mobility and dark current. Additionally, limited flexibility in modulating electric fields hinders avalanche gain optimization because the dark current is amplified as much as the signal, and suboptimal alignment of optical input ports diminishes photon absorption efficiency. These factors collectively constrain the device's high- frequency performance. Responsivity is also impacted due to the poor signal-to-noise ratio (SNR) .High bandwidth Ge horizontal APD

[0029] FIGS. 3 to 5 illustrate a high-bandwidth Germanium (Ge) horizontal Avalanche Photodiode (APD) 100. FIG. 3 illustrates a cross-sectional view of the APD 100, showcasing its structural design. FIG. 4 illustrates a detailed cross-sectional diagram, highlighting key parameters and dimensions of the APD 100. FIG. 5 illustrates a top-down view, illustrating the layout and arrangement of the device components. These figures collectively provide a comprehensive visual representation of the high-bandwidth Ge horizontal APD's 100 design and operational framework.

[0030] Similar to the APD 10, the APD 100 includes buried oxide (BOX) layer 12 for electrical isolation, a silicon-on-insulator (SOI) layer 14 interspersed with SiO2gap-filled portions 16 for structural support, and a SiO2layer 18 serving as an insulating and protective layer. Also, similar to the APD 10, the APD 100 includes the SOI layer 14 which is strategically doped with various concentrations of p-type and n-type impurities, labeled as p++, p+, n+, and n++, to form the p-n junctions required for photodetection and avalanche multiplication. On the doped Si surface, a layer of intrinsic Ge (i-Ge) 26 is grown epitaxially to absorb photons and convert them into electron-hole pairs. To create an electrical link between the Ge and Si layers, a portion of the Ge is doped with n-type impurities, forming an n+ Ge region 28.

[0031] In contrast to the conventional APD 10, the high-bandwidth Ge horizontal APD 100 incorporates significant design improvements to enhance performance. A key feature is the inclusion of an intrinsic region (2) 102 within the electrically conductive channel on the lateral part of the APD 100. This region 102 is carefully fabricated by excluding dopant implantation, ensuring an undisturbed electric field for optimized avalanche multiplication. Additionally, the APD 100 introduces an extra electrode (C) 106, positioned on the intermediate p+ doping region. This modification results in a three-electrode configuration, comprising electrodes (A) 22, (B) 24, (C) 106.

[0032] The operating principle of this three-electrode design is based on the creation of a potential divider. The potential applied to electrodes (A) 22 and (B) 24 is modulated by the intermediate bias applied to electrode (C) 106. This configuration enables independent biasing of the photodiode region (1 ) 104, which is a photodetection region, and the intrinsicmultiplication region (2) 102, which is an amplification region. As a result, the electric field strength required for efficient carrier transit in the detector region can be decoupled from the field strength needed to induce avalanche carrier multiplication. This decoupling allows for precise optimization of transit time without compromising the efficiency of charge multiplication, significantly improving the APD's 100 high-speed performance and responsivity. Moreover, it also ensures a good SNR.

[0033] When the intrinsic Ge region (2) 102 is illuminated, incoming photons generate free carriers (electron-hole pairs). These carriers are accelerated towards the doped regions located on the top and bottom of the intrinsic Ge region 26, driven by the applied electric field. Once the charges reach the intrinsic Silicon (Si) region, they encounter a much stronger electric field, which further accelerates them. This high-energy acceleration conveys sufficient energy to the charges, enabling them to knock electrons from the crystal lattice, initiating impact ionization and resulting in charge multiplication.

[0034] By localizing the avalanche multiplication to the intrinsic Si region and independently optimizing the electric fields, the APD 100 achieves a balance between highspeed performance and efficient carrier multiplication, overcoming many limitations of conventional APD 10 designs. This design innovation ensures suitability for demanding optical communication and sensing applications.

[0035] FIG. 4 illustrates example dimensions and parameters of the high-bandwidth Ge horizontal APD 100. These dimensions are carefully optimized to balance responsivity, RF performance, and device reliability. The parameters and their typical ranges are as follows:

[0036] (1) Width 150 of the Ge Slab 20 with a typical range of 0.1 - 8.0 pm -- This dimension defines the lateral extent of the Ge slab 20, which serves as the primary photodetection region. The width 150 directly impacts the photon absorption capacity and responsivity. A wider Ge slab 20 increases the effective photon absorption area but can also introduce additional capacitance, which must be carefully managed for high RF performance.

[0037] (2) Thickness 152 of the Ge Slab 20 with a typical range of 0.05 - 3.0 pm -- The thickness 152 of the Ge slab 20 affects the photon absorption depth. Thicker slabs allow for higher photon absorption, especially for longer wavelengths, but can increase carrier transittime, potentially degrading high-frequency performance. For high-speed applications, the thickness is often minimized while maintaining adequate absorption efficiency.

[0038] (3) Width 154 of Intrinsic Si in the PIN Junction with a typical range of 0.05 - 7.5 pm -- This parameter determines the size of the intrinsic Si layer in the PIN junction, which is responsible for initial carrier collection. Wider intrinsic Si regions help reduce series resistance and improve electric field uniformity but can increase device capacitance, affecting bandwidth.

[0039] (4) Width 156 of Intrinsic Si in the Avalanche Section with a typical range of 0.01- 1.5 pm - This dimension defines the width of the intrinsic Si region where avalanche multiplication occurs. Narrower regions enable stronger electric fields, enhancing multiplication efficiency while minimizing noise. However, very narrow widths may increase the risk of breakdown or non-uniform field distribution.

[0040] FIG. 5 focuses on the lateral dimensions and surface characteristics of the horizontal APD 100, which influence the overall responsivity and device efficiency. The parameters are as follows:

[0041] (1 ) Length 160 of the Ge Slab 20 with a typical range of 3.0 - 50.0 pm - The Ge slab 20 length determines the photon absorption path. Longer lengths increase the absorption efficiency and responsivity but also contribute to higher series resistance and potentially slower carrier transit times. The optimal length is determined by balancing these factors with the desired operating frequency.

[0042] (2) Effective Surface 162 of the Intrinsic Region -- The effective surface area of the intrinsic region directly impacts the multiplication gain and capacitance of the APD 100. By increasing the surface area, the device can achieve higher multiplication efficiency. However, a larger area can also lead to higher capacitance, requiring precise tuning for optimal high-frequency operation.

[0043] The parameters of the horizontal APD 100 can be finely tuned based on the target specifications, including frequency cutoff, responsivity, and operating bias.

[0044] Series Resistance and Capacitance: Adjusting the width, length, and thickness of the Ge slab 20, as well as the intrinsic Si regions, allows control over the series resistanceand capacitance. Lower series resistance improves signal speed, while optimized capacitance ensures minimal impact on RF performance.

[0045] Transit Time: Minimizing the transit time is crucial for high-frequency operation. This can be achieved by reducing the thickness of the Ge slab 20 and carefully modulating the electric field in the intrinsic regions to accelerate carrier motion.

[0046] Avalanche Section Optimization: Beyond adjusting the width of the intrinsic Si in the avalanche section, the design can incorporate increased surface area of the intrinsic region to enhance charge multiplication. This tuning impacts both the multiplication gain and the capacitance of the APD 100, allowing customization for specific bandwidth and responsivity requirements.

[0047] FIG. 6 illustrates a cross-sectional diagram of an alternative embodiment of the high-bandwidth Ge horizontal APD 100, featuring a variation in the doping configuration beneath the electrode (A) 22. In this design, n++ doping is used instead of p++ doping, requiring a corresponding adjustment in bias polarity to ensure proper electric field alignment. This change impacts the behavior of the device by altering the type of dominant charge carriers in the region, which can influence key performance metrics such as responsivity and high-frequency operation.

[0048] The adjustment in doping and polarity affects several aspects of the APD's 100 performance. The local electric field distribution is modified, potentially optimizing or altering carrier transit time and avalanche multiplication efficiency. Additionally, the electrical contact between the electrode 22 and the n++-doped region may exhibit different resistance characteristics compared to a p++-doped region, which could influence overall device efficiency. Furthermore, the avalanche threshold voltage may shift, affecting the biasing range necessary to achieve optimal multiplication.

[0049] FIG. 7 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge horizontal APD 100, featuring a design variation where the multiplication region is located on the n-side of the photodiode. While the overall operating principle remains similar — where photons absorbed in the intrinsic Ge region generate electron-hole pairs that are accelerated through electric fields into the multiplication region — this configuration provides additional flexibility to optimize the device for specific performancetargets. By placing the multiplication region on the n-side, the design can specifically target the saturation velocities of either electrons or holes, depending on the desired operational characteristics.

[0050] Saturation velocity, the maximum speed at which carriers can travel under high electric fields, differs for electrons and holes due to their material properties. Electrons, with higher saturation velocities, are more suitable for applications demanding ultra-high bandwidth and fast response times, ensuring efficient carrier transit and rapid signal generation. Conversely, targeting the slower-moving holes may be advantageous in applications where noise performance or specific responsivity profiles are prioritized. This flexibility allows the device to be customized for various applications, such as high-speed optical communication or scenarios where noise minimization is critical.

[0051] FIG. 8 illustrates another embodiment of the high-bandwidth Ge horizontal APD 100, expanding on the design where the multiplication region is positioned on the n-side of the photodiode in FIG. 7. In this configuration, the choice of dopants — n++ or p++ — in the multiplication region plays a pivotal role in determining the device's performance characteristics. Switching between n++ and p++ dopants provides flexibility in optimizing the device for specific operational requirements. When n++ doping is used, electrons become the dominant carriers in the multiplication process. Due to their higher saturation velocity compared to holes, this configuration is particularly suitable for applications requiring ultra- high-speed operation and minimal transit time, as the faster carrier transit supports high- frequency performance. Conversely, when p++ doping is employed, holes are the primary carriers. This setup is beneficial for applications where noise reduction is a priority, as the slower-moving holes help balance multiplication gain with noise suppression.

[0052] The choice of dopants also influences other critical device parameters. For instance, the dopant type affects the electric field distribution within the multiplication region, necessitating careful control of doping levels and field alignment to ensure efficient carrier acceleration while minimizing breakdown risks. Additionally, the breakdown voltage required for avalanche multiplication varies with the dopant type, allowing the device to be tuned for different operating conditions and power requirements. Changes in doping can also impact the series resistance and capacitance of the APD 100, both of which are vital for optimizing RF response and high-speed operation.

[0053] FIG. 9 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge horizontal APD 100, incorporating advanced design modifications to further improve performance and fabrication robustness. Two key enhancements are considered in this embodiment:

[0054] (1) Addition of a Silicide Layer 180 on the Ge slab 20 -Introducing a silicide layer to the APD 100 structure is a highly effective method for reducing both contact resistance and sheet resistance. Silicide, a compound formed between silicon and a transition metal, creates a low-resistance interface between the electrodes and the underlying doped silicon or germanium layers. This reduction in contact resistance is critical for improving carrier injection efficiency and minimizing power losses, particularly in high-speed applications where low resistance is essential for preserving RF performance. Furthermore, the silicide layer reduces sheet resistance across the doped regions, ensuring a uniform current flow and enhancing the device's overall reliability and efficiency.

[0055] (2) Incorporation of a Silicon Nitride (SiN) Contact Etch Stop Layer (CESL) 182:Adding a SiN CESL serves as a protective and functional layer during the fabrication process. This layer acts as a barrier to prevent over-etching or damage to the underlying layers during the contact etching process, making the fabrication more robust and precise. The CESL ensures that the etching process maintains the structural integrity of the Ge and Si layers, which is particularly important for preserving the delicate intrinsic regions of the APD. Additionally, the CESL can help reduce stress and improve mechanical stability, contributing to the long-term reliability of the device.

[0056] FIG. 10 illustrates a top view diagram of another embodiment of the high- bandwidth Ge horizontal APD 100, showcasing a flexible approach to designing the intrinsic regions of both the multiplication and PIN sections. In this embodiment, the intrinsic regions are not restricted to a fixed shape or uniform dimensions but can be customized to meet specific product requirements and performance goals. The intrinsic regions can be designed in various shapes and configurations, such as periodic or aperiodic patterns, to optimize the optical and electrical properties of the APD 100. Periodic designs can improve uniformity in avalanche multiplication and carrier transit, while aperiodic patterns may be tailored for specific optical coupling needs or irregular light distributions. Additionally, the width of the intrinsic regions can vary along the length of the device, allowing for further optimization. Aconstant width may be employed for consistent performance across the device, while a variable width can be utilized to enhance specific aspects of device behavior, such as responsivity, gain, or bandwidth.

[0057] The APD 100 was designed, fabricated, and tested, and the device was operational, and an avalanche effect was observed, resulting in approximately a twofold increase in responsivity. The APD 100 can include a potential divider, i.e., the electrode (C) 106 that contributes to avalanche and reverse bias. This component enables precise control of the bias applied to the photodetection and multiplication regions, allowing for a low bias in the former and a higher bias in the latter.High bandwidth Ge vertical APD

[0058] FIGS. 11 and 12 illustrate a high-bandwidth Germanium (Ge) vertical Avalanche Photodiode (APD) 200, showcasing a design optimized for high-speed operation and enhanced responsivity. FIG. 11 illustrates a cross-sectional diagram of a high-bandwidth Germanium (Ge) vertical Avalanche Photodiode (APD) 200, and FIG. 12 illustrates a detailed cross-sectional view of the vertical APD 200, highlighting its key parameters and dimensions.

[0059] Similar to the APDs 10, 100, the APD 200 includes buried oxide (BOX) layer 12 for electrical isolation, a silicon-on-insulator (SOI) layer 14 interspersed with SiO2gap-filled portions 16 for structural support, and a SiO2layer 18 serving as an insulating and protective layer. Also, similar to the APDs 10, 100, the APD 200 includes the SOI layer 14 which is strategically doped with various concentrations of p-type and n-type impurities, labeled as p++, p+, n+, and n++, to form the p-n junctions required for photodetection and avalanche multiplication. On the doped Si surface, a layer of intrinsic Ge (i-Ge) 26 is grown epitaxially to absorb photons and convert them into electron-hole pairs. To create an electrical link between the Ge and Si layers, a portion of the Ge is doped with n-type impurities, forming an n+ Ge region 28. Also, similar to the APD 100, the APD 200 includes the three contacts (A) 22, (B) 24, (C) 106.

[0060] Unlike the horizontal APD 100, the vertical APD 200 employs a stacked structure, with the photodiode region (1 ) 104 and intrinsic multiplication region (2) 102 alignedvertically. This alignment reduces the device footprint, making it particularly suitable for high- density integration in photonic systems.

[0061] The fabrication process of the high-bandwidth Ge vertical APD 200 involves a series of precision steps to achieve the optimized structure. Initially, the silicon-on-insulator (SOI) layer 14 is implanted with various concentrations of p-type and n-type dopants, creating the foundation for forming the p-n junctions required for photodetection. On this doped surface, Germanium (Ge) is grown epitaxially to form the Ge slab 20, which acts as the primary photodetection region, i.e., the photodiode region (1 ) 104. To ensure effective electrical coupling between the Ge and Si layers, the Ge slab 20 is implanted with n-type dopants, forming an n-doped region that establishes a robust electrical link with the Si substrate.

[0062] The Ge layer is then capped with a dielectric material, such as SiO2or SiN, to provide insulation and environmental protection. A window is etched into the dielectric layer to expose the top surface of the Ge slab. Onto this exposed surface, a selective epitaxial growth of intrinsic Silicon (Si) 204 is performed. This intrinsic Si region 204 forms the core of the avalanche multiplication zone, i.e., the intrinsic multiplication region (2) 102. Finally, an in-situ doped polycrystalline Si layer 206 is deposited and patterned to create the necessary electrical contacts and enhance charge collection. This layered structure ensures that the device can efficiently support both photodetection and avalanche multiplication while maintaining structural and electrical stability.

[0063] The high-bandwidth Ge vertical APD 200 operates through the application of a reverse bias across the PIN diode using electrodes (A) 22, (B) 24, which generates an electric field within the photodiode region (1 ) 104. When light enters the device, the Ge slab 20 absorbs photons in the detection zone, generating a photocurrent including free electronhole pairs. These carriers are accelerated by the electric field toward the doped regions, where they are efficiently collected.

[0064] To achieve avalanche multiplication, a higher bias is applied to the contact (C) 106, creating a significantly stronger electric field in the intrinsic multiplication region (2) 102. As the photo-generated carriers enter this region, they are further accelerated to high velocities, gaining enough energy to ionize additional atoms within the Si lattice. Thisionization results in a cascade of charge generation, a process known as avalanche multiplication, which amplifies the photocurrent.

[0065] This multi-step process ensures that the APD 200 achieves both high responsivity and fast response times. The separation of the photodetection and multiplication zones allows for independent optimization of electric fields in each region. The detection zone maintains efficient light absorption and carrier generation, while the multiplication region focuses on amplifying the signal without degrading the RF performance. The inclusion of selectively grown intrinsic Si and in-situ doped poly-Si layers further enhances charge transport and minimizes recombination losses, making the APD 200 highly suitable for highspeed optical communication and precision sensing applications.

[0066] FIG. 12 illustrates the critical parameters of the high-bandwidth Ge vertical APD 200, which are essential for tuning the device's performance. These parameters, along with their typical ranges, include:

[0067] (1 ) Width 250 of the Ge Slab 20 with a typical range of 0.1 - 8.0 pm - Defines the lateral dimension of the Ge photodetection region. A wider Ge slab increases photon absorption capacity and responsivity but may contribute to higher capacitance.

[0068] (2) Thickness 252 of the Ge Slab 20 with a typical range of 0.05 - 3.0 pm - Refers to the depth of the Ge photodetection layer. Thicker slabs enhance photon absorption, particularly for longer wavelengths, but can increase carrier transit time and potentially reduce speed.

[0069] (3) Width 254 of the Intrinsic Si Region 204 with a typical range of 0.05 - 7.5 pm- Determines the lateral extent of the avalanche multiplication zone. A wider intrinsic Si region provides more area for charge multiplication but may introduce additional capacitance, impacting high-frequency performance.

[0070] (4) Thickness 256 of the Intrinsic Si Region 204 with a typical range of 0.01 - 1 .5 pm - Refers to the vertical dimension of the multiplication region. Thinner layers enable higher electric fields for efficient multiplication but must be carefully managed to avoid breakdown.

[0071] (5) Width 258 of the Intrinsic Region in the SOI Layer 14 with a typical range of 0.02 - 1.5 pm -- Represents the lateral extent of the undoped region within the SOI layer 14, influencing electric field uniformity and carrier dynamics.

[0072] (6) Length of the Ge Slab 20 with a typical Range of 3.0 - 50.0 pm -- Refers to the length of the Ge photodetection region, affecting the photon absorption path. Longer lengths increase responsivity but may add series resistance and transit delay.

[0073] These parameters can be adjusted based on the product specifications, such as the targeted frequency cutoff, responsivity, and operating bias. By fine-tuning these dimensions, it is possible to optimize the device’s series resistance, capacitance, and transit time, achieving a balance between speed, efficiency, and signal quality. The ability to independently tune the RC properties of the photodetection and multiplication regions provides a high degree of design flexibility, enabling the APD 200 to be optimized for a wide range of applications.

[0074] FIG. 13 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge vertical APD 200, featuring the addition of a thin silicide layer 260 on key conductive regions. This modification significantly enhances the device's electrical performance by reducing both contact resistance and sheet resistance. The silicide layer 260, typically formed by a compound of silicon and a transition metal such as titanium, cobalt, or nickel, creates a low-resistance interface between the electrodes and the semiconductor material, improving carrier injection and extraction efficiency.

[0075] The silicide layer 260 offers several advantages. By minimizing contact resistance, it ensures more efficient electrical connections, reducing power losses and supporting faster carrier transport essential for high-speed APD operation. It also lowers sheet resistance in the doped semiconductor layers, enabling uniform current flow across the device, which is critical for maintaining signal integrity in high-frequency applications. These improvements help to reduce the overall RC time constant, thereby increasing bandwidth and response speed. Additionally, the thermal stability of silicides enhances the device's durability during high-power operation, minimizing performance degradation over time.

[0076] FIG. 14 illustrates a cross-sectional diagram of another embodiment of the high- bandwidth Ge vertical APD 200, featuring the addition of a Silicon Nitride (Si N ) layer 270 as a Contact Etch Stop Layer (CESL). This enhancement is adapted from CMOS (Complementary Metal-Oxide-Sem iconductor) technology and aims to improve the robustness and precision of the contact etching process. The CESL is deposited on top of the contact surface, forming a protective layer that prevents over-etching during the fabrication of the device. When the contact etching reaches the SiN layer, the process halts, preserving the integrity of the underlying semiconductor layers, such as the intrinsic Ge or Si regions, and avoiding unintended damage. This precise control is crucial for maintaining the high performance and reliability of the APD 200, particularly in regions where the electric field must remain uniform and defects could compromise device functionality.

[0077] During the process evaluation phase, a critical innovation emerged: the introduction of strain-engineered Ge layers to improve L-band performance. The approach involves layering a strained intrinsic Si film followed by a strained poly-Si layer on the Ge slab. This creates a "sandwich" structure in which the Ge layer is strained on both its top and bottom interfaces. The initial strain is caused by the lattice mismatch between Si and Ge at the bottom Si / Ge interface during Ge epitaxy, with strain relaxing entirely after approximately 50nm of Ge growth. By targeting a total Ge thickness between 200nm and 600nm (depending on product specifications), the device achieves enhanced mechanical and optical properties. Adding a strained crystalline Si layer on top of the Ge further amplifies the mechanical effect, increasing the portion of Ge under strain. The deposition process, including control of temperatures and gas precursors, plays a critical role in achieving the desired strain.

[0078] The crystal lattice mismatch between Si and Ge is a key factor in this design. Bulk Ge has a lower responsivity cutoff compared to strained Ge. By introducing higher strain into the Ge layer, the device’s responsivity shifts to longer wavelengths, making it more sensitive to L-band applications. Strain transfer strategies, including the deposition of strained poly- Si layers, create stronger mechanical effects, further optimizing the Ge slab for L-band wavelengths. This enhanced sensitivity opens up new opportunities for the device in optical communication systems targeting L-band-specific applications.

[0079] The implants can be inverted in the vertical APD 200 as well. That is, it can be n- i-p, instead of p-i-n in the Ge. There is flexibility on the doping choice of the top in-situ doped Si too, because electrode (B) 24 is the virtual ground which fixes the position of the potential divider.High-bandwidth Ge Avalanche Photodiode (APD)

[0080] The high-bandwidth Ge Avalanche Photodiode (APD) 100, 200 is presented in two distinct designs: horizontal and vertical, each tailored for specific performance requirements. The horizontal design incorporates an intrinsic region in the lateral conductive channel, with an additional intermediate electrode (C) that acts as a potential divider between electrodes (A) and (B). This configuration decouples the electric fields in the photodetection and multiplication regions, enabling independent optimization for transit time and avalanche gain. Photons absorbed in the intrinsic Ge region generate carriers that are accelerated towards implanted regions and further into the intrinsic Si region, where a stronger electric field triggers avalanche multiplication. Conversely, the vertical design employs a compact stacked structure with the photodetection and multiplication regions aligned vertically. Ge is grown on a doped Si substrate, capped with a dielectric, and further enhanced by selective epitaxial growth of intrinsic Si and patterned in-situ doped poly-Si contacts. A reverse bias applied to the PIN diode creates electric fields in the photodetection and intrinsic multiplication zones, enabling photon absorption and efficient avalanche multiplication. The horizontal design excels in field decoupling and transit time control, while the vertical design offers a compact footprint and integration advantages, making both designs versatile for high-speed optical communication and sensing applications.

[0081] In both the horizontal and vertical high-bandwidth Ge APD configurations, the electrodes play a critical role in generating and controlling the electric fields necessary for photodetection and avalanche multiplication. Electrodes (A) and (B) apply a reverse bias across the photodetection region to enable efficient carrier generation and transport. In both designs, Electrode (C) introduces an additional bias to the multiplication region, creating a stronger electric field that accelerates carriers to trigger avalanche multiplication. The key difference lies in the field control: the horizontal configuration uses a potential divider formed by the three electrodes to decouple the fields in the photodetection and multiplicationregions, allowing independent optimization. In contrast, the vertical configuration relies on the natural alignment of the photodetection and multiplication regions, with Electrode (C) directly enhancing the multiplication gain. Together, these electrodes enable precise tuning of responsivity, transit time, and multiplication efficiency for high-speed optical applications.

[0082] In an embodiment, a high-bandwidth Germanium, Ge, Avalanche Photodiode, APD, 100, 200 includes a silicon-on-insulator, SOI, layer 14; a Ge slab 20 on the SOI layer 14; a photodiode region 104 configured to absorb photons and generate carriers from an optical signal; an intrinsic multiplication region 102 configured to amplify the optical signal through avalanche multiplication for high responsivity; and a plurality of electrodes 22, 24, 106, wherein first and second electrodes 22, 24 apply a reverse bias across the photodiode region 104, and a third electrode 106 provides an additional bias in the intrinsic multiplication region 102. The additional bias can be applied between the third electrode 106 and at least one of the first and second electrodes 22, 24.

[0083] In an embodiment, the high-bandwidth Ge APD 100, 200 is a horizontal APD 100 with a potential divider formed by the electrodes 22, 24, 106 to decouple electrical fields in the photodiode region 104 and the intrinsic multiplication region 102. Each of the first, second and third electrodes 22, 24, 106 can be on a type of doping in the SOI layer 14, and the third electrode 106 is located between the Ge slab 20 and the intrinsic multiplication region 102. The intrinsic multiplication region 102 can be in an undoped area in the SOI layer 14. The high-bandwidth Ge APD 100 can further include a Silicide Layer 180 on the Ge slab 20. The high-bandwidth Ge APD 100 can further include a Silicon Nitride, SiN, Contact Etch Stop Layer, CESL, 182.

[0084] In another embodiment, the high-bandwidth Ge APD 100, 200 is a vertical APD 200 with the third electrode 106 used for multiplication gain in the intrinsic multiplication region 102. Each of the first and second electrodes 22, 24 is on a type of doping in the SOI layer 14, and the third electrode 106 is located on the Ge slab 20. The Ge slab 20 can include an intrinsic region and a doped region, and the vertical APD 200 can include an intrinsic Si region 204 on the doped region and a polycrystalline Si layer 206 on the intrinsic Si region 204. The third electrode 106 can be on the polycrystalline Si layer 206. The intrinsic multiplication region 102 can be between the third electrode 106 and the Ge slab 20. Thehigh-bandwidth Ge APD 200 can further include a silicide layer 260 on conductive regions on the SOI layer 14 and the Ge slab 20.

[0085] The first and second electrodes 22, 24 can be each on a different type of doping in the SOI layer 14. Alternatively, the first and second electrodes 22, 24 can be each on a same type of doping in the SOI layer 14.

[0086] In accordance with the present disclosure, the APD 100, 200 includes three electrodes 22, 24, 106. The third electrode 106 is configured to perform both reverse-biasing and avalanche-multiplication functions, whereas the first two electrodes 22 and 24 are each dedicated to only one of these functions — one providing the reverse bias and the other providing avalanche multiplication. This arrangement is illustrated in FIGS. 3-14. For comparison, other known APD solutions that achieve both reverse bias and avalanche multiplication typically require four electrodes, divided into two pairs. In those configurations, one pair is dedicated solely to providing the reverse bias, and the other pair is dedicated solely to providing avalanche multiplication. As a result, none of the four electrodes in such conventional designs perform both functions simultaneously; each electrode is specialized and dedicated to one specific role.

[0087] The present disclosure, by contrast, combines both the reverse-bias and avalanche-multiplication functions into a single electrode (the common electrode 106). This integration not only reduces the total number of electrodes from four to three but also simplifies the manufacturing process. By having a single electrode serve dual roles, the complexity of electrode placement, alignment, and electrical interconnects is reduced. Consequently, fabricating such a three-electrode APD structure of the present disclosure is generally more straightforward, efficient, and cost-effective than traditional four-electrode configurations, while still achieving effective amplification and reliable photodetection.Conclusion

[0088] In this disclosure, including the claims, the phrases “at least one of” or “one or more of’ when referring to a list of items mean any combination of those items, including any single item. For example, the expressions “at least one of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, or C,” and “one or more of A, B, and C” cover the possibilities of: only A, only B, only C, a combination of A and B, A and C, B and C, and the combinationof A, B, and C. This can include more or fewer elements than just A, B, and C. Additionally, the terms “comprise,” “comprises,” “comprising,” “include,” “includes,” and “including” are intended to be open-ended and non-limiting. These terms specify essential elements or steps but do not exclude additional elements or steps, even when a claim or series of claims includes more than one of these terms.

[0089] Although operations, steps, instructions, blocks, and similar elements (collectively referred to as “steps”) are shown or described in the drawings, descriptions, and claims in a specific order, this does not imply they must be performed in that sequence unless explicitly stated. It also does not imply that all depicted operations are necessary to achieve desirable results. In the drawings, descriptions, and claims, extra steps can occur before, after, simultaneously with, or between any of the illustrated, described, or claimed steps. Multitasking, parallel processing, and other types of concurrent processing are also contemplated. Furthermore, the separation of system components or steps described should not be interpreted as mandatory for all implementations; also, components, steps, elements, etc. can be integrated into a single implementation or distributed across multiple implementations.

[0090] While this disclosure has been detailed and illustrated through specific embodiments and examples, it should be understood by those skilled in the art that numerous variations and modifications can perform equivalent functions or achieve comparable results. Such alternative embodiments and variations, even if not explicitly mentioned but that achieve the objectives and adhere to the principles disclosed herein, fall within the spirit and scope of this disclosure. Accordingly, they are envisioned and encompassed by this disclosure and are intended to be protected under the associated claims. In other words, the present disclosure anticipates combinations and permutations of the described elements, operations, steps, methods, processes, algorithms, functions, techniques, modules, circuits, and so on, in any conceivable order or manner — whether collectively, in subsets, or individually — thereby broadening the range of potential embodiments.

Claims

CLAIMSWhat is claimed is:

1. A high-bandwidth Germanium, Ge, Avalanche Photodiode, APD, (100, 200) comprising: a silicon-on-insulator, SOI, layer (14); a Ge slab (20) on the SOI layer (14); a photodiode region (104) configured to absorb photons and generate carriers from an optical signal; an intrinsic multiplication region (102) configured to amplify the optical signal through avalanche multiplication for high responsivity; and a plurality of electrodes (22, 24, 106), wherein first and second electrodes (22, 24) apply a reverse bias across the photodiode region (104), and a third electrode (106) provides an additional bias in the intrinsic multiplication region (102).

2. The high-bandwidth Ge APD (100, 200) as claimed in claim 1 , wherein the additional bias is applied between the third electrode (106) and at least one of the first and second electrodes (22, 24).

3. The high-bandwidth Ge APD (100, 200) as claimed in claim 2, wherein the high- bandwidth Ge APD (100, 200) is a horizontal APD (100) with a potential divider formed by the electrodes (22, 24, 106) to decouple electrical fields in the photodiode region (104) and the intrinsic multiplication region (102).

4. The high-bandwidth Ge APD (100) as claimed in claim 3, wherein each of the first, second and third electrodes (22, 24, 106) is on a type of doping in the SOI layer (14), and the first or second electrode (22, 24) is located between the Ge slab (20) and the intrinsic multiplication region (102).

5. The high-bandwidth Ge APD (100) as claimed in any one of claims 3 to 4, wherein the intrinsic multiplication region (102) is in an undoped area in the SOI layer (14).

6. The high-bandwidth Ge APD (100) as claimed in any one of claims 3 to 5, further comprising a Silicide Layer (180) on the Ge slab (20).

7. The high-bandwidth Ge APD (100) as claimed in any one of claims 3 to 6, further comprising a Silicon Nitride, SiN, Contact Etch Stop Layer, CESL, (182).

8. The high-bandwidth Ge APD (100, 200) as claimed in claim 2, wherein the high- bandwidth Ge APD (100, 200) is a vertical APD (200) with the third electrode (106) used for multiplication gain in the intrinsic multiplication region (102).

9. The high-bandwidth Ge APD (200) as claimed in claim 8, wherein each of the first and second electrodes (22, 24) is on a type of doping in the SOI layer (14), and the third electrode (106) is located on the Ge slab (20).

10. The high-bandwidth Ge APD (200) as claimed in any one of claims 8 to 9, wherein the Ge slab (20) includes an intrinsic region and a doped region, and further comprising an intrinsic Si region (204) on the doped region and a polycrystalline Si layer (206) on the intrinsic Si region (204).11 . The high-bandwidth Ge APD (200) as claimed in claim 10, wherein the third electrode (106) is on the polycrystalline Si layer (206).

12. The high-bandwidth Ge APD (200) as claimed in any one of claims 8 to 11 , wherein the intrinsic multiplication region (102) is between the third electrode (106) and the Ge slab (20).

13. The high-bandwidth Ge APD (200) as claimed in any one of claims 8 to 12, further comprising a silicide layer (260) on conductive regions on the SOI layer (14) and the Ge slab (20).

14. The high-bandwidth Ge APD (100, 200) as claimed in any one of claims 1 to 13, wherein the first and second electrodes (22, 24) are each on a different type of doping in the SOI layer (14).

15. The high-bandwidth Ge APD (100, 200) as claimed in any one of claims 1 to 13, wherein the first and second electrodes (22, 24) are each on a same type of doping in the SOI layer (14).

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