Multi-terminal quantum devices and systems
Patent Information
- Application Number
- EP2023798784
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-10-31
- Publication Date
- 2026-09-09
AI Technical Summary
Multi-terminal quantum devices face challenges with residual voltage excitations on the ground line due to finite line resistances, leading to voltage divider effects that introduce artifacts into measurements and contribute to heating.
The implementation of a multi-terminal quantum device with two parallel ground lines, where a voltage measurement device on one line generates a control signal to a voltage generator on the other line, producing a time-varying stabilization voltage to mitigate residual voltage excitations.
This active ground stabilization technique significantly reduces average and peak residual voltage excitations by at least an order of magnitude, minimizing measurement artifacts and heating effects.
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Abstract
Description
MULTI-TERMINAL QUANTUM DEVICES AND SYSTEMSTECHNICAL FIELD
[0001] The present disclosure pertains to multi-terminal quantum devices, and to systems and methods incorporating the same.BACKGROUND
[0002] Multi -terminal quantum devices enable measurements of bulk properties of a sample as well as correlations across independent measurements across terminals. Three-terminal devices have been used to measure electrical transport in nanoscale systems. Such devices may, for example, be used to split Cooper pairs, characterize end-to-end state correlations in a one-dimensional topological superconductor (1DTS), such as a superconductorsemiconductor nanowire or a one dimensional channel electrostatically defined within a two- dimensional superconductor-semiconductor device. Such devices may alternatively or additionally be used to study local charge character of Andreev bound states, or as probes for measuring topological bulk properties with applications in topological quantum computing (among others). For example, in one application, a semiconductor-superconductor (SE-SU) heterojunction or other heterostructure may be arranged in a three-terminal setup to enable pre-screening and tuning of the SU-SU heterojunction. One example of an SU-SU heterojunction is an SE nanowire (e.g. formed via selective area growth (SAG) fabrication) coupled to an SU contact. As another example, it is also possible to fabricate an SU-SU heterostructure by gating two dimensional electron gasses (2DEGs) or two dimensional hole gasses (2DHGs) with proximity coupling to a superconductor. Such screening and finetuning may be performed to ensure the SE-SU heterostructure exhibits a topological characteristic(s) required to support a topological quantum computing operation. A multiterminal quantum device may comprise a semiconductor region and a superconductor region coupled to the superconductor region, with a pair of terminals coupled to the semiconductor region and a third terminal coupled to the superconductor region.SUMMARY
[0003] Aspects of the present disclosure relate to a multi-terminal quantum device having first, second and third device terminals. The first and second device terminals (e.g., semiconductor terminals) are coupled to first and second external measurement terminals respectively, whilst the third device terminal (e.g., superconductor terminal) is coupled to anexternal ground terminal. The third device terminal (referred to as the device ground terminal) is coupled to the external ground terminal via two parallel ground lines. A first of these ground lines includes a voltage measurement device, and a second ground line comprises a voltage generator. A controller receives as input a time-varying voltage measurement on the first line, and uses this measurement to generate a control signal to the voltage generator. The control signal causes the voltage generator to generate a time-varying stabilization voltage on the second ground line in order to mitigate or cancel any residual voltages on the device ground terminal.BRIEF DESCRIPTION OF FIGURES
[0004] Particular embodiments will now be described, by way of example only, with reference to the following schematic figures, in which:
[0005] FIG. 1 A shows a schematic circuit diagram of an example multi -terminal system comprising a multi-terminal quantum device coupled to external measurement and ground terminals;
[0006] FIG. IB shows a schematic circuit diagram of an example ground stabilization circuit for coupling a quantum device ground terminal to an external ground terminal;
[0007] FIG. 2 shows an image of example semiconductor-superconductor quantum device coupled to external measurement circuitry (drawn in schematic) and to an external ground terminal via a single ground line of finite resistance (drawn in schematic);
[0008] FIG. 2A schematically depicts a second example quantum device;
[0009] FIG. 3 shows, on the left hand side, a plot of measurements obtained with a multiterminal quantum device in the presence of residual ground line excitations and, on the right hand side, a plot of processed measurements obtained via post-processing of the measurements shown on the left hand side;
[0010] FIG. 4 shows an image of example semiconductor-superconductor quantum device coupled to external measurement circuitry (drawn in schematic) and to an external ground terminal via a ground stabilization circuit comprising a pair of ground lines with a voltage feedback control loop (drawn in schematic);
[0011] FIG. 5 shows a schematic circuit block diagram of a quantum device coupled to measurement and ground stabilization circuitry;
[0012] FIG. 6 shows a comparison graph of residual ground excitations measured with and without active ground line voltage stabilization;
[0013] FIG. 7 shows plots of measurements obtained without active stabilization; and
[0014] FIG. 8 shows plots of measurements obtained with active stabilization.DETAILED DESCRIPTION
[0015] A multi-terminal quantum device having first, second and third device terminals is considered. The first and second device terminals (e.g., semiconductor terminals) are coupled to first and second external measurement terminals respectively, which may be used to perform measurements on the device, whilst the third terminal (e.g., superconductor terminal) is coupled to an external ground terminal via a ground line (which ground the device to an external reference ground). The third device terminal may be referred to as a device ground terminal in this context.
[0016] In practice, the device measurement and ground terminals may be coupled to the external terminals by lines having a finite impedance. In this context, a problem can arise when a is current generated in the ground line. The current in the ground line arises in the presence of a voltage drop between the third terminal and the external ground terminal.
[0017] In the presence of finite line resistances on the ground line, voltage divider effects arise that can cause residual voltage excitations on the ground line, which in turn introduce artefacts into the measurements. An example of such a voltage divider effects is described below (see, in particular, Equation (16) and the accompanying explanation, together with FIG. 3).
[0018] Voltage divider effects are conventionally mitigated by minimizing ground line resistances as much as possible. Generally, this requires the ground line resistance to be at least an order of magnitude smaller than the measurement line resistances, and possibly several orders of magnitude. This requirement to minimize ground line resistance introduces complexity and cost into the design and fabrication processes, and also reduces flexibility (with this approach, it is not possible to ground the device though a high-resistance line, meaning that, among other things, it is not possible to place high-resistance filters orjunctions on the ground line). Post-processing in software may be used to compensate for any residual effects but only to a certain extent.
[0019] Moreover, residual voltage excitations on the ground line create currents that contribute to heating.
[0020] In example embodiments disclosed herein, the issue of residual voltage excitation is addressed in a different manner. The third device terminal is coupled to an external ground reference through two ground lines. A voltage with respect to the external reference ground is measured on a first of the ground lines on an ongoing basis, and those measurements are used to actively stabilize residual ground voltage excitations. Specifically, the measured voltage on the first line is used to generate a variable voltage bias on the second ground line. In one example, a controller uses the measured voltage signal on the first ground line as an error, causing a voltage bias of substantially equal magnitude but opposite amplitude to be generated on the second ground line, which reduces a voltage drop between the third device terminal and the external ground terminal closer to zero. In one example implementation, it has been possible to reduce average and peak residual voltage excitations by at least an order of magnitude (see FIG. 6) using the described active ground stabilization techniques.
[0021] Figure 1 A shows a multi-terminal system 100, which in turn is shown to comprise a multi-terminal quantum device 120 having a first device measurement terminal 122, a second device measurement terminal 124 and a device ground terminal 126. A first measurement circuit 112 is shown to comprise a first external measurement terminal 132 and a first voltage generator 152. A first measurement line 142 having a first impedance Z(connects the first device measurement terminal 122 with the first external measurement terminal 132. The first voltage generator 152 is coupled to the first external measurement terminal 132 and an external ground terminal 136 of the multi-terminal system 100, and is configured to apply a first measurement voltage Vt(the “left bias” voltage) between the first external measurement terminal 132 and the external ground terminal 136. The system 100 is further shown to comprise a second measurement circuit 114, which in turn is shown to comprise a second external measurement terminal 134, a second measurement line 144 (having a second impedance Zr) connecting the second device measurement terminal 124 with the second external measurement terminal 134, and a second voltage generator 154 coupled to the second external measurement terminal 134 and the external ground terminal 136. The second voltage generator 154 is configured to apply a second measurement voltage Vr(the “rightbias” voltage) between the second external measurement terminal 134 and the external ground terminal 136. Purely for ease of description, the terms ‘left’ and ‘right’ are used interchangeably with ‘first’ and ‘second’ in relation to FIG. 1 A, with subscripts T and ‘r’ denoting left and right respectively. The system 100 is further shown to comprise a ground stabilization circuit 116, via which the device ground terminal 122 is coupled to the external ground terminal. The first and second measurement voltages Vt, Vrmay be time-varying (AC) voltages having first and second frequencies ft, frrespectively (referred to as the first and second measurement frequencies below).
[0022] Voltage at the external ground terminal 136 and device ground terminal 126 is denoted by Vgand Ugrespectively. A voltage drop of Vg— Ugis exhibited between the device and external ground terminals 126, 136, which may be non-zero and time-varying.
[0023] The left and right bias voltages Vt, Vr, generated by the left and right voltage generators 152, 154 respectively, result in a voltage of Vg+ F(at the left measurement terminal 132 and a voltage of Vg+ Vrat the right measurement terminal 134. Voltage at the left measurement terminal 122 is denoted U whilst voltage at the right device measurement terminal 124 is denoted Ur.
[0024] First and second currents It, Irflow though the left and right measurement circuits 132, 134 respectively, resulting in a current of Ir+ through the ground stabilization circuit 116 to the external ground terminal 136.
[0025] FIG. IB shows the voltage stabilization circuit 116 in more detail. The voltage stabilization circuit 116 comprises a pair of parallel ground lines 101, 120, with a voltage measurement on one used to perform active voltage stabilization on the other.
[0026] A first ground line 101 (the ‘measurement ground line’) connects the device ground terminal 126 with the external ground terminal 136 and has a first line impedance Zgl. The first ground line 101 includes a voltage measurement device 105 configured to output a timevarying measured voltage 1 (f)onthe first ground line 101, which is a measurement of the voltage across the device and ground terminals 126, 136. A second ground line 102 (the ‘feedback ground line’) also connects the device ground terminal 126 with the external ground terminal 136 in parallel with the first ground line 101, and has a second line impedance Zg2. The second ground line 102 includes a third ‘stabilization voltage’ generator 106. A controller 103 is coupled to the voltage measurement device 105 and the third voltagegenerator 106. The controller 103 has an input connected to receive the time-varying voltage measurement, and an output connected to the stabilization voltage generator 106. Based on the voltage measurement on the first ground line 101, the controller 103 outputs a control signal to the voltage generator 106, which in turn causes the voltage generator 106 to apply a time-varying stabilization voltage Vf(t) on the second ground line 102.
[0027] Although depicted as separate components, the first line impedance Zglincludes the impedance of the voltage measurement device 105 itself. In practice, the voltage measurement device 105 may be implemented as a high impedance device (relative to the second line impedance Zg2) meaning that the current in the first ground line 101 is zero or close to zero. In this case, all or essentially all current flows through the feedback ground line 102, and the impedance of the voltage measurement device 105 accounts for the vast majority of the first line impedance Zpl, implying that the measured voltage 14 (t) is the voltage across the device ground terminal 126 and the external ground terminal 136.
[0028] The controller 103 may be implemented in various way, for example an applicationspecific integrated circuit (ASIC), a field-programmable gate array (FPGA), a general- purpose programmable processor (such as a microcontroller) etc.
[0029] The controller 103 may, for example, be a PID (Proportional-Integral -Derivative) controller, which uses the measured voltage Veas an error signal. The control signal sets the stabilization voltage V (t0approximately equal the negative of measured voltage — I4(t), thus reducing the voltage across the device and ground terminals 126, 136 to closer to zero. The controller 103 responds to changes in the measured voltage 14 by adapting Vf accordingly to counteract changes in 14 (the time dependency is omitted from the notation for conciseness).
[0030] A PID controller is an instrument used to control a process variable (in this case, the voltage Vf on the second ground line 102) via control loop feedback mechanism. A PID receives an error signal (such as 14 itself or an error signal derived from 14) and tunes the process variable (such as Vf or a parameter(s) on which V depends) to attempt to reduce the error to zero based on three calculated coefficients: the error (or ‘proportional gain’), an integral response (error summed over time), and a derivative response (rate of change in the error signal).
[0031] In one implementation, a ‘wide-band’ feedback loop is used. In another implementation, a ‘narrow-band’ feedback loop is used. In this context, ‘wide-band’ and ‘narrow-band’ are relative to a typical spacing of excitation frequencies used for measurement.
[0032] A wide-bandwidth loop attempts to stabilize all the residual excitations and their respective harmonics, within a measurement bandwidth of the loop. In this case, the output of the controller is a time-dependent voltage signal Vf(t) fed back to the ground terminal directly. This approach is simpler to implement and provides stability in a broader frequency range, e.g. cancelling multiple excitation harmonics.
[0033] With narrow-band stabilization, stabilization is targeted at the first and second measurement frequencies fi,frspecifically. To implement a narrow-bandwidth loop, the error signal is demodulated around the first and second measurement frequencies fi,frwith a narrow-bandwidth filter at each measurement frequency fi, fr, and the amplitude and phase of these components are used as inputs to the controller. The outputs of the controller are then the amplitude and phase of the control signals at the relevant measurement frequencies, which has the effect of targeting the activate stabilization at the measurement frequencies fl, fr. This approach minimizes the excess noise injected into the system.
[0034] By way of context, an analysis is summarized below, in which it is assumed that the ground stabilization circuit 116 is replaced with a single ground line of impedance Zg. The analysis demonstrates how residual voltage excitations can arise on the ground line as a consequence of the ground line impedance Zg. Further details of the analysis may be found in E. A. Martinez et al., “Measurement circuit effects in three-terminal electrical transport measurements” (2021) arXiv:2104.02671vl (‘Martinez’ hereinafter).
[0035] The voltages Ui at the device terminals 122, 124, 126 are related to the voltages Vtapplied at the measurement terminals 132, 134 by:Ut = Vg+ Vl- llZl(1)Ur=y — lrZr(2)Ug = Vg+ ll+ lr')Zg(3)
[0036] Since only relative voltages are physically meaningful, the voltage reference may be defined at the ground terminal at the device instead of the external measurement ground, thatis, Ug= 0. This is an arbitrary convention chosen purely for the sake of convenience. Combining the previous expressions and eliminating Vgyields the following:
[0037] Eqs. (4) and (5) may be written in vector form, where V = (Vi, Vr~)Tand likewise for U and I:U = V - ZI (6) where Z is a matrix of line impedances defined as:
[0038] Eq. (6) may be used to calculate the DC voltage biases U at the device from the DC voltages V applied at the measurement terminals and the measured DC currents I, by taking the zero-frequency component.
[0039] The electrical behavior of any device in a particular configuration is fully characterized by a differential conductance matrix as a function of the voltages at the device measurement terminals 122, 124. The conductance matrix G' at the device 120 is given by:
[0040] For conciseness, it is useful to define G j ■=where i G {I, r] and I G {I, r}. Theelements of G'(U) may be referred to as the “left-left”, “left-right” and “right-left” and “right-right” device conductance.
[0041] Each of the elements of this matrix is a function of the voltages U at the device under test. Only these 2 x 2 elements are required to completely define the conductance matrix of the device, since the rest of its elements are determined by conservation of current and the choice of reference voltage.
[0042] In order to optimize signal-to-noise ratio it is usual to measure differential conductance using low-frequency lock-in techniques. AC voltage excitations dV with different frequencies are applied at the left and right measurement terminals, and the resulting AC currents di are measured on both terminals at both frequencies. In order to directly measure the device conductance matrix G', the AC voltage amplitudes dll would need to be measured at the device terminals. However, this is often not convenient for three-terminal devices, since three additional voltage probes and lock-in amplifiers are required. Instead, an external conductance matrix G with respect to the AC voltage excitations applied at the external measurement terminals may be measured, which is defined as:
[0043] For conciseness, it is useful to define Gtj ■= where i E {I, r] and I E {I, r}. Theelements of G(V) may be referred to as the “left-left”, “left-right” and “right-left” and “rightright” external conductance.
[0044] Left-left and right-right conductances may be characterized as “local”, whilst “rightleft” and “left-right” conductances may be characterized as non-local. This terminology may be used in relation to both the device and external conductances.
[0045] Both conductance matrices G and G' agree for zero line impedances. But in the typical case of finite line impedances, the measured conductance matrix G may show spurious effects that do not relate to the behavior of the device under test.
[0046] In practice, it is the external conductance that is measurable G(V). However, the measured external conductance matrix G may be converted to the device conductance matrix G' at the device 120 based on the following relationship (see Martinez et al. for the derivation):G'(U) = G(V)(1 - ZG(V))-1(14)
[0047] Note that the transformation in Eq. (14) is exact, and holds even when all the measured conductances are large compared to the line resistances Z(, Zr. This is relevant since it is often convenient to measure a device in a highly conductive regime for signal-to- noise purposes. In particular, the expression in Eq. (14) is more general than the first-order voltage divider effects that are sometimes corrected for in the literature.
[0048] In order to derive first-order corrections from the exact transformation, Eq. 14 may be expanded as a function of the product ZG(V). The corrections are small if all the elements (ZG(V))jj « 1, that is: i d « i^r1|Zr| « | Gri|-1I « K1-
[0049] for i,j = I, r. If this is the case, the factor (1 — ZG(V))1in Eq. 14 may be expanded as a geometric series, obtaining to first order:G'(U) « G(V)(1 + ZG(V)) (15)
[0050] If the nonlocal conductances are much smaller than the local conductances, that is|6;r|, | Gri| « | Gu |, | Grr|, to zeroth order the correction can be written as:
[0051] Assuming that the local conductances are real and positive, the local conductances Gt, G^rat the device are larger than the measured ones by a correction quadratic in the conductance and proportional to the line impedance. This correction arises from the drop of the excitation voltages on the line impedances. Meanwhile, the nonlocal conductances Gl'r, G^i at the device get a positive correction term proportional to the ground line impedance and both local conductances. This correction can be interpreted as a voltage divider effect: if the ground line impedance is finite, at the device ground there is a residual voltage excitation proportional to the conductance of one side, which then drops over the opposite side.
[0052] In the presence of finite line resistances on the grounding line, voltage divider effects arise that can cause artifacts in the data.
[0053] The expressions Eqs. (6) and (14) can, to a certain extent, be used for correcting measurement circuit effects arising from finite line impedances in three-terminal electrical measurements. These corrections, to first order, re-scale voltage biases and local conductance to account for voltage drops on the line impedances, as well as eliminate artifacts in the nonlocal conductance arising from voltage divider effects. This makes it possible to measure three-terminal devices in larger conductance regimes than otherwise possible, which is important for maximizing the signal-to-noise ratio of the nonlocal conductance.
[0054] Even with such corrections, some physical mitigation of voltage divider effects is generally needed, and the conventional approach is to minimize ground line resistances (Zg) as much as possible. As derived in equation 15 above, the order of magnitude of voltage divider effects is ZgGuGrr, which requires \Zg(as the required corrections are small in this case). In practice, Zgmay need to be several orders of magnitude smaller than the inverse of the external local conductance.
[0055] By contrast, using the ground stabilization circuit 116 of FIG. IB, voltage divider effects are instead mitigated via active ground voltage stabilization. This active stabilization mechanism removes requirement of small ground line resistance in relation to nonlocal conductances.
[0056] By way of further illustration, specific examples are considered below, in which the multi -terminal quantum device 120 takes the form a semi conductor- superconductor device, with the device measurement terminals 122, 124 coupled to a superconductor region and the device ground terminal 126 coupled to a semiconductor region. However, this is chosen purely by way of example, and the described setup can be applied to other forms of multiterminal quantum device.
[0057] Figure 2 shows a system comprising one example of a multi-terminal quantum deice, which is a hybrid superconducting-semiconducting three-terminal device 200. A semiconductor (e.g. indium arsenide (InAs)) nanowire 201 is in contact on its lower facet with an epitaxially-grown aluminium (Al) contact forming a lead 202. The nanowire has gold ohmic contact deposits 203 and 204 on both ends, and electrostatic gates 205, 206 and 207 on top: left / right cutters (Zc / rc) and plunger (p). The voltages at the electrostatic gates are F(c, Vrc, and Vpfor the left cutter, right cutter and plunger respectively. A midplunger voltage (Vp) is shown at the plunger p.
[0058] Whilst a nanowire 201 is depicted in this example, the system can accommodate alternative forms of quantum device. For example, 2DEG fabrication may be used to form a device comprising long rectangular layers of semiconductor sandwiched with superconductor. A one-dimensional topological channel is electrostatically defined in these layers, with topological properties similar to a superconductor-semiconductor nanowires fabricated using a method such as selective area growth. The s quantum device 120 of FIG. 1 may comprise at least one 1DTS, such as a topological channel, nanowires etc.
[0059] FIG. 2A scematically depicts a plan view of a second example quantum device 250. The device 250 includes a semiconductor heterostructure 260 configured to host a 2DEG or 2DHG. A 2DEG (resp. 2dHG) refers to a gas of electrons (resp. electron holes) whose motion is constrained to two spatial dimensions. A superconductor component 252 is arranged over the semiconductor hetero structure 250. In this example, the gas is confined within the semiconductor heterostructure 260. The superconductor component 252 is T-shaped and includes an elongate (one-dimensional) strip portion which extends in a length direction x, and a branch 254 which extends in a width direction y. Superconductor branch 254 is connected to external ground via a device ground terminal 276 (corresponding to device ground terminal 126 in FIG. 1). Although not depicted in FIG. 2A, the 2DEG device 250 may be coupled to external ground via the circuitry of FIG. 1 A.
[0060] A gate stack is arranged over the 2DEG device 250. The gate stack depletes charge carriers selectively from regions of the semiconductor heterostructure which are not under the superconductor component. This defines a channel region underneath the superconductor component. A channel region is an active part of a semiconductor component, through which current may flow. Junctions are arranged at the ends of the elongate strip portion of the superconductor component 252. Each junction includes a set of electrodes, denoted respectively by reference signs 230a, 232a, 234a (left electrodes) and reference signs 230b, 232b, 234b (right electrodes). Electrodes 234a, 234b are each operated to induce a normally conductive region, the region of the semiconductor component underneath that electrode 234a, 234b. Then, by applying left and right gate voltages to electrodes 230a, 232a and to electrodes 230b, 232b respectively, tunnelling of electrons between the active region and the lead under electrodes 234a, 234b is made possible. Non-local conductance may be determined based on measurements of the tunnelling current. The left rand right electrodes provide left and right device terminals respectively, corresponding to the left and right device terminals 122, 124 of FIG. 1.
[0061] The system of Figure 2 has a first device measurement terminal 207, a second device measurement terminal 208 and a device ground terminal 209. The voltages at the (internal) device terminals are denoted Ut, Urand Ugrespectively. Figure 2 further shows an external ground terminal 212 and a first external measurement terminal 210. A first voltage generator 213 is coupled to the first external measurement terminal 210 and the external ground terminal 212, and is configured to apply a first voltage Vtbetween the first external measurement terminal 210 and the external ground terminal 212. A first current measurement circuit 215 with ammeter 216 measures the current Ii on the line between the first external terminal 210 and the external ground terminal 212. Figure 2 further shows a second external measurement terminal 211. A second voltage generator 214 is coupled to the second external measurement terminal 211 and the external ground terminal 212, and is configured to apply a second voltage Vrbetween the second external measurement terminal 211 and the external ground terminal 212. Line impedances Zt,Zrand Zgconnect the internal device terminals 207, 208, 209 to external measurement terminals 210,211 and an external reference ground 212, respectively. The line impedances are part of the measurement circuit, and are assumed to be constant and linear.
[0062] All the voltages may in general be time-dependent, and are assumed to have a DC component for biasing the device and AC components for lock-in differential conductance measurements. The line resistances are Zt= Zr= 1830 1 and Zg= 915(1 and primarily originate from low-pass filters in the cryostat DC lines. The results hold for signal frequencies much lower than the filter cut-off frequency, since above this frequency the setup effectively has more than three terminals.
[0063] Figure 3 shows measurement results from the circuit in Figure 2. Figure 3 shows raw measured local (b) and nonlocal (c) conductances G(V) when exciting the left measurement terminal, as a function of the applied DC voltage bias Vtand left cutter gate voltage Flc.
[0064] The plots d and e show respective measurements corrected for measurement circuit effects using the ground stabilization circuit 116 of FIGS. 1 A and IB (corresponding to FIG. 4, described below). A vertical voltage axis has been transformed to the DC voltage Ui at the left device terminal by Eq. (6). The conductances G'(U) are now calculated with respect to the AC voltage excitation dUtat the left device terminal using Eq. 14.
[0065] The above arrangement is susceptible to two forms of measurement artifacts. The active stabilization mitigates one of these measurement artifacts, namely residual voltage excitations on the ground. The other artifact is a reduction in the measured conductances owing to voltage drops at the line resistances, which may be addressed in a post-processing step as described in Martinez.
[0066] As shown in Figure 3(b, c), the raw measured data shows superconducting coherence peaks, typical for tunneling spectroscopy of these devices, whose energy fluctuates as a function of the cutter gate voltage, moving outwards whenever the conductance Gttincreases12. In Fig. 3 c, the raw nonlocal conductance Grishows voltage divider artifacts in the form of a suppressed mirror image of the local conductance Ga. Note that, like the local conductance G , the voltage divider effects are symmetric as a function of bias voltage. In the corrected datasets (Fig. 3 d, e) the energy of the superconducting coherence peaks is nearly constant as a function of cutter gate voltage. As shown in Fig. 3e, the corrected non-local conductance at the device G?'.(no longer shows voltage divider artifacts, and is predominantly anti-symmetric as a function of bias voltage.
[0067] The described solution actively stabilizes the residual voltage excitations on the ground by bonding the device to two drain lines as shown in Figure 4.
[0068] Figure 4 shows the same hybrid superconducting-semiconducting three-terminal device as in Figure 2. The circuit in Figure 4 differs from the circuit in Figure 2 in that the single ground line of impedance Zgis replaced with the ground stabilization circuit 116 of FIG. IB, which comprises two ground lines instead of one. The circuit is otherwise the same as FIG. 2 and such all relevant description of FIG. 2 applies to FIG. 4.
[0069] With this arrangement, grounding through finite-resistance measurement circuit lines (e.g., RC filters) is possible i.e., it is possible to apply more filtering which increases the line resistances. It is also possible to ground devices through a high-resistance tunnel junction instead of a low-resistance ohmic contact, and to measure on devices with increased contact resistance through different fabrication processes. The different choice of material stack gives rise to increased barrier, so it is possible to use smaller contact pads yielding larger resistance.
[0070] Figure 5 has been used to demonstrate the efficacy of active ground stabilization. Two lines 507 and 508 connect the source terminals 505 and 506 of device 500 to external groundterminals 509 and 510 respectively. The two lines 507 and 508 include voltage generators 503 and 504 respectively. In this example, excitation signals used for measurement have root-mean-squared (RMS) amplitudes and frequencies of 10 peV at 110 Hz on line 507 (corresponding to the left bias voltage Vtat a measurement frequency ft of 110Hz in this example) and 10 peV at 230 Hz on line 508 (corresponding to the right bias voltage Vrat a measurement frequency of 230Hz in this example). Two drain lines 501 and 502 connect the drain terminals 511 and 512 of the device 500 to external ground terminals 515 and 516 respectively. A voltage measurement device 513 measures the voltage with respect to ground (Ve) on one of the drain lines 501. This voltage signal (Ve) is used as the error signal for a controller supplying an AC / DC voltage bias (Vf) on the other drain line 502, i.e. the controller (roughly) measures a voltage Vf on the monitoring line 501 the feedback voltage generator 514 applies a voltage - Vf on the feedback line 502. In the specific example of FIG. 5, narrow-band active stabilization may be applied with narrowband filters at 110Hz and 230Hz.
[0071] Experimental results are shown in Figure 6, measured on a device conceptually similar to the one depicted in Fig. 4. The junctions at the device measurement terminals are tuned by means of gates analogous to 205 and 206 to a high-bias conductance of about 2 e2 / h, where h is Planck’s constant. This corresponds to the so-called ‘open junction regime’ and is the relevant regime where the current proposal facilitates measurements, in contrast to the ‘tunneling regime’ where local conductances at the measurement junctions are small. In the ‘open feedback loop’ configuration 601, not active feedback loop is applied to the system. A voltage spectrum is measured at one drain while draining current through the other (sample rate 1.83 kHz). The results are shown in Figure 6, where “closed feedback loop” 602 is the case where active feedback is applied. From Figure 6, it can be seen that stabilizing VD residual excitations is feasible. It is also possible to attempt to cancel 50 Hz harmonics on the ground.
[0072] FIGS. 7 and 8 show plots of measurement obtained in the following manner. The results of FIG. 7 were obtained without active ground line voltage stabilization, whilst the results of FIG. 8 were obtained with active stabilization using the ground stabilization circuit ofFIG. IB.
[0073] Midplunger vs. bias scans were performed with junctions set on average to 2 e2 / h at high bias in the open junction regime. The line resistances were 1.8 k on each of the two measurement lines and each of the two grounding lines.
[0074] In the plots in Figure 7, the left top plot shows a plot of local conductance Gaas a function of the midplunger voltage Vpand left bias voltage Vi„ the left bottom plot shows Grias a function of the midplunger voltage Vpand the left bias voltage Vi„ the right top plot shows Grras a function of the midplunger voltage Vpand the right bias voltage Vr, and the right bottom plot shows Giras a function of the midplunger voltage Vpand the right bias voltage Vr. These are conductance measurements without active stabilization (open loop). Figure 8 shows the same plots but with active stabilisation applied (closed loop). The midplunger gate voltages Vpare given by the values in the vertical axes of the figures.
[0075] It can be seen that large attenuation of voltage divider effects is observed. For example, in the bottom left plot in Figure 8 (when activating the stabilization loop), a negative signal 801 is measured in the range [0, -0.01], with x-axis voltage values in the range [0, -0.13] V. The remaining signal is antisymmetric along the x (bias) axis, i.e., goes from negative values to positive values. This measurement was “ghosted” by other negative voltage values in the equivalent (bottom left) plot of Figure 7, in which negative results were obtained over the entire regions. This demonstrates feasibility of stabilization in real time during measurements.
[0076] Similarly, in FIG.8, the right hand side, similarly, a small negative region 802 is correctly observed, with the remaining regions yielding positive measurements. In FIG. 7, right-hand side, this effect is entirely ghosted, with the entire region again measuring negative.
[0077] The figures show strong line harmonics voltage picked up at the voltage probe, so broadband compensation introduces excess current noise. Hence, narrow-band frequency would be preferrable until voltage noise can be reduced.
[0078] According to a first aspect disclosed herein, a system comprises: a multi-terminal quantum device having a first device measurement terminal, a second device measurement terminal and a device ground terminal; an external ground terminal; a first external measurement terminal; a first measurement line connecting the first device measurement terminal with the first external measurement terminal; a first voltage generator coupled to thefirst external measurement terminal and the external ground terminal, and configured to apply a first voltage between the first external measurement terminal and the external ground terminal; a second external measurement terminal; a second measurement line connecting the second device measurement terminal with the second external measurement terminal; a second voltage generator coupled to the second external measurement terminal and the external ground terminal, and configured to apply a second voltage between the second external measurement terminal and the external ground terminal; a first ground line connecting the device ground terminal with the external ground terminal, the first ground line including a voltage measurement device configured to output a time-varying voltage measurement on the first ground line; a second ground line connecting the device ground terminal with the external ground terminal in parallel with the first ground line, the second ground line including a third voltage generator; and a controller coupled to the voltage measurement device and the third voltage generator, and configured to: receive from the voltage measurement device the time-varying voltage measurement, and generate based thereon a control signal to the voltage generator, the control signal configured to cause the voltage generator to apply a time-varying stabilization voltage on the second ground line.
[0079] In embodiments, the multi-terminal quantum device may comprise a semiconductor region and a superconductor region coupled to the semiconductor region, wherein the first device terminal and the second device terminal may be coupled to the semiconductor region, and the third terminal may be coupled to the superconductor region.
[0080] The semiconductor region may be configured to host a two-dimensional electron gas or two-dimensional hole gas.
[0081] The quantum device may comprise: a one-dimensional topological semiconductor, the first device terminal coupled to a first end of the one-dimensional topological semiconductor, and the second device terminal coupled to a second end of the one-dimensional topological semiconductor, and a superconductor contact coupled to the one-dimensional topological semiconductor and the device ground terminal.
[0082] The control signal may be configured to vary the stabilization voltage to attempt to reduce the time-varying voltage measurement to zero.
[0083] The first voltage generator may be configured to apply the first voltage at a first measurement frequency, and the second voltage generator may be configured to apply thesecond voltage at a second measurement frequency, wherein the time-varying voltage measurement may comprise a first voltage measurement targeted at the first measurement frequency and a second voltage measurement targeted at the second measurement frequency, wherein the control signal may be targeted at the first measurement frequency and the second measurement frequency.
[0084] The controller may be a proportional-integral-derivative (PID) controller.
[0085] The system may comprise a tunnel junction connected between the device ground terminal and the external ground terminal.
[0086] The system may comprise a circuit component connected between the device ground terminal and the external ground terminal, the circuit component having an impedance that may be large relative to an inverse of a local conductance exhibited at the first external measurement terminal or the second external measurement terminal.
[0087] The circuit component may be a filter.
[0088] According to a second aspect therein, a method comprises: applying, by a first voltage generator, a first voltage between an external ground terminal a first external measurement terminal, the first external measurement terminal coupled via a first measurement line to a first device measurement terminal of a multi-terminal quantum device; applying, by a second voltage generator, a second voltage between a second external measurement terminal and the external ground terminal, the second external measurement terminal coupled via a second measurement line to a second device measurement terminal of the multi-terminal quantum device; receiving at a controller from a voltage measurement device a time-varying voltage measurement performed on a first ground line, the first ground line connecting a device ground terminal of the multi-terminal quantum device with the external ground terminal generating, by the controller, based on the time-varying voltage measurement a control signal to a voltage generator, the control signal causing the voltage generator to apply a time-varying stabilization voltage on a second ground line connecting the device ground terminal with the external ground terminal in parallel with the first ground line.
[0089] The multi-terminal quantum device may comprise a semiconductor region and a superconductor region coupled to the semiconductor region, wherein the first device terminaland the second device terminal are coupled to the semiconductor region, and the third terminal may be coupled to the superconductor region.
[0090] The semiconductor region may be configured to host a two-dimensional electron gas or two-dimensional hole gas.
[0091] The device may comprise: a one-dimensional topological semiconductor, the first device terminal coupled to a first end of the one-dimensional topological semiconductor, and the second device terminal coupled to a second end of the one-dimensional topological semiconductor, and a superconductor contact coupled to the one-dimensional topological semiconductor and the device ground terminal.
[0092] The control signal may cause the stabilization voltage to be varied to attempt to reduce the time-varying voltage measurement to zero.
[0093] The first voltage may be applied at a first measurement frequency, and the second voltage may be applied at a second measurement frequency, wherein the time-varying voltage measurement may comprise a first voltage measurement targeted at the first measurement frequency and a second voltage measurement targeted at the second measurement frequency, wherein the control signal may be targeted at the first measurement frequency and the second measurement frequency.
[0094] The controller may be a proportional-integral-derivative (PID) controller.
[0095] A tunnel junction may be connected between the device ground terminal and the external ground terminal.
[0096] A circuit component may be connected between the device ground terminal and the external ground terminal, the circuit component having an impedance that may be large relative to an inverse of a local conductance exhibited at the first external measurement terminal or the second external measurement terminal.
[0097] The circuit component may be a filter.
[0098] It will be appreciated that the above embodiments have been disclosed by way of example only. Other variants or use cases may become apparent to a person skilled in the art once given the disclosure herein. The scope of the present disclosure is not limited by the above-described embodiments, but only by the accompanying claim.
Claims
CLAIMS1. A system comprising: a multi-terminal quantum device having a first device measurement terminal, a second device measurement terminal and a device ground terminal; an external ground terminal; a first external measurement terminal; a first measurement line connecting the first device measurement terminal with the first external measurement terminal; a first voltage generator coupled to the first external measurement terminal and the external ground terminal, and configured to apply a first voltage between the first external measurement terminal and the external ground terminal; a second external measurement terminal; a second measurement line connecting the second device measurement terminal with the second external measurement terminal; a second voltage generator coupled to the second external measurement terminal and the external ground terminal, and configured to apply a second voltage between the second external measurement terminal and the external ground terminal; a first ground line connecting the device ground terminal with the external ground terminal, the first ground line including a voltage measurement device configured to output a time-varying voltage measurement on the first ground line; a second ground line connecting the device ground terminal with the external ground terminal in parallel with the first ground line, the second ground line including a third voltage generator; and a controller coupled to the voltage measurement device and the third voltage generator, and configured to: receive from the voltage measurement device the time-varying voltage measurement, and generate based thereon a control signal to the voltage generator, the control signal configured to cause the voltage generator to apply a time-varying stabilization voltage on the second ground line.
2. The system of claim 1, wherein the multi -terminal quantum device comprises a semiconductor region and a superconductor region coupled to the semiconductor region, wherein the first device terminal and the second device terminal are coupled to the semiconductor region, and the third terminal is coupled to the superconductor region.
3. The system of claim 2, wherein the semiconductor region is configured to host a two- dimensional electron gas or two-dimensional hole gas.
4. The system of claim 2, wherein the device comprises: a one-dimensional topological semiconductor, the first device terminal coupled to a first end of the one-dimensional topological semiconductor, and the second device terminal coupled to a second end of the one-dimensional topological semiconductor, and a superconductor contact coupled to the one-dimensional topological semiconductor and the device ground terminal.
5. The system of claim 1, 2, 3 or 4, wherein the control signal is configured to vary the stabilization voltage to attempt to reduce the time-varying voltage measurement to zero.
6. The system of claim 1, 2, 3 or 4, wherein the first voltage generator is configured to apply the first voltage at a first measurement frequency, and the second voltage generator is configured to apply the second voltage at a second measurement frequency, wherein the timevarying voltage measurement comprises a first voltage measurement targeted at the first measurement frequency and a second voltage measurement targeted at the second measurement frequency, wherein the control signal is targeted at the first measurement frequency and the second measurement frequency.
7. The system of claim 5 or 6, wherein the controller is a proportional-integral-derivative (PID) controller.
8. The system of any preceding claim, comprising a tunnel junction connected between the device ground terminal and the external ground terminal.
9. The system of any preceding claim, comprising a circuit component connected between the device ground terminal and the external ground terminal, the circuit component having an impedance that is large relative to an inverse of a local conductance exhibited at the first external measurement terminal or the second external measurement terminal.
10. The system of claim 9, wherein the circuit component is a filter.
11. A method comprising: applying, by a first voltage generator, a first voltage between an external ground terminal a first external measurement terminal, the first external measurement terminal coupled via a first measurement line to a first device measurement terminal of a multiterminal quantum device; applying, by a second voltage generator, a second voltage between a second external measurement terminal and the external ground terminal, the second external measurement terminal coupled via a second measurement line to a second device measurement terminal of the multi-terminal quantum device; receiving at a controller from a voltage measurement device a time-varying voltage measurement performed on a first ground line, the first ground line connecting a device ground terminal of the multi-terminal quantum device with the external ground terminal generating, by the controller, based on the time-varying voltage measurement a control signal to a voltage generator, the control signal causing the voltage generator to apply a time-varying stabilization voltage on a second ground line connecting the device ground terminal with the external ground terminal in parallel with the first ground line.
12. The method of claim 11, wherein the multi-terminal quantum device comprises a semiconductor region and a superconductor region coupled to the semiconductor region, wherein the first device terminal and the second device terminal are coupled to the semiconductor region, and the third terminal is coupled to the superconductor region.
13. The method of claim 12, wherein the semiconductor region is configured to host a two-dimensional electron gas or two-dimensional hole gas.
14. The method of claim 12, wherein the device comprises: a one-dimensional topological semiconductor, the first device terminal coupled to a first end of the one-dimensional topological semiconductor, and the second device terminal coupled to a second end of the one-dimensional topological semiconductor, and a superconductor contact coupled to the one-dimensional topological semiconductor and the device ground terminal.
15. The method of any of claims 11 to 14, wherein the control signal causes the stabilization voltage to be varied to attempt to reduce the time-varying voltage measurement to zero.
16. The method of any of claims 11 to 14, wherein the first voltage is applied at a first measurement frequency, and the second voltage is applied at a second measurement frequency, wherein the time-varying voltage measurement comprises a first voltage measurement targeted at the first measurement frequency and a second voltage measurement targeted at the second measurement frequency, wherein the control signal is targeted at the first measurement frequency and the second measurement frequency.
17. The method of claim 15 or 16, wherein the controller is a proportional-integral- derivative (PID) controller.
18. The method of any of claims 11 to 17, wherein a tunnel junction is connected between the device ground terminal and the external ground terminal.
19. The method of any preceding claim, wherein a circuit component is connected between the device ground terminal and the external ground terminal, the circuit component having an impedance that is large relative to an inverse of a local conductance exhibited at the first external measurement terminal or the second external measurement terminal.
20. The method of claim 19, wherein the circuit component is a filter.