Method and device for analyzing protocol data bits for a wheel speed sensor with AK protocol

Abstract

Method and device for analyzing protocol data bits for a wheel speed sensor with AK protocol. This application discloses a method and device for analyzing protocol data bits for an AK protocol wheel speed sensor.The method comprises: receiving a current signal sent by a wheel speed sensor with AK protocol and converting the current signal into a first voltage signal and a second voltage signal; capturing the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, and storing a first set of timestamps and a second set of timestamps; acquiring a complete set of protocol data bit timestamps according to the first set of timestamps and the second set of timestamps, and designating them as protocol data timestamps; and analyzing the protocol data bits according to the protocol data timestamps in order to obtain the values ​​of the protocol data bits.This application can reduce the cost of products and ensure the security of the supply chain, thereby improving the competitiveness of companies.

Description

Method and device for analyzing protocol data bits for a wheel speed sensor with AK protocol Technical field This application relates to the technical field of data processing and, in particular, to a method and a device for analyzing protocol data bits for a wheel speed sensor with AK protocol. Background of the technique The AK protocol is a standard interface for wheel speed sensors and electronic control units (ECUs) for transmitting data signals. The sensor signals are processed by signal modulation units to produce speed and data signals. Currently, component suppliers primarily use special peripheral chips to analyze AK protocol data signals. The solution of analyzing AK protocol data signals using special peripheral chips presents the following problem: the cost of these special peripheral chips is high. Brief description of the invention In order to overcome the shortcomings of the prior art, the purpose of the realizations of the present application is to provide a method and device for analyzing protocol data bits for a wheel speed sensor with AK protocol, which is capable of reducing the cost of the product and ensuring the security of the supply chain, thereby improving the competitiveness of companies. To solve the aforementioned problem, the first aspect of the embodiments of the present application discloses a method for analyzing protocol data bits for a wheel speed sensor with AK protocol, comprising the following steps: receive a current signal sent by a wheel speed sensor with AK protocol and convert the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse, and the second voltage signal only includes a speed signal pulse; capture the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designate the timestamps of the rising and falling edges of the first captured voltage signal as a first set of timestamps, designate the timestamps of the rising and falling edges of the second captured voltage signal as a second set of timestamps, and save the first set of timestamps and the second set of timestamps; acquire a complete set of timestamps of the protocol data bits according to the first set of timestamps and the second set of timestamps, and designate them as protocol data timestamps; Analyze the protocol data bits according to the protocol data timestamps in order to obtain protocol data bit values. The implementations of this application convert a wheel speed sensor current signal into a first voltage signal and a second voltage signal, capture the first set of timestamps and the second set of timestamps of the rising edge and falling edge according to the first voltage signal and the second voltage signal, extract the timestamps (designated as protocol data timestamps) from the protocol data bits according to the first set of timestamps and the second set of timestamps, and analyze the protocol data bits in order to obtain the values ​​of the protocol data bits, so that the values ​​of the protocol data bits are obtained to complete the analysis of the protocol data bits, which can reduce the cost of the product and improve the competitiveness of the companies. As a preferred embodiment, in the first aspect of the embodiments of the present application, the step of receiving a current signal sent by a wheel speed sensor with AK protocol and converting the current signal into a first voltage signal and a second voltage signal comprises: convert the current signal into a first voltage signal and a second voltage signal based on the comparison of signals through an AK signal separation circuit. The AK signal separation circuit can be implemented using a comparator, and as an example, it can complete the conversion of the current signal and the voltage signals through a certain I / V conversion circuit, so that it is possible to obtain the corresponding pulse signals based on the comparison of the converted voltage signals and the reference voltage signal, and the pulse signals obtained can be designated as the first voltage signal and the second voltage signal. For high-speed conditions, given that the speed pulse amplitude is 28 mA, and the protocol data bit pulse amplitude is 14 mA, the first voltage signal and the second voltage signal can be extracted from the high-speed conditions, where the high level of the second voltage signal corresponds to the speed pulse amplitude of 28 mA, i.e., the second voltage signal outputs a high level only if the speed pulse is greater than or equal to a first preset value (e.g., 23.5 mA), and outputs a low level if the speed pulse is less than the first preset value, showing that the second voltage signal includes only the speed signal pulse, but not the protocol data bit pulse. The first voltage signal is also completed by the comparator, and the comparator is used so that the first voltage signal outputs a high level when the pulse amplitude is greater than a second preset value (e.g., 11.7 mA) and outputs a low level when the pulse amplitude is less than the second preset value, and the first voltage signal not only includes the speed signal pulse, but also the protocol data bit pulse. Under low speed conditions, since the speed pulse amplitude is 14 mA and the protocol data bit pulse amplitude is 14 mA, only the first voltage signal can be extracted from the pulse signals under low speed conditions; the speed signal pulse is fused between the protocol data bit pulses, and the second voltage signal cannot be extracted separately. For low speed to high speed conditions, since the speed pulse amplitude includes not only 14 mA but also 28 mA, the second voltage signal can be extracted with the speed pulse amplitude of 28 mA and the first voltage signal with the pulse amplitude of 28 mA and 14 mA, as well as the protocol data bit pulse amplitude of 14 mA. The timestamps of the rising and falling edges of the first and second voltage signals can be acquired using an edge capture module. This module can be implemented as a GTM / TIM module, an eMIOS module, or a FlexIO module. Since the rising edge is when the pulse signal changes from 0 to 1, and the falling edge is when the pulse signal changes from 1 to 0, all the time points from 0 to 1 and from 1 to 0 are collected by the edge capture module, thus obtaining the first and second sets of timestamps. As a preferred embodiment, in the first aspect of the embodiments of the present application, under high-speed conditions, the step of acquiring a complete set of protocol data bit timestamps according to the first set of timestamps and the second set of timestamps, and designating them as protocol data timestamps, comprises: within a pre-set sampling period, determine a timestamp of a rising edge of a last velocity pulse and a timestamp of a falling edge of a penultimate velocity pulse based on the second set of timestamps and designate them as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively; acquire all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp, wherein all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp are protocol data timestamps. Under high-speed conditions, since a pulse between two adjacent speed pulses is a protocol data pulse, the protocol data timestamps are constructed directly from the pulse between two adjacent speed pulses. As a preferred embodiment, in the first aspect of the embodiments of the present application, under low-speed conditions, the step of acquiring a complete set of protocol data bit timestamps according to the first set of timestamps and the second set of timestamps, and designating them as protocol data timestamps, comprises: within a pre-set sampling period, order the first sets of timestamps located within the sampling period in chronological order from back to front; select a pre-set number of first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, wherein the difference between any adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width; In the protocol data of the same frame, the difference between two adjacent timestamps lies between TP / 2 and TP. Therefore, under low-speed conditions, since only the first voltage signal is available, the first timestamps whose difference between two adjacent timestamps lies between TP / 2 and TP can be used to construct the protocol data timestamps. As a preferred embodiment, in the first aspect of the embodiments of the present application, under low-speed to high-speed conditions, the step of acquiring a complete set of protocol data bit timestamps according to the first set of timestamps and the second set of timestamps, and designating them as protocol data timestamps comprises: within a preset sampling period, determine a timestamp of a rising edge of a last speed pulse based on the second set of timestamps and designate it as a first reference high speed timestamp; Starting from the first reference high-speed timestamp, sort the first sets of timestamps located within the sampling period in chronological order from back to front; select a preset number of first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width. Under low-speed to high-speed conditions, given that the first voltage signal and the second voltage signal are available, the first reference high-speed timestamp can be determined from the second voltage signal, and with the first reference high-speed timestamp as a starting point, a set of first timestamps that are closest to the first reference high-speed timestamp and whose difference between two adjacent timestamps is between TP / 2 and TP is selected from the first sets of timestamps, in order to construct the protocol data timestamps. As a preferred embodiment, in the first aspect of the embodiments of the present application, the step of analyzing the protocol data bits according to the protocol data timestamps in order to obtain protocol data bit values ​​comprises: sort the protocol data timestamps in chronological order; Determine a value for a first protocol data bit based on a first timestamp from among the ordered protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP, bit0=1; where TimeStamp0 is the first timestamp among the ordered protocol data timestamps and TimeStamp.subp2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; When bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1 and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk, calculate the difference between TimeStampk+1 and TimeStampk, and designate it as a second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; Determine a value for bit8 according to the sum of the bits bit0 to bit7, if the sum of the bits bit0 to bit7 is even, bit8=0; and if the sum of the bits bit0 to bit7 is odd, bit8=1. The protocol data bit uses Manchester encoding (IEEE 802.3), and its encoding rule is as follows: the intermediate level jump from low to high indicates "1," and the intermediate level jump from high to low indicates "0." According to the AK protocol standard, the speed pulse width is TP (with a nominal value of 50 µs), and the falling edge code element width of the speed pulse and the first protocol data bit is TP / 2. The protocol data timestamp code element can be determined based on this, and the value of each protocol data bit is analyzed based on the Manchester encoding rule and the falling edge code element width of the speed pulse and the first protocol data bit of TP / 2. The second aspect of the embodiments of the present application discloses a protocol data bit analysis device for an AK protocol wheel speed sensor, comprising: a receiving unit, which is used to receive a current signal sent by an AK protocol wheel speed sensor and convert the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse, and the second voltage signal only includes a speed signal pulse; a capture unit, which is used to capture the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designate the timestamps of the rising and falling edges of the first captured voltage signal as a first set of timestamps, designate the timestamps of the rising and falling edges of the second captured voltage signal as a second set of timestamps, and store the first set of timestamps and the second set of timestamps; an acquisition unit, which is used to acquire a complete set of timestamps of the protocol data bits according to the first set of timestamps and the second set of timestamps, and designate them as protocol data timestamps; an analysis unit, which is used to analyze protocol data bits according to protocol data timestamps in order to obtain protocol data bit values. The implementations of this application convert a wheel speed sensor current signal into a first voltage signal and a second voltage signal, capture the first set of timestamps and the second set of timestamps of the rising edge and falling edge according to the first voltage signal and the second voltage signal, extract the timestamps (designated as protocol data timestamps) from the protocol data bits according to the first set of timestamps and the second set of timestamps, and analyze the protocol data bits in order to obtain the values ​​of the protocol data bits, so that the values ​​of the protocol data bits are obtained to complete the analysis of the protocol data bits, which can reduce the cost of the product and improve the competitiveness of the companies. As a preferred embodiment, in the second aspect of the embodiments of this application, the unit of analysis comprises: a sorting subunit, which is used to sort protocol data timestamps in chronological order; a determination subunit, which is used to determine a value of a first protocol data bit based on a first timestamp from among the ordered protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP, bit0=1; where TimeStamp0 is the first timestamp among the ordered protocol data timestamps and TimeStamp.subp2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; a first analysis subunit, which is used to: when bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1 and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; a second analysis subunit, which is used to: when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk, calculate the difference between TimeStampk+1, and TimeStampk and designate it as the second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; Determine a value for bit8 according to the sum of the bits bit0 to bit7, if the sum of the bits bit0 to bit7 is even, bit8=0; and if the sum of the bits bit0 to bit7 is odd, bit8=1. The protocol data bit uses Manchester encoding (IEEE 802.3), and its encoding rule is as follows: the intermediate level jump from low to high indicates "1," and the intermediate level jump from high to low indicates "0." According to the AK protocol standard, the speed pulse width is TP (with a nominal value of 50 µs), and the falling edge code element width of the speed pulse and the first protocol data bit is TP / 2. The protocol data timestamp code element can be determined based on this, and the value of each protocol data bit is analyzed based on the Manchester encoding rule and the falling edge code element width of the speed pulse and the first protocol data bit of TP / 2. The third aspect of the embodiments of this application discloses an electronic device comprising a memory that stores executable program codes and a processor coupled to the memory, wherein the processor invokes the executable program codes stored in the memory to execute the protocol data bit analysis method for an AK protocol wheel speed sensor disclosed in the first aspect of the embodiments of this application. The fourth aspect of the embodiments of this application discloses a computer-readable storage medium, which stores a computer program, wherein the computer program enables a computer to execute the protocol data bit analysis method for a wheel speed sensor with AK protocol disclosed in the first aspect of the embodiments of this application. The fifth aspect of the embodiments of this application discloses a computer program product, wherein, when the computer program product is executed on a computer, the computer can execute the protocol data bit analysis method for a wheel speed sensor with AK protocol disclosed in the first aspect of the embodiments of this application. The sixth aspect of the embodiments of this application discloses an application publishing platform, wherein the application publishing platform is used to publish a computer program product and when the computer program product is run on a computer, the computer can execute the protocol data bit analysis method for an AK protocol wheel speed sensor disclosed in the first aspect of the embodiments of this application. The embodiments of this application extract protocol data timestamps based on the first set of timestamps and the second set of timestamps, thereby analyzing the protocol data bits according to the protocol data timestamps and obtaining the values ​​of the protocol data bits. Compared with the prior art, the embodiments of this application offer the following advantages: 1. No special chip is required to analyze the protocol data bits, which reduces product cost, ensures supply chain security, and improves the competitiveness of businesses. 2. The field amplitude, mode status, direction information, and test information of a smart wheel speed sensor can be acquired according to the values ​​of the protocol data bits obtained through analysis. Brief description of the drawings Fig. 1 is a flowchart of a protocol data bit analysis method for an AK protocol wheel speed sensor disclosed in the embodiments of this application. Fig. 2 is a graph of the data format of an AK protocol under high-speed conditions. Fig. 3 is a graph of the data format of an AK protocol under low-speed conditions. Fig. 4 is a structural block diagram of a protocol data bit analysis system for a wheel speed sensor with AK protocol disclosed in the embodiments of this application. Fig. 5 is a schematic diagram of a timestamp. Fig. 6 is a schematic diagram of a buffer. Fig. 7 is a schematic diagram of the capture of a velocity pulse under high-speed conditions. Fig. 8 is a schematic diagram of the capture of a protocol data bit under high-speed conditions. Fig. 9 is a schematic diagram of AK data under low speed conditions. Fig. 10 is a schematic diagram of the capture of a protocol data bit under low speed conditions. Fig. 11 is a schematic diagram of the capture of a protocol data bit under low speed to high speed conditions. Fig. 12 is a schematic diagram of Manchester encoding. Fig. 13 is a schematic diagram of the analysis of a bit of protocol data bit.sub.0. Fig. 14 is a flowchart of a protocol data bit analysis device for a wheel speed sensor with AK protocol disclosed in the embodiments of the present application. Fig. 15 is a structural schematic diagram of an electronic device disclosed in the embodiments of this application. Detailed description of the invention The present specific embodiment is merely an explanation of the present application and not a limitation thereof. Persons of ordinary skill in the art may make amendments to this application without creative contribution as required after reading the description; such amendments shall be protected by patent law as they are considered to be within the scope of the claims of this application. To clarify the purpose, technical solution, and advantages of this application, the technical solution of this application will be described below clearly and completely, and in combination with the drawings of this application. As is evident, the implementations described are only part of the implementations covered by this application, not all of them. All other implementations obtained by persons with ordinary skill in the art and based on the implementations covered by this application without contributing creative effort will fall within the scope of protection of this application. The term "comprising", as well as any other variant used in the description and claims of this application, is intended, in the embodiments of this application, to encompass a non-exclusive inclusion; for example, processes, methods, systems, products or devices that include a series of steps or units are not limited to the steps and units clearly listed, but include other steps or units that are not clearly mentioned or that are inherent in these processes, methods, products or devices. In the embodiments of this application, terms such as "by way of example" or "for example" are used to indicate the use of an example, illustration, or explanation. Any embodiment or design scheme described as "by way of example" or "for example" in the embodiments of this application shall not be construed as preferable or superior to other embodiments or design schemes. Specifically, terms such as "by way of example" or "for example" are intended to present related concepts in a concrete manner. Implementation 1 Figure 1 is a flowchart of a protocol data bit analysis method for an AK protocol wheel speed sensor of the embodiments of the present application; referring to Figure 1, the method may comprise the following steps: S110: receive a current signal sent by a wheel speed sensor with AK protocol and convert the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse, and the second voltage signal only includes a speed signal pulse. The AK protocol is a standard interface for wheel speed sensors and electronic control units (ECUs) for transmitting data signals. The sensor signals are processed by signal modulation units to produce speed and data signals. The protocol data bits include bits 0 to 8, where bit 0 indicates an incorrect gap installation flag bit, bit 1 indicates a sensor operating mode ("0" for normal and "1" for abnormal), bit 2 indicates a protocol mode bit ("0" for a correct protocol and "1" for an incorrect protocol), bit 3 indicates an address validity bit ("0" for invalid and "1" for valid), bit 4 is an address information bit ("0" for forward and "1" for backward), bits 5 to 7 are gap position information bits, bit 8 is a parity check bit, where when the sum of the first 8 bits (bit 0 to bit 7) is even, bit 8=0, and when the sum of the first 8 bits is odd, bit 8=1. Therefore, the field amplitude, mode status, direction information, and check information of a wheel speed sensor can be obtained from the protocol data bits. In a preferred embodiment of the present application, the current signal can be converted into a first voltage signal and a second voltage signal based on the comparison of signals through an AK signal separation circuit. The AK signal separation circuit can be implemented using a comparator, and as an example, it can complete the conversion of the current signal and the voltage signals through a certain I / V conversion circuit, so that it is possible to obtain the corresponding pulse signals based on the comparison of the converted voltage signals and the reference voltage signal, and the pulse signals obtained can be designated as the first voltage signal and the second voltage signal. Under high-speed conditions, the speed pulse amplitude is 28 mA and the protocol data bit pulse amplitude is 14 mA. As shown in Fig. 2, when the speed is high, the protocol data bit pulses (bits 0 through 8) are not necessarily all sent. Consequently, the first and second voltage signals can be derived from the high-speed conditions, where the high level of the second voltage signal corresponds to the 28 mA speed pulse amplitude. That is, the second voltage signal outputs a high level only if the speed pulse is greater than or equal to a first preset value (e.g., 23.5 mA), and a low level if the speed pulse is less than the first preset value. This shows that the second voltage signal includes only the speed signal pulse, but not the protocol data bit pulse. The first voltage signal is also completed by the comparator, and the comparator is used so that the first voltage signal outputs a high level when the pulse amplitude is greater than a second preset value (e.g., 11.7 mA) and outputs a low level when the pulse amplitude is less than the second preset value, and the first voltage signal not only includes the speed signal pulse, but also the protocol data bit pulse. Under low speed conditions, the speed pulse amplitude is 14 mA and the protocol data bit pulse amplitude is 14 mA, as shown in Fig. 3. Consequently, the second voltage signal can be extracted with a speed pulse amplitude of 28 mA and the first voltage signal with pulse amplitudes of 28 mA and 14 mA, as well as a protocol data bit pulse amplitude of 14 mA. For low speed to high speed conditions, since the speed pulse amplitude includes not only 14 mA but also 28 mA, the second voltage signal can be extracted with the speed pulse amplitude of 28 mA and the first voltage signal with the pulse amplitude of 28 mA and 14 mA, as well as the protocol data bit pulse amplitude of 14 mA. As shown in Fig. 4, the AK signal separation circuit can extract and convert a current signal from an AK protocol into voltage signals WSO1 (i.e., the first voltage signal) and WSO2 (i.e., the second voltage signal) according to the different amplitude characteristics of the protocol data bit pulse and the rate pulse. WSO1 includes a rate signal pulse and a protocol data bit pulse. WSO2 includes only a rate signal pulse. S120: Capture the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designate the timestamps of the rising and falling edges of the first captured voltage signal as a first set of timestamps, designate the timestamps of the rising and falling edges of the second captured voltage signal as a second set of timestamps, and save the first set of timestamps and the second set of timestamps. As shown in Fig. 4, the timing values ​​of the rising and falling edges of the first and second voltage signals can be captured using a pulse capture module. The edge capture module can collect all the timing points from 0 to 1 (rising edge) and from 1 to 0 (falling edge), thus obtaining the first set of timestamps and the second set of timestamps. The edge capture module can be implemented as a GTM / TIM module, an eMIOS module, or a FlexIO module. The pulse capture module captures the timing values ​​of the rising and falling edges of WSO1 and WSO2, inputs a timestamp Time Stamp1 (corresponding to the rising and falling edges of WSO1, referred to as the first set of timestamps) into a protocol data bit analysis module, and inputs a timestamp Time Stamp2 (corresponding to the rising and falling edges of WSO2, referred to as the second set of timestamps) into a wheel speed calculation module. The relationship between I_low (7 mA), I_mid (14 mA), and I_high (28 mA) with Time Stamp1 and Time Stamp2 is shown in Fig. 5. In Fig. 5, TP is the pulse width, with a nominal value of 50 µs. As shown in Fig. 6, the pulse capture module updates all timestamps captured in the last 5 ms at preset intervals (designated as sampling time, such as 5 ms) and puts the first set of timestamps and the second set of updated timestamps into two buffers: RecvBuffer_TimeStap1 (i.e., first timestamp buffer) and RecvBuffer_TimeStap2 (i.e., second timestamp buffer). S130: Acquire a complete set of timestamps of the protocol data bits in accordance with the first set of timestamps and the second set of timestamps, and designate them as protocol data timestamps. The realizations of this application are primarily focused on the analysis of protocol data bits under three conditions: high-speed conditions, low-speed conditions, and low-speed to high-speed conditions. Under high-speed conditions, since a pulse between two adjacent speed pulses is a protocol data pulse, the protocol data timestamps are constructed directly from the pulse between two adjacent speed pulses. Therefore, the protocol data timestamps under high-speed conditions can be obtained using the following process: Within a predetermined sampling period, determine a timestamp of a rising edge of a last velocity pulse and a timestamp of a falling edge of a penultimate velocity pulse based on the second set of timestamps and designate them as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively. As shown in Fig.7, find the rising edge (which is a penultimate timestamp of the second set of timestamps) of the last captured velocity pulse and recode the timestamp (NewEdgeTimeStamp, designated as the first reference high-speed timestamp) to RecvBuffer_TimeStap2; and find the falling edge (which is a third last timestamp of the second set of timestamps) of the second last captured velocity pulse and recode the timestamp (PreviousEdgeTimeStamp, designated as the second reference high-speed timestamp) to RecvBuffer_TimeStap2; in RecvBuffer_TimeStap2, PreviousEdgeTimeStamp is stored in an element of Index = j; and NewEdgeTimeStamp is stored in an element of Index = j+1). Acquire all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp, where all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp are protocol data timestamps. As shown in Fig. 8, the timestamps cached in RecvBuffer_TimeStap1 within the last 5 ms are traversed backward to acquire the timestamps (all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp) between NewEdgeTimeStamp and PreviousEdgeTimeStamp, and cache them in Buffer_CalAKBitTimeStamp.At this point, within the recently preset sampling period, the latest set of protocol data bit timestamps (18 protocol data timestamps in total) is cached in Buffer_CalAKBitTimeStamp (i.e., a preset buffer of AK byte timestamps). As shown in Fig. 9, under low speed conditions, the speed pulse amplitude changes to I_mid (14 mA), which is consistent with the protocol data bit pulse amplitude. In the protocol data of the same frame, the difference between two adjacent timestamps lies between TP / 2 and TP. Therefore, under low-speed conditions, since only the first voltage signal is available, the first timestamps whose difference between two adjacent timestamps lies between TP / 2 and TP can be used to construct the protocol data timestamps, and the specific process is as follows: within a pre-set sampling period, order the first sets of timestamps located within the sampling period in chronological order from back to front; Select a preset number (the preset number is a fixed value, and the timestamps before and after the fixed value correspond to rate pulse signals) of the first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, where the difference between any two adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width. As shown in Fig. 10, the timestamps cached in RecvBuffer_TimeStap1 within the last 5 ms are traversed from back to front until the count of successful searches is 20, at which point a full frame of timestamps of the protocol data bits (bit 0 to bit 8) is considered to have been found. Starting from the current timestamp i, if TimeStampi-TimeStampi1 is between TP / 2 and TP, TimeStampi1 and TimeStampi are considered to belong to the same protocol data frame, and the success search count is incremented by 1 to continue the sequential forward recursive search. If TimeStampi5-TimeStampi4 is greater than TP, the search fails and the count is cleared. A traverse search is then initiated from i-5 to i-24. At this point, the count reaches 20 and the traverse is considered successful. The timestamps from TimeStampi5 to TimeStampi22 (18 protocol data timestamps in total) are cached in Buffer_CalAKBitTimeStamp. As shown in Fig.11, under low speed to high speed conditions, the speed pulse amplitude changes from I_mid (14 mA) to I_high (28 mA). The transition from low speed to high speed can be considered a combination of low speed and high speed conditions. Since the first voltage signal and the second voltage signal are available, the first reference high-speed timestamp can be determined from the second voltage signal. Using this first reference high-speed timestamp as a starting point, a set of first timestamps is selected from the first sets of timestamps. These timestamps are closest to the first reference high-speed timestamp, and the difference between any two adjacent timestamps is between TP / 2 and TP. This process is used to construct the protocol data timestamps. The specific process is as follows: within a preset sampling period, determine a timestamp of a rising edge of a last speed pulse based on the second set of timestamps and designate it as a first reference high speed timestamp; Starting from the first reference high-speed timestamp, sort the first sets of timestamps located within the sampling period in chronological order from back to front; select a preset number of first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width. In Fig. 11, the rising edge of the last captured velocity pulse is located, and the timestamp TimeStampi4 is re-encoded. Starting from the current timestamp i, if TimeStampi is greater than TimeStampi4, so the search condition is not met, forward recursion continues sequentially until TimeStampi5 is less than TimeStampi4. At this point, the timestamp of the first bit of protocol data is considered to have been found, and the count of successful searches is incremented by 1 to initiate a traverse search from i-5 to i-24. At this point, the count reaches 20, and the traverse is considered successful. The timestamps from TimeStampi5 to TimeStampi22 (18 protocol data timestamps in total) are cached in Buffer_CalAKBitTimeStamp. S140: Analyze the protocol data bits according to the protocol data timestamps in order to obtain protocol data bit values. As shown in Fig. 12, the protocol data bit uses Manchester encoding (IEEE 802.3), and its encoding rule is as follows: the intermediate level jump from low to high indicates "1," and the intermediate level jump from high to low indicates "0." According to the AK protocol standard, as shown in Fig. 5, the speed pulse width is TP (with a nominal value of 50 µs), and the falling edge code element width of the speed pulse and the first protocol data bit is TP / 2. The protocol data timestamp code element can be determined based on this, and the value of each protocol data bit is analyzed based on the Manchester encoding rule and the code element width of the falling edge of the rate pulse and the first TP / 2 protocol data bit. The specific process is as follows: Determine a value for a first protocol data bit based on a first timestamp from among the ordered protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP, bit0=1; where TimeStamp0 is the first timestamp among the ordered protocol data timestamps and TimeStamp.subp2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; When bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1 and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk, calculate the difference between TimeStampk+1 and TimeStampk, and designate it as a second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; Determine a value for bit8 according to the sum of the bits bit0 to bit7, if the sum of the bits bit0 to bit7 is even, bit8=0; and if the sum of the bits bit0 to bit7 is odd, bit8=1. Taking high-speed conditions as an example, according to the timestamps (protocol data timestamps) cached in Buffer_CalAKBitTimeStamp, (i-2) corresponds to the rising edge of the speed pulse in Fig. 8; ei corresponds to an edge of a first code element. As shown in Fig. 8-13, if TimeStampi-TimeStampi2=1, 5 TP, the center position of the first code element is a falling edge, i.e., the value of the first protocol data bit bit0 is 0; and if TimeStampi-TimeStampi2=2 TP, the center position of the first code element is a rising edge, i.e., the value of the first protocol data bit bit0 is 1. When bit0=0, the timestamp corresponding to the middle edge of the protocol data bit bit0 is TimeStampi+1. If TimeStampi+2-TimeStampi+1=TP / 2, bit1=0; and if TimeStampi+2-TimeStampi+1=TP, bit1=1. When bit0=1, the timestamp corresponding to the middle edge of the protocol data bit bit0 is TimeStampi. If TimeStampi+1-TimeStampi=TP / 2, bit1=0; and if TimeStampi+1-TimeStampi=TP, bit1=0. The analysis method for bits 2 through 7 follows the recursion above, and finally, the value of bit 8 is obtained according to the values ​​of bits 0 through 7. The implementations described in this application capture the timestamps of the AK protocol data bits based on the separation circuit through the processor. Based on the captured timestamps, the protocol data bits are analyzed according to the characteristics of the AK protocol, making it possible to acquire the field amplitude, mode status, direction information, and check information from an AK protocol wheel speed sensor. Implementation 2 Referring to Fig. 14, Fig. 14 is a structural schematic diagram of a protocol data bit analysis device for an AK protocol wheel speed sensor disclosed in the embodiments of this application. As shown in Fig. 14, the protocol data bit analysis device for an AK protocol wheel speed sensor may comprise: a receiving unit 210, which is used to receive a current signal sent by an AK protocol wheel speed sensor and convert the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse, and the second voltage signal only includes a speed signal pulse; a capture unit 220, which is used to capture the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designate the timestamps of the rising and falling edges of the first captured voltage signal as a first set of timestamps, designate the timestamps of the rising and falling edges of the second captured voltage signal as a second set of timestamps, and store the first set of timestamps and the second set of timestamps; an acquisition unit 230, which is used to acquire a complete set of timestamps of the protocol data bits according to the first set of timestamps and the second set of timestamps, and designate them as protocol data timestamps; A 240 analysis unit, which is used to analyze protocol data bits according to protocol data timestamps in order to obtain protocol data bit values. As an optional solution, the 210 receiving unit may include: convert the current signal into a first voltage signal and a second voltage signal based on the comparison of signals through an AK signal separation circuit. As an optional solution, under high-speed conditions, the 230 acquisition unit can comprise: within a pre-set sampling period, determine a timestamp of a rising edge of a last velocity pulse and a timestamp of a falling edge of a penultimate velocity pulse based on the second set of timestamps and designate them as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively; acquire all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp, wherein all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp are protocol data timestamps. As an optional solution, under low-speed conditions, the 230 acquisition unit may comprise: within a pre-set sampling period, order the first sets of timestamps located within the sampling period in chronological order from back to front; select a preset number of first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width. As an optional solution, under low-speed to high-speed conditions, the 230 acquisition unit can comprise: within a preset sampling period, determine a timestamp of a rising edge of a last speed pulse based on the second set of timestamps and designate it as a first reference high speed timestamp; Starting from the first reference high-speed timestamp, sort the first sets of timestamps located within the sampling period in chronological order from back to front; select a preset number of first timestamps in chronological order from the first sets of timestamps ordered to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps from among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width. As an optional solution, analysis unit 240 may include: a sorting subunit, which is used to sort protocol data timestamps in chronological order; a determination subunit, which is used to determine a value of a first protocol data bit based on a first timestamp from among the ordered protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP, bit0=1; where TimeStamp0 is the first timestamp among the ordered protocol data timestamps and TimeStamp.subp2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; a first analysis subunit, which is used to: when bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1 and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; a second analysis subunit, which is used to: when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk, calculate the difference between TimeStampk+1, and TimeStampk and designate it as the second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; Determine a value for bit8 according to the sum of the bits bit0 to bit7, if the sum of the bits bit0 to bit7 is even, bit8=0; and if the sum of the bits bit0 to bit7 is odd, bit8=1. Implementation 3 With reference to Figure 15, Figure 15 is a structural schematic diagram of an electronic device that can be used to implement the embodiments of this application. The electronic device is intended to represent various forms of digital computers, such as laptops, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, mobile phones, smartphones, wearable devices (such as headsets, glasses, and watches), and other similar computing devices.The components shown in this document, as well as their connections, relationships, and functions, are merely examples and are not intended to limit the implementation of the realizations of this application as described and / or claimed herein. As shown in Fig. 15, the electronic device comprises at least one processor 310 and memory, such as read-only memory (ROM) 320 and random-access memory (RAM) 330, which is communicatively connected to at least one processor 310. The memory stores a computer program that can be executed by the processor, and the processor 310 can perform various actions and processes according to the computer program stored in the ROM 320 or loaded from a memory unit 380 into the RAM 330. The RAM 330 can also store various programs and data necessary for the operation of the electronic device. The processor 310, ROM 320, and RAM 330 are interconnected via a bus 340. An input / output (I / O) interface 350 is also connected to the bus 340. A plurality of components of the electronic device are connected to the I / O interface 350, which comprises an input unit 360, such as a keyboard and mouse; an output unit 370, such as various displays and speakers; a memory unit 380, such as a magnetic disk and an optical disk; and a communication unit 390, such as a network card, a modem, and a wireless communication transceiver. The communication unit 390 enables the electronic device to exchange information / data with other devices via computer networks, such as the Internet and / or various telecommunications networks. The 310 processor can be a variety of general and / or specialized processing components with processing and computational capabilities. Examples of the 310 processor include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various AI-specific computing chips, different processors running machine learning algorithms, a digital signal processor (DSP), and any suitable processor, controller, or microcontroller. The 310 processor executes one or more steps of the protocol data bit analysis method for an AK protocol wheel speed sensor described above. In some embodiments, a protocol data bit analysis method for an AK protocol wheel speed sensor can be implemented as a computer program physically contained on a computer-readable storage medium, such as a 380 memory unit. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device via the 320 ROM and / or the 390 communication unit. When the computer program is loaded into the 330 RAM and executed by the 310 processor, one or more steps of the protocol data bit analysis method for an AK protocol wheel speed sensor described above can be performed.Alternatively, in other embodiments, the 310 processor can be configured in any other suitable manner (e.g., via firmware) to run a protocol data bit analysis method for an AK protocol wheel speed sensor. Various realizations of the systems and technologies described above in this document can be implemented in a digital electronic circuit system, an integrated circuit system, a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), an application-specific standard product (ASSP), a system-on-a-chip (SoC), a complex programmable logic device (CPLD), computer hardware, firmware, software, and / or a combination thereof.These various realizations may include: implementation in one or more computer programs, and one or more computer programs may be executed and / or interpreted on a programmable system that includes at least one programmable processor, and the programmable processor may be a special or general programmable processor, which may receive data and instructions from a memory system, at least one input device and at least one output device, and transmits the data and instructions to the memory system, the at least one input device and the at least one output device. The computer programs for implementing the method described in this application may be written in one, or any combination of more than one, programming language. The computer programs may be provided for a general-purpose computer processor, a specialized computer, or other programmable data processing devices, such that the computer programs implement the functions / operations specified in the flowchart and / or block diagram when executed by the processor. The computer programs may be executed wholly or partially on one machine, as a standalone software package, partially on one machine and partially on a remote machine, or wholly on a remote machine or server. In the context of the realizations of this application, a computer-readable storage medium may be a tangible medium that can contain or store computer programs for use by, or in conjunction with, an instruction-execution system, device, or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium.More specific examples of machine-readable storage media include an electrical connection based on one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, a portable compact disc (CD-ROM) read-only memory, an optical storage device, a magnetic storage device, or any suitable combination of these. To provide interaction with a user, the systems and technologies described herein can be implemented in the electronic device, and the electronic device is provided with: a display device (e.g., a cathode ray tube (CRT) monitor or a liquid crystal display (LCD) monitor) to display information to the user, a keyboard and a pointing device (e.g., a mouse or a trackball), and the user can provide input to the electronic device through the keyboard or the pointing device.Other types of devices can also be used to provide user interaction; for example, the feedback provided to the user can take any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and user input can be received in any form (including vocal input, voice input, or tactile input). The systems and technologies described herein can be implemented on a computer system (e.g., a data server) that includes back-end components, on a computer system (e.g., an application server) that includes middleware components, on a computer system (e.g., a user computer with a graphical user interface or a web browser through which the user can interact with the implementations of the systems and technologies described herein) that includes front-end components, or on a computer system that includes any combination of these back-end, middleware, or front-end components. The system components can be connected to each other via digital data communication (e.g., a communication network) in any form or medium.Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet. A computer system can consist of a client and a server. The client and server are usually physically separate and typically interact with each other through a communications network. A client-server relationship is established by computer programs running on the respective computers, which maintain a client-server relationship with each other. The server can be a cloud server, also called a compute server or cloud host, which is a host product located within a computing services system. This allows it to overcome the management difficulties and limited scalability of traditional physical servers and VPS services. The method and device for analyzing protocol data bits for a wheel speed sensor using the AK protocol disclosed in this application have been described in detail above. Specific examples are used herein to illustrate the principle and embodiments of this application. The illustrations of the above embodiments are used solely to aid in understanding the method and central idea of ​​this application. Furthermore, for persons of ordinary skill in the art, the specific embodiments and scope of application may be modified in accordance with the concept of this application. Ultimately, the content of the description should not be construed as limiting the scope of this application.

Claims

1. A protocol data bit analysis method for a wheel speed sensor with ArbeitsKreis (AK) protocol, comprising the following steps: receiving a current signal sent by a wheel speed sensor with AK protocol and converting the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse, and the second voltage signal includes only a speed signal pulse; capturing the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designating the rising and falling edge timestamps of the first captured voltage signal as a first set of timestamps,designate the rising edge and falling edge timestamps of the second captured voltage signal as a second set of timestamps and store the first set of timestamps and the second set of timestamps; acquire a complete set of timestamps of the protocol data bits according to the first set of timestamps and the second set of timestamps, and designate them as protocol data timestamps; wherein: under high-speed conditions, within a preset sampling period, determine a rising edge timestamp of a last speed pulse and a falling edge timestamp of a penultimate speed pulse based on the second set of timestamps and designate them as a first high-speed reference timestamp and a second high-speed reference timestamp,respectively; and acquire all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp, wherein all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp are protocol data timestamps; under low-speed conditions, within a predetermined sampling period, order the first sets of timestamps located within the sampling period in chronological order from back to front; and select a predetermined number of chronologically ordered first timestamps from the ordered first sets of timestamps to constitute the protocol data timestamps,wherein the difference between adjacent first timestamps among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width; under low-speed to high-speed conditions, within a preset sampling period, determine a timestamp of a rising edge of a last speed pulse based on the second set of timestamps and designate it as a reference high-speed first timestamp; starting from the reference high-speed first timestamp, order the first sets of timestamps located within the sampling period in chronological order from back to front; and select a preset number of chronologically ordered first timestamps from the ordered first sets of timestamps to constitute the protocol data timestamps,wherein the difference between adjacent first timestamps of the protocol data timestamps is within [TP / 2, TP]; analyzing the protocol data bits according to the protocol data timestamps in order to obtain protocol data bit values.

2. Method of analyzing protocol data bits for a wheel speed sensor with AK protocol according to any of claims 1-2,wherein the step of receiving a current signal sent by a wheel speed sensor with AK protocol and converting the current signal into a first voltage signal and a second voltage signal comprises: converting the current signal into a first voltage signal and a second voltage signal based on signal comparison through an AK signal separation circuit.

3. Method of analyzing protocol data bits for a wheel speed sensor with AK protocol according to any of claims 1-2,wherein the step of analyzing the protocol data bits according to the protocol data timestamps to obtain protocol data bit values ​​comprises: ordering the protocol data timestamps in chronological order; determining a value for a first protocol data bit based on a first timestamp from among the ordered protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5 TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP, bit0=1; wherein TimeStamp0 is the first timestamp from among the ordered protocol data timestamps and TimeStamp-2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; When bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1,and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; bitk is a value of a (k+1)th protocol data bit, and bitk+1 is a value of a (k+2)th protocol data bit; when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk, calculate the difference between TimeStampk+1 and TimeStampk, and designate it as a second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; TimeStampk is a (k+1)th timestamp among the ordered protocol data timestamps,TimeStampk+1 is a (k+2)th timestamp from among the ordered protocol data timestamps and TimeStampk+2 is a (k+3)th timestamp from among the ordered protocol data timestamps; and determine a value of bit8 according to the sum of bits bit0 to bit7, if the sum of bits bit0 to bit7 is even, bit8=0; and if the sum of bits bit0 to bit7 is odd, bit8=1, bit7 is a value of an 8th protocol data bit and bit8 is a value of a 9th protocol data bit.

4. Protocol data bit analysis device for a wheel speed sensor with ArbeitsKreis (AK) protocol, comprising: a receiving unit, used to receive a current signal sent by a wheel speed sensor with AK protocol and convert the current signal into a first voltage signal and a second voltage signal, wherein the first voltage signal includes a speed signal pulse and a protocol data bit pulse,and the second voltage signal only includes a speed signal pulse; a capture unit, which is used to capture the timing value of the rising and falling edges of the first voltage signal and the second voltage signal, designate the rising and falling edge timestamps of the first captured voltage signal as a first set of timestamps, designate the rising and falling edge timestamps of the second captured voltage signal as a second set of timestamps, and store the first set of timestamps and the second set of timestamps; an acquisition unit, which is used to acquire a complete set of timestamps from the protocol data bits according to the first set of timestamps and the second set of timestamps,and designating them as protocol data timestamps; wherein: under high-speed conditions, within a predetermined sampling period, determine a timestamp of a rising edge of a last speed pulse and a timestamp of a falling edge of a penultimate speed pulse based on the second set of timestamps and designate them as a first reference high-speed timestamp and a second reference high-speed timestamp, respectively; and acquire all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp,wherein all first sets of timestamps between the first reference high-speed timestamp and the second reference high-speed timestamp are protocol data timestamps; under low-speed conditions, within a predetermined sampling period, ordering the first sets of timestamps located within the sampling period in chronological order from back to front; and selecting a predetermined number of first timestamps in chronological order from the first ordered sets of timestamps to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps among the protocol data timestamps is within [TP / 2, TP], and TP is the pulse width; under low-speed to high-speed conditions, within a predetermined sampling period,determining a timestamp of a rising edge of a last rate pulse based on the second set of timestamps and designating it as a first reference high-rate timestamp; starting from the first reference high-rate timestamp, ordering the first sets of timestamps located within the sampling period in chronological order from back to front; and selecting a preset number of first timestamps in chronological order from the first ordered sets of timestamps to constitute the protocol data timestamps, wherein the difference between adjacent first timestamps among the protocol data timestamps is within [TP / 2, TP]; a unit of analysis,which is used to analyze the protocol data bits according to the protocol data timestamps in order to obtain the values ​​of the protocol data bits.

5. Protocol data bit analysis device for a wheel speed sensor with AK protocol according to claim 4, wherein the analysis unit comprises: a sorting subunit, which is used to sort the protocol data timestamps in chronological order; a determination subunit, which is used to determine a value of a first protocol data bit based on a first timestamp from among the sorted protocol data timestamps: if TimeStamp0-TimeStamp-2=1, 5 TP, bit0=0; if TimeStamp0-TimeStamp-2=2 TP,bit0=1; wherein TimeStamp0 is the first timestamp of the ordered protocol data timestamps and TimeStamp.subp-2 is a second timestamp located before TimeStamp0 belonging to the first set of timestamps; and bit0 is the value of the first protocol data bit; a first subunit of analysis, which is used to: when bitk=0, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk+1, calculate the difference between TimeStampk+2 and TimeStampk+1 and designate it as a first difference; if the first difference is TP / 2, bitk+1=0; if the first difference is TP, bitk+1=1; bitk is a value of a (k+1)th protocol data bit, and bitk+1 is a value of a (k+2)th protocol data bit; a second analysis subunit, which is used for: when bitk=1, and then a timestamp corresponding to a center edge of the protocol data bit bitk is TimeStampk,calculate the difference between TimeStampk+1 and TimeStampk, and designate it as a second difference; if the second difference is TP / 2, bitk+1=0; if the second difference is TP, bitk+1=1, where 0k6, and TP is the pulse width; TimeStampk is a (k+1)th timestamp from among the ordered protocol data timestamps, TimeStampk+1 is a (k+2)th timestamp from among the ordered protocol data timestamps and TimeStampk+2 is a (k+3)th timestamp from among the ordered protocol data timestamps; determine a value for bit8 according to the sum of bits bit0 to bit7, if the sum of bits bit0 to bit7 is even, bit8=0; And if the sum of bits 0 through 7 is odd, then bit 8 = 1, bit 7 is the value of an 8th protocol data bit, and bit 8 is the value of a 9th protocol data bit.

6. An electronic device comprising a memory that stores executable program code and a processor coupled to the memory.wherein the processor invokes the executable program codes stored in memory to execute the protocol data bit analysis method for an AK protocol wheel speed sensor of any of claims 1-3.

7. A non-transient, computer-readable storage medium that stores a computer program, wherein the computer program enables a computer to execute the protocol data bit analysis method for an AK protocol wheel speed sensor of any of claims 1-3.

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