Line termination circuit with configurable termination resistance
FI20246454A1Undetermined Publication Date: 2026-06-12艾派克公司
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Patent Information
- Application Number
- FI2024006454
- Authority / Receiving Office
- FI · FI
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2026-06-12
Abstract
According to an example aspect of the present invention, there is provided a line termination circuit for a signal line pair of a Controller Area Network, CAN, bus. The line termination circuit comprises a resistor assembly (21) and a semiconductor switch unit (22) connected in series between two lines of the line pair, wherein the semiconductor switch unit (22) a comprises at least one field-effect transistor, FET, configured to be controlled to a conducting state or to a non-conducting state with a gate drive voltage at its gate, a switch driver circuit (3) configured to generate the gate drive voltage in response to a driver activation voltage, and a control circuit (4) comprising a termination control input, wherein the control circuit (4) is configured to generate the driver activation voltage at least partially based on a termination control command at the termination control input, the gate drive voltage having a greater voltage swing than the driver activation voltage.
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