Image sensor with a plurality of SPAD photodiodes

Abstract

Image Sensor Comprising a Plurality of SPAD Photodiodes. This description relates to an image sensor comprising a plurality of avalanche photodiodes formed in and on a semiconductor substrate (101) of a first type of conductivity having a front face and a rear face, wherein: - trenches (107) extend vertically in the substrate (101) from its front face to its rear face, the trenches (107) having, in top view, the form of a continuous grid and laterally delimiting a plurality of islands (109) of substrate, each island (109) defining a pixel (PIX) comprising a single individually controllable avalanche photodiode, and comprising a doped collection area (119) of an avalanche signal from the pixel's photodiode. Figure for the abstract: Fig. 1A

Description

Title of the invention: Image sensor comprising a plurality of SPAD photodiodes technical field

[0001] This description relates generally to the field of avalanche photodiodes for the detection of single photons, also called SPAD photodiodes (from the English "Single Photon Avalanche Diode"). It relates more particularly to an image sensor comprising a plurality of SPAD photodiodes. Previous technique

[0002] A SPAD photodiode essentially consists of a reverse-biased PN junction at a voltage above its avalanche threshold. When no electric charge is present in the depletion region or space charge region of the PN junction, the photodiode is in a pseudo-stable, non-conducting state. When a photogenerated electric charge is injected into the depletion region, if the velocity of this charge within the depletion region is sufficiently high—that is, if the electric field in the depletion region is sufficiently intense—the photodiode is likely to enter an avalanche. A single photon is thus capable of generating a measurable electrical signal, and this with a very short response time. SPAD photodiodes make it possible to detect radiation of very low light intensity and are notably used for single-photon detection and photon counting.

[0003] The patent application WO2018050996 previously filed by the applicant describes examples of the realization of vertical PN junction SPAD photodiodes, allowing efficient collection of photogenerated charges deep in the substrate.

[0004] We are interested here in the realization of an image sensor comprising a plurality of vertical PN junction SPAD photodiodes. Summary of the invention

[0005] One embodiment provides an image sensor comprising a plurality of avalanche photodiodes formed in and on a semiconductor substrate of a first type of conductivity having a front face and a rear face, in which: - Trenches extend vertically into the substrate from its front face to its rear face; viewed from above, the trenches have the shape of a continuous grid and laterally delimit a plurality of substrate islands. Each island defines a pixel containing a single, individually controllable avalanche photodiode and a doped area for collecting an avalanche signal from the photodiode. pixel; - the lateral walls of the trenches are coated with a first semiconducting layer with a conductivity type opposite to that of the collection zone; and - a conductive region extends into the trenches, said conductive region being in contact with the face of the first semiconductor layer opposite the substrate.

[0006] According to one embodiment, the collection areas of the different pixels are electrically isolated from each other.

[0007] According to one embodiment, the conducting region is opaque to the radiation to be detected.

[0008] According to one embodiment, the conductive region is made of metal.

[0009] According to one embodiment, the conducting region comprises copper or tungsten.

[0010] According to one embodiment, the first semiconductor layer is made of doped polycrystalline silicon.

[0011] According to one embodiment, the first semiconductor layer is of the second type of conductivity, the junction between the lateral faces of each substrate island and the first semiconductor layer defining an avalanche zone of an avalanche photodiode of the sensor.

[0012] According to one embodiment, the sensor further comprises, in an upper part of each substrate island, a peripheral annular region of the second type of conductivity and of lower doping level than that of the first semiconductor layer, extending laterally from the side walls of the trenches.

[0013] According to one embodiment, in each island, the collection zone is a region of the same type of conductivity as the substrate but of higher doping level, located in a central part of the island.

[0014] According to one embodiment, the sensor further comprises, in a central part of each substrate island, a central region of the second type of conductivity forming the collection zone of the island, extending vertically in the substrate from its front face to its rear face, the junction between the lateral faces of the central region of the second type of conductivity and the substrate defining an avalanche zone of an avalanche photodiode of the sensor.

[0015] According to one embodiment, the first semiconductor layer is of the first type of conductivity.

[0016] According to one embodiment, the sensor further comprises, in an upper part of each substrate island, an annular region of the second type of conductivity and of lower doping level than that of the central region of the second type of conductivity, extending laterally from the lateral walls of the central region of the second type of conductivity.

[0017] According to one embodiment, the substrate is surmounted, on the side of its front face, by a second semiconductor layer of the first type of conductivity with a doping level lower than that of the substrate, the trenches passing through the second layer.

[0018] According to one embodiment, the substrate rests, on its rear face, on a third semiconductor layer of the second type of conductivity, the trenches opening into or onto the third layer or passing through the third layer.

[0019] According to one embodiment, the doping level of the third layer is lower than that of the first layer. Brief description of the drawings

[0020] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0021] [Fig.1A] [Fig.1A] is a cross-sectional view illustrating an example of an image sensor according to one embodiment;

[0022] [Fig.1B] [Fig.1B] is a top view of the sensor in [Fig.1A];

[0023] [Fig.2] [Fig.2] is a cross-sectional view illustrating another example of a sensor of images according to a method of realization;

[0024] [Fig.3] [Fig.3] is a cross-sectional view illustrating another example of an image sensor according to one embodiment;

[0025] [Fig.4A] [Fig.4A] is a cross-sectional view illustrating another example of an image sensor according to one embodiment; and

[0026] [Fig.4B] [Fig.4B] is a top view of the sensor in [Fig.4A]. Description of the implementation methods

[0027] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0028] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the control circuits for the SPAD photodiodes of the described sensors, including in particular circuits for biasing the PN junctions of the SPAD photodiodes, readout circuits adapted to detect avalanche triggering of the SPAD photodiodes, as well as quenching circuits whose function is to interrupt the avalanches of the SPAD photodiodes once they have been triggered, have not been detailed, the described embodiments being compatible with the usual implementations of such circuits or the implementation of such circuits being within the grasp of a person skilled in the art based on the indications in this description.

[0029] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.

[0030] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the cross-sectional views of the figures.

[0031] Unless otherwise specified, the expressions "approximately", "about", "in the order of", and "in the order of" mean to within 10%, preferably to within 5%, or, when they concern absolute or relative angles or angular orientations, to within 10 degrees, and preferably to within 5 degrees.

[0032] Figures IA and IB schematically and partially represent an example of an image sensor 100 according to one embodiment. [Fig. IB] is a top view of the sensor, and [Fig. IA] is a cross-sectional view along plane AA of [Fig. IB].

[0033] The sensor 100 comprises a plurality of PIX pixels, for example identical or similar (within manufacturing variations). Each PIX pixel comprises a vertical PN junction SPAD photodiode. The individual PIX pixels of the sensor are, for example, individually addressable, i.e., the SPAD photodiode of each PIX pixel can be controlled independently of the SPAD photodiodes of the other PIX pixels.

[0034] The sensor 100 comprises a semiconductor substrate 101 having substantially horizontal upper and lower faces (in the orientation of [Fig. 1A]). The substrate 101 may be made of silicon, for example, single-crystal silicon. In this example, the substrate 101 is P-doped (P). In the example shown, the substrate 101 rests on an N-doped (N-) layer 103, the upper face of which is in contact with the lower face of the substrate.

[0035] In this example, layer 103 rests on a P-doped layer 105, the upper face of which is in contact with the lower face of layer 103. For example, layer 105 can be a support substrate, on the upper face of which layer 103, and then substrate 101, are formed by epitaxy. For example, the thickness of substrate 101 is between 3 and 25 pm. Layer 103, for example, has a thickness between 500 nm and 3 pm.

[0036] The sensor 100 comprises trenches 107 extending vertically into the substrate 101 from its upper face, or front face, to its lower face, or rear face. In this example, the trenches 107 open onto the upper face of the layer 103 or in layer 103. From a top view, the trenches 107 have the form of a continuous grid laterally delimiting a plurality of islands 109 of substrate 101. In this example, each island 109 is completely surrounded and laterally separated from neighboring islands 109 by trenches 107. For example, from a top view ([Fig. 1B]), the trenches 107 include horizontal and vertical trenches, regularly distributed across the entire sensor surface. The islands 109 then all have essentially the same square or rectangular shape (from a top view) and the same dimensions. Each island 109, for example, has a width between 2 and 10 pm. In this example, each PIX pixel comprises a single island 109.

[0037] The side walls and bottom of the trenches 107 are coated with an N-type semiconductor layer 113. The layer 113 is, for example, made of doped polycrystalline silicon. In this example, the doping level of the layer 113 is higher than the doping level of the layer 103. The layer 113 extends, for example, over the entire height and length of the side walls of the trenches 107. The layer 113 is in contact with the side faces of each substrate island 109, for example, over the entire height and periphery of the island 109. During fabrication, the structure is subjected to diffusion annealing, causing dopant elements from the layer 113 to diffuse into the substrate 101, for example, over a distance of between 200 nm and 1 pm.

[0038] In this example, the sensor 100 comprises, in an upper portion of each island 109, an annular peripheral region 111 of type N (N-). The doping level of region 111 is lower than that of layer 113. In a top view, region 111 extends over the entire periphery of the island. Vertically, region 111 extends from the upper surface of the substrate 101 to a depth less than that of the substrate, for example, a depth between 100 and 1500 nm. Laterally, region 111 extends from the edge of the trench 107 delimiting island 109, towards the center of the island. The width of region 111 is less than the total width of the island, for example, between 100 nm and 1500 nm.

[0039] Each substrate island 109 defines a SPAD photodiode of a PIX pixel of the sensor. The anode region of the SPAD photodiode is formed by the P-type doped portion of substrate 101 of the island. The cathode region of the SPAD photodiode includes the portion of the N-type layer 113 in contact with the lateral faces of island 109, the N-type region (not shown) diffused into a peripheral region of island 109 from layer 113, the annular N-type region 111 of the island, and the portion of the N-type layer 103 in contact with the lower face of island 109. The PN junction formed between the lateral faces of island 109 and layer 113 defines the avalanche zone of the SPAD photodiode, i.e., the part of the PN junction of the photodiode in which the avalanche can be triggered by a single photogenerated charge.

[0040] In the upper part of the trenches 107, the layer 113 is in contact with the outer lateral faces of the N-type annular region 111. At this point, the PN junction of the photodiode therefore corresponds to the interface between the region 111 and the substrate 101. Because the N-type doping level of the region 111 is lower than that of the layer 113, the electric field generated at the upper part of the PN junction is less intense than the electric field generated at the PN junction between the substrate 101 and the layer 113. Thus, the region 111 helps to limit the risk of spurious triggering of the photodiode due to edge effects at the upper end of the trenches 107. Alternatively, the region 111 can have a lateral doping level gradient, so that its N-type doping level gradually decreases with distance from the trench 107.

[0041] In the lower part of the trenches 107, layer 113 is in contact with the N-type layer 103. The lower part of the PN junction of the photodiode therefore corresponds to the interface between layer 103 and substrate 101. Here again, because the N-type doping level of layer 103 is lower than that of layer 113, the electric field generated at the horizontal lower part of the PN junction is less intense than the electric field generated at the vertical PN junction between substrate 101 and layer 113. Thus, layer 103 helps to limit the risk of spurious triggering of the photodiode due to edge effects at the lower end of the trenches 107.

[0042] The doping levels of the substrate 101, of the layers 113 and 103, and of the regions 111, and the bias voltage of the photodiode, are preferably chosen so that the electric field at the vertical PN junction formed between the substrate 101 and the layer 113 is sufficiently intense so that the avalanche can be triggered by a single photogenerated charge, for example greater than 400 kV / cm over a distance of 100 to 500 nm in a direction orthogonal to the PN junction, and so that the electric field at the PN junctions formed between the substrate 101 and the region 111 and between the substrate 101 and the layer 103 is sufficiently weak so that the avalanche cannot be triggered by a single photogenerated charge, for example less than 400 kV / cm.For example, the reverse breakdown voltage (or avalanche voltage) of the photodiode is between 10 and 50 V, and the reverse bias voltage of the photodiode is greater than its breakdown voltage by a value between 0.5 and 10 V. The doping level of substrate 101 is, for example, between 5*10¹⁶ and 7*10¹⁷ atoms / cm³. The doping level of layer 113 is, for example, between 5*10¹⁸ and 1*10²⁰ atoms / cm³. The N-type doping level of region 111 and the doping level of layer 103 are, for example, between one-third of the P-type doping level of substrate 101 and three times the P-type doping level of substrate 101. For example, the level of... N-type doping of region 111 and layer 103 are substantially equal to the P-type doping level of substrate 101.

[0043] As an alternative, layer 103 may have a doping level substantially identical to that of layer 113. In this case, the avalanche zone of each SPAD photodiode includes not only the vertical PN junction formed between the lateral faces of substrate 101 and layer 113, but also the horizontal PN junction formed between substrate 101 and layer 103. This makes it possible to increase the surface area of ​​the avalanche zone and therefore the sensitivity of the photodiodes.

[0044] In the example of Figures IA and IB, the thickness of layer 113 is less than half the width of the trenches 107, so that layer 113 does not completely fill the trenches 107. A conductive region 115, for example metallic, is disposed in a central region of the trenches not occupied by layer 113. Region 115 is in contact, by its lateral faces, with the faces of layer 113 opposite the islands 109 of substrate, and, by its lower face, with the lower face of the portion of layer 113 covering the bottom of the trenches 107. Region 115 extends over substantially the entire height and length of the trenches 107.

[0045] Region 115 forms a continuous conductive grid electrically connecting the cathode regions of all the sensor pixels to each other.

[0046] Each PIX pixel may include an anode contact metallization 117 disposed above the upper face of the substrate island 109 of the pixel and electrically connected to the substrate 101. In the example shown, a localized P-type doped contact region 119, with a doping level higher than that of the substrate, extends into a central upper portion of the island 109. The metallization 117 is disposed on and in contact with the contact region 119. The anode contact metallizations 117 allow for individual control of the SPAD photodiodes of the different pixels of the sensor. The region 119 forms a collection area for a signal representative of the pixel illumination.

[0047] The sensor may further include one or more cathode contact metallizations 121 arranged on and in contact with the upper face of the common conductive region 115. Due to the electrical continuity of the conductive region 115, the number of cathode contact metallizations 121 may be less than the number of PIX pixels of the sensor.

[0048] For the sake of clarity, the contact metallizations of anode 117 and cathode 121 have not been shown on [Fig.1B].

[0049] During operation, the cathode regions of the SPAD photodiodes of the sensor are biased to a positive potential V+, for example via the cathode contact metallizations 121, and the anode regions of the SPAD photodiodes of the sensor are biased to a negative potential V-, for example via the metal contact settings 117, so that the cathode-anode voltage of each photodiode is greater than its avalanche voltage.

[0050] The sensor is, for example, intended to be illuminated from its underside. By way of example, the sensor may include a control integrated circuit, not shown, attached to the upper side of the substrate 101 and electrically connected to the metallizations 117 and 121. It should be noted that if the sensor is intended to be illuminated from its underside, a thinning or even complete removal of the lower layer 105 may be provided. By way of example, the lower layer 105 is completely removed, and layer 103 is partially removed down to layer 113, or even down to the underside of the regions 115. The underside of the sensor may also be coated with a stack of one or more dielectric layers, not shown, for example, a silicon nitride layer, to facilitate the entry of light into the SPAD photodiodes.

[0051] In addition to its function as a cathode contact region, the conductive region 115 forms an optical screen opaque to the radiation to be detected. This helps to limit the risk of spurious triggering of the sensor's SPAD photodiodes. Indeed, when a SPAD photodiode enters an avalanche, the avalanche zone emits photons. Region 115 forms an optical separation that prevents these photons from causing an avalanche in another photodiode of the sensor.

[0052] By way of example, region 115 comprises a copper layer and may further comprise a titanium nitride barrier layer interfacing between the copper layer and layers 113 and 103 so as to prevent copper diffusion into layers 113 and 103. Alternatively, region 115 comprises tungsten. More generally, any metal suitable for fulfilling the dual function of cathode electrical contact and optical separation of SPAD photodiodes can be used to form region 115.

[0053] By way of example, the width of the trenches 107 is between 0.4 and 2 pm. The layer 113, for example, has a thickness between 0.1 and 0.8 pm. The thickness of the conductive region 115, for example, is between 0.2 and 1 pm.

[0054] Fig. 2 is a cross-sectional view schematically and partially illustrating another example of an image sensor 200 according to one embodiment.

[0055] The sensor 200 of [Fig. 2] differs from the sensor 100 of [Fig. 1A] in that it does not include the N-type annular regions 111 of the sensor 100. Furthermore, in the sensor 200, the substrate 101 is covered by a P-type (P-) doped layer 202, with a doping level lower than that of the substrate, and whose lower face is in contact with the upper face of the substrate. By way of example, the thickness of the layer 202 is between 50 nm and 1.5 pm. The layer 202 is, for example, formed by epitaxy on the upper face of the substrate 101.

[0056] In the example of [Fig.2], the trenches 107 extend vertically from the top face of layer 202 to layer 103. Thus, at the top of the trenches 107, in each pixel PIX, layer 113 is in contact with the lateral faces of the portion of layer 202 above the island 109 of the pixel. At this level, the PN junction of the photodiode corresponds to the interface between layer 202 and layer 113. Because the P-type doping level of layer 202 is lower than that of substrate 101, the electric field generated at the PN junction between layer 202 and layer 113 is less intense than the electric field generated at the PN junction between substrate 101 and layer 113. Thus, layer 202 helps to limit the risk of spurious triggering of the photodiode due to edge effects at the upper end of the trenches 107.Preferably, the doping level of layer 202 is chosen so that the electric field at the PN junction between layer 202 and layer 113 is sufficiently low that the avalanche cannot be triggered by a single photogenerated charge, for example, is less than 400 kV / cm. As an example, the doping level of layer 202 is less than 8*10¹⁶ atoms / cm³.

[0057] In the example of [Fig.2], in each PIX pixel of the sensor, the contact region 119 is located opposite a central region of the island 109 of the pixel and extends, vertically, from the upper face of the layer 202, to the substrate 101.

[0058] Figure 3 is a cross-sectional view schematically and partially illustrating another example of a 300 image sensor according to one embodiment. The 300 sensor in Figure 3 has common features with the 200 sensor in Figure 2. These common features will not be described in detail again. In the following, only the differences compared to the 200 sensor in Figure 2 will be detailed.

[0059] In the example of [Fig. 3], the sensor is formed from a silicon-on-insulator (SOI) substrate. Layer 105 corresponds to the substrate supporting the SOI stack. An insulating layer 301 ("Box"), for example made of silicon oxide, is disposed on and in contact with the upper face of layer 105. The insulating layer 301 is itself surmounted by the stack of layers 103, 101, and 202.

[0060] In the example of [Fig.3], the trenches 107 open onto the upper face of the insulating layer 301.

[0061] In the case where the sensor is intended to be illuminated from its lower face, a thinning or even a complete removal of the lower layer 105 may possibly be provided.

[0062] It should be noted that the variant of [Fig.3] can be adapted to the example of realization of figures IA and IB.

[0063] Figures 4A and 4B schematically and partially represent an example of an image sensor 400 according to another embodiment. [Fig. 4B] is a top view of the sensor, and [Fig. 4A] is a cross-sectional view along plane AA of [Fig. 4B].

[0064] The sensor 400 of Figures 4A and 4B includes elements common to the sensor 100 of Figures IA and IB. These common elements will not be described again. Subsequently, only the differences between the two sensors will be detailed.

[0065] The sensor 400 of Figures 4A and 4B differs from the sensor 100 of Figures IA and IB in that, in the sensor 400, the N-type layer 113 of the sensor 100 is replaced by a P-type (P+)-doped layer 413, with a doping level higher than that of the substrate 101. The layer 413 is, for example, made of doped polycrystalline silicon. During fabrication, the structure can be subjected to diffusion annealing, causing dopant elements from the layer 413 to diffuse into the substrate 101, for example, over a distance of between 200 nm and 1 pm.

[0066] Furthermore, in the sensor 400 of Figures 4A and 4B, the trenches 107 completely cross the layer 103 and open into or onto the upper face of the layer 105.

[0067] The sensor 400 of Figures 4A and 4B further differs from the sensor 100 of Figures IA and 1B in that it does not include the N-type annular regions 111 present in the sensor 100.

[0068] The sensor 400 of Figures 4A and 4B further comprises, in a central portion of each substrate island 109, an N-type doped region 419 extending vertically from the upper face of the substrate 101 to the layer 103. In a top view, the center of the region 419 coincides, for example, with the center of the island 109. However, the described embodiments are not limited to this particular case. The region 419 is, for example, made of doped polycrystalline silicon. In this example, the doping level of the region 419 is higher than the doping level of the layer 103. During fabrication, the structure can be subjected to diffusion annealing, causing dopant elements from the region 419 to diffuse into the substrate 101. The region 419 is, for example, in the shape of a vertical rod or a vertical bar with a circular cross-section. Regions 419, for example, were formed before trenches 107.

[0069] The sensor 400 further comprises, in an upper portion of each island 109, an N-type (N-) annular region 421 completely surrounding, in top view, the region 419. The doping level of the region 421 is lower than that of the region 419. The region 421 extends laterally from the edge of the region 419, towards the periphery of the island 109, and is interrupted before reaching the trenches 107. The width of the region 421 is, for example, between 100 nm and 1500 nm. Vertically, the region 421 extends from the upper face of the substrate 101 to a depth less than that of the substrate, for example, a depth between 100 and 1500 nm. nm.

[0070] Each substrate island 109 defines a SPAD photodiode for one PIX pixel of the sensor. The anode region of the SPAD photodiode is formed by layer 413 and the P-doped portion of substrate 101 of the island. The cathode region of the SPAD photodiode comprises the central N-type region 419, the central annular region 421, and the portion of the N-type layer 103 in contact with the underside of island 109. The PN junction formed between the lateral faces of region 419 and substrate 101 defines the avalanche zone of the SPAD photodiode, i.e., the portion of the PN junction of the photodiode in which avalanche can be triggered by a single photogenerated charge.

[0071] In the upper part of region 419, the lateral faces of region 419 are in contact with the annular region 421. At this point, the PN junction of the photodiode therefore corresponds to the interface between region 421 and substrate 101. Because the N-type doping level of region 421 is lower than that of region 419, the electric field generated at the upper part of the PN junction is less intense than the electric field generated at the PN junction between substrate 101 and region 419. Thus, region 421 helps to limit the risk of spurious triggering of the photodiode due to edge effects at the upper end of region 419.

[0072] In the lower part of region 419, region 419 is in contact with the N-type layer 103. The lower part of the PN junction of the photodiode therefore corresponds to the interface between layer 103 and substrate 101. Here again, because the N-type doping level of layer 103 is lower than that of region 419, the electric field generated at the horizontal lower part of the PN junction is less intense than the electric field generated at the vertical PN junction between substrate 101 and region 419. Thus, layer 103 helps to limit the risk of spurious triggering of the photodiode due to edge effects at the lower end of region 419.

[0073] The doping levels of the substrate 101, of the regions 419 and 421, and of the layer 103, and the bias voltage of the photodiode, are preferably chosen so that the electric field at the vertical PN junction formed between the substrate 101 and the region 419 is sufficiently intense so that the avalanche can be triggered by a single photogenerated charge, for example greater than 400 kV / cm over a distance of 100 to 500 nm in a direction orthogonal to the PN junction, and so that the electric field at the PN junctions formed between the substrate 101 and the region 421 and between the substrate 101 and the layer 103 is sufficiently weak so that the avalanche cannot be triggered by a single photogenerated charge, for example less than 400 kV / cm.

[0074] Region 115 forms a continuous conductive grid electrically connecting the to each other the anode regions of all the pixels of the sensor.

[0075] Each pixel PIX may include a cathode contact metallization 117 disposed on and in contact with the upper face of region 419. To facilitate contact, region 419 may include, near its upper face, a more heavily doped area (not detailed in the figure) in contact with the metallization 117. The cathode contact metallizations 117 allow individual control of the SPAD photodiodes of the different pixels of the sensor. Region 419 defines a collection area for a signal representative of the pixel illumination.

[0076] The sensor may further include one or more anode contact metallizations 121 arranged on and in contact with the upper face of the common conductive region 115. Due to the electrical continuity of the conductive region 115, the number of cathode contact metallizations 121 may be less than the number of PIX pixels of the sensor.

[0077] For the sake of clarity, the contact metallizations of anode 121 and cathode 117 have not been shown on [Fig.4B].

[0078] In operation, the cathode regions of the SPAD photodiodes of the sensor are biased to a positive potential V+, for example through the cathode contact metallizations 117, and the anode regions of the SPAD photodiodes of the sensor are biased to a negative potential V-, for example through the contact metallizations 121, so that the cathode-anode voltage of each photodiode is greater than its avalanche voltage.

[0079] In addition to its function as an anode contact region, the conductive region 115 forms an optical screen opaque to the radiation to be detected. This helps to limit the risk of spurious triggering of the sensor's SPAD photodiodes.

[0080] In the case where the sensor is intended to be illuminated from its underside, thinning or even complete removal of the lower layer 105 may be provided. Alternatively, before thinning, the trenches 107 open at an intermediate level of the layer 103 but do not completely penetrate the layer 103, and, during back-side thinning, the layer 105 is completely removed and the layer 103 is partially removed down to the layer 413, or even down to the underside of the regions 115.

[0081] It should be noted that the embodiment shown in Figures 4A and 4B can be adapted to the embodiment shown in [Fig. 2]. In this case, the annular region 421 can be omitted and replaced by the P 202 type layer. Furthermore, the embodiment shown in Figures 4A and 4B can be adapted to the embodiment shown in [Fig. 3].

[0082] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will appear to those skilled in the art. art. In particular, the embodiments described are not limited to the numerical examples of dimensions and doping levels mentioned in the description.

[0083] Moreover, all types of conductivity of the structures described above can be reversed, with cathode regions being replaced by anode regions and vice versa.

Claims

Claims

1. Image sensor comprising a plurality of avalanche photodiodes formed in and on a semiconductor substrate (101) of a first conductivity type having a front face and a rear face, wherein: - trenches (107) extend vertically in the substrate (101) from its front face to its rear face, the trenches (107) having, in top view, the shape of a continuous grid and laterally delimiting a plurality of substrate islands (109), each island (109) defining a pixel (PIX) comprising a single individually controllable avalanche photodiode, and comprising a doped collection zone (119; 419) of an avalanche signal from the photodiode of the pixel; - the side walls of the trenches (107) are coated with a first semiconductor layer (113; 413) of conductivity type opposite to that of the collection zone;and - a conductive region (115) extends in the trenches, said conductive region (115) being in contact with the face of the first semiconductor layer (113; 413) opposite the substrate (101), and in which: a) the first semiconductor layer (113) is of conductivity type opposite that of the substrate, the junction between the lateral faces of each island (109) of substrate (101) and the first semiconductor layer (113) defining an avalanche zone of an avalanche photodiode of the sensor;or b) the sensor further comprises, in a central portion of each island (109) of substrate, a central region (419) of conductivity type opposite to that of the substrate forming the collection zone of the island, extending vertically in the substrate (101) from its front face to its rear face, the junction between the lateral faces of the central region (419) of conductivity type opposite to that of the substrate and the substrate (101) defining an avalanche zone of an avalanche photodiode of the sensor.;

2. Sensor according to claim 1, in which the collection areas (119; 419) of the different pixels (PIX) are electrically isolated from each other.

3. A sensor according to claim 1 or 2, wherein the conductive region (115) is opaque to the radiation to be detected.

4. A sensor according to any one of claims 1 to 3, wherein the conductive region (115) is made of metal.

5. The sensor of claim 4, wherein the conductive region (115) comprises copper or tungsten.

6. A sensor according to any one of claims 1 to 5, wherein the first semiconductor layer (113) is doped polycrystalline silicon.

7. Sensor according to any one of claims 1 to 6 in its alternative a), further comprising, in an upper part of each island (109) of substrate, a peripheral annular region (111) of conductivity type opposite to that of the substrate and of doping level lower than that of the first semiconductor layer (113), extending laterally from the side walls of the trenches (107).

8. Sensor according to any one of claims 1 to 6 in its alternative a), or according to claim 7, in which, in each island (109), the collection zone (119) is a region of the same conductivity type as the substrate (101) but of higher doping level, located in a central part of the island.

9. Sensor according to any one of claims 1 to 6 in its alternative b), in which the first semiconductor layer (413) is of the first conductivity type.

10. Sensor according to any one of claims 1 to 6 in its alternative b) or according to claim 9, further comprising, in an upper part of each island (109) of substrate, an annular region (421) of conductivity type opposite to that of the substrate and of doping level lower than that of the central region (419) of conductivity type opposite to that of the substrate, extending laterally from the side walls of the central region (419) of conductivity type opposite to that of the substrate.

11. Sensor according to claim 1 or according to claim 9, in which the substrate (101) is surmounted, on its front face side, by a second semiconductor layer (202) of the first conductivity type with a doping level lower than that of the substrate (101), the trenches (107) passing through the second layer (202).

12. Sensor according to any one of claims 1 to 11, in which the substrate (101) rests, on its rear face side, on a third semiconductor layer (103) of conductivity type opposite to that of the substrate, the trenches opening into or onto the third layer (103) or passing through the third layer (103).

13. The sensor of claim 12, wherein the doping level of the third layer (103) is lower than that of the first layer (113).

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