Image sensor

Abstract

Image Sensor This description relates to an image acquisition device (1), in which photodetectors (2) have a pattern along interconnecting lines (14, 16) of readout circuits (3). Figure for the abstract: Fig. 3

Description

Title of the invention: Image sensor technical field

[0001] This description relates generally to image acquisition devices or image sensors, and more particularly to image acquisition devices based on organic photodetectors. Previous technique

[0002] Image acquisition devices comprising a plurality of organic photodetectors, for example arranged in a matrix, have already been proposed. In some applications, the image acquisition device is mounted on top of or covers a display screen. Summary of the invention

[0003] There is a need for improvement of known image acquisition devices based on organic photodetectors.

[0004] One embodiment overcomes all or part of the drawbacks of known image acquisition devices based on organic photodetectors.

[0005] One embodiment provides an image acquisition device, in which photodetectors have a pattern along interconnection lines of reading circuits.

[0006] According to one embodiment, the first electrodes of the photodetectors have a cross pattern, two branches of which are respectively aligned with the lines interconnecting the reading circuits.

[0007] According to one embodiment, a hole injection layer common to the photodetectors has a grid pattern in line with the lines interconnecting the reading circuits.

[0008] According to one embodiment, an active layer of each photodetector has the grid pattern of the hole injection layer.

[0009] According to one embodiment, an active layer of each photodetector has the cross pattern of its first electrode.

[0010] According to one embodiment, the active layer and the first electrode of each photodetector extend beyond said motif.

[0011] According to one embodiment, each reading circuit comprises a transistor, the interconnection lines corresponding to lines interconnecting respectively the sources of the transistors in a first direction and the gates of the transistors in a second direction.

[0012] According to one embodiment, the pattern in which the photodetectors are made is also directly above the drain contacts of the transistors of the reading circuits.

[0013] According to one embodiment, the area masked by the active layer of the photodetectors represents, for each pixel, less than 50%, preferably less than 30% of the pixel area.

[0014] An embodiment and implementation method provides for a process for manufacturing an image acquisition device comprising the following steps: formation of a matrix of readout circuits in which transistors are interconnected in source lines in one direction and in gate lines in a second direction; depositing, from the read circuit matrix, a stack comprising at least: an electrode; an active layer; and a hole-injecting layer, etching the layers of the stack separately or simultaneously according to a pattern following at least interconnection lines of read circuits.

[0015] According to one embodiment, the etching of the stack layers is such that the surface cumulatively masked by the electrode layer and the active layer represents, for each pixel, less than 50%, preferably less than 30% of the pixel surface.

[0016] According to one embodiment, the active layer is etched at the same time as the hole-injecting layer.

[0017] According to one embodiment, an optical filter is added to the stack.

[0018] According to one embodiment, the stacking layers further cover drain contacts of transistors in readout circuits.

[0019] According to one embodiment, the steps of the process are adapted to the manufacture of a device as described. Brief description of the drawings

[0020] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments and implementations, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0021] [Fig.1] represents, in a partial and schematic way, an electrical diagram of an embodiment of an image acquisition device;

[0022] [Fig.2] is a partial and schematic cross-sectional view of an embodiment of an image acquisition device;

[0023] [Fig.3] is an exploded, partial and schematic perspective view of an embodiment of an image acquisition device;

[0024] [Fig.4A], [Fig.4B] and [Fig.4C] are schematic top views, layers of the embodiment of an image acquisition device of the [Fig.3];

[0025] [Fig.5A], [Fig.5B], [Fig.5C], [Fig.5D], [Fig.5E], [Fig.5F], [Fig.5G], [Fig.5H] and [Fig.51] are partial and schematic cross-sectional views illustrating steps in a method of implementing a manufacturing process for an image acquisition device;

[0026] [Fig.6A] and [Fig.6B] are partial and schematic cross-sectional views, illustrating steps of another method of implementing a manufacturing process for an image acquisition device;

[0027] [Fig.7A] and [Fig.7B] are partial and schematic cross-sectional views, illustrating steps of another method of implementing a manufacturing process for an image acquisition device;

[0028] [Fig. 8] is a partial, schematic cross-sectional view illustrating a variant of development of an image acquisition device; and

[0029] [Fig.9] is a partial and schematic top view illustrating another variant of an image acquisition device. Description of the implementation methods

[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments and implementations may have the same reference numerals and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements necessary for understanding the described embodiments and implementations have been shown and are detailed. In particular, the implementation of the electronic circuits for controlling and reading the photodetectors of the described devices has not been detailed. Furthermore, the various applications that the described devices may have have have not been detailed.

[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless otherwise specified, the expressions "approximately", "about", "meaning" "Suitably" and "of the order of" mean to within 10% or 10°, preferably to within 5% or 5°.

[0035] In the following description, visible light refers to electromagnetic radiation with a wavelength between 400 nm and 700 nm, and infrared radiation refers to electromagnetic radiation with a wavelength between 700 nm and 1 mm. Near-infrared radiation is specifically distinguished from near-infrared radiation, which has a wavelength between 700 nm and 1.7 pm.

[0036] In the following description, a layer or film is said to be transparent to radiation when the transmittance of the radiation through the layer or film is greater than 10%, preferably greater than 50%.

[0037] Fig. 1 represents, in a partial and schematic way, an electrical diagram of an embodiment of an image acquisition device 1.

[0038] One role of an image acquisition device 1 is to acquire images representative of radiation (visible and / or infrared depending on the application).

[0039] An image acquisition device 1, or image sensor, of the type to which the described embodiments and implementations apply, comprises an array of photon sensors, called photodetectors 2, each associated with a readout circuit 3. Four photodetectors and four readout circuits are shown in [Fig. 1]. In practice, the image acquisition device 1 comprises a large number (for example, several hundred to several million) of photodetectors 2 and readout circuits 3. The photodetectors 2 are, for example, identical or similar (within manufacturing variations). Similarly, the readout circuits are, for example, identical or similar (within manufacturing variations).

[0040] Arbitrarily, the association of a photodetector 2 and its reading circuit 3 is designated by "pixel" 12 of the image acquisition device 1. It should be noted, however, that, depending on the application and organization of the image acquisition device 1 and of the other devices associated with it such as a display screen (not shown), this pixel 12 may represent a sub-pixel.

[0041] In [Fig. 1], each photodetector 2 is symbolized as a photodiode and each readout circuit 3 is symbolized as a transistor. Preferably, the transistors are thin-film transistors (TFTs) which can be fabricated on a transparent substrate.

[0042] Each photodetector 2 comprises an active layer 21 between a hole injecting layer 23 (HIL), symbolized by the anode of the photodiode in [Fig. 1], an electron injecting layer 25 (EIL), and an electrode 27, symbolized by the cathode of the photodiode in [Fig. 1]. The active layer 21 is the layer that captures the Photonic radiation, which reproduces a corresponding electrical signal, via electrode 27 of photodetector 2, to the readout circuit 3 of the relevant pixel 12. The HIL and EIL layers facilitate the polarization of the active layer. The HIL layer can also serve as an electrode, or a metallic electrode can be attached to the HIL layer. The HIL layer is biased directly or via its associated electrode. The photodetectors 2 are organic photodetectors (OPDs), meaning that their constituent layers, and in particular the active layer 21, are made of an organic semiconductor material (OSC).

[0043] The readout circuits 3 are implemented in a substrate (not shown in [Fig. 1]) in and / or on which are formed the channel regions of the transistors, the source and drain regions, the gate regions, and the contact points of these regions. In the example of [Fig. 1], it is assumed that the drain 33 of each transistor constituting a readout circuit 3 is connected, preferably connected, to the cathode electrode 27 of the photodetector 2 of the pixel 12 concerned. The sources 35 of the transistors 3 of the different pixels 12 are connected, preferably connected, electrically in rows 14 (in the orientation of [Fig. 1]). The gates 37 of the transistors of the different pixels 12 are connected, preferably connected, electrically in columns 16 (in the orientation of [Fig. 1]). The ends of rows 14 and columns 16 are connected to electronic control and interpretation circuits not shown and which are in themselves commonplace.These electronic circuits are, for example, also implemented in and / or on the substrate in and / or on which the transistors of the readout circuits 3 are formed. The biasing of the HIL layer is provided by these circuits and is distributed around the periphery of the matrix arrangement. The orientation of the rows 14 and columns 16 is, of course, arbitrary. For simplicity, we will subsequently refer to grid rows 16 and source rows 14. The rows 14 and 16 are preferably in two perpendicular directions.

[0044] Fig. 2 is a partial, schematic cross-sectional view of an embodiment of an image acquisition device.

[0045] In the example of [Fig.2], the image acquisition device is formed of a stack of layers of different natures, respecting for each layer patterns determined to respect the matrix arrangement of photodetectors 2 and reading circuits 3.

[0046] The stacking of layers comprises, for example, from bottom to top in the orientation of [Fig.2]: - the substrate 41, in and / or on which the reading circuits, or transistors, are formed, 3; - one or more conductive or semiconducting layers 42 in which or which are formed the source contacts 35 and drain contacts 33 of the transistors 3 as well as the lines 14 for resuming the source contacts; - one or more dielectric (insulating) layers 43 in which the gate insulators of the transistors 3 are formed and which generally laterally isolate from each other the patterns made in the layer 42; - one or more conductive or semiconducting layers 44 in which the gate contacts 37 of the transistors are formed as well as the grid contact lines 16; - one or more dielectric (insulating) layers 45 separating the readout circuit matrix 3 from the photodetector matrix 2 and which generally laterally isolate the patterns made in the layer 44 from each other; - one or more layers constituting electrode 27; - the electron injector layer 25 (EIL); - the active layer 21; - the hole injection layer 23 (HIL).

[0047] The HIL 23 layer is generally covered with a planarization layer and a protection or barrier layer, symbolized by a layer 46 in [Fig.2].

[0048] Finally, other layers or levels not shown may be associated with the image acquisition device. These include, for example: - one or more optical filters that only allow certain wavelengths in the visible and / or infrared to pass through, reaching the HIL 23 layer; - a display screen; - a touchscreen interface; and - more generally, any element that is customary depending on the application concerned.

[0049] Among the constituent layers of the image acquisition device, some are opaque and others are more or less transparent.

[0050] In some applications, it is desirable to associate the image acquisition device with a display screen or to integrate it into a display device.

[0051] An example of an application concerns display control, that is, using the image acquisition device to control the content of a display on a screen. In this case, the radiation captured by the image acquisition device is the radiation from the display screen. The image acquisition device is then located between the screen and the user viewing the screen. The display device may be opaque, or even transparent itself (for example, a display screen integrated into a window or a head-up display in a motor vehicle). In the stack-up of [Fig. 2], the display screen is located above layers 46.

[0052] Another example of application concerns image acquisition devices in front of a display screen, the image sensor being oriented to capture the images which are in front of the screen, which is then transparent or not. The display screen is located, in the stack of [Fig.2], for example, below the substrate 41 or between the readout circuit matrix 3 and the photodetector matrix 2.

[0053] In this type of application, it is desirable that the image acquisition device be as transparent as possible in the visible range so as not to interfere with the user's perception of the display.

[0054] Now, among the layers used to make the image sensor, some are more or less transparent and others are opaque in the visible range.

[0055] In particular, the materials generally used for the photodetector and in particular those of layers 27 (electrode) and 21 (OSC) are not transparent.

[0056] Even if some layers are 10% or even 50% transparent, the superposition of the different layers leads to an almost opaque stacking.

[0057] Furthermore, taking the example of image acquisition devices used to capture in the infrared, these sensors are equipped with optical filters that cut off visible radiation.

[0058] In conventional image acquisition devices, the aim is generally to maximize the area occupied by the photodetectors to increase sensitivity. However, in the applications targeted, the pixel dimensions of the image acquisition device are linked to those of the display screen to which the device is connected, which makes it possible to maintain acceptable sensitivity while reducing the area occupied by the photodetectors.

[0059] Moreover, in the applications concerned, the dimensions of the pixels 12, corresponding to the pitch of the grid lines 16 in one direction and to that of the source lines 14 in the other direction, are large compared to the size of the reading circuits 3.

[0060] According to the embodiments and implementations described, it is planned to take advantage of the presence of opaque layers (for example, metallic) at the level of the reading circuits 3 to make all or part of the layers of the photodetector approximately in the same pattern as the opaque layers of these reading circuits.

[0061] In other words, the photodetectors 2 are planned to be concentrated directly above the readout circuits 3 in order to maximize the proportion of the pixel surface free of opaque layers. This distribution allows the dimensions between the photosensitive areas (between the photodetectors) to be adjusted according to the desired performance, including sensitivity, resolution, and transparency. Indeed, the dimensions of the readout circuits 3 do not depend on the size of the photodetectors 2 but on the spacing of these photodetectors. This allows the pixel transparency level to be varied according to the desired pixel size 12.

[0062] Figure 3 is a partial, schematic, exploded perspective view of a mode of development of an image acquisition device.

[0063] Figures 4A, 4B and 4C are schematic top, layer views of the embodiment of an image acquisition device of [Fig.3].

[0064] Figure 3 shows, in perspective, the stacking and respective patterns of the constituent layers of the image acquisition device. Not all layers are shown. In particular, the insulating layers 43 and 45, which separate the conductive levels 42 and 44, respectively 44 and 27, are not shown in Figure 3, as these layers could easily be made of materials having a transparency greater than 70% to the passage of light in the visible range. The EIL layer 25 is also not shown in Figure 3, as this layer may or may not be localized.

[0065] Figures 4A, 4B and 4C are top views corresponding to [Fig. 3] and illustrating respectively the motifs: conductive layers (e.g. metallic) of source and drain contacts and source lines, as well as grid contact and grid lines; of electrode 27 of the photodetectors; and of the active layers 21 and HIL 23.

[0066] The patterns of the different layers illustrated in figures 3 and 4 respect the matrix organization of the image acquisition device as represented in [Fig.1].

[0067] We find, from bottom to top in the orientation of [Fig.3]: - the substrate 41 in which the transistors of the reading circuits 3 are made, as well as, where applicable, other semiconductor circuits associated with the control of the reading circuits and the interpretation of the electrical signals extracted from the photodetectors; - the conductive or semiconducting layer(s) 42 in which the source contacts 35 and drain contacts 33 of the transistors 3 are formed, as well as the source lines 14 for resuming the source contacts; - the dielectric (insulating) layer(s) 43; - the conductive or semiconducting layer(s) 44 in which the gate contacts 37 of the transistors are formed, as well as the gate lines 16 for resuming the gate contacts; - the dielectric (insulating) layer(s) 45; - electrode layer 27; and - a stack, in this embodiment according to the same pattern, consisting of the active layer 21 (OSC) and the hole injector layer 23 (HIL). This stack may also include the electron injector layer 25 (EIL) not shown in Figures 3 and 4.

[0068] The respective vertical electrical connections, between the drains 33 of the transistors and the The electrodes 27 of the photodetectors are connected by vertical conductive vias 51 linking, preferably connecting, layers 42 and 27. The layout of at least layer 27 among layers 27, 25, and 21, preferably the layout of both layers 27 and 21, is such that each electrode 27 has a region 53 directly above the drain contact 33 of the transistor 3 of the pixel in question. This not only maximizes the surface area of ​​the photodetector without compromising the transparency of the pixel (the drain contact 33 being opaque anyway), but it also allows for easy localization of the vias 51.

[0069] A particular feature of the pixels in the structure shown in Figures 3 and 4 is that the layers 23, 21, 25, and 27, which make up the photodetectors 2, are formed according to the patterns of the conductive layers 42 and 44. In other words, since the conductive layers 42 and 44 are made of opaque materials, the layout of the photodetector layers 2 is chosen so that their layers follow the layout of layers 42 and 44. Thus, because the dimensions of the pixels 12 are large compared to the dimensions of the readout circuits 3, large transparent areas 55 are preserved in the surface of the image acquisition device. These areas 55 are also present at each pixel 12, so that the display produced by a display screen (not shown) is preserved.

[0070] Thus, in the example of Figures 3 and 4, the patterns formed in layer 27 represent crosses 57 whose two arms are respectively parallel to the source lines 14 and the grid lines 16, and whose intersection is located approximately directly above the overlap zones between the source lines and the grid lines. Each cross 57 has a lateral protrusion forming zone 53. The crosses 57 are separated from one another insofar as they define different pixel photodetectors. The arms of a given cross 57 are separated from the arms of the four crosses 57 with which they are aligned by a gap or interval that will be subsequently filled by an insulating or semiconductor material (not shown in [Fig. 3]).

[0071] The active layer 21 and HIL 23 can be common to the different pixels and do not need to conform to the disjoint cross pattern 57 of layer 27. The electrode constituting layer 23 is even preferentially common to all the photodetectors of the image acquisition device. Since the active layer 21 is generally made of opaque materials, it is nevertheless constructed according to a grid whose two directions are respectively aligned with the source lines 14 and the grid lines 16. The active layer 21 and HIL 23 also preferably include zones 59 directly above the zones 33.

[0072] Alternatively, the active layer 21 follows the cross-shaped pattern 57 (plus the protrusion 53) of the electrode layer 27. The HIL layer, however, remains common to all pixels. In particular, if it is transparent, it may not be etched and may remain common to the entire acquisition system.

[0073] In the case where layers 21 and 23 are etched simultaneously, the widths of the grid lines of the active layers 21 and HIL 23 are preferably identical to or greater than those of the arms of the crosses 57. The widths of the arms of the crosses 57 are chosen to be, preferably, at least equal to the respective widths of the source lines 14 and the grid lines 16 directly above them, so as to take full advantage of the opaque surface area already provided by these source and grid lines. The widths of the arms are chosen according to the desired transparency, sensitivity, and resolution. This choice is preferably made by finding a compromise between these two criteria. The arms of the crosses 57 can therefore be wider than the source and grid lines.The gap between the crosses in the directions of the source and grid lines is, at a minimum, of a value allowing electrical isolation between the electrodes of 27 neighboring pixels.

[0074] The widths of the lines of the active layers 21 and HIL 23 are chosen to be, for example, approximately equal to, preferably greater than, the widths of the branches of the crosses 57.

[0075] The dimensions of zones 53 and 59 are chosen based on the dimensions of the drain contacts 33. For example, the dimensions of zones 53 and 59 are at least equal to, and preferably approximately equal to, the dimensions of the drain contacts 33 in order to take full advantage of the opaque surface area already provided by these source lines and grids. In practice, they may even be larger than the dimensions of the drain contacts 33.

[0076] Transparency can be defined, at the level of a pixel 12, by the ratio of the area of ​​zone 55 to the area of ​​the pixel.

[0077] In the example of [Fig.3], it is assumed that the transistors 3 are horizontal transistors, that is to say, whose source and drain regions are substantially coplanar, as opposed to vertical transistors where the source and drain regions are vertically aligned.

[0078] The embodiments and implementations described can nevertheless be transposed to realizations of reading circuits based on vertical transistors, provided that the opaque areas constituted by the conductive levels occupy, as for the lateral or horizontal structures, a small surface area compared to the surface of the pixel.

[0079] As a specific embodiment, for pixels 12 with dimensions on the order of 50 µm, and therefore a step size on the order of 50 µm in both directions of the plane, a branch width of the order of 10 µm can be provided. Furthermore, square areas 53 and 59 with sides on the order of 10 µm can be provided. With such proportions, the resulting transparency is on the order of 70%.

[0080] One advantage of the architecture described is that it allows for improved transparency overall image acquisition without compromising its sensitivity or resolution.

[0081] Another advantage is that transparency is directly related to the pixel fill factor of opaque layers. This facilitates determining the trade-off between transparency and sensitivity and resolution.

[0082] Table 1 below gives examples of transparency for several pixel pitch values, assuming that the branches of the crosses 57 cover without overflow the grid lines 16 and the source lines 14 which have widths of the order of 10 sqm and assuming drain contacts 33 of 30 sqm by 40 sqm.

[0083] [Tables 1] No Fill Factor / Transparency 50 sq m 12% 85 sq m 60% 100 sq m 68% 105 sq m 70% 125 sq m 76% 300 sq m 92%

[0084] By way of example, electrode 27 corresponds to one or more opaque and / or transparent electrically conductive layers made of: in a transparent conductive oxide (TCO), for example gallium-doped zinc oxide, tin oxide, fluorine-doped tin oxide (FTO), zinc oxide, aluminum-doped zinc oxide, indium-doped cadmium oxide, titanium nitride TiN, indium tin oxide (ITO), etc.; in a metal, for example, gold, silver, lead, palladium, copper, nickel, tungsten or chromium; in carbon, silver or copper nanowires; in graphene; or in a mixture of two or more of these materials.

[0085] Preferably, the electrode 27 consists of a metallic layer and a transparent conductive oxide layer (for example, ITO). The ITO layer covers the metallic layer and is in contact with it. In this case, the ITO layer can have the same pattern as the active layer 21 and extend into the areas 55 of each pixel, as will be seen in relation to [Fig. 9], provided that it is localized by pixel. Preferably, the metallic layer of the electrode 27 is then of in- lesser and respects the pattern of [Fig.3] and 4.

[0086] By way of example, the EIL layer 25 covers the electrode 27, more particularly the ITO layer of this electrode, and is in contact with it.

[0087] By way of example, the EIL 25 layer is made of a polymer material. The EIL 25 layer is, for example, obtained from an ink comprising a polymer in solution in a solvent. The polymer of the EIL 25 layer is, for example, polyethylene imine (PEI) or polyethylene imine ethoxylate (PEIE).

[0088] According to another example, the EIL layer is chosen from the group comprising: - a metallic oxide, in particular a titanium oxide or a zinc oxide; - a molecular host / dopant system, in particular the products marketed by the company Novaled under the names NET-5 / NDN-1 or NET-8 / MDN-26; - a doped conductive or semiconducting polymer, for example the PEDOT:Tosylate polymer which is a mixture of poly(3,4)-ethylenedioxythiophene and tosylate; - polyethyleneimine (PEI) or polyethyleneimine ethoxylated (PEIE), propoxylated and / or butoxylated; - a carbonate, for example CsCO3; - a polyelectrolyte, for example from poly[9,9-bis(3'-(N,N-dimethylamino)propyl)-2,7-fluorene-alt-2,7-(9,9-dioctyfluorene)] (PFN), poly[3-(6-trimethylammoniumhexyl)thiophene] (P3TMAHT) or poly[9,9-bis(2-ethylhexyl)fluorene]-b-poly[3-(6-trimethylammoniumhexyl)thiophene (PF2 / 6-b-P3TMAHT); and - a mixture of two or more of these materials.

[0089] By way of example, the active layer 21 covers the EIL layer 25 and is in contact with it.

[0090] By way of example, the active layer 21 is made of an organic semiconductor material (OSC), for example, deposited by liquid deposition. The active layer 21 may comprise an ambipolar semiconductor material, or a mixture of an N-type semiconductor material and a P-type semiconductor material, for example, in the form of superimposed layers or an intimate mixture at the nanoscale so as to form a bulk heterojunction. The thickness of the active layer 21 may be between 50 nm and 2 pm, for example, on the order of 200 nm.Examples of semiconductor polymers of the type suitable for the realization of the active layer 21 are poly(3-hexylthiophene) (P3HT), poly[N-9'-heptadecanyl-2,7-carbazole-alt-5,5-(4,7-di-2-thienyl-2',l',3'-benzothiadiazo le)] (PCDTBT), poly[(4,8-bis-(2-ethylhexyloxy)-benzo[l,2-b;4,5-b'] di-thiophene)-2,6-diyl-alt-(4-(2-ethylhexanoyl)-thieno[3,4-b] thiophene))-2,6-diyl] (PBDTTT-C), poly[2-methoxy-5-(2-ethyl-hexyloxy)-l,4-phenylene-vinylene]. (MEH-PPV) or poly[2,6-(4,4-bis-(2-ethylhexyl)-4H-cyclopenta [2,1-Z?;3,4-Z / ]dithiophene)-alt-4,7(2,1,3-benzothiadiazole)] (PCPDTBT). Examples of N-type semiconductor materials suitable for realizing active layer 21 are fullerenes, notably C60, [6,6]-phenyl-C61-methyl butanoate (

[60] PCBM) and [6,6]-phenyl-C71-methyl butanoate (

[70] PCBM).

[0091] By way of example, the HIL layer 23 covers the active layer 21 and is in contact with it.

[0092] By way of example, layer 23 HIL is: in a conductive or semiconducting polymer, for example organic, for example doped, for example a mixture of poly(3,4-ethylenedioxythiophene) (PEDOT) and sodium poly(styrene sulfonate) (PSS), known as PEDOT:PSS, or polyaniline or polymers known by the trade names Plexcore OC RG-1100 and Plexcore OC RG-1200 (marketed by Sigma-Aldrich); in a molecular host / dopant system such as the products known under the trade names NHT-5 / NDP-2 and NHT-18 / NDP-9 (marketed by the company Novaled); in a polyelectrolyte, for example a fluoropolymer copolymer based on sulfonate tetrafluoroethylene such as Nafion; into a conjugated polymer, such as polytriarylamine (PTAA); in an organic compound such as N,N'-diphenyl-N,N'-Bis (l-naphthyl)(l,r-biphenyl)-4,4'-diamine (NPB) or N,NT-diphenyl-N,N'-(3-methylphenyl)-l,lT-biphenyl-4,4T-diamine (TPD); or in a mixture of two or more of these materials.

[0093] Figures 5A, 5B, 5C, 5D, 5E, 5F, 5G, 5H and 51 are partial and schematic cross-sectional views illustrating steps in an implementation method of a manufacturing process for an image acquisition device.

[0094] These figures schematically represent examples of structures obtained after manufacturing steps of the image acquisition device. Their representation is simplified, and not all the details of the patterns as described above are shown. Only the patterns useful for understanding the process have been represented. Furthermore, other manufacturing steps than those described may occur but have not been detailed. In particular, it is assumed that the ITO layer of the lower electrode 27 of the photodetector has the same pattern as the metallic layer of this electrode. It will be seen later that the ITO layer may, instead, have the same pattern as the active layer 21. Moreover, the EIL layer 25 has not been shown since its pattern covers at least the metallic layer of electrode 27 but may extend beyond it.

[0095] The layers that may be made of opaque or non-transparent materials have been hatched in the figures that follow.

[0096] The fabrication of the image acquisition device begins ([Fig. 5A]) with the fabrication of the readout circuits 3 in and / or on the substrate 4L. This substrate is transparent. Preferably, the transparency of the material constituting the substrate 41 is at least 80%, more preferably at least 95%. For example, the substrate is made of glass.

[0097] The readout circuits 3 are manufactured using standard electronic circuit manufacturing techniques. At the end of the readout circuit manufacturing process, the source contacts 35 and drain contacts 33, as well as the grid lines 16 and source lines 14, are formed in conductive layers. In [Fig. 5A], the left-hand side illustrates the presence, at the edge of the matrix, of a conductive bar 61 for biasing the hole injection layer 23, which constitutes the upper electrode of the photodetector. This bar 61 is, for example, formed in one of the layers 42 and 44. For simplicity, and since these figures are schematic, the grid and source lines are not shown.

[0098] The assembly is covered entirely with an insulating layer 45 which also serves to flatten the surface of the device before the photodetectors 2 are made.

[0099] To produce the photodetectors, we begin ([Fig. 5B]) by forming the electrode layer 27 (at least its metallic sublayer) according to the pattern of the crosses 57 (Figures 3 and 4B). The crosses 57 are insulated from each other by an insulating or semiconducting material from subsequent steps.

[0100] Then, the EIL 25 (not shown), active 21 and HIL 23 layers are deposited full plate ([Fig.5C]). These deposits are made, in liquid form, for example, by slot-die coating or spin coating.

[0101] Next, layers 23, 21, (and 25) are etched ([Fig. 5D]) directly above the polarization bar 61 so as to expose it (area 63). This etching is, for example, a reactive ion etching (RIE).

[0102] A conductive material 65 is then deposited ([Fig.5E]) to connect the HIL layer 23 to the bar 61. The material 65 is, for example, the same material as that used for the HIL layer 23.

[0103] The following steps illustrated by figures 5F and 5G consist of etching the stack to form the areas 55.

[0104] We begin ([Fig.5F]) by depositing a layer of resin 67 which we open (opening 69) by photolithography according to the desired pattern for areas 55. The resin is for example deposited on the turntable.

[0105] Then ([Fig. 5G]), layers 23, 21, 25, and layer 45 are etched, that is, down to the transparent substrate 41 through the resin mask 69, and this resin mask is then removed. The etching is, for example, a reactive ion etching.

[0106] We then obtain a structure of photodetectors 2 according to the desired pattern depending on the desired surface filling factor.

[0107] The resulting assembly is then encapsulated ([Fig. 5H]). In one example, a full-plate buffer layer 71 is deposited and then covered with an atomic layer 73 (ALD, from "Atomic Layer Deposition"). In another example, layer 71 is an adhesive layer and layer 73 is an encapsulating film. Layer 71 fills the openings 55 and flattens the surface.

[0108] According to one embodiment, the image acquisition device is then completed.

[0109] By way of example, layer 73 is substantially impermeable to water and atmospheric oxygen in order to protect the underlying organic layers. Layer 27 can be made of an inorganic material, for example aluminum oxide (Al₂O₃), silicon dioxide (SiO₂), or silicon nitride (Si₃N₄). Layer 73 can have a thickness between 2 and 200 nm. Layer 73 is formed, for example, by the deposition of successive atomic layers (ALD, from "Atomic Layer Deposition"), by physical vapor deposition (PVD, from "Physical Vapor Deposition"), or by chemical vapor deposition (CVD, from "Chemical Vapor Deposition"), for example, by plasma-enhanced chemical vapor deposition (PECVD, from "Plasma-Enhanced Chemical Vapor Deposition").

[0110] According to another embodiment ([Fig. 51]), the device is associated with an optical filter 8. This filter is, for example, made separately from a glass plate or substrate 81 onto which a black resin 83 is deposited by lamination or selective deposition according to the chosen pattern. For example, the black resin areas are located to be directly above the opaque areas of the acquisition device. The filter 8, made separately, is then attached to the structure resulting from [Fig. 5G], with an interposed layer of adhesive 85 to obtain the device illustrated in [Fig. 51].

[0111] This embodiment is particularly suitable for cases where the optical filter is manufactured separately. In particular, it allows for the standardization of the manufacture of the same image acquisition device (Figures 5A to 5H) for applications with filters of different types or with and without a filter.

[0112] Figures 6A and 6B are partial, schematic cross-sectional views illustrating steps of another method of implementing a manufacturing process for an image acquisition device.

[0113] This method of implementation incorporates the steps described previously in relation to figures 5A to 5E, which will not be described again.

[0114] From the structure resulting from [Fig.5E], the optical filter is produced here directly in the form of the etching mask of layers 23, 21 and 25.

[0115] We begin ([Fig. 6A]) by depositing a layer of black resin 67, which is opened (opening 89) by photolithography according to the desired pattern for the areas 55. The resin is deposited, for example, using a spin-plate. The resin 87 is chosen to be transparent to infrared radiation and opaque in the visible spectrum. The filter 8 is then used as an etching mask up to the transparent substrate 4L

[0116] The resulting assembly is then, for example, encapsulated in the manner described in relation to [Fig.5H] (layers 71 and 73.

[0117] According to another example, once the buffer layer 71 or glue has been deposited to fill the openings 55 and flatten the surface, a glass plate 81 is brought in.

[0118] The embodiment shown in Figures 6A and 6B is particularly suited to applications with a filter and allows the entire device to be manufactured in a single process. One advantage is that it avoids any misalignment issues that may arise when the filter 8 of the embodiment in [Fig. 51] is attached to the structure of [Fig. 5H].

[0119] Figures 7A, 7B and 7C are partial, schematic cross-sectional views illustrating steps of another method of implementing a manufacturing process for an image acquisition device.

[0120] This method of implementation incorporates the steps described previously in relation to figures 5A to 5G, which will not be described again.

[0121] Starting from the structure obtained in [Fig. 5G], a full-plate buffer layer 71 is deposited ([Fig. 7A]) which fills the openings 55 and flattens the surface. The layer 71 is optionally covered with an atomic layer 73 (ALD, from the English "Atomic Layer Deposition").

[0122] Then ([Fig.7B]), an optical filter is produced by developing a layer of black resin 87.

[0123] The resulting assembly is then encapsulated ([Fig. 7C]). In one example, a second buffer layer 71' is deposited across the entire plate and then covered with an atomic layer 73' (ALD, for Atomic Layer Deposition). In another example, layer 71' is an adhesive layer and layer 73' is an encapsulating film. The material of layer 71 fills the spaces between the black resin blocks and flattens the surface. [Fig. 7C] also illustrates the variant without layer 73 under layer 87.

[0124] Fig. 8 is a partial, schematic cross-sectional view illustrating a variant embodiment of an image acquisition device.

[0125] This method of implementation incorporates the steps described previously in relation to figures 5A to 5G, which will not be described again.

[0126] Starting with the structure shown in [Fig. 5G], a transparent conductive or semiconductive layer 91 is deposited across the entire plate and etched according to the grid pattern of the HIL layer 23, joining the layer 65. This improves the conductivity of the upper electrode 23 of the photodetectors. The layer 91 can fill the openings 55. Insulation between the crosses 57 is provided by the OSC layer, which is then etched with a pattern larger than that of the layer 27, or by coating the sides of the crosses with a separate insulating layer. This layer, which vertically insulates the sides of the crosses, may be present in other embodiments.

[0127] The material of layer 91 is, for example, in the same material as layer HIL 23.

[0128] The following steps may take any of the implementation methods described previously (layers 71 and / or 73, [Fig.5H], black resin layer 87 ( [Fig.6A]), layer 71 and / or 73, [Fig.7A]).

[0129] Fig. 9 is a partial, schematic top view illustrating another embodiment of an image acquisition device.

[0130] This variant consists, in relation to the embodiment illustrated in relation to [Fig.4B], of a different pattern for the ITO layer 27' of the lower electrode 27, intercalated between the metallic layer 27" of this lower electrode 27 and the active layer 21 (more precisely between the layer 27" and the EIL layer 25).

[0131] According to this variant, a cross pattern 57 is retained, and preferably the zones 53, for the electrode metal layer 27", but the patterns formed in the ITO layer 27' and the active layer 21 (as well as the EIL layer 25 which is etched at the same time) are enlarged so that the active layer 21 and the ITO layer 27" occupy a larger surface area. This amounts to giving the active layer 21, the EIL layer and the ITO layer 27' a cross pattern 57 associated with a rectangle 93 which extends to reduce the surface area of ​​the transparent zones 55.

[0132] However, the realization of the variant of [Fig.9] requires etching the layers of the constituent stack of the photodetectors separately from each other, at least in three steps (layers 27", layers 27', 25 and 21, layer 23).

[0133] This variant allows the transparency of the device to be adjusted by playing only on the surfaces occupied by the layers of ITO 27" and active 21 (OSC).

[0134] This variant is compatible with an embodiment in which the electrode 27 is exclusively composed of ITO.

[0135] Fig. 9 also illustrates an example of dimensions with a step of 40 sq m. The slats of the crosses 57 have, according to this example, a width of 10 sq m and the zones 53 have dimensions of 10 sq m by 10 sq m.

[0136] It should be noted that the variant of [Fig.9] is not compatible with that of [Fig.8].

[0137] One advantage of the embodiments and implementations described is that they allow for improved transparency of image acquisition devices.

[0138] Another advantage of the described embodiments and implementations is that they are compatible with the usual manufacturing techniques for reading circuits and organic photodetectors.

[0139] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0140] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Image acquisition device (1), in which photodetectors (2) have a pattern following lines (14, 16) of interconnection of reading circuits (3) and the first electrodes (27) of the photodetectors (2) have a cross pattern (57) two branches of which are respectively in line with the lines (14, 16) interconnecting the reading circuits (3).

2. Device according to claim 1, wherein a hole injection layer (23) common to the photodetectors (2) has a grid pattern aplomb to the lines (14, 16) interconnecting the reading circuits (3).

3. Device according to claim 2, wherein an active layer (21) of each photodetector has the grid pattern of the hole injection layer (23).

4. Device according to any one of claims 1 to 3, wherein an active layer (21) of each photodetector has the cross pattern (57) of its first electrode (27).

5. Device according to claim 3 or 4, wherein the active layer (21) and the first electrode of each photodetector extend (93) beyond said pattern.

6. Device according to any one of claims 1 to 5, wherein each readout circuit (3) comprises a transistor, the interconnecting lines corresponding to lines (14, 16) interconnecting respectively the sources (35) of the transistors in a first direction and the gates (37) of the transistors in a second direction.

7. Device according to claim 5, wherein the pattern in which the photodetectors (2) are made is also in line with drain contacts (33) of the transistors of the reading circuits (3).

8. Device according to any one of claims 1 to 6, wherein the area masked by the active layer (21) of the photodetectors (2) represents, for each pixel, less than 50%, preferably less than 30% of the pixel area.

9. A method for manufacturing an image acquisition device (1) comprising the following steps: forming a readout circuit matrix (3) in which transistors are interconnected in source lines (14) in a first direction and in gate lines (16) in a second direction; depositing, from the readout circuit matrix, a stack comprising at least: a first electrode layer (27); an active layer (21); and a hole injector layer (23) etching the stack layers separately or simultaneously according to a pattern following at least lines (14, 16) of interconnection of read circuits (3), the first electrodes (27) having a cross pattern (57) of which two branches are respectively in line with the lines (14, 16) interconnecting the read circuits (3).

10. A method according to claim 9, wherein the etching of the stack layers is such that the area cumulatively masked by the electrode layer (27) and the active layer (21) represents, for each pixel, less than 50%, preferably less than 30% of the pixel area.

11. Method according to claim 9 or 10, wherein the active layer (21) is etched at the same time as the hole injector layer (23).

12. A method according to any one of claims 9 to 11, wherein an optical filter (8) is attached to the stack.

13. A method according to any one of claims 9 to 12, wherein the stacking layers further cover drain contacts (33) of the transistors of the readout circuits (3).

14. A method according to any one of claims 9 to 13, wherein the steps are adapted for manufacturing a device according to any one of claims 1 to 8.

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