ASYNCHRONOUS LASER PULSE DETECTION AND PASSIVE IMAGING
The imaging device with a current mirror configuration addresses the inefficiencies of existing sensors by separating integration and pulse detection stages, achieving efficient and compact image capture and laser pulse detection.
Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Filing Date
- 2022-12-20
- Publication Date
- 2026-04-24
AI Technical Summary
Existing image sensors face challenges in simultaneously capturing images and detecting laser pulses efficiently, often leading to increased power consumption, reduced pulse sensitivity, and larger size due to complex biasing structures and amplifier configurations.
An imaging device with a current mirror configuration that separates integration and pulse detection stages, using a photodetector, biasing stage, and a current mirror to minimize components and consumption while maintaining high bandwidth.
The solution enables compact, energy-efficient simultaneous image capture and laser pulse detection with improved sensitivity and reduced parasitic capacitances, suitable for detecting low-amplitude pulses.
Smart Images
Figure 00000013_0000 
Figure 00000013_0001 
Figure 00000014_0000
Abstract
Description
Title of the invention: LASER PULSE DETECTION ASYNCHRONOUS AND PASSIVE IMAGING technical field
[0001] The present application relates to the field of image sensors which, in addition to capturing an image of a scene, implement simultaneous detection of light pulses. PREVIOUS STATE OF THE ART
[0002] Patent document US9215386B2 describes a multi-function detector that integrates several different operating modes and, in particular, includes a function for detecting the arrival of light pulses from a laser beam while simultaneously performing conventional image acquisition of a scene. The pulse detection function is provided by a pulse detection stage connected to the source of a photodiode biasing transistor, commonly referred to as a "direct injection" transistor. As shown in Figure 4 of this patent document, during pulse detection concurrent with conventional image acquisition, the biasing is performed by a BDI ("Buffered Direct Injection" direct injection transistor) type biasing structure with an amplifier coupled to the direct injection transistor.
[0003] Another stage, dedicated to passive image acquisition, is equipped with current integrating means in the form of an amplifier and an integration capacitor which recovers the current to be integrated at the level of the drain of the direct injection transistor.
[0004] Such a device requires precise adjustment of the amplifier of the passive imaging stage and may tend to attenuate the pulse detection signal.
[0005] The BDI biasing structure is chosen to provide more stable biasing of the photodiode despite variations in flux and therefore current flowing through the direct injection transistor. This improved stabilization enhances performance, particularly linearity. This improved stabilization is achieved through the amplifier in the biasing structure, which reduces the input impedance of the structure. However, a reduction in input impedance also leads to a reduction in pulse sensitivity.
[0006] Document US9871066B2 proposes an imaging device with two distinct channels, an HF channel (“High Frequency”) and an LF channel (“Low Frequency”), respectively for the realization of asynchronous detection of laser light pulses and the simultaneous constitution of an image.
[0007] The signal from the "high frequency" channel is taken from the gate of the transistor called "Direct injection" of a photodiode biasing stage. A "low frequency" signal is taken from the drain of the same transistor.
[0008] With such a device, maintaining a large bandwidth can result in significant consumption.
[0009] For this device, BDI biasing is also implemented using negative feedback via an amplifier. The loop bandwidth is determined by the desired pulse detection bandwidth. This can lead to increased power consumption of the biasing circuit.
[0010] We seek to implement a new image sensor enabling simultaneous image capture and simultaneous detection of light pulses, and which is improved, in particular with regard to the disadvantages stated above.
[0011] We preferentially seek to implement a sensor that is less energy-intensive and as compact as possible. Description of the invention
[0012] An object of the invention is therefore the realization of an imaging device allowing passive image capture by integrating a current generated by a photodiode illuminated by a scene, while detecting the arrival of very short laser pulses compared to the frame time which generate at the output of the photodiode a peak or a very short duration current pulse, preferably by minimizing the number of components in order to be compatible with integration in a small pixel and limiting consumption.
[0013] According to one embodiment, the present invention relates to an imaging device comprising at least one detection element formed by a photodetector associated with and connected to a signal reading circuit for signals generated by the photodetector, the reading circuit being equipped with:
[0014] - of an integration stage equipped with an integration capacity for the integration of charges originating from the photodetector,
[0015] - of a pulse detection stage, for detecting current pulses produced by the photodetector following the reception of light pulses,
[0016] - of a photodetector biasing stage and equipped with an injection transistor direct coupled to the photodetector,
[0017] the reading circuit further being provided with an "intermediate" stage arranged on the one hand between the biasing stage and on the other hand respectively between the integration stage and the pulse detection stage, the intermediate stage being provided with transistors forming a current mirror having one branch coupled to a drain of the direct injection transistor and producing on an input branch of the integration stage a current IB image of a given current Io delivered by the direct injection transistor, the intermediate stage being configured to convert said given current Io into a potential VA on an input node of said pulse detection stage, said input node being arranged on a gate electrode or at a source electrode of a transistor of said intermediate stage.
[0018] Typically, the input node is connected to a drain electrode of the direct injection transistor and to the gate of a transistor of said "intermediate" stage.
[0019] The current mirror promotes a dissociation between the integration stage and the pulse detection stage, while limiting consumption and size and maintaining a high bandwidth.
[0020] Advantageously, the photodetector is a photodiode, in particular a photodiode which operates in the infrared range and transforms infrared radiation into an electric current.
[0021] According to one possible implementation, the input node is connected to an electrode, in particular a drain electrode of the direct injection transistor (142) and to the gate of a transistor of said "intermediate" stage.
[0022] According to one possible embodiment, the current mirror can be formed:
[0023] - of a first transistor coupled or connected to said electrode of the transistor direct injection, in particular to the drain electrode of said direct injection transistor, and,
[0024] - of a second transistor having a gate connected to the gate of the first transistor, the second transistor being coupled or connected to the input branch of the integration stage.
[0025] According to a particular embodiment, the input node of the pulse detection stage is connected to the gate of a third transistor configured in cascode with said second transistor, the third transistor being directly connected to said input branch of the integration stage. Such a transistor amplifies the detected signals. The circuit is thus particularly well-suited to the detection of low-amplitude pulses.
[0026] Alternatively, the input node of the pulse detection stage is connected to the gate of the second transistor and the first transistor, the first transistor having its gate and drain connected together, the second transistor being coupled or connected directly to the input branch of the integration stage.
[0027] The implementation of a simple current mirror with two transistors or with two transistors and one transistor in cascode makes it possible to limit parasitic capacitances.
[0028] Advantageously, the pulse detection stage can be equipped with:
[0029] - of a voltage pulse detection block, configured to detect a threshold of voltage and emit a signal indicating that this threshold is exceeded when the voltage threshold is exceeded;
[0030] - of a filtering block upstream of the pulse detection block tension.
[0031] According to one possible implementation, the biasing stage may be a negative feedback direct injection biasing stage and includes an amplifier whose output is connected to the gate of the direct injection transistor.
[0032] Such a polarization mode is particularly suitable for the detection of low intensity light pulses. Brief description of the drawings
[0033] The present invention will be better understood on the basis of the following description and the accompanying drawings in which:
[0034] [Fig. 1] serves to illustrate, in an infrared imager, an example of a readout pixel with a current integration stage and a pulse detection stage separated and coupled to a current mirror;
[0035] [Fig.2] is used to illustrate functional blocks of a pulse detection stage;
[0036] [Fig.3] serves to illustrate an example of an embodiment in which the integration stage is directly coupled to a current mirror with a reduced number of transistors;
[0037] [Fig.4] serves to illustrate another example of an embodiment in which the polarization stage Direct injection type feedback (BDI) biasing is replaced by a direct injection type biasing stage;
[0038] [Fig.5] serves to illustrate a variant embodiment of the device of [Fig.3] for in which the polarization stage is of the direct injection (DI) type,
[0039] [Fig.6] serves to illustrate a variant embodiment of the device of [Fig.1] for in which the photodiode is of type N on P;
[0040] [Fig.7] serves to illustrate a variant embodiment of the device of [Fig.3] for in which the photodiode is of type N on P;
[0041] [Fig.8] serves to illustrate an alternative embodiment in which the entrance to the upper floor of pulse detection is this time connected to the source of a current mirror transistor;
[0042] Identical, similar or equivalent parts of the different figures bear the same numerical references so as to facilitate the transition from one figure to another.
[0043] The different parts represented in the figures are not necessarily shown on a uniform scale, in order to make the figures more legible.
[0044] DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
[0045] Reference is now made to [Fig. 1] giving a particular example of an embodiment of a reading circuit 130 of an image sensor or imager as implemented according to an embodiment of the present invention.
[0046] The imager is, in this example, an infrared imager.
[0047] The readout circuit 130, also called the "readout pixel" or "pixel," is connected to a photodetector such as a photodiode 120. The photodiode 120 delivers to the readout circuit a current representative of an observed scene and transforms light radiation, in this example IR radiation, into an electric current. The readout circuit 130 together with the photodiode 120 form a detection element. The imager generally has a plurality of detection elements typically arranged in a matrix of one or more rows (also called horizontal row(s)) and one or more columns (also called vertical row(s)).
[0048] To bias the photodiode 120, a bias potential Vpol is applied here to one of its terminals, while the other terminal is coupled to the reading circuit 130.
[0049] The reading circuit 130 in the form of a transistor circuit is provided with a biasing stage 140 for the photodiode 120. This biasing stage 140 includes a biasing transistor 142, also called a "direct injection" transistor, connected to the photodiode 120.
[0050] In the particular embodiment illustrated in [Fig. 1], the biasing stage 140 is a direct injection biasing stage with negative feedback, also called BDI (for "Buffer Direct Injection"), for the photodiode 120 and is thus further equipped with a gain amplifier 144. An input of the amplifier 144 is connected to an electrode of the direct injection transistor 142, specifically to its source. This input is also connected to the photodiode 120, while the output of this amplifier 144 controls the gate voltage of the direct injection transistor 142. Negative feedback is thus established on a signal used to bias the photodiode 120. The direct injection transistor 142, here configured as a cascode, maintains a fixed bias on the photodiode 120 during an integration phase of the photodiode 120 current.
[0051] Biasing the photodiode 120 via a BDI circuit reduces the input impedance seen by the photodiode 120 and thus increases the bandwidth. Such a circuit is suitable for detecting current peaks resulting from light pulses with steep edges and short peak durations.
[0052] The photodiode 120 receives a constant luminous flux from the observed scene and consequently generates a constant current which, when integrated over a certain integration time, provides relative information on the average illumination received by the pixel. For example, for photodiode 120 currents on the order of ten picoamperes, the integration time can be on the order of ten milliseconds.
[0053] To perform passive image acquisition of a scene, the readout circuit 130 is thus equipped with a first readout stage 150, also called the "integration" stage 150, and typically equipped with at least one integration capacitor (not shown in this figure). The integration capacitor may, for example, be designed to store on the order of one or several hundred thousand electrons.
[0054] The integration stage 150 is configured to integrate over the integration capacitor (not shown) the charges delivered by the photodiode 120 in order to obtain at the end of the frame a voltage information reflecting the total luminous flux received by the photodiode 120 during an integration time.
[0055] The integration stage 150 is advantageously equipped with a means for resetting the integration capacitor, for example in the form of a reset transistor whose gate is controlled by a reset signal and which can discharge charges stored by the integration capacitor. In addition to the integration capacitor, the integration stage 150 may, in certain embodiments, also be provided with a follower transistor and a line-selector transistor. According to an optional implementation, the integration stage 150 may also be provided with a storage block downstream of the integration capacitor, which serves to duplicate a voltage value across the integration capacitor once the integration period has elapsed.The integration stage 150 can then be equipped with a memory capacity and advantageously with a reset element to allow the charges stored by the memory capacity to be discharged and the voltage value stored across this capacity to be reset to zero.
[0056] The integration stage 150 thus receives a current IB on an input branch B. This current IB depends on a current from the photodiode 120. The device is unique in that its integration stage 150 is not directly connected to the biasing stage 140 and in particular to the direct injection transistor 142. Thus, the input current IB of the integration stage 150 is taken from a circuit branch B that is not directly connected to one of the electrodes or terminals of the direct injection transistor 142.
[0057] In addition to passive image capture, the imager is configured here to detect, on at least one or more pixels, the arrival of light pulses.
[0058] Thus, a light source (not shown), in particular a laser source associated with the image sensor, can be used to generate a directional light beam that illuminates a precise area of a scene observed by the sensor. The laser source may be integrated into the imager or it may be separate and independent of the imager. For example, the photodetector used may be a SWIR (Short Wave Infrared) photodiode for detecting laser pulses at wavelengths, for example, on the order of 1.5 pm.
[0059] The emitted light beam is typically pulsed so that the imager detects light pulses emitted at a frequency that can be constant, fixed, or variable according to a given sequence, thus creating a code. Typically, the duration of the light pulses is very short, for example, on the order of several tens of nanoseconds, and these pulses are converted at the output of photodiode 120 into current pulses on the order of several tens of nanoamperes. The shape and duration of these current pulses can vary significantly depending, in particular, on the media through which the laser radiation passes. Typically, this results in several hundred or thousands of electrons being collected at photodiode 120.
[0060] Since the amount of charge produced by the photodiode 120 following the arrival of a laser pulse is generally very small compared to the amount of charge obtained during passive image acquisition of a scene, the detection of the arrival of the pulses is not performed directly on the integration capacitance of the integration stage 150. A specific detection stage is provided here to detect the arrival of laser pulses and is therefore distinct from the integration stage 150. The integration stage 150 takes a signal from its input branch B, while the detection stage 160 takes a signal from the input node A, which is not located on branch B and is not directly connected to this branch B. This signal can be processed independently in order to obtain two simultaneous pieces of information: passive imaging and, on the other hand, an indication of the arrival or not of a laser pulse.
[0061] The reading circuit 130 is thus also equipped with a second reading stage, also called the pulse detection stage 160, dedicated to the detection of light pulses. The pulse detection stage 160 is directly connected to the biasing stage 140 and to an electrode of the direct injection transistor 142, in this example to its drain.
[0062] Due to the significant differences in intensity and duration of variations between an asynchronous signal from the laser source and a quasi-constant signal from the scene, rather than using the integrating capacitor for pulse detection, a resistive impedance is used here to perform current-to-voltage conversion at the input of the pulse detection stage 160. Since the maximum current delivered by the photodiode 120 is low, this resistive impedance is preferably designed with a very high resistance value, typically at least several hundred kOhms.
[0063] The input signal of the pulse detection stage 160 varies here according to a potential VA taken at a node A directly connected to the direct injection transistor 142 and which is here the image of the drain current of this transistor 142.
[0064] The pulse detection stage 160 typically includes a detection block 166 pulses, in particular voltage pulses. This pulse detection block 166 can be configured to detect whether a voltage exceeds a given threshold and to generate an overshoot indicator signal as a consequence of this overshoot. The pulse detection block 166 can be equipped, for example, with a comparator and configured to produce a binary indicator signal, depending on its high or low state, indicating whether or not a threshold overshoot has been detected.
[0065] The pulse detection stage 160 is typically equipped upstream of the pulse detection block 166 with a filtering block 162, typically a high-pass filtering block or a band-pass filtering block.
[0066] The photodiode current generated by observing a scene varies little over the entire duration of a frame but can vary significantly from one frame to another, consequently causing the VA potential at node A, the input to the pulse detection stage 160, to vary. These variations in the VA potential at node A, which are not due to the arrival of a current pulse following the detection of a laser pulse, are therefore filtered by the filtering block 162.
[0067] A particular embodiment illustrated in [Fig.2] provides for the introduction of an amplifier 164 between a filtering block 162, high pass or band pass, and a pulse detection block 166.
[0068] To enable dissociation between the integration stage 150 and the pulse detection stage 160, while limiting consumption and size and maintaining a high bandwidth, the reading circuit 130 has the particularity of being provided with a stage 170 forming a current mirror.
[0069] The current mirror here has a branch connected to the direct injection transistor 142 to take (or transmit) a given current Io from (or to) this direct injection transistor 142 and image of the current of the photodiode 120. The current mirror 170 has a second branch producing an output current IB copy, or image, up to a multiplier factor K (with K which may possibly be different from 1), of the current Io.
[0070] Depending on the ratio of the respective sizes of the transistors 171, 172 of the current mirror, the output current IB can be identical to the current Io and that in the photodiode 120, or it can be greater than the current of photodiode 120 in the current mirror. In the latter case, where the size ratio of the transistors 171, 172 is designed to achieve a current gain, the device is particularly suitable for observing scenes generating low light flux.
[0071] The pulse detection stage 160 is connected to the first branch of the current mirror and here directly to the direct injection transistor 142. The integrator stage 150 is connected to the second branch of the current mirror.
[0072] The current mirror is here formed from a first transistor 171, in particular a NMOS, whose source is connected here to the drain of the direct injection transistor 142 as well as to the input of the pulse detection stage 160. The current mirror includes a second transistor 172, specifically of the NMOS type, whose gate and source are connected to each other and to the gate of the first transistor 171.
[0073] In the particular embodiment shown in [Fig. 1], the second arm 172 of the mirror 170 includes, or is associated with, a cascode-configured transistor 173 to which the integration stage 150 is directly connected. The pulse detection stage 160 is connected to the gate of this transistor 173, resulting in a high resistive impedance at the input of the pulse detection stage 160, and thus greater voltage variations upon the arrival of laser pulses.
[0074] A more compact embodiment variant is given in [Fig.3] and this time provides for replacing the stage 170 with a simple current mirror 170' whose first transistor 176 directly connected to the direct injection transistor 142, for example NMOS, has its gate and its source which are connected to each other and to the input node A of the pulse detector stage 160.
[0075] The second branch of the mirror here consists of only a single transistor 177, for example NMOS, whose gate is connected to node A and whose source is directly connected to the input branch B of the integration stage 150. This integration stage 150 thus draws a current IB from the source of the transistor 177 which is the image, up to a non-zero coefficient possibly equal to 1, of the drain current 10 of the direct injection transistor 142, itself the image or equal to the photodiode current 120.
[0076] The gain obtained for the current / voltage conversion is lower here than in the embodiment described previously. The configuration described previously in connection with [Fig. 3] is therefore better for detecting lower intensity laser pulses, for example when the laser pulse source is distant or when the medium traversed by the laser is more attenuating.
[0077] Another variant of the embodiment illustrated in [Fig.4] provides for replacing the BDI type biasing stage with a 240 stage formed here solely of a direct injection transistor 242 whose arrangement differs from that described previously by that of its gate set at a biasing potential Vpol2.
[0078] Such an amplifier-free variant reduces power consumption and the area occupied in the pixel, but proves less efficient for detecting very short-duration laser pulses.
[0079] Such a polarization mode is also suitable, as illustrated in [Fig.5], for a mirror structure as described above and formed solely of two transistors 176, 177.
[0080] In the illustrated embodiments, the photodiode 120 is typically of the type P on N and reverse biased. In this case, a PMOS type direct injection transistor 142 is typically used.
[0081] A device such as described above also adapts to a 120' N-type photodiode on P.
[0082] The photodiode 120', here has its cathode terminal at a bias potential which can be a low bias potential, for example to ground GND while its anode terminal is connected to the readout circuit.
[0083] Thus, in the embodiment illustrated in [Fig.6], the biasing stage 140' is equipped with a direct injection transistor 142' of the PMOS type.
[0084] Similarly, the transistors 171', 172' forming the current mirror and the transistor 173' mounted in cascode are this time of the PMOS type.
[0085] The embodiment illustrated in [Fig.7] is a variant of the device in [Fig.3], with transistors 176', 177' forming the PMOS type current mirror and the NMOS type direct injection transistor 142'.
[0086] The use of the N-type photodiode 120' on P is also suitable for DI-type biasing as previously described in connection with Figures 4 and 5, this time with PMOS-type current mirror transistors and NMOS-type direct injection transistors.
[0087] In either of the examples described above, the input node A of the pulse detection stage 160 is arranged on a gate electrode of a transistor in stage 170.
[0088] Thus, the input impedance for the pulse detection stage 160 depends on the ratio 1 / gm, where gm is the transconductance of a transistor 173, 177, typically in low inversion mode. Since this ratio is typically high, a significant gain is obtained for the current-to-voltage conversion.
[0089] In an alternative embodiment illustrated in [Fig. 8], transistors 176, 177 form a current mirror, and the input point A of the pulse detection stage 160 is taken from the source of a cascode-configured transistor 179, the drain of which is connected to the input of the integration stage 150. This alternative is preferably adapted to current mirror transistors 176, 177 of identical size and thus also allows for a significant gain in 1 / gm.
Claims
Demands
1. An imaging device comprising at least one detection element formed by a photodetector (120, 120') associated with and connected to a readout circuit (130) for signals generated by the photodetector (120, 120'), the readout circuit (130) being provided with: - an integration stage (150) having an integration capacitor for integrating charges from the photodetector (120, 120'), - a pulse detection stage (160) for detecting current pulses produced by the photodetector (120, 120') following the reception of light pulses, - a biasing stage (140, 140', 240) for the photodetector (120, 120') and having a transistor (142, 242, 142') direct injection coupled to the photo-detector, the reading circuit (130) being further equipped with a stage (170, 270, 170',270') referred to as the "intermediate" stage, arranged on one side between the biasing stage (140) and on the other side respectively between the integration stage (150) and the pulse detection stage (160), the intermediate stage being equipped with transistors (171, 172; 176, 177; 171', 172'; 176', 177') forming a current mirror having a branch coupled to a drain of the direct injection transistor and producing on an input branch (B) of the integration stage (150) a current (IB) mirroring a given current delivered by the direct injection transistor (142), the intermediate stage being configured to convert said given current into a potential (VA) on an input node (A) of said pulse detection stage (160), said input node (A) being arranged on a gate electrode or at a source electrode of a transistor (171, 177, 179) of said intermediate stage.
2. Device according to claim 1, wherein said input node (A) is connected to a drain electrode of the direct injection transistor (142) and to the gate of a transistor (171, 177) of said “intermediate” stage (170, 170').
3. A device according to any one of claims 1 or 2, wherein the current mirror is formed: - of a first transistor (171, 176, 171', 176') coupled or connected to the drain electrode of said direct-injection transistor (142), and, of a second transistor (172, 177, 172', 177'), said second transistor having a gate connected to the gate of the first transistor, said second transistor being coupled or connected to said input branch (B) of the integration stage (150).
4. Device according to claim 3 when related to claim 2, wherein said input node (A) of the pulse detection stage (160) is connected to the gate of a third transistor (173, 173') mounted in cascode with said second transistor (172, 172'), said third transistor (173, 173') being directly connected to said input branch (B) of the integration stage (150).
5. Device according to claim 3 when related to claim 2, wherein said input node (A) is connected to the gate of the second transistor (177, 177') and the first transistor (176, 176'), the first transistor (176, 176') having its gate and drain connected together, said second transistor (177, 177') being coupled or connected directly to said input branch (B) of the integration stage (150).
6. Device according to any one of claims 1 to 5, wherein the pulse detection stage (160) is provided with: - a voltage pulse detection block (166), configured to detect a voltage threshold and emit an overshoot signal when the voltage threshold is exceeded; - a filtering block (162) upstream of the voltage pulse detection block (166).
7. Device according to any one of claims 1 to 6, wherein the biasing stage is a negative feedback direct injection biasing stage and includes an amplifier (144) whose output is connected to the gate of the direct injection transistor (142).
8. Imaging device according to any one of claims 1 to 7, wherein the photodetector operates in the infrared range and wherein said light pulses are from a laser source integrated into the imaging device.