SUPPORT COMPRISING AN ELECTRIC CHARGE TRAPPING LAYER FOR A COMPOSITE SUBSTRATE AND METHOD FOR SELECTING SUCH A SUPPORT.

Abstract

The invention relates to a support (1) for a composite substrate (S). The support comprises a base substrate and a trapping layer (3a) made of polycrystalline silicon arranged on the base substrate (2). The trapping layer has electrical traps of a first type having an activation energy of 0.383 eV to within 0.008 eV and a capture cross section for holes and for electrons of less than 10^-16 cm^2. The trapping layer has electrical traps of a second type having an activation energy of 0.428 eV to within 0.016 eV and a capture cross section for holes and for electrons of less than 10^-16 cm^2. Figure to be published with the abstract: Fig 1

Description

Title of the invention: SUPPORT COMPRISING AN ELECTRICAL CHARGE TRAPPING LAYER FOR A COMPOSITE SUBSTRATE AND METHOD FOR SELECTING SUCH A SUPPORT. FIELD OF THE INVENTION

[0001] The invention relates to a support having an electric charge trapping layer, the support being intended to receive a thin crystalline layer by a layer transfer technique. A composite substrate formed from such a support finds its application in the field of integrated electronic components, in particular radiofrequency (RF) components processing signals whose frequency may typically be between 20 kHz and 300 GHz, or more. In addition to the support as such, the invention also relates to a method for selecting a support substrate. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] For reasons of simplicity of implementation, the electric charge trapping layer (more concisely referred to as “trapping layer” in the remainder of this description) is generally formed by depositing a layer of polycrystalline silicon on a base substrate, as is illustrated in particular by documents US7585748 and US9293473.

[0003] The silicon grain boundaries constituting the polycrystalline layer constitute traps for electrical charges likely to circulate. These traps can be formed by incomplete or dangling chemical bonds at these boundaries. This prevents electrical conduction in the trapping layer, which consequently has a high resistivity, typically greater than 1000 Ohms.cm.

[0004] Generally speaking, the state of the art reveals the need to have an electrical charge trapping layer which has a high resistivity and which is temperature stable. This temperature stability is an important characteristic, because the manufacture of a composite substrate involves heat treatments typically raising the temperature of the support to more than 1000°C, which tends to cause the desired characteristics to be lost by recrystallization of the trapping layer and disappearance of the structural defects in this layer.

[0005] In order to preserve the polycrystalline quality of the trapping layer during the heat treatments that the support may undergo, it is advantageous to provide an amorphous layer, made of silicon dioxide for example, on the base substrate before the deposition of the trapping layer as proposed by documents US8765571 and US9129800. However, the presence of this amorphous layer is not always sufficient. to prevent the recrystallization of a trapping layer and / or the disappearance of its structural defects.

[0006] The applicant has observed that the good temperature resistance of a trapping layer is closely linked to the formation parameters of this layer. However, it is not possible to date to correlate the formation parameters of this layer (or the measurable characteristics of this layer) with this temperature resistance property. The only possible evaluation is made by a posteriori characterization of the radiofrequency (RF) performance of the composite substrate in which it is integrated, after the trapping layer has undergone the heat treatments for manufacturing this substrate. SUBJECT OF THE INVENTION

[0007] One aim of the invention is to address, at least in part, this problem. More specifically, one aim of the invention is to be able to determine in advance, simply, whether a trapping layer of a support is capable of receiving the heat treatments of a method for manufacturing a composite substrate without excessively recrystallizing, and therefore preserving its trapping qualities in the composite substrate. One aim of the invention is therefore to determine characteristics of a trapping layer that is temperature stable. Another aim of the invention is to exploit these characteristics to select a support provided with a trapping layer with a view to forming a composite substrate. BRIEF DESCRIPTION OF THE INVENTION

[0008] In order to achieve this aim, the subject of the invention provides a support for a composite substrate, the support comprising a base substrate and a polycrystalline silicon trapping layer disposed on the base substrate.

[0009] According to the invention, the trapping layer has electrical traps of a first type and a second type.

[0010] The electric traps of the first type have an activation energy of 0.383 eV to within 0.008 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2. The electric traps of the second type have an activation energy of 0.428 eV to within 0.016 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2.

[0011] According to other advantageous and non-limiting characteristics of the invention, taken alone or in any technically feasible combination: - the electric traps of the first type have an effective capture section for holes of 1.7 10A-17 to within 0.1 10A-17 and an effective capture section for electrons of 5.4 10A-17 to within 0.2A10A-17; - electric traps of the second type have an effective section of capture for electrons of 1.8 10A-17 to within 1.1A10A-17 and a capture cross-section for holes of 5.7 10A-17 to within 3.7 10A-18; - the trapping layer is devoid of electric traps of a third type, the electric traps of the third type having an activation energy of 0.485 eV to within 0.015 eV and a capture cross-section for holes and for electrons greater than 10A-16 cmA2; - electric traps of the third type have an effective capture section for electrons of 1.0 10A-15 to within 0.1 10A-15 and an effective capture section for holes of 3.3 10A-16 to within 0.2 10A-16; - the trapping layer further comprises electric traps of a fourth type and a fifth type, the electric traps of the fourth type having an activation energy of 0.392 eV to within 0.018 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the fifth type having an activation energy of 0.371 eV to within 0.025 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2; - electric traps of the fourth type have an effective capture section for electrons of 3.8 10A-17 to within 0.3 10A-17 and an effective capture section for holes of 1.2 10A-17 to within 0.1 10A-17; - the fifth type of electric traps have an effective capture section for electrons of 6.9 10A-17 to within 0.7 10A-17 and an effective capture section for holes of 2.2 10A-17 to within 0.2 10A-17; - the trapping layer is devoid of electric traps of a sixth type and a seventh type, the electric traps of the sixth type having an activation energy of 0.474 eV to within 0.032 eV and a capture cross section for holes greater than 10A-16 cmA2, the electric traps of the seventh type having an activation energy of 0.416 eV to within 0.017 eV and a capture cross section for holes greater than 10A-16 cmA2; - electric traps of the sixth type have an effective capture section for holes of 5.2 10A-16 to within 0.5 10A-16; - electric traps of the seventh type have an effective capture section for holes of 1.7 10A-16 to within 0.1 10A-16.

[0012] According to another aspect, the subject matter of the invention provides a method for selecting a support, the method comprising: - A step of providing the support comprising a base substrate and a polycrystalline silicon trapping layer arranged on the base substrate, the trapping layer comprising electrical traps; - A characterization step including the measurement of an activation energy and a hole and / or electron capture cross-section of the electrical traps of the trapping layer, the characterization step also comprising the identification of different types of electrical traps present in the trapping layer; - A selection step during which the support is selected if the trapping layer has electric traps of a first type and a second type, the electric traps of the first type having an activation energy of 0.383 eV to within 0.008 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the second type having an activation energy of 0.428 eV to within 0.0160 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2.

[0013] According to other advantageous and non-limiting characteristics of this aspect of the invention, taken alone or in any technically feasible combination: - during the selection step, the support is selected if the trapping layer is also devoid of electrical traps of a third type, the electrical traps of the third type having an activation energy of 0.485 eV to within 0.015 eV and an effective capture section for holes and for electrons greater than 10A-16 cmA2; - during the selection step, the support is selected if the trapping layer also comprises electric traps of a fourth type and a fifth type, the electric traps of the fourth type having an activation energy of 0.392 eV to within 0.018 eV and a capture cross-section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the fifth type having an activation energy of 0.371 eV to within 0.025 eV and a capture cross-section for holes and for electrons of less than 10A-16 cmA2; - during the selection step the support is selected if the trapping layer is also devoid of electric traps of a sixth type and a seventh type, the electric traps of the sixth type having an activation energy of 0.474 eV to within 0.032 eV and a capture cross section for holes greater than 10A-16 cmA2, the electric traps of the seventh type having an activation energy of 0.416 eV to within 0.017 eV and a capture cross section for holes greater than 10A-16 cmA2. BRIEF DESCRIPTION OF THE FIGURES

[0014] Other characteristics and advantages of the invention will emerge from the detailed description of the invention which follows with reference to the appended figures in which:

[0015] [Fig. 1] [Fig.2]

[0016] Figures 1 and 2 show seven types of electrical traps (T1 to T7) present in polycrystalline silicon trapping layers;

[0017] [Fig.3]

[0018] [Fig.3] represents a support in accordance with the invention;

[0019] [Fig.4]

[0020] [Fig.4] represents a composite substrate using a support according to the invention. DETAILED DESCRIPTION OF THE INVENTION

[0021] As an introduction, it is recalled that certain defects introduced into the crystal lattice of a semiconductor material can be electrically active and introduce energy levels into the forbidden band of this material. This is particularly the case for intrinsic defects of the crystal lattice: vacancies, self-interstitials, antisites, dislocations, interfaces, grain boundaries (for a polycrystalline material).

[0022] These energy levels are called electrical traps and the presence of these traps modifies the electrical properties of the semiconductor material by the capture of free electrons or holes and / or by the emission of trapped electrons or holes. Depending on the energy level of the traps, i.e. its position in the forbidden band, certain transition probabilities become dominant, which gives materials equipped with such traps particular characteristics.

[0023] If the energy level places it between the minimum energy of the conduction band and the middle of the band gap, then the trap will tend to act more like an electron trap. The probability of re-emission of an electron by the trap will depend on its activation energy, which is the energy required to overcome the potential barrier created by the trap. This energy is equal to the difference between the minimum energy of the conduction band and the energy level of the trap. Similarly, if the energy level places a trap between the maximum energy of the valence band and the middle of the band gap, then the trap will act as a hole trap. The activation energy allowing the re-emission of this hole corresponds to the difference between the energy level of the trap and the maximum energy of the valence band.

[0024] The activation energy of a trap therefore forms an important characteristic of this trap. In addition to this level, an electric trap can be characterized by its effective capture section (generally expressed in cmA2) of holes and / or electrons. From a physical point of view, this section represents the effective area around the trap that a carrier must cross to be able to be captured. The carriers move randomly in the crystal lattice of the material, and those that enter the effective area around the trap are close enough to be captured by the latter. The physical values The strictly admissible values ​​of a capture cross-section can vary between 10A—18 and 10A—14 cmA2.

[0025] Many methods exist to extract the characteristics of the electrical traps present in a material. The basic principle of these methods is often the same, regardless of the material to be analyzed, the test structure or the technique used. It consists of disturbing the electrical equilibrium of the material by injecting (or removing) carriers. This can be accomplished for example by abruptly changing the reverse voltage of a Schottky diode or by illuminating the material. The return to electrical equilibrium of the material is then observed for different temperatures and / or under optical excitation. The change in occupancy in the traps is analyzed by measuring the current or the capacitance (depending on the test structure used).

[0026] Photo-Induced Current Transient Spectroscopy is a well-known technique that is particularly effective when characterizing the electrical traps present in a polycrystalline silicon trapping layer placed on a base substrate. A detailed discussion of this technique can be found in the document “Deep level spectroscopy in high resistivity materials” (Appl. Phys. Lett. 32, 821 (1978); doi: 10.1063 / 1.89929) or in the document “Characterization and Role of Deep Traps on the Radio Frequency Performances of High Resistivity Substrates” J. Appl. Phys. 7 June 2021; 129 (21): 215701. https: / / doi.Org / 10.1063 / 5.0045306.

[0027] According to this technique, the injection of carriers is ensured by the illumination of the sample of material to be analyzed and the signatures of the traps (activation level and capture cross section) are extracted from a spectrum constructed from the measurement of the transient current coming from the thermally released carriers.

[0028] The inventors of the present application had the intuition that certain defects in the crystal lattice of a polycrystalline silicon trapping layer were more robust to temperature than others. In an attempt to discriminate among all possible defects those resistant to temperature and those which are not, they identified the types of traps present in a wide variety of polycrystalline silicon trapping layers, by measuring their electrical characteristics, then identified the types of traps associated with trapping layers robust to temperature (unlikely to recrystallize entirely) and those associated with trapping layers not very robust to temperature (and therefore likely to recrystallize entirely).

[0029] The applicant has in particular identified seven types of electric traps which we describe below. To obtain this classification, the applicant carried out a series of experiments leading to the creation of a plurality of supports by depositing polycrystalline silicon layers (i.e. the trapping layer) on base substrates, the layers being produced using distinct deposition techniques and parameters. The defects present in the trapping layer of each support were characterized using the photo-induced current transient thermal spectroscopy technique described above, to determine the activation energy and the electron and / or hole capture cross section, which made it possible to identify the different types of electrical traps. The supports were subjected to a heat treatment at 1100°C for two hours and the trapping layer was then observed to determine whether its polycrystalline nature had been preserved or not.

[0030] The types of traps are characterized by their activation energy and by their cross sections. In some cases, the characterization method does not allow to determine whether the traps of a given type are hole traps, electron traps or mixed traps. For these types of traps, two cross section characteristics have therefore been defined, one considering that it is a hole trap and the other that it is an electron trap. Type 1 traps

[0031] The electric traps of the first type which have proven to be robust to temperature have: - an activation energy of 0.383 eV to within 0.008 eV. - an electron capture cross-section of 5.4 10A-17 to within 0.2A10A-17. - an effective capture section for holes of 1.7 10A-17 to within 0.1 10A-17. Type 2 traps

[0032] The second type of electric traps which have proven to be robust to temperature have: - an activation energy of 0.428 eV to within 0.016 eV. - an electron capture cross-section of 1.8 10A-17 to within 1.1A10A-17. - an effective capture section for holes from 5.7 10A-17 to 3.7 10A-18. Type 3 traps

[0033] The third type of electrical traps are not found in the polycrystalline silicon trapping layers which have proven to be robust to temperature. These third type of traps have: - an activation energy of 0.485 eV to within 0.015 eV. - an electron capture cross-section of 1.0 10A-15 to within 0.1 10A-15. - an effective capture section for holes of 3.3 10A-16 to within 0.2 10A-16. Type 4 traps

[0034] The electric traps of the fourth type which have proven to be robust to temperature have: an activation energy of 0.392 eV to within 0.018 eV. an electron capture cross-section of 3.8 10A-17 to within 0.3 10A-17. - an effective capture section for holes of 1.2 10A-17 to within 0.1 10A-17. Type 5 traps

[0035] The fifth type of electric traps which have proven to be robust to temperature have: an activation energy of 0.371 eV to within 0.025 eV. an electron capture cross-section of 6.9 10A-17 to within 0.7 10A-17. - an effective capture section for holes of 2.2 10A-17 to within 0.2 10A-17. Type 6 traps

[0036] Electric traps of the sixth type are not found in polycrystalline silicon trapping layers which have proven to be robust to temperature. These traps of the sixth type have: an activation energy of 0.474 eV to within 0.032 eV. - an effective capture section for holes of 5.2 10A-16 to within 0.5 10A-16. Type 7 traps

[0037] Electric traps of the seventh type are not found in polycrystalline silicon trapping layers which have proven to be robust to temperature. These traps of the sixth type have: an activation energy of 0.416 eV to within 0.017 eV. an effective capture section for holes of 1.7 10A-16 to within 0.1 10A-16.

[0038] It is noted that in addition to the nature of the traps, it is of course important that the cumulative density of all the traps is sufficient for the trapping effect to be present. At least a surface density of 2.0 10Al 1 traps.cmA-2 is required, preferably more than 1.0 10A12 traps.cmA-2, or even more than 1.0 10A13 traps.cmA-2. For a layer of 1 pm thickness, this gives respectively 2.0 10A15, 2.0 10A16 16 and 2.0 10A17 traps.cmA-3.

[0039] [Fig.l] shows the seven types of traps T1 to T7 according to their activation energy level EA. It is noted that it is not possible to discriminate the types of traps which are present in the robust trapping layers from the traps present in the non-robust trapping layers from this activation energy level alone, and that the complete characterization (including the value of the section effective capture) is necessary for this. This is made apparent in [Fig.2] where we notice that the capture cross section for holes and for electrons is less than 10A-16 cmA2 for all types of traps found in a robust trapping layer, and greater than this limit of 10A-16 cmA2 otherwise.

[0040] Also, and according to the invention, a support 1 formed from a base substrate 2 and a trapping layer 3a, intended for the production of a composite substrate, is constituted by a trapping layer 3a having electrical traps of the first type and of the second type. Advantageously, the trapping layer 3a is devoid of electrical traps of the third type. More advantageously, the trapping layer 3a further comprises electrical traps of the fourth type and of the fifth type, and it is devoid of electrical traps of the sixth type and of the seventh type.

[0041] [Fig. 3] thus represents a support 1 conforming to one of the embodiments. This support 1 is intended to receive, by a layer transfer technique, a thin crystalline layer to form a composite substrate S, represented in [Fig. 4]. In a very general manner, the support 1 comprises, arranged on a base substrate 2, a trapping layer 3a in contact with the base substrate 2. It is possible to provide, as represented in [Fig. 1], a dielectric layer 3b arranged on and in contact with the trapping layer 3a, but this dielectric layer 3b is perfectly optional. When it is present, the dielectric layer 3b has a thickness typically between 10 nm and 10 microns, essentially dictated by the need for the application of the composite substrate S that the support 1 is intended to form.

[0042] Conventionally, the support 1 can be in the form of a circular plate whose diameter can be 100, 150, 200, 300 or even 450 mm.

[0043] The base substrate 2 of the support 1 on which the trapping layer 3a rests typically has a thickness of several hundred micrometers. Preferably, the base substrate 2 has a high resistivity, greater than 1000 ohm centimeters, and even more preferably, greater than 2000 ohm centimeters. This limits the density of charges, holes or electrons, which are likely to move in the base substrate 2. However, the invention is not limited to a base substrate 2 having such a resistivity, and it also provides RF performance advantages when the base substrate 2 has a more conformal resistivity, of the order of a few hundred ohm centimeters, for example less than 1000 ohm.cm, or 500 ohm.cm or even 10 ohm.cm.

[0044] For reasons of availability and cost, the base substrate 2 is preferably made of monocrystalline silicon. The base substrate 2 can alternatively be formed from another material: this may be, for example, sapphire, glass, quartz, silicon carbide, germanium, gallium nitride, indium phosphide, etc. In certain circumstances, and in particular when the trapping layer 3a has a sufficient thickness, for example greater than 10 micrometers, the base substrate 2a may have a standard resistivity of less than 1 kohm.cm.

[0045] In order to seek to preserve the properties of the trapping layer 3a during the heat treatments that the support 1 may undergo, it is possible to provide an amorphous layer, made of silicon dioxide for example, directly intercalated between the base substrate 2 and the trapping layer 3a. When the base substrate 2 is made of silicon, this amorphous layer may be a native oxide layer present on the surface of this substrate or intentionally formed by chemical or thermal oxidation of the base substrate. But the trapping layer 3a in accordance with the present description is particularly stable with temperature, and the presence of the amorphous layer is perfectly optional.

[0046] The trapping layer 3a may have a thickness of between 10 nm and 50 micrometers. Preferably, this thickness is less than 2 microns, or even 1 micron, to limit the quantity of material, and the possible stresses that this layer can apply to the support 1, and which could deform it. But this advantageous thickness range is in no way limiting, and it will be possible to choose to form a trapping layer 3a of any suitable thickness, depending on the needs of the intended application.

[0047] According to another aspect, the invention relates to a method for selecting a support. This method comprises a first step of providing a support comprising a base substrate and a polycrystalline silicon trapping layer 3a disposed on the base substrate.

[0048] This supply step consists of forming, by any means known per se, the trapping layer 3a. It may thus be a deposit of the HTCVD type (acronym for the English expression “High Temperature Chemical Vapor Deposition” or chemical vapor deposition assisted at high temperature) or of the PECVD type (acronym for the English expression “Plasma Enhanced Chemical Vapor Deposition” or chemical vapor deposition assisted by plasma). It may also be a deposit of the LPCVD type (acronym for the English expression “Low Pressure Chemical Vapor Deposition” or chemical vapor deposition at subatmospheric pressure). These deposits may be made from any suitable silicon precursor gas, such as silane, dichlorosilane, trichlorosilane or TEOS (tetraethyl orthosilicate). In any case, the trapping layer 3a has electric traps which can be of a variety of types.

[0049] The experiments carried out showed that the same deposition technique, but deploying precursors of different nature (for example dichlorosilane and trichlorosilane) led to the formation of trapping layers with different levels of performance. Analysis of the traps present in these layers showed that they were quite distinct from one layer to another, which confirms the interest of a characterization method in accordance with the invention.

[0050] In a following step of the method which is the subject of the present description, a step of characterizing the trapping layer 3a is implemented. This step comprises the measurement of the activation energy and the hole and / or electron capture cross-section of the electrical traps of the trapping layer.

[0051] This characterization step also includes the identification of different types of electrical traps present in the trapping layer, and in particular types T1 to T7 which were described in a previous section.

[0052] Finally, the method comprises a step of selecting the support 1 during which this support 1 is selected if the trapping layer 3a has electrical traps of the first type and of the second type.

[0053] Advantageously, during this selection step, a support 1 is retained only if the trapping layer 3a is devoid of electrical traps of the third type. Even more advantageously, a support is retained only if the trapping layer 3a further comprises electrical traps of the fourth type and of the fifth type, and if it is devoid of electrical traps of the sixth type and of the seventh type.

[0054] A selected support 1 can be advantageously used in a layer transfer method aimed at transferring onto the charge trapping layer 3a or onto a dielectric layer 3b formed on this layer 3a, a crystalline thin film 4. This film can in particular be made of or comprise silicon, silicon carbide, a III-V or piezoelectric material.

[0055] Of course, the invention is not limited to the embodiments described and variant embodiments can be made without departing from the scope of the invention as defined by the claims.

Claims

Claims

1. Support (1) for a composite substrate (S), the support comprising a base substrate and a trapping layer (3a) of polycrystalline silicon arranged on the base substrate (2), the support (1) being characterized in that the trapping layer has electric traps of a first type and a second type, the electric traps of the first type having an activation energy of 0.383 eV to within 0.008 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the second type having an activation energy of 0.428 eV to within 0.016 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2.

2. Support (1) according to the preceding claim in which the electrical traps of the first type have an effective capture section for holes of 1.7 10A-17 to within 0.1 10A-17 and an effective capture section for electrons of 5.4 10A-17 to within 0.2A10A-17.

3. Support (1) according to one of the preceding claims in which the electrical traps of the second type have an effective capture section for electrons of 1.8 10A-17 to within 1.1 10A-17 and an effective capture section for holes of 5.7 10A-17 to within 3.7 10A-18.

4. Support (1) according to one of the preceding claims in which the trapping layer is devoid of electrical traps of a third type, the electrical traps of the third type having an activation energy of 0.485 eV to within 0.015 eV and an effective capture section for holes and for electrons greater than 10A-16 cmA2.

5. Support (1) according to the preceding claim in which the electrical traps of the third type have an effective capture section for electrons of 1.0 10A-15 to within 0.1 10A-15 and an effective capture section for holes of 3.3 10A-16 to within 0.2 10A-16.

6. Support (1) according to one of the preceding claims in which the trapping layer further comprises electric traps of a fourth type and a fifth type, the electric traps of the fourth type having an activation energy of 0.392 eV to within 0.018 eV and a capture cross-section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the fifth type having an activation energy of 0.371 eV to within 0.025 eV and a capture cross-section for holes and for electrons in- less than 10^-16 cmA2.

7. Support (1) according to the preceding claim in which the electrical traps of the fourth type have an effective capture section for electrons of 3.8 10A-17 to within 0.3 10A-17 and an effective capture section for holes of 1.2 10A-17 to within 0.1 10A-17.

8. Support (1) according to one of the two preceding claims in which the electrical traps of the fifth type have an effective capture section for electrons of 6.9 10A-17 to within 0.7 10A-17 and an effective capture section for holes of 2.2 10A-17 to within 0.2 10A-17.

9. Support (1) according to one of the preceding claims in which the trapping layer is devoid of electric traps of a sixth type and of a seventh type, the electric traps of the sixth type having an activation energy of 0.474 eV to within 0.032 eV and a capture cross section for holes greater than 10A-16 cmA2, the electric traps of the seventh type having an activation energy of 0.416 eV to within 0.017 eV and a capture cross section for holes greater than 10A-16 cmA2.

10. Support (1) according to the preceding claim in which the electric traps of the sixth type have an effective capture section for the holes of 5.2 10A-16 to within 0.5 10A-16.

11. Support (1) according to one of the two preceding claims in which the electric traps of the seventh type have an effective capture section for the holes of 1.7 10A-16 to within 0.1 10A-16.

12. A method for selecting a support (1), the method comprising: - A step of providing the support comprising a base substrate and a trapping layer (3a) of polycrystalline silicon arranged on the base substrate, the trapping layer comprising electrical traps; - A characterization step comprising measuring an activation energy and a hole and / or electron capture cross-section of the electrical traps of the trapping layer, the characterization step also comprising identifying different types of electrical traps present in the trapping layer; - A selection step during which the support (1) is selected if the trapping layer has traps electric traps of a first type and a second type, the electric traps of the first type having an activation energy of 0.383 eV to within 0.008 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2, the electric traps of the second type having an activation energy of 0.428 eV to within 0.016 eV and a capture cross section for holes and for electrons of less than 10A-16 cmA2.

13. Selection method according to claim 12 wherein during the selection step the support (1) is selected if the trapping layer is also devoid of electrical traps of a third type, the electrical traps of the third type having an activation energy of 0.485 eV to within 0.015 eV and an effective capture section for holes and for electrons greater than 10A-16 cmA2.

14. Selection method according to one of claims 12 to 13 wherein during the selection step the support (1) is selected if the trapping layer also comprises electrical traps of a fourth type and a fifth type, the electrical traps of the fourth type having an activation energy of 0.392 eV to within 0.018 eV and a capture cross section for holes and for electrons less than 10A-16 cmA2, the electrical traps of the fifth type having an activation energy of 0.371 eV to within 0.025 eV and a capture cross section for holes and for electrons less than 10A-16 cmA2.

15. Selection method according to one of claims 12 to 14 wherein during the selection step the support (1) is selected if the trapping layer is also devoid of electrical traps of a sixth type and of a seventh type, the electrical traps of the sixth type having an activation energy of 0.474 eV to within 0.032 eV and a capture cross section for holes greater than 10A-16 cmA2, the electrical traps of the seventh type having an activation energy of 0.416 eV to within 0.017 eV and a capture cross section for holes greater than 10A-16 cmA2.

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