Phase-change memory cell

Abstract

Phase-Change Memory Cell This description relates to a confined phase-change memory cell (100) comprising: – an insulating region (103); – a first region (105) confined in a first alloy of germanium, antimony, and tellurium surrounded laterally by the insulating region, the first alloy forming the entire first confined region; and – a second region (107) in a second alloy of germanium, antimony, and tellurium, the second alloy comprising different proportions than the first alloy, the second region overlapping the insulating region and the first region. Figure for the abbreviation: Fig. 1

Description

Title of the invention: Phase change memory cell Technical field

[0001] The present description relates generally to electronic devices, more particularly to phase change memories and the cells of such memories. Prior art

[0002] In a phase change memory, the phase change material of each cell is capable of alternating, under the effect of a rise in temperature, between an amorphous, electrically resistive phase and a crystalline, electrically conductive phase. The amorphous and crystalline phases of the phase change material of a cell make it possible to define, for this cell, two memory states corresponding for example respectively to the logic values ​​0 and 1.

[0003] Phase change memories are currently integrated into many types of electronic devices, for example microcontrollers. For some applications, phase change memories are subjected to high temperatures that may cause loss of data stored in the memories. In the automotive field, for example, high-temperature memory stability specifications may require that the memory guarantee persistence of the information it stores for a period of more than ten years, at a temperature of about 150°C, and for a period of about two hours, at a temperature of about 250°C.When a phase change memory is exposed to such temperatures, cells whose material is initially in the amorphous phase may undergo unintentional crystallization, thus an undesirable modification of their logic values, thus compromising the integrity of the data stored in the memory.

[0004] In order to overcome this drawback, memory cells based on an alloy of germanium, antimony and tellurium (GeSbTe, also designated by the acronym "GST") comprising a high germanium content, for example greater than 35%, in atomic percentage, have been proposed. In these cells, the high germanium content makes it possible to delay the crystallization of the material at high temperatures, for example greater than 250°C. However, delaying the crystallization of the material penalizes, in these cells, the transition between the amorphous phase and the crystalline phase. In cells based on GeSbTe with a high germanium content, the transition from the amorphous phase leads instead to the formation of a polycrystalline phase comprising grains consisting of a stoichiometric phase stable, for example a Ge2Sb2Te5, GeSb2Te4, Sb2Te3, etc. phase, separated by germanium-rich grain boundaries. This causes a very significant drift, over time, in the resistance of the memory cell, this drift being aggravated by exposure to high temperatures. In these cells, the resistance of the phase supposed to be crystalline tends towards that of the amorphous phase, and it then becomes very difficult to discriminate between the two memory states.

[0005] Another disadvantage of memory cells based on a GeSbTe alloy with a high germanium content is that, when these cells undergo an initialization step aimed at forming an active region, for example in the shape of a mushroom, inside each of these cells, a partial expulsion of the germanium present in excess in the active region and a formation of germanium-rich zones at the periphery of the active region are observed. This undesirably causes heterogeneities to appear between the memory cells. Summary of the invention

[0006] There is a need to improve existing phase change memory cells. In particular, it would be desirable to produce phase change memory cells having improved temperature resistance without these cells being affected by resistance drift when they are in the crystalline phase.

[0007] For this, one embodiment provides a confined type phase change memory cell comprising: - an insulating region; - a first confined region made of a first alloy of germanium, antimony and tellurium laterally surrounded by the insulating region, the first alloy entirely forming the first confined region; and - a second region made of a second alloy of germanium, antimony and tellurium, the second alloy comprising proportions different from the proportions of the first alloy, the second region covering the insulating region and the first region.

[0008] According to one embodiment, the second region is common to several memory cells, the first region of each memory cell being distinct from those of the other memory cells, each memory cell further comprising a lower electrode distinct from those of the other memory cells.

[0009] According to one embodiment, the second region of each memory cell is distinct from those of the other memory cells, each memory cell further comprising an upper electrode distinct from those of the other memory cells.

[0010] According to one embodiment, the first alloy has: - an atomic concentration of germanium between 35 and 65%; and - a ratio between the atomic concentration of antimony and the atomic concentration of tellurium between 1 and 5.

[0011] According to one embodiment, the second alloy has: - an atomic concentration of germanium between 40 and 80%; and - a ratio between the atomic concentration of antimony and the atomic concentration of tellurium between 0.2 and 1.

[0012] According to one embodiment: - the first region has a thickness greater than 5 nm, preferably greater than 10 nm; and - the second region has a thickness greater than 5 nm, preferably greater than 10 nm.

[0013] According to one embodiment, the cell further comprises a third region made of the second alloy located on the side of a face of the insulating region opposite the second region, the insulating region and the first region being located on and in contact with the third region.

[0014] According to one embodiment, the second region is located on and in contact with the insulating region and the first region.

[0015] According to one embodiment, the cell further comprises a fourth region made of a third alloy of germanium, antimony and tellurium different from the first and second alloys, interposed between the first and second regions.

[0016] According to one embodiment, the cell further comprises fourth and fifth regions made of a third alloy of germanium, antimony and tellurium different from the first and second alloys, and: - the fourth region is interposed between the first and second regions; and - the fifth region is interposed between the first and third regions.

[0017] According to one embodiment, the first region has a U shape, the interior of the U formed by the first region being entirely filled with a dielectric material.

[0018] According to one embodiment, the first region has an L shape.

[0019] According to one embodiment, a silicon nitride spacer covers the face su upper part of the horizontal part and a flank of the vertical part of the L formed by each first region.

[0020] According to one embodiment, the first region has a maximum lateral dimension strictly less than that of the second region.

[0021] According to one embodiment, the first region has a thickness strictly less than that of the second region.

[0022] One embodiment provides a phase change memory device comprising a plurality of memory cells as described.

[0023] One embodiment provides a method of manufacturing a memory cell with phase change comprising the following successive stages: a) form an insulating region; b) forming an opening in the insulating region; c) filling the opening with a first region made of a first alloy of germanium, antimony and tellurium laterally surrounded by the insulating region; and d) depositing, on the insulating region and the first region, a second region made of a second alloy of germanium, antimony and tellurium, the second alloy comprising proportions different from the proportions of the first alloy, the second region covering the insulating region and the first region.

[0024] According to one embodiment, the cell comprises a single stack of phase change materials consisting of the first and second regions.

[0025] According to one embodiment, the cell comprises a single stack of phase change materials consisting of the first, second and third regions.

[0026] According to one embodiment, the cell further comprises first and second electrodes located on either side of the first region, one of these electrodes being located on and in contact with the second region. Brief description of the drawings

[0027] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0028] [Fig.l] is a schematic and partial sectional view of a phase change memory cell according to one embodiment;

[0029] [Fig.2] is a graph showing chemical element contents of alloys used for the production of phase change material regions of the cell of [Fig.l];

[0030] [Fig.3] is a schematic and partial sectional view of a structure obtained at the end of an initialization step of the memory cell of [Fig.l];

[0031] [Fig.4] is a schematic and partial sectional view of a phase change memory cell according to one embodiment;

[0032] [Fig. 5] is a schematic and partial sectional view of a phase change memory cell according to one embodiment; and

[0033] [Fig.6] is a schematic and partial sectional view of a structure comprising two phase-change memory cells according to one embodiment. Description of the embodiments

[0034] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0035] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the elements and circuits for controlling the phase-change memory cells of the described memory devices, which may in particular include electrical selection and connection elements, are not detailed, the described embodiments being compatible with all or most of the usual phase-change memory cell control elements and circuits, possibly subject to adaptations within the scope of the person skilled in the art upon reading this description.

[0036] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0037] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0038] Unless otherwise specified, the expressions “about”, “approximately”, “substantially”, and “of the order of” mean to within 10%, preferably to within 5%.

[0039] In the following description, the terms “insulator” and “conductor” mean respectively, unless otherwise specified, electrically insulating and electrically conductive.

[0040] [Fig.l] is a schematic and partial sectional view of a phase change memory cell 100 according to one embodiment. The memory cell 100 is for example part of a memory device comprising several memory cells identical or similar to the memory cell 100, for example arranged in a matrix according to rows and columns. By way of example, the memory device of which the memory cell 100 is part comprises several thousand or several million memory cells. [Fig.l] more particularly illustrates a confined type memory cell.

[0041] In the example shown, the memory cell 100 comprises a conductive layer 101. The conductive layer 101 constitutes for example a first electrode (the lower electrode, in the orientation of [Fig.l]), of the memory cell 100. The conductive layer 101 is for example located on and in contact, by its lower face, with a selector not shown in [Fig.l]. In this case, the selector is for example a transistor, for example a CMOS transistor (from the English "Complementary Metal-Oxide-Semiconductor" - complementary metal oxide semiconductor) or a bipolar transistor ("Bipolar Junction Transistor" - BJT, in English), or a diode. The conductive layer 101 has, in top view, any shape, for example a rectangular, elliptical, square or circular shape. For example, the conductive layer 101 is made of a metal or a metal alloy.

[0042] In the illustrated example, the memory cell 100 further comprises an insulating region 103 coating the conductive layer 100. In this example, the insulating region 103 is located on and in contact with the upper face of the conductive layer 101. By way of example, the insulating region 103 is made of a nitride, for example silicon nitride (SiN) or germanium nitride (GeN), or of an oxide, for example silicon dioxide (SiO2).

[0043] In the example shown, the memory cell 100 further comprises a confined region 105 made of a phase change material. In this example, region 105 is located in insulating region 103. In the illustrated example, region 105 extends vertically over the entire thickness of insulating region 103, i.e. from a face of insulating region 103 opposite conductive layer 101 (the upper face of insulating region 103, in the orientation of [Fig. 1]) to the upper face of conductive layer 101. In the example shown, region 105 is flush with the upper face of insulating region 103. Furthermore, in this example, insulating region 103 laterally borders region 105, insulating region 103 being located on and in contact with the side walls, or flanks, of region 105. In the example illustrated in [Fig.l], the region 105 is located on and in contact with a part of the upper face of the conductive layer 101 not coated by the insulating region 103. In the example shown, the region 105 of phase change material fills, that is to say completely fills, an opening or cavity formed in the insulating region 103. In other words, the phase change material entirely forms the confined region 105.

[0044] In the illustrated example, the region 105 made of phase-change material has a maximum lateral dimension D. The region 105 has, in top view, any shape, for example identical to that of the conductive layer 101. The region 105 has, for example, in top view, a rectangular, elliptical, square or circular shape. In these cases, the maximum lateral dimension D of the region 105 corresponds respectively to the length, the major axis, the side or the diameter of the region 105. For example, the dimension D is between 1 and 100 nm, for example between 10 and 50 nm. Furthermore, in the example illustrated in [Fig.l], the region 105 has a height, or thickness, substantially equal to a height h, or thickness, of the insulating region 103. For example, the height h is greater than 5 nm, preferably greater than 10 nm. The height h is for example less than or equal to 100 nm.

[0045] In the example shown, the memory cell 100 further comprises another region 107 made of a phase change material different from that of the region 105. In the example shown, the region 107 coats, or covers, the insulating region 103. In this example, the region 107 is located on and in contact with the upper face of the insulating region 103. Furthermore, the region 107 coats, or covers, the region 105 made of phase change material. In the example shown, the region 107 is located on and in contact with the upper face of the region 105.

[0046] In the illustrated example, the region 107 made of phase-change material has a height, or thickness, H and a maximum lateral dimension L. The height H of the region 107 is, for example, greater than the height h of the region 105. For example, the height H is greater than 5 nm, preferably greater than 10 nm. The height H is, for example, less than or equal to 200 nm. Furthermore, the maximum lateral dimension L of the region 107 is strictly greater, for example approximately ten times greater, than the maximum lateral dimension D of the underlying region 105. The region 107 has, in top view, any shape, for example identical to that of the conductive layer 101 and / or to that of the region 105. The region 107 has, for example, in top view, a rectangular, elliptical, square or circular shape.In these cases, the maximum lateral dimension L of the region 107 corresponds respectively to the length, the major axis, the side or the diameter of the region 107. For example, the dimension L is between 5 and 500 nm, for example between 20 and 300 nm.

[0047] In the example shown, the memory cell 100 further comprises another conductive layer 109. The conductive layer 109 constitutes, for example, a second electrode (the upper electrode, in the orientation of [Fig.l]), of the memory cell 100. The conductive layer 109 covers, for example, the region 107 in phase-change material, the conductive layer 109 being, for example, located on and in contact, by its lower face, with the upper face of the region 107. The conductive layer 109 has, in top view, any shape, for example identical to that of the conductive layer 101 and / or that of the region 105 and / or that of the region 107. The conductive layer 109 has, for example, in top view, a rectangular, elliptical, square or circular shape.

[0048] The conductive layer 109 is for example made of a metal, for example tungsten, or a metal alloy. For example, the conductive layer 109 is made of a metal nitride, for example titanium nitride (TiN) or tantalum nitride (TaN). Furthermore, although this has not been detailed in [Fig.l], at least one other intermediate metal layer, forming for example an intermediate electrode, can be in interposed between the region 107 of phase change material and the conductive layer 109. In this case, each intermediate metal layer is for example based on titanium or carbon.

[0049] In the memory cell 100, the conductive layer 101 is for example isolated from conductive layers forming lower electrodes of other adjacent memory cells identical or similar to the memory cell 100. This corresponds for example to a case where the conductive layer 109 forms an upper electrode common to several or all the memory cells of the memory device to which the memory cell 100 belongs. In this case, the memory cell 100 has for example lateral dimensions substantially equal to those of the conductive layer 101.

[0050] For example, the conductive layer 101 is a conductive via connecting the region 105 made of phase change material of the memory cell 100 to a selection element, for example a transistor.

[0051] The region 107 is for example common to several memory cells 100 of the memory device. In this case, the region 105 of each memory cell 100 is for example distinct from the regions 105 of the other memory cells 100, the regions 105 being isolated from each other. The lower electrode of each memory cell 100 is then for example distinct from the lower electrodes of the other memory cells 100, the lower electrodes being isolated from each other.

[0052] As a variant, the region 107 of each memory cell 100 may be distinct from the regions 107 of the other memory cells 100, the regions 107 being isolated from each other. Furthermore, the conductive layer 109 of each memory cell 100 may be distinct from the conductive layers 109 of the other memory cells 100, the conductive layers 109 being isolated from each other. In this variant, the region 107 and / or the conductive layer 109 of each memory cell 100 are for example surrounded by an insulating material.

[0053] The memory cell 100 is for example produced by implementing a manufacturing method comprising the following successive steps: a) deposition of the conductive layer 101; b) deposition, on the side of the upper face of the conductive layer 101, of the insulating region 103; c) formation, by photolithography then etching in the insulating region 103, of a cavity, or opening, extending vertically in the thickness of the insulating region 103 from its upper face to the upper face of the conductive layer 101, the cavity having a maximum lateral dimension D and a depth h; d) formation of the region 105 by deposition, on the side of the upper face of the insulating region 103, of a first layer of a first phase change material filling the cavity formed in step c) and extending laterally over and in contact with the upper face of the insulating region 103, then planarization, for example by chemical mechanical polishing (CMP) in order to remove parts of the first layer coating the upper face of the insulating region 103; e) deposition, on the side of the upper face of the insulating region 103, of a second layer of a second phase change material; f) deposition, on the side of the upper face of the second layer of the second phase change material, of the conductive layer 109; and g) individualization or delimitation of the memory cell 100 by photolithography then etching of the stack formed by the insulating region 103, the second layer of the second phase change material and the conductive layer 109, thus leading to the formation of the region 107 of maximum lateral dimension L.

[0054] Step g) of the method described above is for example followed by another step h) of encapsulation of the memory cell 100, comprising for example the deposition of an insulating layer, for example made of silicon nitride or silicon dioxide, coating the upper face and the sides of the conductive layer 109 as well as the sides of the region 107 and of the insulating region 103. Step h) can further be followed by another step i) of formation of contact recovery elements on the conductive layer 109 through the thickness of the insulating encapsulation layer.

[0055] [Fig. 2] is a graph 200 representing contents, or concentrations, of chemical elements of alloys used for the production of regions 105 and 107 in phase change material of the memory cell 100 of [Fig. 1]. [Fig. 2] illustrates more precisely a case in which each region 105, 107 is made of an alloy of germanium, antimony and tellurium (GeSbTe, also designated by the acronym “GST”).

[0056] In the orientation of [Fig. 2], the upwardly pointing triangular graph 200 includes horizontal lines for representing variations in the antimony (Sb) content, oblique lines for representing variations in the germanium (Ge) content, and other oblique lines for representing variations in the tellurium (Te) content. In graph 200, the germanium, antimony, and tellurium contents in the 105 and 107 region alloys are expressed in atomic percent (at. %) and extend, for each chemical element, over a range of 0 to 100%.

[0057] Graph 200 includes areas 205 and 207 corresponding respectively to the different possible chemical compositions for producing the GeSbTe alloys of regions 105 and 107 in phase change material of memory cell 100. Areas 205 and 207 correspond more particularly to the percentage ranges atomic numbers of germanium, antimony and tellurium entering into the composition of GeSbTe alloys of the 105 and 107 regions, respectively.

[0058] In the example shown, zone 205 groups together compositions of GeSbTe alloys having an atomic concentration of germanium of between 35 and 65% and an Sb / Te ratio, between the atomic concentration of antimony and the atomic concentration of tellurium, of between 1 and 5. Furthermore, in this example, zone 207 groups together compositions of alloys having an atomic concentration of germanium of between 40 and 80% and an Sb / Te ratio of between 0.2 and 1. In [Fig. 2], graph 200 includes a line 209 corresponding to an Sb / Te ratio equal to approximately 0.2, another line 211 corresponding to an Sb / Te ratio equal to approximately 1, and yet another line 213 corresponding to an Sb / Te ratio equal to approximately 5.

[0059] The alloys of germanium, antimony and tellurium of the 105 and 107 regions can be doped, for example, with nitrogen, carbon, oxygen, silicon atoms, etc.

[0060] An advantage of the memory cell 100 lies in the fact that the phase change material of the region 105 makes it possible to promote a segregated crystalline phase having a high crystal growth rate, leading to the formation of crystallites of large dimensions. In addition, the germanium content of this material makes it possible to guarantee good stability of the amorphous phase at high temperature, for example for temperatures above 150°C. Furthermore, the fact that the region 105 is surrounded, or bordered, laterally by the insulating region 103 makes it possible to achieve higher current densities than in the region 107, and therefore to form an amorphous phase in the region 105 despite the fact that the material has a Sb / Te ratio of between 1 and 5.

[0061] Another advantage of the memory cell 100 lies in the fact that the phase change material of the region 107 makes it possible to limit or prevent phenomena of expulsion of germanium from the region 105 under the effect of the temperature rise applied to the memory cell 100 during a programming step of the cell. This guarantees good thermal stability in the region 105. Furthermore, the phase change material of the region 107 ensures good electrical conduction between the conductive layers 101 and 109 and the region 105. The material of the region 107 also makes it possible to limit or prevent the tellurium of the region 105 from migrating, by diffusion, into the region 107.

[0062] [Fig. 3] is a schematic and partial sectional view of a structure 300 obtained at the end of an initialization step of the memory cell 100 of [Fig. 1]. As a variant, the structure 300 of [Fig. 3] can be obtained during the manufacture of the memory cell 100.

[0063] The structure 300 of [Fig. 3] comprises elements in common with the memory cell 100 of [Fig. 1]. These common elements will not be detailed again below. The structure 300 of [Fig. 3] differs from the memory cell 100 of [Fig. 1] in that the structure 300 comprises a region 301 of phase change material interposed between the regions 105 and 107.

[0064] In the example shown, a first part of the region 301 has, in top view, a shape and lateral dimensions substantially identical to those of the region 105 and extends vertically in the thickness of the insulating region 103, from its upper face to its lower face, to a depth d less than the thickness h of the insulating region 103. In this example, the region 105 has a height, or thickness, equal to the thickness h of the insulating region 103 minus the thickness d of the first part of the region 301. By way of example, the thickness d is less than or equal to 10% of the thickness h of the insulating region 103.

[0065] Furthermore, in the illustrated example, a second part of the region 301 has, in top view, lateral dimensions strictly greater than those of the region 105 and extends vertically, in the thickness of the region 107, from its lower face towards its upper face, over a distance for example substantially equal to the thickness d of the first part of the region 301. In this example, the second part of the region 301 has, in top view, a shape substantially identical to that of the region 105 and a maximum lateral dimension equal to the maximum lateral dimension of the region 105 plus twice the thickness d.

[0066] The phase change material of region 301 is different from that of regions 105 and 107. Region 301 is for example made of a GeSbTe alloy having a chemical composition intermediate between that of the alloy of the underlying region 105 and that of the alloy of the overlying region 107, in other words germanium, antimony and tellurium contents between those of the phase change material of region 105 and those of the phase change material of region 107. The alloy of region 301 has for example more precisely a germanium content and an Sb / Te ratio between those of the alloys 205 and 207 of regions 105 and 107, respectively.

[0067] In the case where the structure 300 is obtained at the end of an initialization step of the memory cell 100 of [Fig.l], the region 301 is for example formed under the effect of heating produced by a current flowing between the conductive layers 101 and 109 of the memory cell 100, leading to a mixing of the materials of the regions 105 and 107 in the vicinity of an interface between these regions. In a case where the structure 300 is obtained during the manufacture of the memory cell 100, the region 301 is for example formed, for example during a step implemented between steps d) and e) of the method previously described in relation to [Fig.l], by an operation of deposition of a third layer of a third phase change material inside the cavity followed by photolithography operations and then etching of the third layer.

[0068] [Fig.4] is a schematic and partial sectional view of a phase change memory cell 400 according to one embodiment.

[0069] The memory cell 400 of [Fig. 4] comprises elements in common with the memory cell 100 of [Fig. 1]. These common elements will not be detailed again below. The memory cell 400 of [Fig. 4] differs from the memory cell 100 of [Fig. 1] in that the memory cell 400 further comprises another region 401 made of a phase-change material, different from that of the region 105, interposed vertically between the conductive layer 101 and the region 105. The phase-change material of the region 401 is for example substantially identical to that of the region 107.

[0070] In the illustrated example, the region 401 covers the conductive layer 101, the region 401 being more precisely located on and in contact with the upper face of the conductive layer 101. In this example, the insulating region 103 and the region 105 made of phase-change material are located on and in contact with the upper face of the region 401. The region 401 made of phase-change material has, for example, a height, or thickness, and a maximum lateral dimension substantially equal, respectively, to the height H and the maximum lateral dimension L of the region 107 made of phase-change material. The region 401 has, in top view, any shape, for example identical to that of the region 107.

[0071] The presence of the region 401 in the memory cell 400 advantageously makes it possible, compared to the memory cell 100, to obtain better thermal insulation of the region 105 made of phase-change material. As a result, the memory cell 400 requires a smaller amount of energy than the memory cell 100 to produce, in the region 105, substantially identical heating. The memory cell 400 therefore has greater energy efficiency than that of the memory cell 100.

[0072] [Fig.5] is a schematic and partial sectional view of a phase change memory cell 500 according to one embodiment.

[0073] The memory cell 500 of [Fig. 5] comprises elements in common with the memory cell 100 of [Fig. 1]. These common elements will not be detailed again below. The memory cell 500 of [Fig. 5] differs from the memory cell 100 of [Fig. 1] in that the memory cell 500 comprises, in place of the region 105, a region 501 made of phase-change material formed in the thickness of the insulating region 103.

[0074] In the example shown, the region 501 has, in side view and in section, a U shape comprising vertical parts, extending vertically over the entire the thickness h of the insulating region 103, and a horizontal part, extending laterally over and in contact with a part of the upper face of the conductive layer 101. The vertical parts of the region 501 each have a width D' and are laterally separated from one another by an insulating region 503. The insulating region 503 is for example of the same material as the insulating region 103. In the example shown, the insulating region 503 is located on and in contact with the internal lateral faces and the bottom of the U formed by the region 501. When viewed from above, the region 503 is laterally interposed between two substantially parallel bands corresponding to the sides of the region 501. In other words, the interior of the U formed by the region 501 is entirely filled with a dielectric material (the material of the insulating region 503, in this example).For example, the vertical walls of the U formed by region 501 have, when viewed from above, a rectangular, elliptical, square or circular shape.

[0075] By way of example, the region 501 is formed during a step analogous to step d) of the method previously described in relation to [Fig. 1], in which the first layer of the first phase-change material coats the side walls, or flanks, and the bottom of the cavity formed in step c) but does not fill, i.e. does not completely fill, the cavity. The insulating region 503 is for example then formed by deposition of another insulating layer on the side of the upper face of the structure, the other insulating layer and the first layer being for example then planarized, for example by CMP with a stop on the upper face of the insulating region 103.

[0076] The memory cell 500 has advantages similar or identical to those of the memory cell 100.

[0077] Fig. 6 is a schematic and partial cross-sectional view of a structure including two phase change memory cells 600 according to an embodiment.

[0078] The structure of Fig. 6 includes elements common to the memory cell 500 of Fig. 5. These common elements will not be detailed again below. The structure of Fig. 6 differs from the memory cell 500 of Fig. 5 in that the structure of Fig. 6 includes two phase change material regions 601 each formed in the thickness of the insulating region 103.

[0079] In the example shown, each region 601 has an L shape comprising a vertical part, extending vertically over the entire thickness h of the insulating region 103, and a horizontal part, extending laterally over and in contact with a part of the upper face of the conductive layer 101. In this example, the conductive layer 101 is discontinuous and each memory cell 600 comprises a portion of conductive layer 101 isolated from portions of conductive layer 101 forming part of the other memory cells. The vertical part of the region 601 has a width D". In the example shown, the Ls formed by the regions 601 of the memory cells 600 are symmetrical with respect to a vertical axis equidistant from the portions of conductive layer 101, and are separated laterally from each other by the insulating region 503. By way of example, the vertical walls of the Ls formed by the regions 601 have, in top view, a rectangular, elliptical, square or circular shape.

[0080] In the example shown, an insulating region 603 covers the upper face of the horizontal part and a flank of the vertical part of the L formed by each region 601. The insulating region 603 constitutes for example a spacer type structure. For example, the region 603 is made of a nitride, for example silicon nitride, gallium nitride (GaN) or silicon-carbon nitride (SiCN), or silicon carbide (SiC).

[0081] By way of example, the regions 601 of the memory cells 600 of [Fig. 6] are formed from the region 501 previously described in relation to [Fig. 5], for example by photolithography then etching of the horizontal part of the U formed by the region 501. The insulating regions 603 are for example then formed by deposition then etching of an insulating layer before formation of the insulating region 503, for example as explained above in relation to [Fig. 5]. Thus, in the example illustrated in [Fig. 6], two memory cells 600 are for example obtained from the same cavity.

[0082] The memory cells 600 have advantages similar or identical to those of the memory cell 100.

[0083] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will occur to those skilled in the art. In particular, the memory cell 400 of [Fig. 4] may have, at the end of an initialization step of the memory cell 400 or during the manufacture of the memory cell 400, a structure similar to the structure 300 described in relation to [Fig. 3]. In this case, the memory cell 400 comprises, for example, the region 301 made of phase-change material, interposed vertically between the regions 105 and 107, and another region made of phase-change material, similar to the region 301, interposed vertically between the regions 105 and 401 and forming the symmetrical aspect of the region 301 with respect to a horizontal axis crossing the insulating region 103 in its middle.

[0084] Furthermore, the embodiment of [Fig. 4] can be combined with the embodiments of FIGS. 5 and 6. This amounts, for example, to providing, in the memory cell 500 or 600, a region made of a phase-change material similar or identical to the region 401 of the memory cell 400, the region made of phase-change material then being interposed between the conductive layer 101 and the region 501, for memory cell 500, or region 601, for memory cell 600.

[0085] Finally, the practical implementation of the embodiments and variants described is within the reach of the person skilled in the art from the functional indications given above. In particular, the chemical composition of each region 105, 107, 301, 401, 501, 601 made of phase change material is adjustable by the person skilled in the art, for example depending on the intended application, from the indications of the present description.

[0086] Furthermore, the described embodiments are not limited to the particular examples of materials and dimensions mentioned in the present description.

Claims

Claims

1. A phase change memory cell (100; 300; 400; 500; 600) of confined type comprising: - an insulating region (103); - a first confined region (105; 501; 601) made of a first alloy (205) of germanium, antimony and tellurium laterally surrounded by the insulating region, the first alloy entirely forming the first confined region; and - a second region (107) made of a second alloy (207) of germanium, antimony and tellurium, the second alloy comprising proportions different from the proportions of the first alloy, the second region covering the insulating region and the first region.

2. Cell (100; 300; 400; 500; 600) according to claim 1, in which the first alloy (205) has: - an atomic concentration of germanium of between 35 and 65%; and - a ratio between the atomic concentration of antimony and the atomic concentration of tellurium of between 1 and 5.

3. Cell (100; 300; 400; 500; 600) according to claim 1 or 2, in which the second alloy (207) has: - an atomic concentration of germanium of between 40 and 80%; and - a ratio between the atomic concentration of antimony and the atomic concentration of tellurium of between 0.2 and 1.

4. Cell (100; 300; 400; 500; 600) according to any one of claims 1 to 3, wherein: - the first region (105; 501; 601) has a thickness (h) greater than 5 nm, preferably greater than 10 nm; and - the second region (107) has a thickness (H) greater than 5 nm, preferably greater than 10 nm.

5. Cell (400) according to any one of claims 1 to 4, further comprising a third region (401) of the second alloy (207) located on the side of a face of the insulating region (103) opposite the second region (107), the insulating region (103) and the first region (105) being located on and in contact with the third region.

6. Cell (100; 400; 500; 600) according to any one of claims 1 to 5, wherein the second region (107) is located on and in contact with the insulating region (103) and the first region (105; 501; 601).

7. Cell (300) according to any one of claims 1 to 5, further comprising a fourth region (301) made of a third alloy of germanium, antimony and tellurium different from the first and second alloys (205, 207), interposed between the first and second regions (105, 107; 501, 107; 601, 107).

8. The cell (400) of claim 4, further comprising fourth and fifth regions of a third alloy of germanium, antimony and tellurium different from the first and second alloys (205, 207), and wherein: - the fourth region is interposed between the first and second regions (105, 107); and - the fifth region is interposed between the first and third regions (105, 401).

9. A cell (500) according to any one of claims 1 to 8, wherein the first region (501) has a U shape, the interior of the U formed by the first region being entirely filled with a dielectric material.

10. A cell (600) according to any one of claims 1 to 8, wherein the first region (601) has an L shape.

11. Cell (600) according to claim 10, in which a silicon nitride spacer (603) covers the upper face of the horizontal part and a flank of the vertical part of the L formed by each first region (601).

12. Cell (100; 300; 400; 500; 600) according to any one of claims 1 to 11, in which the first region has a maximum lateral dimension (D; D'; D") strictly less than that (L) of the second region (107).

13. Cell (100; 300; 400; 500; 600) according to any one of claims 1 to 12, in which the first region (105; 501; 601) has a thickness (h) strictly less than that (H) of the second region (107).

14. A phase change memory device comprising a plurality of memory cells (100; 300; 400; 500; 600) according to any one of claims 1 to 13.

15. A method of manufacturing a phase change memory cell (100; 300; 400; 500; 600) comprising the successive steps following: a) forming an insulating region (103); b) forming an opening in the insulating region; c) filling the opening with a first region (105; 501; 601) made of a first alloy (205) of germanium, antimony and tellurium laterally surrounded by the insulating region; and d) depositing, on the insulating region and the first region, a second region (107) made of a second alloy (207) of germanium, antimony and tellurium, the second alloy comprising proportions different from the proportions of the first alloy, the second region covering the insulating region and the first region.