Process for preparing a structured substrate for direct bonding
The described process for structured substrates addresses surface degradation issues in direct bonding by using a protective layer with controlled adhesion to preserve surface integrity, ensuring high-quality bonding through controlled structuring and separation techniques.
Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
- Filing Date
- 2024-04-17
- Publication Date
- 2026-04-24
AI Technical Summary
Existing direct bonding processes for structured substrates, particularly those with Cu/SiO2 hybrid surfaces, face issues of surface degradation due to aggressive cleaning methods, leading to poor bonding quality and inability to re-polish surfaces without rounding edges, which compromises the bonding process.
A process involving a protective layer with lower adhesion energy than the substrate's bond energy, allowing for resin removal without damaging the surface, followed by etching and separation steps to form structured substrates suitable for direct bonding, using techniques like laser irradiation or plasma etching to create bumps and chips.
Preserves the surface quality of structured substrates, enabling effective direct bonding by maintaining the integrity of the hybrid surfaces and allowing for precise structuring without edge rounding, thus improving bonding quality.
Smart Images
Figure 00000017_0000 
Figure 00000017_0001 
Figure 00000017_0002
Abstract
Description
Title of the invention: Method for preparing a structured substrate for direct bonding. Technical field
[0001] The present description relates generally to the field of microelectronics, and more particularly to a process for preparing a structured substrate that can be used for direct bonding. Previous technique
[0002] In the field of microelectronics, the bonding of structured substrates is particularly interesting. For example, this may involve bonding a Cu / SiO2 hybrid surface to another structured Cu / SiO2 hybrid surface exhibiting bumps (or steps). The structuring is generally achieved through photolithography / etching steps.
[0003] More particularly, as shown in Figures IA to 1E, such a structured substrate can be produced according to the following process: - provide a substrate 10, having been previously polished, comprising a support substrate 11 covered by a hybrid layer 12 Cu / SiO2 ([Fig. 1 A]), - deposit a layer of resin 20 onto the substrate 10 ([Fig.lB]), - to form openings in the resin layer 20 ([Fig.lC]), - etch the hybrid layer 12 and part of the support substrate 11 through the openings, thereby obtaining a structured substrate 10 ([Fig.lD]), - remove the resin 20 ([Fig.lE]).
[0004] The structured substrate 10 can then be bonded with another substrate 30 comprising a support substrate 31 and a hybrid layer 32 Cu / SiO2 ([Fig.1F]).
[0005] Direct bonding processes require meticulous preparation of the surfaces of the substrates to be joined. Their surface condition is crucial for successful bonding, and chemical and particulate contamination must be avoided.
[0006] It is therefore important to be able to completely remove the resin.
[0007] Plasma cleaning processes combined with wet cleaning can be implemented to remove all contaminants.
[0008] However, these cleaning processes are relatively aggressive, which can degrade the quality of the surface to be bonded (in particular its roughness). This is especially true for surfaces containing copper, typically Cu / SiO2 hybrid surfaces.
[0009] Cleaning the resin can therefore damage the hybrid surface which has been previously polished by mechano-chemical polishing.
[0010] The bonding of the two substrates is then of poor quality.
[0011] Furthermore, it is impossible to polish the surface again because the structuring means that the polishing process would round off the edges of the studs and prevent bonding in these areas. Summary of the invention
[0012] There is a need for a process for preparing a structured substrate of interest that can subsequently be used for direct bonding, the process being required to obtain substrate surfaces of good quality. This need is particularly important for substrates having Cu / SiO2 hybrid surfaces.
[0013] This objective is achieved by a process for preparing a structured substrate of interest for direct bonding comprising the following steps: a) provide a substrate of interest comprising a support substrate and a thin layer, b) bond a protective layer to the thin layer by direct bonding, c) deposit a resin onto the protective layer, and form openings in the resin. d) etch the protective layer, the thin layer and part of the thickness of the substrate support through the openings in the resin, so as to form bumps in the substrate of interest, e) glue a temporary substrate and the substrate of interest, f) separate the temporary substrate from the substrate of interest, whereby the protective layer is separated from the substrate of interest and a structured substrate of interest is obtained for direct bonding, process wherein either the resin is removed between step d) and step e) and the bond energy between the protective layer and the thin film is less than the bond energy between the temporary substrate and the protective layer, or the resin is removed during step f) and the bond energy between the protective layer and the thin film is less than the bond energy between the resin and the protective layer.
[0014] According to a particular embodiment, step b) is carried out by sticking a transfer substrate comprising a support substrate and the protective layer onto the substrate of interest, and then removing the support substrate.
[0015] According to a particular embodiment, the thin film is a Cu / SiO2 hybrid layer comprising a thin silicon oxide layer in which copper pads are formed.
[0016] According to a particular embodiment, the protective layer is made of SiO2.
[0017] According to a particular embodiment, the adhesion energy between the protective layer and the thin layer is less than the adhesion energy between the temporary substrate and the protective layer by at least 0.5 J / m2, or the adhesion energy between the protective layer and the thin layer is less than the adhesion energy between the resin and the protective layer by at least 0.5 J / m2.
[0018] According to a particular embodiment, the steps of the process are carried out at a temperature less than or equal to 150°C.
[0019] According to a particular embodiment, the process includes a singularization step during which the substrate of interest is separated into several parts, at the level of cutting paths positioned between the pads, in order to form chips of interest, the singularization step being preferably carried out by means of a laser irradiation step, a plasma etching step or a saw cutting step.
[0020] According to a particular embodiment, the laser irradiation step is carried out, between step d) and step e) or between step e) and step f), the laser irradiation leading to the formation of weakened areas at the level of the cutting paths, and the substrate of interest is glued onto a stretchable adhesive film, the stretchable adhesive film being stretched, after the laser irradiation step, so as to separate the chips of interest at the level of the weakened areas.
[0021] According to a particular embodiment, the plasma etching step is carried out, between step d) and step e), the substrate of interest being glued onto an adhesive film during the plasma etching step and during steps e) and f).
[0022] According to a particular embodiment, the plasma etching step is carried out between step e) and step f), the substrate of interest being glued onto an adhesive film during step f). Brief description of the drawings
[0023] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:
[0024] [Fig.1A], [Fig.1B], [Fig.1C], [Fig.1D], [Fig.1E] and [Fig.1F], previously described, schematically represent different stages of a process for manufacturing a substrate of interest according to the prior art;
[0025] the [Fig.2A], the [Fig.2B], the [Fig.2C], the [Fig.2D], the [Fig.2E], the [Fig.2F] and the [Fig.2G] schematically represent different stages of a manufacturing process for a substrate of interest according to a particular embodiment;
[0026] Fig. 3A, Fig. 3B, Fig. 3C, Fig. 3D, Fig. 3E and Fig. 3F schematically represent different stages of a manufacturing process for a substrate of interest according to another particular embodiment;
[0027] Fig. 4A, Fig. 4B, Fig. 4C, Fig. 4D, Fig. 4E, Fig. 4F, Fig. 4G, Fig. 4H and Fig. 4I schematically represent different stages of a manufacturing process for a substrate of interest according to another particular embodiment;
[0028] Figures 5A, 5B, 5C, 5D, 5E, 5F, 5G and 5H schematically represent different stages of a manufacturing process for a substrate of interest according to another particular embodiment; and
[0029] Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D, Fig. 6E, Fig. 6F, Fig. 6G, Fig. 6H and Fig. 61 schematically represent different stages of a manufacturing process for a substrate of interest according to another particular embodiment. Description of the implementation methods
[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.
[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.
[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.
[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.
[0034] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.
[0035] Although the description refers particularly to structured substrates having a hybrid Cu / SiO2 bonding surface, the process can be applied to other structured substrates.
[0036] All the given adhesion energies are determined by the double lever method with imposed displacement (as explained in the article by Foumel et al. 'Measurement of bonding energy in an anhydrous nitrogen atmosphere and its application to Silicon direct bonding technology', Journal of Applied Physics 111, 104907 (2012)).
[0037] We will now describe in more detail the process of preparing a structured substrate of interest 100 or chips of interest 150 with reference to Figures 2A to 2G, 3A to 3F, 4A to 41, 5A to 5H and 6A to 61.
[0038] The process comprises at least the following steps: a) provide a substrate of interest 100 comprising a support substrate 110 and a thin film 120 (figures 2A, 3A, 4A, 5A, 6A), b) cover the thin layer 120 with a protective layer 220 (figures 2C, 3C, 4C, 5C, 6C), c) apply resin 300 onto the protective layer 220, and create openings in the resin 300, d) etch the protective layer 220, the thin layer 120 and part of the thickness of the support substrate 110 through the openings in the resin, so as to form bumps 135 in the substrate of interest 100 (figures 2D, 3D, 4D, 5D, 6D), e) glue a temporary substrate 400 onto the substrate of interest 100 (figures 2F, 3E, 4F, 5F, 6F), f) separate the temporary substrate 400 from the substrate of interest 100 (figures 2G, 3F, 4G, 5G, 61).
[0039] The process may further include an additional step in which the substrate of interest 100 is separated into several parts to form chips of interest 150 (Figures 4H, 5F, 6H). This additional step may be carried out between step c) and step d), between step d) and step e), or after step e).
[0040] The protective layer 220 (also called the etching stop layer) has a relatively low adhesion EadhO (typically less than 1 J / m²). It is easily separated from the substrate of interest 100 during step f): it is removed at the same time as the temporary substrate 400. At the end of step f, a structured substrate of interest 100 is obtained that can be used for direct bonding.
[0041] To ensure low adhesion EadhO, the process temperatures used in the process will preferably be below 150°C and / or the bonding is a direct bonding with low adhesion, such as a bonding involving a hydrophobic silicon surface.
[0042] In this process, the protective layer 220 is maintained on the thin layer 120 of the substrate of interest 100 by means of a direct bonding process. There is no need to use glue or polymer. The surface of the thin layer 120 is thus preserved.
[0043] The process further includes a step in which the resin 300 is removed.
[0044] According to a first embodiment, represented for example in figures 2A to 2G, 4A to 41, 5A to 5H and 6A to 61, the resin 300 is removed between step d) and step e) in order to make the protective layer 220 accessible. During step e), the temporary substrate 400 is bonded to the cleaned surface of the protective layer 220.
[0045] The resin 300 can be removed by means of plasma oxidation and wet cleaning steps. The protective layer 220 protects the thin layer 120 during this step.
[0046] The temporary substrate 400 can be a solid substrate or a solid substrate 410 covered by an adhesive layer 420. The use of an adhesive layer 420 allows for greater tolerance with regard to the surface quality of the arrest layer. The bonding adhesion between the temporary substrate 400 and the protective layer 220 Eadhl is strong (typically greater than 1.5 J / m²). The Eadhl energy is greater than the EadhO energy. Thus, during step f), the detachment of the temporary substrate 400 will lead to the opening of the weakest bond interface: this is the interface between the protective layer 220 and the thin layer 120 of the substrate of interest 100. The surface of the substrate of interest 100 is thus exposed and is compatible with a direct bonding process.
[0047] According to a second embodiment, shown for example in Figures 3A to 3F, the resin 300 is removed during step f).
[0048] As with the first embodiment, the temporary substrate 400 can be a solid substrate or comprise a solid substrate 410 covered by an adhesive layer 420, making the bonding highly tolerant of the surface condition of the resin 300. The adhesion Eadh2 between the resin 300 and the protective layer 120 is strong (typically greater than 1.5 J / m²). It is greater than Eadh0. Detachment of this substrate 400 will lead to the separation of the interface between the protective layer 220 and the surface of the substrate of interest 100. The surface of the substrate of interest 100 is thus freed and is compatible with a direct bonding process. The protective layer 220 and the resin are removed along with the temporary substrate 400.
[0049] The substrate of interest 100 provided in step a) is, preferably, a plate.
[0050] The substrate of interest 100 comprises a front face and a rear face. The front face corresponds to the face that we want to prepare for direct gluing.
[0051] The substrate of interest 100 comprises a support substrate 110 and a thin film 120. The support substrate 110 is, for example, a substrate of semiconductor material (preferably Si, Ge, SiC, GaAs), sapphire or silica.
[0052] The substrate of interest 100 provided in step a) can be an SOI ('Silicon on Insulator') substrate, i.e. comprising a support substrate covered successively by a thin layer of buried oxide and a layer of silicon.
[0053] It can also be a solid substrate 110 of semiconductor material covered with a dielectric layer 120, in particular an oxide layer (silicon oxide in particular).
[0054] The thin film 120 is, for example, a metallic layer, an oxide layer (in particular, a silicon oxide layer), a layer of a III / V or IV / VI material, a layer of germanium, SiC, silicon or sapphire.
[0055] Preferably, the thin film 120 is a hybrid film, formed of at least two materials. Preferably, it is a Cu / SiO2 hybrid film comprising a silicon oxide matrix in which copper portions (bubbles) have been formed. The copper bumps have, for example, 2 pm on each side.
[0056] The upper face of the thin layer 120 corresponds to the surface which is structured and prepared for direct bonding.
[0057] During step b), the thin layer 120 of the substrate of interest 100 is covered by a protective layer 220.
[0058] The protective layer 220 can be a silicon oxide layer, a silicon layer (also called a hydrophobic silicon layer, i.e., a layer in which the silicon has Si-H terminations), a nitride layer (such as aluminum nitride), or a polymer layer. It can also be a layer composed of several materials, for example, silicon coated with a silicon oxide layer.
[0059] According to a preferred embodiment, the protective layer 220 is bonded by direct bonding to the substrate of interest 100. This allows for intimate contact between the protective layer 220 and the thin layer 120 of the substrate of interest 100.
[0060] This embodiment can be carried out according to the following steps: i) to glue onto the substrate of interest 100 a transfer substrate 200 comprising a support 210 and the protective layer 220 (figures 2B, 3B, 4B, 5B, 6B), ii) remove the support 210 from the transfer substrate 200, so as to form an assembly comprising the substrate of interest 100 covered by the protective layer 220 (figures 2C, 3C, 4C, 5C, 6C).
[0061] In step i), the temporary substrate 200 and the substrate of interest 100 are joined by direct bonding. Direct bonding can be carried out at atmospheric pressure (i.e., 1013.25 hPa) or under vacuum (on the order of hPa).
[0062] Prior to step i), the transfer substrate 200 will advantageously be contoured. Contouring the edge of the plate 200 helps to avoid potential edge problems, particularly if step ii) is carried out by thinning.
[0063] The contouring can be carried out, for example, by photolithography / engraving or by mechanical contouring using a diamond saw. The width of the contouring is including, for example, between 1 and 5 mm and / or its depth including, for example, between 100 and 250 pm.
[0064] Step ii) can be carried out by thinning.
[0065] Step ii) can be carried out using a laser debonding technique ('laser lift-off'). For example, the 210 support can be formed from a transparent substrate covered with a removal layer.
[0066] A silicon support 210 can be used with EVGroup®'s Nanocleave® technology for laser detachment.
[0067] The support substrate 210 of the temporary substrate 200 can be used in a new bonding / etching cycle. Cleaning is advantageously carried out between each use.
[0068] For example, it is possible to recycle it by implementing an oxygen plasma treatment followed by wet cleaning.
[0069] With each use, a new protective layer can be formed, if necessary, on the support substrate 210 before being reused.
[0070] In step c), a resin 300 is deposited on the protective layer 220. Openings are formed in the resin at the locations of the cavities 130 of the substrate of interest 100 that are to be formed. The resin 300 acts as a mask.
[0071] During step d), the protective layer 220, the thin layer 120 and part of the thickness of the support substrate 110 is etched.
[0072] Plots 135 are thus formed in the substrate of interest 100. The plots 135 are separated by spaces 130.
[0073] The studs 135 form, for example, a square step of 10 mm on each side and 50 pm deep.
[0074] During step e), a temporary substrate 400 is glued with the substrate of interest 100.
[0075] If the resin 300 has been removed between step d) and step e), the temporary substrate 400 is glued onto the 220 protective layer.
[0076] If the resin 300 has not been removed, the temporary substrate 400 is glued onto the resin layer 300.
[0077] The temporary substrate 400 comprises a support substrate 410 and a layer 420, preferably an adhesive layer.
[0078] In step f), the temporary substrate 400 is removed. The protective layer 220 and, if applicable, the resin 300 are removed simultaneously. This step is made possible by the differences in adhesion energy involved.
[0079] In order to promote the removal of the protective layer 120, it is possible to carry out an implantation of gaseous species before the bonding of step e). The implantation can be carried out through the protective layer 120 and, potentially, also through the resin layer 300.
[0080] Following this implantation step, thermal annealing can be implemented to diffuse the gaseous species and promote detachment at the interface between the layer of interest 120 and the protective layer 220.
[0081] At the end of step f), structured substrates of interest 100 are obtained (figures 2G and 3F). Their surfaces are ready for direct bonding.
[0082] It is also possible to carry out an additional step in which the substrate of interest 100 is cut or engraved, at the level of the spaces 130 between the pads 135, to obtain chips of interest 150 whose surface is ready for direct bonding (as shown in Figures 41, 5H and 61).
[0083] The cutting or engraving is carried out over the entire thickness of the substrate 110.
[0084] This step can be carried out before step e) or after step f).
[0085] It can be achieved using different techniques.
[0086] According to a first embodiment, shown in figures 4E to 41, the cutting is carried out using a laser (cutting by 'Stealth Dicing').
[0087] Initially, laser irradiation is carried out between the pads 135 to form weakened areas 140. This step can be performed, before step e), either by irradiating from the front face of the substrate of interest 100 or by irradiating from the rear face. Alternatively, this laser irradiation step can be carried out after step e), by irradiating the rear face of the substrate of interest. For rear face irradiation (before or after bonding the substrates), alignment marks or infrared vision alignment can be used.
[0088] After carrying out the irradiation step ([Fig. 4E]) and the bonding step ([Fig. 4F]) of the substrate of interest 100 with the temporary substrate 400 (or vice versa), the substrate of interest 100 is bonded to a device 500 comprising an adhesive film 510 held by a metallic frame 520. The temporary substrate 400 is then peeled off to remove the protective layer 220 from the front face of the substrate of interest ([Fig. 4G]). Then, the stretchable adhesive film 510 is stretched ([Fig. 4H]) to cause the substrate of interest 100 to fracture at the areas weakened 140 by the irradiation. This yields the chips of interest 150. The chips 150 are then removed from the stretchable film 510.
[0089] According to a second embodiment, as shown in Figures 5E to 5H and 6G to 61, the cutting of the substrate 100 is carried out using a plasma. This is a so-called deep cut.
[0090] For example, deep cutting of the substrate 100, in particular silicon, can be carried out with a Bosch process.
[0091] According to a first embodiment, as shown in Figures 5E and 5F, the engraving can be carried out from the front face of the substrate of interest 100 just before step e).
[0092] To differentiate the chips 150, the substrate of interest 100 is bonded to a device 500 comprising an adhesive film 510 held by a metallic frame 520 ([Fig. 5E]). The etching step is then performed. The protective layer 220 can act as a hard mask during etching, thus reducing the process time.
[0093] The temporary substrate 400 is then glued ([Fig. 5F]). When the temporary substrate 400 is peeled off, chips of interest 150 are obtained, fixed to the adhesive film 510 ([Fig. 5G]). After separation from the adhesive film 510, the chips are ready for use ([Fig. 5H]).
[0094] According to a second embodiment, as shown in Figures 6F to 61, the deep etching of the substrate of interest 100 can be carried out after step e), from the back face of the substrate of interest 100. A hard mask will be previously deposited on the back face of the substrate of interest 100 ([Fig.6G]), before or after bonding with the temporary substrate 400.
[0095] At the end of the etching step, the chips 150 are held in place by bonding with the temporary substrate 400 ([Fig. 6H]). No adhesive is required during this step, thus requiring less complex equipment and simplifying the process.
[0096] Once the etching is completed, the hard mask is removed. Then, the back face of the substrate of interest 100 is fixed onto a device 500 comprising an adhesive film 510 held by a metallic frame 520, then the temporary substrate 400 is peeled off to obtain the chips of interest ([Fig.61]).
[0097] It is possible to combine the last two variants by first performing a deep etch on the front face of the support substrate 110, cleverly using layer 220 as a hard mask. Since this is a partial etch, the adhesive film 510 is not needed. Next, the substrate 400 is bonded to the temporary substrate, and the back face of the support substrate 110 can be thinned using the same deep etch technique with a hard mask applied, or the entire surface can be etched. This latter option involves thinning the chips until they reach the first partial deep etch. Then, the support substrate 110 is bonded to the adhesive film 510, and the temporary substrate 400 is removed.
[0098] According to a third embodiment, not shown, the cutting is carried out mechanically, in particular by means of a saw.
[0099] The substrate of interest 100 can be cut before or after bonding with the temporary substrate 400.
[0100] When the substrate 100 is cut before bonding with the temporary substrate 400, it is first attached to a device 500 comprising an adhesive film held by a rim, and then sawn to obtain the chips of interest 150. The chips 150 are then glued to the temporary substrate, then the latter is peeled off in order to remove the protective layer 220 and obtain the chips of interest 150.
[0101] When the substrate 100 is cut after being bonded to the temporary substrate 400, care must be taken not to cut the temporary substrate 400 or a very thin layer of it, so as not to weaken it and maintain functional detachment. This embodiment is particularly advantageous because not only does it allow for cutting without the use of adhesive film, but also, the future front face of the chips of interest 150 will not be affected at all by possible particulate contamination of the cut because the protective adhesive is in place. After cutting, the back face of the substrate of interest 100 is positioned on an adhesive film held in place by a border, and the temporary substrate 400 is detached. The chips of interest 150 are thus obtained.
[0102] It is also possible to cut the substrate by implementing a cleavage. The cleavage can be initiated by making a notch in the substrate, for example, using a diamond point.
[0103] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.
[0104] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.
[0105] Illustrative and non-limiting examples of different embodiments
[0106] Example 1:
[0107] On a silicon wafer of interest, copper pads measuring 2 µm on a side are fabricated in a SiO2 matrix using a Damascus process. This wafer undergoes a chemical-mechanical polishing process to make it compatible with a direct bonding method. A SOI-type transfer substrate is used. It comprises a 205 nm silicon film on a 400 nm oxide layer. It is trimmed with a diamond saw to a depth of 250 µm and a width of 1.5 mm. The surface of the transfer substrate is cleaned to make it compatible with a hydrophilic direct bonding method.
[0108] The substrate of interest and the transfer substrate are joined by direct bonding.
[0109] The transfer substrate is thinned to 50 µm, and the remaining silicon is removed by SF6-based plasma etching. The etching stops at the 400 nm oxide layer. Alternatively, the silicon can be etched using an aqueous HF / HNO3 solution. Finally, the SiO2 layer is removed by HF-based wet etching.
[0110] A photolithography / etching step is carried out on this structure in order to obtain pads 50 µm thick and 10 mm on each side.
[0111] This structure is glued onto a temporary substrate 400 covered with an adhesive film. For example, this is an adhesive film marketed by Furukawa® under the reference SP5207M-425. It comprises an adhesive layer of 5 µm.
[0112] The rear face of the substrate of interest is placed on a suction table. By inserting a corner into the bond, the assembly is disassembled. The opening separates the interface between the substrate of interest and the silicon film of the temporary substrate. This results in a surface of copper pads measuring 2 µm on each side, on a square step measuring 10 mm on each side and 50 µm deep, directly compatible with a direct bonding process.
[0113] Example 2:
[0114] On a silicon wafer of interest, copper pads measuring 2 µm on a side are fabricated in a SiO2 matrix using a Damascus process. This wafer undergoes a chemical-mechanical polishing process to make it compatible with a direct bonding method. A SOI-type transfer substrate comprises a 205 nm silicon film on a 400 nm oxide layer. This substrate is trimmed with a diamond saw to a depth of 250 µm and a width of 1.5 mm. The surface of the transfer substrate is cleaned using an HF-based deoxidizing treatment to prepare for hydrophobic direct bonding.
[0115] The substrate of interest and the transfer substrate are joined by direct bonding.
[0116] The transfer substrate is thinned to 50 µm, and the remaining silicon is removed by SF6-based plasma etching, which stops at the 400 nm oxide layer. Alternatively, the silicon can be etched using an aqueous HF / HNO3 solution. Finally, the SiO2 layer is removed by HF-based wet etching.
[0117] A photolithography / etching step is carried out on this structure in order to obtain 50 µm thick pads with a side length of 10 mm.
[0118] This structure is bonded to a temporary substrate comprising an adhesive such as an adhesive film marketed by Furukawa® under the reference SP5207M-425. The adhesive film is 5 µm thick. The back face of the substrate of interest is then placed on a vacuum table. By inserting a corner into the bond, the assembly is disassembled. The opening separates the interface between the substrate of interest and the silicon film. This results in a surface of copper pads 2 µm on each side on a square step 10 mm on each side and 50 µm deep, directly compatible with a direct bonding process.
[0119] Example 3:
[0120] On a silicon wafer of interest, copper pads measuring 2 pm on a side are produced in a SiO2 matrix using a Damascus process. This wafer undergoes a process The material is chemically polished to make it compatible with a direct bonding process. A 1 µm layer of SiO2 is deposited onto a temporary silicon substrate using chemical vapor deposition. This plate is then trimmed with a diamond saw to a depth of 250 µm and a width of 1.5 mm. The surface of the transfer substrate is then cleaned and chemically polished.
[0121] The substrate of interest and the transfer substrate are joined by direct bonding. Slt is then thinned to 50 µm and the remaining silicon is removed by SF6 plasma etching which stops at the 1 µm oxide layer.
[0122] A photolithography / etching step is carried out on this structure in order to obtain 50 µm thick pads with a side of 10 mm.
[0123] This structure is bonded to a temporary substrate comprising a glass plate on which 10 µm of commercially available adhesive, LC5200, has been spread. The bonding is carried out at room temperature by UV exposure. The back face of the substrate of interest is then placed on a vacuum table. By inserting a corner into the bond, the assembly is disassembled. The opening separates the interface between the substrate of interest and the oxide film of the transfer substrate. This results in a surface of copper pads measuring 2 µm on each side, on a square step measuring 10 mm on each side and 50 µm deep, directly compatible with a direct bonding process.
[0124] Example 4:
[0125] On a silicon wafer of interest, copper pads measuring 2 µm on a side are formed in a SiO2 matrix using a Damascus process. This wafer undergoes a chemical-mechanical polishing process to make it compatible with a direct bonding process. On a silicon transfer substrate, 1 µm of SiO2 is deposited by chemical vapor deposition. This wafer is then trimmed with a diamond saw to a depth of 250 µm and a width of 1.5 mm. The surface of the transfer substrate is cleaned, followed by chemical-mechanical polishing.
[0126] The substrate of interest and the temporary substrate are joined by direct bonding. The transfer substrate is then thinned to 50 µm and the remaining silicon is removed by SF6 plasma etching which stops at the 1 µm oxide layer.
[0127] Using a resin commercially available under the reference TOK® TDMR with a thickness of Ipm, a photolithography / etching step is performed on the structure to obtain 50 µm thick pads with a side length of 10 mm. After etching, the resin is not removed using conventional plasma etching techniques combined with wet cleaning.
[0128] This structure is bonded to a temporary substrate comprising a glass plate on which 10 µm of commercially available adhesive, LC5200, has been spread. The bonding is carried out at room temperature by UV exposure. The structure is placed On a vacuum table: the back face of the substrate of interest is vacuumed. By inserting a corner into the bond, the assembly is disassembled. The opening separates the interface between the substrate of interest and the oxide film from the transfer substrate. This results in a surface of copper pads measuring 2 µm on each side, on a square step measuring 10 mm on each side and 50 µm deep, directly compatible with a direct bonding process.
Claims
Demands
1. A method for preparing a structured substrate of interest (100) for direct bonding comprising the following steps: a) providing a substrate of interest (100) comprising a support substrate (110) and a thin layer (120), b) bonding a protective layer (220) to the thin layer (120) by direct bonding, c) depositing a resin (300) onto the protective layer (220) and forming openings in the resin (300), d) etching the protective layer (220), the thin layer (120), and a portion of the thickness of the support substrate (110) through the openings in the resin, so as to form bumps (135) in the substrate of interest (100), e) bonding a temporary substrate (400) to the substrate of interest (100), f) separating the temporary substrate (400) from the substrate of interest (100), thereby separating the protective layer (220). of the substrate of interest (100) and we obtain a substrate of interest (100) structured for direct bonding,a process wherein either the resin (300) is removed between step d) and step e) and the adhesion energy between the protective layer (220) and the thin film (120) is less than the adhesion energy between the temporary substrate (400) and the protective layer (220), or the resin (300) is removed during step f) and the adhesion energy between the protective layer (220) and the thin film (120) is less than the adhesion energy between the resin (300) and the protective layer (220).
2. Method according to claim 1, characterized in that step b) is carried out by gluing a transfer substrate (200) comprising a support substrate (210) and the protective layer (220) onto the substrate of interest (100), and then removing the support substrate (210).
3. A method according to any one of claims 1 and 2, characterized in that the thin film (120) is a Cu / SiO2 hybrid film comprising a silicon oxide thin film in which copper pads are formed.
4. A method according to any one of the preceding claims, characterized in that the protective layer (220) is made of SiO2.
5. A method according to any one of the preceding claims, characterized in that the adhesion energy between the protective layer (220) and the thin layer (120) is less than 0.5 J / m2 than the adhesion energy between the temporary substrate (400) and the protective layer (220), or in that the adhesion energy between the protective layer (220) and the thin layer (120) is less than 0.5 J / m2 than the adhesion energy between the resin (300) and the protective layer (220).
6. A process according to any one of the preceding claims, characterized in that the steps of the process are carried out at a temperature less than or equal to 150°C.
7. A method according to any one of the preceding claims, characterized in that the method comprises a singularization step during which the substrate of interest (100) is separated into several parts, at the level of cutting paths positioned between the pads (135), in order to form chips of interest (150), the singularization step being preferably carried out by means of a laser irradiation step, a plasma etching step or a saw cutting step.
8. A method according to claim 7, characterized in that the laser irradiation step is carried out, between step d) and step e) or between step e) and step f), the laser irradiation leading to the formation of embrittled areas (140) at the level of the cutting paths, and in that the substrate of interest (100) is glued onto a stretchable adhesive film (510), the stretchable adhesive film (510) being stretched, after the laser irradiation step, so as to separate the chips of interest (150) at the level of the embrittled areas (140).
9. A method according to claim 7, characterized in that the plasma etching step is carried out, between step d) and step e), the substrate of interest (100) being glued onto an adhesive film (510) during the plasma etching step and during steps e) and f).
10. A method according to claim 7, characterized in that the plasma etching step is carried out between step e) and step f), the substrate of interest (100) being glued onto an adhesive film (510) during step f).