Non-volatile memory device and method for simultaneously reading two memory banks

FR3168685A1Pending Publication Date: 2026-05-22STMICROELECTRONICS INT NV
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Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
STMICROELECTRONICS INT NV
Filing Date
2024-11-15
Publication Date
2026-05-22
Patent Text Reader

Abstract

A memory device comprising a memory interface (2) configured to receive instructions from a host device (30) and an NVM controller (5) connected to at least two memory banks (3, 4) storing data (20, 21). The NVM controller is configured to receive a first command (READ 1) to read a data unit (20, 21), the command (READ 1) indicating a first memory address for reading, and in response to the command (READ 1): - simultaneously read a data unit (20) from a memory bank address in the first bank corresponding to the first memory address for reading and a data unit (21) from the same memory bank address in the second bank, - transmit the read data unit (20) to the memory interface and store the data unit (21) in a data register (8). Figure for the abstract: Fig 1.
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