Manufacturing process for a string of photovoltaic cells

Abstract

Method for manufacturing a photovoltaic cell string. A method for manufacturing a photovoltaic string, comprising the following steps: (a) providing an assembly of subcells (10) arranged in tiles along parallel tiling lines (11), the subcells being connected in series, (b) cutting the assembly perpendicular to the tiling lines (11) to obtain several strips (20) of subcells arranged in tiles, (c) connecting the resulting strips (20) of subcells together. Figure for the abstract: Fig. 1a

Description

Title of the invention: Method for manufacturing a string of photovoltaic cells. Technical field

[0001] The present invention relates to the manufacture of photovoltaic cell strings for forming photovoltaic modules. It applies in particular to photovoltaic cell strings resulting from the assembly of photovoltaic subcells obtained from wafers of semiconductor material, for example crystalline silicon, and more particularly aims at a method for enabling the manufacture of photovoltaic strings with several subcell strips. Previous technique

[0002] Typically, a photovoltaic cell comprises a wafer, commonly referred to as a "wafer" in English, which has a rectangular, thin shape. The wafer is composed of a semiconductor material, generally silicon.

[0003] For certain applications, it may be necessary to divide such a plate into several sub-cells.

[0004] A particular application relates to the manufacture of photovoltaic cells according to a specific shingling arrangement, of the type described, for example, in US patent 2017 / 0077343°A1. In such an arrangement, subcells are superimposed so as to partially overlap each other, which ensures both a mechanical and an electrical connection from one subcell to another at the points of partial overlap. This shingling assembly method reduces resistive losses and increases the power output of the photovoltaic module in which the photovoltaic cells are placed.

[0005] Subcells are typically obtained by cutting a wafer on which their constituent elements have been at least partially produced, and preferably once their constituent elements have been fully manufactured. This does not require modifying an entire cell manufacturing line, but only one or more additional steps, which offers a significant advantage in terms of manufacturing cost.

[0006] However, such tiled photovoltaic cells may present handling difficulties due to the small size of the sub-cells.

[0007] There is therefore a need to further improve photovoltaic cells, both in terms of their handling and their performance, in particular to allow their use in a high-voltage photovoltaic module.

[0008] The present invention aims to meet this need. Description of the invention

[0009] The invention thus relates, according to one of its aspects, to a method for manufacturing a photovoltaic chain, comprising the following steps: (a) provide an assembly of subcells arranged in tiles along parallel tiling lines, the subcells being connected to each other in series, (b) cut the assembly perpendicular to the tiling lines to obtain several strips of subcells arranged in tiles, (c) connect the resulting sub-cell strips together.

[0010] A photovoltaic chain results from the assembly of photovoltaic subcells, obtained from one or more wafers of semiconductor material, for example crystalline silicon. A photovoltaic chain is formed by the plurality of subcell strips connected together in series, the subcell strips being notably connected in series or in parallel.

[0011] A photovoltaic module can be formed from a plurality of sub-cells connected together, forming photovoltaic chains and generally encapsulated between two protective layers.

[0012] Steps (a), (b) and (c) can take place in the order indicated. In particular, cutting step (b) can be carried out after step (a).

[0013] Cutting the assembly makes it possible to obtain at least two strips of sub-cells. Thus, the initial assembly is cut twice: first, before tiling, to form the sub-cells to be tiled, and second, after tiling, to form the strips of sub-cells to be connected. The process according to the invention includes a cutting step (b) after tiling.

[0014] Implementing the cutting of sub-cell strips after tiling allows for the handling of sub-cell strips, each containing a plurality of sub-cells assembled by tiling, in other words, larger than single sub-cells. This facilitates handling and improves manufacturing quality.

[0015] In step (b), the cut is made perpendicular to the tiling lines, that is, perpendicular to the boundary between two sub-cells.

[0016] By 'tile line', we mean the longitudinal axis of overlap between two adjacent sub-cells arranged in tiles.

[0017] The sub-cell strips can be connected to each other in series or in parallel.

[0018] The invention makes it possible to benefit from strings of photovoltaic cells that can be used in high-voltage photovoltaic modules.

[0019] Indeed, one benefits from the advantages of interconnection by tiling, which eliminates the spacing between cells or sub-cells and avoids the use of interconnecting ribbons. This reduces resistive losses and increases the output voltage of the corresponding photovoltaic module without increasing its size. In particular, the output voltage can be multiplied by the number of sub-cells arranged in tiles.

[0020] On the other hand, the presence of sub-cell strips connected together in series or in parallel allows more variation in the interconnections between sub-cell strips, which can allow the sub-cell strips to be individualized and make the photovoltaic module more resilient to shading.

[0021] In addition, the output voltage can be multiplied by the number of sub-cell bands.

[0022] A sub-cell strip can include, for example, between 2 and 200 sub-cells, or even between 3 and 100, or even between 4 and 80, for example between 5 and 70, for example 6 sub-cells or even, as a variant, 30 sub-cells.

[0023] High-voltage photovoltaic modules are advantageous for certain specific applications, for example, for certain terrestrial or extraterrestrial applications, such as embedded applications, particularly automotive or space applications, especially for applications where the size and / or weight of the module may be limited. High voltages can be obtained even on small module surfaces.

[0024] The subcells can be obtained by cutting a wafer. The term "wafer" refers to a thin, rectangular substrate made from a semiconductor material, generally silicon, and more specifically crystalline silicon. The wafer thickness can range from 100 to 400 pm, for example, approximately 180 pm.

[0025] The wafers may be of standard size or result from cutting standard-sized wafers. For example, the wafers may result from cutting a standard-sized wafer into 2, 3, 4, 6, or more pieces. A standard-sized wafer may be square or substantially square. It may have a side length selected from the following list, in millimeters (mm): 210, 200, 192, 166, 161.7, 158.75, 156.75, this list not being exhaustive.

[0026] Step (a) of supplying the assembly of sub-cells arranged in tiles along parallel tiling lines, the sub-cells being connected to each other in series, may include the following steps:

[0027] (al) provide a wafer of semiconductor material,

[0028] (a2) drawing parallel interconnecting conductive lines between each other,

[0029] (a3) ​​cut the sub-cells parallel to the conductive lines interconnection,

[0030] (a4) assemble the sub-cells into tiles.

[0031] Steps (a1a), (a2), (a3) ​​and (a4) can take place in the order indicated. Step (a3) ​​can take place after step (a2). Summary of the invention Guiding principles

[0032] The assembly may include several parallel interconnecting conductive lines, designed to allow the conduction of a photo-generated electric current in the semiconductor material. During the cutting step (b), the assembly may be cut perpendicular to the interconnecting conductive lines.

[0033] Each subcell may have an interconnecting conductive line on at least one of its faces. An interconnecting conductive line may be located on one side of a subcell, particularly a long side of the subcell, and extend parallel to an edge of the subcell. This interconnecting conductive line is configured to allow the electrical interconnection of the corresponding subcell with another subcell or subcells. An interconnecting conductive line may have a width between 50 µm and 500 µm, or even between 100 µm and 400 µm. It may be in continuous form (line) or discontinuous form (slots).

[0034] Each subcell may further include metallization fingers. By 'metallization finger', we mean conductive lines intended to conduct the photo-generated electric current in the semiconductor material to an interconnecting conductive line.

[0035] Conduction can be direct to an interconnecting conductive line, the metallizing fingers then being able to extend perpendicularly to the interconnecting conductive lines, or indirect, taking place by passing through a collection conductive line as described below, the metallizing fingers then being able to extend perpendicularly to the collection conductive lines and parallel to the interconnecting conductive lines.

[0036] A subcell can comprise a plurality of metallization fingers, for example, between 5 and 100, or even between 10 and 80, or even between 15 and 60, or for example between 20 and 40. A metallization finger can be spaced every 1 to 3 mm, or even every 2 mm. A metallization finger can have a width between 10 µm and 80 µm, or even between 15 µm and 50 µm, or even between 15 µm and 30 µm. A metallization finger can have a length of less than 4 cm, or even less than 3.5 cm, preferably less than 3 cm, for example, 2.6 cm. Thus, the distance the current must travel in a metallization finger is relatively short, which is advantageous given that the losses depend on the square of the distance.

[0037] Each subcell may further include collection conductive lines. By 'collection conductive lines', we mean conductive lines intended to conduct the photo-generated electric current in the semiconductor material from the metallization fingers to an interconnecting conductive line. The collection conductive lines may extend perpendicularly to the interconnecting conductive lines and perpendicularly to the metallization fingers. Each subcell may include collection conductive lines intended to conduct the photo-generated electric current in the semiconductor material to an interconnecting conductive line.

[0038] Conductive collection lines can be particularly useful when the subcell width is greater than 2 cm, or even greater than 3 cm. This configuration with conductive collection lines makes it possible to work with larger subcell widths without increasing resistive losses.

[0039] A sub-cell can include a plurality of collection conductor lines, for example between 2 and 20, or even between 3 and 17, or even between 4 and 15, for example between 5 and 12. We can for example have a collection conductor line every 4 cm, or even every 5 cm. Subcell bands

[0040] The subcells can be interconnected, for example, by bonding, particularly with an electrically conductive adhesive (ECA). Between two consecutive subcells, there is therefore a portion comprising two layers of semiconductor material and one layer of adhesive, for example, ECA. Alternatively, the subcells can be interconnected, for example, by soldering or by using flexible connectors.

[0041] The sub-cell cutting can be carried out by at least one of the cutting processes in the following non-limiting list: LSMC (Laser scribe and mechanical clearing), TLS (Thermal laser separation), cutting by mechanical cleavage on wafers oriented at 45° (also called in English '45° tilted Silicon wafer s').

[0042] The cutting (b) of the assembly into strips of sub-cells can be carried out by at least one of the cutting processes in the following non-limiting list: LSMC (Laser scribe and mechanical cleaving), TLS (Thermal laser separation), mechanical cleaving on 45° oriented wafers (also called '45° tilted Silicon wafers').

[0043] A cutting process, particularly laser cutting, can be used to adapt to the tile-like arrangement of the sub-cells. The cutting process can also be adapted to the photovoltaic cell technology. The characteristics of the laser used can also be adapted. It can be chosen to minimize the engraved areas and limit the resulting performance degradation of the photovoltaic cells.

[0044] The metallization of the assembly or sub-cells can also be adapted. In particular, the interconnection and / or collection conductive lines can be formed while avoiding any metallization in the cut areas. The application of any electrically conductive adhesive in the cut areas can also be avoided.

[0045] In the LSMC (Laser scribe and mechanical cleaving) process, a leader can be made on the rear face, followed by cutting and the cleaving step on the front face. A leader can also be made on the face opposite the cell emitter, generally on the rear face. The aim is to limit the engraving on the emitter side, therefore on the rear face if the emitter is located there. In one embodiment, the width of the leader can be greater than or equal to the overlap width between tiled sub-cells. Alternatively, the widths of the leaders can be thinner.

[0046] In the TLS (Thermal Laser Separation) process, a slit can be made on the back face, then a slit on the front face, and finally the separation on the front face. In this cutting process, a continuous line is not cut. The slit propagates along a line due to thermomechanical stresses. In one embodiment, the width of the slit can be greater than or equal to the overlap width between tiled sub-cells. Alternatively, the widths of the slits can be narrower.

[0047] In the mechanical cleavage process (also called '45° tilted silicon wafers'), a cleavage plane can be formed on the back face, followed by cleavage on the back face. The separation results from the mechanical stresses exerted on each side during the cleavage. The cleavage plane can propagate due to a particular crystal orientation in the assembly. Primer

[0048] The cutting step (b) of the cell strip assembly may include the formation of a leader. By 'leader' is meant the creation of a recessed line, localized or continuous. The leader may be localized or continuous.

[0049] The initiator can be located on the rear face or, alternatively or additionally, on the front face. 'Front face' means the face of the photovoltaic cell intended to be exposed to light to receive photons. 'Rear face' means the face opposite the front face.

[0050] In the case where the emitter is located on the rear face, the front face is the non-emitting side of the photovoltaic cell. The rear face is the emitting side of the photovoltaic cell.

[0051] In the case where the emitter is located on the front face, the rear face is the non-emitting side of the photovoltaic cell. The front face is the emitting side of the photovoltaic cell.

[0052] In most cases, this primer will be made on the opposite side to the cell emitter, therefore classically on the rear side.

[0053] The priming can be carried out on the portion of the assembly having a double thickness, resulting from the tiling of the sub-cells.

[0054] The primer can have a depth greater than 10 pm, or even greater than 20 pm, or even greater than 30 pm. The width of the primer can be between 5 pm and 50 pm, or even between 10 pm and 30 pm.

[0055] The primer may have, particularly for the LSMC and TLS processes, a length of between 0.8 and 1.5 mm. The primer may have, particularly for the mechanical cleaving process, a length of between 100 µm and 1 mm, or even between 200 µm and 800 µm.

[0056] The primer can be formed on the edge of a subcell. Thus, a primer is generally formed at a point where the assembly is thicker, in a portion of the assembly comprising two layers of semiconductor material and one layer of adhesive. In particular, a plurality of primers can be formed on the edge of each subcell. The formed primers can be aligned with each other, for example, along a priming line.

[0057] The primer(s) may be formed on the rear face. In one embodiment, the primer(s) are preferably formed on the rear face, and the cutout is formed on the front face, which is the non-emitting side. This avoids forming the largest cutout on the emitting side. In an embodiment with primers formed successively on both sides, the first primers are formed on the rear face, and the second primers are formed on the front face.

[0058] The step of cutting (b) the assembly into strips of cells may include the application of a constraint, in particular a constraint applied uniformly over the whole assembly. Subcell

[0059] A P / S ratio of a subcell may be less than 2 cm-1, or even less than 1.8 cm-1, or even less than 1.6 cm-1, better less than 1.4 cm-1, being in particular less than 1.2 or 1 cm-1, where P is the perimeter of the subcell and S the area of ​​the subcell.

[0060] A P / S ratio of each sub-cell of the photovoltaic chain can be less than 2 cm-1, or even less than 1.8 cm-1, or even less than 1.6 cm-1, better less than 1.4 cm-1, being in particular less than 1.2 or 1 cm-1, where P is the perimeter of the sub-cell and S the area of ​​the sub-cell.

[0061] A low P / S ratio ensures that the subcells have a relatively square shape rather than a very oblong one. This advantageously reduces the depassivated edge surfaces, resulting in improved efficiency. Edge passivation techniques can also be used as a complement. Photovoltaic chain

[0062] The invention further relates, independently or in combination with the above, to a photovoltaic chain comprising a plurality of sub-cells arranged in tiles, a P / S ratio of a sub-cell being less than 2 cm-1, or even less than 1.8 cm-1, or even less than 1.6 cm-1, better less than 1.4 cm-1, being in particular less than 1.2 or 1 cm-1, where P is the perimeter of the sub-cell and S the area of ​​the sub-cell.

[0063] A P / S ratio of each sub-cell of the photovoltaic chain can be less than 2 cm-1, or even less than 1.8 cm-1, or even less than 1.6 cm-1, better less than 1.4 cm-1, being in particular less than 1.2 or 1 cm-1, where P is the perimeter of the sub-cell and S the area of ​​the sub-cell.

[0064] A low P / S ratio ensures that the subcells have a relatively square shape rather than a very oblong one. This advantageously reduces the non-passivated edge surfaces, resulting in improved efficiency.

[0065] The photovoltaic string may comprise at least two strips of subcells connected together. Thanks to the subcell strips, handling during manufacturing is facilitated.

[0066] The photovoltaic chain, sub-cells and sub-cell strips may include all or part of the characteristics described above.

[0067] The photovoltaic chain can be manufactured using the process described above.

[0068] The invention relates to any type of photovoltaic cell, such as, for example, crystalline silicon cell, heterojunction cell, TOPCon cell, multijunction structure cell, Perovskite / silicon tandem cell, this list not being limiting.

[0069] The invention also relates, independently or in combination with the above, to a photovoltaic module comprising photovoltaic strings, sub-cells and / or sub-cell strips as described above. Brief description of the drawings

[0070] The invention will be better understood upon reading the detailed description that follows, the non-limiting examples of embodiments thereof, and upon examination of the accompanying drawing, on which:

[0071] [Fig.la] Fig.la is a schematic and partial top view of a photovoltaic module comprising photovoltaic strings and photovoltaic subcells according to the invention.

[0072] [Fig.lb] The [Fig.lb] illustrates a sub-cell of the module of the [Fig.la].

[0073] [Fig. 2a] Fig. 2a is a schematic and partial top view of a module photovoltaic comprising photovoltaic strings and photovoltaic subcells according to the invention.

[0074] [Fig. 2b] Figure 2b illustrates the fabrication of sub-cell strips of the module [Fig.2a].

[0075] [Fig.3] Fig.3 illustrates the manufacturing process according to the invention.

[0076] [Fig.4] Fig.4 illustrates the conductive lines of a subcell.

[0077] [Fig.5a] Fig.5a illustrates the production of primers.

[0078] [Fig.5b] Fig.5b illustrates a variant of primer embodiment.

[0079] [Fig.6a] Fig.6a illustrates a variant implementation of the cutting step.

[0080] [Fig.6b] Fig.6b illustrates another variant of the cutting step.

[0081] [Fig.6c] Fig.6c illustrates another variant of the cutting step. Detailed description

[0082] Figure [Fig. 1a] illustrates a photovoltaic module 1 produced using the manufacturing process of the invention.

[0083] The photovoltaic module comprises an assembly of photovoltaic subcells 10 arranged in tiles along parallel tiling lines 11, the subcells being connected in series. A photovoltaic subcell 10 is shown in isolation in [Fig. 1b], the subcells being formed from a wafer of semiconductor material.

[0084] The assembly comprises several 12 parallel interconnecting conductive lines intended to allow the conduction of a photo-generated electric current in the semiconductor material.

[0085] The assembly was cut perpendicular to the tiling lines 11 to obtain several strips of sub-cells 20 arranged in tiles, then the strips of sub-cells 20 obtained were connected together, by means of connectors 25. The manipulation of the strips 20 of sub-cells assembled by tiling makes it possible to handle a reduced number of sub-cells during tiling, thus facilitating the execution of this step.

[0086] We can see in [Fig.la] that the presence of 20 bands of sub-cells connected together allows for more interconnections between bands of sub-cells, which can make the photovoltaic module more resilient to shading.

[0087] In addition, the output voltage can be multiplied by the number of sub-cell bands.

[0088] A sub-cell strip may include, for example, 15 sub-cells, as illustrated in [Fig.1a], or alternatively 30 sub-cells, as illustrated in the embodiment of Figures 2a and 2b.

[0089] In the method according to the invention, illustrated in [Fig. 3], in step (a) an assembly of subcells 10 arranged in tiles along parallel tiling lines 11 is provided, the subcells being connected in series. The assembly includes several parallel interconnecting conductive lines 12, intended to allow the conduction of a photo-generated electric current in the semiconductor material. Next, in step (b), the assembly is cut perpendicular to the tiling lines 11 to obtain two strips 20 of subcells arranged in tiles, and then, in step (c), the resulting strips of subcells are connected together.

[0090] Furthermore, a P / S ratio of a subcell 10 can be less than 1 cm-1, being for example in the example illustrated in [Fig.lb] of the order of 0.66 cm-1. P is the perimeter of the subcell and S the area of ​​the subcell 10. In this example, a length L of the subcell is 7.2 cm and a width 1 of the subcell is 5.2 cm.

[0091] Furthermore, the subcell 10 illustrated in [Fig. 1b] has a single interconnecting conductor line 12, which is disposed on one long side of the subcell 10 and extends parallel to an edge of the subcell, as illustrated in [Fig. 1b] or [Fig. 4]. The interconnecting conductor line 12, called a 'bus bar', is configured to allow the electrical interconnection of the corresponding subcell 10 with the other subcells.

[0092] Furthermore, each sub-cell 10 includes metallization fingers not visible in figures 1a to 3, intended to conduct the photo-generated electric current in the semiconductor material towards the interconnecting conductive lines 12, the metallization fingers extending perpendicularly to the conductive lines interconnection 12. The sub-cell 10 thus comprises a plurality of metallization fingers.

[0093] In the variant of [Fig.4], each subcell 10 has collection conductive lines 14, intended to conduct the photo-generated electric current in the semiconductor material from metallization fingers 16 to the interconnecting conductive line 12, which extend perpendicularly to the interconnecting conductive line 12. In this example, the subcell 10 has four collection conductive lines 14.

[0094] The metallization fingers 16, intended to conduct the photo-generated electric current in the semiconductor material to the collection conductive lines 14, extend perpendicularly to the collection conductive lines and parallel to the interconnecting conductive lines 12. The subcell 10 here comprises a plurality of metallization fingers. In this example, a metallization finger has a length of approximately 2.6 cm.

[0095] The tiled subcells are held together by bonding with an electrically conductive adhesive (ECA). Between two consecutive subcells, there is therefore a portion comprising two layers of semiconductor material and one layer of adhesive. Alternatively, the subcells can be interconnected, for example, by welding or by using flexible connectors.

[0096] The cutting of the sub-cells 10 can be carried out by at least one of the cutting processes from the following list, which is not exhaustive: LSMC, TLS, mechanical cleavage cutting of 45° oriented wafers.

[0097] The metallization of the assembly or sub-cells can also be adapted. In particular, the interconnecting conductive lines 12 and / or collection lines 14 can be formed while avoiding any metallization in the areas to be subsequently cut. The deposition of electrically conductive adhesive in the areas to be subsequently cut can also be avoided.

[0098] The cutting in step (b) of the assembly into strips 20 of subcells can be carried out by at least one of the cutting processes from the following list, which is not limiting: LSMC, TLS, mechanical cleaving.

[0099] The cutting step (b) of the sub-cell strip assembly generally involves the formation of a leader A. The leader is a recessed line, either localized or continuous. The leader A can be localized, as illustrated in [Fig. 5a], or continuous, as illustrated in [Fig. 5b]. The leader A is most often formed on the portion of the assembly with a double thickness, resulting from the overlapping of the sub-cells, being formed on the edge of the sub-cell. The leader can be formed on the back face or, alternatively or additionally, on the front face. In particular, a plurality of leaders A can be formed on the edge of each sub-cell 10. The leaders made can be aligned with each other, for example along a priming line, as illustrated in [Fig.5a].

[0100] Figure 6a illustrates the laser engraving and mechanical cleavage (LSMC) process, in which first primers A are made on the rear face AR, then a cut and the cleaving step is performed on the front face AV.

[0101] Figure 6b illustrates the thermal laser separation process, in which first nuclei A are formed on the rear face AR, then nuclei on the front face AV, and finally the separation is performed on the front face AV. In this cutting process, a continuous line is not achieved. The nucleus propagates along a line due to thermomechanical stresses.

[0102] Figure 6c illustrates the mechanical cleavage cutting process, in which initiators A are first produced on the rear face AR, followed by cleavage on the rear face AR. The separation results from the mechanical stresses exerted on each side during the cleavage. The initiator can propagate due to a particular crystalline orientation in the assembly.

[0103] The step of cutting (b) the assembly into strips of sub-cells involves the application of a constraint, in particular a constraint applied uniformly over the whole assembly.

[0104] Figures 5a to 6c illustrate non-limiting examples of primers depending on the cutting process used. Of course, the primers can be made differently without departing from the scope of the present invention. The primers can be continuous or discontinuous, and different on the front and back faces.

Claims

Demands

1. A method for manufacturing a photovoltaic chain, comprising the following steps: (a) providing an assembly of subcells (10) arranged in tiles along parallel tiling lines (11), the subcells being connected together in series, (b) cutting the assembly perpendicular to the tiling lines (11) to obtain several strips (20) of subcells arranged in tiles, (c) connecting together the strips (20) of subcells obtained.

2. Method according to the preceding claim, the assembly comprising several parallel interconnecting conductive lines (12) intended to allow the conduction of a photo-generated electric current in the semiconductor material, in particular each sub-cell (10) comprising an interconnecting conductive line (12) on at least one of its faces.

3. Method according to the preceding claim, each subcell (10) comprising metallization fingers (16), intended to conduct the photo-generated electric current in the semiconductor material to an interconnecting conductive line (12).

4. A method according to any one of the preceding claims, the subcells (10) being held together by gluing, in particular by an electrically conductive adhesive (ECA).

5. A method according to any one of the preceding claims, the cutting (b) of the assembly into strips (20) of subcells being carried out by at least one of the cutting methods from the following list: LSMC (Laser scribe and mechanical clearing), TLS (Thermal laser separation), mechanical cleaving of 45° tilted Silicon wafers.

6. Method according to any one of the preceding claims, the cutting step (b) of the strip assembly (20) of subcells comprising the formation of a primer.

7. Method according to the preceding claim, the primer (A) having a depth greater than 10 pm, or even greater than 20 pm, or even greater than 30 pm.

8. A method according to one of the two preceding claims, the primer (A) being formed on the edge of a subcell (10).

9. Method according to any one of the three preceding claims, the primer(s) (A) being formed on the rear face side (AR).

10. A method according to any one of the preceding claims, the step of cutting (b) the assembly into strips (20) of cells comprising the application of a stress, in particular a stress applied uniformly over the whole assembly.

11. A method according to any one of the preceding claims, a P / S ratio of a subcell (10) being less than 2 cm-1, or even less than 1.8 cm-1, or even less than 1.6 cm-1, better less than 1.4 cm-1, where P is the perimeter of the subcell and S is the area of ​​the subcell.

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