Current detection circuit and overcurrent protection device

Abstract

Current Detection Circuit and Overcurrent Protection Device This description relates to a current detection circuit (100) comprising at least several pairs of first and second field-effect transistors (102.1 – 102.m, 104.1 – 104.m) such that: - a first of the source or drain electrodes of each of the first and second transistors is coupled to an input (106) of the current detection circuit to which a current to be detected is intended to be applied; - for each pair of one of the first transistors and one of the second transistors, the dimension ratio W1 / L1 of the first transistor is greater than the dimension ratio W2 / L2 of the second transistor, with W1 and W2 corresponding to the widths of the active areas of the first and second transistors, and L1 and L2 corresponding to the lengths of the active areas of the first and second transistors. Figure for the abstract: Fig. 1

Description

Title of the invention: Current detection circuit and overcurrent protection device. Technical field

[0001] This description relates generally to the fields of current detection and overcurrent protection, applied for example to the protection of connection interfaces. Previous technique

[0002] Certain connection interfaces such as USB (“Universal Serial Bus”) interfaces, in particular USB-C, or HDMI (“High-Definition Multimedia Interface”) or DP (“Display Port”), are protected against possible overcurrents by an OCP (“Over-Current Protection”) protection device.

[0003] Such a protective device is generally interposed between a load, for example the computer including the connection interface equipped with the protective device, and a cable with a plug connected to the connection interface. The other end of the cable is connected to electronic elements and components that can be considered as a power supply.

[0004] The protection device includes a switch for interrupting the electrical connection between the power supply and the load in the event of an overcurrent on the electrical connection, caused, for example, by an overload or a short circuit. The protection device includes a current detection circuit designed to generate, from a current flowing between the power supply and the load, an electrical voltage proportional to that current. To this end, the current detection circuit is configured to generate a fraction of a load current Iout sent to the load, that is, to generate a current Iout / N, where N is a real number greater than 1, and to convert this current Iout / N into a voltage.The current detection circuit then outputs a control signal which is sent to the input of a switch control circuit. The value of this signal, which is a function of the voltage obtained, controls whether or not the electrical connection between the power supply and the load is interrupted, depending on the voltage value.

[0005] The current detection circuit includes a current detection block configured to extract the current 1 out / N from the current received from the power supply and send it to a specific branch of the block. The current detection block also includes a current conversion element 1 out / N in voltage, this conversion element corresponding for example to an electrical resistance.

[0006] The current detection block comprises a SenseFET (Sense Field-Effect Transistor) architecture consisting of matched first and second MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) of different dimensions. These dimensions are such that the W / L ratio of the first transistor is equal to N and that of the second transistor is equal to 1, where W and L correspond respectively to the width and length of the active region of the transistor in question. These dimension ratios allow the calculation of the load current Iout flowing through the first transistor and the current Iout / N flowing through the second transistor.Apart from this difference in dimensions, the first and second transistors are matched to each other ("matched transistors" in English), that is to say, they are made on the same substrate and have the same arrangement, or even "layout", of the different semiconductor regions so that their electrical behaviors are similar.

[0007] In such an architecture, the first and second transistors operate in the reverse ohmic region. Thus, when the device is OFF, a maximum voltage of approximately 0.6 V develops across the first and second transistors, i.e., the threshold voltage of the transistor's drain-source diode. With such operation, the voltage class of the first and second transistors can be lower than the input voltage, which significantly improves the matching between the first and second transistors because the matching error is proportional to the voltage class of a MOSFET transistor. The current detection block also includes a differential amplifier whose inputs are coupled to the first and second transistors and which has an offset current Ioffset added to the fraction of the current Iout / Net that forms an error term on the measured current.The offset current is such that 1 offset = Voffsetl(N.RONp), where RONp corresponds to the on-state resistance, or "reverse ohmic resistance", of the first transistor and V offset is the offset voltage of the amplifier. The offset current is therefore proportional to the maximum current limit of the first transistor.

[0008] One solution for modulating the error term as a function of the current limit is to modulate the gate-source voltage Vcs applied to the first and second transistors. Thus, when the maximum current is only slightly limited, the error term can also be reduced to maintain constant matching between the transistors, and therefore maintain constant detection accuracy while having a low Vcs voltage. However, in the presence of a high current, the term The error rate is also significant. However, adjusting the Vcs voltage requires costly analog components in terms of semiconductor surface area, such as a digital-to-analog converter. Furthermore, reducing the Ves voltage leads to a decrease in transistor matching, and therefore a decrease in the accuracy of the current detection. Summary of the invention

[0009] There is a need to propose a current detection circuit and an overcurrent protection device that does not have the disadvantages of known circuits and devices.

[0010] One embodiment overcomes all or part of the drawbacks of known solutions and proposes a current detection circuit comprising at least several pairs of first and second field-effect transistors such as: - a first of the source or drain electrodes of each of the first and second transistors is coupled to an input of the current detection circuit on which a current to be detected is intended to be applied; - for each pair of one of the first transistors and one of the second transistors, the dimension ratio IV / Æ / of the first transistor is greater than the dimension ratio IV 2 Æ 2 of the second transistor, with IV; and W 2 corresponding to the widths of the active areas of the first and second transistors, and L , and L 2 corresponding to the lengths of the active areas of the first and second transistors.

[0011] According to a particular embodiment, the current detection circuit comprises a first output coupled to a second of the source or drain electrodes of the first transistors and on which a load current 1 out is intended to be delivered, and a second output on which a voltage representing a fraction of the load current 1 out / N is intended to be delivered, with N = (IV i .L 2 ) / (L i .W2 )■

[0012] According to a particular embodiment, the current detection circuit further comprises a differential amplifier including a first input coupled to the second source or drain electrodes of the first transistors, and a second input coupled to the second source or drain electrodes of the second transistors.

[0013] According to a particular embodiment, the current detection circuit further comprises a third field-effect transistor including a gate coupled to an output of the differential amplifier, a first source or drain electrode coupled to the second source or drain electrodes of the second transistors, and a second source or drain electrode coupled to the second output of the current detection circuit.

[0014] According to a particular embodiment, the current detection circuit further includes an element for converting the fraction of the current of the load 1 out / N into the voltage representing the fraction of the current of the load 1 out / N.

[0015] According to a particular embodiment, the conversion element comprises at least one electrical resistance including a first electrode coupled to the second source or drain electrode of the third field-effect transistor, and a second electrode coupled to a reference electrical potential.

[0016] According to a particular embodiment, the current detection circuit comprises m pairs of first and second transistors, and further comprising a control logic circuit configured to receive a digital input value and to deliver on m outputs control voltages which are, together, representative of the digital input value, each of the m outputs being coupled to the gates of one of the m pairs of first and second transistors, with m an integer greater than or equal to 2.

[0017] According to a particular embodiment, the control logic circuit is configured to convert the thermometrically coded input digital value into control voltages.

[0018] According to a particular embodiment, the control logic circuit includes at least one charge pump circuit configured so that the maximum value of each of the control voltages delivered at the output is greater than the maximum value of each of the voltages corresponding to one of the bits of the digital input value.

[0019] According to a particular embodiment, the first and second transistors are of type N.

[0020] An overcurrent protection device is also proposed, comprising at least one current detection circuit according to a particular embodiment.

[0021] According to a particular embodiment, the current detection circuit includes the second output on which the voltage representing a fraction of the load current I out / N is intended to be delivered, and the device further includes a comparator comprising a first input coupled to the second output of the current detection circuit and a second input configured to receive a reference voltage.

[0022] According to a particular embodiment, the protection device further comprises a control circuit including an input coupled to an output of the comparator and an output on which a protection control signal is intended to be delivered.

[0023] According to a particular embodiment, the protection device further comprises a switch configured to connect or disconnect an input of the protection device to an output of the protection device and comprising a control input coupled to a switching control circuit, one input of which is coupled to the output of the control circuit and one output of which is coupled to a control input of the switch.

[0024] A connection interface is also proposed comprising at least one protection device according to a particular embodiment. Brief description of the drawings

[0025] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0026] - Fig. 1 represents an example of a current detection circuit according to a mode of particular realization;

[0027] - [Fig. 2] represents the value of the on-state resistance formed by the or the first transistors put into the conducting state and the value of the error term obtained as a function of the number of pairs of first and second transistors put into the conducting state in a current detection circuit according to a particular embodiment;

[0028] - [Fig. 3] represents active areas of transistors in a detection circuit current according to a particular embodiment;

[0029] - Figure 4 schematically represents part of a control logic circuit used in a current detection circuit according to a particular embodiment;

[0030] - [Fig. 5] schematically represents an example of the implementation of a circuit control logic used in a current detection circuit according to a particular embodiment;

[0031] - Figures [Fig. 6] and [Fig. 7] represent an example of an implementation of an interface Connection including an overcurrent protection device itself comprising a current detection circuit according to a particular embodiment. Description of embodiments

[0032] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0033] For the sake of clarity, only the steps and elements necessary for understanding the described embodiments have been shown and are detailed. In particular, various components (transistors, differential amplifier, control logic circuit, charge pump circuit, switching control circuit, etc.) are not detailed. A person skilled in the art will be able to implement these components in detail from the functional description provided below.

[0034] Unless otherwise specified, when referring to two interconnected elements, this means directly connected without any intervening elements other than conductors, and when referring to two elements linked or coupled, this means that these two elements can be connected or linked via one or more other elements. Furthermore, the terms "coupled," "linked," and "connected" are used here to denote electrical couplings, links, or connections.

[0035] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures in a normal position of use.

[0036] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0037] Similarly, unless otherwise indicated, the ranges of values ​​indicated include the bounds of these ranges.

[0038] An example of the embodiment of a current detection circuit 100 is described below in relation to [Fig.1].

[0039] The circuit 100 comprises several pairs, here m pairs, of first and second transistors, respectively referenced 102.1 to 102.m and 104.1 to 104.m, with m an integer greater than or equal to 2. The pairs of first and second transistors 102.1 -102.m and 104.1 - 104.m are coupled in parallel to each other, that is to say that the first transistors 102.1 - 102.m are coupled in parallel to each other, and the second transistors 104.1 - 104.m are coupled in parallel to each other.

[0040] For each pair of one of the first transistors 102.1 - 102.m and one of the second transistors 104.1 - 104.m, the dimension ratio Æ7 of the first transistor 102.i is greater than the dimension ratio IV2 Æ2 of the second transistor 104.i, with IVj and W2 corresponding to the widths of the active areas of the first and second transistors 102.i, 104.i, and L7 and L2 corresponding to the lengths of the active areas of the first and second transistors 102.i, 104.i, with i an integer between 1 and m. For example, the number m can be between 2 and 1000, and for example on the order of 100.

[0041] In addition to the specific dimension ratios indicated above, for each of the pairs of first and second transistors 102.1 - 102.m and 104.1 - 104.m, the first transistor 102.i is paired with the second transistor 104.i. Thus, for each of the pairs of first and second transistors 102.1 - 102.m and 104.1 - 104.m, the The first and second transistors 102.i, 104.i are made on the same portion of semiconductor and have a similar layout, but with different IV and L dimensions.

[0042] In the described embodiment, the first and second transistors 102.1 -102.m and 104.1 - 104.m are field-effect transistors, here N-type MOSFETs. However, it is conceivable that these transistors are P-type.

[0043] A first of the source or drain electrodes of each of the first and second transistors 102.1 - 102.m and 104.1 - 104.m is coupled to an input 106 of the circuit 100 to which a current to be detected is intended to be applied. In the described embodiment, the first and second transistors 102.1 - 102.m and 104.1 - 104.m being of type N, and because these transistors are intended to operate in reverse ohmic mode, the first of the source and drain electrodes of these transistors corresponds to the source electrode.

[0044] In the described embodiment, the circuit 100 includes a first output 108 coupled to a second of the source or drain electrodes of the first transistors 102.1 - 102.m (drain electrode in the described embodiment) and on which a load current 1 out is intended to be delivered. In addition, the circuit 100 includes a second output 110 on which a voltage representing a fraction of the load current 1 out / N is intended to be delivered, with N = (WLL2) / (LLW2).

[0045] In the described embodiment example, the circuit 100 further comprises a differential amplifier 112 including a first input, corresponding for example to its inverting input, coupled to the second source or drain electrodes of the first transistors 102.1 - 102.m and to the first output 108, and a second input (the non-inverting input in the described example) coupled to the second source or drain electrodes of the second transistors 104.1 - 104.m (drain electrode in the described embodiment example).

[0046] In the described embodiment example, the circuit 100 further comprises a third field-effect transistor 114, such as an N-type MOSFET, for example, comprising a gate coupled to an output of the differential amplifier 112, a first source or drain electrode (drain electrode in the described embodiment example) coupled to the second source or drain electrodes of the second transistors 104.1 - 104.m, and a second source or drain electrode (source electrode in the described embodiment example) coupled to the second output 110 of the circuit 100.

[0047] In the described embodiment, the circuit 100 further includes an element for converting the fraction of the load current I out / N into a voltage representing the fraction of the load current I out / N. In the example in [Fig. 1], the element of conversion includes at least one electrical resistance 116 comprising a first electrode coupled to the second source or drain electrode of the third MOS transistor 114, and a second electrode coupled to a reference electrical potential, for example the ground of the circuit 100.

[0048] In the described embodiment, the circuit further comprises a control logic circuit 118 configured to receive a digital input value which, in this example, can take m different values. The control logic circuit 118 is configured to deliver, on m outputs, m control voltages 0 / -0m which, together, represent the digital input value, each of the m outputs being coupled to the gates of one of the m pairs of first and second transistors 102.1 - 102.m and 104.1 - 104.m. According to a particular embodiment, the control logic circuit 118 is configured to convert the thermometrically encoded digital input value into m control voltages 01 -0m.

[0049] For example, the first transistors 102.1 - 102.m have identical electrical characteristics, and the second transistors 104.1 - 104.m have identical electrical characteristics. Thus, switching on each pair of first and second transistors has the same electrical impact in circuit 100. Figure 3 schematically represents identical active areas of four identical second transistors 104.1 - 104.4.

[0050] In circuit 100, a current is intended to be applied to input 106. The various pairs of first and second transistors connected in parallel with each other are digitally controlled via circuit 118 in order to adjust the value of the error term obtained, and thus to control the accuracy of the current detection performed by circuit 100. The number of pairs of first and second transistors put in the conducting state, and therefore the accuracy of the circuit, can be static parameters set when the assembly is powered on.Indeed, unlike a current detection circuit in which the value of the voltage Vcs applied to two transistors, one delivering the load current 1 out and the other delivering the fraction of the current 1 out / N, is adjusted in order to modulate the resistance in the on-state of the transistor delivering the load current 1 out, and therefore the error term present in the branch in which the fraction of the current I out / N is sent, the adjustment of the error term obtained in the fraction of the current Iout / N is here achieved by putting a greater or lesser number of pairs of first and second transistors into the on-state, the value of the voltage Vcs applied to the pairs of first and second transistors being unchanged.

[0051] Figure 2 represents the value of the on-state resistance formed by the first transistor(s) 102.1 - 102.m when switched on (curve 200) and the value of the error term obtained in the fraction of the current 1 out / N (curve 202) as a function of the number of pairs of first and second transistors switched on, and therefore of the digital input value received by the control logic circuit 118. In this example, curves 200 and 202 are each in the shape of a staircase and such that each change in value of each of them corresponds to switching on an additional pair of first and second transistors.

[0052] In such a circuit 100, the pairing between the first and second transistors 102.1 - 102.m and 104.1 - 104.m is therefore not degraded due to the adjustment of the voltage V Cs applied to the first and second 102.1 - 102.m and 104.1 - 104.m. Furthermore, the value of the on-state resistance RON obtained for the first transistors 102.1 - 102.m is adapted according to the current limiting level obtained, by choosing the number of pairs of first and second transistors in the on-state.

[0053] Circuit 100 also has the advantage of not using analog circuits for transistor control, such circuits requiring a large semiconductor surface.

[0054] Fig. 4 schematically represents part of the components of an example embodiment of the control logic circuit 118. In this example, the logic components of the circuit 118 are configured to convert digital input signals, whose voltage levels are for example on the order of 0 and 5V, into digital output signals whose voltage levels are higher than those of the input, for example on the order of 0 and 10V.

[0055] In the described embodiment, the control logic circuit 118 includes at least one charge pump circuit 120 configured so that the maximum value of each of the control voltages delivered at the output of the circuit 118 is greater than the maximum value of each of the voltages corresponding to one of the bits of the input digital value.

[0056] Figure 5 schematically represents an example of an embodiment of the control logic circuit 118 comprising such a charge pump circuit 120. In this figure, the bits of the digital input value received by the circuit 118 are designated by the references DI - DM and each have voltage levels equal to 0V or 5V, and the control voltages delivered at the output of the circuit 118 are designated by the references ¢7 - <Pm et ont chacune des niveaux égaux IN-Q,6N (IN étant la tension d’alimentation du circuit 118) et IN+VZ, avec VZ désignant la tension Zener nécessaire à la commande des transistors, par exemple égale à 5 V pour des transistors MOSFET ayant une tension de grille maximale égale à 5 V.

[0057] The control logic circuit 118 allows a voltage to be generated <Pn = IN_voltage + VZn lorsque la tension DN est égale à une valeur correspondant à un état ‘ 1 ’ et de générer une tension n = IN_voltage when the voltage DN is equal to a value corresponding to a state '0'. VZn corresponds to the threshold voltage of the Zener diodes Dzl to DzN and is chosen equal to the maximum voltage V cs admissible by the transistors 102.x and 104.x of the [Fig.l], with x between 1 and m.

[0058] All the transistors in the control logic circuit 118 have, for example, the same dimensions. In the example of [Fig. 5], the TBx transistors correspond to biasing transistors whose voltage Vcs is set by the TB transistor of the biasing branch 122. The TBx transistors are mounted as current sources: the maximum current that can pass through these transistors is equal to the current through the TB transistor, i.e. the current Ib.

[0059] When the control signal DN is equal to a value corresponding to a '0' state, all TBnx / Tnx transistors are blocked. In this case, no current flows through the Zener diode and 0 n = IN_voltage.

[0060] When the control signal DN is equal to a value corresponding to a state '1':

[0061] - transistor Tne switches to the conducting state. Transistors TBnb and Tnc are therefore themselves also crossed by an Ib current.

[0062] - a voltage equal to VQP-2. V cs, or V, develops on the gate of transistor Tnd. cs is the gate-source voltage of a transistor through which a current Ib flows. When all the transistors in circuit 118 have the same dimensions, the value of V cs is similar for each of them when they are traversed by the same current.

[0063] - the gate voltage on the transistor Tnd allows the on-state to be biased Tnd and TBna transistors.

[0064] - the TBna transistor is biased as a current source, and therefore generates a current equal to to Ib.

[0065] - the Zener diode is biased at a current Ib and at the voltage 0 n = IN_voltage + VZn.

[0066] - operation is obtained with VQP > IN_voltage + VZn + 2. V cs.

[0067] The current detection circuit 100 is, for example, used within a device 1000 overcurrent protection itself for example used within a 2000 connection interface. An example of such a 1000 device and such a 2000 connection interface is shown in Figures 6 and 7.

[0068] In this example, the connection interface 2000 is of the USB, HDMI, or DP type, and allows connection between a load 3000, for example a computer, and an electronic circuit 4000 that can be considered a power supply. In the example In the described embodiment, the connection between the electronic circuit 4000 and the connection interface 2000 is made by a cable 4002 having a plug (not visible in figures 6 and 7) coupled to the connection interface 2000. The device 1000 comprises an assembly 1002 including the circuit 100.

[0069] In the described embodiment, the device 1000 has an input 1004 to which the cable 4002 is coupled, and an output 1006 to which the load 3000 is coupled. The device 1000 is configured to deliver the load current 1 out on the output 1006.

[0070] The device 1000 further includes a switch 1008 configured to connect or not the input 1004 to the output 1006.

[0071] In the described embodiment, the circuit 100 has its second output 110 coupled to a first input, for example the non-inverting input, of a comparator 1010 which also includes a second input, for example an inverting input, configured to receive a reference voltage to which the voltage obtained by the current conversion 1 out / N is compared. This reference voltage is chosen to be stable and precise, for example equal to 1.2 V, and is called, in English, the "reference bandgap".

[0072] In the described embodiment, the device 1000 further comprises a control circuit 1012 including an input coupled to an output of the comparator 1010 and an output on which a protection control signal is intended to be delivered.

[0073] Furthermore, in the described embodiment, the switch 1008 includes a control input coupled to an output of a switching control circuit 1014, one input of which is coupled to the output of the control circuit 1012. The switching control circuit 1014 is configured to control the opening or closing of the switch 1008 according to the value of the received protection control signal.

[0074] In such a device 1000, when the voltage delivered at output 110 is greater than the reference voltage applied to the input of comparator 1010, an overload is considered to be present at the connection interface. A control signal is then sent to switch 1008 from the switching control circuit 1014, itself controlled by the control circuit 1012, in order to break the connection between the load 3000 and the circuit 4000.

[0075] The circuit 100 implements a current detection function enabling it to maintain a constant detection accuracy regardless of the value of the current limit between the input 106 and the output 108 of the circuit 100.

[0076] Furthermore, the circuit 100 allows digital control of the on-state resistance value presented by the first transistors 102.1 - 102.m without reducing the gate voltage V cs applied to the first and second transistors 102.1 -102.m, 104.1 - 104.m, and therefore without reducing the matching between the transistors of circuit 100.

[0077] The current detection circuit 100 could be used for other applications, for example for a high-side current measurement of an electrical circuit.

[0078] By way of example, the circuit 100 and the device 1000 can be used within electronic equipment such as a smartwatch.

[0079] The current detection circuit and the protection device can, for example, be used in industrial applications. More specifically, the current detection circuit and the protection device can, for example, be used for the development of green energy or for the electrification of infrastructure, for example for charging stations or for the integration of solar energy. The current detection circuit and the protection device can also be used in the field of the Internet of Things and smart homes.

[0080] The current detection circuit and the protection device are, for example, intended to be used in the field of personal electronics.

[0081] The current detection circuit and the protection device are intended, for example, to be used in communication equipment, or in computers and peripherals.

[0082] Various embodiments and variants have been described. A person skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will become apparent to a person skilled in the art.

[0083] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Current-sensing circuit (100) comprising at least several pairs of first and second field-effect transistors (102.1 - 102.m, 104.1 - 104.m) such that: - a first of the source or drain electrodes of each of the first and second transistors (102.1 - 102.m, 104.1 - 104.m) is coupled to an input (106) of the current-sensing circuit (100) to which a current to be detected is intended to be applied; - for each pair of one of the first transistors (102.1 - 102.m) and one of the second transistors (104.1 - 104.m), the dimension ratio W; Æ; of the first transistor (102.1 - 102.m) is greater than the dimension ratio IV 2Æ2 of the second transistor (104.1 - 104.m), with W2 and W2 corresponding to the widths of the active areas of the first and second transistors (102.1 - 102.m, 104.1 - 104.m), and L1 and L2 corresponding to the lengths of the active areas of the first and second transistors (102.1 - 102.m, 104.1 - 104.m).

2. Current detection circuit (100) according to claim 1, comprising a first output (108) coupled to a second of the source or drain electrodes of the first transistors (102.1 - 102.m) and on which a load current 1 out is intended to be delivered, and a second output (110) on which a voltage representative of a fraction of the load current 1 out / N is intended to be delivered, with N = (IV ; .L 2) / (L j .W2)-

3. Current sensing circuit (100) according to claim 2, further comprising a differential amplifier (112) comprising a first input coupled to the second source or drain electrodes of the first transistors (102.1 - 102.m), and a second input coupled to the second source or drain electrodes of the second transistors (104.1 - 104.m).

4. Current-sensing circuit (100) according to claim 3, further comprising a third field-effect transistor (114) including a gate coupled to an output of the differential amplifier (112), a first source or drain electrode coupled to the second source or drain electrodes of the second transistors (104.1 - 104.m), and a second source or drain electrode coupled to the second output (110) of the current sensing circuit (100).

5. Current detection circuit (100) according to claim 4, further comprising an element (116) for converting the fraction of the current of load 1 out / N into the voltage representative of the fraction of the current of load 1 out / N.

6. Current sensing circuit (100) according to claim 5, wherein the conversion element comprises at least one electrical resistor (116) including a first electrode coupled to the second source or drain electrode of the third field-effect transistor (114), and a second electrode coupled to a reference electrical potential.

7. Current sensing circuit (100) according to any one of the preceding claims, comprising m pairs of first and second transistors (102.1 - 102.m, 104.1 - 104.m), and further comprising a control logic circuit (118) configured to receive a digital input value and to deliver control voltages on m outputs which are, together, representative of the digital input value, each of the m outputs being coupled to the gates of one of the m pairs of first and second transistors (102.1 - 102.m, 104.1 - 104.m), with m an integer greater than or equal to 2.

8. Current sensing circuit (100) according to claim 7, wherein the control logic circuit (118) is configured to convert the thermometrically encoded digital input value into control voltages.

9. Current sensing circuit (100) according to any one of claims 7 or 8, wherein the control logic circuit (118) includes at least one charge pump circuit (120) configured so that the maximum value of each of the control voltages delivered at the output is greater than the maximum value of each of the voltages corresponding to one of the bits of the digital input value.

10. Current sensing circuit (100) according to any one of the preceding claims, wherein the first and second transistors (102.1 - 102.m, 104.1 - 104.m) are of type N.

11. Overcurrent protection device (1000), comprising at least one current detection circuit (100) according to any one of the preceding claims.

12. A protection device (1000) according to claim 11, wherein the current sensing circuit (100) includes the second output (110) on which the voltage representative of a fraction of the load current 1 out / N is intended to be delivered, and further comprising a comparator (1010) including a first input coupled to the second output of the current sensing circuit and a second input configured to receive a reference voltage.

13. Protective device (1000) according to claim 12, further comprising a control circuit (1012) comprising an input coupled to an output of the comparator (1010) and an output on which a protective control signal is intended to be delivered.

14. Protective device (1000) according to claim 13, further comprising a switch (1008) configured to connect or not an input (1004) of the protective device (1000) to an output (1006) of the protective device (1000) and comprising a control input coupled to a switching control circuit (1014) having an input coupled to the output of the control circuit (1012) and having an output coupled to a control input of the switch (1008).

15. Connection interface (2000) comprising at least one protection device (1000) according to any one of claims 11 to 14.

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