Non-volatile memory integrated circuit and corresponding manufacturing process
FR3171558A1Pending Publication Date: 2026-07-24STMICROELECTRONICS INT NV
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Patent Information
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- STMICROELECTRONICS INT NV
- Filing Date
- 2025-01-23
- Publication Date
- 2026-07-24
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Abstract
The non-volatile memory integrated circuit comprises memory cells (CELa, CELb) with a state transistor (TE) having a control gate (CG), a floating gate (FG), and an erase gate (EG), and a vertical gate selector transistor (TS) embedded in a semiconductor substrate (SUB). Figure for the abstract: Fig 1
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