Stacked FET with three-terminal SOT MRAM

GB2638603APending Publication Date: 2025-08-27INTERNATIONAL BUSINESS MACHINE CORPORATION
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Patent Information

Application Number
GB2025005451
Authority / Receiving Office
GB · GB
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-09-28
Filing Date
2023-09-12
Publication Date
2025-08-27

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Abstract

Embodiments are disclosed for a three-terminal spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) device. The three-terminal SOT MRAM device includes a first type field effect transistor (FET) that drives an SOT line. Additionally, the first type FET includes a write gate in electrical contact with a write wordline (WWL). Further, the device also includes a second type FET in electrical contact with a magnetic tunnel junction (MTJ). Also, the second type FET comprises a read gate in electrical contact with a read wordline (RWL). Additionally, the first type FET is disposed above the second type FET. Further, the three-terminal SOT MRAM device provides a density of three contacted poly pitch (CPP) per two cells.
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Citation Information

Patent Citations

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