Video output system for multiple video source hosts

Abstract

This invention proposes a multi-video source host output system, comprising: a system processor; several video source hosts; several memories corresponding to the video source hosts, the memories being connected to the system processor and one video source host; and a video source output circuit connected to the output terminal of the system processor. This invention changes the circuit configuration from being host-configured to being system processor-configured, and enables information synchronization between the video source hosts and the video output interface through the memories, thereby improving the reliability of the video output system.

Description

Specification 1 Multi-Video Source Host Output System Technical Field This utility model belongs to the field of video output technology, and particularly relates to a multi-video source host output system. Background Technology In recent years, the application of servers has penetrated into all aspects of people's lives. Faced with increasingly complex computing tasks, more and more computers need to work together to complete them. For example, in central computer rooms or data centers, hundreds or even thousands of servers are often deployed. Generally speaking, each server host needs to be configured with a set of peripheral devices (keyboard, monitor, mouse) to be controlled by the administrator. Not only is the investment huge and space-consuming, but the administrator often has to shuttle between the various server hosts, which is very inconvenient. The multi-video source host access video output system is the key system to solve this problem. By inputting the video signal of each server host into the system, the user can monitor these server hosts on a single monitor. When it is necessary to switch signal lines, a request is only needed to be sent to the system processor to switch to monitoring another server host. Since the video output interface is shared by multiple video source hosts, and each host has different requirements for video output, this leads to the problem of output interface configuration conflicts. In video output systems with multiple video source hosts, a memory-based approach is used. First, the output requirement information of each host is transmitted to the memory. Then, the system processor configures the information corresponding to the currently selected host onto the output interface. As shown in Figure 2, in the existing architecture of multi-video source host output systems, the currently selected host often configures internal components such as multi-video switching circuits and video output interfaces. This architecture has several problems: 1. Internal circuits such as multi-video switching circuits and video output interfaces may be accessed simultaneously by different hosts (video source hosts), leading to configuration conflicts, errors, or tampering. 2. Since the multi-video switching circuits and video output interfaces need to be configured by the host, the complexity of the host software driver is greatly increased. 3. Since the multi-video switching circuits and video output interfaces need to be configured by the host, the number of internal access paths increases, resulting in an increase in chip area. Summary of the Invention The purpose of this utility model is to provide a multi-video source host output system that changes the configuration of circuits from being done by the host to being done by the system processor. The adopted technical solution is as follows: A multi-video source host output system, comprising: a system processor; N video source hosts; N≥2; N memories, corresponding to the video source hosts, each memory connected to the system processor and one video source host; and a video source output circuit connected to the output terminal of the system processor. Preferably, the memories are connected to the video source hosts via an input interface. Preferably, the input interface includes any one of a USB interface, a PCIe interface, and a Type-C interface.Preferably, the memory is electrically connected to both the video source host and the system processor. Preferably, the memory is a dual-port RAM or a stack pointer register. Preferably, the system processor is any ARM series CPU or RISC-V CPU. Preferably, the video source output circuit includes: a video output interface module and a multi-video switching circuit, the input terminals of which are connected to the output terminals of the system processor; another input terminal of the multi-video switching circuit is connected to the corresponding video source host; the output terminal of the multi-video switching circuit is connected to the other input terminal of the video output interface module. Preferably, the video output interface module includes at least one of an HDMI interface, a DP interface, a VGA interface, and a Type-C interface. In summary, this utility model discloses a video output system with multiple video source host access, including at least two sets of input interfaces, a multi-video switching circuit, a system processor, a memory, and at least one set of video output interfaces. Each set of input interfaces (video source input interfaces) is used for the input of one video source host. The multi-video switching circuit establishes a connection between multiple video sources and one video output interface. The memory, acting as a storage medium, is used for information synchronization between the video source host and the video output system (video output interface). The video output interface is used to connect to the monitor. The system processor processes the information in the memory and controls the multi-video switching circuit and the video output interface. Specifically, the system processor selects a set of video input interfaces to establish a connection with the video output interface; the system processor configures the video output interface based on the resolution information, control information, and status information in the memory. Furthermore, interrupts generated by the system processor in the memory are cleared by the external video source host, and interrupts generated by the external video source host are cleared by the system processor. Before the interrupts generated by the system processor in the memory are cleared by the external video source host, the system processor cannot transmit new display EDID information to the memory. Before the interrupts generated by the external video source host in the memory are cleared by the system processor, the external video source host cannot transmit new resolution information, control information, and status information to the memory. This invention enables information synchronization between the video source host and the video output system through the memory, improving the reliability of the video output system. Compared with existing technologies, the advantages of this utility model are: 1. By changing the configuration of internal circuits such as multi-video switching circuits and video output interfaces from being configured by the host to being configured by the system processor, the risk of possible configuration conflicts or tampering is fundamentally solved. 2. By changing the configuration of internal circuits such as multi-video switching circuits and video output interfaces from being configured by the host to being configured by the system processor, the complexity of host software drivers is reduced.HK 30138178 A Specification 4 3. The existing system's internal circuits, such as multi-video switching circuits and video output interfaces, are configured by the system processor instead of the host, reducing the number of access paths within the system and reducing chip area. Figure 1 is a structural diagram of a multi-video source host output system; Figure 2 is a structural diagram of a multi-video source host output system in the prior art where a selected host configures the multi-video switching circuit, video output interface module, etc. Detailed Description The multi-video source host output system of this utility model will be described in more detail below with reference to the schematic diagrams, which illustrate preferred embodiments of this utility model. It should be understood that those skilled in the art can modify the utility model described herein while still achieving the advantageous effects of this utility model. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit this utility model. A multi-video source host output system includes: a system processor; several video source hosts for providing video signals to the multi-video switching circuit in the video source output circuit and writing configuration data into corresponding memories; several memories, corresponding to the video source hosts, with each memory connected to a video source host and the system processor. The phrase "memory, configured corresponding to the video source host" refers to one memory per video source host. The video source output circuit is connected to the output of the system processor. In this embodiment, the memory is electrically connected to both the video source host and the system processor. The memory is a dual-port RAM or a stack pointer register. The system processor is an ARM series CPU or a RISC-V CPU. As shown in Figure 1, the video source output circuit includes: a video output interface module and a multi-video switching circuit, both of whose inputs are connected to the output of the system processor; another input of the multi-video switching circuit is connected to the corresponding video source host; and the output of the multi-video switching circuit is connected to another input of the video output interface module. Specifically, the video output interface module supports at least one of the following protocols: DP, HDMI, VGA, or Type-C. As shown in Figure 1, a memory corresponding to the number of video source hosts is added to the video output system. When the host needs to modify the relevant circuit configuration in the system, the corresponding operation is converted into a descriptor, written to the memory, and the system processor is notified. Specifically, the video output system requires an external monitor. Each monitor has its own EDID information. The video output system needs to write the EDID information into memory and then send an interrupt through the memory to inform the video source host. This way, the video source host can know the attributes of the connected monitor (such as which resolutions it supports). Therefore, the video source host and the corresponding memory communicate bidirectionally.Then the system processor reads the descriptor from the memory and performs the corresponding circuit configuration. As shown in Figure 1, all host video sources can work simultaneously, but the system processor determines which video source host is ultimately selected for output. The host video source is only responsible for continuously inputting video data to the video source output system. Input interface types include USB interface, PCIe interface, and Type-C interface (etc.). However, since each video source host has different output requirements (mainly resolution), memory is needed as a medium. The video source host first writes the control information into the corresponding memory, and then initiates an interrupt through the memory to notify the system processor. When the system processor selects a video source host, it will first read the required information from the memory and then configure the output interface. HK 30138178 A Manual 6 The working principle of this output system: The system processor reads the external display EDID information through the video output interface and transmits it to the memory. Then, the memory generates an interrupt signal to the external video source host. The external video source host reads the display EDID information from the memory through the video input interface. The external video source host transmits resolution information, control information, and status information to the memory through the video input interface, and then the memory generates an interrupt signal to the system processor. The system processor configures the video output interface according to the resolution information, control information, and status information in the memory. In summary, in this embodiment, by adding memory to the video output system, the configuration of internal circuits such as multi-video switching circuits and video output interfaces is changed from being configured by the host to being configured by the system processor. This fundamentally solves the risk of possible configuration conflicts or tampering, reduces the complexity of host software drivers and internal system access paths, and lowers system complexity. The above is only a preferred embodiment of this utility model and does not constitute any limitation on this utility model. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and contents disclosed in this utility model without departing from the scope of the technical solutions of this utility model are considered to be within the protection scope of this utility model. HK 30138178 A Claim 1 1. A multi-video source host output system, characterized in that it comprises: a system processor; N video source hosts; N≥2; N memories, corresponding to the video source hosts, the memories being connected to the system processor and one video source host; and a video source output circuit connected to the output terminal of the system processor. 2. The multi-video source host output system according to claim 1, characterized in that the memories are connected to the video source hosts through an input interface.3. The multi-video source host output system according to claim 1, wherein the input interface includes any one of a USB interface, a PCIe interface, and a Type-C interface. 4. The multi-video source host output system according to claim 1, wherein the memory is electrically connected to both the video source host and the system processor. 5. The multi-video source host output system according to claim 1, wherein the memory is a dual-port RAM or a stack pointer register. 6. The multi-video source host output system according to claim 1, wherein the system processor is any ARM series CPU or RISC-V CPU. 7. The multi-video source host output system according to claim 1, wherein the video source output circuit includes: a video output interface module and a multi-video switching circuit, both of whose input terminals are connected to the output terminal of the system processor; another input terminal of the multi-video switching circuit is connected to the corresponding video source host; and the output terminal of the multi-video switching circuit is connected to the other input terminal of the video output interface module. 8. The multi-video source host output system according to claim 7, characterized in that the video output interface module includes at least one of HDMI interface, DP interface, VGA interface, and type-c interface. (See Figure 1 and Figure 2 for the HK 30138178 A specification.)