Inline resistor integrated with conductive contact pad structure

Abstract

An integrated circuit structure includes (i) a first layer including a first metal, (ii) a second layer on and in contact with the first layer, the second layer including a resistive material, and (iii) a third layer on and in contact with the second layer, the third layer including a second metal. In one example, the resistive material is different from one or both of the first metal and the second metal. An interconnect feature is on and in contact with the second layer. In one example, the interconnect feature is a solder bump or a solder ball. In one example, a resistivity of the resistive material is at least 20%, or at least 50% greater than a resistivity of each of the first layer and the third layer. In one example, the resistive material includes one or more of (i) a third metal different from the first metal and the second metal, (ii) a metalloid, and (iii) the third metal and at least one of oxygen and nitrogen.

Description

(19) State Intellectual Property Office (12) Invention Patent Application (10) Application Publication Number (43) Application Publication Date (21) Application Number 202480037408.8 (22) Application Date 2024.05.29 (30) Priority Data 18 / 206,731 2023.06.07 US (85) PCT International Application Entering National Phase Date 2025.12.04 (86) PCT International Application Application Data PCT / US2024 / 031389 2024.05.29 (87) PCT International Application Publication Data WO2024 / 253912 EN 2024.12.12 (71) Applicant: BAE Systems Information and Electronic Systems Integration, Inc. Address: New Hampshire, USA (72) Inventors: N.P. Wikoff, A.S. Wolren, J.R. Maulman, J.D. Smith (74) Patent Agency: Beijing Sanxing Trademark & ​​Patent Agency (General Partnership) 11216 Patent Attorney: Liu Zhuoran (51) Int.Cl. H10D 1 / 47 (2025.01) H10W 72 / 20 (2026.01) (54) Invention Title: In-line Resistor Integrated with Conductive Contact Pad Structure (57) Abstract: An integrated circuit structure comprising: (i) a first layer comprising a first metal; (ii) a second layer located on and in contact with the first layer, the second layer comprising a resistive material; and (iii) a third layer located on and in contact with the second layer, the third layer comprising a second metal. In one example, the resistive material is different from one or both of the first metal and the second metal. An interconnect component is located on and in contact with the second layer. In one example, the interconnect component is a solder bump or solder ball. In one example, the resistivity of the resistive material is at least 20% or at least 50% greater than the resistivity of each of the first and third layers. In one example, the resistive material comprises one or more of the following: (i) a third metal different from the first and second metals, (ii) a metalloid, and (iii) the third metal plus at least one of oxygen and nitrogen. Claims 2 pages, Description 14 pages, Drawings 18 pages, CN 121336505 A 2026.01.13 CN 1 21 33 65 05 A 1. An integrated circuit structure, comprising: a first layer including a first metal; a second layer located on the first layer and in contact with the first layer, the second layer including a resistive material; a third layer located on the second layer and in contact with the second layer, the third layer including a second metal, wherein the resistive material is different from one or both of the first metal and the second metal; and an interconnect component located on the second layer and in contact with the second layer.2. The integrated circuit structure of claim 1, wherein the interconnect component is a solder bump or solder ball. 3. The integrated circuit structure of claim 1, wherein the resistivity of the resistive material is at least 20% greater than the resistivity of each of the first layer and the third layer. 4. The integrated circuit structure of claim 1, wherein the resistive material comprises one or more of the following: (i) a third metal different from the first metal and the second metal, (ii) a metal-like substance, and (iii) the third metal and at least one of oxygen and nitrogen. 5. The integrated circuit structure of claim 1, wherein the first metal and the second metal are the same metal. 6. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the integrated circuit die, wherein the interconnect component is located between the integrated circuit die and the carrier substrate, and wherein the interconnect component is a solder bump. 7. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the carrier substrate, wherein the interconnect component is located between the carrier substrate and the integrated circuit die, and wherein the interconnect component is a solder bump. 8. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the integrated circuit package, wherein the interconnect component is located between the integrated circuit package and the printed circuit board, and wherein the interconnect component is a solder ball. 9. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the printed circuit board, wherein the interconnect component is located between the printed circuit board and the integrated circuit package, and wherein the interconnect component is a solder ball. 10. The integrated circuit structure of claim 1, wherein the interconnect component is a first interconnect component, and wherein the integrated circuit structure further comprises: a fourth layer comprising a first metal, wherein the second layer is located on and in contact with the fourth layer, wherein the second layer extends continuously and integrally from above the first layer to above the fourth layer; a fifth layer located on the second layer and the fourth layer, the fifth layer comprising a second metal; and a second interconnect component located on and in contact with the fifth layer. 11. The integrated circuit structure of claim 10, wherein the first interconnect component and the second interconnect component are solder bumps or solder balls.12. An integrated circuit structure comprising: a device; a resistive contact pad structure located on the device, the resistive contact pad structure comprising: (i) a lower layer comprising a first metal; (ii) an upper layer located on the lower layer, the upper layer comprising a second metal; and (iii) a resistor located between the lower layer and the upper layer, wherein the resistivity of the resistor is at least 20% greater than the resistivity of each of the lower layer and the upper layer; and a solder ball or solder bump located on the resistive contact pad structure, the solder ball or solder bump being configured to couple the device to another device. 13. The integrated circuit structure of claim 12, wherein the resistor comprises a third metal and one or both of oxygen and nitrogen, and wherein the third metal is substantially different from each of the first metal and the second metal. 14. The integrated circuit structure of claim 12, wherein the resistive contact pad structure is a first resistive contact pad structure, wherein the lower layer is a first lower layer, wherein the upper layer is a first upper layer, and wherein the integrated circuit structure further comprises: a second resistive contact pad structure located on the device, the second resistive contact pad structure being laterally adjacent to the first resistive contact pad structure, the second resistive contact pad structure comprising: (i) a second lower layer including the first metal, (ii) a second upper layer located on the second lower layer, the second upper layer including the second metal, and (iii) a resistor located between the second lower layer and the second upper layer; wherein the resistor extends continuously and integrally from between the first upper layer and the first lower layer to between the second upper layer and the lower layer, and wherein the resistor is part of both the first resistive contact pad structure and the second resistive contact pad structure. 15. The integrated circuit structure of claim 12, further comprising: a non-resistive contact pad structure laterally adjacent to the resistive contact pad structure, the non-resistive contact pad structure including a film layer containing the first metal, wherein the bottom surface of the film layer of the non-resistive contact pad structure is coplanar with the bottom surface of the lower layer of the resistive contact pad structure, wherein the non-resistive contact pad structure has no resistor. 16. The integrated circuit structure of claim 15, wherein the solder bump or solder ball is a first solder ball or solder bump, and wherein the integrated circuit structure further comprises: a second solder ball or solder bump located on the film layer of the non-resistive contact pad structure; wherein the lower surface of the second solder ball or solder bump is located on a first horizontal plane, the first horizontal plane being lower than a second horizontal plane of the lower surface of the first solder ball or solder bump. 17. The integrated circuit structure of claim 12, wherein the device is one of an integrated circuit die, an integrated circuit package, and a printed circuit board.18. A method of forming a resistive contact pad structure and a non-resistive contact pad structure of an integrated circuit structure, comprising: forming a first pad and a laterally adjacent second pad on a device; forming a resistor on the first pad, while not forming any resistor on the second pad; forming a third pad on the resistor and located on the first pad, wherein the combination of the first pad, the resistor, and the third pad forms the resistive contact pad structure of the device, and wherein the second pad forms the non-resistive contact pad structure of the device. 19. The method of claim 18, further comprising: depositing a first interconnect component of the third pad and a second interconnect component of the second pad, wherein each of the first interconnect component and the second interconnect component is a corresponding solder bump or solder ball. 20. The method of claim 18, further comprising: forming a fourth pad on the device, laterally adjacent to the first pad and the second pad, wherein forming the resistor comprises: forming (i) a first portion of the resistor located on the first pad, and (ii) a second portion of the resistor located on the fourth pad, wherein the first portion and the second portion of the resistor are portions of an integral transistor structure; and forming a fifth pad on the second portion of the resistor and on the fourth pad, wherein the combination of the fourth pad, the second portion of the resistor, and the fifth pad forms another resistive contact pad structure of the device. Claims 2 / 2 Page 3 CN 121336505 A Inline Resistor Integrated with Conductive Contact Pad Structure Technical Field

[0001] This disclosure relates generally to integrated circuits, and more particularly, to inline resistor structures for integrated circuits. Background Art

[0002] Currently, there are various chip packaging technologies for mounting integrated circuit dies and package components on a circuit board such as a printed circuit board or printed circuit board (PCB), such as ball grid array (BGA) and flip-chip. For example, in a flip-chip setup, the die is coupled to a carrier substrate (or package) via multiple solder bumps. For example, in a BGA setup, the resulting integrated circuit package can be coupled to a circuit board using solder balls. For example, the die may include multiple contact pads, and each contact pad of the die is coupled to a corresponding solder bump. Similarly, the carrier substrate may include multiple contact pads, wherein each contact pad of the carrier substrate is coupled to a corresponding solder bump or a corresponding solder ball. Furthermore, the circuit board may include multiple contact pads, and each contact pad of the circuit board is coupled to a corresponding solder ball. Surface mount components such as resistors may be mounted on the printed circuit board and electrically coupled to one or more of the contact pads.

[0003] FIG1 shows a cross-sectional view of an integrated circuit structure according to an embodiment of the present disclosure, including a device and a resistive contact pad structure located on the device, wherein the resistive contact pad structure includes a film layer having a relatively high resistivity (e.g., compared to the resistivity of one or more other film layers of the resistive contact pad structure), wherein the resistive contact pad structure is configured to receive an interconnect component, such as a conductive ball or a conductive bump, and wherein the interconnect component is used to couple the device to another device.

[0004] FIG2 shows a cross-sectional view of an integrated circuit structure according to an embodiment of the present disclosure, including the resistive contact pad structure of FIG1 and a non-resistive contact pad structure laterally adjacent to the resistive contact pad structure.

[0005] FIG3 shows a cross-sectional view of the integrated circuit structure of FIG2 according to an embodiment of the present disclosure, having two interconnect components located on the resistive contact pad structure and the non-resistive contact pad structure, respectively.

[0006] FIG4 shows a cross-sectional view of an integrated circuit structure including two laterally adjacent resistive contact pad structures according to an embodiment of the present disclosure, wherein the two resistive contact pad structures are connected by a continuous and monolithic resistive layer shared by both of the resistive contact pad structures.

[0007] FIG5 shows a cross-sectional view of an integrated circuit structure including two laterally adjacent resistive contact pad structures and another laterally adjacent non-resistive contact pad structure according to an embodiment of the present disclosure.

[0008] FIG6 shows a cross-sectional view of an integrated circuit structure including a device and resistive contact pad structures located on the device according to an embodiment of the present disclosure, wherein the resistive contact pad structure includes a film layer having a relatively high resistivity (e.g., compared to the resistivity of one or more other film layers of the resistive contact pad structure) and in contact with an underlying conductive line.

[0009] FIG7A shows a cross-sectional view of an integrated circuit system employing any one or more of the resistive contact pad structures described with reference to FIGS. 1 to 6 according to an embodiment of the present disclosure.

[0010] FIG7B illustrates another integrated circuit system 750 employing one or more of the resistive contact pad structures described with reference to FIGS. 1 to 6, according to an embodiment of the present disclosure.

[0011] FIG8 shows a flowchart describing a method of forming the example integrated circuit structures of FIGS. 1 to 6 according to an embodiment of the present disclosure.

[0012] FIGS. 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H and 9I collectively illustrate example integrated circuit structures at various stages of the processing according to the method of FIG8 according to an embodiment of the present disclosure.

[0013] The drawings depict various embodiments of the present disclosure for illustrative purposes only and are not necessarily drawn to scale.Many variations, configurations, and other embodiments will become apparent from the detailed discussion below. Summary of the Invention

[0014] This document discloses a resistive contact pad structure including inline resistors. For example, the contact pad itself is formed as a film layer with relatively high resistance, rather than as a separate resistor coupled to the contact pad. This resistive contact pad structure can be formed at the die level, package level, or circuit board level. For example, the resistive contact pad structure can be coupled to a conductive bump or ball, such as a conductive solder bump or conductive solder ball. The resistive layer of the resistive contact pad structure can be coupled, for example, between two conductive contact pads, or between a conductive contact pad and another conductive component (e.g., a wire). This arrangement can help reduce the need for surface mount resistors.

[0015] In one embodiment, such a resistive contact pad structure includes a lower layer, an upper layer on the lower layer, and a resistive layer located between the lower layer and the upper layer. The lower layer may be substantially and / or dimensionally similar to any other laterally adjacent non-resistive contact pad structure. The resistive layer and the upper layer are added to the lower layer to form the resistive contact pad structure. In one example, the height and / or material of the resistive layer may be selected such that the resistive layer has a relatively high resistance. For example, the resistance of the resistive contact pad structure may be relatively higher than that of a laterally adjacent non-resistive contact pad structure that only has a lower layer (but no resistive layer and upper layer). In this resistive contact pad structure, for example, the upper layer may accommodate corresponding solder balls or solder bumps.

[0016] In one example, the resistive layer includes a resistive material such as a metal or metalloid, such as germanium or tellurium, having a relatively high resistivity (e.g., higher than copper or nickel). In another example, the resistive material of the resistive layer includes metal oxides and / or metal nitrides, such as tantalum oxide, titanium oxide, aluminum oxide, aluminum nitride, and / or other nitrides or oxides having a desired resistivity greater than that of a given conductive pad (or contactor). In yet another example, carbides, oxynitrides, oxycarbides, or carbonoxynitrides of one or more metals may also be used alternatively.The choice of material for the resistive layer, whether it be an element, compound, alloy, metalloid, metal oxide, or other resistive conductor, may depend on the desired resistance of the resistive contact pad structure. Many variations and embodiments will be readily apparent from this disclosure. Detailed Description

[0017] General Overview

[0018] Several important issues remain regarding the design and formation of contact pads for integrated circuit structures. For example, the design of an integrated circuit may require the contact pad to be coupled in series to a surface mount resistor. However, the addition of a surface mount resistor in series with the contact pad results in an increase in the area of ​​the circuit structure and / or potentially an increase in cost.

[0019] Therefore, the techniques described herein are used to form resistive contact pad structures that include inline or integrated resistors, thereby providing resistance within the resistive contact pad structure and thus reducing the need for external resistors such as the surface mount resistor described on page 2 / 14 of this specification, 5 CN 121336505 A. For example, the resistive contact pad structure itself is formed to have a relatively high resistance relative to the resistance of the surface mount resistor, rather than forming a single surface mount resistor coupled in series with the contact pad.

[0020] In one embodiment, the resistive contact pad structure described herein can be coupled at any level of an integrated circuit system. For example, the resistive contact pad structure can be located on an integrated circuit die to couple the die in a flip-chip configuration to a package carrier substrate via corresponding solder bumps. Similarly, for example, the resistive contact pad structure can be located on the package carrier substrate to couple the package carrier substrate to a die or printed circuit board (PCB) via corresponding solder bumps. In another example, for example, the resistive contact pad structure can be located on a package carrier substrate to couple the hermetically sealed carrier substrate to a circuit board, such as a printed circuit board, via corresponding solder balls. In yet another example, for example, the resistive contact pad structure can be located on the circuit board to couple the circuit board to the package carrier substrate via corresponding solder balls. Thus, in one example, the resistive contact pad structure can couple interconnect components such as solder balls or solder bumps, and the resistive contact pad structure can be at the die level, package level, or circuit board level.

[0021] In one example, the device (such as a die, package carrier substrate, or circuit board) includes multiple contact pad structures, wherein, for example, based on the device design, only some of these contact pad structures are resistive contact pad structures. The remaining contact pads may be non-resistive contact pad structures having negligible resistance (high conductivity) or resistance substantially lower than the intentionally high resistance of the resistive contact pad structures.

[0022] In one embodiment, the resistive contact pad structure includes a lower layer, an upper layer above the lower layer, and a resistive layer between the lower layer and the upper layer.The lower layer may be similar in nature, composition, and / or size to any other laterally adjacent non-resistive contact pad structure. For example, the non-resistive contact pad structure may consist only of this lower layer (without any resistive layer or upper layer above it). It should be noted that although there is no upper layer within the non-resistive contact pad structure, the film layer is still identified as the lower layer of the non-resistive contact pad structure for ease of identification.

[0023] For example, the lower layer of the resistive contact pad structure and the non-resistive contact pad structure may be formed using the same process and may be similar in nature, composition, and / or size, and may have coplanar upper and lower surfaces. In one example, the lower layer of the resistive contact pad structure and the non-resistive contact pad structure includes nickel, copper, aluminum, gold, silver, platinum, and / or other metals / alloys suitable for conductive contact pads.

[0024] In one embodiment, for example, the height and / or material of the resistive layer may be selected such that the resistive layer has high resistance to ultimately increase the resistance of the resistive contact pad structure. For example, the resistance of this resistive contact pad structure may be relatively higher than that of a laterally adjacent non-resistive contact pad structure that only has the lower layer (but without the resistive layer and the upper layer). For example, the resistive layer comprises a metal or metalloid having a relatively high resistivity (e.g., higher than copper or nickel or other highly conductive pure metals or alloys), such as germanium or tellurium. In another example, the resistive layer comprises a metal oxide and / or a metal nitride, such as tantalum oxide, titanium oxide, aluminum oxide, aluminum nitride, and / or other suitable nitrides or oxides. In yet another example, one or more metal carbides, oxynitrides, oxycarbides, or oxycarbonitrides may also be used alternatively. In one example, the choice of material for the resistive layer may depend on the desired resistance of the resistive contact pad structure.

[0025] In this resistive contact pad structure, the upper layer receives corresponding solder balls or solder bumps. In one example, the upper layer of the resistive contact pad structure comprises nickel, copper, aluminum, gold, silver, platinum, and / or other suitable metals / alloys commonly used in contact pad structures. The upper and lower layers of the resistive contact pad structure may be substantially identical.

[0026] In one example, the resistive contact pad structure and the non-resistive contact pad structure may be laterally adjacent (e.g., see Figures 2, 3, and 6). In some examples, the first resistive contact pad structure may also be laterally adjacent to the second resistive contact pad structure. In some such examples where the first and second resistive contact pad structures are laterally adjacent, a common, continuous, and integral resistive layer may exist for both the first and second resistive contact pad structures.In one example, the first resistive contact pad structure and the second resistive contact pad structure may be spaced tens, hundreds, or thousands of micrometers apart. Therefore, although the shared resistive layer electrically couples the first and second resistive contact pad structures, the resistance of the resistive layer in the segment between the two resistive contact pad structures may be relatively high (in the range of tens or hundreds of ohms, kiloohms, megaohms, or gigaohms).

[0027] In one embodiment, when the resistive contact pad structure is formed, the resistive layer is deposited on the underlying layer of the resistive contact pad structure, while the underlying layer of the non-resistive contact pad structure is shielded. In some examples, the resistive layer comprises a metal oxide, and in some such examples, the resistive layer is conformally deposited using a reactive deposition process. For example, during the reactive deposition process, the metal is deposited on the underlying layer of the resistive contact pad structure, and the deposition process is performed in an oxygen-rich environment. Based on the process parameters maintained in the deposition chamber, the deposited metal may be oxidized (or the metal oxide may be deposited), thereby forming the metal oxide resistive layer. In one example, the oxidation rate can be controlled to control the resistance of the resistive layer. An example formation process of this resistive contact pad structure is described below with reference to Figures 8 and 9A-9I.

[0028] As used herein, the term “about” indicates that the listed values ​​may vary slightly or otherwise within acceptable tolerances, provided that such variation does not result in inconsistencies in the process or apparatus. For example, for some elements, the term “about” may refer to a variation of ±0.1%, and for others, the term “about” may refer to a variation of ±1% or ±10% or any point therein. As used herein, terms defined in the singular are intended to include those defined in the plural, and vice versa.

[0029] Any numerical range mentioned herein explicitly includes every numerical value (including fractions and integers) covered by that range. For clarity, the range of "at least 50" or "at least about 50" mentioned here includes integers such as 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, and 60, as well as decimals such as 50.1, 50.2, 50.3, 50.4, 50.5, 50.6, 50.7, 50.8, and 50.9. The range of "less than 50" or "less than about 50" mentioned here includes integers such as 49, 48, 47, 46, 45, 44, 43, 42, 41, and 40, as well as decimals such as 49.9, 49.8, 49.7, 49.6, 49.5, 49.4, 49.3, 49.2, 49.1, and 49.0.

[0030] As used herein, the terms “substantially” or “basically” also apply in a negative sense to mean the complete or almost complete lack of action, feature, nature, state, structure, item, or result.For example, a surface that is “substantially” flat is either completely flat or nearly flat such that the effect is the same as that of a completely flat surface.

[0031] As used herein, “different composition” or “dissimilar composition” materials refer to two materials that have different chemical compositions. For example, an alloy of gold and copper may be different in composition from an alloy of gold, copper, and silver. Similarly, a gold-copper alloy containing 20% ​​copper may be different in composition from a gold-copper alloy containing 30% copper. If two materials are “substantially different,” then one material has elements that are not present in the other. Therefore, a gold-copper alloy containing 20% ​​copper can be substantially the same as a gold-copper alloy containing 30% copper.

[0032] Resistive Contact Pad Structure

[0033] FIG1 shows a cross-sectional view of an integrated circuit structure 100 including a device 108 and a resistive contact pad structure 104 on the device 108, wherein the resistive contact pad structure 104 includes a film layer 124 having a relatively high resistivity (e.g., compared to the resistivity of one or more other film layers of the resistive contact pad structure 104), and wherein the resistive contact pad structure 104 is configured to receive an interconnect component, such as a conductive ball or conductive bump (see FIGS. 3 and 5, but not shown in FIG. 1), and wherein, according to one embodiment of the present disclosure, the interconnect component is used to couple the device 108 to another device.

[0034] In one embodiment, the device 108 may be a suitable device such as an integrated circuit die or chip, a carrier substrate, a printed circuit board, or an interconnect component such as a solder ball or solder bump connected to another suitable device. Examples of the device 108 will be described below.

[0035] In one embodiment, the device 108 includes a conductive line or trace 112 extending beneath the resistive contact pad structure 104. For example, the line 112 is physically and electrically coupled to the resistive contact pad structure 104. In some examples, the line 112 comprises one or more metals and / or alloys thereof. In some such examples, the line 112 comprises copper, aluminum, nickel, gold, silver, platinum, and / or another conductive metal used to form lines or traces within a die, carrier substrate, and / or printed circuit board. The line 112 electrically couples the resistive contact pad structure 104 to one or more other components of the device 108.

[0036] In one example, the resistive contact pad structure 104 may be considered as external to and located on the device 104. In another example, the resistive contact pad structure 104 may be considered as part of the device 104.

[0037] In one embodiment, the resistive contact pad structure 104 includes a lower layer 120, an intermediate layer 124, and an upper layer 128, which are also referred to herein as the first layer 120, the second layer 124, and the third layer 128, respectively. As shown, the film layer 124 is located between the film layers 120 and 128. For example, the film layer 124 physically and electrically separates the film layers 120 and 128 such that the film layers 120 and 128 can be electrically coupled to each other through the film layer 124 (e.g., the film layers 120 and 128 cannot directly contact each other).

[0038] For example, to prevent or reduce the chance of direct physical contact between the film layers 120 and 128, the film layer 124 is at least as large or wide as one or both of the film layers 120 and 128 in the X-Y axis direction. Therefore, for the orientation of FIG1, the horizontal span of the film layer 124 is at least as large as the horizontal span of one or both of the films 120 and 128. In the example of FIG1, in this horizontal plane, the film layer 124 is larger than each of the films 120 and 128.

[0039] In one embodiment, at least a portion of the upper surface of the device 108 is covered by a mask 116, wherein in one example, the mask 116 is a solder mask. As shown, the solder mask 116 has an opening, and the film layer 120 extends within the opening of the solder mask 116 and contacts the conductive line 112.

[0040] In one embodiment, the film layer 120 comprises a conductive material, such as one or more metals and / or alloys thereof. In one example, and although not shown in FIG1, the film layer 120 includes a barrier layer or liner layer, and a filler material located within the barrier layer or liner layer, while in another example such a barrier layer or liner layer may be absent.

[0041] As described below, the film layer 120 (or other film layers similar to the film layer 120) is configured as a pad for receiving solder balls or solder bumps. Although the film layer 120 does not accommodate any such solder balls or solder bumps due to the structure of the resistive contact pad structure 104. Therefore, in one example, the film layer 120 includes a suitable metal and / or alloy thereof, which can be adhered to a solder ball or solder bump. For example, the film layer 120 includes nickel, copper, aluminum, gold, silver, platinum and / or other suitable metals / alloys commonly used in contact pad structures.

[0042] In one embodiment, the film layer 128 similarly includes a conductive material such as one or more metals and / or alloys thereof. In one example, and although not shown in Figure 1, the film layer 128 includes a barrier layer or liner, and a filler material located within the barrier layer or liner; in another example, such a barrier layer or liner may be absent. The film layer 128 is configured as a contact pad structure to receive solder balls or solder bumps (see Figure 3).Therefore, in one example, the film layer 128 comprises a suitable metal and / or alloy thereof, which can be adhered to a solder ball or solder bump. For example, the film layer 128 comprises nickel, copper, aluminum, gold, silver, platinum and / or other suitable metals / alloys for contact pad structures.

[0043] Thus, the film layers 120 and 128 are contact pad structures having the film layer 124 located between the two contact pad structures 120, 128, and the combination of the contact pad structures 120, 128 and the film layer 124 forms a resistive contact pad structure 104. In one embodiment, as described on page 5 / 14 of the specification CN 121336505 A, the film layer 124 acts as a resistor (e.g., an inline resistor) between the two film layers 120 and 128. For example, the film layer 124 has a substantially higher resistivity than the film layers 120 and 128. As shown in the figure, the film layers 120, 124, and 128 are connected in series, with film layer 124 located between film layers 120 and 128. The introduction of film layer 124 between film layers 120 and 128 increases the total resistance of the resistive contact pad structure 104. Thus, the contact pad structure 104 is also referred to herein as a “resistive” contact pad structure.

[0044] Therefore, in applications where the resistor is designed to be connected in series with the contact pad, instead of forming a single resistor, film layer 124 is added to the contact pad structure. This results in an overall increase in the resistance of the resistive contact pad structure 104, as is the case with connecting the resistor in series with the contact pad structure.

[0045] In one embodiment, the resistance of the resistive layer 124 can be adjusted, for example, by selecting a suitable material for film layer 124 and / or by adjusting the height H of film layer 124 (see Figure 1). For example, a shorter height H will result in a lower resistance between film layers 120 and 128. Conversely, a higher height H will result in higher resistance between layers 120 and 128, for example due to the relatively high resistivity of film layer 124. In one example, the height H may be between 0.1 micrometers and 25 micrometers, or in one example between 0.1 and 20 micrometers, or 0.1 and 10 micrometers, or 0.1 and 5 micrometers, or 0.5 and 25 micrometers, or 0.5 and 10 micrometers, or 0.5 and 5 micrometers, or 1 and 25 micrometers, or 1 and 15 micrometers, or 1 and 10 micrometers, or 1 and 5 micrometers, or 2 and 25 micrometers, or 2 and 10 micrometers, or 2 and 5 micrometers. As described, the height H can be controlled to achieve the desired resistance of the resistive contact pad structure 104.

[0046] In one embodiment, film layer 124 comprises a resistive material, such as a conductive material having a higher resistivity, for example, copper, nickel, aluminum, and / or other metals used for conductive lines and the non-resistive contact pad.In one example, depending on the material selection of the films 120, 124, and 128, the resistivity of the resistive material of film 124 may be at least 10%, or at least 20%, or at least 40%, or at least 50%, or at least 100%, or at least 200%, or at least 400%, or at least 500%, or at least 1000%, more than the resistivity of one or both of the films 120 and 128. In one example, the resistivity of the resistive material of the film 124 is at least 0.000001 ohm-meters, or at least 0.000016 ohm-meters (which is, for example, the resistivity of carbon in the form of graphite), or at least 0.005 ohm-meters (which is, for example, the resistivity of tellurium), or at least 0.05 ohm-meters, or at least 0.1 ohm-meters, or at least 0.5 ohm-meters, or at least 1 ohm-meter, or at least 5 ohm-meters, or at least 10 ohm-meters, or at least 25 ohm-meters, or at least 100 ohm-meters.

[0047] In one example, the resistive material of the film 124 comprises one or more metals, one or more metalloids, and / or their oxides, and / or nitrides. For example, the film 124 comprises a relatively high-resistivity metal or metalloid, such as germanium or tellurium (e.g., compared to the resistivity of copper or nickel). In another example, the film 124 comprises metal oxides and / or metal nitrides, such as tantalum oxide, titanium oxide, aluminum oxide, aluminum nitride, and / or other suitable nitrides or oxides. In yet another example, carbides, oxynitrides, carbon oxides, or carbon oxynitrides of one or more metals may also be used alternatively. In one example, the material selection of the film 124 may depend on the desired resistance of the resistive contact pad structure 104.

[0048] In one embodiment, when the film 124 comprises metals and / or metal oxides, the oxidation rate may be controlled, for example, to control the resistance of the film 124. In one example, for example, the entire metal of the film 124 may be oxidized to achieve a relatively high resistance. In another example, for example, only a portion (not all) of the metal of the film 124 may be oxidized to achieve a relatively low resistance. For example, a surface region of the metal of the film 124 may be oxidized to achieve a relatively low resistance. Thus, in one example, the amount of metal oxidized in the film 124 may be controlled to adjust the resistance of the film 124.

[0049] Therefore, as previously stated, depending on the thickness or height H of the film layer 124 and / or the material selection of the layer 124, the film layer 124 may have a higher resistance compared to films such as 120 and 128.For example, the resistance of each of the films 120 and 128, as described on page 6 / 14 of the specification (CN 121336505 A), can be measured in fractions of ohms or a few ohms (for example, less than 100 ohms, or less than 50 ohms, or less than 20 ohms, or less than 10 ohms, or less than 5 ohms, or less than 2 ohms, or less than 1 ohm). Conversely, the resistance of the film 124 (e.g., for conducting current between the films 120 and 128), can be, for example, tens of ohms, hundreds of ohms, thousands of ohms, or several megaohms (for example, at least 10 ohms, or at least 20 ohms, or at least 50 ohms, or at least 100 ohms, or at least 200 ohms, or at least 500 ohms, or at least 1,000 ohms, or at least 2,000 ohms, or at least 5,000 ohms, or at least 10,000 ohms).

[0050] As shown in FIG1, the film layer 120 has a width W, for example, along the X-axis direction of FIG1. ​​For example, the mask 116 has an opening of the width W, and the film layer 120 is at least partially formed within the opening. Depending on the application of the resistive contact pad structure 104, the width W can range from, for example, a few micrometers to several hundred micrometers. For example, as will be described below, if the resistive contact pad structure 104 is located on a die in a flip-chip configuration or on the surface of a carrier substrate facing the die (e.g., when the resistive contact pad structure 104 is to receive solder bumps), the width W can be in the range of 10 to 200 micrometers, for example, in the sub-ranges of 10 to 150 micrometers, or 10 to 100 micrometers, or 10 to 50 micrometers, or 50 to 200 micrometers, or 50 to 100 micrometers. In another example, and which will also be described below, if the resistive contact pad structure 104 is located on a printed circuit board or on a surface of a carrier substrate facing the printed circuit board (e.g., when the resistive contact pad structure 104 is a solder ball receiving device), the width W can be in the range of 200 to 900 micrometers, for example, in the sub-ranges of 200 to 700 micrometers, or 200 to 400 micrometers, or 400 to 900 micrometers, or 400 to 600 micrometers, or 500 to 900 micrometers.

[0051] FIG2 shows a cross-sectional view of an integrated circuit structure 200 including the resistive contact pad structure 104 of FIG1 and a non-resistive contact pad structure 220 laterally adjacent to the resistive contact pad structure 104 according to an embodiment of the present disclosure. The resistive contact pad structure 104 of FIG2 is similar to the resistive contact pad structure 104 of FIG1, and the film layers of the two resistive contact pad structures 104 in both figures are similarly labeled.

[0052] The structure 200 of FIG2 also includes a general or non-resistive contact pad structure 220.Unlike the resistive contact pad structure 104 (which includes a resistive layer 124), the contact pad structure 220 does not include such a resistive layer, and is referred to herein as a "general contact pad structure" or a "non-resistive contact pad structure". Therefore, the resistance of the contact pad structure 220 is substantially smaller than that of the resistive contact pad structure 104, and is thus also referred to as a general or non-resistive contact pad structure.

[0053] In one example, the non-resistive contact pad structure 220 is similar to the film layer 120 of the resistive contact pad structure 104. For example, the film layer 120 may be configured as a non-resistive contact pad structure, and the film layers 124 and 128 are added to the film layer 120 to produce the resistive contact pad structure 104. For example, the film layers 120 and 220 may be formed using a common process to produce film layers 120 and 220 with similar composition or elements and / or similar dimensions. Next, the film layers 124 and 128 are formed on the film layer 120 to produce the resistive contact pad structure 104. In one example, the upper and / or lower surfaces of the film layer 120 are substantially coplanar with the upper and / or lower surfaces of the film layer 220, respectively.

[0054] FIG3 shows a cross-sectional view of the integrated circuit structure 200 of FIG2 according to an embodiment of the present disclosure, having two interconnect components 304 and 344 located on the resistive contact pad structure 104 and the non-resistive contact pad structure 220, respectively. In one embodiment, the interconnect components 304 and 344 are, for example, solder bumps or solder balls, depending on the application in which the contact pad structures 104 and 220 are deployed. For example, as will be described below, if the contact pad structures 104, 220 are located on a die in a flip-chip configuration or on a carrier substrate surface facing the die, the interconnect components 304 and 344 may be conductive bumps, such as solder bumps. In another example, and which will also be described below, if the contact pad structures 104, 220 are located on a printed circuit board or on the surface of a carrier substrate facing the printed circuit board, the interconnecting members 304 and 344 may be conductive balls, such as solder balls.

[0055] In one example, the diameter along the vertical Z-axis of the interconnecting member 304 is d1, and the diameter along the vertical Z-axis of the interconnecting member 344 is d2. Due to the height H of the film layer 124 and the height of the film layer 128, the diameter d1 is greater than the diameter d2. Depending on the application of the contact pad structures 104 and 220, the diameters d1 and d2 are in the range of tens or hundreds of micrometers, for example, at least 20 micrometers, or at least 40 micrometers, or at least 50 micrometers, or at least 70 micrometers, or at least 100 micrometers, or at least 150 micrometers, or at least 200 micrometers, or at least 400 micrometers.

[0056] In one example, since the diameters d1 and d2 are generally higher than the heights of the film layers 124, 128, the difference between the diameters d1 and d2 is negligible. For example, the difference between the diameters d1 and d2 is small enough that solder material (or another conductive material) of similar size can be used to form the interconnects 304 and 344. For example, the interconnects 304 and 344 can be formed using the same interconnect forming process without additional processing to address the difference between the diameters d1 and d2.

[0057] However, in another example, since the diameter d1 may be smaller than the diameter d2, less conductive material can be used to form the interconnect 304 than the material used to form the interconnect 344.

[0058] As shown, the lower surface of the interconnect 344 is located on a first horizontal plane, which is lower than a second horizontal plane of the lower surface of the interconnect 304. Therefore, as shown in FIG3, the lower surface of the interconnecting component 344 is lower than the lower surface of the interconnecting component 304.

[0059] FIG4 shows a cross-sectional view of an integrated circuit structure 400 comprising two laterally adjacent resistive contact pad structures 104a and 104b according to an embodiment of the present disclosure, wherein the two resistive contact pad structures 104a and 104b are joined together by a continuous and integral resistive layer 324, which is shared by the resistive contact pad structures 104a and 104b. For example, the resistive contact pad structure 104a includes film layers 120a, 324, 128a, which are substantially and / or compositionally similar to the aforementioned film layers 120, 124, and 128 of the resistive contact pad structure 104 of FIG1. Similarly, the resistive contact pad structure 104b includes, for example, film layers 120b, 324, and 128b, which are substantially and / or compositionally similar to the aforementioned film layers 120, 124, and 128 of the resistive contact pad structure 104 of FIG. 1.

[0060] Therefore, the resistive contact pad structures 104a and 104b each have a structure similar to the resistive contact pad structure 104 of FIG. 1. However, in FIG. 4, the resistive layer 324 is shared by the resistive contact pad structures 104a and 104b. For example, the film layer 324 extends continuously and integrally between the resistive contact pad structures 104a and 104b. Therefore, a portion of the film layer 324 is included in the resistive contact pad structure 104a, while another portion of the film layer 324 is included in the resistive contact pad structure 104b.

[0061] As described above, the resistive layer 324 has a relatively high resistivity, which is generally higher than that of the film layers 120a, 120b, 128a, 128b. As shown in FIG4, the resistive contact pad structures 104a and 104b are separated by a lateral distance D.In one example, the lateral distance D is, for instance, at least 100 micrometers, or at least 200 micrometers, or at least 400 micrometers, or at least 600 micrometers, or at least 800 micrometers, or at least 1000 micrometers, or at least 1500 micrometers, or at least 2000 micrometers, or at least 3000 micrometers, or at least 4000 micrometers, or at least 5000 micrometers. Therefore, the resistance of a portion of the film layer 324 located between the two resistive contact pad structures 104a and 104b is in the megaohm or even gigaohm range. For example, the resistance of this portion of the film layer 324 located between the two resistive contact pad structures 104a and 104b is at least 1 megohm, or at least 5 megohms, or at least 20 megohms, or at least 50 megohms, or at least 100 megohms, or at least 200 megohms, or at least 400 megohms, or at least 500 megohms, or at least 800 megohms, or at least 1,000 megohms, or at least 2,000 megohms. Therefore, although the film layer 324 physically and electrically couples the two resistive contact pad structures 104a and 104b, for practical purposes, due to the high resistance of the portion of the film layer 324 between the two resistive contact pad structures 104a and 104b discussed above, the two resistive contact pad structures 104a and 104b can be considered electrically isolated from each other. (Page 8 / 14, CN 121336505 A)

[0062] In one example, for instance, since the film layer 324 is easy to form, the film layer 324 may be shared by the resistive contact pad structures 104a and 104b. For example, during the formation of the structure 400, the film layer 324 is deposited blanket-like on the film layers 120a and 120b. Because both resistive contact pad structures 104a and 104b use the resistive layer 324, and due to the high resistivity of the aforementioned film layer 324, the portion of the film layer 324 between the two resistive contact pad structures 104a and 104b may not be removed later, thereby forming the structure 400 of FIG. 4.

[0063] FIG. 5 shows a cross-sectional view of an integrated circuit structure 500 comprising two laterally adjacent resistive contact pad structures 104a and 104b (see, for example, FIG. 4) and another laterally adjacent non-resistive contact pad structure 220 (see, for example, FIG. 2 and FIG. 3 according to an embodiment of the present disclosure). For example, the resistive contact pad structures 104a, 104b and the non-resistive contact pad structure 220 are respectively coupled to the internal components 304a, 304b, 344. Based on the above description of Figures 1 to 4, the structure 500 of Figure 5 is self-explanatory.

[0064] FIG. 6 shows a cross-sectional view of an integrated circuit structure 600 according to an embodiment of the present invention, including a device 108 and an integrated resistive pad 604 located on the device 108, wherein the integrated resistive pad 604 includes a film layer 124 having a relatively high resistivity (e.g., compared to the resistivity of one or more film layers of the resistive pad structure 104) and in contact with a conductive line 112. Therefore, the structure 600 of FIG. 6 is at least partially similar to the structure 100 of FIG. 1, and similar components of the two structures are designated using the same reference numerals. However, unlike the structure 100 which includes the lower layer 120, the structure 600 does not include such a lower layer. Instead, the resistive layer 124 is in direct contact with the conductive line 112. Based on the description of the structure 100 of FIG. 1, the structure 600 will be readily understood. In one example, it will be understood that the above description of one or more of FIG. 2 to FIG. 5 also applies to the structure 600 of FIG. 6.

[0065] FIG. 7A shows a cross-sectional view of an integrated circuit system 700 employing one or more of the resistive contact pad structures described with reference to FIGS. 1 to 6 above, according to an embodiment of the present invention. The integrated circuit system 700 includes a flip-chip integrated circuit package 701, wherein an integrated circuit die or chip 704 is disposed on the upper surface of a carrier substrate 708 of the integrated circuit package 701 in a flip-chip configuration (e.g., face-down mounting). As shown, the die 704 is coupled to the carrier substrate 708 via a plurality of interconnects 712. In one example, the interconnects 712 are conductive bumps, such as solder bumps. For example, the solder bumps 712 are arranged in an array or a peripheral bump layout. An underfill material 705 is located between the die 704 and the carrier substrate 708.

[0066] As shown, each interconnect 712 is coupled to the die 704 via a corresponding contact pad structure 716 and to the carrier substrate 708 via a corresponding contact pad structure 717. Therefore, there are multiple contact pad structures 716 coupled to the die 704, and multiple other contact pad structures 717 coupled to the carrier substrate 708.

[0067] In one embodiment, at least some of the contact pad structures 716 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to FIGS. 1 to 6, while the remainder of the contact pad structures 716 are similar to the non-resistive contact pad structures 220 described above with reference to FIGS. 2 to 6. Similarly, in one embodiment, at least some of the contact pad structures 717 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to FIGS. 1 to 6, while the remainder of the contact pad structures 717 are similar to the non-resistive contact pad structures 220 described above with reference to FIGS. 2 to 6.

[0068] As shown in FIG. 7A, the carrier substrate 708 is coupled to the printed circuit board (PCB) 728 via a plurality of interconnects 720. In one example, the interconnects 720 are conductive balls, such as solder balls. For example, the carrier substrate 708 is coupled to the PCB 728 via the interconnects 720 in a ball grid array (BGA) configuration, and / or another suitable configuration for coupling the carrier substrate to the PCB. In one embodiment, the PCB may be a circuit card assembly (CCA). Specification 9 / 14 pages 12 CN 121336505 A

[0069] As shown, each interconnect 720 is coupled to the carrier substrate 708 via a corresponding contact pad structure 718 on the carrier substrate 708, and to the PCB 728 via a corresponding contact pad structure 718 located on the PCB 728. Therefore, there are multiple contact pad structures 718 coupled to the carrier substrate 708, and multiple other contact pad structures 719 coupled to the printed circuit board 719.

[0070] In one embodiment, at least some of the contact pad structures 718 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to FIGS. 1 to 6, while the remainder of the contact pad structures 718 are similar to the non-resistive contact pad structures 220 described above with reference to FIGS. 1 to 6. Similarly, in one embodiment, at least some of the contact pad structures 719 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to FIGS. 1 to 6, while the remainder of the contact pad structures 719 are similar to the non-resistive contact pad structures 220 described above with reference to FIGS. 1 to 6.

[0071] Therefore, in one example, the device 108 of FIG1 to FIG6 may be any of the die 704, carrier substrate 708 and / or printed circuit board 728 shown above, and the resistive contact pad structures 104, 104a, 104b described above may be any of the contact pad structures 716, 717, 718, 719 of FIG7A. Therefore, the resistive contact pad structures 104, 104a, 104b described above may be applied to (i) the die level (e.g., as one or more of contact pad structures 716, 717), (ii) the IC package level (e.g., as one or more of contact pad structures 718), and / or (iii) the circuit board level (e.g., as one or more of contact pad structures 719).

[0072] FIG7B shows a cross-sectional view of another integrated circuit system 750 employing one or more resistive contact pad structures described above with reference to FIG1 to FIG6 according to an embodiment of the present disclosure.The integrated circuit system 750 includes a wire-bonded integrated circuit package, wherein an integrated circuit chip or die 754 is disposed on a carrier substrate 758 in a plurality of wire bonding configuration. As shown, the die 754 is coupled to the carrier substrate 758 via a plurality of conductive wires 760. In one example, each wire 760 is coupled to the die 766 via a corresponding contact pad structure 766 and to the carrier substrate 758 via a corresponding contact pad structure 769. Thus, there are a plurality of contact pad structures 766 coupled to the die 754 and a plurality of other contact pad structures 769 coupled to the carrier substrate 758.

[0073] In one embodiment, at least some of the contact pad structures 766 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to FIGS. 1 to 6, while the remainder of the contact pad structures 766 are similar to the non-resistive contact pad structures 220 described above with reference to FIGS. 2 to 6. Similarly, in one embodiment, at least some of the contact pad structures 769 are similar to the resistive contact pad structures 104, 104b and / or 104b described above with reference to Figures 1 to 6, while the remainder of the contact pad structures 769 in Figures 1 to 6 are similar to the non-resistive contact pad structures 220 described above with reference to Figures 2 to 6.

[0074] Figure 8 shows a flowchart describing a method of forming an integrated circuit structure of the examples of Figures 1 to 6 according to an embodiment of the present disclosure. Figures 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H and 9I together illustrate an example of an integrated circuit structure 900 at various stages of the processing of the method 800 according to an embodiment of the present disclosure. Figures 8 and 9A to 9I will be discussed together.

[0075] Referring to FIG8, at 804 of method 800, a device 108 is formed, wherein the device 108 includes a solder mask 116 on the upper surface of the device 108. The device 108 may be any of the devices shown in FIG7A or 7B, such as any of die 704, 754, any of carrier substrate 708, 758, or the printed circuit board 728. The device 108 may be formed using suitable techniques. In addition, at 804, one or more portions of the top surface of the device 108 are masked using one or more masks 904. FIG9A shows the device 108 described above with the mask 904. The mask 904 may be a hard mask, a shadow mask, or other suitable type of mask.

[0076] Method 800 proceeds from 804 to 808.At 808, a portion of the solder resist 116 (see, for example, Figure 9B) is removed through an opening 905 within the mask 904, and film layers 120 and 220 are formed through the opening 905 (see, for example, Figure 9C). The solder resist 116 can be removed using a suitable etching technique. In one example, the openings 905 are located above the conductive lines 112 and 212, such that film layers 120 and 220 are formed above and in contact with the conductive lines 112 and 212, respectively. Exemplary conductive materials for the film layers 120 and 220 have been described above. In one embodiment, the films 120, 220 may be formed using a suitable deposition process (such as a conformal deposition process), for example, sputtering, chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), vapor phase epitaxy (VPE), molecular beam epitaxy (MBE), or liquid phase epitaxy (LPE).

[0077] The method 800 proceeds from 808 to 812. At 812, mask 904 is removed (e.g., see FIG. 9D), and film 220 is masked using one or more masks 908, wherein mask 908 forms another opening 909 over film 120 (e.g., see FIG. 9E). Mask 908 may be a hard mask, a shadow mask, or other suitable type of mask. In one example, the opening 909 is at least as wide as film 120. In the example of FIG. 9E, the opening 909 is wider than film 120.

[0078] The method 800 proceeds from 812 to 816. As shown in FIG9F, at 816, a film layer 124 is formed through the opening 909 and positioned above the film layer 120, wherein the film layer 124 is at least as wide as the film layer 120. In one example and as described above, the film layer 124 comprises one or more metals and / or their oxides and / or nitrides. For example, the film layer 124 comprises a metal with relatively high resistance, such as germanium or tellurium. In another example, the film layer 124 comprises metal oxides and / or metal nitrides, such as tantalum oxide, titanium oxide, aluminum oxide, aluminum nitride, and / or other suitable nitrides or oxides. In yet another example, one or more metal carbides, oxynitrides, carbon oxides, or carbon oxynitrides may also be used alternatively.

[0079] In one example, the film 124 is deposited using a suitable deposition process (e.g., a conformal deposition process), such as sputtering, CVD, PVD, ALD, VPE, MBE, or LPE. In the example where the film 124 comprises an oxide (e.g., a metal oxide), a reactive deposition process may be used.For example, during the reactive deposition process, metal can be deposited in an oxygen-rich chamber or environment, and process parameters (e.g., temperature and pressure) can be controlled to form metal oxides during the deposition process itself. For example, a reactive sputtering process, or a reactive PVD process, or a reactive AVD process, or a reactive CVD process, or another suitable reactive deposition process can be used to form the film layer 124 comprising metal oxides. Therefore, for a reactive deposition process, not only the exposed surface of the film layer 124 comprises metal oxides, but the metal oxides are also present in the non-exposed portions of the layer 124. In one example, the amount of oxidation of the film layer 124 (e.g., by adjusting the parameters of the reactive deposition process) can be controlled to adjust the resistance of the film layer 124.

[0080] In another example, a general deposition process (e.g., a non-reactive deposition process) can be used to deposit metal, and then the metal can be oxidized to form metal oxides on the exposed surface of the metal. Therefore, in this case, since mainly only the exposed surface of the film layer 124 is oxidized, the resistance of the film layer 124 is relatively small (e.g., compared to the case described above using a reactive deposition process).

[0081] The method 800 proceeds from 816 to 820. As shown in FIG9G, at 820, the mask 908 is removed, and the film layer 220 is masked using another mask 912, wherein the mask 912 forms another opening 913 above the film layer 124. In one example, the opening 913 may be equal to or smaller than the width of the film layer 124.

[0082] The method 800 proceeds from 820 to 824. As shown in FIG9H, at 824, the film layer 128 is formed through the opening 913 and located on the film layer 124. As shown in FIG9I, the mask 912 is then removed. The film 128 is deposited using a suitable deposition process (e.g., a conformal deposition process), such as sputtering, CVD, PVD, ALD, VPE, MBE, or LPE. This completes the formation of the resistive contact pad structure 104, which includes the films 120, 124, and 128, adjacent to the non-resistive contact pad structure 220. Although not shown in this method 800, in one example, interconnecting components 304 and 344 may be formed on the resistive contact pad structure 104 and the non-resistive contact pad structure 220 as discussed with respect to FIG. 3. Specification 11 / 14 pages 14 CN 121336505 A

[0083] The method 800 may be appropriately modified to form the structure 400 of FIG. 4. For example, when forming the structure, the film 324 can be deposited on the films 120a and 120b in a blanket manner (for example, the mask 908 used to form the film 124 can be modified appropriately in the method 800).Therefore, a continuous and integral film layer 324 can be formed that laterally spans adjacent resistive contact pad structures 104a and 104b of the structure 400.

[0084] Similarly, the method 800 can be suitably modified to form the structure 500 of FIG. 5, for example by forming two laterally adjacent resistive contact pad structures 104a and 104b and one laterally adjacent non-resistive contact pad structure 220. Alternatively, the method 800 can also be moderately modified, for example, by omitting the formation of the film layer 120 (e.g., the mask 904 may not have an opening for forming the film layer 120) to form the structure 600 of FIG. 6.

[0085] Note that, for ease of description, the processes in method 800 are shown in a specific order. However, according to some embodiments, one or more processes may be performed in a different order or may not be performed at all (and are therefore optional). Various variations of the method 800 and techniques described herein will be readily apparent in accordance with this disclosure.

[0086] Further Example Embodiments

[0087] The following examples relate to additional embodiments, in which many arrangements and configurations will be readily understood.

[0088] Embodiment 1: An integrated circuit structure comprising: a first layer comprising a first metal; a second layer located on and in contact with the first layer, the second layer comprising a resistive material; a third layer located on and in contact with the second layer, the third layer comprising a second metal, wherein the resistive material is different from one or both of the first metal and the second metal; and an interconnect component located on and in contact with the second layer.

[0089] Embodiment 2: The integrated circuit structure according to Embodiment 1, wherein the interconnect component is a solder bump or solder ball.

[0090] Embodiment 3: The integrated circuit structure according to any one of Embodiments 1 to 2, wherein the resistivity of the resistive material is at least 20% greater than the resistivity of each of the first layer and the third layer.

[0091] Example 4: An integrated circuit structure according to any one of Examples 1 to 3, wherein the resistive material comprises one or more of the following: (i) a third metal different from the first metal and the second metal, (ii) a metal-like substance, and (iii) the third metal and at least one of oxygen and nitrogen.

[0092] Example 5: An integrated circuit structure according to any one of Examples 1 to 4, wherein the first metal and the second metal are the same metal.

[0093] Example 6: An integrated circuit structure according to any one of Examples 1 to 5, wherein the first layer is in contact with or is part of the integrated circuit die, wherein the interconnect component is located between the integrated circuit die and the carrier substrate, and wherein the interconnect component is a solder bump.

[0094] Example 7: An integrated circuit structure according to any one of Examples 1 to 6, wherein the first layer is in contact with or is part of the carrier substrate, wherein the interconnect component is located between the carrier substrate and the integrated circuit die, and wherein the interconnect component is a solder bump.

[0095] Example 8: An integrated circuit structure according to any one of Examples 1 to 7, wherein the first layer is in contact with or is part of the integrated circuit package, wherein the interconnect component is located between the integrated circuit package and the printed circuit board, and wherein the interconnect component is a solder ball.

[0096] Example 9: An integrated circuit structure according to any one of Examples 1 to 7, wherein the first layer is in contact with or is part of the printed circuit board, wherein the interconnect component is located between the printed circuit board and the integrated circuit package, and wherein the interconnect component is a solder ball.

[0097] Example 10: The integrated circuit structure according to Examples 1 to 9, wherein the interconnect component is a first interconnect component, and wherein the integrated circuit structure further includes: a fourth layer, including a first metal, wherein the second layer is located on the fourth layer and in contact with the fourth layer, wherein the second layer extends continuously and integrally from above the first layer to above the fourth layer; a fifth layer, located on the second layer and the fourth layer, the fifth layer including a second metal; and a second interconnect component, located on the fifth layer and in contact with the fifth layer.

[0098] Example 11: The integrated circuit structure according to Example 10, wherein the first interconnect component and the second interconnect component are solder bumps or solder balls.

[0099] Example 12: An integrated circuit structure comprising: a device; a resistive contact pad structure located on the device, the resistive contact pad structure comprising: (i) a lower layer comprising a first metal; (ii) an upper layer located on the lower layer, the upper layer comprising a second metal; and (iii) a resistor located between the lower layer and the upper layer, wherein the resistivity of the resistor is at least 20% greater than the resistivity of each of the lower layer and the upper layer; and a solder ball or solder bump located on the resistive contact pad structure, the solder ball or solder bump being configured to couple the device to another device.

[0100] Example 13: The integrated circuit structure according to Example 12, wherein the resistor comprises a third metal and one or both of oxygen and nitrogen, and wherein the third metal is substantially different from each of the first metal and the second metal.

[0101] Example 14: An integrated circuit structure according to any one of Examples 12 to 13, wherein the resistive contact pad structure is a first resistive contact pad structure, wherein the lower layer is a first lower layer, wherein the upper layer is a first upper layer, and wherein the integrated circuit structure further includes: a second resistive contact pad structure located on the device, the second resistive contact pad structure being laterally adjacent to the first resistive contact pad structure, the second resistive contact pad structure including: (i) a second lower layer including the first metal, (ii) a second upper layer located on the second lower layer, the second upper layer including the second metal, and (iii) a resistor located between the second lower layer and the second upper layer; wherein the resistor extends continuously and integrally from between the first upper layer and the first lower layer to between the second upper layer and the lower layer, and wherein the resistor is part of both the first resistive contact pad structure and the second resistive contact pad structure.

[0102] Example 15: The integrated circuit structure according to any one of Examples 12 to 14 further includes: a non-resistive contact pad structure laterally adjacent to the resistive contact pad structure, the non-resistive contact pad structure including a film layer containing the first metal, wherein the bottom surface of the film layer of the non-resistive contact pad structure is coplanar with the bottom surface of the lower layer of the resistive contact pad structure, wherein the non-resistive contact pad structure has no resistor.

[0103] Example 16: The integrated circuit structure according to Example 15, wherein the solder bump or solder ball is a first solder ball or solder bump, and wherein the integrated circuit structure further includes: a second solder ball or solder bump located on the film layer of the non-resistive contact pad structure; wherein the lower surface of the second solder ball or solder bump is located on a first horizontal plane, the first horizontal plane being lower than a second horizontal plane of the lower surface of the first solder ball or solder bump.

[0104] Example 17: The integrated circuit structure according to any one of Examples 12 to 16, wherein the device is one of an integrated circuit die, an integrated circuit package, and a printed circuit board.

[0105] Example 18: A method for forming a resistive contact pad structure and a non-resistive contact pad structure of an integrated circuit structure, comprising: forming a first pad and a laterally adjacent second pad on a device; forming a resistor on the first pad, while not forming any resistor on the second pad; forming a third pad on the resistor and located on the first pad, wherein the combination of the first pad, the resistor and the third pad forms the resistive contact pad structure of the device, and wherein the second pad forms the non-resistive contact pad structure of the device.

[0106] Example 19: The method according to Example 18 further comprises: depositing a first interconnect component of the third pad and a second interconnect component of the second pad, wherein each of the first interconnect component and the second interconnect component is a corresponding solder bump or solder ball.Specification page 13 / 14 16 CN 121336505 A

[0107] Example 20: The method according to any one of Examples 18 to 19 further includes: forming a fourth pad on the device, laterally adjacent to the first pad and the second pad, wherein forming the resistor includes: forming (i) a first portion of the resistor located on the first pad, and (ii) a second portion of the resistor located on the fourth pad, wherein the first portion and the second portion of the resistor are portions of an integral transistor structure; and forming a fifth pad on the second portion of the resistor and on the fourth pad, wherein the combination of the fourth pad, the second portion of the resistor, and the fifth pad forms another resistive contact pad structure of the device.

[0108] The foregoing description of the exemplary embodiments is presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. Many modifications and variations are possible according to the present disclosure. The scope of the present disclosure is intended not to be limited by the detailed description, but by the appended claims. Future applications claiming priority to this application may claim the disclosed subject matter in different ways and may generally include any set of one or more limitations as not disclosed herein or otherwise demonstrated.Instruction manual page 14 / 14, 17 CN 121336505 A, Figure 1; Instruction manual figure 1 / 18, 18 CN 121336505 A, Figure 2; Instruction manual figure 2 / 18, 19 CN 121336505 A, Figure 3; Instruction manual figure 3 / 18, 20 CN 121336505 A, Figure 4; Instruction manual figure 4 / 18, 21 CN 121336505 A, Figure 5; Instruction manual figure 5 / 18, 22 CN 121336505 A, Figure 6; Instruction manual figure 6 / 18, 23 CN 121336505 A, Figure 7A; Instruction manual figure 7 / 18, 24 CN 121336505 A, Figure 7B; Instruction manual figure 8 / 18, 25 CN 121336505 A, Figure 8; Instruction manual figure 9 / 18, 26 CN 121336505 A, Figure 9A Figure 9B, CN 121336505 A, Page 10 / 18; Figure 9C, CN 121336505 A, Page 11 / 18; Figure 9D, CN 121336505 A, Page 12 / 18; Figure 9E, CN 121336505 A, Page 14 / 18; Figure 9F, CN 121336505 A, Page 15 / 18; Figure 9G, CN 121336505 A, Page 16 / 18; Figure 9H, CN 121336505 A, Page 17 / 18; Figure 9I, CN 121336505 A, Page 18 / 18; Figure 9I, CN 121336505 A.

Claims

1. An integrated circuit structure, comprising: The first layer includes the first metal; The second layer is located on and in contact with the first layer, and the second layer includes a resistive material; A third layer, situated on and in contact with the second layer, comprises a second metal, wherein the resistive material is different from one or both of the first and second metals; and An internal component is located on and in contact with the second layer.

2. The integrated circuit structure according to claim 1, wherein the interconnect component is a solder bump or a solder ball.

3. The integrated circuit structure according to claim 1, wherein the resistivity of the resistive material is at least 20% greater than the resistivity of each of the first layer and the third layer.

4. The integrated circuit structure according to claim 1, wherein the resistive material comprises one or more of the following: (i) a third metal different from the first metal and the second metal, (ii) a metal-like substance, and (iii) the third metal and at least one of oxygen and nitrogen.

5. The integrated circuit structure according to claim 1, wherein the first metal and the second metal are the same metal.

6. The integrated circuit structure according to claim 1, wherein the first layer is in contact with or is part of the integrated circuit die, wherein the interconnect component is located between the integrated circuit die and the carrier substrate, and wherein the interconnect component is a solder bump.

7. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the carrier substrate, wherein the interconnection component is located between the carrier substrate and the integrated circuit die, and wherein the interconnection component is a solder bump.

8. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the integrated circuit package, wherein the interconnect component is located between the integrated circuit package and the printed circuit board, and wherein the interconnect component is a solder ball.

9. The integrated circuit structure of claim 1, wherein the first layer is in contact with or is part of the printed circuit board, wherein the interconnect component is located between the printed circuit board and the integrated circuit package, and wherein the interconnect component is a solder ball.

10. The integrated circuit structure of claim 1, wherein the interconnect component is a first interconnect component, and wherein the integrated circuit structure further comprises: The fourth layer includes a first metal, wherein the second layer is located on and in contact with the fourth layer, wherein the second layer extends continuously and integrally from above the first layer to above the fourth layer; A fifth layer, located above the second and fourth layers, comprising a second metal; and The second internal component is located on the fifth layer and is in contact with the fifth layer.

11. The integrated circuit structure of claim 10, wherein the first interconnect component and the second interconnect component are solder bumps or solder balls.

12. An integrated circuit structure, comprising: Device; A resistive contact pad structure is located on the device, the resistive contact pad structure comprising: (i) a lower layer including a first metal; (ii) an upper layer located on the lower layer, the upper layer including a second metal; and (iii) a resistor located between the lower layer and the upper layer, wherein the resistivity of the resistor is at least 20% greater than the resistivity of each of the lower layer and the upper layer; and Solder balls or solder bumps are located on the resistive contact pad structure and are configured to couple the device to another device.

13. The integrated circuit structure of claim 12, wherein the resistor comprises a third metal and one or both of oxygen and nitrogen, and wherein the third metal is substantially different from each of the first metal and the second metal.

14. The integrated circuit structure according to claim 12, wherein the resistive contact pad structure is a first resistive contact pad structure, wherein the lower layer is a first lower layer, wherein the upper layer is a first upper layer, and wherein the integrated circuit structure further comprises: A second resistive contact pad structure is located on the device and is laterally adjacent to the first resistive contact pad structure. The second resistive contact pad structure includes: (i) a second lower layer including the first metal, (ii) a second upper layer located on the second lower layer including the second metal, and (iii) a resistor located between the second lower layer and the second upper layer. The resistor extends continuously and integrally from between the first upper layer and the first lower layer to between the second upper layer and the lower layer, and the resistor is part of both the first resistive contact pad structure and the second resistive contact pad structure.

15. The integrated circuit structure according to claim 12, further comprising: A non-resistive contact pad structure is laterally adjacent to the resistive contact pad structure. The non-resistive contact pad structure includes a film layer containing the first metal, wherein the bottom surface of the film layer of the non-resistive contact pad structure is coplanar with the bottom surface of the lower layer of the resistive contact pad structure, and wherein the non-resistive contact pad structure has no resistor.

16. The integrated circuit structure of claim 15, wherein the solder bump or solder ball is a first solder ball or solder bump, and wherein the integrated circuit structure further comprises: The second solder ball or solder bump is located on the film layer of the non-resistive contact pad structure; The lower surface of the second solder ball or solder bump is located on a first horizontal plane, which is lower than the second horizontal plane of the lower surface of the second solder ball or solder bump.

17. The integrated circuit structure of claim 12, wherein the device is one of an integrated circuit die, an integrated circuit package, and a printed circuit board.

18. A method for forming a resistive contact pad structure and a non-resistive contact pad structure of an integrated circuit, comprising: A first pad and a laterally adjacent second pad are formed on the device; A resistor is formed on the first pad, but no resistor is formed on the second pad; A third pad is formed on the resistor and located on the first pad, wherein the combination of the first pad, the resistor and the third pad forms the resistive contact pad structure of the device, and wherein the second pad forms the non-resistive contact pad structure of the device.

19. The method of claim 18, further comprising: The first inner component of the third pad and the second inner component of the second pad are deposited, wherein each of the first inner component and the second inner component is a corresponding solder bump or solder ball.

20. The method of claim 18, further comprising: A fourth pad is formed on the device, laterally adjacent to the first and second pads, wherein forming a resistor includes: forming (i) a first portion of the resistor located on the first pad, and (ii) a second portion of the resistor located on the fourth pad, wherein the first and second portions of the resistor are parts of an integral transistor structure; and A fifth pad is formed on the second portion of the resistor and on the fourth pad, wherein The combination of the fourth pad, the second part of the resistor, and the fifth pad forms another resistive contact pad structure of the device.

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