Process for producing semiconductor wafers with epitaxial layer deposited from the gas phase in a deposition chamber

IL307321A1Pending Publication Date: 2026-07-01SILTRONIC AG
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
IL · IL
Patent Type
Applications
Current Assignee / Owner
SILTRONIC AG
Filing Date
2022-03-28
Publication Date
2026-07-01

AI Technical Summary

Technical Problem

The existing methods for producing semiconductor wafers with epitaxial layers face issues with uniformity of the layer thickness, particularly at the edge region, due to misalignment of substrate wafers on the susceptor during deposition, leading to increased edge waste and particle formation, as the correction specification for positional deviations is not accurately calculated.

Method used

A method is introduced where the correction specification for the first substrate wafer after chamber etching is calculated using only the positional deviations of previously coated substrate wafers that were the first to be coated after etching, averaging the deviations of at least 3 to 10 such wafers to ensure precise centering, reducing thermal stress-induced misalignment and improving edge geometry.

Benefits of technology

This approach enhances the uniformity of the epitaxial layer thickness and reduces particle formation by accurately centering the substrate wafer on the susceptor, improving the edge geometry and reducing edge waste in semiconductor wafers.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000010_0000
    Figure 00000010_0000
  • Figure 00000011_0000
    Figure 00000011_0000
  • Figure 00000012_0000
    Figure 00000012_0000
Patent Text Reader

Abstract

Disclosed is a process for manufacturing semiconductor wafers containing a gas-phase epitaxial layer in a deposition chamber, involving removing, from the deposition chamber by etching the deposition chamber, material settled in the deposition chamber during preceding coating processes; performing successive coating operations in the etched deposition chamber, each of said coating operations involving having a robot place a substrate wafer on a susceptor having a circular circumference, the robot moving the substrate wafer into a drop-off position and placing it on the susceptor, the center of the substrate wafer not lying over the center of the susceptor in the drop-off position because of a predefined corrective parameter; and depositing an epitaxial layer on the substrate wafer such that a semiconductor wafer cointaining an epitaxial layer is produced, characterized in that for each first substrate wafer moved by the robot into the drop-off position, the value of the predefined corrective parameter corresponds to a mean value of differences in the positions of a number of previously coated substrate wafers which had been the first substrate wavers to be coated following a preceding chamber etching operation.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Method for producing semiconductor wafers with an epitaxial layer deposited from the gas phase in a deposition chamber

[0002] The invention relates to a method for producing semiconductor wafers with an epitaxial layer deposited from the vapor phase in a deposition chamber. Semiconductor wafers with an epitaxial layer are required for the production of electronic components. The deposition of the epitaxial layer typically takes place in a deposition chamber designed as a single-wafer reactor. The substrate wafer to be coated is placed on a susceptor, and a deposition gas at a deposition temperature is passed through the deposition chamber over the substrate wafer, which rotates with the susceptor.

[0003] A quality criterion of semiconductor wafers with an epitaxial layer is the uniformity of the thickness of the epitaxial layer, especially in the edge region of the semiconductor wafer.

[0004] State of the art / problems

[0005] WO 2017 102597 A1 is specifically dedicated to the task of improving the edge geometry of a semiconductor wafer with an epitaxial layer. It was found that after a typically regularly performed etching of the deposition chamber (chamber etching) to remove material that has deposited in the deposition chamber during previous coating processes, edge drop in semiconductor wafers with an epitaxial layer subsequently produced in the deposition chamber increases from coating process to coating process.

[0006] JP 2016213218 A describes a method for producing semiconductor wafers from single-crystal silicon with an epitaxial layer of single-crystal silicon. It is recommended that a robot that places the substrate wafer on the susceptor of a deposition reactor be moved to a placement position in which the center of the substrate wafer is not located above the center of the susceptor due to a correction specification. It has been found that otherwise, the substrate wafers are, on average, not centered on the susceptor during deposition of the epitaxial layer. If the substrate wafer is not concentrically positioned in the pocket of the susceptor during deposition of the epitaxial layer, this has a detrimental effect on the uniformity of the epitaxial layer thickness.Furthermore, such misalignment can result in undesirable particle formation, especially if it involves contact between the edge of the substrate wafer and the susceptor. The correction specification is derived from a mean value that describes the average deviation of the position of the center of the substrate wafers from the center of the susceptor during previous coating processes. Linked to the correction specification is the expectation of achieving a position of the center of the substrate wafer during a coating process that is closer to the center of the susceptor by the amount of the average deviation than if the correction specification were omitted.

[0007] The inventor of the present invention has found that setting the correction specification which is based solely on the positional deviation of substrate wafers during previous coating processes is in need of improvement.

[0008] The object of the invention is achieved by a method for producing semiconductor wafers with an epitaxial layer deposited from the gas phase in a deposition chamber, comprising the removal of material from the deposition chamber which has deposited in the deposition chamber during previous coating processes by means of etching the deposition chamber; successive coating processes in the etched deposition chamber, each comprising the placement of a substrate wafer on a susceptor with a circular circumference by a robot, wherein the robot moves the substrate wafer into a placement position and places it on the susceptor, wherein in the placement position the center of the substrate wafer does not lie above the center of the susceptor due to a correction specification;and depositing an epitaxial layer on the substrate wafer, whereby a semiconductor wafer with an epitaxial layer is produced, characterized in that for each first substrate wafer which is moved into the deposit position by the robot after the etching of the deposition chamber, the amount of the correction specification corresponds to an average value of positional deviations of a number of previously coated substrate wafers which themselves were each coated first after a previous chamber etching;

[0009] Before the first coating process after a chamber etch, the deposition chamber is in a state where incoming radiation energy causes a faster temperature rise than before the second and subsequent coating processes. As a result, the expected misalignment of the substrate wafer is more pronounced, especially for the first substrate wafer after a chamber etch, than for substrate wafers coated subsequently.

[0010] It is therefore proposed that, when calculating the correction specification for the first substrate wafer to be coated after a chamber etch, only positional deviations of substrate wafers from previous coating processes be considered. These deviations were measured for substrate wafers that were themselves the first substrate wafer after a chamber etch. Such substrate wafers are referred to as substrate wafers of the first category below. The correction specification is calculated by averaging the positional deviations. The term positional deviation describes the deviation of the position of the center of a deposited substrate wafer relative to the center of the susceptor.

[0011] Preferably, the positional deviations of at least three substrate wafers of the first category, particularly preferably the positional deviations of five to ten such substrate wafers, are used to calculate the mean value (arithmetic mean). Preferably, the chamber etching steps that preceded the substrate wafers of the first category themselves immediately preceded the chamber etching step followed by the coating of the first substrate wafer to be coated.

[0012] It is fundamentally possible to calculate a separate correction specification for each category of substrate wafers based on the model of the substrate wafers of the first category. However, for substrate wafers that are not the first after a chamber etch, it is usually sufficient to calculate a correction specification based on positional deviations from substrate wafers from other previous coating processes that were not the first coating processes after a chamber etch.

[0013] Substrate wafers on which an epitaxial layer is deposited according to the invention are semiconductor wafers containing a dopant, preferably substrate wafers made of single-crystal silicon.

[0014] The invention is described in more detail below with reference to drawings.

[0015] Short description of the characters

[0016] Fig. 1 shows a sectional view of a device for depositing an epitaxial layer from the gas phase onto a substrate wafer with typical features.

[0017] Fig. 2 shows the positions of a first and second mean value of positional deviations of substrate wafers of the first category and another category relative to the center of the susceptor.

[0018] Fig. 3 shows the distribution of the centers of substrate wafers of the first category after deposition on the susceptor relative to the center of the susceptor in a polar coordinate grid.

[0019] Fig. 4 shows the distribution of the centers of substrate wafers of a different category after deposition on the susceptor relative to the center of the susceptor in a polar coordinate grid. List of reference symbols used

[0020] I upper lid 2 lower lid

[0021] 3 Separation chamber

[0022] 4 Substrate disc

[0023] 5 Susceptor

[0024] 6 Preheating ring 7 Upper lining

[0025] 8 lower lining

[0026] 9 upper gas inlet openings

[0027] 10 Center of the susceptor

[0028] II upper gas outlet 12 lower gas inlets

[0029] 13 lower gas outlet

[0030] 14 second middle position of the center of deposited substrate discs

[0031] 15 first middle position of the center of deposited substrate discs

[0032] 16 Vector 17 Vector

[0033] Detailed description of embodiments according to the invention

[0034] The apparatus shown in Fig. 1 for depositing an epitaxial layer on a substrate wafer comprises a deposition chamber 3 with an upper lid 1 and a lower lid 2, as well as upper and lower linings 7 and 8 enclosing a reaction space. Upper and lower lamp banks located outside the deposition chamber 3 are not shown. The radiant energy of the lamps heats the deposition chamber to the temperature required for vapor deposition.

[0035] For a coating process, a substrate wafer 4 is placed on a susceptor 5, which is rotatably supported from below by arms of a support. The substrate wafer is first placed on an end effector of a robot, which then moves it to a deposit position. A preheating ring 6 is arranged around the susceptor. The substrate wafer 4 can be placed on the susceptor 5 using lifting pins that extend through the susceptor 5 and lifted away from the susceptor 5 after coating.

[0036] During coating of the substrate wafer 4, deposition gas is passed through upper gas inlet openings 9 provided in the upper lining 7 into the deposition chamber 3 along a flow direction over the substrate wafer to an upper gas outlet 11. Furthermore, lower gas inlet openings 12 and a lower gas outlet 13 can optionally be provided to direct a purge gas beneath the susceptor 5 to the lower gas outlet 13.

[0037] If the robot's placement position is set so that the center of the substrate wafer is perpendicular to the center of the susceptor, there is a comparatively high probability that the substrate wafer's center will not be in the center of the susceptor after placement. This is primarily due to thermal stresses that are released, causing the center of the substrate wafer to shift from its intended position.

[0038] It has now been discovered that the amount of displacement from the center of the susceptor increases the fewer coating processes completed since the last chamber etching. According to the invention, this finding is taken into account when calculating the correction specification, which co-determines the placement position to which the robot moves a substrate wafer before it is placed on the susceptor. The correction specification is calculated for the first substrate wafer to be coated after a chamber etching by averaging positional deviations of previously coated substrate wafers. Only positional deviations of substrate wafers in the first category are used for the calculation, i.e., substrate wafers that were themselves the first to be coated after a chamber etching.

[0039] Without the proposed averaging based on the first category, non-specific averaging of positional deviations would result in a correction specification that would be less accurate because the specific manifestation of the positional deviation would be averaged out immediately after a chamber etch. However, the correction specification should be as accurate as possible because a centered position of the substrate wafer on the susceptor has a beneficial effect on the edge geometry of the resulting semiconductor wafer with an epitaxial layer and also reduces the risk of particles being generated during the deposition of the epitaxial layer.

[0040] Fig. 2 shows a substrate wafer 4 placed on a susceptor 5 such that the center 10 of the susceptor 5 and the center of the substrate wafer 4 coincide. In this target position, the substrate wafer 4 lies concentrically with the susceptor 5 and the preheating ring 6. Without a correction specification, the center of the substrate wafer would lie at or near the middle position calculated for this category, depending on whether it belongs to the first or another category, for example at or near the first middle position 15 in the case of belonging to the first category or at or near the second middle position 14 in the case of belonging to another category. In the drawing, positions 14 and 15 are placed unrealistically far from the center 10 of the susceptor in order to be able to illustrate the invention.In fact, typical positional deviations are not more than 1000 pm from the center 10 of the susceptor.

[0041] The first middle position 15 is at a distance from the center 10 of the susceptor 5 that corresponds to the length of vector 17. The second middle position 14 is at a distance from the center 10 of the susceptor 5 that corresponds to the length of vector 16. If vector 16 or vector 17 is shifted so that its beginning coincides with the center 10 of the susceptor, the tip of the vector points to the placement position into which the robot must move the substrate wafer with its center so that an expected positional deviation is compensated. Vector 17 therefore represents the correction specification for the robot with respect to the first substrate wafer to be coated after a chamber etch, and vector 16 represents the correction specification for the robot with respect to substrate wafers of other categories.

[0042] Figures 3 and 4 show the measured positional deviations in a polar coordinate grid of boron-doped, single-crystal silicon substrate wafers with a diameter of 300 mm for substrate wafers of the first category (number of coating processes since the last chamber etching is zero) and for substrate wafers of another category (number of coating processes since the last chamber etching is seven). A comparison of the displayed positional deviation distributions clearly shows that the magnitude of the positional deviation is significantly more pronounced for substrate wafers of the first category that were coated immediately after a chamber etching.

Claims

Patent claims 1. A method for producing semiconductor wafers with an epitaxial layer deposited from the gas phase in a deposition chamber, comprising removing material from the deposition chamber that has accumulated in the deposition chamber during previous coating processes by etching the deposition chamber; successive coating processes carried out in the etched deposition chamber, each comprising depositing a substrate wafer onto a susceptor with a circular circumference by a robot, wherein the robot moves the substrate wafer into a deposit position and places it on the susceptor, wherein in the deposit position the center of the substrate wafer is not located above the center of the susceptor due to a correction specification;and the deposition of an epitaxial layer on the substrate disk, wherein a semiconductor disk with an epitaxial layer is formed, characterized in that for each first substrate disk which is moved by the robot to the deposit position after etching of the deposition chamber, the amount of the correction specification corresponds to an average value of positional deviations of a number of previously coated substrate disks, which themselves were each the first to be coated after a previous chamber etching.

2. Method according to claim 1, characterized in that the number of previously coated substrate discs is at least three.