Signal processing circuit and method

Abstract

Provided are a signal processing circuit and method. The signal processing circuit (200) comprises at least two signal collection circuits (211, 212, 213, 214), a switch circuit (220), an analog circuit (230) and a control circuit (240), wherein the at least two signal collection circuits (211, 212, 213, 214) are used for collecting at least two target signals; the switch circuit is used for controlling a connection between the at least two signal collection circuits (211, 212, 213, 214) and the analog circuit (230), such that target signals collected by only some of the at least two signal collection circuits (211, 212, 213, 214) are transmitted to the analog circuit (230) at the same time; the analog circuit (230) is used for processing the target signals received thereby; and the control circuit (240) is used for receiving the target signals processed by the analog circuit, and sampling the processed target signals.

Description

TECHNICAL FIELD

[0001] The application relates to the field of circuit design, and in particular, tocircuits, methods, and systems for acquiring and processing physiological signals.BACKGROUND

[0002] As people pay more and more attention to sports science and physiologicalhealth, the demand for wearable physiological signal monitoring equipment alsoincreases. Generally speaking, a single physiological signal monitoring apparatuscan only acquire physiological signals of one signal source at the same time, butcannot satisfy the acquisition of multiple signal sources, so that the reference valueof the monitoring results is limited. In addition, the acquisition and processing ofmultiple signal sources may cause the circuit module to be bulky and requireadvanced hardware at higher costs.

[0003] Therefore, the present disclosure provides time-division multiplex signalprocessing circuits and methods which can save space, cost and reduce hardwarerequirements while ensuring the acquisition and processing of multiple signalsources.SUMMARY

[0004] One embodiment of the present disclosure provides a signal processingcircuit. The signal processing circuit may include a control circuit, a switch circuit,an analog circuit, and at least two signal acquisition circuits. The at least two signalacquisition circuits may be configured to acquire at least two-channel target signals.The switch circuit may be configured to control conduction between the at least twosignal acquisition circuits and the analog circuit, so that the target signal acquiredby a part of the at least two signal acquisition circuits may be transmitted to theanalog circuit at the same time. The analog circuit may be configured to process thereceived target signal. The control circuit may be configured to receive theprocessed target signal, and sample the processed target signal.

[0005] In some embodiments, the switch circuit may include a plurality of inputchannels, each of the at least two signal acquisition circuits may be connected withan input channel independently, and the switch circuit may gate one input channelfor conduction between the at least two signal acquisition circuits and the analogcircuit based on control signal of the control circuit at the same time.

[0006] In some embodiments, each of the at least two-channel target signals mayinclude a target frequency, and a sampling frequency of each of the processed targetsignal by the control circuit may be not less than twice of the target frequency.

[0007] In some embodiments, the control circuit may reconstruct each of thetarget signal based on a sampling result.

[0008] In some embodiments, the control circuit may switch a switch of the switchcircuit based on a sum of sampling frequencies of the at least two-channel targetsignals.

[0009] In some embodiments, the control circuit may switch a switch of the switchcircuit based on a preset frequency.

[0010] In some embodiments, the control circuit may obtain strength informationof each of the target signal based on a sampling result.

[0011] In some embodiments, the analog circuit may include a differentialamplifier, and the switch circuit may be a switch chip with dual outputs.

[0012] In some embodiments, the analog circuit may further include a filter circuit.

[0013] In some embodiments, the sampling the processed target signal by thecontrol circuit may be performed after the control circuit starts to receive theprocessed target signal for a time period.

[0014] One embodiment of the present disclosure provides a signal processingmethod. The signal processing method may include acquiring, by at least two signalacquisition circuits, at least two-channel target signals. The signal processingmethod may include controlling, by a switch circuit, conduction between the at leasttwo signal acquisition circuits and the analog circuit, so that the target signalacquired by a part of the at least two signal acquisition circuits may be transmittedto the analog circuit at the same time. The signal processing method may includeprocessing, by an analog circuit, the received target signal. The signal processingmethod may include receiving, by a control circuit, the processed target signal, andsampling the processed target signal.

[0015] In some embodiments, the switch circuit may include a plurality of inputchannels while each of the at least two signal acquisition circuits may be connectedwith an input channel independently and the switch circuit may gate one inputchannel for conduction between the at least two signal acquisition circuits and theanalog circuit based on control signal of the control circuit at the same time.

[0016] In some embodiments, each of the at least two-channel target signals mayinclude a target frequency, and a sampling frequency of each of the processed targetsignal by the control circuit may be not less than twice of the target frequency.

[0017] In some embodiments, the method may include reconstructing, by thecontrol circuit, each of the target signal based on a sampling result.

[0018] In some embodiments, the method may include switching, by the controlcircuit, a switch of the switch circuit based on a sum of sampling frequencies of theat least two-channel target signals.

[0019] In some embodiments, the control circuit may switch a switch of the switchcircuit based on a preset frequency.

[0020] In some embodiments, the method may include obtaining, by the controlcircuit, strength information of each of the target signal based on a sampling result.

[0021] In some embodiments, the analog circuit may include a differentialamplifier, the switch circuit may be a switch chip with dual outputs, and the methodmay include amplifying, by the differential amplifier, the received target signal.

[0022] In some embodiments, the analog circuit may further include a filter circuit,and the method may include performing, by the filter circuit, filtering processingon the received target signal.

[0023] In some embodiments, the sampling the processed target signal by thecontrol circuit may be performed after the control circuit starts to receive theprocessed target signal for a time period.

[0024] One embodiment of the present disclosure may provide a signal processingapparatus. The signal processing apparatus may include a processor. The processormay be configured to execute the above-mentioned signal processing method.

[0025] One embodiment of the present disclosure may provide a non-transitorycomputer-readable storage medium storing a set of instructions, when executed byat least one processor, causing the at least one processor to execute the abovementioned signal processing method.BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The present disclosure may be further described by way of exemplaryembodiments, which may be described in detail by means of the accompanyingdrawings. These embodiments are not limiting, and in these embodiments, the samenumbers refer to the same structures, wherein:

[0027] FIG. 1 is a schematic diagram of a signal processing circuit according tosome embodiments of the present disclosure;

[0028] FIG. 2 is a schematic diagram of a signal processing circuit according tosome embodiments of the present disclosure;

[0029] FIG. 3 is an exemplary flowchart of a signal processing method accordingto some embodiments of the present disclosure;

[0030] FIGs. 4A-4B are exemplary images of baseline drift problems accordingto some embodiments of the present disclosure;

[0031] FIGs. 5A-5C are exemplary circuit diagrams of a reference potentialcontrolled by program according to some embodiments of the present disclosure;

[0032] FIGS. 6A-6B are exemplary images of the channel crosstalk problemaccording to some embodiments of the present disclosure.DETAILED DESCRIPTION

[0033] In order to more clearly illustrate the technical solutions of theembodiments of the present disclosure, the following will briefly introduce thedrawings that demand to be used in the description of the embodiments. Obviously,the drawings in the following description are only some examples or embodimentsof the disclosure. For those of ordinary skill in the art, without creative work, thedisclosure may be applied to other similar scenarios according to these drawings.Unless it is obvious from the language environment or otherwise stated, the samereference numbers in the drawings represent the same structure or operation.

[0034] It should be understood that the "system", "apparatus", "unit" and / or"module" used herein is a method for distinguishing different components, elements,parts, portions, or assemblies of different levels. However, if other words mayachieve the same purpose, the words may be replaced by other expressions.

[0035] As shown in the present disclosure and the claims, unless the contextclearly suggests exceptional circumstances, the words "a", "an", and / or "the" do notonly specifically refer to the singular form, but also include the plural form; theplural form may be intended to include the singular form as well. Generallyspeaking, the terms "including," "includes," "include," "comprise," "comprises,"and "comprising," only suggest that the operations and / or elements that have beenclearly identified are included, but these operations and / or elements do notconstitute an exclusive list, and the method, system, or apparatus may also includeother operations or elements.

[0036] Flowcharts are used in the present disclosure to describe operationsperformed by a system according to an embodiment of the present disclosure. Itshould be understood that the preceding or following operations are not necessarilyperformed in the exact order. Instead, the various operations may be processed inreverse order or simultaneously. Also, other operations may be added to theseprocedures, or an operation or operations may be removed from these procedures.

[0037] The signal processing circuit and method described in the embodiments ofthe present disclosure may be applied to a signal monitoring apparatus that needsto acquire multiple signal sources, especially a physiological signal monitoringapparatus, such as a smart wearable apparatus. In some embodiments, the smartwearable apparatus (e.g., clothing, wristbands, shoulder straps, etc.) may be set onvarious parts (e.g., calves, thighs, waist, back, chest, shoulders, neck, etc.) of ahuman body, which is used to acquire physiological signals of various parts of theuser's body in different states, and process the acquired signals. In someembodiments, the physiological signals may be signals that can be detected andreflect states of the body. For example, the physiological signals may includevarious signals such as respiratory signals, electrocardiograms (ECG),electromyographic signals (EMGs), blood pressure signals, and temperaturesignals. In some embodiments, a frequency range of the physiological signal maybe 0.05 Hz-2 kHz, the frequency range of the ECG signal may be 0.05 Hz-100 Hz,and the frequency range of the EMG may be 5 Hz-2 kHz.

[0038] FIG. 1 is a schematic diagram of a signal processing circuit according tosome embodiments of the present disclosure.

[0039] As shown in FIG. 1, the signal processing circuit 100 may realize theacquisition and processing of multiple physiological signals. Specifically, the signalprocessing circuit 100 may be respectively configured with corresponding signalacquisition circuits and analog circuit for different signal sources. For example, asignal acquisition circuit 111 (112, 113, 114) may include one or more electrodesin contact with a user's body, and the EMGs on the user's body surface may beacquired through the electrodes. The EMG s acquired by the signal acquisitioncircuit 111 (112, 113, 114) may be transmitted to an analog circuit 131 (132, 133,134) for proper processing (e.g., a noise reduction, an amplification, etc.), and theprocessed EMGs may be transmitted to a control circuit (MCU) 140 for signalanalysis. In this case, the control circuit 140 may need to have analog-to-digitalconversion channels (i.e., ADC channels) corresponding to multiple signal sources.In some embodiments, the analog circuit may include elements such as differentialamplifiers, multi-stage amplifier circuits, and filter circuits. Since the cost of eachelement is not cheap, arranging a plurality of analog circuit in the signal processingcircuit 100 may make the circuit structure too complicated and bulky, and generatehigher cost. In addition, due to the large number and the large volume of channelsof the analog circuit, the circuit layout may also be limited, which may causeproblems such as channel crosstalk. For the control circuit 140, it is necessary tohave higher requirements for its pins, but the number of ADC channels of the actualcontrol chip is very limited. For example, taking the control chip with modelSTM32L476 as an example, only 16 ADC channels are available.

[0040] FIG. 2 is a schematic diagram of a signal processing circuit according tosome embodiments of the present disclosure.

[0041] The signal processing circuit 200 shown in FIG. 2 may also realize theacquisition and processing of multiple physiological signals. Compared with thesignal processing circuit 100, the signal processing circuit 200 adopts the timedivision multiplexing method to save space cost and reduce hardware requirementswhile ensuring the acquisition and processing of multiple signal sources.Specifically, the signal processing circuit 200 may include at least two signalacquisition circuits (e.g., signal acquisition circuits 211, 212, 213, and 214), aswitch circuit 220, an analog circuit 230, and a control circuit 240. The switchcircuit 220 may be arranged between the multiple signal acquisition circuits and theanalog circuit 230, and may be configured to control a conduction state of eachsignal acquisition circuit and the analog circuit 230. For example, at a certain timepoint, the switch circuit 220 may conduct the signal acquisition circuit and theanalog circuit 230. Within a certain time range, the switch circuit 220 maycyclically conduct various signal acquisition circuits and the analog circuit 230 ina periodic manner. When the switch circuit 220 conducts a certain signal acquisitioncircuit and the analog circuit 230,signals(e.g., EMGs) acquired by the signal circuitmay be transmitted to the analog circuit 230 for processing (e.g., a noise reduction,an amplification, etc.), and the processed signals may be transmitted to the controlcircuit 240 for signal analysis. It can be understood that, by arranging the switchcircuit 220 between the multiple signal acquisition circuits and the analog circuit230, the same analog circuit may process the signals of different signal acquisitioncircuits at different time points, which may effectively reduce the complexity andcost of using multiple analog circuit, and also reduce the number of channels forsignal transmission between subsequent analog circuit and control circuits. It shouldbe known that the switch circuit 220 and the analog circuit 230 shown in FIG. 2 areonly for the purpose of illustration. In actual use, more than one switch circuit oranalog circuit may also be used between the multiple signal acquisition circuits andthe control circuit 240, and these switch circuits or analog circuit may still realizethe process similar to the above description.

[0042] In some embodiments, the at least two signal acquisition circuits may beconfigured to acquire at least two-channel target signals. The target signals may bephysiological signals capable of reflecting a user's physical state, for example, oneor more signals among respiratory signals, electrocardiograms (ECG), EMGs,blood pressure signals, temperature signals, or the like. As an example only,different signal acquisition circuits may respectively include one or more electrodesin contact with the user's body, the EMGs on the user's body surface may beacquired through the electrodes. Different signal acquisition circuits may bearranged in different positions of the user's body for acquiring physiological signalsof the same or different types of users. For example, the signal acquisition circuitsarranged on different sides of the user's thighs may all be configured to acquire theelectromyography signals at the thighs. For another example, the signal acquisitioncircuits arranged at the forearm of the user may be configured to acquire the EMGsat the forearm, and the signal acquisition circuits arranged at the heart of the usermay be configured to acquire the electrocardiographic signals of the user. It shouldbe known that, in a certain scenario, the signal processing circuit 200 or the similarcircuits may be configured to acquire and process the above-mentioned same ordifferent physiological signals, which is not limited. In some embodiments, the atleast two signal acquisition circuits may only include two signal acquisition circuits,or may include three signal acquisition circuits, four signal acquisition circuits, ormore signal acquisition circuits. In some embodiments, a frequency range of thephysiological signal may be 0.05 Hz-2 kHz, the frequency range of the ECG signalmay be 0.05 Hz-100 Hz, and the frequency range of the EMG may be 5 Hz-2 kHz.

[0043] The control circuit 240 may sample signals processed by the analog circuit230. In some embodiments, a sampling frequency of the control circuit 240 may berelated to the number of the signal acquisition circuit, control strategies for theswitch circuit, and the target frequency. For example, the sampling frequency ofeach signal by the control circuit 240 may be not less than twice of a targetfrequency of the control circuit. As an example only, for the EMG, assuming thatthe corresponding target frequency is less than or equal to 1000 Hz, the controlcircuit may sample the EMG at a sampling frequency of 2000 Hz. For the entiresignal processing circuit, assuming that there are four signal acquisition circuits foracquiring EMGs, it is necessary to the control circuit 240 to provide a total samplingfrequency of 8000 Hz, so as to ensure that the sampling frequency of each EMGreaches 2000 Hz. For another example, as mentioned elsewhere in the presentdisclosure, the control circuit 240 may adopt a completely reconfigurable strategyand a strength characterization strategy to control a switching of the switch circuit220. In the completely reconfigurable strategy, the sampling frequency may berelated to the number of the signal acquisition circuit, a rising edge time and afalling edge time of a single channel, and the rising edge time and the falling edgetime of the single channel may be related to a magnification of the analog circuitand a slew rate of the circuit element.

[0044] In some embodiments, the switch circuit 220 may be configured to controlthe conduction between the at least two signal acquisition circuits and the analogcircuit 230, so that the target signals acquired by a part of the at least two signalacquisition circuits may be transmitted to the analog circuit 230 at the same time.An input end of the switch circuit 220 may be connected with the at least two signalacquisition circuits, and an output end of the switch circuit 220 may be connectedwith the analog circuit 230. In some embodiments, the switch circuit 220 mayinclude a plurality of input channels, and each signal acquisition circuit of the atleast two signal acquisition circuits may be connected with one input channelindependently, and the switch circuit 220 may gate one input channel forconduction between the at least two signal acquisition circuits and the analog circuitbased on control signal of the control circuit 240 at the same time.

[0045] In some embodiments, the switch circuit 220 may gate a switch chip withmultiple channels and dual-channel outputs, for example, the switch chip whosemodel is TMUX1209. As an example only, the switch circuit 220 may realize time-division multiplexing of 4 channels through 3 control pins, 1 pin EN is marked asenabling function, and the other 2 pins A1 and A0 are marked as gating channel.The 4 input channels of the switch circuit 220 may be respectively configured toconnect to the signal acquisition circuits to acquire target signals, and the outputports of the switch circuit 220 may be connected with the analog circuit 230. Insome embodiments, the gating of the switch chip may be controlled by controllingvalues of the pins (EN, A1, A0). For example, when inputting (1, 0, 0), it meansthat channel A is gated. When inputting (1, 0, 1), it means that channel B is gated.When inputting (1, 1, 0), it means that channel c is gated. When inputting (1, 1, 1),it means that channel D is gated. As an example only, when the control circuit 240gates the channel A of the switch circuit 220, the target signal corresponding to thechannel A may be connected with the analog circuit 230 and finally sampled by thecontrol circuit 240. When the sampling is successful, the control circuit 240 maygive a new control instruction, for example, an instruction (1, 0, 1) may be given togate channel B, then the target signal of channel B may be connected with theanalog circuit 230 and finally sampled by the control circuit 240, and so on. Thatis, the control circuit 240 may control the switch circuit 220 to cyclically switchbetween the multiple signal acquisition circuits, so as to achieve the function oftime-division multiplexing, that is, one analog circuit 230 may be configured toprocess multiple signal sources in time-division, thereby saving space costs andreducing hardware requirements.

[0046] In different situations, the control circuit 240 may control the switching ofthe switch circuit 220 based on different strategies.

[0047] For example, in order to enable subsequent sampling data to fully retainthe information of each target signal (that is, the control circuit 240 may reconstructeach target signal based on the sampling data), the control circuit 240 may use thecompletely reconfigurable strategy to control the switching of the switch circuit220. Under the completely reconfigurable strategy, the control circuit 240 mayswitch the input channels of the switch circuit 220 according to the total samplingfrequencies provided by the control circuits. For example, the frequency at whichthe switch circuit 220 switches the input channels may be equal to the samplingfrequency provided by the control circuit 240. In this case, the switch circuit 220switches the input channels every time, that is, a signal acquisition circuit may beconducted every time, the control circuit 240 may sample the target signals acquiredby the signal acquisition circuit once. Moreover, since the sampling frequency ofeach target signal by the control circuit 240 is more than twice of the targetfrequency, the completely reconfigurable strategy may ensure that each targetsignal has at least two sampling points in each cycle. More descriptions of thecompletely reconfigurable strategy may be found in the FIG. 3 and its relateddescriptions.

[0048] For another example, considering that the control circuit 240 may not beable to obtain valid sampling data during a fast switching of the switch channel (dueto the switching of the switch channel mentioned below, there may be certain risingedge and falling edge in the signal received by the control circuit 240), the controlcircuit 240 may adopt a strength characterization strategy to control switching ofthe switch circuit 220. Under the strength characterization strategy, the controlcircuit 240 may switch the input channels of the switch circuit 220 based on a presetfrequency. The preset frequency may be related to a cycle for the user to perform acertain action. For example, in order to analyze the EMGs generated by the muscleswhen the user performs a strength training, the preset frequency may be a certainmultiple of the frequency at which the user performs a specific action (e.g., benchpress), causing that in the cycle for the user to perform the specific action, the switchcircuit 220 may conduct each signal acquisition circuit multiple times, so that thecontrol circuit 240 may respectively perform multiple samplings on each targetsignal. Under the strength characterization strategy, the control circuit 240 mayacquire the strength information of each target signal based on a sampling result.More descriptions of the strength characterization strategy may refer to the FIG. 3and its related descriptions.

[0049] The analog circuit 230 may be configured to process the target signalsreceived by the analog circuit. In some embodiments, since an amplitude of theoriginal target signal directly acquired by the signal acquisition circuit is very smalland there is a lot of noise, it is necessary to use the analog circuit 230 to filter,differentially amplify, amplify, negative feedback and denoise the original targetsignal, etc. In some embodiments, the analog circuit 230 may include differentialamplifiers for suppressing common-mode signals and amplifying the receivedtargetsignals. In some embodiments, the analog circuit 230 may include multi-stageamplification circuits for amplifying the received target signals. In someembodiments, the analog circuit 230 may include filter circuits for filtering thereceived target signals. In some embodiments, the analog circuit 230 may includeright-leg driving circuits for extracting the common-mode signals in the targetsignals received by the analog circuit. After inverse amplification, the common-mode signals may be fed back to the signal sources, which can mainly suppress thepower frequency in the signal sources. In some embodiments, the analog circuit 230may include differential amplifiers, multi-stage amplifiers, filter circuits and right-leg driving circuits at the same time, or only one or more of them.

[0050] As mentioned above, the control circuit 240 may be configured to receivethe target signals processed by the analog circuit, and sample the processed targetsignals. In some embodiments, the control circuit 240 may include multiple ADCchannels, and each ADC channel may be configured to convert the target signalsreceived and processed by the analog circuit 230 into digital signals for reading andprocessing. In some embodiments, the control circuit 240 may also be connectedwith a display apparatus to display the read digital signals, so as to intuitively reflectsituations of the physiological signals. In some embodiments, based on thesampling, the control circuit 240 may read, store, process and analyze the targetsignals, and optionally, the control circuit 240 may also issue correspondinginstructions according to the sampled data.

[0051] In some embodiments, the sampling of each processed target signals bythe control circuit 240 may be performed after the control circuit 240 starts toreceive each processed target signals for a time period. That is, after the switchcircuit 220 switches the conduction channels, the control circuit 240 may notimmediately sample the newly-conducted target signals, or even if the controlcircuit 240 samples the newly-conducted target signals, it may not immediately usethe sampling result as a part of the target signals. When the time-divisionmultiplexing method is configured to acquire the target signals from multiple signalsources, the switching of the switch channels may cause the signals received by thecontrol circuit 240 to have certain rising edge and falling edge. The rising edge is asignal under the time required for the signal at the output end to rise to a steadystate, which is caused by a signal change at the input end. The falling edge is asignal under the time required for the signal at the output end to fall to the steadystate, which is caused by a signal change at the input end. The rising edge and fallingedge may be affected by multiple factors, including the response stabilizationspeeds of the switch circuits, the voltage slews of the chips in the circuits, and thecharging and discharging of apparatus such as capacitors in the circuits. Therefore,in order to ensure that the target signals read by the control circuit 240 are true andvalid, the sampling of the target signals may be performed after the signals arestable, that is, after the switch circuit 220 switches the conduction channels, thecontrol circuit 240 does not sample the signals during the rising edge time. If thesampling is started without waiting for enough time, the final value read by thecontrol circuit 240 may be an intermediate transition value. It can be understoodthat, if the rising edge time is fixed, even if the waiting time is insufficient, the finaltransition value may be consistent with the actual value and may be used forsubsequent processing and analysis. However, when the rising edge time is relatedto the magnitude of the voltage change, if the control circuit reads when the signalis not stabilized, the ratio of the value read by the control circuit 240 to the realvalue may be not fixed every time, which cannot be used for subsequent processing.In addition, it can be understood that, if the relationship between the transition valueand the stable value is considered clearly, or the error between the transition valueand the stable value is acceptable, then even if the waiting time is insufficient, itmay be used for subsequent processing and analysis. To sum up, the strength of thetarget signals and the gains of the circuit should be considered to obtain themaximum rising edge time as a reference for the waiting time of the control circuit240. Specifically, the reference time not less than the maximum rising edge timemay be set, and the sampling of each target signal by the control circuit 240 may beperformed after the reference time when the control circuit 240 starts to receive thetarget signal, or the sampling of the target signal by the control circuit 240 may beperformed after reference time when the switch circuit switches the conductionchannels every time.

[0052] FIG. 3 is an exemplary flowchart of a signal processing method accordingto some embodiments of the present disclosure. In some embodiments, process 300may be implemented by the signal processing circuit 200.

[0053] In operation 310, acquiring at least two-channel target signals by at leasttwo signal acquisition circuits. In some embodiments, the operation 310 may beimplemented by at least two signal acquisition circuits (e.g., signal acquisitioncircuits 211, 212, 213, and 214) of the signal processing circuit 200.

[0054] In some embodiments, the at least two signal acquisition circuits may beconfigured to acquire the at least two-channel target signals. The target signals maybe physiological signals capable of reflecting a user's physical state, for example,one or more signals among respiratory signals, electrocardiograms (ECG), EMGs,blood pressure signals, temperature signals, or the like. As an example only,different signal acquisition circuits may respectively include one or more electrodesin contact with the user's body, the EMGs on the user's body surface may beacquired through electrodes. Different signal acquisition circuits may be arrangedin different positions of the user's body for acquiring physiological signals of thesame or different types of users. For example, the signal acquisition circuitsarranged on different sides of the user's thighs may all be configured to acquire theelectromyography signals at the thighs. For another example, the signal acquisitioncircuits arranged at a forearm of the user may be configured to acquire the EMGsat the forearm, and the signal acquisition circuits arranged at a heart of the user maybe configured to acquire the electrocardiographic signals of the user. It should beknown that, in a certain scenario, the signal processing circuit 200 or the similarcircuits may be configured to acquire and process the above-mentioned same ordifferent physiological signals, which is not limited. In some embodiments, the atleast two signal acquisition circuits may only include two signal acquisition circuits,or may include three signal acquisition circuits, four signal acquisition circuits, ormore signal acquisition circuits. In some embodiments, a frequency range of thephysiological signal may be 0.05 Hz-2 kHz, the frequency range of the ECG signalmay be 0.05 Hz-100 Hz, and the frequency range of the EMG may be 5 Hz-2 kHz.

[0055] In operation 320, controlling conduction between the at least two signalacquisition circuits and the analog circuit by a switch circuit,so that the target-signalacquired by a part of the at least two signal acquisition circuits is transmitted to theanalog circuit at the same time. In some embodiments, the operation 320 may beimplemented by a switch circuit 220 of the signal processing circuit 200.

[0056] In some embodiments, an input end of the switch circuit 220 may beconnected with the at least two signal acquisition circuits, and an output end of theswitch circuit 220 may be connected with the analog circuit 230. In someembodiments, the switch circuit 220 may include a plurality of input channels, andeach of the at least two signal acquisition circuits may be connected with an inputchannel independently, and the switch circuit 220 may gate one input channel forconduction between the at least two signal acquisition circuits and the analog circuitbased on control signal of the control circuit at the same time.

[0057] In some embodiments, the switch circuit may implement the conductionbetween the signal acquisition circuits and the analog circuit based on the controlinstructions of the control circuits. Taking the time-division multiplexing of 4channels described above as an example, when the control circuit 240 gates thechannel A of the switch circuit 220, the target signals corresponding to the channelA may be connected with the analog circuit 230, and finally sampled by the controlcircuit 240. When the sampling is successful, the control circuit 240 may give anew control instruction, for example, an instruction may be given to gate channelB, then the target signal of channel B may be connected with the analog circuit 230and finally sampled by the control circuit, and so on. That is, the control circuit 240may control the switch circuit 220 to cyclically switch between the multiple signalacquisition circuits, so as to achieve the function of time-division multiplexing, i.e.,one analog circuit 230 may be configured to process multiple signal-sources in time-division, thereby saving space costs and reducing hardware requirements.

[0058] In operation 330, processing the received target signal by an analog circuit.In some embodiments, the operation 320 may be implemented by the analog circuit230 of the signal processing circuit 200.

[0059] In some embodiments, since the amplitude of the original target signalsdirectly acquired by the signal acquisition circuits is very small, and there is a largeamount of noise, it is necessary to use the analog circuit 230 to filter, differentiallyamplify, amplify, negative feedback and denoise the original target signals, etc. Insome embodiments, the analog circuit 230 may include differential amplifiers forsuppressing common-mode signals and amplifying the received target signals. Insome embodiments, the analog circuit 230 may include multi-stage amplificationcircuits for amplifying the received target signals. In some embodiments, the analogcircuit 230 may include filter circuits for filtering the received target signals. Insome embodiments, the analog circuit 230 may include right-leg driving circuits forextracting the common-mode signals in the target signals received by the analogcircuit. After inverse amplification, the common-mode signals may be fed back tothe signal sources, which can mainly suppress the power frequency in the signalsources. In some embodiments, the analog circuit 230 may include differentialamplifiers, multi-stage amplifiers, filter circuits and right-leg driving circuits at thesame time, or only one or more of them.

[0060] In some embodiments, considering the situation that there may be baselinedrift, the baseline drift problems may be solved by reducing the gains of the analogcircuit to the target signals (i.e., reducing the magnification in the analog circuit),and / or gating a control chip with a high-precision ADC channel, and / or choosingto use resistance to adjust the reference potential, and / or the baseline drift may befiltered out by choosing to add high-pass filtering in the analog circuit 230. Moredescriptions of how to solve the baseline drift problems may refer to FIGs. 4A-4Band FIGs. 5A-5C and their related descriptions thereof.

[0061] In operation 340, receiving the processed target signal, and sampling theprocessed target signal by a control circuit. In some embodiments, the operation320 may be implemented by the control circuit 240 of the signal processing circuit200.

[0062] In some embodiments, the control circuit 240 may include multiple ADCchannels, and each ADC channel may be configured to convert the received targetsignals processed by the analog circuit 230 into digital signals for reading andprocessing. In some embodiments, the control circuit 240 may also be connectedwith a display apparatus to display the read digital signals, so as to intuitively reflectthe situations of the physiological signals. In some embodiments, the control circuit240 may read, store, process and analyze the target signals based on the sampling.Optionally, the control circuit 240 may also issue corresponding instructionsaccording to the sampled data.

[0063] In some embodiments, the sampling of each processed target signal by thecontrol circuit 240 may be performed after the control circuit 240 starts to receiveeach processed target signals for a time period. That is, after the switch circuit 220switches the conduction channel, the control circuit 240 does not immediatelysample the newly-conducted target signals, or even if the control circuit 240samples the newly-conducted target signals, it does not immediately use thesampling results as a part of the target signals.

[0064] In some embodiments, the sampling frequency of the control circuit 240may be related to a number of the signal acquisition circuit, a type of the targetsignal, and a target frequency. For example, the sampling frequency of each of theprocessed target signal by the control circuit 240 may be not less than twice of thetarget frequency of the control circuit. As an example only, for the EMG, assumingthat the corresponding target frequency is less than or equal to 1000 Hz, the controlcircuit may sample the EMG at a sampling frequency of 2000 Hz. For the entiresignal processing circuit, assuming that there are 4 acquisition circuits for acquiringEMGs, it is necessary to the control circuit 240 to provide a total samplingfrequency of 8000 Hz, so as to ensure that the sampling frequency of each EMGreaches 2000 Hz.

[0065] In different situations, the control circuit 240 may control the switching ofthe switch circuit 220 based on different strategies.

[0066] In some embodiments, in order to enable subsequent sampling data to fullyretain the information of each target signal (that is, the control circuit 240 mayreconstruct each target signal based on the sampling data), the control circuit 240may use a completely reconfigurable strategy to control the switching of the switchcircuit 220. Under the completely reconfigurable strategy, the control circuit 240may switch the input channels of the switch circuit 220 according to the totalsampling frequency provided by the control circuit. For example, the frequency atwhich the switch circuit 220 switches input channels may be equal to the samplingfrequency provided by the control circuit 240. In this case, the switch circuit 220switches the input channels every time, that is, a signal acquisition circuit isconducted every time, the control circuit 240 may sample the target signals acquiredby the signal acquisition circuits once. Moreover, since the sampling frequency ofeach target signal by the control circuit 240 is more than twice of the targetfrequency, the completely reconfigurable strategy may ensure that each targetsignal has at least two sampling points in each cycle.

[0067] Continuing to take four signal acquisition circuits for collecting EMGs asan example, assuming that the target frequency of each EMG is all less than or equalto 1 kHz, the control circuits may provide the sampling frequency of 2 kHz forevery EMG. For the control circuits, a total sampling frequency of 8 kHz may beprovided. The switch circuits may also switch between the four signal acquisitioncircuits at the frequency of 8 kHz, which switch once every 125 microseconds (μs),and the control circuits may sample the received electromyogram signals oncebetween every two adjacent switches of the switch circuits.

[0068] Further, under the completely reconfigurable strategy, the control circuitsmay completely reproduce the corresponding multiple target signals based on theobtained sampling data. For example, the control circuits may reconstruct eachtarget signal, and further analyze the frequency, phase, strength (amplitude) andother information of each target signal. Optionally, the control circuits may sendthe obtained sampling data or the reconstructed target signals to external processingcircuits for analysis in a wired or wireless manner.

[0069] In some embodiments, the frequency at which the switch circuit 220switches input channels may also be equal to half of the sampling frequencyprovided by the control circuit 240 or other fractional values. In this case, the switchcircuit 220 switches the input channels every time, that is, a signal acquisitioncircuit is conducted every time, the control circuit 240 may sample the target signalsacquired by the signal acquisition circuits twice. Continuing to take four signalacquisition circuits for collecting EMGs as an example, assuming that the targetfrequency of each EMG is less than or equal to 1 kHz, the control circuit mayprovide a sampling frequency of 2 kHz for each EMG. For the control circuits, atotal sampling frequency of 8 kHz may be provided. The switch circuit only needsto switch between the four signal acquisition circuits at a frequency of 4 kHz, whichswitches once every 250 μs. The control circuits may sample the received EMGstwice between every two adjacent switches of the switch circuit. Compared thetarget signals acquired in this way with the case where the switch circuit onlysamples once between two adjacent switches of the switch circuits, since thesampling time points of each signal is not uniform enough, there may be a certaindeviation in each target signal reconstructed based on the sampling data.

[0070] It should be known that, under the above-mentioned completelyreconfigurable strategy, the number of channels that the control circuits process byusing the time-division multiplexing method may be affected by the time of therising edges and falling edges of the target signals. As an example only, if thefrequency of the target signal is 500 Hz, the control circuits may provide a samplingfrequency greater than 1 kHz for a single channel. At this time, the switching speedof the switch may need to reach 4 kHz when realizing time-division multiplexingof four channels. The dwell time of the switch circuits in the single channel may beonly 250 μs, while the switching speed of the switch needs to reach 8 kHz whenrealizing time-division multiplexing of 8 channels, and the dwell time of the switchcircuit in the single channel may be only 125 μs. Considering the influence of therising edge and the falling edge, the dwell time of the switch circuit in each channelmay not be too small. For example, if both the rising edge and the falling edge are50 μs, in this case, the time-division multiplexing of up to 16 channels may berealized. Therefore, the rising edge time and the falling edge time, the number ofchannels, and the frequency range of the target signals may be generally consideredcomprehensively to gate the appropriate number of channels and the switching timeof the corresponding channel.

[0071] In other embodiments, considering that the control circuit 240 may not beable to obtain valid sampling data (i.e., the rising edges and falling edges of theabove signals cause the switch circuits to dwell on the single channel for too long,and the control circuits cannot acquire at least two valid data points within theperiod of the target signals) during the fast switching of the switch channels, thecontrol circuit 240 may use a strength characterization strategy to control theswitching of the switch circuit 220. Under the strength characterization strategy, thecontrol circuit 240 may switch the input channels of the switch circuit 220 based ona preset frequency. The preset frequency may be related to cycles for the user toperform certain actions. For example, in order to analyze the EMGs generated bythe muscles when the user performs strength trainings, the preset frequency may bea certain multiple of the frequency at which the user performs specific actions (e.g.,bench press), causing that the switch circuit 220 may conduct each signalacquisition circuit multiple times during a cycle when the user performs the specificactions, so that the control circuit 240 may respectively perform multiple samplingson each target signal.

[0072] Continuing to take four signal acquisition circuits for collecting EMGs asan example, assuming that the user performs certain actions at a speed of 1 persecond, if the control circuits sample 10 times on each target signal under an action,then the switching speeds of the switch circuits may be 40 times per second. Whenswitching to signal acquisition circuits, the control circuit first may wait for thesignals to be stable, and then continuous sampling until the 25 milliseconds (ms) ofthe signals are over. In this case, the switching speeds of the switch circuits may beindependent of the overall sampling frequency of the control circuits. The controlcircuits may use a high total sampling frequency to achieve the effect of acquiringthe high-frequency signals in the target signals.

[0073] Further, under the strength characterization strategy, the control circuitsmay obtain the strength information of the target signals based on the obtainedsampling data. For example, under the strength characterization strategy, the controlcircuits may continuously sample the target signals generated by the single signalacquisition circuits within a time period. The control circuits may calculatestrengths of the target signals acquired by the signal acquisition circuits during thetime period based on the continuously sampled data, for example, calculatingaverage values of the continuously sampled data, or the like. Of course, the controlcircuits may also calculate the strengths of the target signals based on all thesampling data corresponding to the signal acquisition circuits. Furthermore, whenthe control circuits calculate the strengths of the target signals corresponding to thesame signal acquisition circuits in multiple discontinuous time periods, the controlcircuits may generate the relationship between the target signal strength and thetime based on the signal strengths and the corresponding time, so as to extract thespecific frequency information of the target signals.

[0074] In some embodiments, the strength characterization strategy may acquirepartial frequency information when acquiring strength information. Under thestrategy, since the signals of all time periods are not completely acquired, part ofthe signal information may be lost, so part of the frequency information may belost. As an example only, the total frequency of 40 Hz may be configured to controlthe switch circuits for switching. In the case of four signal acquisition circuits, theacquisition time length of each input channel may be 25 ms. At this time, there maybe a certain loss in the acquisition of low-frequency signals whose signal frequencyis less than 40 Hz. However, if the signals acquired in each section (i.e., the signalssampled multiple times after a single channel switch) are processed into arepresentative value (e.g., an average value is extracted from the signals acquiredevery 25 ms), there are 10 representative values of the single channel within 1s,then the signal with a frequency below 5 Hz may be reconstructed by using theprocessing method of the completely reconfigurable strategy.

[0075] In some embodiments, the ability of time-division multiplexing under thestrength characterization strategy may be related to the frequency of user actionsand the monitoring accuracy requirements for user actions, and due to the longduration of single channel acquisition, it may be less affected by rising edge andfalling edge. In some embodiments, the frequency of the target signals may be toolow to limit the number of channels for time-division multiplexing under thestrategy, so the ability of time-division multiplexing may also be related to thefrequency of the target signals. Due to the need to extract the frequency and strengthinformation of the target signals, it is difficult to acquire for low-frequency signals,such as signals with a frequency below 40 Hz. In this case, the number of time-division multiplexing may be reduced, that is, the number of signal acquisitioncircuits may be reduced.

[0076] In some embodiments, the control circuit 240 may adjust specific switchcontrol strategies according to actual conditions. For example, the control circuit240 may switch between a completely reconfigurable strategy and the strengthcharacterization strategy. The selection or switching between the completelyreconfigurable strategy and the strength characterization strategy may be judgedaccording to delay times of the circuits (e.g., rising edge time and falling edge time)and signal-to-noise ratio requirements of the circuits. For example, when the delaytimes of the circuits are long and the target signal frequency, the number of signalacquisition circuits, and the magnification of the analog circuits cannot be changed,the control circuit 240 may gate a strength characterization strategy. For anotherexample, when appropriate filter circuits are added to the analog circuit to improvethe signal-to-noise ratios, the control circuit 240 may gate the strengthcharacterization strategy considering that the filter circuits may cause longer delaytimes. On the contrary, when the delay time of the circuits are relatively short or therequirements for the signal-to-noise ratio are not high, the control circuit 240 maygate the complete reconstruction strategy. In some embodiments, the control circuit240 may adjust the switch control strategies according to environmental factors oruser instructions. For example, assuming that different switch control strategiescorrespond to different power consumption speeds, the control circuit 240 mayadjust the switch control strategies according to the power status of the powersupply (e.g., batteries). When the powers of the power supply are low, switchcontrol strategies with low power consumption speeds are gated. For anotherexample, the control circuit 240 may adjust the switch control strategies accordingto the user's input instructions to meet different needs of the user.

[0077] It should be noted that the above descriptions about the process 300 maybe only for illustration and description, and does not limit the scope of applicationof the present disclosure. For those skilled in the art, various modifications andchanges may be made to the process 300 under the guidance of the presentdisclosure. However, such modifications and changes remain within the scope ofthe present disclosure.

[0078] FIGS. 4A-4B are exemplary images of the baseline drift problemaccording to some embodiments of the present disclosure.

[0079] In some embodiments, due to factors such as the potentials of the stratumcorneum on the surface of the human body, the signal sampled by the control circuit240 may have baseline drifts. For the baseline drift problems, in someembodiments, the baseline drift problems may be solved by reducing the gains ofthe analog circuit 230 to the target signals, and / or gating a control chip with high-precision ADC channels, and / or choosing to use resistance to adjust the referencepotential drift, and / or the baseline drift may be filtered out by choosing to add high-pass filtering in the analog circuit 230.

[0080] In some embodiments, since there is a limit value in the baseline drift,small gains may be configured to control the baseline drift not to exceed the outputcapability of the signal processing circuits, so that distortion does not occur. Forexample, when the target signals are transmitted to the analog circuits, the analogcircuits may amplify the target signals. In order to solve the baseline drift problems,the magnification of the target signals by the analog circuit may be appropriatelyreduced so that the amplified signals may not be distorted.

[0081] In some embodiments, if the magnification (gain) of the target signals isreduced, other problems may be caused, for example, high requirements for noisecontrols after the outputs of the analog circuits. Although the gains cannot helpimprove the signal-to-noise ratios of the output signals of the analog circuits, if theparts after the analog circuits introduce noise, then large gains may improve thesignal-to-noise ratios of the entire circuits, so at small gains, strict control of thenoise may be required. Since the physiological signals are generally weak, in thecase of such small gains, a control circuit with a high-precision ADC may benecessary to choose to obtain sufficient resolutions and avoid entering more noiseafter the analog circuit.

[0082] As an example only, if the strength of the EMG is 0.1 mV, for the situationof 12-bit ADCs powered by 3.3 V, the resolution is only 0.8 mV, even if the EMGgains 10 times, the obtained results may also be distorted seriously. However, if a16-bit ADC is used, the resolution may reach 0.05 mV, and even if the EMG gains10 times, a better signal restoration may be obtained. In some embodiments, a 60times gain, 3.3 V power supply, and 16-bit ADC scheme may be selected.

[0083] In some embodiments, in the case of dry electrodes acquiringmyoelectricity, the effect of using a time-division multiplexing circuit to acquireEMGs at the trapezius, pectoralis major, and biceps is shown in FIG. 4A. The figureshows the original appearances of the signals acquired by the small gain and highprecision method. It can be seen that the three-channel sampling signals in theimage have obvious baseline drift problems. The small gain and high precisionmethod uses a 60 times gain, 3.3 V power supply, and a 12-bit ADC scheme. It canbe seen from the figure that due to the small gain, the baseline drift does not exceedthe output capability range of the signal processing circuits, and no saturationdistortion occurs. FIG. 4B shows the image processed by the 60 Hz-500 Hzalgorithm bandpass filter. It can be seen from the figure that under the small gainand high precision scheme, the baseline drift may be controlled within a certainrange, the image after filtering does not have the baseline drift problems.

[0084] In some embodiments, the baseline drift problems may also be solved byadding high-pass filter circuits in the signal processing circuits. In someembodiments, the high-pass filter circuits may be added to the analog circuit, andmay be gated to be arranged before the main gains to avoid saturation. In this case,the effect of large gains and zero drift may be achieved at the same time. However,if the high-pass filter circuits are added to the analog circuit, problems such aslonger rising edge time and falling edge time may be caused. Therefore, it isnecessary to adjust and gate appropriate parameters to achieve the purpose of beingcompatible with the time-division multiplexing function.

[0085] In some embodiments, the high-pass filter circuits may be added when thetarget frequency is relatively low, because when the target frequency is relativelylow, the sampling time of each channel may be relatively long. For example, theEMG whose target frequency is within 250 Hz may be chosen. Under thecompletely reconfigurable strategy, if the sampling frequency of the single channelonly needs to be 500 Hz, and the sampling frequency of four-channel time-divisionmultiplexing may only need to be 2000 Hz, so the dwell times of the single channelmay be extended to 500 μs. As a comparison, under the completely reconfigurablestrategy, if the target frequency of the EMG is 1000 Hz, the sampling frequency ofthe single channel may be required to be 2000 Hz, and the sampling frequency ofthe four-channel time-division multiplexing may be required to be 8000 Hz, thenthe dwell time of the single channel may be 125 μs. If the rising edge time and thefalling edge time is greater than 125 μs (there may be switch delays, voltage swingand stabilization time of each chip, etc.), accurate sampling signals may not beobtained, and the filter circuits in the analog circuit may also be appropriatelyreduced for optimization at this time.

[0086] FIG. 5A-5C are exemplary circuit diagrams of a reference potentialcontrolled by program according to some embodiments of the present disclosure.

[0087] In some embodiments, the changes of the baseline drift may be relativelyslow and also present the phenomenon of fixed drift within a certain time period,the baseline may be programmed to a certain extent so as to solve the baseline driftproblems by designing the reference potentials of the circuits. In someembodiments, when the baseline drift makes the signals approach to an upper limitof the saturation voltages, the reference potentials may be controlled to decrease bythe program. Conversely, when the baseline drift makes the signals approach to alower limit of the voltage, the reference potentials may be controlled to increase bythe program. The reference potentials may be virtual grounds in the circuits, whichare configured to raise the circuits to a certain potential to ensure that the obtainedsignal values are all positive values, so that the control circuit may read the receivedsignals.

[0088] In the circuit diagram shown in FIG. 5A, after utilizing resistance R1 andresistance R2 to carry out voltage division, the input and the output are isolated byamplifiers to avoid the influence of the output end, finally the voltage value ofVCC2=VCC*R2 / (R1+R2) at the output end may be output. It can be seen from thefigure that the value of VCC2 may be changed by adjusting the values of R1 andR2. If VCC2 is used as the reference potential of the circuit, and then the values ofR1 and R2 may be controlled through a computer program, then the referencepotential may be controlled by program. In some embodiments, R1 may be replacedby a switch-controlled resistor network R, and resistors with different resistancevalues may be connected with the circuit through different switch gating, therebyrealizing the change of the resistance value of R. similarly, R2 may be adjusted orR1 and R2 may be adjusted at the same time.

[0089] In the circuit diagram shown in FIG. 5B, the negative input of the amplifierin the figure may be connected with VCC2, and under normal circumstances, thenegative input of the amplifier may be connected with ground, that is, VCC2=0 V.For controlling the baseline by program, the value of VCC2 may be chosen toinitialize to a certain value, for example, the value of VCC2 may be initialized toone-half of the power supply voltage, then the potential of the entire circuit may beincreased, so that the output of the circuit is always greater than or equal to 0 V, thecircuit does not need to be powered by positive and negative voltages, and theprocessing of battery power may be increased. In such a case, it not only satisfiesthe requirements of the ADC to read the signals, but also facilitates the battery tosupply powers to the circuit (the battery is positive voltage). If the referencepotential VCC2 is 0 V, then the circuit may need to be powered by positive andnegative voltages, the processing power supply of battery is added, and theprocessing of increasing the voltage may also be done at the output to meet therequirements of ADC reading.

[0090] FIG. 5C shows a schematic diagram of a baseline controlled by program,which may include a processor, a reference voltage control circuit, and an amplifiercircuit. The reference voltage control circuit may be configured to change thereference voltage of the reference potential, and the processor may be configuredto control the reference voltage control circuit to change the value of the referencevoltage according to the output result, so as to achieve the purpose of adjusting thereference potential. In some embodiments, the processor may monitor and adjustthe output of the amplifying circuit in real time, and set a certain threshold (e.g.,two thresholds may be set, the first threshold is the upper limit, and the secondthreshold is the lower limit to control the output voltage within a certain range),when the detected output voltage exceeds a certain threshold, the processor maycontrol the reference voltage control circuit to change the reference voltage of thereference potential.

[0091] Only as an example, when the output capability of the amplifying circuitis in a range of 0-3 V, the first threshold may be set as 90% of the maximum value(2.7 V), and the second threshold may be set as 10% of the maximum value (0.3V). When the processor detects that the voltage output of the amplifying circuitexceeds 2.7 V, adjustment may be trigged, the reference voltage control circuit maybe controlled to reduce the reference potential by a certain value (for example, thereduced value of the reference potential may be the difference between the detectedoutput voltage value and the initial reference potential, and for another example,the reduced value of the reference potential may be a certain fixed value). Similarly,when the processor detects that the voltage output of the amplifying circuit is lowerthan 0.3 V, the adjustment may also be triggered, and the reference voltage controlcircuit may be controlled to increase the reference potential by a certain value ( forexample, the increased value of the reference potential may be the differencebetween the detected output voltage value and the initial reference potential, andfor another example, the increased value of the reference potential may be a certainfixed value). It should be noted that the reduced reference potential cannot be lessthan 0 V, if the reduced reference potential is less than 0 V, and the referencepotential may only drop to 0 V at most. The increased reference potential cannot begreater than 3 V, if the increased reference potential is greater than 3 V, thereference potential may only be increased to 3 V at most. That is, the changedreference voltage value cannot exceed the range of the output voltage value of theamplifier circuit. It should also be noted that in order to filter out the influence ofthe baseline controlled by program in the final result by filtering (for example, ifthe frequency of the baseline controlled by program islessthan 10 times persecond,and the frequency of the EMG is gated to be above 20 Hz, the influence of thebaseline controlled by program may be removed by filtering with a 20 Hz high-passalgorithm), the frequency of the adjustment of the reference potential may not betoo high. In some embodiments, the speed of the adjustment controlled by programmay be related to the speed of the baseline drift of the target signal, the thresholdvalue set by the processor, and the adjusted value of the reference potential aftertriggering the adjustment.

[0092] In summary, the reference level of the signal may be changed by changingthe reference potential of the reference point, and the reference potential may becontrolled by program at the same time, such that the baseline may be controlledby program to solve the baseline drift problem.

[0093] In some embodiments, the method of controlling the reference potential byprogram in FIGs. 5A-5C may also be applicable to the situation of positive andnegative power supplies, and the initialization of the reference potential is 0 V.

[0094] FIGs. 6A-6B are exemplary images of the channel crosstalk problemaccording to some embodiments of the present disclosure.

[0095] In some embodiments, the time-division multiplexing may be affected bythe falling edge time of the entire circuit. The falling edge time may represent thetime required for the voltage to drop from one value to another and be stabilize.Before and after the switching of the switch, if there is not enough time for thevoltage of the previous channel to be fully released, crosstalk between channelsmay be caused, and part of the information of the channel before switching may beretained in the switched channel.

[0096] In some implementations, the crosstalk between the various input channelsmay be reduced to a certain extent by adopting the signal processing method of thetime-division multiplexing circuit and sampling after the channel is stable. In thecase of simultaneous signal transmission through multi-channel, each input channelhas a signal at the same time. If the signals of each channel are large, but the inputlines of each channel overlap and the insulation are not good enough, then theremay be crosstalk between each channel. However, in the time-division multiplexingmethod, only one channel is conducted at the same time, and the other channels arein the closed state without current, which may effectively avoid the crosstalkproblem of the above-mentioned multi-channel circuits.

[0097] In some embodiments, as shown in FIGs. 6A and 6B, the dotted line in thefigure may represent the original signal of the input circuit after processing, and thesolid line may represent the signal with delay formed by the original signal passingthrough the circuit in the present disclosure. The abscissa may represent the time,and the ordinate may represent the voltage value. The ordinate of the dotted linemay be not the voltage value in the actual sense, but only used as a time referencefor the solid line. In some embodiments, a function generator may be used as asignal source to send out square waves, and two outputs of the function generatormay gate a same mode (ensuring that the two phases are consistent), and onechannel signal of the function generator may be connected with an input end of thecircuit, and the output end of the circuit may be connected with an oscilloscope, andthe data read by the oscilloscope at the output end of the circuit may be plotted inthe figure above (solid line). The other channel of the function generator may bedirectly connected to the oscilloscope for reading data. The data may indicate thephase of the input signal of the circuit. The data is processed (by changing itsstrength value to be comparable to the solid line for intuitive observation) andplotted in the above figure (dotted line). The processing may refer to gating athreshold point (the average value of the value before and after the signal jumps),assigning values to points greater than the threshold and less than the threshold, forexample, points less than the threshold may be assigned a, and points greater thanthe threshold may be assigned b. In summary, it may be seen from the figure thatthe jump voltage value is a key factor affecting the delay.

[0098] The beneficial effects that the embodiments of the present disclosure maybring include but are not limited to: (1) achieving the purpose of saving space costand reducing hardware requirements under the situation that guarantees theacquisition and the processing of multiple signal sources by adopting the method oftime-division multiplexing; (2) when multiple input channels have signals at thesame time, reducing the crosstalk between each input channel; (3) completelyreproducing the corresponding multiple target signals based on the obtainedsampling data by the completely reconfigurable strategy; (4) under the strengthcharacterization strategy, obtaining the strength information and partial frequencyinformation of the target signals based on the obtained sampling data; (5) solvingthe problems of possible baseline drift through the method of small gain and highprecision ADC, the baseline controlled by program and adding high-pass filtercircuit.

[0099] Having thus described the basic concepts, it may be rather apparent tothose skilled in the art after reading this detailed disclosure that the foregoingdetailed disclosure is intended to be presented by way of example only and is notlimiting. Various alterations, improvements, and modifications may occur and areintended to those skilled in the art, though not expressly stated herein. Thesealterations, improvements, and modifications are intended to be suggested by thisdisclosure and are within the spirit and scope of the exemplary embodiments of thisdisclosure.

[0100] Moreover, certain terminology has been configured to describeembodiments of the present disclosure. For example, the terms "one embodiment,""an embodiment," and / or "some embodiments" mean that a particular feature,structure, or feature described in connection with the embodiment is included in atleast one embodiment of the present disclosure. Therefore, it is emphasized andshould be appreciated that two or more references to "an embodiment," "oneembodiment," or "an alternative embodiment" in various portions of the presentdisclosure are not necessarily all referring to the same embodiment. Furthermore,the features or structures may be combined as suitable in one or more embodimentsof the present disclosure.

[0101] In addition, those skilled in the art may understand that the various aspectsof the application may be illustrated and described by several patentable categoriesor situations, including combination of any new and useful process, machine,product or substances, or any new and useful improvement thereof.Correspondingly, various aspects of the application may be entirely executed byhardware, may be entirely executed by software (including firmware, residentsoftware, microcode, etc.), or may be executed by a combination of hardware andsoftware. The above hardware or software may be referred to as "block", "module","engine", "unit", "element" or "system". In addition, aspects of the application maybe embodied as a computer product on one or more computer-readable media, theproduct including computer-readable program code.

[0102] A computer storage medium may contain a propagated data signalembodying the computer program code, for example, in baseband or as part of acarrier wave. The propagated signal may have various manifestations, includingelectromagnetic forms, optical forms, etc., or a suitable combination. The computerstorage medium may be any computer-readable medium, other than a computer-readable storage medium, which may be connected to an instruction executionsystem, apparatus, or device to communicate, or propagate or transmit the programfor use. The program codes residing on a computer storage medium may betransmitted over any suitable medium, including radio, electrical cable, fiber opticcable, RF, or the like, or any combinations thereof.

[0103] Furthermore, the recited order of processing elements or sequences, or theuse of numbers, letters, or other designations, therefore, is not intended to limit theclaimed processes and methods to any order except as may be specified in theclaims. Although the above disclosure discusses through various examples what iscurrently considered to be a variety of useful embodiments of the disclosure, it is tobe understood that such detail is solely for that purpose, and that the appendedclaims are not limited to the disclosed embodiments, but, on the contrary, areintended to cover modifications and equivalent arrangements that are within thespirit and scope of the disclosed embodiments. For example, although theimplementation of various elements described above may be embodied in ahardware apparatus, it may also be implemented as a software-only solution-e.g.,an installation on an existing server or mobile apparatus.

[0104] Similarly, it should be appreciated that in the foregoing description ofembodiments of the present disclosure, various features are sometimes groupedtogether in a single embodiment, figure, or description thereof for the purpose ofstreamlining the disclosure aiding in the understanding of one or more of the variousembodiments. This method of disclosure, however, is not to be interpreted asreflecting an intention that the claimed subject matter requires more features thanare expressly recited in each claim. Rather, claimed subject matter may lie in lessthan all features of a single foregoing disclosed embodiment.

[0105] In some embodiments, the numbers expressing quantities or propertiesconfigured to describe and claim certain embodiments of the application are to beunderstood as being modified in some instances by the term "about," "approximate,"or "substantially." For example, "about," "approximate," or "substantially" mayindicate ±20% variation of the value it describes, unless otherwise stated.Accordingly, in some embodiments, the numerical parameters set forth in thewritten description and attached claims are approximations that may varydepending upon the desired properties sought to be obtained by a particularembodiment. In some embodiments, the numerical parameters should be construedin light of the count of reported significant digits and by applying ordinary roundingtechniques. Notwithstanding that the numerical ranges and parameters arrangingforth the broad scope of some embodiments of the application are approximations,the numerical values set forth in the specific examples are reported as precisely aspracticable.

[0106] Each of the patents, patent applications, publications of patent applications,and other material, such as articles, books, specifications, publications, documents,things, and / or the like, referenced herein is hereby incorporated herein by thisreference in its entirety for all purposes, excepting any prosecution file historyassociated with same, any of same that is inconsistent with or in conflict with thepresent document, or any of same that may have a limiting affect as to the broadestscope of the claims now or later associated with the present document. By way ofexample, should there be any inconsistency or conflict between the descriptions,definition, and / or the use of a term associated with any of the incorporated materialand that associated with the present document, the description, definition, and / orthe use of the term in the present document shall prevail.

[0107] In closing, it is to be understood that the embodiments of the applicationdisclosed herein are illustrative of the principles of the embodiments of theapplication. Other modifications that may be employed may be within the scope ofthe application. Thus, by way of example, but not of limitation, alternativeconfigurations of the embodiments of the application may be utilized in accordancewith the teachings herein. Accordingly, embodiments of the present disclosure arenot limited to that precisely as shown and described.

Claims

1. A signal processing circuit, comprising a control circuit, a switch circuit, an analog circuit, and at least two signal acquisition circuits, wherein the at least two signal acquisition circuits are configured to acquire at least two-channel target signals; the switch circuit is configured to control conduction between the at least two signal acquisition circuits and the analog circuit, so that the target signal collected by a part of the at least two signal acquisition circuits is transmitted to the analog circuit at the same time; the analog circuit is configured to process the received target signal; and the control circuit is configured to receive the processed target signal, and sample the processed target signal, wherein each of the at least two channel target signals includes a target frequency, and a sampling frequency of each of the processed target signal by the control circuit is not less than twice of the target frequency.

2. The signal processing circuit of claim 1, wherein the switch circuit includes a plurality of input channels, each of the at least two signal acquisition circuits is connected to an input channel independently, and the switch circuit selects one input channel for conduction between the at least two signal acquisition circuits and the analog circuit based on control signal of the control circuit at the same time.

3. The signal processing circuit of claim 1, wherein the control circuit reconstructs each of the target signal based on a sampling result.

4. The signal processing circuit of claim 1, wherein the control circuit switches a switch of the switch circuit based on a sum of sampling frequencies of the at least two-channel target signals.

5. The signal processing circuit of claim 1, wherein the control circuit switches a switch of the switch circuit based on a preset frequency.

6. The signal processing circuit of claim 5, wherein the control circuit obtains strength information of each of the target signal based on a sampling result.

7. The signal processing circuit of claim 1, wherein the analog circuit includes a differential amplifier, and the switch circuit is a switch chip with dual outputs.

8. The signal processing circuit of claim 1, wherein the sampling the processed target signal by the control circuit is performed after the control circuit starts to receive the processed target signal for a time period.

9. A signal processing method, comprising: acquiring, by at least two signal acquisition circuits, at least two channel target signals; controlling, by a switch circuit, conduction between the at least two signal acquisition circuits and the analog circuit, so that the target signal collected by a part of the at least two signal acquisition circuits is transmitted to the analog circuit at the same time; processing, by an analog circuit, the received target signal; and receiving, by the analog circuit, the processed target signal, and sampling, by a control circuit, the processed target signal, wherein each of the at least two-channel target signals includes a target frequency, and a sampling frequency of each of the processed target signal by the control circuit is not less than twice of the target frequency.

10. A non-transitory computer-readable storage medium storing a set of instructions, when executed by at least one processor, causing the at least one processor to execute a signal processing method, the method comprising: acquiring, by at least two signal acquisition circuits, at least two channel target signals; controlling, by a switch circuit, conduction between the at least two signal acquisition circuits and the analog circuit, so that the target signal collected by a part of the at least two signal acquisition circuits is transmitted to the analog circuit at the same time; processing, by an analog circuit, the received target signal; and receiving, by an analog circuit, the processed target signal, and sampling, by a control circuit, the processed target signal, wherein each of the at least two-channel target signals includes a target frequency, and a sampling frequency of each of the processed target signal by the control circuit is not less than twice of the target frequency.