Substrate treatment apparatus, control system, and control method
Patent Information
- Application Number
- JP2022093974
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2022-06-09
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2042-06-09
AI Technical Summary
Existing substrate processing systems experience time lags and absolute time lags between control boards, which can disrupt synchronized operations of high-speed control devices.
A substrate processing apparatus with a control system that includes an upper control unit and lower control units connected by a network, utilizing clock generators to measure time and correct deviations in actual working time through a time lag correction function.
The system effectively minimizes time lags and absolute time lags between control boards, ensuring synchronized operation of high-speed control devices.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a substrate processing apparatus, a control system, and a control method. [Background technology]
[0002] For example, in the manufacturing process of semiconductor devices, various processes such as film formation, etching, and heat treatment are performed on semiconductor wafers, which serve as substrates. Processing apparatuses that perform these processes, particularly processing apparatuses that perform an ALD process as a film formation process, have multiple end devices that require high-speed control, such as high-speed opening and closing valves for ALD and automatic pressure control valves. Patent Document 1 discloses a technique for achieving high-speed control of these end devices, in which multiple high-speed control boards specialized for high-speed control of the end devices are connected via a network to a controller that controls the apparatus, and the end devices are controlled based on a processing recipe provided by the controller. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-151723 Summary of the Invention [Problem to be solved by the invention]
[0004] The present disclosure provides a substrate processing apparatus, a control system, and a control method that are less likely to cause time lag and absolute time lag between control boards. [Means for solving the problem]
[0005] A substrate processing apparatus according to one aspect of the present disclosure is a substrate processing apparatus that processes substrates, and includes a substrate processing section that has a plurality of end devices and performs processing on substrates using the plurality of end devices, and a control section that controls the processing of the substrates in the substrate processing section, the control section having a higher-level control unit and a plurality of control boards that are lower-level control units connected to the higher-level control unit via a network, the control boards exchanging control signals with the end devices and having a clock generator for measuring time, and the control section further having a time deviation correction function section that transmits a clock signal from the higher-level control unit to the plurality of control boards for a fixed period of time and corrects deviations in actual operating time caused by the clock generator in each of the control boards based on the clock signal from the higher-level control unit. [Effects of the Invention]
[0006] According to the present disclosure, a substrate processing apparatus, a control system, and a control method are provided that are less likely to cause time lag or absolute time lag between control boards. [Brief explanation of the drawings]
[0007] [Figure 1] 1 is a cross-sectional view schematically illustrating an example of a substrate processing apparatus according to an embodiment. [Figure 2] 1 is a block diagram showing a schematic configuration of an overall control system including a control unit of a substrate processing apparatus according to an embodiment. [Figure 3] FIG. 2 is a block diagram illustrating a time lag correction function unit provided in the control unit. [Figure 4] 4 is a flowchart showing a control operation by a control unit. [Figure 5] FIG. 2 is a block diagram showing a schematic configuration of a main part of a control unit. [Figure 6] FIG. 10 is a block diagram showing the state of the control unit when a local recipe is downloaded. [Figure 7] FIG. 10 is a block diagram showing the state of the control unit when a local recipe is started. [Figure 8]FIG. 10 is a block diagram showing a state of a control unit when an end device is controlled based on a local recipe and substrate processing is performed. [Figure 9] 10 is a block diagram showing the state of the control unit when a time lag occurs in the high-speed control board. FIG. [Figure 10] 10 is a block diagram showing the state of the control unit when correcting the deviation of the actual operating time in the high-speed control board based on the clock signal from the upper control unit. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0008] Hereinafter, embodiments will be described with reference to the accompanying drawings.
[0009] <Substrate processing equipment> FIG. 1 is a cross-sectional view schematically showing an example of a substrate processing apparatus according to an embodiment. In this embodiment, a film formation apparatus that forms a film on a substrate by ALD using a source gas and a reactive gas will be exemplified as the substrate processing apparatus 100. The substrate processing apparatus 100 includes a substrate processing unit 200 and a control unit 300.
[0010] [Substrate processing section] The substrate processing unit 200 includes a processing chamber 1 , a mounting table 2 , a shower head 3 , a gas supply unit 4 , and an exhaust unit 5 .
[0011] The processing vessel 1 is made of a metal such as aluminum and has a generally cylindrical shape. A loading / unloading port (not shown) is formed in the sidewall of the processing vessel 1 for loading and unloading the substrate W, and the loading / unloading port can be opened and closed by a gate valve (not shown). An exhaust port 1a is also provided in the bottom of the processing vessel 1.
[0012] The mounting table 2 is a disk-shaped table of a size corresponding to the substrate W, is installed horizontally within the processing chamber 1, and is supported by a support member 21. The mounting table 2 is made of a ceramic material such as aluminum nitride (AlN) or a metal material such as an aluminum or nickel-based alloy, and has a heater (not shown) embedded therein for heating the substrate W. The heater is heated by receiving power from a heater power supply (not shown). A temperature sensor (not shown) is installed near the top surface of the mounting table 2, and the temperature of the substrate W is controlled by controlling the heater output using the temperature sensor.
[0013] The support member 21 extends from the center of the bottom surface of the mounting table 2 to below the processing vessel 1, passing through a hole formed in the bottom wall of the processing vessel 1, and its lower end is connected to the lifting mechanism 22. The lifting mechanism 22 enables the mounting table 2 to be raised and lowered via the support member 21. By raising and lowering the mounting table 2 with the lifting mechanism 22 during the ALD process, the pressure near the substrate W can be controlled.
[0014] Between support member 22 and the bottom wall of processing vessel 1, a bellows 23 is provided which separates the atmosphere inside processing vessel 1 from the outside air and expands and contracts in accordance with the vertical movement of mounting table 2.
[0015] The showerhead 3 is provided at the top of the processing vessel 1 facing the mounting table 2, and functions as a gas discharge unit that discharges processing gas into the processing vessel 1 in a shower-like manner. The showerhead 3 is made of, for example, a metal material and has approximately the same diameter as the mounting table 2. A gas diffusion space 31 that diffuses gas is formed inside the showerhead 3, and a gas inlet pipe 32 is connected to the gas diffusion space 31 from above. A number of gas outlet holes 33 are formed in the bottom wall of the showerhead 3, and gas supplied from the gas inlet pipe 32 to the gas diffusion space 31 is discharged from the gas outlet holes 33 into the processing vessel 1.
[0016] The gas supply unit 4 supplies gases used in ALD film formation, such as source gases, reactive gases, and purge gases, to the processing vessel 1 via the showerhead 3. The source gases are compound gases containing metal components of the film to be formed, and the reactive gases are gases that react with the source gases to form a film. The purge gas is used to purge gas remaining in the processing vessel 1, and an inert gas such as N2 gas or a rare gas is used.
[0017] The gas supply unit 4 has a raw material gas supply source 41a that supplies a raw material gas, a reactive gas supply source 42a that supplies a reactive gas, and a first purge gas supply source 43a and a second purge gas supply source 44a that supply a purge gas.
[0018] The raw material gas supply source 41a, the reactive gas supply source 42a, the first purge gas supply source 43a, and the second purge gas supply source 44a are connected to a raw material gas supply pipe 41b, a reactive gas supply pipe 42b, a first purge gas supply pipe 43b, and a second purge gas supply pipe 44b, respectively. The raw material gas supply pipe 41b is provided with, in order from the raw material gas supply source 41a side, a front-stage valve 41c, a flow rate controller 41d, and a rear-stage valve 41e. The reactive gas supply pipe 42b is provided with, in order from the reactive gas supply source 42a side, a front-stage valve 42c, a flow rate controller 42d, and a rear-stage valve 42e. The first purge gas supply pipe 43b is provided with, in order from the first purge gas supply source 43a side, a front-stage valve 43c, a flow rate controller 43d, and a rear-stage valve 43e. The second purge gas supply pipe 44b is provided with a front-stage valve 44c, a flow rate controller 44d, and a rear-stage valve 44e in this order from the second purge gas supply source 44a side.
[0019] The source gas supply pipe 41 b , the reaction gas supply pipe 42 b , the first purge gas supply pipe 43 b , and the second purge gas supply pipe 44 b join together into a common pipe 45 , which is connected to the gas introduction pipe 32 .
[0020] The first purge gas supply pipe 43b and the second purge gas supply pipe 44b are provided on the source gas supply pipe 41b side and the reactive gas supply pipe 42b side, respectively, and the purge gas flowing through these pipes also functions as a carrier gas for the source gas and the reactive gas, respectively.
[0021] The upstream valves 41c, 42c, 43c, and 44c are normal on-off valves, and the downstream valves 41e, 42e, 43e, and 44e are high-speed on-off valves for ALD. Mass flow controllers, for example, are used as the flow rate controllers 41d, 42d, 43d, and 44d.
[0022] The exhaust unit 5 exhausts the inside of the processing vessel 1 to reduce the pressure inside the processing vessel 1. The exhaust unit 5 includes an exhaust pipe 51, an automatic pressure control valve (APC) 52, and a vacuum pump 53. The exhaust pipe 51 is connected to the exhaust port 1a. The automatic pressure control valve (APC) 52 and the vacuum pump 53 are installed in the exhaust pipe 51. The automatic pressure control valve (APC) 52 may be a valve that controls the conductance inside the exhaust pipe 51 by adjusting its opening. The opening of the pressure control valve (APC) 52 is controlled so that the pressure value of a pressure sensor (not shown) that detects the pressure inside the processing vessel 1 becomes a desired value.
[0023] In the substrate processing unit 200, the following process is executed under the control of the control unit 300.
[0024] First, the substrate W is loaded into the processing vessel 1 and placed on the mounting table 2. The processing vessel 1 is maintained at a predetermined reduced pressure, and the temperature of the mounting table 2 is controlled to a set temperature by a heater. In this state, a purge gas is supplied from the gas supply unit 4 into the processing vessel 1 via the shower head 3, and the processing vessel 1 is purged.
[0025] Thereafter, the high-speed opening / closing valves 41e to 44e for ALD are opened and closed at high speed to repeatedly supply the source gas into the processing vessel 1, purge the residual gas in the processing vessel 1, supply the reactive gas into the processing vessel 1, and purge the residual gas in the processing vessel 1. This performs the ALD process in which the source gas is adsorbed onto the substrate W and a film is formed by the reaction between the source gas and the reactive gas, and a film having a set thickness is formed on the substrate W.
[0026] During this ALD, high-speed pressure control is performed by an automatic pressure control valve (APC) 52, and high-speed elevation of the mounting table 2 is performed by an elevation mechanism 22 in each step of the ALD process.
[0027] [Overall control system including the control unit of the substrate processing equipment] 2 is a block diagram showing a schematic configuration of an overall control system including a control unit 300. The control unit 300 controls each component of the substrate processing unit 200 and causes the substrate processing apparatus 100 to execute processing. The control unit 300 is configured as a part of an overall control system 600 that controls the entire substrate processing system including the substrate processing apparatus 100.
[0028] As shown in FIG. 2, the overall control system 600 includes an EC (Equipment Controller) 501, which is a central unit that controls the entire substrate processing system, and a plurality of MCs (Module Controllers) 401 that are subordinate to the EC and control each device (module) that constitutes the substrate processing system.
[0029] The EC 501 functions as a common host controller that controls multiple devices in the substrate processing system, and the substrate processing apparatus 100 is one of the multiple devices (modules). Examples of devices other than the substrate processing apparatus 100 include a load lock chamber, a loader unit, etc. A plurality of MCs 401 are provided corresponding to the multiple devices (modules), but only the MC 401 of the substrate processing apparatus 100 is shown in FIG. 2, and the others are omitted.
[0030] The control unit 300 includes an EC 501, an MC 401 corresponding to the substrate processing apparatus 100, and a plurality of high-speed control boards 413 provided below the EC 501. The high-speed control board 413 is configured as an I / O module that controls a plurality of end devices 201, which are high-speed control target devices. From the perspective of the high-speed control board 413, the MC 401 and EC 501 are positioned as upper control units.
[0031] The EC 501 has a CPU (Central Processing Unit) 503, a RAM 505 as a volatile memory, and a hard disk drive 507 as a storage unit. The EC 501 and each MC 401 are connected via a network 513. Ether-CAT (hereinafter referred to as E-CAT), an ultra-high-speed field network system, can be suitably used as the network 513. The network 513 has a switching hub (HUB) 515. This switching hub 515 switches the MC 401 as the connection destination of the EC 501 in response to a control signal from the EC 501.
[0032] The EC 501 also communicates with the MES (Manufacturing Engineering System) via the network 601, which manages the manufacturing processes of the entire factory where the substrate processing system is installed. The host computer 603 is connected to the Execution System.
[0033] The EC 501 is also connected to a user interface 511. The user interface 511 has a keyboard through which a process manager inputs commands to manage the substrate processing system, a display that visualizes and displays the operating status of the substrate processing system, mechanical switches, etc.
[0034] The EC 501 is capable of recording information to a computer-readable storage medium 517 and reading information from the storage medium 517 .
[0035] In the EC 501, the CPU 503 reads out a program including a processing recipe for a substrate W specified by a user or the like via a user interface 511 from the hard disk drive 507 or a storage medium 517. The EC 501 is configured to transmit the program including the processing recipe to a plurality of MCs 401. As described above, one of the plurality of MCs 401 corresponds to the control unit 300 of the substrate processing apparatus 100.
[0036] Of the multiple MCs 401, the MC 401 that corresponds to the film forming apparatus 100 and is included in the control unit 300 has a CPU 403, a volatile memory unit 405 such as a RAM, a non-volatile memory unit 407 as an I / O information storage unit, and an I / O control unit 409.
[0037] The nonvolatile memory unit 407 stores various types of history information in the substrate processing apparatus 100. The nonvolatile memory unit 407 also functions as an I / O information storage unit, and is configured to be able to write and store various types of I / O information exchanged between the MC 401 and a plurality of end devices 201, which are high-speed control target devices, as will be described later, in the nonvolatile memory unit 407 as needed.
[0038] Examples of the end device 201 include high-speed opening and closing valves 41e to 44e in the gas supply section 4, flow rate controllers 41d to 44e, an automatic pressure control valve (APC) 52 in the exhaust section 5, the lifting mechanism 22, a heater power supply, various sensors, etc.
[0039] The I / O control unit 409 of the MC401 sends various control signals to the high-speed control board 413 and receives signals such as status information related to each end device 201 from the high-speed control board 413. The MC401 controls each end device 201 via the high-speed control board 413. As described above, the high-speed control board 413 is configured as an I / O module and transmits control signals to each end device 201 and input signals from the end device 201. The high-speed control board 413 and each end device 201 are connected via digital / analog signals. The MC401 is connected to multiple high-speed control boards 413 via a network 411. E-CAT, an ultra-high-speed field network, is preferably used as the network, and E-CAT communication is performed. The network 411 connected to the MC401 has multiple systems, for example, channels CH0, CH1, and CH2.
[0040] The multiple high-speed control boards 413, which are lower-level control units, have multiple I / O boards 415 connected to the end devices 201 that make up the film forming apparatus 100. These I / O boards 415 operate under the control of the MC 401. The input and output of digital signals, analog signals, and serial signals in the high-speed control boards 413 are controlled by these I / O boards 415.
[0041] The input / output information managed by the I / O board 415 includes digital input information DI, digital output information DO, and analog input information AI. DI relates to digital information input from each lower-level end device 201 to the upper-level MC 401. DO relates to digital information output from the upper-level MC 401 to each lower-level end device 201. AI relates to analog information input from each end device to the MC 401.
[0042] The DI and AI include, for example, information about the status of each end device 201. The DO includes, for example, a command to set a value related to a process condition for each end device. That is, the DI and AI perform, for example, equipment monitoring processing, and the DO performs, for example, equipment operation.
[0043] Each of the DI, DO, and AI is assigned an I / O address corresponding to its content. Each I / O address contains, for example, 16-bit (0 to 15) digital or analog information. The analog information is expressed, for example, in hexadecimal notation from 0 to FFF. Each I / O address is also assigned an address number. Furthermore, the I / O board 415 is assigned a node number starting with the number 1. As described above, the multiple channels are assigned numbers such as CH0, CH1, and CH2. Therefore, the I / O addresses of the DI, DO, and AI can be identified by three parameters: the channel number, the node number, and the I / O address number.
[0044] The end devices 201 controlled by each high-speed control board 413 may be classified arbitrarily. The end devices 201 connected to each high-speed control board 413 may be of the same type, or multiple types may be mixed. An example of the former is when multiple high-speed control boards 413 are classified into those for controlling the valves of the gas supply unit 4, those for the automatic pressure control valve 52, and those for the lifting mechanism 22, for example. An example of the latter is when multiple types of end devices 201, such as valves of the gas supply unit and automatic pressure control valves, are connected to one high-speed control board 413, and for example, multiple valves of the gas supply unit are connected and controlled across multiple high-speed control boards 413.
[0045] As described above, a processing recipe for processing a substrate W in the substrate processing apparatus 100 is transmitted from the EC 501 to the MC 401 corresponding to the substrate processing apparatus 100. The processing recipe transmitted to the MC 401 controls a plurality of end devices 201, and the processing recipe is downloaded from the MC 401 to each high-speed control board 413 via the network 411 as a local recipe (program) corresponding to each high-speed control board 413. Then, the high-speed control board 413 controls the corresponding end device 201 based on the downloaded local recipe.
[0046] 3, each high-speed control board 413 is equipped with a clock generator 420 for measuring time. When a local recipe is executed, operation times, monitoring times, etc. are determined by fixed calculation formulas in the program based on the clock generated by the clock generator 420. The clock generator 420 has an element such as a quartz oscillator and generates a clock signal.
[0047] The control unit 300 has a time lag correction function unit that transmits a clock signal from a higher-level control unit to each high-speed control board 413, which is a lower-level control unit, for a certain period of time, and corrects the lag in actual operating time in each high-speed control board 413 based on the clock signal from the higher-level control unit.
[0048] That is, as shown in FIG. 3 , the time lag correction function unit 430 includes a signal transmission unit 521 provided in the EC 501, which is a higher-level control unit, a signal reception unit 421 provided in each high-speed control board 413, and a correction unit 422 provided in each high-speed control board 413. The signal transmission unit 521 transmits a clock signal to the high-speed control board 413 at regular intervals via a network 513, 411, for example, via E-CAT communication, for example, using a quartz oscillator. The signal reception unit 421 receives the clock signal from the signal transmission unit 521. The correction unit 422 compares the period of the signal received by the signal reception unit 421 with the period of the signal from the clock generator 420, and corrects the time lag based on the clock generator 420 in real time. The signal transmission from the signal transmission unit 521 may be performed multiple times at regular intervals, or may be performed continuously at regular intervals at least during the period during which substrate processing is being performed. Alternatively, the signal may be transmitted at regular intervals continuously.
[0049] To give a specific example, a clock signal with a fixed cycle is transmitted from signal transmission unit 521 every fixed period, for example, once per minute, for a fixed time, for example, 1 second, using, for example, a crystal oscillator, and this signal is received by signal reception unit 421 of each high-speed control board 413. Then, correction unit 422 of each high-speed control board 413 compares, for example, the number of oscillations per unit time of the crystal oscillator received by signal reception unit 421 with the number of oscillations per unit time of the crystal oscillator of clock generator 420, and corrects the time difference based on the result.
[0050] <Control action> Next, the control operation in the substrate processing apparatus 100 configured as above will be described with reference to Figures 4 to 9. Figure 4 is a flowchart showing the control operation by the control unit 300 of the substrate processing apparatus 100, Figure 5 is a block diagram showing a schematic configuration of the main parts of the control unit 300, and Figures 6 to 10 are block diagrams showing the states of the control unit 300 for explaining the control operation.
[0051] In this embodiment, the ALD process as described above is performed as an example of substrate processing, and the ALD process is performed by the control unit 300 controlling the multiple end devices 201 of the substrate processing unit 200 based on a processing recipe.
[0052] First, in the control unit 300 configured as shown in Fig. 5, a processing recipe for processing a substrate W transmitted from the EC 501 to the MC 401 corresponding to the substrate processing apparatus 100 is downloaded as a local recipe to each high-speed control board 413 via the network 411 (step ST1, Fig. 6). As described above, the EC 501 and MC 401 function as upper control units, and the high-speed control board 413 functions as a lower control unit. Furthermore, for example, E-CAT can be suitably used for the network 411.
[0053] Next, the MC 401, which is the upper control unit, simultaneously instructs each high-speed control board 413 to start a local recipe (step ST2, FIG. 7).
[0054] Next, based on the local recipe, the high-speed control board 413 (I / O board 415) controls the end device (equipment to be controlled at high speed) 201, for example, by operating the equipment using DO and monitoring the equipment using DI / AI, and performs substrate processing, for example, the ALD process as described above (step ST3, FIG. 8).
[0055] However, when high-speed control such as in an ALD process is required for substrate processing, the control period is shorter than the period of the network, for example, the E-CAT. Therefore, the control time is determined based on the clock generator 420 provided on each high-speed control board 413.
[0056] However, when determining the operation time and monitoring time in a local recipe based on the clock generator 420, factors such as the ambient environment, individual differences in the crystal oscillator of the clock generator 420, and aging may cause relative time discrepancies between multiple high-speed control boards 413, or absolute time discrepancies, such as one minute being different from one minute. For example, as shown in Fig. 9, even if the command from the higher-level control system is one second, the actual operating time on the high-speed control board 413 may differ.
[0057] Even if such time differences are small per operation, if the recipe time is long due to factors such as a thick film thickness, the differences will accumulate and have a greater impact. For example, there may be cases where the interlocking of operations between multiple end devices that should be operated in tandem cannot be maintained.
[0058] Therefore, in this embodiment, the deviation in actual operating time in the high-speed control board 413 is corrected based on a clock signal from a higher-level control system that is less susceptible to the ambient environment, individual differences, aging, and the like (step ST4, FIG. 10). Such deviation in actual operating time is corrected by the time deviation correction function unit 430, as described above. Specifically, in the time deviation correction function unit 430, a clock signal is transmitted from a signal transmission unit 521 of the higher-level control system EC 501 to the high-speed control board 413 at regular intervals via a network 513, 411, for example, via E-CAT communication. The signal is then received by a signal reception unit 421 of the high-speed control board 413, and a correction unit 422 compares the period of the signal received by the signal reception unit 421 with the period of the signal from the clock generator 420 to correct the time deviation based on the clock generator 420 in real time. This makes it possible to suppress relative time deviations and absolute time deviations between high-speed control boards 413.
[0059] For example, as shown in FIG. 10, in each high-speed control board 413, the deviation from the command time of 1 second can be eliminated by correcting it using the correction unit 422 based on a clock signal generated, for example, every minute from the EC 501, which is the upper control system.
[0060] In addition, there is a risk of time lag in control occurring between multiple devices, including the substrate processing apparatus 100, that make up the substrate processing system. However, the time lag between devices can be eliminated by transmitting a clock signal from the signal generator 521 of the EC 501 to multiple high-speed control boards of each device for correction.
[0061] <Other applications> Although the embodiments have been described above, the disclosed embodiments should be considered to be illustrative and not restrictive in all respects. The above embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.
[0062] For example, in the above embodiment, an apparatus that performs ALD film formation was used as an example of the substrate processing apparatus. However, the present invention is not limited to an apparatus that performs ALD film formation, as long as it performs substrate processing while controlling each end device by issuing commands from a higher-level control unit via multiple control boards.
[0063] Furthermore, the configuration of the control unit is not limited to that shown in FIG. 2, as long as it controls each end device from a higher-level control system via multiple control boards.
[0064] The substrate to be processed is not particularly limited, and may be, for example, a semiconductor wafer, a glass substrate used in an FPD (flat panel display), a ceramic substrate, or the like. [Explanation of symbols]
[0065] 1; Processing container 2. Mounting table 3. Shower head 4. Gas supply section 5; Exhaust section 22: Lifting mechanism 41e, 42e, 43e, 44e: Rear stage valves (high speed opening and closing valves) 52: Automatic pressure control valve (APC) 100: Substrate processing apparatus 200; processing section 201;End Device 300; control section 401;MC (Higher control system) 411, 513; Network (E-CAT) 420; Clock generator 421: Signal receiving unit 422; Correction section 430: Time lag correction function unit 501;EC (Higher control system) 600; Overall control system W; substrate
Claims
1. A substrate processing apparatus for processing a substrate, a substrate processing unit having a plurality of end devices and performing processing on substrates using the plurality of end devices; a control unit that controls processing of the substrate in the substrate processing unit; and the control unit has a higher-level control unit and a plurality of control boards that are lower-level control units connected to the higher-level control unit via a network, the control boards sending and receiving control signals to and from the end devices, and having a clock generator for measuring time; the control unit further has a time lag correction function unit that transmits a clock signal from the upper control unit to the plurality of control boards for a fixed period of time, and corrects a lag in actual operating time caused by the clock generator on each of the control boards based on the clock signal from the upper control unit.
2. The time lag correction function unit a signal transmission unit provided in the upper control unit and configured to transmit a clock signal to the plurality of control boards via the network for a fixed period of time; a signal receiving unit that is provided on the control board and receives a clock signal from the signal transmitting unit; a correction unit provided on the control board, which compares a period of the signal received by the signal receiving unit with a period of the signal from the clock generator to correct a time deviation based on the clock generator; The substrate processing apparatus of claim 1 , further comprising:
3. The substrate processing apparatus according to claim 2 , wherein the signal generating unit generates the clock signal at regular intervals at least during the period in which the substrate processing is being performed.
4. 3. The substrate processing apparatus according to claim 2, wherein the clock generator generates a clock signal using a quartz oscillator, the clock signal from the signal transmitting unit is transmitted by the quartz oscillator, and the correction unit compares the number of oscillations per unit time received by the signal receiving unit with the number of oscillations per unit time of the clock generator, and corrects the time deviation based on the comparison.
5. 7. The substrate processing apparatus according to claim 1, wherein the control board is an I / O module that controls input and output of digital and analog signals to the end device, and is a control board that performs high-speed control.
6. The substrate processing apparatus according to claim 5 , wherein the host control unit has a processing recipe for processing the substrate, and the processing recipe is downloaded to each of the control boards as a local recipe.
7. The substrate processing apparatus according to claim 1 , wherein the substrate processing section performs ALD film formation on the substrate.
8. A control system for controlling a substrate processing apparatus that performs substrate processing on a substrate, A higher-level control unit; a plurality of control boards serving as lower control units connected to the upper control unit via a network; and the control board transmits and receives control signals to and from a plurality of end devices that are components of the substrate processing apparatus for processing the substrate, and has a clock generator for measuring time; The control system further comprises a time lag correction function unit that transmits a clock signal from the upper control unit to the plurality of control boards for a fixed period of time, and corrects a deviation in the actual operating time caused by the clock generator on each of the control boards based on the clock signal from the upper control unit.
9. The time lag correction function unit a signal transmission unit provided in the upper control unit and configured to transmit a clock signal to the plurality of control boards via the network for a fixed period of time; a signal receiving unit that is provided on the control board and receives a clock signal from the signal transmitting unit; a correction unit provided on the control board, which compares a period of the signal received by the signal receiving unit with a period of the signal from the clock generator to correct a time deviation based on the clock generator; The control system of claim 8 , comprising:
10. The control system according to claim 9 , wherein the signal generator generates the clock signal at regular intervals at least during the period in which the substrate processing is being performed.
11. 10. The control system according to claim 9, wherein the clock generator generates a clock signal using a crystal oscillator, the clock signal from the signal transmitting unit is transmitted by the crystal oscillator, and the correction unit compares the number of oscillations per unit time received by the signal receiving unit with the number of oscillations per unit time of the clock generator and corrects the time difference based on the comparison.
12. The control system according to any one of claims 8 to 11, wherein the control board is an I / O module that controls the input and output of digital and analog signals to the end device, and is a high-speed control board that performs high-speed control.
13. The control system according to claim 12 , wherein the host control unit has a process recipe for processing the substrate, and the process recipe is downloaded to each of the control boards as a local recipe.
14. 12. The control system according to claim 8, wherein the upper control unit includes an equipment controller that controls the substrate processing apparatus and an equipment controller that controls an entire substrate processing system having a plurality of apparatuses including the substrate processing apparatus, and the clock signal is transmitted from the equipment controller to the plurality of control boards via the equipment controller.
15. 15. The control system of claim 14, wherein the substrate processing system has a plurality of equipment controllers corresponding to a plurality of apparatuses including the substrate processing apparatus, and a plurality of the control boards are connected to the plurality of equipment controllers, respectively, and the clock signal is transmitted from the facility controller to the plurality of control boards of the plurality of apparatuses via the plurality of equipment controllers.
16. A control method for controlling a substrate processing apparatus that performs substrate processing on a substrate, comprising: a step of performing substrate processing by using a control system having a host control unit and a plurality of control boards as lower control units connected to the host control unit via a network, and exchanging control signals between the control board and a plurality of end devices that are components of the substrate processing apparatus and that perform processing on the substrates; a step of transmitting a clock signal from the upper control unit to the plurality of control boards for a fixed period of time, and correcting a deviation in actual operating time caused by a clock generator for time measurement provided on each of the control boards based on the clock signal from the upper control unit; A control method comprising:
17. The control method according to claim 16, wherein the clock signal is generated at regular intervals at least during the period in which the substrate processing is being performed.
18. 17. The control method according to claim 16, wherein the clock signal from the host control unit and the clock signal from the clock generator provided on the control board are both generated by crystal oscillators, and the number of oscillations per unit time of these clock signals is compared, and a time difference is corrected based on the number of oscillations.
19. 19. The control method according to claim 16, wherein the control board is an I / O module that controls the input and output of digital and analog signals to the end device, and is a high-speed control board that performs high-speed control.
20. 20. The control method according to claim 19, wherein the host control unit has a processing recipe for processing the substrate, and the step of performing the substrate processing is performed by downloading the processing recipe to each of the control boards as a local recipe.