Semiconductor light-emitting element, manufacturing method for semiconductor light-emitting element, light-emitting module, and manufacturing method for light-emitting module

Abstract

To provide a semiconductor light-emitting element capable of improving the efficiency of extracting deep-ultraviolet light.SOLUTION: A semiconductor light-emitting element (100, 200, 300) includes a substrate (10) and a semiconductor layer (20). A constituent material of the substrate is single-crystal aluminum nitride. The substrate includes a first main surface (10a) and a second main surface (10b) on the opposite side of the first main surface. The semiconductor layer includes an n-type semiconductor layer (21) disposed on the first main surface, an active layer (22) disposed on the n-type semiconductor layer and generating deep-ultraviolet light, and a p-type semiconductor layer (23) disposed on the active layer. The semiconductor layer includes a plurality of mesa structures (24) in any cross-sectional view. On the second main surface, a plurality of protrusion parts (10c) is formed. The protrusion part faces the mesa structure. The protrusion part includes a top surface (10d). An angle (θ1) defined by tan-1{(W2-W1) / 2L} is -25° or more and 65° or less.SELECTED DRAWING: Figure 3A

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor light-emitting device, a method for manufacturing a semiconductor light-emitting device, a light-emitting module, and a method for manufacturing a light-emitting module. [Background technology]

[0002] Non-Patent Document 1 (M. Khizar et al., Nitride deep-ultraviolet light-emitting diodes with microlens array, Applied Physics Letters, 86, 173504, April 18, 2005) describes a semiconductor light-emitting device. The semiconductor light-emitting device described in Non-Patent Document 1 has a substrate and a semiconductor layer. The substrate has a first main surface and a second main surface that is the opposite surface to the first main surface. The substrate is made of sapphire. The semiconductor layer is disposed on the first main surface and includes an active layer that generates deep ultraviolet light. The semiconductor layer has a mesa structure. A plurality of microlenses are formed on the second main surface.

[0003] Patent Document 1 (JP 2017-17110 A) describes a semiconductor light-emitting device. The semiconductor light-emitting device described in Patent Document 1 has a substrate and a semiconductor layer. The substrate has a first main surface, a second main surface opposite to the first main surface, and an outer peripheral side surface inclined with respect to the first main surface and the second main surface. The substrate is made of aluminum nitride. The semiconductor layer is disposed on the first main surface and includes an active layer that generates deep ultraviolet light. The semiconductor layer has a mesa structure. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2017-17110 A [Non-patent literature]

[0005] [Non-Patent Document 1] M. Khizar et al., Nitride deep-ultraviolet light-emitting diodes with microlens array, Applied Physics Letters, 86, 173504, April 18, 2005. Summary of the Invention [Problem to be solved by the invention]

[0006] The semiconductor light emitting device described in Non-Patent Document 1 and the semiconductor light emitting device described in Patent Document 1 have room for improvement in terms of the extraction efficiency of deep ultraviolet light.

[0007] More specifically, in the semiconductor light-emitting device described in Non-Patent Document 1, one microlens does not correspond to one mesa structure. In addition, in the semiconductor light-emitting device described in Non-Patent Document 1, multiple microlenses are formed by dry etching the second main surface. However, it is difficult to etch the substrate deeply by dry etching, and the thickness of the substrate between two adjacent microlenses becomes large. As a result, in the semiconductor light-emitting device described in Non-Patent Document 1, the distance that the deep ultraviolet light generated in the active layer travels in the substrate before being extracted from the second main surface becomes long, and if aluminum nitride, which has a large absorption coefficient for deep ultraviolet light, is used as the constituent material of the substrate, the extraction efficiency of deep ultraviolet light decreases.

[0008] In the semiconductor light emitting device described in Patent Document 1, the deep ultraviolet light generated in the active layer also has to travel a long distance in the substrate before being extracted from the outer peripheral side surface, so the extraction efficiency of the deep ultraviolet light is similarly reduced.

[0009] The present disclosure has been made in consideration of the problems of the conventional techniques as described above. More specifically, the present disclosure provides a semiconductor light-emitting element capable of improving the extraction efficiency of deep ultraviolet light. [Means for solving the problem]

[0010] The semiconductor light emitting device of the present disclosure includes a substrate and a semiconductor layer. The substrate is made of single crystal aluminum nitride. The substrate has a first main surface and a second main surface opposite to the first main surface. The semiconductor layer has an n-type semiconductor layer disposed on the first main surface, an active layer disposed on the n-type semiconductor layer and generating deep ultraviolet light, and a p-type semiconductor layer disposed on the active layer. The semiconductor layer has a plurality of mesa structures in any cross-sectional view. A plurality of protrusions are formed on the second main surface. The protrusions face the mesa structure. The protrusions have a top surface. If the width of the mesa structure is W1, the width of the top surface is W2, and the distance between the active layer and the top surface is L, then tan -1 The angle defined by {(W2-W1) / 2L} is equal to or greater than -25° and is equal to or less than 65°. Effect of the Invention

[0011] According to the semiconductor light emitting device of the present disclosure, it is possible to improve the extraction efficiency of deep ultraviolet light. [Brief description of the drawings]

[0012] [Figure 1] 1 is a plan view of a semiconductor light emitting element 100. FIG. [Diagram 2] 2 is a plan view of the semiconductor light emitting device 100 as viewed from the opposite side to that of FIG. [Figure 3A] FIG. 2 is a cross-sectional view taken along line III-III in FIG. [Figure 3B] 2 is an example of a cross-sectional SEM photograph of the semiconductor light emitting device 100. [Figure 4] 10 is a cross-sectional view of a semiconductor light emitting device 100 according to a modified example. [Diagram 5] 1A to 1C are manufacturing process diagrams of the semiconductor light emitting device 100. [Figure 6] FIG. 2 is a cross-sectional view illustrating a preparation step S1. [Figure 7] 10 is a cross-sectional view illustrating a semiconductor layer forming step S2. FIG. [Figure 8] 11 is a cross-sectional view illustrating a mesa structure forming step S3. FIG. [Figure 9]FIG. 11 is a cross-sectional view illustrating a first electrode forming step S4. [Figure 10] FIG. 11 is a cross-sectional view illustrating a second electrode forming step S5. [Figure 11] 11 is a cross-sectional view illustrating a substrate rear surface processing step S6. [Figure 12] 11 is a cross-sectional view illustrating a mask forming step S7. [Figure 13A] 1 is a graph showing the relationship between current and optical output in the semiconductor light emitting device 100 and the semiconductor light emitting device 100A. [Figure 13B] 1 is a graph showing the relationship between current and external quantum efficiency in the semiconductor light emitting device 100 and the semiconductor light emitting device 100A. [Figure 14A] 1 is a first graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 100. [Figure 14B] 11 is a second graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 100. [Figure 15] 1 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 100. [Figure 16] 2 is a plan view of the semiconductor light emitting element 200. FIG. [Figure 17] 17 is a plan view of the semiconductor light emitting device 200 as viewed from the opposite side to that in FIG. [Figure 18A] 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 16. [Figure 18B] 1 is an example of a bird's-eye SEM photograph of the semiconductor light emitting device 200. [Figure 19A] 1 is a graph showing the relationship between current and optical output in the semiconductor light emitting device 200 and the semiconductor light emitting device 200A. [Figure 19B] 1 is a graph showing the relationship between current and external quantum efficiency in the semiconductor light emitting device 200 and the semiconductor light emitting device 200A. [Figure 20] 1 is a graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 200. [Figure 21]1 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 200. [Figure 22] 1 is a graph showing the relationship between the angle θ1 in the semiconductor light emitting device 200 and the half width of the emission angle of deep ultraviolet light. [Figure 23A] 13 is a graph showing the emission angle and intensity of deep ultraviolet light from the semiconductor light emitting device 200 when the angle θ1 is −5°. [Figure 23B] 13 is a graph showing the emission angle and intensity of deep ultraviolet light from the semiconductor light emitting device 200 when the angle θ1 is 26°. [Figure 23C] 13 is a graph showing the emission angle and intensity of deep ultraviolet light from the semiconductor light emitting device 200 when the angle θ1 is 35°. [Figure 23D] 13 is a graph showing the emission angle and intensity of deep ultraviolet light from the semiconductor light emitting device 200 when the angle θ1 is 50°. [Figure 24] 13 is a graph showing the relationship between the angle θ1 in the semiconductor light emitting device 200 and the half width of the emission angle of deep ultraviolet light when the width W1 is changed. [Diagram 25] 2 is a plan view of the semiconductor light emitting element 300. FIG. [Figure 26] 25. FIG. 26 is a plan view of the semiconductor light emitting device 300 as viewed from the opposite side to that in FIG. [Figure 27] FIG. 26 is a cross-sectional view taken along line XXVII-XXVII in FIG. 25. [Figure 28] 1 is a graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 300. [Figure 29] 13 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 300. [Diagram 30] 1 is a graph showing the relationship between thickness T and light extraction efficiency in a semiconductor light emitting device 300. [Diagram 31] 1 is a cross-sectional view of a semiconductor light emitting element 400. FIG. [Diagram 32] 1 is a manufacturing process diagram of the semiconductor light emitting device 400. FIG. [Diagram 33] 2 is a cross-sectional view of the light emitting module 500. FIG. [Diagram 34] 1A to 1C are manufacturing process diagrams of the light emitting module 500. [Diagram 35] 10A to 10C are diagrams showing the manufacturing process of a light emitting module 500 according to a modified example. [Diagram 36] 13 is a graph showing the relationship between current and deep ultraviolet light output in the light-emitting module 500. [Figure 37] 13 is a graph showing the relationship between current and deep ultraviolet light extraction efficiency in the light-emitting module 500. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] The details of the embodiment will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant description will not be repeated.

[0014] (First embodiment) The following describes the semiconductor light emitting device according to the first embodiment. The semiconductor light emitting device according to the first embodiment is designated as a semiconductor light emitting device 100.

[0015] <Configuration of the semiconductor light emitting element 100> The configuration of the semiconductor light emitting device 100 will be described below.

[0016] Fig. 1 is a plan view of the semiconductor light emitting device 100. Fig. 2 is a plan view of the semiconductor light emitting device 100 as viewed from the opposite side to that of Fig. 1. Fig. 3A is a cross-sectional view taken along line III-III in Fig. 1. Fig. 3B is an example of a cross-sectional SEM photograph of the semiconductor light emitting device 100. As shown in Figs. 1 to 3B, the semiconductor light emitting device 100 has a substrate 10, a semiconductor layer 20, an n-electrode 31, a p-electrode 32, a pad electrode 33, and a pad electrode 34.

[0017] The substrate 10 has a first main surface 10a and a second main surface 10b. The first main surface 10a and the second main surface 10b are end surfaces in the thickness direction of the substrate 10. The second main surface 10b is the opposite surface to the first main surface 10a. The material of the substrate 10 is single crystal aluminum nitride (AlN). The material of the substrate 10 is preferably single crystal aluminum nitride manufactured by a sublimation method (PVT: Physical Vapor Transport). The absorption coefficient of the substrate 10 for deep ultraviolet light is 1 cm -1 More than 50cm -1 or less. Deep purple light is light having a wavelength of 100 nm or more and 350 nm or less, and more narrowly, light having a wavelength of 200 nm or more and 300 nm or less. The second main surface 10b is preferably a -c plane (N (nitrogen) polar plane) of aluminum nitride.

[0018] The semiconductor layer 20 has an n-type semiconductor layer 21, an active layer 22, and a p-type semiconductor layer 23. The n-type semiconductor layer 21 is disposed on the first major surface 10a. The active layer 22 is disposed on the n-type semiconductor layer 21. The p-type semiconductor layer 23 has an electron blocking layer 23a disposed on the active layer 22, a cladding layer 23b disposed on the electron blocking layer 23a, and a contact layer 23c disposed on the cladding layer 23b.

[0019] The constituent material of the n-type semiconductor layer 21 is, for example, AlGaN. The constituent material of the n-type semiconductor layer 21 may be AlInGaN. The constituent material of the n-type semiconductor layer 21 is doped with n-type impurities. The n-type impurities are, for example, silicon (Si), germanium (Ge), tin (Sn), oxygen (O), carbon (C), etc.

[0020] The active layer 22 has, for example, a multiple quantum well (MQW) structure. More specifically, the active layer 22 has well layers and barrier layers that are alternately stacked. The well layers are made of, for example, AlGaN or AlInGaN. The barrier layers are made of, for example, AlGaN or AlInGaN. Deep ultraviolet light is generated from the active layer 22.

[0021] The constituent material of the electron blocking layer 23a is, for example, AlGaN or AlN. The constituent material of the cladding layer 23b is, for example, AlGaN. The constituent material of the contact layer 23c is, for example, GaN. The constituent material of the p-type semiconductor layer 23 is doped with p-type impurities. The p-type impurities are, for example, magnesium (Mg), zinc (Zn), beryllium (Be), etc.

[0022] The semiconductor layer 20 has a plurality of mesa structures 24 in a cross-sectional view. In the semiconductor light emitting device 100, the semiconductor layer 20 has a plurality of mesa structures 24 in a cross-sectional view perpendicular to the first direction DR1, but the semiconductor layer 20 may have a plurality of mesa structures 24 in any cross-sectional view. Around the mesa structure 24, the active layer 22 and the p-type semiconductor layer 23 are removed so that the n-type semiconductor layer 21 is exposed. The mesa structure 24 extends along the first direction DR1 in a planar view. The plurality of mesa structures 24 are arranged at intervals in the second direction DR2. The second direction DR2 is a direction perpendicular to the first direction DR1 in a planar view. The plurality of mesa structures 24 are, for example, comb-shaped in a planar view.

[0023] The width of the mesa structure 24 is defined as width W1. In the semiconductor light emitting device 100, the width W1 is measured in the second direction DR2. The mesa structure 24 has a first end 24a and a second end 24b. In the semiconductor light emitting device 100, the first end 24a and the second end 24b are both ends of the mesa structure 24 in the second direction DR2.

[0024] A plurality of protrusions 10c are formed on the second main surface 10b. The protrusions 10c extend along a first direction DR1 in a plan view. The plurality of protrusions 10c are arranged along a second direction DR2. The protrusions 10c face the mesa structure 24. Preferably, the center of the protrusion 10c in the second direction DR2 overlaps with the center of the mesa structure 24 in the second direction DR2.

[0025] The protrusion 10c has a top surface 10d and a side surface 10e. The top surface 10d is formed of the second main surface 10b. In other words, the top surface 10d is a -c plane (N-polarity plane) of aluminum nitride. The side surface 10e is continuous with the top surface 10d at its upper end. In the semiconductor light emitting device 100, the side surface 10e is a first side surface 10ea and a second side surface 10eb. The first side surface 10ea and the second side surface 10eb are continuous with the top surface 10d at their upper ends. The first side surface 10ea and the second side surface 10eb face each other in the second direction DR2.

[0026] The lower end of the first side surface 10ea of ​​one protrusion 10c is preferably continuous with the lower end of the second side surface 10eb of another protrusion 10c adjacent to the one protrusion 10c. From another perspective, a recess is formed in the second main surface 10b, the side wall surface of which is constituted by the first side surface 10ea and the second side surface 10eb, and the recess is V-shaped in a cross section perpendicular to the first direction DR1.

[0027] The top surface 10d has a third end 10da and a fourth end 10db. In the semiconductor light emitting device 100, the third end 10da and the fourth end 10db are both ends of the top surface 10d in the second direction DR2. In the semiconductor light emitting device 100, the third end 10da is a ridgeline between the top surface 10d and the first side surface 10ea, and the fourth end 10db is a ridgeline between the top surface 10d and the second side surface 10eb. The first end 24a is closer to the third end 10da than the fourth end 10db.

[0028] The top surface 10d has a width W2. In the semiconductor light emitting device 100, the width W2 is the width of the top surface 10d in the second direction DR2. From another perspective, in the semiconductor light emitting device 100, the width W2 is the distance between the third end 10da and the fourth end 10db in the second direction DR2. The width W2 may be greater than the width W1, less than the width W1, or equal to the width W1.

[0029] The protrusion 10c has a width W3. In the semiconductor light emitting device 100, the width W3 is the distance between the bottom end of the first side surface 10ea and the bottom end of the second side surface 10eb in the second direction DR2. The width of the protrusion 10c in the second direction DR2 increases with increasing distance from the top surface 10d. That is, in a cross-sectional view perpendicular to the first direction DR1, the protrusion 10c has a trapezoidal shape in which the length of the upper base (width W2) is smaller than the length of the lower base (width W3).

[0030] The angle θ1 is the angle between a virtual line (dotted line in FIG. 3A) passing through the first end 24a and the third end 10da and the normal direction of the second main surface 10b. The angle θ1 is, for example, not less than -25° and not more than 65°. Note that a negative value of the angle θ1 means that the width W1 is greater than the width W2. The angle θ1 is preferably not less than -10° and not more than 30°, and more preferably not less than 0° and not more than 20°. Note that the angle θ1 is calculated by the following equation: -1 It can be calculated by {(W2-W1) / 2L}.

[0031] The angle between the side surface 10e (first side surface 10ea, second side surface 10eb) and the top surface 10d is defined as angle θ2. The angle θ2 is, for example, 56°±20°. The angle θ2 is preferably 56°±10°, and more preferably 56°±6°. The thickness of the substrate 10 between two adjacent protrusions 10c is defined as thickness T. The thickness T is 90 μm or less. The thickness T is preferably 50 μm or less, more preferably 40 μm or less, and particularly preferably 30 μm or less. The thickness T may be 0.

[0032] The height of the protrusion 10c is defined as height H. Height H is the distance between the lower end of the side surface 10e (first side surface 10ea, second side surface 10eb) and the top surface 10d. In the semiconductor light emitting device 100, the value obtained by dividing the height H by the width W1 is preferably 0.1 or more, more preferably 0.3 or more, and particularly preferably 0.5 to 3.

[0033] The n-electrode 31 is disposed on the n-type semiconductor layer 21 exposed between the mesa structures 24 in a plan view. The p-electrode 32 is disposed on the p-type semiconductor layer 23 (more specifically, the contact layer 23c). The constituent materials of the n-electrode 31 and the p-electrode 32 are, for example, metal materials. The n-electrode 31 is configured, for example, by laminating a titanium (Ti) layer, an aluminum layer, and a gold (Au) layer in this order from the n-type semiconductor layer 21 side. The p-electrode 32 is configured, for example, by laminating a nickel (Ni) layer and a gold layer in this order from the p-type semiconductor layer 23 side.

[0034] The pad electrode 33 is disposed on the n-electrode 31. The pad electrode 33 is made of, for example, a metal material. The pad electrode 33 is configured by laminating a titanium layer, an aluminum layer, and a gold layer in this order from the n-electrode 31 side. The pad electrode 34 is disposed on the p-electrode 32. The pad electrode 34 is made of, for example, a metal material. The pad electrode 34 is configured by laminating a titanium layer, an aluminum layer, and a gold layer in this order from the p-electrode 32 side.

[0035] <Modification> Fig. 4 is a cross-sectional view of a semiconductor light emitting device 100 according to a modified example. As shown in Fig. 4, the semiconductor light emitting device 100 may further include an antireflection film 40. The antireflection film 40 is made of, for example, silicon dioxide (SiO2). The antireflection film 40 is disposed on the top surface 10d.

[0036] <Method of Manufacturing the Semiconductor Light Emitting Device 100> A method for manufacturing the semiconductor light emitting device 100 will now be described.

[0037] Fig. 5 is a manufacturing process diagram of the semiconductor light emitting device 100. As shown in Fig. 5, the manufacturing method of the semiconductor light emitting device 100 includes a preparation step S1, a semiconductor layer formation step S2, a mesa structure formation step S3, a first electrode formation step S4, a second electrode formation step S5, a substrate back surface processing step S6, a mask formation step S7, a protrusion formation step S8, and a singulation step S9.

[0038] In the method for manufacturing the semiconductor light emitting device 100, a preparation step S1 is first performed. Fig. 6 is a cross-sectional view illustrating the preparation step S1. As shown in Fig. 6, in the preparation step S1, a substrate 10 is prepared. The substrate 10 prepared in the preparation step S1 does not have a semiconductor layer 20 formed on a first major surface 10a, and does not have a plurality of protrusions 10c formed on a second major surface 10b.

[0039] The semiconductor layer forming step S2 is performed after the preparation step S1. Fig. 7 is a cross-sectional view illustrating the semiconductor layer forming step S2. As shown in Fig. 7, in the semiconductor layer forming step S2, a semiconductor layer 20 is formed. Each layer constituting the semiconductor layer 20 is formed by, for example, MOCVD (Metal Organic Chemical Vapor Deposition). After the semiconductor layer 20 is formed, annealing is performed to activate the p-type semiconductor layer 23.

[0040] The mesa structure forming step S3 is performed after the semiconductor layer forming step S2. FIG. 8 is a cross-sectional view illustrating the mesa structure forming step S3. As shown in FIG. 8, in the mesa structure forming step S3, a mesa structure 24 is formed in the semiconductor layer 20. In the mesa structure forming step S3, first, a mask is formed on the semiconductor layer 20. The mask is made of a metal material such as nickel. Second, anisotropic etching is performed using the mask. As a result, the mesa structure 24 is formed. Third, the mask is removed.

[0041] The first electrode formation step S4 is performed after the mesa structure formation step S3. Fig. 9 is a cross-sectional view illustrating the first electrode formation step S4. As shown in Fig. 9, in the first electrode formation step S4, an n-electrode 31 and a p-electrode 32 are formed. In the first electrode formation step S4, the n-electrode 31 and the p-electrode 32 are formed in sequence, for example, by a vacuum deposition method. After the n-electrode 31 and the p-electrode 32 are formed, annealing is performed.

[0042] The second electrode forming step S5 is performed after the first electrode forming step S4. Fig. 10 is a cross-sectional view illustrating the second electrode forming step S5. As shown in Fig. 10, in the second electrode forming step S5, the pad electrodes 33 and 34 are formed. In the second electrode forming step S5, the pad electrodes 33 and 34 are formed by, for example, a vacuum deposition method.

[0043] The substrate back surface processing step S6 is performed after the second electrode forming step S5. Fig. 11 is a cross-sectional view illustrating the substrate back surface processing step S6. As shown in Fig. 11, in the substrate back surface processing step S6, machining (grinding and polishing) is performed on the second main surface 10b. This reduces the thickness of the substrate 10.

[0044] The mask forming step S7 is performed after the substrate back surface processing step S6. FIG. 12 is a cross-sectional view illustrating the mask forming step S7. As shown in FIG. 12, in the mask forming step S7, a mask 50 is formed on the second main surface 10b. The mask 50 has a plurality of patterns 51. The patterns 51 extend along the first direction DR1 in a plan view while facing the mesa structure 24. The plurality of patterns 51 are arranged at intervals in the second direction DR2. An opening 52 of the mask 50 is formed between two adjacent patterns 51. The material of the mask 50 is preferably the same as the material of the anti-reflection film 40.

[0045] In forming the mask 50, first, the constituent material of the mask 50 is deposited. The constituent material of the mask 50 is preferably deposited by using, for example, a PE-CVD (Plasma-Enhanced Chemical Vapor Deposition) method. Instead of the PE-CVD method, the constituent material of the mask 50 may be deposited by using a deposition method, a sputtering method, or an ALD (Atomic Layer Deposition) method. Second, the deposited constituent material of the mask 50 is patterned. The patterning is performed by etching the constituent material of the mask 50 using a resist pattern formed by photolithography. A resist having resistance to heat and alkali may be used as the constituent material of the mask 50. In this case, the mask 50 may be directly formed by photolithography. The patterning is formed after performing alignment with respect to the position of the mesa structure 24. For example, the alignment method is performed by using a device capable of double-sided alignment to see through the mesa structure 24 and the alignment mark from the second main surface 10b side of the substrate 10. The alignment may also be based on the edge of the substrate 10.

[0046] The protrusion forming step S8 is performed after the mask forming step S7. In the protrusion forming step S8, the substrate 10 exposed from the openings 52 is wet-etched using the mask 50 to form a plurality of protrusions 10c. The wet etching is performed using a hot alkaline solution. The hot alkaline solution is, for example, a TMAH (tetramethylammonium hydroxide aqueous solution). The hot alkaline solution may be a KOH (potassium hydroxide) aqueous solution.

[0047] By performing wet etching using the hot alkaline solution, a recess is formed on the second main surface 10b exposed from the opening. In a cross-sectional view perpendicular to the first direction DR1, the recess has a first side wall surface and a second side wall surface facing the first side wall surface with a gap therebetween. The wet etching using the hot alkaline solution proceeds such that the first side wall surface and the second side wall surface form a certain angle (for example, 56°±6°) with respect to the second main surface 10b (see FIG. 3B). As the wet etching using the hot alkaline solution proceeds, the lower end of the first side wall surface comes into contact with the lower end of the second side wall surface, and the wet etching stops proceeding.

[0048] After the wet etching, the first sidewall surface becomes the first side surface 10ea of ​​one protrusion 10c, the second sidewall surface becomes the second side surface 10eb of another protrusion 10c adjacent to the one protrusion 10c, and the second main surface 10b below the pattern 51 becomes the top surface 10d. The mask 50 may be removed after the protrusion forming step S8, or may remain after the protrusion forming step S8. When the mask 50 remains after the protrusion forming step S8, the remaining pattern 51 becomes the anti-reflection film 40.

[0049] The singulation process S9 is performed after the protrusion formation process S8. In the singulation process S9, a dicing process is performed to singulate the semiconductor light emitting device 100. In this manner, the semiconductor light emitting device 100 having the structure shown in FIGS. 1 to 3A is manufactured.

[0050] <Effects of the semiconductor light emitting element 100> The effects of the semiconductor light emitting device 100 will be described below.

[0051] In the semiconductor light emitting device 100, the semiconductor layer 20 has a plurality of mesa structures 24, and a plurality of protrusions 10c are formed on the second main surface 10b. In addition, in the semiconductor light emitting device 100, one mesa structure 24 faces one protrusion 10c. Therefore, the deep ultraviolet light within the light escape cone is extracted from the top surface 10d, and the deep ultraviolet light outside the light escape cone is also extracted from the side surface 10e (the first side surface 10ea and the second side surface 10eb).

[0052] In the semiconductor light emitting device 100, the protruding portion 10c is formed by deeply etching the substrate 10 so that the thickness T is 90 μm or less. Normally, it is difficult to deeply etch the substrate 10 by dry etching, and it is difficult to perform accurate etching by wet etching. However, in the semiconductor light emitting device 100, the second main surface 10b is the -c plane (N polarity plane) of aluminum nitride, and a hot alkaline solution is used for wet etching, so that the wet etching proceeds such that the first and second side wall surfaces facing each other with a gap between them of the recess form a certain angle with respect to the second main surface 10b.

[0053] This wet etching is stopped when the lower end of the first side wall surface and the lower end of the second side wall surface come into contact with each other, so that the processing precision for forming the protrusion 10c is high, and it is possible to ensure the accuracy of the dimensions of the protrusion 10c and the accurate correspondence with the mesa structure 24. As a result of the substrate 10 being deeply etched, the distance that the deep ultraviolet light generated in the active layer 22 travels before being extracted to the outside of the substrate 10 is shortened, and the absorption of the deep ultraviolet light in the substrate 10 made of aluminum nitride is reduced. In this way, the semiconductor light emitting element 100 can improve the extraction efficiency of deep ultraviolet light.

[0054] The semiconductor light emitting element according to the comparative example is referred to as semiconductor light emitting element 100A. The configuration of the semiconductor light emitting element 100A is the same as the configuration of the semiconductor light emitting element 100, except that the second main surface 10b does not have a plurality of protrusions 10c formed thereon (i.e., the second main surface 10b is configured as a flat surface).

[0055] FIG. 13A is a graph showing the relationship between current and optical output in the semiconductor light emitting device 100 and the semiconductor light emitting device 100A. FIG. 13B is a graph showing the relationship between current and external quantum efficiency in the semiconductor light emitting device 100 and the semiconductor light emitting device 100A. As shown in FIG. 13A and FIG. 13B, the semiconductor light emitting device 100 exhibits high optical output and external quantum efficiency (EQE) compared to the semiconductor light emitting device 100A. More specifically, the semiconductor light emitting device 100 exhibits 1.55 times optical output and external quantum efficiency compared to the semiconductor light emitting device 100A when a current of 100 mA flows. This comparison supports the fact that the semiconductor light emitting device 100 improves the extraction efficiency of deep ultraviolet light.

[0056] 13A and 13B, the chip size is 1 mm×1 mm, and the area of ​​the mesa structure 24 in a plan view is 0.30 mm 2 13A and 13B, in the semiconductor light emitting device 100, the width W1 and width W2 are 90 μm, the width W3 is 180 μm, the angle θ2 is 56°, the thickness T is 34 μm, and the height H is 67 μm. Also, in Fig. 13A and 13B, experimental values ​​of the relationship between the current and the optical output or the external quantum efficiency are shown.

[0057] FIG. 14A is a first graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 100. FIG. 14B is a second graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 100. As shown in FIG. 14A and FIG. 14B, in the semiconductor light emitting device 100, the deep ultraviolet light extraction efficiency (LEE: Light Extraction Efficiency) is particularly improved when the angle θ1 is in the range of -25° to 65°, and the deep ultraviolet light extraction efficiency is further improved when the angle θ1 is in the range of -10° to 30°. Thus, the angle θ1 is preferably -25° to 65°, and more preferably -10° to 30°. Note that FIG. 14A and FIG. 14B show the relationship between the angle θ1 and the light extraction efficiency calculated using the ray tracing method.

[0058] FIG. 15 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 100. As shown in FIG. 15, in the semiconductor light emitting device 100, the extraction efficiency of deep ultraviolet light is maximized when the angle θ2 is about 56°. In addition, in the semiconductor light emitting device 100, the extraction efficiency of deep ultraviolet light is particularly improved when the angle θ2 is 56°±20°, and the extraction efficiency of deep ultraviolet light is further improved when the angle θ2 is 56°±10°. For this reason, the angle θ2 is preferably 56°±20°, and more preferably 56°±10°. FIG. 15 shows the relationship between the angle θ2 and the light extraction efficiency calculated using the ray tracing method.

[0059] 14A, 14B, and 15, the value obtained by dividing the height H by the width W1 is changed, the angle θ2 is set to 56°, the width W2 is set to 90 μm, the thickness T is set to 10 μm, and the absorption coefficient of the substrate 10 for deep ultraviolet light is set to 10 cm. -1 It is said that.

[0060] Second embodiment A semiconductor light emitting device according to the second embodiment will be described.

[0061] The semiconductor light emitting device according to the second embodiment is referred to as a semiconductor light emitting device 200. Here, differences from the semiconductor light emitting device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0062] <Configuration of the semiconductor light emitting element 200> The configuration of the semiconductor light emitting device 200 will be described below.

[0063] FIG. 16 is a plan view of the semiconductor light emitting device 200. FIG. 17 is a plan view of the semiconductor light emitting device 200 viewed from the opposite side to that of FIG. 16. In FIG. 17, the pad electrode 34 is omitted. FIG. 18A is a cross-sectional view taken along line XVIII-XVIII in FIG. 16. FIG. 18B is an example of a bird's-eye SEM photograph of the semiconductor light emitting device 200. As shown in FIGS. 16 to 18B, the semiconductor light emitting device 200 has a substrate 10, a semiconductor layer 20, an n-electrode 31, a p-electrode 32, and a pad electrode 33. In this regard, the configuration of the semiconductor light emitting device 200 is common to the configuration of the semiconductor light emitting device 100.

[0064] In the semiconductor light emitting device 200, the mesa structure 24 is circular in plan view. In the semiconductor light emitting device 200, the first end 24a and the second end 24b are both ends of the mesa structure 24 in a cross-sectional view that passes through the center of the mesa structure 24 in plan view and is perpendicular to the second main surface 10b. In the semiconductor light emitting device 200, the width W1 is the diameter of the mesa structure 24 in plan view. In the semiconductor light emitting device 200, the multiple mesa structures 24 are arranged in a regular triangular lattice shape in plan view.

[0065] In the semiconductor light emitting device 200, the protrusion 10c is in the shape of a truncated cone. That is, in the semiconductor light emitting device 200, the top surface 10d is circular in plan view, the side surface 10e is formed of a conical surface, and the diameter of the side surface 10e increases with increasing distance from the top surface 10d. In the semiconductor light emitting device 200, the third end 10da and the fourth end 10db are both ends of the top surface 10d in a cross-sectional view that passes through the center of the top surface 10d in plan view and is perpendicular to the second main surface 10b. In the semiconductor light emitting device 200, the width W2 is the diameter of the top surface 10d, and the width W3 is the diameter of the side surface 10e at the lower end. In the semiconductor light emitting device 200, the multiple protrusions 10c are arranged in a regular triangular lattice shape so that the lower ends of the side surfaces 10e contact each other (see FIG. 18B). In the semiconductor light emitting device 200, the center of the top surface 10d preferably overlaps with the center of the mesa structure 24 in plan view.

[0066] In the semiconductor light emitting device 200, the angle θ1 is the angle between the top surface 10d and a virtual line (see the dotted line in FIG. 18) that passes through the center of the top surface 10d in a plan view and passes through the first end 24a and the third end 10da in a cross-sectional view perpendicular to the second main surface 10b. In the semiconductor light emitting device 200, the value obtained by dividing the height H by the width W1 is preferably 0.1 or more, more preferably 0.3 or more, and particularly preferably 0.5 to 5.

[0067] In the semiconductor light emitting device 200, the angle θ1 is, for example, −20° or more and 65° or less, preferably −10° or more and 30° or less, and more preferably 0° or more and 20° or less, similar to the semiconductor light emitting device 100. In addition, in the semiconductor light emitting device 200, from the viewpoint of increasing the directivity of the deep ultraviolet light while maintaining the intensity of the emitted deep ultraviolet light, the angle θ2 is preferably −5° or more and 32° or less, and more preferably 10° or more and 20° or less. In these respects, the configuration of the semiconductor light emitting device 200 differs from the configuration of the semiconductor light emitting device 100.

[0068] <Method of Manufacturing the Semiconductor Light Emitting Device 200> A method for manufacturing the semiconductor light emitting device 200 will now be described.

[0069] The manufacturing method of the semiconductor light emitting device 200 includes a preparation step S1, a semiconductor layer formation step S2, a mesa structure formation step S3, a first electrode formation step S4, a second electrode formation step S5, a substrate back surface processing step S6, a mask formation step S7, a protrusion formation step S8, and a singulation step S9. In this respect, the manufacturing method of the semiconductor light emitting device 200 is common to the manufacturing method of the semiconductor light emitting device 100.

[0070] In the method for manufacturing the semiconductor light emitting device 200, in the mask formation step S7, the pattern 51 is formed in a circular shape in a planar view, and the multiple patterns 51 are arranged in a regular triangular lattice shape in a planar view. In this respect, the method for manufacturing the semiconductor light emitting device 200 differs from the method for manufacturing the semiconductor light emitting device 100.

[0071] <Effects of the semiconductor light emitting element 200> The effects of the semiconductor light emitting device 200 will be described below.

[0072] The semiconductor light emitting element according to the comparative example is the semiconductor light emitting element 200A. The configuration of the semiconductor light emitting element 200A is the same as that of the semiconductor light emitting element 200, except that the second main surface 10b does not have a plurality of protrusions 10c formed thereon. FIG. 19A is a graph showing the relationship between the current and the optical output in the semiconductor light emitting element 200 and the semiconductor light emitting element 200A. FIG. 19B is a graph showing the relationship between the current and the external quantum efficiency in the semiconductor light emitting element 200 and the semiconductor light emitting element 200A. As shown in FIG. 19A and FIG. 19B, the semiconductor light emitting element 200 exhibits higher optical output and external quantum efficiency than the semiconductor light emitting element 200A. More specifically, the semiconductor light emitting element 200 exhibits 1.89 times higher optical output and external quantum efficiency than the semiconductor light emitting element 200A when a current of 200 mA flows. This comparison supports the fact that the semiconductor light emitting element 200 further improves the extraction efficiency of deep ultraviolet light.

[0073] In addition, in FIGS. 19A and 19B, the chip size is 2 mm×2 mm, and the area of ​​the mesa structure 24 in a plan view is 0.778 mm2 19A and 19B, in the semiconductor light emitting device 200, the width W1 and width W2 are 100 μm, the width W3 is 175 μm, the angle θ2 is 56°±6°, the thickness T is 38 μm, and the height H is 56 μm. Also, in Fig. 19A and 19B, experimental values ​​of the relationship between the current and the optical output or the external quantum efficiency are shown.

[0074] Fig. 20 is a graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 200. As shown in Fig. 20, in the semiconductor light emitting device 200, the extraction efficiency of deep ultraviolet light is particularly improved when the angle θ1 is in the range of -10° to 30°, and the extraction efficiency of deep ultraviolet light is further improved when the angle θ1 is in the range of 0° to 20°. For this reason, in the semiconductor light emitting device 200, the angle θ1 is preferably in the range of -10° to 30°, and more preferably in the range of 0° to 20°. Fig. 20 shows the relationship between the angle θ1 and the light extraction efficiency calculated using the ray tracing method.

[0075] FIG. 21 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 200. As shown in FIG. 21, in the semiconductor light emitting device 200, the extraction efficiency of deep ultraviolet light is maximized when the angle θ2 is about 56°. In addition, in the semiconductor light emitting device 200, the extraction efficiency of deep ultraviolet light is particularly improved when the angle θ2 is 56°±10°, and the extraction efficiency of deep ultraviolet light is further improved when the angle θ2 is 56°±6°. For this reason, in the semiconductor light emitting device 200, the angle θ2 is preferably within the range of 56°±10°, and more preferably within the range of 56°±6°. Note that in FIG. 20 and FIG. 21, the value obtained by dividing the height H by the width W2 is changed, the angle θ2 is set to 56°, the width W2 is set to 90 μm, and the absorption coefficient of the substrate 10 for deep ultraviolet light is set to 10 cm. -1 and the thickness T is 10 μm. Figure 21 shows the relationship between the angle θ2 calculated using the ray tracing method and the light extraction efficiency.

[0076] FIG. 22 is a graph showing the relationship between the angle θ1 in the semiconductor light emitting device 200 and the half width of the emission angle of the deep ultraviolet light. FIG. 23A is a graph showing the emission angle and intensity of the deep ultraviolet light in the semiconductor light emitting device 200 when the angle θ1 is −5°. FIG. 23B is a graph showing the emission angle and intensity of the deep ultraviolet light in the semiconductor light emitting device 200 when the angle θ1 is 26°. FIG. 23C is a graph showing the emission angle and intensity of the deep ultraviolet light in the semiconductor light emitting device 200 when the angle θ1 is 35°. FIG. 23D is a graph showing the emission angle and intensity of the deep ultraviolet light in the semiconductor light emitting device 200 when the angle θ1 is 50°. In FIG. 22 to FIG. 23D, the half width and intensity of the emission angle are calculated using a ray tracing method. 22 to 23D, in the semiconductor light emitting device 200, as the angle θ2 increases toward 32°, the full width at half maximum (FWMH) of the emitted deep ultraviolet light decreases. Also, the full width at half maximum of the emitted deep ultraviolet light increases locally in the vicinity of the angle θ2 being 32°. Furthermore, the full width at half maximum of the emitted deep ultraviolet light decreases again when the angle θ2 becomes 40° or more.

[0077] However, when the angle θ2 is in the range of 40° or more, the half width of the emitted deep ultraviolet light is small, but the intensity of the deep ultraviolet light is peaked in the side direction (the direction in which the inclination angle with respect to the normal direction of the second main surface 10b increases) (see FIG. 23D). Also, when the angle θ2 is in the range of 40° or more, the intensity of the emitted deep ultraviolet light is relatively weak (see FIG. 20). Therefore, in the semiconductor light emitting element 200, by setting the angle θ1 to be in the range of −5° or more and 32° or less, the directivity of the emitted deep ultraviolet light can be increased while maintaining the intensity of the emitted deep ultraviolet light.

[0078] Fig. 24 is a graph showing the relationship between the angle θ1 and the half-width of the emission angle of the deep ultraviolet light in the semiconductor light emitting element 200 when the width W1 is changed. As shown in Fig. 24, even when the width W1 is changed, the relationship between the angle θ1 and the half-width of the emission intensity of the emitted deep ultraviolet light shows a similar tendency. In Fig. 24, the half-width of the emission angle is calculated using the ray tracing method.

[0079] Third embodiment A semiconductor light emitting device according to the third embodiment will be described.

[0080] The semiconductor light emitting device according to the third embodiment is referred to as a semiconductor light emitting device 300. Here, differences from the semiconductor light emitting device 100 will be mainly described, and overlapping descriptions will not be repeated.

[0081] <Configuration of the semiconductor light emitting element 300> The configuration of the semiconductor light emitting device 300 will be described below.

[0082] Fig. 25 is a plan view of the semiconductor light emitting device 300. Fig. 26 is a plan view of the semiconductor light emitting device 300 as viewed from the opposite side to that of Fig. 25. In Fig. 26, the pad electrode 34 is omitted. Fig. 27 is a cross-sectional view taken along line XXVII-XXVII in Fig. 25. As shown in Figs. 25 to 27, the semiconductor light emitting device 300 has a substrate 10, a semiconductor layer 20, an n-electrode 31, a p-electrode 32, and a pad electrode 33. In this regard, the configuration of the semiconductor light emitting device 300 is common to the configuration of the semiconductor light emitting device 100.

[0083] In the semiconductor light emitting device 300, the mesa structure 24 is polygonal in plan view. More specifically, in the semiconductor light emitting device 300, the mesa structure 24 is regular hexagonal in plan view. In the semiconductor light emitting device 300, the first end 24a and the second end 24b are both ends of the mesa structure 24 in a cross-sectional view that passes through a pair of mutually opposing corners of the mesa structure 24 in a plan view and is perpendicular to the second main surface 10b. In the semiconductor light emitting device 300, the width W1 is the distance between a pair of mutually opposing corners of the mesa structure 24 in a plan view. In the semiconductor light emitting device 300, a plurality of mesa structures 24 are arranged in a regular triangular lattice shape in a plan view.

[0084] In the semiconductor light emitting device 300, the protrusion 10c has a polygonal truncated pyramid shape. More specifically, in the semiconductor light emitting device 300, the protrusion 10c has a regular hexagonal truncated pyramid shape, the top surface 10d has a regular hexagonal shape in a plan view, and the distance between a pair of side surfaces 10e facing each other increases with increasing distance from the top surface 10d.

[0085] In the semiconductor light emitting device 300, the third end 10da and the fourth end 10db pass through a pair of mutually opposing corners of the top surface 10d in a plan view, and are both ends of the top surface 10d in a cross-sectional view perpendicular to the second main surface 10b. In the semiconductor light emitting device 300, the width W2 is the distance between the corners of the pair of mutually opposing top surfaces 10d in a plan view, and the width W3 is the distance between the portions of the pair of mutually opposing side surfaces 10e at the lower ends. In the semiconductor light emitting device 300, the multiple protrusions 10c are arranged in a regular triangular lattice shape such that the lower ends of the side surfaces 10e are in contact with each other. In the semiconductor light emitting device 300, the center of the top surface 10d preferably overlaps with the center of the mesa structure 24 in a plan view.

[0086] In the semiconductor light emitting device 300, the angle θ1 is the angle formed between the top surface 10d and a virtual line (see the dotted line in FIG. 27) that passes through the center of the top surface 10d in a plan view and passes through the first end 24a and the third end 10da in a cross-sectional view perpendicular to the second main surface 10b. In the semiconductor light emitting device 300, the value obtained by dividing the height H by the width W1 is preferably 0.1 or more, more preferably 0.3 or more, and particularly preferably 0.5 to 5. In these respects, the configuration of the semiconductor light emitting device 300 differs from the configuration of the semiconductor light emitting device 100.

[0087] <Method of Manufacturing the Semiconductor Light Emitting Device 300> A method for manufacturing the semiconductor light emitting device 300 will now be described.

[0088] The manufacturing method of the semiconductor light emitting device 300 includes a preparation step S1, a semiconductor layer formation step S2, a mesa structure formation step S3, a first electrode formation step S4, a second electrode formation step S5, a substrate back surface processing step S6, a mask formation step S7, a protrusion formation step S8, and a singulation step S9. In this respect, the manufacturing method of the semiconductor light emitting device 300 is common to the manufacturing method of the semiconductor light emitting device 100.

[0089] In the method for manufacturing the semiconductor light emitting device 300, in the mask formation step S7, the pattern 51 is formed in a regular hexagonal shape in a planar view, and the multiple patterns 51 are arranged in a regular triangular lattice shape in a planar view. In this respect, the method for manufacturing the semiconductor light emitting device 300 differs from the method for manufacturing the semiconductor light emitting device 100.

[0090] <Effects of the semiconductor light emitting element 300> The effects of the semiconductor light emitting device 300 will be described below.

[0091] In the semiconductor light emitting device 300, a plurality of protrusions 10c are formed on the second main surface 10b, and the semiconductor layer 20 has a plurality of mesa structures 24, and the mesa structures 24 and the protrusions 10c face each other. In addition, the semiconductor light emitting device 300 has a thickness T of 90 μm or less. Therefore, like the semiconductor light emitting device 100, the semiconductor light emitting device 300 can also improve the extraction efficiency of deep ultraviolet light.

[0092] Fig. 28 is a graph showing the relationship between the angle θ1 and the light extraction efficiency in the semiconductor light emitting device 300. As shown in Fig. 28, in the semiconductor light emitting device 300, the extraction efficiency of deep ultraviolet light is particularly improved when the angle θ1 is in the range of -10° or more and 30° or less, and the extraction efficiency of deep ultraviolet light is further improved when the angle θ1 is in the range of 0° or more and 20° or less. For this reason, in the semiconductor light emitting device 300, the angle θ1 is preferably in the range of -10° or more and 30° or less, and more preferably in the range of 0° or more and 20° or less.

[0093] FIG. 29 is a graph showing the relationship between the angle θ2 and the light extraction efficiency in the semiconductor light emitting device 300. As shown in FIG. 29, in the semiconductor light emitting device 300, the extraction efficiency of deep ultraviolet light is maximized when the angle θ2 is about 56°. In addition, in the semiconductor light emitting device 300, the extraction efficiency of deep ultraviolet light is particularly improved when the angle θ2 is 56°±10°, and the extraction efficiency of deep ultraviolet light is further improved when the angle θ2 is 56°±6°. For this reason, in the semiconductor light emitting device 300, the angle θ2 is preferably within the range of 56°±10°, and more preferably within the range of 56°±6°. In addition, in FIG. 28 and FIG. 29, the value obtained by dividing the height H by the width W1 is changed, the angle θ2 is set to 56°, the width W2 is set to 90 μm, and the absorption coefficient of the substrate 10 for deep ultraviolet light is set to 10 cm. -1 and the thickness T is 10 μm. In addition, Fig. 28 shows the relationship between the angle θ1 calculated using the ray tracing method and the light extraction efficiency, and Fig. 29 shows the relationship between the angle θ2 calculated using the ray tracing method and the light extraction efficiency.

[0094] Fig. 30 is a graph showing the relationship between thickness T and light extraction efficiency in the semiconductor light emitting device 300. As shown in Fig. 30, in the semiconductor light emitting device 300, as the thickness T decreases, the extraction efficiency of deep ultraviolet light increases. This graph also shows that even if the absorption coefficient (α) of the constituent material of the substrate 10 for deep ultraviolet light is large, a high extraction efficiency of deep ultraviolet light can be achieved by reducing the thickness T. Fig. 30 shows the relationship between thickness T and light extraction efficiency calculated using the ray tracing method.

[0095] (Fourth embodiment) A semiconductor light emitting device according to a fourth embodiment will be described.

[0096] The semiconductor light emitting device according to the fourth embodiment is referred to as a semiconductor light emitting device 400. Here, differences from the semiconductor light emitting device 200 will be mainly described, and overlapping descriptions will not be repeated.

[0097] <Configuration of the semiconductor light emitting element 400> The configuration of the semiconductor light emitting device 400 will be described below.

[0098] Fig. 31 is a cross-sectional view of the semiconductor light emitting device 400. As shown in Fig. 31, the semiconductor light emitting device 400 has a substrate 10, a semiconductor layer 20, an n-electrode 31, a p-electrode 32, and a pad electrode 33. In this regard, the configuration of the semiconductor light emitting device 400 is common to the configuration of the semiconductor light emitting device 200.

[0099] In the semiconductor light emitting element 400, the protrusion 10f is formed on the second main surface 10b as the protrusion 10c. The protrusion 10f has a convex lens shape. More specifically, in a cross-sectional view, the side surface 10e is curved, and the distance between the mutually opposing portions of the side surface 10e increases with increasing distance from the top surface 10d. The protrusion 10f is preferably inscribed in the outer surface (imaginary surface) of the protrusion 10c in the semiconductor light emitting element 200. The entire surface of the protrusion 10f may be curved in a cross-sectional view. In these respects, the configuration of the semiconductor light emitting element 400 is common to the configuration of the semiconductor light emitting element 200.

[0100] <Method of Manufacturing the Semiconductor Light Emitting Device 400> A method for manufacturing the semiconductor light emitting device 400 will now be described.

[0101] Fig. 32 is a manufacturing process diagram of the semiconductor light emitting device 400. As shown in Fig. 32, the manufacturing method of the semiconductor light emitting device 400 includes a preparation step S1, a semiconductor layer forming step S2, a mesa structure forming step S3, a first electrode forming step S4, a second electrode forming step S5, a substrate back surface processing step S6, a mask forming step S7, a protrusion forming step S8, and a singulation step S9. In this respect, the manufacturing method of the semiconductor light emitting device 400 is common to the manufacturing method of the semiconductor light emitting device 200.

[0102] The method for manufacturing the semiconductor light emitting device 400 further includes a dry etching step S10. In the dry etching step S10, the corners of the protrusion 10c are rounded by dry etching, and the protrusion 10c becomes the protrusion 10f. In these respects, the method for manufacturing the semiconductor light emitting device 400 differs from the method for manufacturing the semiconductor light emitting device 200.

[0103] <Effects of the semiconductor light emitting element 400> The effects of the semiconductor light emitting device 400 will be described below.

[0104] In the semiconductor light emitting device 400, a plurality of protrusions 10f are formed on the second main surface 10b as the plurality of protrusions 10c, and the semiconductor layer 20 has a plurality of mesa structures 24, and the mesa structures 24 and the protrusions 10f face each other. In addition, in the semiconductor light emitting device 300, the thickness T is 90 μm or less. Therefore, in the semiconductor light emitting device 300, similar to the semiconductor light emitting device 200, it is possible to improve the extraction efficiency of deep ultraviolet light.

[0105] In the semiconductor light emitting device 400, the protruding portion 10f has a convex lens shape. Therefore, in the semiconductor light emitting device 400, the deep ultraviolet light is collimated by passing through the protruding portion 10f. Therefore, the semiconductor light emitting device 400 can increase the directivity of the deep ultraviolet light.

[0106] Fifth embodiment The light emitting module according to the fifth embodiment will be described. The light emitting module according to the fifth embodiment is designated as light emitting module 500.

[0107] <Configuration of Light Emitting Module 500> The configuration of the light emitting module 500 will be described below.

[0108] Fig. 33 is a cross-sectional view of a light-emitting module 500. As shown in Fig. 33, the light-emitting module 500 includes a base 60, a submount 71, an insulating layer 72, wiring 73 and wiring 74, connection pads 75 and connection pads 76, bonding wires 77 and bonding wires 78, connection materials 79 and connection materials 80, a transparent member 81, and a liquid 82.

[0109] The base 60 is preferably made of a material having high thermal conductivity, such as a metal material, a resin material, or a ceramic material. The base 60 is preferably made of a material having high thermal conductivity. In this case, the base 60 functions as a heat sink. The submount 71 is disposed on the base 60. The submount 71 is preferably made of a material having high thermal conductivity, such as aluminum nitride, silicon, silicon carbide (SiC), or diamond.

[0110] The insulating layer 72 is disposed on the base 60 so as to surround the outer periphery of the submount 71. The wiring 73 and the wiring 74 are, for example, embedded in the insulating layer 72. The wiring 73 has a pad 73a at one end and is supplied with power from the outside at the other end. The wiring 74 has a pad 74a at one end and is supplied with power from the outside at the other end. The pads 73a and 74a are exposed from the insulating layer 72.

[0111] The connection pad 75 and the connection pad 76 are disposed on the submount 71. The bonding wire 77 is connected to the pad 73a at one end and to the connection pad 75 at the other end. The bonding wire 78 is connected to the pad 74a at one end and to the connection pad 76 at the other end. The connection pad 75 is connected to the pad electrode 33 by a connection material 79. The connection pad 76 is connected to the pad electrode 34 by a connection material 80. The connection material 79 and the connection material 80 are made of a material such as a gold-tin alloy. In this way, the pad electrode 33 is electrically connected to the wiring 73 via the connection material 79 and the bonding wire 77, and the pad electrode 34 is electrically connected to the wiring 74 via the connection material 80 and the bonding wire 78. Therefore, deep ultraviolet light is generated from the active layer 22 based on the current applied between the other end of the wiring 73 and the other end of the wiring 74.

[0112] The transparent member 81 is, for example, hemispherical in shape with a diameter increasing from one end to the other end and opening at the other end. The other end of the transparent member 81 is connected onto the insulating layer 72 by, for example, an adhesive. The transparent member 81 is transparent to the deep ultraviolet light generated from the active layer 22. The transparent member 81 has, for example, a transmittance of 60% or more to the deep ultraviolet light generated from the active layer 22. The constituent material of the transparent member 81 is, for example, an inorganic material or a resin material. Specific examples of inorganic materials include synthetic quartz, quartz glass, alkali-free glass, sapphire, fluorite (CaF), and the like. Specific examples of resin materials include silicone resins without aromatic rings, amorphous fluorine-containing resins, polyimide, epoxy resins, and the like. The resin material may contain an inorganic material.

[0113] The semiconductor light emitting element 100 is disposed inside the transparent member 81. Although not shown, the semiconductor light emitting element 200, the semiconductor light emitting element 300, or the semiconductor light emitting element 400 may be used instead of the semiconductor light emitting element 100. The inside of the transparent member 81 is filled with a liquid 82. Therefore, the semiconductor light emitting element 100 is sealed by the liquid 82. The liquid 82 is transparent to the deep ultraviolet light generated from the active layer 22. The liquid 82 has a transmittance of, for example, 60% or more to the deep ultraviolet light generated from the active layer 22. The liquid 82 is, for example, pure water, a liquid organic compound, a salt solution, a particle dispersion solution, or the like. The refractive index of the liquid 82 is greater than 1. The refractive index of the liquid 82 is preferably 1.5 or more.

[0114] <Method of manufacturing the light emitting module 500> A method for manufacturing the light emitting module 500 will be described below.

[0115] Fig. 34 is a manufacturing process diagram of the light emitting module 500. As shown in Fig. 34, the manufacturing method of the light emitting module 500 includes a semiconductor light emitting element preparation step S11, a semiconductor light emitting element bonding step S12, a wire bonding step S13, a transparent member attachment step S14, and a liquid filling step S15.

[0116] In the manufacturing method of the light emitting module 500, first, a semiconductor light emitting element preparation step S11 is performed. In the semiconductor light emitting element preparation step S11, the preparation step S1 to the singulation step S9 are performed to prepare the semiconductor light emitting element 100. In the semiconductor light emitting element bonding step S12, the pad electrode 33 is connected to the connection pad 75 by the connection material 79, and the pad electrode 34 is connected to the connection pad 76 by the connection material 80.

[0117] The wire bonding step S13 is performed after the semiconductor light emitting element bonding step S12. In the wire bonding step S13, the bonding wire 77 is connected to the pad 73a and the connection pad 75, and the bonding wire 78 is connected to the pad 74a and the connection pad 76. The transparent member attachment step S14 is performed after the wire bonding step S13. In the transparent member attachment step S14, the transparent member 81 is attached to the insulating layer 72 by an adhesive or the like. The liquid filling step S15 is performed after the transparent member attachment step S14. In the liquid filling step S15, the inside of the transparent member 81 is filled with a liquid 82, and the semiconductor light emitting element 100 is sealed by the liquid 82. As a result of the above, the light emitting module 500 having the structure shown in FIG. 33 is formed.

[0118] <Modification> Fig. 35 is a manufacturing process diagram of a light emitting module 500 according to a modified example. As shown in Fig. 35, in the manufacturing method of the light emitting module 500, the protrusion forming step S8 may not be performed in the semiconductor light emitting element preparing step S11, and the protrusion forming step S8 may be performed after the semiconductor light emitting element bonding step S12 and before the wire bonding step S13. This allows the semiconductor light emitting element 100 to be mounted on the submount 71 while the substrate 10 is thick, thereby making it possible to suppress damage to the semiconductor light emitting element 100 (for example, cracking of the substrate 10) in the semiconductor light emitting element bonding step S12.

[0119] <Effects of the light-emitting module 500> The effects of the light emitting module 500 will be described below.

[0120] Fig. 36 is a graph showing the relationship between the current and the output of deep ultraviolet light in the light-emitting module 500. Fig. 37 is a graph showing the relationship between the current and the extraction efficiency of deep ultraviolet light in the light-emitting module 500. In Fig. 36, the semiconductor light-emitting element 100 is used in the light-emitting module 500, and in Fig. 37, the semiconductor light-emitting element 300 is used in the light-emitting module 500. In Fig. 37, the refractive index of the liquid 82 is 1.54, the width W2 is 90 μm, the thickness T is 10 μm, and the angle θ2 is 1.5, which is the height H divided by the width W1. Figs. 36 and 37 show experimental values ​​of the relationship between the current and the optical output or the external quantum efficiency.

[0121] 36, in the light-emitting module 500, the light output of deep ultraviolet light is improved by filling the inside of the transparent member 81 with the liquid 82. More specifically, by filling the inside of the transparent member 81 with the liquid 82, the light output when a current of 1000 mA flows becomes 2.15 times, and the light output when a current of 2000 mA flows becomes 2.57 times.

[0122] 37, in the light-emitting module 500, the inside of the transparent member 81 is filled with the liquid 82, thereby improving the extraction efficiency of the deep ultraviolet light. More specifically, by filling the inside of the transparent member 81 with the liquid 82, the light extraction efficiency becomes 1.94 times when the angle θ1 is -10°, the light output becomes 1.72 times when the angle θ1 is 25°, and the light extraction efficiency becomes 2.21 times when the angle θ1 is 60°. From this comparison, in the light-emitting module 500, by filling the inside of the transparent member 81 with the liquid 82, it is possible to improve the extraction efficiency of the deep ultraviolet light.

[0123] Although the embodiment of the present disclosure has been described above, the above-mentioned embodiment can be modified in various ways. The scope of the present invention is not limited to the above-mentioned embodiment. The scope of the present invention is defined by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. [Explanation of symbols]

[0124] 10 substrate, 10a first main surface, 10b second main surface, 10c, 10f protrusion, 10d top surface, 10da third end, 10db fourth end, 10e side, 10ea first side, 10eb second side, 20 semiconductor layer, 21 n-type semiconductor layer, 22 active layer, 23 p-type semiconductor layer, 23a electron block layer, 23b cladding layer, 23c contact layer, 24 mesa structure, 24a first end, 24b second end, 31, 32 electrode, 33, 34 pad electrode, 40 anti-reflection film, 50 mask, 51 pattern, 52 opening, 60 base, 71 submount, 72 insulating layer, 73, 74 wiring, 73a, 74a pad, 75, 76 connection pad, 77, 78 bonding wire, 79, 80 Connection material, 81 transparent member, 82 liquid, 100, 100A, 200, 200A, 300, 400 semiconductor light emitting element, 500 light emitting module, DR1 first direction, DR2 second direction, H height, T thickness, W1, W2, W3 width, S1 preparation step, S2 semiconductor layer formation step, S3 mesa structure formation step, S4 first electrode formation step, S5 second electrode formation step, S6 substrate back surface processing step, S7 mask formation step, S8 protrusion formation step, S9 singulation step, S10 dry etching step, S11 semiconductor light emitting element preparation step, S12 semiconductor light emitting element bonding step, S13 wire bonding step, S14 transparent member attachment step, S15 liquid filling step.

Claims

1. A substrate; A semiconductor layer; The substrate is made of single crystal aluminum nitride. The substrate has a first main surface and a second main surface opposite to the first main surface, the semiconductor layer includes an n-type semiconductor layer disposed on the first principal surface, an active layer disposed on the n-type semiconductor layer and generating deep ultraviolet light, and a p-type semiconductor layer disposed on the active layer; the semiconductor layer has a plurality of mesa structures in any cross-sectional view, A plurality of protrusions are formed on the second main surface, the protrusion faces the mesa structure, The protrusion has a top surface, If the width of the mesa structure is W1, the width of the top surface is W2, and the distance between the active layer and the top surface is L, then tan －１ A semiconductor light emitting element, wherein an angle defined by {(W2-W1) / 2L} is equal to or greater than -25° and equal to or less than 65°.

2. The semiconductor light emitting element according to claim 1 , wherein a thickness of said substrate between two adjacent said protrusions is 90 μm or less.

3. the mesa structure extends along a first direction in a plan view, the protrusion extends along the first direction while facing the mesa structure in a plan view, the protrusion further has a first side surface and a second side surface that are connected to the top surface and face each other in a second direction perpendicular to the first direction, The semiconductor light emitting device according to claim 1 , wherein a distance between the first side surface and the second side surface increases with increasing distance from the top surface.

4. The semiconductor light emitting element according to claim 3 , wherein a lower end of the first side surface of one of the two adjacent protrusions is continuous with a lower end of the second side surface of the other of the two adjacent protrusions.

5. The semiconductor light emitting element according to claim 3 , wherein an angle between the first side surface and a plane parallel to the top surface and an angle between the second side surface and a plane parallel to the top surface are 56°±20°.

6. The semiconductor light emitting device according to claim 3 , wherein a value obtained by dividing the height of the protrusion by the width of the mesa structure in the second direction is equal to or greater than 0.5 and equal to or less than 3.

7. The semiconductor light emitting device of claim 1 , further comprising an anti-reflective coating disposed on the top surface.

8. The protrusion further has a side surface connected to the top surface, the mesa structure and the top surface are circular in plan view; The side surface forms a conical surface, The semiconductor light emitting device according to claim 1 , wherein a diameter of the side surface increases with distance from the top surface.

9. The semiconductor light emitting element according to claim 8 , wherein a lower end of the side surface of one of the two adjacent protrusions is continuous with a lower end of the side surface of the other of the two adjacent protrusions.

10. The semiconductor light-emitting element according to claim 8 , wherein an angle between the side surface and a plane parallel to the top surface is 56°±20°.

11. 9. The semiconductor light-emitting element according to claim 8, wherein in a cross-sectional view passing through a center of the mesa structure in a plan view and perpendicular to the first main surface, a value obtained by dividing the height of the protrusion by the width of the mesa structure is 0.5 or more and 5 or less.

12. The protrusion further has a side surface connected to the top surface, The side surface is curved in cross section, The semiconductor light emitting device according to claim 1 , wherein the distance between the portions of the side surfaces facing each other in a cross-sectional view increases with increasing distance from the top surface.

13. The semiconductor light-emitting element according to claim 12 , wherein a thickness of the substrate between two adjacent protrusions is 90 μm or less.

14. The semiconductor light emitting device according to any one of claims 1 to 13, A transparent member; a liquid; the semiconductor light emitting element is disposed inside the transparent member, the liquid is filled inside the transparent member so as to seal the semiconductor light emitting element, A light-emitting module, wherein the transparent member and the liquid are transparent to the deep ultraviolet light.

15. providing a substrate having a first major surface and a second major surface opposite the first major surface; forming a semiconductor layer on the first major surface; forming a plurality of protrusions on the second main surface; The substrate is made of single crystal aluminum nitride. the second main surface is a nitrogen polar surface of aluminum nitride, the semiconductor layer includes an n-type semiconductor layer disposed on the first principal surface, an active layer disposed on the n-type semiconductor layer and generating deep ultraviolet light, and a p-type semiconductor layer disposed on the active layer; the semiconductor layer has a plurality of mesa structures in any cross-sectional view, a step of forming the protrusion on the second main surface includes a step of forming a mask on a portion of the second main surface facing the mesa structure, and a step of wet-etching the substrate exposed from the mask.

16. the mesa structure extends linearly in a plan view, The method for manufacturing a semiconductor light emitting device according to claim 15 , wherein the mask has a pattern that extends linearly and faces the mesa structure in a plan view.

17. The method for manufacturing a semiconductor light-emitting device according to claim 15 , wherein the mesa structure and the mask are circular in plan view.

18. 16. The method for manufacturing a semiconductor light-emitting element according to claim 15, wherein the wet etching proceeds such that a sidewall surface of a recess formed in the second main surface by the wet etching forms an angle of 56°±6° with a plane parallel to a portion of the second main surface underlying the mask.

19. 16. The method for manufacturing a semiconductor light-emitting element according to claim 15, wherein the wet etching is stopped when a lower end of a first side wall surface of a recess formed in the second main surface by the wet etching comes into contact with a lower end of a second side wall surface of the recess that faces the first side wall surface with a gap therebetween.

20. The method for producing a semiconductor light-emitting element according to claim 15, wherein an etching solution used in the wet etching is a hot alkaline solution.

21. The method for manufacturing a semiconductor light emitting device according to claim 15 , wherein the mask remains as an anti-reflection film after the wet etching.

22. dry etching the protruding portion, 21. The method for manufacturing a semiconductor light-emitting element according to claim 15, wherein the dry etching is performed so that the protrusion has a convex lens shape.

23. Providing a semiconductor light emitting device; and mounting the semiconductor light emitting device on a submount. The step of preparing the semiconductor light emitting device includes a step of preparing a substrate having a first main surface and a second main surface that is an opposite surface to the first main surface, a step of forming a semiconductor layer on the first main surface, and a step of forming a plurality of protrusions on the second main surface, The substrate is made of single crystal aluminum nitride. the second main surface is a nitrogen polar surface of aluminum nitride, the semiconductor layer includes an n-type semiconductor layer disposed on the first principal surface, an active layer disposed on the n-type semiconductor layer and generating deep ultraviolet light, and a p-type semiconductor layer disposed on the active layer; the semiconductor layer has a plurality of mesa structures; forming the protrusion on the second main surface includes forming a mask on a portion of the second main surface facing the mesa structure, and wet etching the substrate exposed from the mask; The method for manufacturing a light-emitting module, wherein the wet etching is performed after a step of mounting the semiconductor light-emitting element on the submount.

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