Photoelectric conversion device

Abstract

To provide a photoelectric conversion device that can appropriately correct horizontal dark shading.SOLUTION: A photoelectric conversion device can execute, in reading signals from a pixel array to a reading unit, first drive of outputting a signal based on the total of electric charges generated in a plurality of photoelectric conversion parts, and second drive of outputting a signal based on electric charges generated in any one of the plurality of photoelectric conversion parts. The photoelectric conversion device can switch, for every row, between a first operation mode of reading signals from pixels in one row through the first drive, and a second operation mode of reading signals from pixels in one row by continuously performing the first drive and the second drive. A first correction unit generates a first correction value on the basis of output signals from a second pixel row read in the first operation mode, generates a second correction value on the basis of output signals from the second pixel row read in the second operation mode, and corrects output signals from a first pixel row on the basis of the first correction value and the second correction value.SELECTED DRAWING: Figure 12

Description

[Technical field]

[0001] The present invention relates to a photoelectric conversion device. [Background technology]

[0002] Patent Document 1 discloses a technique for an image pickup apparatus capable of focus detection using a split-pupil method, and also describes a method for correcting the black levels of a signal for a captured image and a signal for focus detection. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2017-98931 A Summary of the Invention [Problem to be solved by the invention]

[0004] In a photoelectric conversion device capable of correcting the black level as described in Patent Document 1, there are cases where correction of the horizontal dark shading shape is required in addition to correction of the black level offset.

[0005] An object of the present invention is to provide a photoelectric conversion device capable of appropriately correcting horizontal dark shading. [Means for solving the problem]

[0006] According to one disclosure of the present specification, there is provided a pixel array in which a plurality of pixels are arranged across a plurality of rows and a plurality of columns, the pixel array including: a first pixel row including first pixels having a plurality of photoelectric conversion units each generating a charge based on incident light; and a second pixel row including non-photosensitive pixels outputting a signal not based on the incident light; a readout unit that reads out signals from the first pixels and the non-photosensitive pixels; and a first correction unit that corrects the signals read out from the first pixels, wherein the non-photosensitive pixels are arranged in greater numbers than the first pixels in the second pixel row, and a first correction unit that outputs a signal based on a sum of charges generated in each of the plurality of photoelectric conversion units in reading out signals from the pixel array to the readout unit. a first operation mode in which signals are read out from pixels in one row by the first drive and a second operation mode in which signals are read out from pixels in one row by continuously performing the first drive and the second drive, and the first correction unit generates a first correction value based on output signals of the second pixel row read out in the first operation mode, generates a second correction value based on output signals of the second pixel row read out in the second operation mode, and corrects the output signals of the first pixel row based on the first correction value and the second correction value. Effect of the Invention

[0007] According to the present invention, there is provided a photoelectric conversion device capable of appropriately correcting horizontal dark shading. [Brief description of the drawings]

[0008] [Figure 1] 4 is a conceptual diagram showing the relationship between the exit pupil of the photographing lens and effective pixels. [Diagram 2] 1 is a block diagram showing a photoelectric conversion device according to a first embodiment. [Diagram 3] FIG. 2 is a diagram showing the layout of a pixel array in the first embodiment. [Figure 4] FIG. 2 is a diagram showing effective pixels and a column readout unit. [Diagram 5] FIG. 13 is a diagram showing a dummy pixel. [Figure 6] 4 is a timing chart showing a first operation mode. [Figure 7] 6 is a timing chart showing a second operation mode. [Figure 8] 11A to 11C are diagrams illustrating an example of switching of operation modes in an effective pixel row or an OB pixel row and an example of a horizontal dark shading shape. [Figure 9] 13A to 13C are diagrams illustrating an example of switching of operation modes in a dummy pixel row and an example of a horizontal dark shading shape. [Figure 10] FIG. 2 is a block diagram of a signal processing circuit. [Figure 11] FIG. 4 is a block diagram of a second correction unit in the first embodiment. [Figure 12] FIG. 4 is a block diagram of a first correction unit in the first embodiment. [Figure 13] 5 is a process flowchart of a first correction unit in the first embodiment. [Figure 14] 5 is a graph showing a correction effect in the first embodiment. [Figure 15] FIG. 13 is a diagram showing a layout of a pixel array in a second embodiment. [Figure 16] FIG. 11 is a block diagram of a first correction unit in the second embodiment. [Figure 17] 13 is a process flowchart of a first correction unit in the second embodiment. [Figure 18] FIG. 13 is a block diagram of a first correction unit in the third embodiment. [Figure 19] 13 is a process flowchart of a first correction unit in the third embodiment. [Figure 20] 13 is a graph showing a correction effect in the third embodiment. [Figure 21] FIG. 13 is a diagram showing the layout of a pixel array in a fourth embodiment. [Figure 22] FIG. 13 is a block diagram of an apparatus according to a fifth embodiment. [Figure 23]FIG. 13 is a block diagram of an apparatus according to a sixth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The same elements or corresponding elements in multiple drawings are denoted by the same reference numerals, and the description thereof may be omitted or simplified.

[0010] In the first to fourth embodiments described below, an imaging device will be mainly described as an example of a photoelectric conversion device. However, the photoelectric conversion device in each embodiment is not limited to an imaging device, and can be applied to other devices. Examples of other devices include a distance measuring device and a photometric device. The distance measuring device can be, for example, a focus detection device, a distance measuring device using TOF (Time-Of-Flight), etc. The photometric device can be a device that measures the amount of light incident on the device.

[0011] [First embodiment] A photoelectric conversion device according to a first embodiment will be described with reference to Fig. 1 to Fig. 14. First, the principle of focus detection by the pupil division method performed in the photoelectric conversion device according to this embodiment will be described with reference to Fig. 1. Fig. 1 is a conceptual diagram showing the relationship between the exit pupil of a photographing lens (not shown) and effective pixels.

[0012] The effective pixel 100 (first pixel) has a photodiode PDA and a photodiode PDB. A color filter 110 and a microlens 111 are disposed above the effective pixel 100. Each of the photodiodes PDA and PDB is a photoelectric conversion unit that generates an electric charge according to incident light.

[0013] Light incident on the photoelectric conversion device is incident on the effective pixel 100 with the optical axis 113 as the center. A light beam passing through a pupil region 114, which is a part of the exit pupil 112 of the photographing lens, passes through a microlens 111 and is received by the photodiode PDA. Meanwhile, a light beam passing through a pupil region 115, which is another part of the exit pupil 112 of the photographing lens, passes through the microlens 111 and is received by the photodiode PDB. In this way, the photodiode PDA and the photodiode PDB receive light passing through the separate pupil regions 114 and 115 of the exit pupil 112, respectively. A phase difference can be detected by comparing the signal output from the photodiode PDA with the signal output from the photodiode PDB. Based on the phase difference thus obtained, the focal position deviation amount of the imaging lens arranged on the optical axis 113 can be detected and adjusted to focus on the imaging target.

[0014] Here, the signal corresponding to the charge generated in the photodiode PDA is defined as the A image signal. Also, the signal corresponding to the charge generated in the photodiode PDB is defined as the B image signal. The A and B image signals are phase difference signals used for focus detection. Also, the signal obtained by adding up the charges generated in the photodiodes PDA and PDB is defined as the A+B image signal. The A+B image signal is an image signal that constitutes the captured image.

[0015] Next, the configuration of the photoelectric conversion device will be described with reference to Fig. 2 to Fig. 5. Fig. 2 is a block diagram showing the photoelectric conversion device according to this embodiment. As shown in Fig. 2, the photoelectric conversion device has a pixel array 10, a column readout unit 40, a vertical scanning circuit 31, a horizontal scanning circuit 32, a timing generation circuit 33, and a signal processing circuit 50.

[0016] The pixel array 10 includes a plurality of pixels arranged across a plurality of rows and a plurality of columns (in a matrix). The pixel array 10 includes an effective pixel row 101 (first pixel row) in which effective pixels 100 including two photodiodes PDA and PDB are arranged, and a non-photosensitive pixel row 201 (second pixel row) in which non-photosensitive pixels 200 that are not sensitive to light are arranged. That is, each of the plurality of pixels can be either an effective pixel 100 or a non-photosensitive pixel 200. Although an arrangement of four columns and five rows of pixels is shown in FIG. 2 for ease of explanation, in reality, a greater number of effective pixels 100 and non-photosensitive pixels 200 may be arranged in the pixel array 10. In this embodiment, the non-photosensitive pixel row 201 is provided with the non-photosensitive pixel 200, and no effective pixel 100 is provided. However, the present invention is not limited to this example, and the non-photosensitive pixel row 201 may include a smaller number of effective pixels 100 than the non-photosensitive pixels 200. In this embodiment, the non-photosensitive pixel row 201 includes non-photosensitive pixels 200 in the same number of columns as the effective pixels 100 provided in one effective pixel row 101 in this embodiment. In other words, all pixel columns included in one effective pixel row 101 include a first column that is closest to one end of the photoelectric conversion device and a second column that is closest to the opposite end. In the non-photosensitive pixel row 201 as well, the non-photosensitive pixels 200 are provided from the first column to the second column.

[0017] The vertical scanning circuit 31 selects the pixels arranged in the pixel array 10 on a row-by-row basis, and outputs a drive signal to the pixels in the selected row. The vertical scanning circuit 31 may include logic circuits such as a shift register and an address decoder.

[0018] The column readout units 40 are arranged corresponding to each column of the pixel array 10. The column readout units 40 perform analog-to-digital conversion of signals output from the pixels and hold the converted signals. The horizontal scanning circuit 32 outputs a horizontal scanning pulse signal to the column readout unit 40 of each column. The horizontal scanning circuit 32 may include logic circuits such as a shift register and an address decoder. The column readout unit 40 of each column sequentially outputs the signals held in the signal processing circuit 50 based on the horizontal scanning pulse signal.

[0019] The timing generation circuit 33 outputs control signals for controlling the column readout section 40 , the vertical scanning circuit 31 , the horizontal scanning circuit 32 and the signal processing circuit 50 .

[0020] The signal processing circuit 50 performs signal processing such as correction processing on the signals output from the column readout unit 40. The signal processing circuit 50 outputs the processed signals to the outside of the photoelectric conversion device.

[0021] 3 is a diagram showing the layout of the pixel array 10. The pixel array 10 has an effective pixel area 11, an optical black (OB) pixel area 12, and a dummy pixel area 13. The effective pixel area 11 is a rectangular area in which effective pixels 100 are arranged, and occupies most of the pixel array 10.

[0022] The OB pixel region 12 is an L-shaped region in which OB pixels (third pixels) are arranged, and are arranged along two sides of the effective pixel region 11. The OB pixels are pixels having a structure similar to that of the effective pixels 100, but further including an optical light shielding structure, so that the photodiodes PDA and PDB are shielded from light.

[0023] The dummy pixel region 13 is a rectangular region in which dummy pixels (second pixels) are arranged, and is arranged along the upper side of the OB pixel region 12. The dummy pixels are pixels having a structure similar to that of the OB pixels, but with the photodiodes PDA and PDB removed.

[0024] A row in which dummy pixels are arranged is called a dummy pixel row, and a row in which OB pixels are arranged is called an OB pixel row. A row in which effective pixels 100 are mainly arranged is an effective pixel row 101 shown in Fig. 2. A non-photosensitive pixel row 201 shown in Fig. 2 is a dummy pixel row or an OB pixel row.

[0025] Fig. 4 is a diagram showing a circuit configuration of an effective pixel 100 and a column readout section 40. For simplification, Fig. 4 shows only one effective pixel 100 and the column readout section 40 corresponding to that effective pixel 100.

[0026] The effective pixel 100 includes photodiodes PDA and PDB, transfer transistors M1A and M1B, a reset transistor M2, an amplification transistor M3, and a selection transistor M4. The effective pixel 100 is connected to a column readout section 40 via an output line VL to which a current source IS is connected.

[0027] The anodes of the photodiodes PDA and PDB are connected to the ground node. The cathodes of the photodiodes PDA and PDB are connected to the sources of the transfer transistors M1A and M1B, respectively. The drains of the transfer transistors M1A and M1B are connected to the source of the reset transistor M2 and the gate of the amplification transistor M3. The node to which the drains of the transfer transistors M1A and M1B, the source of the reset transistor M2, and the gate of the amplification transistor M3 are connected is a floating diffusion FD.

[0028] The floating diffusion FD includes a capacitance component and functions as a charge storage section. The floating diffusion FD performs charge-voltage conversion of the charges generated by photoelectric conversion in the photodiodes PDA and PDB. The charge-voltage conversion coefficient is determined by the junction capacitance, gate capacitance, and inter-wiring parasitic capacitance of the diffusion layers and wiring that make up the floating diffusion FD. In Figure 4, the capacitance of this floating diffusion FD is equivalently shown using the circuit symbol for a capacitive element.

[0029] The drain of the reset transistor M2 and the drain of the amplifying transistor M3 are connected to a power supply voltage node to which a voltage VDD is supplied. The source of the amplifying transistor M3 is connected to the drain of the selection transistor M4. The source of the selection transistor M4 is connected to the output line VL.

[0030] Control signals PTXA and PTXB are input to the gates of the transfer transistors M1A and M1B, respectively, via a control line from the vertical scanning circuit 31. A control signal PRES is input to the gate of the reset transistor M2 via a control line from the vertical scanning circuit 31. A control signal PSEL is input to the gate of the selection transistor M4 via a control line from the vertical scanning circuit 31.

[0031] In this embodiment, each transistor constituting the effective pixel 100 is an N-type MOS transistor. Therefore, when an H-level (high level) control signal is supplied from the vertical scanning circuit 31, the corresponding transistor is turned on. Also, when an L-level (low level) control signal is supplied from the vertical scanning circuit 31, the corresponding transistor is turned off. Also, the names of the source and drain of a MOS transistor may differ depending on the conductivity type of the transistor or the function of interest. Some or all of the names of the source and drain used in this embodiment may be called by the reversed names.

[0032] The photodiodes PDA and PDB receive incident light that has passed through the same microlens 111, convert it into an amount of charge according to the amount of light received, and accumulate it. When the transfer transistor M1A is turned on, it transfers the charge held by the photodiode PDA to the floating diffusion FD. When the transfer transistor M1B is turned on, it transfers the charge held by the photodiode PDB to the floating diffusion FD. The charge transferred from the photodiodes PDA and PDB is held in the capacitance of the floating diffusion FD. As a result, the floating diffusion FD has a potential according to the amount of charge transferred from the photodiodes PDA and PDB due to charge-voltage conversion by the floating diffusion capacitance.

[0033] When the selection transistor M4 is turned on, it connects the amplification transistor M3 to the output line VL. The amplification transistor M3 has a configuration in which a voltage VDD is supplied to its drain and a bias current is supplied to its source from a current source IS via the selection transistor M4, forming an amplification section (source follower circuit) with its gate as an input node. This causes the amplification transistor M3 to output a signal based on the potential of the floating diffusion FD to the output line VL via the selection transistor M4. In this sense, the amplification transistor M3 and the selection transistor M4 are an output section that outputs a signal according to the amount of charge held in the floating diffusion FD.

[0034] The reset transistor M2 has a function of resetting the floating diffusion FD by controlling the supply of a voltage (voltage VDD) to the floating diffusion FD. When the reset transistor M2 is turned on, the floating diffusion FD is reset to a voltage according to the voltage VDD.

[0035] The column readout unit 40 has an analog-to-digital conversion unit 41 and a memory unit 42. The output line VL is connected to the analog-to-digital conversion unit 41. The analog-to-digital conversion unit 41 converts an analog signal input via the output line VL into a digital signal. The analog-to-digital conversion unit 41 is composed of, for example, a comparison circuit and a counter circuit. The comparison circuit compares a ramp signal, the potential of which changes depending on time, with the input signal, and outputs a signal to the counter circuit at the timing when the magnitude relationship between the two is reversed. The counter circuit receives the signal from the comparison circuit and holds the count value at that timing. The count value held by the counter circuit is held as a digital value in the memory unit 42.

[0036] The storage unit 42 has two memories 42S, 42N for holding digital signals. The memory 42S holds an A image signal, a B image signal, or an A+B image signal. The memory 42N holds an N signal (noise signal) based on the reset state of the floating diffusion. The digital signal held in the memory 42S is output to the signal processing circuit 50 via a digital signal output line 45 (OUT_S). The digital signal held in the memory 42N is output to the signal processing circuit 50 via a digital signal output line 46 (OUT_N).

[0037] FIG. 5 is a diagram showing a dummy pixel, which is an example of a non-photosensitive pixel 200. The dummy pixel differs from the effective pixel 100 in that it does not have photodiodes PDA and PDB, and the sources of the transfer transistors M1A and M1B are connected to a ground node. The rest of the configuration is the same as that of the effective pixel 100, so a description thereof will be omitted. The dummy pixel also performs a signal read operation similar to that of the effective pixel 100, so that a signal not based on incident light can be read. Although the non-photosensitive pixel 200 does not have a photodiode, it can output a signal indicating noise due to dark current leakage generated in the floating diffusion FD and the reset transistor M2. This dark current leakage affects horizontal dark shading, which will be described later.

[0038] Next, two types of operation modes for reading out signals from the pixels of the pixel array 10 for each row will be described with reference to FIG. 6 and FIG. 7. FIG. 6 is a timing chart showing a first operation mode, and FIG. 7 is a timing chart showing a second operation mode. FIG. 6 and FIG. 7 show a horizontal synchronization signal SYNC, control signals PSEL, PRES, PTXA, PTXB, an analog-to-digital (AD) conversion period, and a horizontal scanning pulse signal. The horizontal synchronization signal SYNC is a signal indicating the start timing of an operation for reading out signals from pixels of one row. The "AD conversion period" indicates a period during which analog-to-digital conversion is performed in the analog-to-digital conversion unit 41. The "horizontal scanning pulse signal" indicates the timing at which signals are sequentially transferred from the column readout unit 40 of each column to the signal processing circuit 50. Note that, when the operation performed when the pixel to be read out is the effective pixel 100 is different from the operation performed when the pixel to be read out is the non-photosensitive pixel 200, the respective cases may be described separately.

[0039] First, the first operation mode will be described with reference to Fig. 6. The first operation mode includes an operation of reading out the N signal and an operation of reading out the A+B image signal (first drive). That is, in the first operation mode, the image signal constituting the captured image is read out, and the phase difference signal for focus detection is not read out.

[0040] At time t101, the horizontal synchronization signal SYNC goes to H level, and the control signal PSEL for the selected row goes to H level, which turns on the selection transistor M4 for the selected row, and the pixels in the selected row are connected to the output line VL.

[0041] At time t102, the control signal PRES goes to H level, which turns on the reset transistor M2 and sets the potential of the floating diffusion FD to the reset level.

[0042] At time t103, the control signal PRES goes to L level. This turns off the reset transistor M2, and the reset of the floating diffusion FD is released. Since the selection transistor M4 remains on, an output signal according to the gate potential of the amplification transistor M3 when the reset of the floating diffusion FD is released is output to the output line VL. The pixel signal output from the pixel at time t103, that is, the signal based on the reset level of the floating diffusion FD, is the N signal.

[0043] In the period from time t104 to time t105, the N signal output to the output line VL is converted into a digital signal by the analog-to-digital conversion unit 41 of the column readout unit 40. The digital signal output from the analog-to-digital conversion unit 41 is held in the memory 42N of the storage unit 42. The operation of converting the N signal into a digital signal performed in the period from time t104 to time t105 is referred to as N conversion.

[0044] At time t106, the control signals PTXA and PTXB go to H level. This causes the transfer transistors M1A and M1B to turn on. If the pixel is an effective pixel 100, the charges stored in the photodiodes PDA and PDB are transferred to the floating diffusion FD. If the pixel is a non-photosensitive pixel 200, the charges present at the source nodes of the transfer transistors M1A and M1B are transferred to the floating diffusion FD. An A+B image signal, which is a pixel signal corresponding to the combined charge, is output to the output line VL.

[0045] At time t107, the control signals PTXA and PTXB go to the L level. This causes the transfer transistors M1A and M1B to turn off. Even after the transfer transistors M1A and M1B turn off, the A+B image signal continues to be output to the output line VL.

[0046] In the period from time t108 to time t109, the A+B image signals output to the output line VL are converted into digital signals by the analog-to-digital conversion unit 41 of the column readout unit 40. The digital signals output from the analog-to-digital conversion unit 41 are held in the memory 42S of the storage unit 42. The operation of converting the A+B image signals into digital signals, which is performed in the period from time t108 to time t109, is referred to as A+B conversion.

[0047] In the period from time t110 to time t111, a horizontal scanning pulse signal is output from the horizontal scanning circuit 32 to the column readout section 40, and the A+B image signal and the N signal, which are digital signals held in the memories 42S, 42N of each column, are sequentially output. The A+B image signal is output from the memory 42S to the signal processing circuit 50 via a digital signal output line 45 (OUT_S). The N signal is output from the memory 42N to the signal processing circuit 50 via a digital signal output line 46 (OUT_N). By repeating such horizontal scanning from the first column to the last column, the A+B image signal and the N signal of one row are read out in the first operation mode.

[0048] At time t112, the control signal PSEL for the selected row goes to level L. This turns off the selection transistor M4 for the selected row, and the pixels in the selected row go into a state of being disconnected from the output line VL.

[0049] Through the above operations, the N signal and the A+B image signal are read out in the first operation mode. In other words, in the first operation mode, the image signal constituting the captured image is read out, and the phase difference signal for focus detection is not read out. In the signal processing circuit 50, the N signal is subtracted from the A+B image signal, thereby removing fixed pattern noise.

[0050] Next, the second operation mode will be described with reference to Fig. 7. The second operation mode includes an operation for reading out the above-mentioned N signal, an operation for reading out the A image signal (second drive), and an operation for reading out the A+B image signal (first drive). That is, in the second operation mode, an image signal constituting a captured image and a phase difference signal for focus detection are read out. Note that, although Fig. 7 shows an example in which the A image signal of the two phase difference signals is read out, the B image signal may be read out instead of the A image signal.

[0051] The operation from time t201 to time t205 is similar to the operation from time t101 to time t105 in FIG. 6, and therefore the description will be omitted.

[0052] At time t206, the control signal PTXA goes to H level. This causes the transfer transistor M1A to turn on. If the pixel is an effective pixel 100, the charge accumulated in the photodiode PDA is transferred to the floating diffusion FD. An A image signal, which is a pixel signal corresponding to the amount of charge accumulated in the photodiode PDA, is output to the output line VL. If the pixel is a non-photosensitive pixel 200, the charge present at the source node of the transfer transistor M1A is transferred to the floating diffusion FD. An A image signal, which is a pixel signal corresponding to the amount of charge present in the floating diffusion FD after transfer, is output to the output line VL.

[0053] At time t207, the control signal PTXA goes to the L level. This turns the transfer transistor M1A off. Even after the transfer transistor M1A turns off, the A image signal continues to be output to the output line VL.

[0054] In the period from time t208 to time t209, the A image signal output to the output line VL is converted into a digital signal by the analog-to-digital conversion unit 41 of the column readout unit 40. The digital signal output from the analog-to-digital conversion unit 41 is held in the memory 42S of the storage unit 42. The operation of converting the A image signal into a digital signal, which is performed in the period from time t208 to time t209, will be referred to as A conversion.

[0055] In the period from time t210 to time t211, a horizontal scanning pulse signal is output from the horizontal scanning circuit 32 to the column readout section 40, and the A image signals and N signals, which are digital signals held in the memories 42S, 42N of each column, are sequentially output.

[0056] At time t212, the horizontal synchronization signal SYNC goes to H level. During the period from time t212 to time t213, the control signal PRES is maintained at L level, so the floating diffusion FD is not reset. If the pixel is an effective pixel 100, the floating diffusion FD keeps holding the charge generated by the photodiode PDA. If the pixel is a non-photosensitive pixel 200, the floating diffusion FD keeps holding the charge transferred from the source node of the transfer transistor M1A.

[0057] At time t213, the control signals PTXA and PTXB go to H level. This causes the transfer transistors M1A and M1B to turn on. If the pixel is an effective pixel 100, the charge stored in the photodiode PDB is transferred to the floating diffusion FD. If the pixel is a non-photosensitive pixel 200, the charge present at the node of the source of the transfer transistor M1B is transferred to the floating diffusion FD. An A+B image signal, which is a pixel signal corresponding to the combined charge, is output to the output line VL.

[0058] At time t214, the control signals PTXA and PTXB go to the L level. This causes the transfer transistors M1A and M1B to turn off. Even after the transfer transistors M1A and M1B turn off, the A+B image signal continues to be output to the output line VL.

[0059] In the period from time t215 to time t216, the A+B image signal output to the output line VL is converted into a digital signal by the analog-to-digital conversion unit 41 of the column readout unit 40. The digital signal output from the analog-to-digital conversion unit 41 is held in the memory 42S of the storage unit 42.

[0060] During the period from time t217 to time t218, a horizontal scanning pulse signal is output from the horizontal scanning circuit 32 to the column readout unit 40, and the A+B image signals and N signals, which are digital signals held in the memories 42S and 42N of each column, are sequentially output.

[0061] At time t219, the control signal PSEL for the selected row goes to level L. This turns off the selection transistor M4 for the selected row, and the pixels in the selected row go into a state of being disconnected from the output line VL.

[0062] Through the above operations, the N signal, the A image signal, and the A+B image signal are read out in the second operation mode. In other words, in the second operation mode, image signals constituting a captured image and a phase difference signal for focus detection are read out. In the signal processing circuit 50, a process is performed to subtract the N signal from each of the A image signal and the A+B image signal, thereby removing fixed pattern noise.

[0063] In this way, the photoelectric conversion device of this embodiment can execute the first drive for outputting the A+B signal and the second drive for outputting the A signal. In the first operation mode, the first drive is performed, and in the second operation mode, the first drive is performed consecutively after the second drive is performed. The B image signal used for phase difference detection is obtained, for example, by subtracting the A image signal from the A+B image signal in the signal processing circuit 50 or the like. In addition, the timing generation circuit 33 can appropriately switch the read operation mode for each row by appropriately switching the output mode of the control signal for each row. That is, the photoelectric conversion device of this embodiment can switch the row for acquiring phase difference information as necessary.

[0064] Next, the difference between the horizontal dark shading shape in the first operation mode and the second operation mode will be described. The horizontal dark shading shape is the distribution of the output signal level in the row when there is no incident light. Figures 8(a) and 8(b) are diagrams showing an example of switching of the operation mode in an effective pixel row or an OB pixel row and an example of the horizontal dark shading shape.

[0065] FIG. 8(a) shows an example of switching between the first operation mode and the second operation mode when the A+B image signal is output from the effective pixel row shown in FIG. 3. Of the 12 rows between row N-5 and row N+6, eight rows from row N-5 to row N-2 and row N+1 to row N+4 are normal rows R1 that are read out in the first operation mode. Also, four rows from row N-1, row N, row N+5, and row N+6 are focus detection rows R2 that are read out in the second operation mode. In FIG. 8(a), the focus detection row R2 is hatched. In this way, the normal row R1 that is read out in the first operation mode and the focus detection row R2 that is read out in the second operation mode are repeated in multiple rows in the effective pixel area 11.

[0066] FIG. 8(b) is a graph showing an example of a horizontal dark shading shape in each of the first and second operation modes. The horizontal axis of the graph indicates the column address of the pixel array 10, and the vertical axis indicates the output level of the signal output from the pixel. As shown in the timing charts of FIG. 6 and FIG. 7, the length of the period from N conversion to A+B conversion in the first operation mode and the length of the period from N conversion to A+B conversion in the second operation mode are different from each other. Therefore, the difference in the accumulation time of the dark current leakage component mentioned in the description of FIG. 5 appears as a difference in the horizontal dark shading shape of the A+B image output between the operation modes. In addition, in the effective pixel row, the difference in the dark current component caused by the arrangement of the photodiodes PDA and PDB in the pixel is also superimposed on the difference in the horizontal dark shading shape. Note that, although an example of the effective pixel row is shown in FIG. 8(a) and FIG. 8(b), the same applies to the OB pixel row.

[0067] Next, the difference in the horizontal dark shading shape in the first and second operation modes for the dummy pixel rows will be described. Figures 9(a) and 9(b) are diagrams showing an example of switching of the operation mode in the dummy pixel rows and an example of the horizontal dark shading shape.

[0068] 9(a) shows an example of switching between the first and second operation modes when the A+B image signals are output from the dummy pixel rows shown in FIG. 3. Of the four rows between row M-1 and row M+2, row M-1 and row M are normal rows R1 that are read out in the first operation mode. Row M+1 and row M+2 are focus detection rows R2 that are read out in the second operation mode. In this way, the multiple rows of the dummy pixel area 13 also include normal rows R1 and focus detection rows R2.

[0069] FIG. 9(b) is a graph showing an example of a horizontal dark shading shape in each of the first and second operation modes. Since the dummy pixel does not include a photodiode, no dark current component due to the photodiode is generated. Therefore, the horizontal dark shading shape in FIG. 9(b) may be different from the horizontal dark shading shape in FIG. 8(b). As shown in FIG. 9(b), the offset difference in the output level is small between the two operation modes, and the difference in the shape of the horizontal dark shading is mainly manifested. Such characteristic differences between the types of pixels can be used to correct the shading shape difference.

[0070] Next, the signal processing performed in the signal processing circuit 50 will be described with reference to Fig. 10. Fig. 10 is a block diagram showing the signal processing circuit 50. As shown in Fig. 10, the signal processing circuit 50 has an SN processing unit 51, a second correction unit 52, and a first correction unit 53.

[0071] The A+B image signal, the A image signal, or the B image signal is input to the SN processing unit 51 via the digital signal output line 45. In addition, the N signal is input to the SN processing unit 51 via the digital signal output line 46. The SN processing unit 51 subtracts the N signal from the A+B image signal, the A image signal, or the B image signal. This reduces fixed pattern noise. The A+B image signal, the A image signal, or the B image signal after the N signal subtraction process is input to the second correction unit 52. The second correction unit 52 corrects the offset difference between the operation modes. The corrected signal is input to the first correction unit 53. The first correction unit 53 corrects the shading shape difference between the operation modes. Through the above process, the offset difference and the shading shape difference between the operation modes are corrected. The corrected signal is output to the outside of the photoelectric conversion device. Below, a more detailed configuration of the second correction unit 52 and the first correction unit 53 and the correction process performed in the second correction unit 52 and the first correction unit 53 will be described in order.

[0072] The second correction unit 52 will be described with reference to Fig. 11. The second correction unit 52 performs a correction process to bring the black level closer to a reference level, using output signals from OB pixels in the OB pixel region 12. Fig. 11 is a block diagram of the second correction unit 52 in this embodiment. The second correction unit 52 has a data acquisition unit 521, averaging units 522 and 523, a correction value generation unit 524, a subtraction unit 525, and switches SW21 and SW22.

[0073] The data acquisition unit 521 selects and acquires output signals from OB pixels in the OB pixel region 12, among the input signals to the second correction unit 52. The pixel signals acquired by the data acquisition unit 521 are output to the switch SW21.

[0074] The switch SW21 switches the terminal for outputting the pixel signal according to the level of the first identification signal input from the timing generation circuit 33. The first identification signal is set to L level when the pixel signal input to the second correction unit 52 is read from the normal row R1 in the first operation mode. The first identification signal is set to H level when the pixel signal input to the second correction unit 52 is read from the focus detection row R2 in the second operation mode. The switch SW21 outputs the pixel signal to the averaging unit 522 when the first identification signal is L level, and outputs the pixel signal to the averaging unit 523 when the first identification signal is H level. The "L" and "H" written in the circuit symbol of each switch indicate the output terminal according to the level of the identification signal input. The switch SW22 also performs a similar switching operation according to the first identification signal.

[0075] Each of the averaging units 522 and 523 performs an averaging process on the input pixel signals to calculate an average black level. The averaging unit 522 performs an averaging process on the signals read from the normal row R1, and the averaging unit 523 performs an averaging process on the signals read from the focus detection row R2. The average black levels calculated by the averaging units 522 and 523 are input to the correction value generation unit 524 via the switch SW22. When the first identification signal is at the L level, the switch SW22 outputs the signal input from the averaging unit 522 to the correction value generation unit 524. When the first identification signal is at the H level, the switch SW22 outputs the signal input from the averaging unit 523 to the correction value generation unit 524.

[0076] The correction value generating unit 524 generates a correction value based on the difference between the average black level and a predetermined reference level so as to adjust the average black level to the reference level. The correction value is used in the correction process of the signals read out from the effective pixel rows.

[0077] The subtraction unit 525 performs a correction process to bring the black level closer to the reference level by subtracting the correction value generated by the correction value generation unit 524 from the pixel signals output from the effective pixels 100 located in the effective pixel row. A process of subtracting a correction value (fourth correction value) based on the average black level calculated by the averaging unit 522 for the normal row R1 is performed on the pixel signals output from the normal row R1. On the other hand, a process of subtracting a correction value (fifth correction value) based on the average black level calculated by the averaging unit 523 for the focus detection row R2 is performed on the pixel signals output from the focus detection row R2.

[0078] In this way, the second correction section 52 can correct the offset difference by appropriately switching the correction value depending on the operation mode.

[0079] Next, the first correction unit 53 will be described with reference to FIG. 12 and FIG. 13. The first correction unit 53 performs a correction process to reduce the horizontal dark shading shape difference of the black level using signals from pixels in the dummy pixel row as correction values. FIG. 12 is a block diagram of the first correction unit 53 in this embodiment. The first correction unit 53 has correction value acquisition units 531 and 532, a subtraction unit 533, and switches SW31, SW32, SW33, SW34, and SW35. The switches SW32 and SW33 are switched based on the level of the above-mentioned first identification signal. The switches SW31, SW34, and SW35 are switched based on the level of the second identification signal input from the timing generation circuit 33. The second identification signal is set to H level when the pixel signal input to the first correction unit 53 is read out from the dummy pixel row. The second identification signal is set to L level when the pixel signal input to the first correction unit 53 is read out from a pixel row other than the dummy pixel row.

[0080] The switch SW31 switches the terminal that outputs the signal input from the second correction unit 52 depending on the level of the first identification signal. The switch SW31 outputs a signal to the subtraction unit 533 when the second identification signal is at an L level, and outputs a signal to the switch SW32 when the second identification signal is at an H level.

[0081] The switch SW32 outputs a signal to the correction value acquisition unit 531 when the first identification signal is at an L level, and outputs a signal to the correction value acquisition unit 532 when the first identification signal is at an H level. The correction value acquisition unit 531 holds a signal read from the normal row R1 of the dummy pixel rows in the first operation mode as a first correction value. The correction value acquisition unit 532 holds a signal read from the focus detection row R2 of the dummy pixel rows in the second operation mode as a second correction value. Note that these correction values ​​may have different values ​​for each column address of the pixel array 10. Furthermore, each of the correction value acquisition units 531 and 532 may have a line memory for holding these correction values.

[0082] Switch SW33 outputs the output signal from correction value acquisition unit 531 to switch SW34 when the first identification signal is at L level, and outputs the output signal from correction value acquisition unit 532 to switch SW34 when the first identification signal is at H level. Switch SW34 outputs the output signal from switch SW33 to subtraction unit 533 when the second identification signal is at L level, and outputs the output signal from switch SW33 to switch SW35 when the second identification signal is at H level.

[0083] The subtraction unit 533 subtracts the signal output from the switch SW34 from the signal output from the switch SW31, and outputs the result to the switch SW35. In other words, the subtraction unit 533 performs a process of correcting the pixel signals output from the effective pixel rows using the correction values ​​held in the correction value acquisition units 531 or 532.

[0084] When the second identification signal is at an L level, the switch SW35 outputs a signal from the subtraction unit 533 to the outside, and when the second identification signal is at an H level, the switch SW34 outputs a signal to the outside.

[0085] Next, the correction process procedure of the first correction unit 53 in this embodiment will be described with reference to Fig. 13. Fig. 13 is a process flowchart of the first correction unit 53 in this embodiment. Fig. 13 describes the process from when a signal read from one pixel row is input to the first correction unit 53 until it is output.

[0086] First, the signal of one pixel row corrected by the second corrector 52 is input to the first corrector 53 (step S101). If the pixel row is a dummy pixel row (YES in step S102), the second identification signal output from the timing generating circuit 33 is at H level (step S103). In this case, the switches SW31, SW34, and SW35 are switched to the terminals marked with "H" shown in FIG. 12. At this time, the first corrector 53 starts the operation of obtaining a correction value based on the input signal (step S104).

[0087] On the other hand, if the pixel row is not a dummy pixel row (NO in step S102), the second identification signal output from the timing generation circuit 33 is at L level (step S112). In this case, the switches SW31, SW34, and SW35 are switched to the terminals marked with "L" shown in Fig. 12. At this time, the first correction unit 53 starts the correction operation of the input signal (step S114).

[0088] The correction value acquisition operation started from step S104 and the correction operation started from step S113 will be described in order below. First, the correction value acquisition operation started from step S104 will be described.

[0089] The signals of the dummy pixel row input to the first correction unit 53 are read out from the pixel array 10 in the first operation mode or the second operation mode. If the signals of the dummy pixel row are read out in the first operation mode (YES in step S105), the first identification signal output from the timing generation circuit 33 is at L level (step S106). In this case, the switches SW32 and SW33 are switched to the terminals marked with "L" shown in FIG. 12. The signals of the dummy pixel row read out in the first operation mode are input to the correction value acquisition unit 531 via the switches SW31 and SW32.

[0090] The correction value acquisition unit 531 stores the input signal of the dummy pixel row in the line memory for each pixel (step S107). The signal stored in the line memory is used as a first correction value. The correction value acquisition unit 531 may have an averaging unit. When there are multiple dummy pixel rows read out in the first operation mode, the averaging unit may perform an averaging process of the correction values.

[0091] The input signals of the dummy pixel rows are held in the correction value acquisition unit 531, and are also output to the outside of the first correction unit 53 via the switches SW33, SW34, and SW35 in this order (step S108).

[0092] On the other hand, if the signal of the dummy pixel row is read out in the second operation mode (NO in step S105), the first identification signal output from the timing generation circuit 33 is at H level (step S109). In this case, the switches SW32 and SW33 are switched to the terminal marked with "H" shown in Fig. 12. The signal of the dummy pixel row read out in the second operation mode is input to the correction value acquisition unit 532 via the switches SW31 and SW32.

[0093] The correction value acquisition unit 532, like the correction value acquisition unit 531, saves the input signal of the dummy pixel row in a line memory for each pixel (step S110). The signal stored in this line memory is used as a second correction value. The input signal of the dummy pixel row is stored in the correction value acquisition unit 532 and is also output to the outside of the first correction unit 53 via the switches SW33, SW34, and SW35 in this order (step S111).

[0094] In this way, the correction value acquisition units 531 and 532 respectively hold the output signals from the dummy pixel rows as the first and second correction values ​​depending on the operation mode when reading out the dummy pixel rows. These correction values ​​are used when correcting the signals read out from the effective pixel rows for each pixel.

[0095] Next, a description will be given of the correction operation that starts from step S114. It is assumed that the above-mentioned first and second correction values ​​have already been stored in the correction value acquisition units 531 and 532 by the above-mentioned processing.

[0096] The signals input during the correction operation are not from the dummy pixel row. In the following description, it is assumed that the input signals are signals output from the effective pixel row. It is also assumed that the correction process is performed on the A+B image signal. The signal from the effective pixel row is input to the subtraction unit 533 via the switch SW31 (step S114).

[0097] The subtraction unit 533 performs processing to correct the horizontal dark shading shape by subtracting one of the first and second correction values ​​from the signal output from the effective pixel row. A method of switching this correction value will be described.

[0098] The signal of the effective pixel row input to the first correction unit 53 is read from the pixel array 10 in the first operation mode or the second operation mode. If the signal of the effective pixel row is read in the first operation mode (YES in step S115), the first identification signal output from the timing generation circuit 33 is at L level (step S116). In this case, the switch SW33 is switched to the terminal marked with "L" shown in FIG. 12. As a result, the first correction value held in the correction value acquisition unit 531 is output to the subtraction unit 533 via the switches SW33 and SW34 (step S117). The subtraction unit 533 corrects the horizontal dark shading shape by subtracting the first correction value from the signal of the effective pixel row (step S118). The signal corrected by the subtraction unit 533 is output to the outside of the first correction unit 53 via the switch SW35 (step S119).

[0099] On the other hand, if the signal of the effective pixel row is read out in the second operation mode (NO in step S115), the first identification signal output from the timing generation circuit 33 is at H level (step S120). In this case, the switch SW33 is switched to the terminal marked with "H" shown in FIG. 12. As a result, the second correction value held in the correction value acquisition unit 532 is output to the subtraction unit 533 via the switches SW33 and SW34 (step S121). The subtraction unit 533 corrects the horizontal dark shading shape by subtracting the second correction value from the signal of the effective pixel row (step S122). The signal corrected by the subtraction unit 533 is output to the outside of the first correction unit 53 via the switch SW35 (step S123).

[0100] In this way, the subtraction unit 533 performs correction using different correction values ​​depending on the operation mode when the signals from the effective pixel rows are read out, thereby making it possible to appropriately correct the difference in the horizontal dark shading shape.

[0101] In the first correction unit 53 in this embodiment, the OB pixel rows may be corrected in the same manner as the effective pixel rows. However, the first correction unit 53 may be configured to output the output signals of the OB pixel rows to the outside without performing any correction on them by appropriately arranging switches that switch the path through which the signals pass.

[0102] Figures 14(a), 14(b), and 14(c) are graphs showing the effect of correction in the signal processing circuit 50. The vertical and horizontal axes of the graphs are the same as those shown in Figure 8(b), so the explanation will be omitted.

[0103] 14(a) is a graph showing the shape of the horizontal dark shading before correction. As described above, there are differences in both the offset and the shape of the horizontal dark shading between the first and second operation modes.

[0104] 14(b) is a graph showing the shape of horizontal dark shading for each operation mode corrected by the second correction unit 52. The correction values ​​corresponding to the dark current components calculated by the averaging units 522 and 523 of the second correction unit 52 are subtracted, thereby reducing the offset component difference.

[0105] 14(c) is a graph showing the shape of horizontal dark shading for each operation mode corrected by first correction unit 53. By subtracting the correction values ​​calculated by correction value acquisition units 531 and 532 of first correction unit 53, a horizontal dark shading shape that is approximately uniform for column addresses is obtained in both the first operation mode and the second operation mode. As a result, the horizontal dark shading shapes in the first operation mode and the second operation mode are made sufficiently close to each other, so that it is possible to reduce a signal level difference in an image that may occur at the boundary between a normal row and a focus detection row.

[0106] As described above, according to this embodiment, a photoelectric conversion device capable of appropriately correcting horizontal dark shading is provided.

[0107] In this embodiment, the output signal from the dummy pixel row is used to calculate the correction value in the first correction unit 53, but the output signal from the OB pixel row may be used for the same correction process. For example, in an environment where the dark current component is sufficiently small, such as a low temperature environment, the output signal from the OB pixel row may be substituted for the output signal from the dummy pixel row. In addition, although the process performed in the subtraction unit 533 is subtraction, the correction may be performed by another arithmetic process. For example, depending on the horizontal dark shading shape, the subtraction performed in the subtraction unit 533 may be replaced with addition.

[0108] [Second embodiment] A photoelectric conversion device according to a second embodiment will be described with reference to Figs. 15 to 17. In this embodiment, a configuration example in which dummy pixel regions are intermittently arranged in the same row and a method for calculating a correction value in that case will be described. Descriptions of elements common to the first embodiment may be omitted or simplified as appropriate.

[0109] FIG. 15 is a diagram showing the layout of the pixel array 10 in this embodiment. In this embodiment, in the pixel array 10, dummy pixel regions 13a, 13b, and 13c are arranged instead of the dummy pixel region 13 in FIG. 3. As shown in FIG. 15, a plurality of the dummy pixel regions 13a, 13b, and 13c are arranged intermittently in the same row. Between the dummy pixel region 13a and the dummy pixel region 13b, and between the dummy pixel region 13b and the dummy pixel region 13c, the OB pixel region 12 is arranged. This expands the range of the OB pixel region 12, and therefore the accuracy of the correction process (OB clamp process) of the output signal of the effective pixel 100 using the output signal of the OB pixel can be improved. In this embodiment, the row including the intermittently arranged dummy pixel regions 13a, 13b, and 13c is called a dummy pixel row.

[0110] Next, the first correction unit 53 in this embodiment will be described with reference to Figures 16 and 17. The first correction unit 53 in this embodiment performs a correction process to reduce the horizontal dark shading shape difference of the black level by a correction value estimated using signals from dummy pixels in a dummy pixel row.

[0111] 16 is a block diagram of the first correction unit 53 of the photoelectric conversion device in this embodiment. The first correction unit 53 has correction value acquisition units 531 and 532, a subtraction unit 533, correction value estimation units 534 and 535, and switches SW31, SW32, SW33, SW34, SW35, SW36, and SW37. The switches SW32 and SW33 are switched based on the level of the first identification signal similar to the first embodiment. The switches SW31, SW34, SW35, SW36, and SW37 are switched based on the level of the second identification signal similar to the first embodiment. That is, in this embodiment, the correction value estimation units 534 and 535 and the switches SW36 and SW37 are added to the configuration of the first embodiment.

[0112] The correction value acquisition units 531 and 532 hold signals read from pixels in the dummy pixel row in the first operation mode and the second operation mode, respectively, as in the first embodiment. The correction value estimation units 534 and 535 receive output values ​​of the dummy pixel regions 13a, 13b, and 13c in the dummy pixel row and column address values ​​in the row of the region from the correction value acquisition units 531 and 532, respectively. Each of the correction value estimation units 534 and 535 estimates an output value based on output information in the dummy pixel regions 13a, 13b, and 13c, assuming that dummy pixels exist in all columns in the dummy pixel row, by calculation, and holds the output value as a correction value. This makes it possible to estimate a correction value for a column in the dummy pixel row in which no dummy pixels are arranged. One example of a calculation method is a method in which information on the dummy pixel regions 13a, 13b, and 13c arranged intermittently is used to calculate values ​​corresponding to pixels between them by polynomial approximation.

[0113] As an example of polynomial approximation, an example of a calculation method using quadratic approximation will be described. The average output value of dummy pixel area 13a is A, and the average value of its address values ​​in the column direction is B. The average output value of dummy pixel area 13b is C, and the average value of its address values ​​in the column direction is D. The average output value of dummy pixel area 13c is E, and the average value of its address values ​​in the column direction is F. In this case, the quadratic equation for estimating the horizontal dark shading shape of the entire dummy pixel row is calculated by solving the three-variable simultaneous equations consisting of the following equations (1), (2), and (3) to find P, Q, and R. A=B 2 P+B Q+R (1) C=D 2 P+D Q+R (2) E=F 2 P+F Q+R (3) The quadratic equation representing the horizontal dark shading shape calculated from equations (1), (2), and (3) is given by the following equation (4). Y=P·X 2 +Q·X+R (4) Here, X is a column address, Y is a correction value for each column address, and P, Q, and R are coefficients calculated from the simultaneous equations.

[0114] When the second identification signal is at H level, switch SW36 outputs the output signal from correction value acquisition unit 531 to switch SW33, and when the second identification signal is at L level, switch SW36 outputs the output signal from correction value estimation unit 534 to switch SW33.

[0115] When the second identification signal is at H level, the switch SW37 outputs the output signal from the correction value acquisition unit 532 to the switch SW33, and when the second identification signal is at L level, the switch SW37 outputs the output signal from the correction value estimation unit 535 to the switch SW33.

[0116] The subtraction unit 533 subtracts the signal output from the switch SW34 from the signal output from the switch SW31, and outputs the result to the switch SW35. In other words, the subtraction unit 533 performs a process of correcting the pixel signals output from the effective pixels 100 in the effective pixel row by the correction value estimated by the correction value estimation unit 534 or 535.

[0117] Next, the correction process procedure of the first correction unit 53 in this embodiment will be described with reference to Fig. 17. Fig. 17 is a process flowchart of the first correction unit 53 in this embodiment. Fig. 17 describes the process from when a signal read from one pixel row is input to the first correction unit 53 until it is output. In Fig. 17, steps common to the flowchart of Fig. 13 of the first embodiment are given the same reference numerals, and the description may be omitted or simplified.

[0118] As in the first embodiment, in this embodiment, when a signal is input to the first correction unit 53, if the second identification signal is at H level, a correction value acquisition operation (step S104) is performed, and if the second identification signal is at L level, a correction operation (step S113) is performed. When the second identification signal is at H level, the switches SW31, SW34, SW35, SW36, and SW37 are switched to the terminals marked with "H" shown in FIG. 16. The correction value acquisition operation started from step S104 and the correction operation started from step S113 will be described in order below. First, the correction value acquisition operation started from step S104 will be described.

[0119] If the signals of the dummy pixel row input to the first correction unit 53 have been read out in the first operation mode (YES in step S105), the first identification signal output from the timing generation circuit 33 is at L level (step S106). In this case, the switch SW32 is switched to the terminal marked with "L" shown in Fig. 16. The signals of the dummy pixel row read out in the first operation mode are input to the correction value acquisition unit 531 via the switches SW31 and SW32.

[0120] The correction value acquisition unit 531 stores the input signals of the dummy pixel rows in a line memory for each pixel (step S107). The signals stored in the line memory are used for calculations in the correction value estimation unit 534. The correction value acquisition unit 531 may have an averaging unit. When there are multiple dummy pixel rows read out in the first operation mode, the averaging unit may perform averaging processing of the signals of the multiple rows.

[0121] The input signals of the dummy pixel rows are held in the correction value acquisition unit 531, and are also output to the outside of the first correction unit 53 via the switches SW36, SW33, SW34, and SW35 in this order (step S108).

[0122] The correction value estimation unit 534 acquires output information for the dummy pixel regions 13a, 13b, and 13c from the correction value acquisition unit 531, and estimates a horizontal dark shading shape on the assumption that the entire dummy pixel row is made up of dummy pixels (step S124). A specific calculation process that can be used for this estimation can be, for example, the above-mentioned polynomial approximation. The estimated horizontal dark shading shape is used as a first correction value.

[0123] On the other hand, if the signal of the dummy pixel row is read out in the second operation mode (NO in step S105), the first identification signal output from the timing generation circuit 33 is at H level (step S109). In this case, the switch SW32 is switched to the terminal marked with "H" shown in Fig. 16. The signal of the dummy pixel row read out in the second operation mode is input to the correction value acquisition unit 532 via the switches SW31 and SW32.

[0124] Similar to the correction value acquisition unit 531, the correction value acquisition unit 532 stores the input signals of the dummy pixel rows in a line memory for each pixel (step S110). The signals stored in the line memory are used for calculations in the correction value estimation unit 535. The input signals of the dummy pixel rows are stored in the correction value acquisition unit 532 and are also output to the outside of the first correction unit 53 via the switches SW37, SW33, SW34, and SW35 in this order (step S111).

[0125] The correction value estimation unit 535 acquires output information for the dummy pixel regions 13a, 13b, and 13c from the correction value acquisition unit 532, and estimates a horizontal dark shading shape when it is assumed that the entire dummy pixel row is a dummy pixel (step S125). A specific calculation process that can be used for this estimation can be, for example, the above-mentioned polynomial approximation. The estimated horizontal dark shading shape is used as a second correction value.

[0126] In this way, the correction value acquisition units 531 and 532 acquire output signals from the dummy pixel rows, and the correction value estimation units 534 and 535 estimate the first and second correction values, depending on the operation mode when reading out the dummy pixel rows. These correction values ​​are used when correcting the signals read out from the effective pixel rows for each pixel.

[0127] Next, a description will be given of the correction operation that starts from step S113. It is assumed that the above-mentioned first and second correction values ​​have already been stored in the correction value estimation units 534 and 535 by the above-mentioned processing.

[0128] The signals input during the correction operation are not from the dummy pixel row. In the following description, it is assumed that the input signals are signals output from the effective pixel row. It is also assumed that the correction process is performed on the A+B image signal. The signal from the effective pixel row is input to the subtraction unit 533 via the switch SW31 (step S114).

[0129] The subtraction unit 533 performs processing to correct the horizontal dark shading shape by subtracting one of the first and second correction values ​​from the signal output from the effective pixel row. A method of switching this correction value will be described.

[0130] The signal of the effective pixel row input to the first correction unit 53 is read from the pixel array 10 in the first operation mode or the second operation mode. If the signal of the effective pixel row is read in the first operation mode (YES in step S115), the first identification signal output from the timing generation circuit 33 is at L level (step S116). In this case, the switch SW33 is switched to the terminal marked with "L" shown in FIG. 16. In addition, since the second identification signal is at L level, the switches SW36 and SW34 are also switched to the terminal marked with "L" shown in FIG. 16. As a result, the first correction value held in the correction value estimation unit 534 is output to the subtraction unit 533 via the switches SW36, SW33, and SW34 (step S126). The subtraction unit 533 corrects the horizontal dark shading shape by subtracting the first correction value from the signal of the effective pixel row (step S118). The signal corrected by the subtraction unit 533 is output to the outside of the first correction unit 53 via the switch SW35 (step S119).

[0131] On the other hand, if the signal of the effective pixel row is read out in the second operation mode (NO in step S115), the first identification signal output from the timing generation circuit 33 is at H level (step S120). In this case, the switch SW33 is switched to the terminal marked with "H" shown in FIG. 16. Also, since the second identification signal is at L level, the switches SW36 and SW34 are switched to the terminal marked with "L" shown in FIG. 16. As a result, the second correction value held in the correction value estimation unit 535 is output to the subtraction unit 533 via the switches SW37, SW33, and SW34 (step S127). The subtraction unit 533 corrects the horizontal dark shading shape by subtracting the second correction value from the signal of the effective pixel row (step S122). The signal corrected by the subtraction unit 533 is output to the outside of the first correction unit 53 via the switch SW35 (step S123).

[0132] In this way, the subtraction unit 533 performs correction using different correction values ​​depending on the operation mode when the signals from the effective pixel rows are read out, thereby making it possible to appropriately correct the difference in the horizontal dark shading shape.

[0133] As described above, according to this embodiment, even if the dummy pixel regions are arranged intermittently in the same row, a photoelectric conversion device capable of appropriately correcting horizontal dark shading is provided, as in the first embodiment. In addition, since the range of the OB pixel region 12 can be expanded, the accuracy of the OB clamping process can be improved.

[0134] In this embodiment, the number of dummy pixel regions intermittently arranged in the same row is three, but the number of pixel regions is not limited to this. Also, even in a configuration in which the dummy pixel regions are not intermittent as in the first embodiment, the correction value estimation process of this embodiment may be applied by dividing the region used for calculation in the dummy pixel region into several parts. Also, in the example shown, the degree of the polynomial used for estimation in the correction value estimation is quadratic, but the degree may be changed as appropriate. A value obtained by calculation inside the photoelectric conversion device may be applied to the coefficient of the polynomial, or the coefficient may be set by providing a register for holding the coefficient inside the photoelectric conversion device and inputting the coefficient from outside.

[0135] In this embodiment, the output signal from the dummy pixel row is used in the calculation of the correction value in the first correction unit 53, but the output signal from the OB pixel row may be used in the same correction process. For example, in an environment where the dark current component is sufficiently small, such as a low temperature environment, the output signal from the OB pixel row may be substituted for the output signal from the dummy pixel row. In this case, instead of the dummy pixel areas 13a, 13b, and 13c in FIG. 15, a plurality of OB pixel areas may be intermittently arranged in the same row. Then, the correction value estimation process of this embodiment may be similarly applied to the output signals from the plurality of OB pixel areas intermittently arranged in the same row. This provides a photoelectric conversion device that can appropriately correct horizontal dark shading in the same way as in the first embodiment, even in a configuration in which the OB pixel areas are intermittently arranged in the same row.

[0136] [Third embodiment] A photoelectric conversion device according to a third embodiment will be described with reference to Figs. 18 to 20. In this embodiment, a correction method will be described in which the focus detection row is corrected and the normal row is not corrected. In this method, the horizontal dark shading shape is not reduced, but the difference in the horizontal dark shading shape due to the difference in the readout operation mode can be reduced. The configuration of this embodiment is suitable for the case where a signal processing circuit that corrects the horizontal dark shading shape of the entire image to be uniform is arranged in the subsequent stage of the photoelectric conversion device. Descriptions of elements common to the first embodiment may be omitted or simplified as appropriate.

[0137] The first correction unit 53 in this embodiment will be described with reference to Figures 18 and 19. The first correction unit 53 in this embodiment performs a correction process for bringing the shapes of horizontal dark shading in two operation modes closer to each other.

[0138] 18 is a block diagram of a first correction unit 53 of a photoelectric conversion device in this embodiment. The first correction unit 53 has correction value acquisition units 531 and 532, a correction value calculation unit 536, an adder 537, and switches SW31, SW32, SW35, SW38, SW39, SW40, SW41, and SW42. The switches SW32, SW38, SW41, and SW42 are switched based on the level of a first identification signal similar to the first embodiment. The switches SW31, SW35, SW39, and SW40 are switched based on the level of a second identification signal similar to the first embodiment.

[0139] As in the first embodiment, the correction value acquisition units 531 and 532 respectively hold signals read out from pixels in the dummy pixel rows in the first and second operation modes. The correction value calculation unit 536 calculates the difference between the signals of the dummy pixel rows input to the correction value acquisition unit 531 and the signals of the dummy pixel rows input to the correction value acquisition unit 532. In this way, the correction value calculation unit 536 calculates the relative shift amount of horizontal dark shading in the two operation modes and holds this as a third correction value.

[0140] When the first identification signal is at L level, switch SW38 outputs the output signal from correction value acquisition unit 531 to switch SW39, and when the first identification signal is at H level, switch SW38 outputs the output signal from correction value acquisition unit 532 to switch SW39.

[0141] When the second identification signal is at L level, the switch SW39 outputs the output signal from the correction value calculation unit 536 to the switch SW40, and when the second identification signal is at H level, the switch SW39 outputs the output signal from the switch SW38 to the switch SW40.

[0142] The switch SW40 outputs the output signal from the switch SW39 to the adder 537 when the second identification signal is at L level, and outputs the output signal from the switch SW39 to the switch SW35 when the second identification signal is at H level.

[0143] The switch SW31 outputs a signal to the switch SW41 when the second identification signal is at an L level, and outputs a signal to the switch SW32 when the second identification signal is at an H level. The switch SW41 outputs a signal to the switch SW42 when the first identification signal is at an L level, and outputs a signal to the adder 537 when the first identification signal is at an H level.

[0144] The adder 537 adds the signal output from the switch SW41 and the signal output from the switch SW40, and outputs the result to the switch SW42. That is, the adder 537 performs a process of correcting the pixel signal output from the effective pixel row by the third correction value held in the correction value calculation unit 536.

[0145] When the first identification signal is at an L level, switch SW42 outputs the output signal from switch SW41 to switch SW35, and when the first identification signal is at an H level, switch SW42 outputs the output signal from adder 537 to switch SW35. In other words, when the first identification signal is at an H level, correction processing is performed in adder 537, but when the first identification signal is at an L level, correction processing is not performed in adder 537.

[0146] Next, the correction process procedure of the first correction unit 53 in this embodiment will be described with reference to Fig. 19. Fig. 19 is a process flowchart of the first correction unit 53 in this embodiment. Fig. 19 describes the process from when a signal read from one pixel row is input to the first correction unit 53 until it is output. In Fig. 19, steps common to the flowchart of Fig. 13 of the first embodiment are given the same reference numerals, and the description may be omitted or simplified.

[0147] As in the first embodiment, in this embodiment, when a signal is input to the first correction unit 53, if the second identification signal is at H level, a correction value acquisition operation (step S104) is performed, and if the second identification signal is at L level, a correction operation (step S113) is performed. When the second identification signal is at H level, the switches SW31, SW35, SW39, and SW40 are switched to the terminals marked with "H" shown in FIG. 18. The correction value acquisition operation started from step S104 and the correction operation started from step S113 will be described in order below. First, the correction value acquisition operation started from step S104 will be described.

[0148] If the signals of the dummy pixel row input to the first correction unit 53 have been read out in the first operation mode (YES in step S105), the first identification signal output from the timing generation circuit 33 is at L level (step S106). In this case, the switch SW32 is switched to the terminal marked with "L" in Fig. 18. The signals of the dummy pixel row read out in the first operation mode are input to the correction value acquisition unit 531 via the switches SW31 and SW32.

[0149] The correction value acquisition unit 531 stores the input signals of the dummy pixel rows in a line memory for each pixel (step S107). The signals stored in the line memory are used for calculation in the correction value calculation unit 536. The correction value acquisition unit 531 may have an averaging unit. When there are multiple dummy pixel rows read out in the first operation mode, the averaging unit may perform averaging processing of the signals of the multiple rows.

[0150] The input signals of the dummy pixel rows are held in the correction value acquisition unit 531, and are also output to the outside of the first correction unit 53 via the switches SW38, SW39, SW40, and SW35 in this order (step S108).

[0151] On the other hand, if the signal of the dummy pixel row is read out in the second operation mode (NO in step S105), the first identification signal output from the timing generation circuit 33 is at H level (step S109). In this case, the switch SW32 is switched to the terminal marked with "H" shown in Fig. 18. The signal of the dummy pixel row read out in the second operation mode is input to the correction value acquisition unit 532 via the switches SW31 and SW32.

[0152] Similar to the correction value acquisition unit 531, the correction value acquisition unit 532 stores the input signals of the dummy pixel rows in a line memory for each pixel (step S110). The signals stored in the line memory are used for calculation in the correction value calculation unit 536. The input signals of the dummy pixel rows are stored in the correction value acquisition unit 532 and are also output to the outside of the first correction unit 53 via the switches SW38, SW39, SW40, and SW35 in this order (step S111).

[0153] The correction value calculation unit 536 performs a process of calculating the difference between the dummy row signals stored in the correction value acquisition units 531 and 532, and calculates the relative shift amount of horizontal dark shading in the two operation modes as a third correction value (step S128). This third correction value is used when correcting, for each pixel, signals read out from the focus detection rows among the effective pixel rows.

[0154] Next, the correction operation that starts from step S113 will be described. It is assumed that the above-mentioned third correction value has already been held in the correction value calculation unit 536 by the above-mentioned processing.

[0155] The signals input during the correction operation are not from the dummy pixel row. In the following explanation, it is assumed that the input signals are signals output from the effective pixel row. It is also assumed that the correction process is performed on the A+B image signal. The signal from the effective pixel row is input to switch SW31.

[0156] The signals of the effective pixel row input to the first correction unit 53 are read out from the pixel array 10 in the first operation mode or the second operation mode. If the signals of the effective pixel row are read out in the first operation mode (YES in step S115), the first identification signal output from the timing generation circuit 33 is at L level (step S116). In this case, the switches SW41 and SW42 are switched to the terminals marked with "L" shown in FIG. 18. In addition, since the second identification signal is at L level, the switches SW31 and SW35 are also switched to the terminals marked with "L" shown in FIG. 18. As a result, the signals of the effective pixel row input to the first correction unit 53 are output to the outside of the first correction unit 53 via the switches SW31, SW41, SW42, and SW35 without passing through the adder 537 (step S119). That is, the horizontal dark shading correction is not performed on the signals of the effective pixel row read out in the first operation mode.

[0157] On the other hand, if the signal of the valid pixel row has been read out in the second operation mode (NO in step S115), the first identification signal output from the timing generation circuit 33 is at H level (step S120). In this case, the switches SW41 and SW42 are switched to the terminals marked with "H" shown in FIG. 18. Also, because the second identification signal is at L level, the switches SW31 and SW35 are switched to the terminals marked with "L" shown in FIG. 18. As a result, the signal of the valid pixel row input to the first correction unit 53 is input to the adder 537 via the switches SW31 and SW41 (step S129).

[0158] Furthermore, since the second identification signal is at the L level, the switches SW39 and SW40 are switched to the terminals marked with "L" as shown in Fig. 18. As a result, the third correction value held in the correction value calculation unit 536 is output to the adder 537 via the switches SW39 and SW40 (step S130). The adder 537 corrects the horizontal dark shading shape by adding the third correction value to the signal of the effective pixel row (step S122). The signal corrected by the adder 537 is output to the outside of the first correction unit 53 via the switches SW42 and SW35 (step S123).

[0159] In this manner, the first correction unit 53 of the present embodiment corrects only the signal read out in the second operation mode based on the horizontal dark shading shape of the signal read out in the first operation mode, thereby reducing the relative difference in the horizontal dark shading shape.

[0160] Figures 20(a), 20(b), and 20(c) are graphs showing the effect of correction in the signal processing circuit 50. The vertical and horizontal axes of the graphs are the same as those shown in Figure 8(b), so the explanation will be omitted.

[0161] 20(a) is a graph showing the shape of the horizontal dark shading before correction. As described above, there are differences in both the offset and the shape of the horizontal dark shading between the first and second operation modes.

[0162] 20(b) is a graph showing the shape of the horizontal dark shading for each operation mode corrected by the second correction unit 52. The correction values ​​corresponding to the dark current components calculated by the averaging units 522 and 523 of the second correction unit 52 are subtracted, thereby reducing the offset component difference.

[0163] 20(c) is a graph showing the shape of horizontal dark shading for each operation mode corrected by the first correction unit 53. The shape of horizontal dark shading in the first operation mode is not corrected. However, the shape of horizontal dark shading in the second operation mode is corrected to approach the shape of horizontal dark shading in the first operation mode. This makes it possible to reduce a signal level difference in an image that may occur at the boundary between a normal row and a focus detection row.

[0164] As described above, in this embodiment as well, a photoelectric conversion device capable of appropriately correcting horizontal dark shading is provided.

[0165] In this embodiment, the correction method is applied in which the focus detection rows are corrected but the normal rows are not corrected, but the opposite may be true. That is, the first correction unit 53 may not correct the shape of the horizontal dark shading in the second operation mode, but may correct only the signal read out in the first operation mode based on the horizontal dark shading shape of the signal read out in the second operation mode. In this case as well, the relative difference in the horizontal dark shading shape is reduced.

[0166] [Fourth embodiment] A photoelectric conversion device according to a fourth embodiment will be described with reference to FIG. 21. In this embodiment, the arrangement and readout order of the OB pixel rows and the dummy pixel rows are changed. Descriptions of elements common to the first embodiment may be omitted or simplified as appropriate.

[0167] Fig. 21 is a diagram showing the layout of the pixel array 10 in this embodiment. As shown in Fig. 21, the dummy pixel row (third pixel row) is arranged between the effective pixel row (first pixel row) and the OB pixel row (fourth pixel row).

[0168] The signals of each row are read out in order starting from the top row in Fig. 21. That is, in this embodiment, the OB pixel row is read out and then the dummy pixel row is read out. Then, the effective pixel row is read out after the dummy pixel row is read out.

[0169] Immediately after the first row is read out, the power supply state from the power source may not be sufficiently settled because the time since the power was turned on is short for the circuit of the photoelectric conversion device. This effect may appear in the output signal as variation or fixed pattern noise. In correcting horizontal dark shading, it is necessary to obtain a highly accurate correction value for each pixel in the column direction. If the reading of the signals of the dummy pixel rows used to obtain this correction value is performed relatively later than the reading of the OB pixel rows, the deterioration of accuracy due to the above-mentioned factors can be reduced, and the correction accuracy can be improved. Therefore, according to this embodiment, the accuracy of the correction process can be further improved.

[0170] In this embodiment, the dummy pixel row is read out immediately before the effective pixel row, but this is not limited to the above. If the power supply state is sufficiently stable, the dummy pixel row does not have to be read out immediately before the effective pixel row. For example, the dummy pixel row may be read out in the middle of the readout of a plurality of OB pixel rows. In other words, the readout order may be the OB pixel row, the dummy pixel row, the OB pixel row, and the effective pixel row.

[0171] [Fifth embodiment] The photoelectric conversion device in the above-described embodiment can be applied to various devices. Examples of the devices include digital cameras, digital camcorders, camera heads, copiers, fax machines, mobile phones, vehicle-mounted cameras, observation satellites, and surveillance cameras. Fig. 22 shows a block diagram of a digital camera as an example of the device.

[0172] The device 70 shown in FIG. 22 includes a barrier 706, a lens 702, an aperture 704, and a photoelectric conversion device 700. The device 70 further includes a signal processing unit (processing device) 708, a timing generating unit 720, an overall control / calculation unit 718 (control device), a memory unit 710 (storage device), a recording medium control I / F unit 716, a recording medium 714, and an external I / F unit 712. At least one of the barrier 706, the lens 702, and the aperture 704 is an optical device corresponding to the device. The barrier 706 protects the lens 702, and the lens 702 forms an optical image of a subject on the photoelectric conversion device 700. The aperture 704 makes the amount of light passing through the lens 702 variable. The photoelectric conversion device 700 is configured as in the above-mentioned embodiment, and converts the optical image formed by the lens 702 into image data (image signal). The signal processing unit 708 performs various corrections, data compression, etc. on the image data output from the photoelectric conversion device 700. The timing generating unit 720 outputs various timing signals to the photoelectric conversion device 700 and the signal processing unit 708. The overall control and calculation unit 718 controls the entire digital camera, and the memory unit 710 temporarily stores image data. The recording medium control I / F unit 716 is an interface for recording or reading image data to the recording medium 714, and the recording medium 714 is a removable recording medium such as a semiconductor memory for recording or reading image data. The external I / F unit 712 is an interface for communicating with an external computer or the like. Timing signals and the like may be input from outside the device. The device 70 may further include a display device (monitor, electronic viewfinder, etc.) that displays information obtained by the photoelectric conversion device. The device includes at least a photoelectric conversion device. The device 70 further includes at least one of an optical device, a control device, a processing device, a display device, a storage device, and a mechanical device that operates based on information obtained by the photoelectric conversion device. The mechanical device is a movable part (for example, a robot arm) that operates by receiving a signal from the photoelectric conversion device.

[0173] Each pixel circuit may include a plurality of photoelectric conversion units (a first photoelectric conversion unit and a second photoelectric conversion unit). The signal processing unit 708 may be configured to process a pixel signal based on the charge generated in the first photoelectric conversion unit and a pixel signal based on the charge generated in the second photoelectric conversion unit, and to acquire distance information from the photoelectric conversion device 700 to a subject.

[0174] [Sixth embodiment] FIG. 23(a) and FIG. 23(b) are block diagrams of devices related to the vehicle-mounted camera in this embodiment. The device 80 has the photoelectric conversion device 800 of the above-mentioned embodiment and a signal processing device (processing device) that processes a signal from the photoelectric conversion device 800. The device 80 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the photoelectric conversion device 800, and a parallax calculation unit 802 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the device 80. The device 80 also has a distance measurement unit 803 that calculates a distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax calculation unit 802 and the distance measurement unit 803 are examples of distance information acquisition means that acquire distance information to the object. That is, the distance information is information related to the parallax, the defocus amount, the distance to the object, and the like. The collision determination unit 804 may determine the possibility of a collision using any of these distance information. The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination of these.

[0175] The device 80 is connected to a vehicle information acquisition device 810, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. In addition, the device 80 is connected to a control ECU 820, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the judgment result of the collision judgment unit 804. In addition, the device 80 is also connected to an alarm device 830 that issues an alarm to the driver based on the judgment result of the collision judgment unit 804. For example, when the judgment result of the collision judgment unit 804 indicates that there is a high possibility of a collision, the control ECU 820 performs vehicle control to avoid a collision and reduce damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 830 warns the user by sounding an alarm such as a sound, displaying alarm information on the screen of a car navigation system, etc., and applying vibrations to a seat belt or steering wheel. The device 80 functions as a control means that controls the operation of controlling the vehicle as described above.

[0176] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the device 80. Fig. 23(b) shows the device when imaging the area in front of the vehicle (imaging range 850). A vehicle information acquisition device 810, which serves as an imaging control means, sends an instruction to the device 80 or the photoelectric conversion device 800 to perform an imaging operation. This configuration can further improve the accuracy of distance measurement.

[0177] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from lanes, etc. Furthermore, the device is not limited to vehicles such as automobiles, but can be applied to moving bodies (moving devices) such as ships, aircraft, artificial satellites, industrial robots, and consumer robots. In addition, the present invention can be applied to devices that use object recognition or biometric recognition, such as intelligent transport systems (ITS) and surveillance systems, in addition to moving bodies.

[0178] [Modified embodiment] The present invention is not limited to the above-described embodiments and can be modified in various ways. For example, an example in which a part of the configuration of any of the embodiments is added to another embodiment, or an example in which a part of the configuration of any of the embodiments is replaced with a part of the configuration of another embodiment, is also an embodiment of the present invention.

[0179] The disclosure of this specification includes the complement of the concepts described in this specification. In other words, if the specification states, for example, that "A is B" (A=B), the specification is deemed to disclose or suggest that "A is not B" even if the statement that "A is not B" (A≠B) is omitted. This is because when it states that "A is B," it is assumed that the case that "A is not B" is taken into consideration.

[0180] The disclosure of this specification includes the following configurations. (Configuration 1) a pixel array in which a plurality of pixels are arranged across a plurality of rows and a plurality of columns, the pixel array including: a first pixel row including first pixels each having a plurality of photoelectric conversion units that generate electric charges based on incident light; and a second pixel row including non-photosensitive pixels that output signals that are not based on the incident light; a readout unit configured to read out signals from the first pixel and the non-photosensitive pixel; a first correction unit that corrects a signal read from the first pixel; having In the second pixel row, the non-photosensitive pixels are arranged more than the first pixels, In reading out a signal from the pixel array to the readout unit, a first drive is executed to output a signal based on a sum of charges generated in each of the plurality of photoelectric conversion units, and a second drive is executed to output a signal based on a charge generated in any one of the plurality of photoelectric conversion units, a first operation mode in which signals are read out from pixels in one row by the first driving and a second operation mode in which signals are read out from pixels in one row by continuously performing the first driving and the second driving are switchable for each row; The first correction unit generates a first correction value based on the output signal of the second pixel row read out in the first operation mode, generates a second correction value based on the output signal of the second pixel row read out in the second operation mode, and corrects the output signal of the first pixel row based on the first correction value and the second correction value. A photoelectric conversion device comprising: (Configuration 2) The second pixel row includes a second pixel that does not have a photoelectric conversion unit. 2. The photoelectric conversion device according to configuration 1. (Configuration 3) The second pixel row includes a third pixel having a plurality of light-shielded photoelectric conversion units. 3. The photoelectric conversion device according to configuration 1 or 2. (Configuration 4) The first correction unit corrects the output signal of the first pixel row read out in the first operation mode by the first correction value, and corrects the output signal of the first pixel row read out in the second operation mode by the second correction value. 4. The photoelectric conversion device according to any one of configurations 1 to 3. (Configuration 5) the second pixel row includes a second pixel that does not have a photoelectric conversion unit, the second pixels are arranged intermittently in a plurality of rows, The first correction unit generates the first correction value and the second correction value based on output signals of a plurality of the second pixels. 5. The photoelectric conversion device according to any one of configurations 1 to 4. (Configuration 6) The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the second pixel is not arranged, based on output signals of a plurality of the second pixels, in generating the first correction value and the second correction value. 6. The photoelectric conversion device according to configuration 5. (Configuration 7) The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the second pixel is not arranged by performing a polynomial approximation on an output signal of each of the second pixels in generating the first correction value and the second correction value. 7. The photoelectric conversion device according to configuration 5 or 6. (Configuration 8) the second pixel row includes a third pixel having a plurality of light-shielded photoelectric conversion units; the third pixels are arranged intermittently in a plurality of rows, The first correction unit generates the first correction value and the second correction value based on signals of a plurality of the third pixels. 5. The photoelectric conversion device according to any one of configurations 1 to 4. (Configuration 9) The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the third pixel is not arranged, based on output signals of a plurality of the third pixels, in generating the first correction value and the second correction value. 9. The photoelectric conversion device according to configuration 8. (Configuration 10) The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the third pixel is not arranged by performing a polynomial approximation on an output signal of each of the third pixels in generating the first correction value and the second correction value. 10. The photoelectric conversion device according to configuration 8 or 9. (Configuration 11) The first correction unit generates a third correction value based on the first correction value and the second correction value, and corrects the output signal of the first pixel row based on the third correction value. 4. The photoelectric conversion device according to any one of configurations 1 to 3. (Configuration 12) The first correction unit corrects only one of the output signal read from the first pixel row in the first operation mode and the output signal read from the first pixel row in the second operation mode, based on the third correction value. 12. The photoelectric conversion device according to claim 11, (Configuration 13) the second pixel row is composed of a plurality of rows including a third pixel row including a second pixel having no photoelectric conversion unit and a fourth pixel row including a third pixel having a plurality of light-shielded photoelectric conversion units; In reading out signals from the pixel array to the readout unit, the third pixel row is read out between the fourth pixel row and the first pixel row. 13. The photoelectric conversion device according to any one of configurations 1 to 12. (Configuration 14) The first pixel row further includes a third pixel having a plurality of light-shielded photoelectric conversion units. 14. The photoelectric conversion device according to any one of configurations 1 to 13. (Configuration 15) a second correction unit that generates a fourth correction value based on an output signal of the third pixel in the first pixel row read out in the first operation mode, generates a fifth correction value based on an output signal of the third pixel in the first pixel row read out in the second operation mode, and corrects the output signal of the first pixel row based on the fourth correction value and the fifth correction value. 15. The photoelectric conversion device according to configuration 14. (Configuration 16) The second correction unit corrects the output signal of the first pixel row read out in the first operation mode with the fourth correction value, and corrects the output signal of the first pixel row read out in the second operation mode with the fifth correction value. 16. The photoelectric conversion device according to configuration 15. (Configuration 17) Further comprising a microlens, The incident light that has passed through one of the microlenses is incident on the plurality of photoelectric conversion units. 17. The photoelectric conversion device according to any one of configurations 1 to 16, (Configuration 18) In the second operation mode, the first driving is performed after the second driving. 18. The photoelectric conversion device according to any one of configurations 1 to 17. (Configuration 19) the first pixels in the first pixel row are arranged from a first column closest to one end of the photoelectric conversion device to a second column closest to an end opposite to the one end, In the second pixel row, the second pixels are arranged from the first column to the second column. 19. The photoelectric conversion device according to any one of configurations 1 to 18. (Configuration 20) The photoelectric conversion device according to any one of configurations 1 to 19, an optical device corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; A storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device. An apparatus characterized by: (Configuration 21) The processing device processes the image signals generated by the plurality of photoelectric conversion units, and obtains distance information from the photoelectric conversion devices to a subject. 21. The device of claim 20.

[0181] The present invention can also be realized by a process in which a program for implementing one or more of the functions of the above-described embodiments is supplied to a system or device via a network or a storage medium, and one or more processors in a computer of the system or device read and execute the program. The present invention can also be realized by a circuit (e.g., ASIC) for implementing one or more of the functions.

[0182] It should be noted that the above-mentioned embodiments are merely examples of the implementation of the present invention, and the technical scope of the present invention should not be interpreted as being limited by these embodiments. In other words, the present invention can be implemented in various forms without departing from its technical concept or main features. [Explanation of symbols]

[0183] 10 Pixel Array 40 Column readout section 53 First Correction Section 100 effective pixels 101 effective pixel rows 200 non-photosensitive pixels 201 Non-photosensitive pixel row

Claims

1. a pixel array including a plurality of pixels arranged across a plurality of rows and a plurality of columns, the pixel array including: a first pixel row including first pixels each having a plurality of photoelectric conversion units that generate electric charges based on incident light; and a second pixel row including non-photosensitive pixels that output signals that are not based on the incident light; a readout unit configured to read out signals from the first pixel and the non-photosensitive pixel; a first correction unit that corrects a signal read from the first pixel; having In the second pixel row, the non-photosensitive pixels are arranged more than the first pixels, In reading out a signal from the pixel array to the readout unit, a first drive is executed to output a signal based on a sum of charges generated in each of the plurality of photoelectric conversion units, and a second drive is executed to output a signal based on a charge generated in any one of the plurality of photoelectric conversion units, a first operation mode in which signals are read out from pixels in one row by the first driving and a second operation mode in which signals are read out from pixels in one row by continuously performing the first driving and the second driving are switchable for each row; The first correction unit generates a first correction value based on the output signal of the second pixel row read out in the first operation mode, generates a second correction value based on the output signal of the second pixel row read out in the second operation mode, and corrects the output signal of the first pixel row based on the first correction value and the second correction value. A photoelectric conversion device comprising:

2. The second pixel row includes a second pixel that does not have a photoelectric conversion unit.

2. The photoelectric conversion device according to claim 1.

3. The second pixel row includes a third pixel having a plurality of light-shielded photoelectric conversion units.

2. The photoelectric conversion device according to claim 1.

4. The first correction unit corrects the output signal of the first pixel row read out in the first operation mode by the first correction value, and corrects the output signal of the first pixel row read out in the second operation mode by the second correction value.

2. The photoelectric conversion device according to claim 1.

5. the second pixel row includes a second pixel that does not have a photoelectric conversion unit, The second pixels are arranged in a plurality of rows in a spaced apart manner, The first correction unit generates the first correction value and the second correction value based on output signals of a plurality of the second pixels.

2. The photoelectric conversion device according to claim 1.

6. The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the second pixel is not arranged, based on output signals of a plurality of the second pixels, in generating the first correction value and the second correction value.

6. The photoelectric conversion device according to claim 5.

7. The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the second pixel is not arranged by performing polynomial approximation on output signals of the plurality of second pixels in generating the first correction value and the second correction value.

6. The photoelectric conversion device according to claim 5.

8. the second pixel row includes a third pixel having a plurality of light-shielded photoelectric conversion units; the third pixels are arranged intermittently in a plurality of rows in one row, The first correction unit generates the first correction value and the second correction value based on signals of a plurality of the third pixels.

2. The photoelectric conversion device according to claim 1.

9. The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the third pixel is not arranged, based on output signals of a plurality of the third pixels, in generating the first correction value and the second correction value.

9. The photoelectric conversion device according to claim 8.

10. The first correction unit performs a process of estimating the first correction value and the second correction value of a column in which the third pixel is not arranged by performing polynomial approximation on output signals of the plurality of third pixels in generating the first correction value and the second correction value.

9. The photoelectric conversion device according to claim 8.

11. The first correction unit generates a third correction value based on the first correction value and the second correction value, and corrects an output signal of the first pixel row based on the third correction value.

2. The photoelectric conversion device according to claim 1.

12. The first correction unit corrects only one of the output signal read out from the first pixel row in the first operation mode and the output signal read out from the first pixel row in the second operation mode, based on the third correction value. The photoelectric conversion device according to claim 11 .

13. the second pixel row is composed of a plurality of rows including a third pixel row including a second pixel having no photoelectric conversion unit and a fourth pixel row including a third pixel having a plurality of light-shielded photoelectric conversion units; In reading out signals from the pixel array to the readout unit, the third pixel row is read out between the fourth pixel row and the first pixel row.

2. The photoelectric conversion device according to claim 1.

14. The first pixel row further includes a third pixel having a plurality of light-shielded photoelectric conversion units.

2. The photoelectric conversion device according to claim 1.

15. a second correction unit that generates a fourth correction value based on an output signal of the third pixel in the first pixel row read out in the first operation mode, generates a fifth correction value based on an output signal of the third pixel in the first pixel row read out in the second operation mode, and corrects the output signal of the first pixel row based on the fourth correction value and the fifth correction value.

15. The photoelectric conversion device according to claim 14.

16. The second correction unit corrects the output signal of the first pixel row read out in the first operation mode by the fourth correction value, and corrects the output signal of the first pixel row read out in the second operation mode by the fifth correction value.

16. The photoelectric conversion device according to claim 15.

17. Further comprising a microlens, The incident light passing through one of the microlenses is incident on the plurality of photoelectric conversion units.

2. The photoelectric conversion device according to claim 1.

18. In the second operation mode, the first driving is performed after the second driving.

2. The photoelectric conversion device according to claim 1.

19. the first pixels in the first pixel row are arranged from a first column closest to one end of the photoelectric conversion device to a second column closest to an end opposite to the one end, In the second pixel row, the second pixels are arranged from the first column to the second column.

3. The photoelectric conversion device according to claim 2.

20. The photoelectric conversion device according to any one of claims 1 to 19, an optical device corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; A storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device. An apparatus characterized by:

21. The processing device processes the image signals generated by the plurality of photoelectric conversion units, and obtains distance information from the photoelectric conversion devices to a subject.

21. The device of claim 20.

Images