Photoelectric conversion device, light detection system, movable body, and control method of photoelectric conversion device

JP2024154558A5Pending Publication Date: 2026-04-27CANON KK
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
CANON KK
Filing Date
2023-04-19
Publication Date
2026-04-27

AI Technical Summary

Technical Problem

The image quality of captured images in solid-state imaging devices, such as those described in Patent Document 1, is insufficient.

Method used

A photoelectric conversion device with a switch unit that controls the bias voltage of a detection unit, a circuit section that generates detection signals based on voltage changes, and a counter section that counts these signals to improve image quality.

Benefits of technology

The proposed solution enhances the quality of captured images by accurately detecting photon incidence and counting detection signals, improving image quality under varying illumination conditions.

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Abstract

To provide a photoelectric conversion device, a light detection system, a movable body, and a control method of the photoelectric conversion device, capable of improving quality of images to be captured.SOLUTION: In a photoelectric conversion device, a pixel unit 50 includes: a single photon avalanche diode (SPAD) 510, which is a detection unit generating change in voltage by a current generated according to incident photons; a switch unit 520 provided between the detection unit and a power node for supplying a voltage VH, and configured to change a voltage of the detection unit to a predetermined bias voltage by supplying a current to the detection unit from the power node in an ON state and to cut off the current from the power node to the detection unit in an OFF state; a circuit portion 530 configured to generate a detection signal on the basis of the change in voltage according to the incident photons in the detection unit; and a counter unit 560 configured to count the detection signal to output a count value. The circuit portion 530 generates the detection signal on the basis of the change in voltage in the detection unit during a period when the switch unit is in the ON state.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present disclosure relates to a photoelectric conversion device, a light detection system, a moving object, and a method for controlling a photoelectric conversion device. [Background technology]

[0002] Patent Document 1 discloses a solid-state imaging device that charges a single photon avalanche diode (SPAD) via a switch means controlled by a pulse signal of an arbitrary period, and measures the number of photons incident on the SPAD. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 7-67043 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the solid-state imaging device described in Patent Document 1, the image quality of the captured image may not be sufficient.

[0005] The present disclosure has been made in consideration of the above-mentioned problems, and aims to provide a photoelectric conversion device, a light detection system, a moving body, and a method for controlling a photoelectric conversion device that can improve the image quality of a captured image. [Means for solving the problem]

[0006] A photoelectric conversion device according to one embodiment of the present disclosure includes a detection unit that generates a voltage change due to a current generated in response to the incidence of photons, a switch unit that is provided between the detection unit and a power supply node and that, in an on state, changes the voltage of the detection unit to a predetermined bias voltage by supplying a current from the power supply node to the detection unit and, in an off state, cuts off the current from the power supply node to the detection unit, a first circuit unit that generates a detection signal based on the voltage change in response to the incidence of photons in the detection unit, and a counting unit that counts the detection signals and outputs a count value, and the first circuit unit generates the detection signal based on the voltage change in the detection unit during a period in which the switch unit is in the on state. Effect of the Invention

[0007] According to the present disclosure, it is possible to provide a photoelectric conversion device, a light detection system, a moving body, and a method for controlling a photoelectric conversion device that can improve the quality of a captured image. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram of an imaging system according to a first embodiment. [Diagram 2] 1 is a block diagram of a photoelectric conversion device according to a first embodiment. [Diagram 3] FIG. 2 is a circuit diagram of a pixel unit according to the first embodiment. [Figure 4] 5 is a timing chart showing the operation of a counting unit in the first embodiment. FIG. [Diagram 5] 5 is a timing chart showing the operation of a counting unit in the first embodiment. FIG. [Figure 6] 10 is a flowchart showing the operation of an imaging system in a second embodiment. [Figure 7] 13 is a graph showing histogram information under high illuminance in the second embodiment. [Figure 8] 13 is a graph showing histogram information under low illuminance in the second embodiment. [Figure 9]FIG. 11 is a timing chart showing the operation of the imaging system in the second embodiment. [Figure 10] FIG. 11 is a schematic diagram of a photoelectric conversion device according to a third embodiment. [Figure 11] 13A and 13B are diagrams illustrating an example of an arrangement of a sensor substrate in the third embodiment. [Figure 12] FIG. 13 is a diagram showing an example of the arrangement of circuit boards in a third embodiment. [Figure 13] FIG. 13 is a circuit diagram of an APD and a pulse generating unit in a third embodiment. [Figure 14] 13 is a diagram illustrating the relationship between the operation of an APD and an output signal in the third embodiment. [Figure 15] FIG. 13 is a block diagram of a light detection system according to a fourth embodiment. [Figure 16] FIG. 13 is a schematic diagram of an endoscopic surgery system according to a fifth embodiment. [Figure 17A] FIG. 13 is a schematic diagram of a light detection system according to a sixth embodiment. [Figure 17B] FIG. 13 is a schematic diagram of a moving body in a sixth embodiment. [Figure 18] 13 is a flowchart showing the operation of the light detection system in the sixth embodiment. [Figure 19] FIG. 13 is a diagram showing a specific example of an electronic device in the seventh embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Elements having common functions throughout the drawings will be designated by the same reference numerals, and duplicated descriptions may be omitted or simplified.

[0010] [First embodiment] FIG. 1 is a block diagram of an imaging system 110 in the first embodiment. The imaging system 110 is one aspect of a light detection system. The imaging system 110 includes a barrier 111, a lens 112, an aperture 113, a photoelectric conversion device 100, a signal processing unit 114, a timing generation unit 115, an overall control / calculation unit 116, a memory unit 117, a recording medium control I / F unit 118, a recording medium 119, and an external I / F unit 120. The barrier 111 protects the lens, and the lens 112 forms an optical image of a subject on the photoelectric conversion device 100. The aperture 113 varies the amount of light that passes through the lens 112. The photoelectric conversion device 100 converts the optical image formed by the lens 112 into image data. The signal processing unit 114 performs various corrections and data compression on the imaging data output from the photoelectric conversion device 100. For example, the signal processing unit 114 performs pixel interpolation processing, color conversion processing, and the like, based on the pixel signals output from the photoelectric conversion device 100. The signal processing unit 114 also generates digital image data in RGB format, YUV format, and the like, based on the pixel signals. Furthermore, the signal processing unit 114 generates histogram information based on the information output from the photoelectric conversion device 100. The histogram information generated by the signal processing unit 114 may be, for example, the number of pixels that output each pixel value in a given frame. The histogram information will be described later.

[0011] The timing generating unit 115 outputs various timing signals to the photoelectric conversion device 100 and the signal processing unit 114. The overall control and calculation unit 116 may include an image signal processor (ISP), an application specific integrated circuit (ASIC), a programmable gate array (FPGA), or the like. The overall control and calculation unit 116 controls the entire imaging system 110. For example, the overall control and calculation unit 116 may control the operation mode of the photoelectric conversion device 100 based on histogram information generated by the signal processing unit 114. The memory unit 117 temporarily stores image data. The recording medium control I / F unit 118 is an interface for recording or reading image data to or from a recording medium 119, and the recording medium 119 is a removable recording medium such as a semiconductor memory for recording or reading imaging data. The external I / F unit 120 is an interface for communicating with an external computer or the like. Timing signals and the like may be input from outside the imaging system 110, and the imaging system 110 only needs to have at least the photoelectric conversion device 100 and a signal processing unit 114 that processes the image signal output from the photoelectric conversion device 100.

[0012] In this embodiment, the photoelectric conversion device 100 and the signal processing unit 114 are provided on different semiconductor substrates, but the photoelectric conversion device 100 and the signal processing unit 114 may be formed on the same semiconductor substrate. Examples of the imaging system 110 include a digital still camera, a digital camcorder, a camera head, a copier, a fax machine, a mobile phone, an in-vehicle camera, an observation satellite, and a surveillance camera.

[0013] Each pixel may include a first photoelectric conversion unit and a second photoelectric conversion unit. The signal processing unit 114 processes a pixel signal based on the charge generated in the first photoelectric conversion unit and a pixel signal based on the charge generated in the second photoelectric conversion unit, and may acquire distance information from the imaging system 110 to the subject.

[0014] 2 is a block diagram of the photoelectric conversion device 100 in the first embodiment. The photoelectric conversion device 100 includes a pixel section 50, a drive control section 60, a vertical scanning circuit 31, a horizontal scanning circuit 32, a register block 40, a digital processing section 70, an output section 80, and a control section 90.

[0015] The pixel unit 50 outputs a pixel signal according to the incident light via the output line 16. A plurality of pixel units 50 (a plurality of pixels) are arranged in a matrix in a pixel region of the photoelectric conversion device 100. The number of pixel units 50 is not particularly limited. For example, when used in an imaging camera, 1920 pixel units 50 may be arranged in a matrix in the horizontal direction and 1080 pixel units 50 in the vertical direction. When used in a line scan sensor, the pixel units 50 may be arranged in one row and multiple columns. A detailed configuration of the pixel unit 50 will be described later.

[0016] The drive control unit 60 receives a timing signal S5 from the overall control and calculation unit 116 via the timing generation unit 115. The drive control unit 60 transmits drive signals to the vertical scanning circuit 31 and the horizontal scanning circuit 32 based on the timing signal. The vertical scanning circuit 31 and the horizontal scanning circuit 32 are controlled by the drive signal. The drive control unit 60 also transmits a periodic signal S1 to the pixel unit 50 via the periodic signal line 15 based on the timing signal. The SPAD 510 of the pixel unit 50 is charged based on the periodic signal S1. The SPAD 510 will be described later. The drive control unit 60 also supplies other control signals (not shown) and controls the overall operation of the photoelectric conversion device 100. The drive control unit 60 may be driven using a clock from a phase-locked loop (PLL) or the like inside the photoelectric conversion device 100.

[0017] The vertical scanning circuit 31 receives a drive signal from the drive control unit 60 and supplies a scan signal S2 to each row of the pixel unit 50 via the scan line 26. The vertical scanning circuit 31 sequentially scans the pixel unit 50 row by row. That is, the vertical scanning circuit 31 selects a pixel row to output a pixel signal. The vertical scanning circuit 31 may be composed of logic circuits such as a shift register and an address decoder.

[0018] The horizontal scanning circuit 32 receives a drive signal from the drive control unit 60 and supplies a scan signal S3 to the pixel unit 50 of each column via a signal line 29. The horizontal scanning circuit 32 sequentially scans the pixel unit 50 column by column. That is, the horizontal scanning circuit 32 selects a pixel column to output a pixel signal. The horizontal scanning circuit 32 may be configured by logic circuits such as a shift register and an address decoder.

[0019] The register block 40 receives a mode signal S6 for setting an operation mode of the pixel section 50 from the overall control and calculation section 116 via the timing generation section 115. The register block 40 supplies a setting signal S4 to the pixel section 50 via the setting signal line 12 based on the mode signal S6. The register block 40 can hold various setting parameters for, for example, a photodetection operation. For example, the register block 40 can store and transmit settings of the timing of the photodetection operation, conditions for driving pixels, settings of the driving capability of an analog driving section in the photoelectric conversion device, and the like. As data communication for transmitting the setting information, a serial communication means such as I2C (Inter-Integrated Circuit) or SPI (Serial Peripheral Interface) can be used, but another communication means may also be used.

[0020] The digital processing unit 70 receives a timing signal S7 from the overall control / arithmetic unit 116 via the timing generation unit 115. The digital processing unit 70 also receives a pixel signal from the pixel unit 50 via the output line 16. The digital processing unit 70 performs various digital signal processing such as offset processing, digital gain processing, etc. on the pixel signal based on the timing signal S7.

[0021] The output unit 80 receives the pixel signal that has been subjected to signal processing from the digital processing unit 70. The output unit 80 transmits the pixel signal received from the digital processing unit 70 as an output signal S10 to the signal processing unit 114. The output unit 80 may include a serializer that converts parallel data into serial data, an LVDS (Low Voltage Differential Signal) transmitter, etc. The output unit 80 may include a parallel output means, etc. instead of a serializer.

[0022] The control unit 90 receives a pixel signal from the pixel unit 50 via the output line 16. The control unit 90 transmits a control signal for reducing power consumption based on the pixel signal to the register block 40, the drive control unit 60, and the digital processing unit 70. Each of the register block 40, the drive control unit 60, and the digital processing unit 70 limits a predetermined function or operation based on the control signal from the control unit 90.

[0023] 3 is a circuit diagram of a pixel section 50 in the first embodiment. The pixel section 50 includes a SPAD 510, a switch section 520, a circuit section 530 (first circuit section), a circuit section 540 (second circuit section), a selection section 550, a counter section 560, and a pixel output section 570.

[0024] The SPAD 510 is a photodiode that functions as a detection unit that detects incidence of photons on the pixel unit 50. The cathode of the SPAD 510 is connected to one end of the NOT gate 581 via a node N. The anode of the SPAD 510 is connected to a node of a voltage source that supplies a voltage VL. The operation of the SPAD 510 will be described later. Note that, although the SPAD 510 will be described in this embodiment as being a single-photon avalanche diode, an avalanche photodiode (APD), which will be described later, may also be used.

[0025] The switch unit 520 connects and disconnects the node (power supply node) of the voltage source that supplies the voltage VH and the SPAD 510. In this embodiment, the switch unit 520 is composed of a MOS transistor. The gate of the switch unit 520 is connected to the periodic signal line 15. The source of the switch unit 520 is connected to the node of the voltage source that supplies the voltage VH. The drain of the switch unit 520 is connected to the cathode of the SPAD 510 and one end of the NOT gate 581 via the node N. A periodic signal S1 is supplied to the gate of the switch unit 520 via the periodic signal line 15. The periodic signal S1 may be a rectangular wave having a predetermined amplitude and pulse width. While the periodic signal S1 is at a low level, the switch unit 520 is in an on state, the voltage source and the SPAD 510 are electrically connected, and a current is supplied from the voltage source to the SPAD 510 via the switch unit 520. Therefore, while the periodic signal S1 is at a low level, the SPAD 510 is charged, and the potential of the node N rises until it reaches a predetermined bias voltage. While the periodic signal S1 is at a high level, the switch unit 520 is in an off state, the voltage source and the SPAD 510 are electrically disconnected, and the supply of current from the voltage source to the SPAD 510 is cut off. Therefore, while the periodic signal S1 is at a high level, the SPAD 510 is not charged, and the potential of the node N is maintained at the potential when the switch unit 520 is switched from the on state to the off state. The voltage source that supplies the voltages VH and VL supplies a reverse bias voltage required for the SPAD 510 to perform avalanche amplification via the switch unit 520. When a photon is incident on the SPAD 510, avalanche multiplication occurs in the SPAD 510, and the potential of the node N drops. That is, a current generated in response to the input of a photon to the SPAD 510 causes a change in the potential of the node N (the voltage of the SPAD 510).

[0026] The circuit unit 530 generates a detection signal S8 indicating the detection of a photon in the SPAD 510 based on the periodic signal S1 and the potential of the node N. The circuit unit 530 includes a D-latch circuit 583. The D-latch circuit 583 of the circuit unit 530 has an input node D, a control node E, and an output node Q. A signal from the SPAD 510 based on the potential of the node N is input to the input node D via a NOT gate 581. Specifically, when a photon is incident on the SPAD 510, a high-level signal is input to the input node D as the node N transitions to a low potential. When a photon is not incident on the SPAD 510, a low-level signal is input to the input node D as the node N transitions to a high potential. That is, the circuit unit 530 generates a detection signal based on a voltage change of the SPAD 510 in response to the incidence of a photon. The periodic signal S1 is input to the control node E via a NOT gate 582. The periodic signal S1 is input as a common control signal to the switch unit 520 and the circuit unit 530. When the periodic signal S1 is at a low level, a high-level signal is input to the control node E. When the periodic signal S1 is at a high level, a low-level signal is input to the control node E. The output node Q outputs a detection signal S8 based on the input signals to the input node D and the control node E. Specifically, while a high-level signal is input to the control node E, the output node Q outputs a signal synchronized with the input signal to the input node D as the detection signal S8 to the selection unit 550. On the other hand, while a low-level signal is input to the control node E, the output node Q outputs a signal that was output from the output node Q immediately before the periodic signal S1 switched from a high level to a low level as the detection signal S8 to the selection unit 550. In other words, while a low-level signal is input to the control node E, the output node Q generates a constant detection signal S8 independent of the input signal to the input node D.

[0027] The circuit unit 540 outputs a detection signal S9 indicating the detection of a photon in the SPAD 510 based on the periodic signal S1 and the potential of the node N. The circuit unit 540 includes an AND gate 584. The periodic signal S1 is input to one input node In1 of the AND gate 584. That is, the periodic signal S1 is input as a common control signal to the switch unit 520 and the circuit unit 540. Here, the periodic signal S1 input to the input node In1 is in phase with the signal input to the control node E of the D latch circuit 583 at the same time. A signal from the SPAD 510 based on the potential of the node N is input to the other input node In2 of the AND gate 584 via the NOT gate 581. That is, a signal in phase with the input signal to the input node D of the D latch circuit 583 is input to the AND gate 584. The circuit unit 540 performs a logical AND operation on the signals input to the AND gate 584. The circuit unit 540 outputs the result of the operation to the selection unit 550 as a detection signal S9.

[0028] The selection unit 550 selects the detection signals S8 and S9 based on the setting signal S4. Specifically, the selection unit 550 includes an AND gate 585, an AND gate 586, an OR gate 587, and a NOT gate 588. The selection unit 550 receives the detection signal S8 from the circuit unit 530, and receives the detection signal S9 from the circuit unit 540. The selection unit 550 also receives the setting signal S4 from the register block 40 via the setting signal line 12. The detection signal S8 is input to one input node of the AND gate 585. The detection signal S9 is input to one input node of the AND gate 586. The setting signal S4 is input to the other input node of the AND gate 585. The setting signal S4 is also input to the other input node of the AND gate 586 via the NOT gate 588. The AND gate 585 performs a logical AND operation on the input signals, and outputs the result of the operation to one input node of the OR gate 587. The AND gate 586 performs a logical AND operation on the input signals and outputs the result of the operation to the other input node of the OR gate 587. The OR gate 587 performs a logical OR operation on the input signals and outputs the result of the operation to the counting unit 560 as the output signal of the selection unit 550.

[0029] According to this embodiment, when the setting signal S4 is at a high level, a high level signal is input to the AND gate 585, and a low level signal is input to the AND gate 586. Therefore, while the setting signal S4 is at a high level, the detection signal S8 from the circuit unit 530 is selected by the selection unit 550. When the selected detection signal S8 is at a high level, the selection unit 550 outputs a high level signal via the OR gate 587. When the selected detection signal S8 is at a low level, the selection unit 550 outputs a low level signal via the OR gate 587.

[0030] On the other hand, when the setting signal S4 is at a low level, a low level signal is input to the AND gate 585, and a high level signal is input to the AND gate 586. Thus, while the setting signal S4 is at a low level, the detection signal S9 from the circuit unit 540 is selected by the selection unit 550. When the selected detection signal S9 is at a high level, the selection unit 550 outputs a high level signal via the OR gate 587. When the selected detection signal S9 is at a low level, the selection unit 550 outputs a low level signal via the OR gate 587. Note that, although the selection unit 550 selects the detection signals S8 and S9 using an AND gate and an OR gate in this embodiment, the detection signals S8 and S9 may be selected using other logic gates, other signal selection means, or the like.

[0031] The counter 560 counts the detection signal indicating the detection of the incidence of photons on the SPAD 510, and outputs the count result as a count value. Specifically, the counter 560 samples the selected detection signal S8 or detection signal S9 at the timing when the periodic signal S1 transitions from high level to low level. If the detection signal S8 or detection signal S9 is at high level at the sampling timing, the counter 560 increments the photon count value. If the detection signal S8 or detection signal S9 is at low level at the sampling timing, the counter 560 maintains the photon count value. The counter 560 performs sampling processing of the detection signal and increment processing of the photon count value for a predetermined period (e.g., one frame period). After the predetermined period (e.g., one frame period) has elapsed, the counter 560 outputs the accumulated count value to the pixel output unit 570 as a pixel signal. The counter 560 initializes the count value after outputting the count value.

[0032] The pixel output unit 570 receives the count value from the counter unit 560. When the pixel unit 50 is selected by the scanning signal S2 from the vertical scanning circuit 31 and the scanning signal S3 from the horizontal scanning circuit 32, the pixel output unit 570 outputs the count value as a pixel signal to the digital processing unit 70 and the control unit 90 via the output line 16. The count value output from the pixel output unit 570 corresponds to the pixel value of the pixel unit 50.

[0033] FIG. 4 is a timing diagram showing the operation of the counting unit in the first embodiment. Each period P1 to P8 corresponds to one period of the periodic signal S1. In the periods P1 to P8, a high-level setting signal S4 is input to the pixel unit 50. That is, in the periods P1 to P8, the detection signal S8 from the circuit unit 530 is selected by the selection unit 550. Therefore, the detection signal S8 is sampled in each period P1 to P8 shown in FIG. 4. FIG. 4 shows the timing Tin of the incidence of photons to the SPAD 510 in the periods P1 to P8, the periodic signal S1 input to the gate of the switch unit 520, the potential Pn of the node N, the input signal Sd to the input node D of the D latch circuit 583, the photon detection period Pd in ​​the periods P1 to P8, the detection signal S8 from the circuit unit 530, and a timing diagram of the increment operation INC by the counting unit 560.

[0034] At time t0 before the period P1, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn of the node N becomes less than the logic threshold Th, and the input signal Sd to the input node D of the D latch circuit 583 transitions from low level to high level. Meanwhile, since the periodic signal S1 is at a high level at time t0, a low-level control signal Se is input to the control node E of the D latch circuit 583 via the NOT gate 582. Therefore, the detection signal S8 does not change in response to the input signal Sd and is maintained at a low level.

[0035] Since the periodic signal S1 is at a high level from time t0 to the start time t1 of the period P1, the switch section 520 is maintained in an off state. Therefore, during the period from time t0 to t1, the SPAD 510 is not charged, the potential Pn and the detection signal S8 are maintained at a low level, and the input signal Sd is maintained at a high level.

[0036] At time t1, the periodic signal S1 transitions from a high level to a low level, and the switch unit 520 switches from an off state to an on state. When the switch unit 520 turns on, charging of the SPAD 510 begins. Also, at time t1, a high-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from a low level to a high level in response to the high-level input signal Sd. Furthermore, at time t1, an increment process is performed in the counter unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t1 is at a low level. Therefore, the counter unit 560 does not increment the count value.

[0037] Since the periodic signal S1 is maintained at a low level during the period from time t1 to t2, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t1 to t2. However, since the potential Pn does not exceed the logic threshold Th during the period from time t1 to t2, the input signal Sd is maintained at a high level. Therefore, during the period from time t1 to t2, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0038] At time t2, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from high level to low level. Since the control signal Se is at high level at time t2, the detection signal S8 transitions from high level to low level in response to the input signal Sd.

[0039] Since the periodic signal S1 is maintained at a low level during the period from time t2 to t3, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t2 to t3. The input signal Sd is maintained at a low level. Therefore, during the period from time t2 to t3, the detection signal S8 is maintained at a low level in response to the low-level input signal Sd.

[0040] At time t3, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switches to an off state, and thus charging of the SPAD 510 stops. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0041] Since the periodic signal S1 is maintained at a high level during the period from time t3 to t4, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t3 to t4, the potential Pn is maintained at the potential at time t3, and the input signal Sd is maintained at a low level. Furthermore, since the control signal Se is maintained at a low level during the period from time t3 to t4, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t3.

[0042] At time t4, period P1 ends and period P2 starts at the same time. At time t4, periodic signal S1 transitions from high level to low level, and switch section 520 switches from off state to on state. Also, at time t4, a high level control signal Se is input to control node E of D latch circuit 583. Therefore, detection signal S8 is maintained at low level in response to low level input signal Sd. Also, at time t4, increment processing is performed in counting section 560. Detection signal S8 output from circuit section 530 immediately before time t4 is at low level. Therefore, counting section 560 does not increment the count value.

[0043] Since the periodic signal S1 is maintained at a low level during the period from time t4 to t5, the switch section 520 is maintained in an on state. Therefore, the SPAD 510 can be charged during the period from time t4 to t5, but the SPAD 510 does not perform avalanche multiplication operation during the period P1. Therefore, the potential Pn is maintained at the potential at time t4 during the period from time t4 to t5. Therefore, the input signal Sd is maintained at a low level. Therefore, the detection signal S8 is maintained at a low level during the period from time t4 to t5 in response to the low-level input signal Sd.

[0044] At time t5, the periodic signal S1 transitions from a low level to a high level, the switch section 520 switches from an on state to an off state, and the control signal Se transitions from a high level to a low level.

[0045] Since the periodic signal S1 is maintained at a high level during the period from time t5 to t6, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t5 to t6, and the potential Pn is maintained at the potential at time t5. In addition, since the control signal Se is at a low level, the detection signal S8 is a low level signal in response to the low level input signal Sd immediately before time t5.

[0046] At time t6, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logical threshold Th, and the input signal Sd transitions from low level to high level. Meanwhile, since the periodic signal S1 is at a high level at time t6, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 does not change in response to the input signal Sd and is maintained at a low level.

[0047] Since the periodic signal S1 is maintained at a high level during the period from time t6 to t7, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t6 to t7, the potential Pn is maintained at the potential at time t6, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t6 to t7, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t5.

[0048] At time t7, the period P2 ends and at the same time, the period P3 starts. At time t7, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t7, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd. Also, at time t7, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t7 is at low level. Therefore, the counting unit 560 does not increment the count value.

[0049] During the period from time t7 to t8, the periodic signal S1 is maintained at a low level, so the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t7 to t8. However, during the period from time t7 to t8, the potential Pn does not exceed the logic threshold Th, so the input signal Sd is maintained at a high level. Therefore, during the period from time t7 to t8, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0050] At time t8, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from high level to low level. Since the control signal Se is at high level at time t8, the detection signal S8 transitions from high level to low level in response to the input signal Sd.

[0051] Since the periodic signal S1 is maintained at a low level during the period from time t8 to t9, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t8 to t9. The input signal Sd is maintained at a low level. Therefore, during the period from time t8 to t9, the detection signal S8 is maintained at a low level in response to the input signal Sd at a low level.

[0052] At time t9, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0053] Since the periodic signal S1 is maintained at a high level during the period from time t9 to t10, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t9 to t10, the potential Pn is maintained at the potential at time t9, and the input signal Sd is maintained at a low level. Furthermore, since the control signal Se is maintained at a low level during the period from time t9 to t10, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t9.

[0054] At time t10, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and the input signal Sd transitions from low level to high level. Meanwhile, since the periodic signal S1 is at a high level at time t10, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 does not change in response to the input signal Sd and is maintained at a low level.

[0055] Since the periodic signal S1 is maintained at a high level during the period from time t10 to t12, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t10 to t12, the potential Pn is maintained at the potential at time t10, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t10 to t12, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t9.

[0056] At time t11, a photon is incident on the SPAD 510. However, the SPAD 510 is already performing an avalanche multiplication operation due to the incidence of the photon at time t10. Therefore, the potential Pn, the input signal Sd, and the detection signal S8 do not change due to the incidence of the photon at time t11.

[0057] At time t12, the period P3 ends and at the same time, the period P4 starts. At time t12, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t12, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd. Also, at time t12, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t12 is at low level. Therefore, the counting unit 560 does not increment the count value.

[0058] Since the periodic signal S1 is maintained at a low level during the period from time t12 to t13, the switch unit 520 is maintained in an on state, and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t12 to t13. Before time t13 is reached, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from a high level to a low level. Since the control signal Se is at a high level during the period from time t12 to t13, the detection signal S8 transitions from a high level to a low level in response to the input signal Sd.

[0059] At time t13, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logical threshold Th, and the input signal Sd transitions from low level to high level. Since the periodic signal S1 is at low level at time t13, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd.

[0060] Since the periodic signal S1 is maintained at a low level during the period from time t13 to t14, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged again during the period from time t13 to t14. However, since the potential Pn does not exceed the logic threshold Th during the period from time t13 to t14, the input signal Sd is maintained at a high level. Therefore, during the period from time t13 to t14, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0061] At time t14, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0062] Since the periodic signal S1 is maintained at a high level during the period from time t14 to t15, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t14 to t15, the potential Pn is maintained at the potential at time t14, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t14 to t15, the detection signal S8 at a high level continues to be output in response to the input signal Sd at a high level immediately before time t14.

[0063] At time t15, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. The potential Pn drops in response to the avalanche multiplication operation of the SPAD 510. In the period from time t14 to t15, the potential Pn is less than the logic threshold Th, so the input signal Sd is maintained at a high level even after the incidence of the photon at t15. In addition, since the periodic signal S1 is at a high level at time t15, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd immediately before time t14.

[0064] Since the periodic signal S1 is maintained at a high level during the period from time t15 to t18, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t15 to t18, the potential Pn is maintained at the potential at time t15, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t10 to t12, the detection signal S8 at a high level continues to be output in response to the input signal Sd at a high level immediately before time t14.

[0065] At times t16 and t17, photons are incident on the SPAD 510. However, the SPAD 510 is already performing avalanche multiplication at time t15. Therefore, the potential Pn, the input signal Sd, and the detection signal S8 do not change due to the incidence of photons at times t16 and t17.

[0066] At time t18, the period P4 ends and the period P5 starts. At time t18, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from the off state to the on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t18, a high-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd. Also, at time t18, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t18 is at a high level. Therefore, the counting unit 560 increments the count value.

[0067] Since the periodic signal S1 is maintained at a low level during the period from time t18 to t19, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t18 to t19. However, since the potential Pn does not exceed the logic threshold Th during the period from time t18 to t19, the input signal Sd is maintained at a high level. Therefore, during the period from time t18 to t19, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0068] At time t19, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from high level to low level. Since the control signal Se is at high level at time t19, the detection signal S8 transitions from high level to low level in response to the input signal Sd.

[0069] Since the periodic signal S1 is maintained at a low level during the period from time t19 to t20, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t19 to t20. The input signal Sd is maintained at a low level. Therefore, during the period from time t19 to t20, the detection signal S8 is maintained at a low level in response to the input signal Sd at a low level.

[0070] At time t20, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0071] Since the periodic signal S1 is maintained at a high level during the period from time t20 to t21, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t20 to t21, the potential Pn is maintained at the potential at time t20, and the input signal Sd is maintained at a low level. Furthermore, since the control signal Se is maintained at a low level during the period from time t20 to t21, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t20.

[0072] At time t21, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logical threshold Th, and the input signal Sd transitions from low level to high level. Meanwhile, since the periodic signal S1 is at a high level at time t21, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 does not change in response to the input signal Sd and is maintained at a low level.

[0073] Since the periodic signal S1 is maintained at a high level during the period from time t21 to t22, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t21 to t22, the potential Pn is maintained at the potential at time t21, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t21 to t22, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t20.

[0074] At time t22, the period P5 ends and at the same time, the period P6 starts. At time t22, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t22, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd. Also, at time t22, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t22 is at low level. Therefore, the counting unit 560 does not increment the count value.

[0075] During the period from time t22 to t23, the periodic signal S1 is maintained at a low level, so the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t22 to t23. However, during the period from time t22 to t23, the potential Pn does not exceed the logic threshold Th, so the input signal Sd is maintained at a high level. Therefore, during the period from time t22 to t23, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0076] At time t23, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from high level to low level. Since the control signal Se is at high level at time t23, the detection signal S8 transitions from high level to low level in response to the input signal Sd.

[0077] Since the periodic signal S1 is maintained at a low level during the period from time t23 to t24, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t23 to t24. The input signal Sd is maintained at a low level. Therefore, during the period from time t23 to t24, the detection signal S8 is maintained at a low level in response to the low-level input signal Sd.

[0078] At time t24, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0079] Since the periodic signal S1 is maintained at a high level during the period from time t24 to t25, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t24 to t25, the potential Pn is maintained at the potential at time t24, and the input signal Sd is maintained at a low level. Furthermore, since the control signal Se is maintained at a low level during the period from time t24 to t25, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t24.

[0080] At time t25, the period P6 ends and at the same time, the period P7 starts. At time t25, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. Also, at time t25, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd. Also, at time t25, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t25 is at low level. Therefore, the counting unit 560 does not increment the count value.

[0081] Since the periodic signal S1 is maintained at a low level during the period from time t25 to t26, the switch section 520 is maintained in an on state. Therefore, the SPAD 510 can be charged during the period from time t25 to t26, but the SPAD 510 does not perform avalanche multiplication operation during the period P6. Therefore, the potential Pn is maintained at the potential at time t25 during the period from time t25 to t26. Therefore, the input signal Sd is maintained at a low level. Therefore, the detection signal S8 is maintained at a low level during the period from time t25 to t26 in response to the input signal Sd at a low level.

[0082] At time t26, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logical threshold Th, and the input signal Sd transitions from low level to high level at time t26. Since the periodic signal S1 is at low level at time t26, a high level control signal Se is input to the control node E of the D latch circuit 583. Therefore, at time t26, the detection signal S8 transitions from low level to high level in response to the high level input signal Sd.

[0083] Note that photons are incident on the SPAD 510 between time t26 and time t27. However, the incidence of the photons at time t26 has already caused the potential Pn to be less than the logic threshold Th. Therefore, the incidence of the photons between time t26 and time t27 does not cause the input signal Sd and the detection signal S8 to change.

[0084] Since the periodic signal S1 is maintained at a low level during the period from time t26 to t27, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged again during the period from time t26 to t27. However, since the potential Pn does not exceed the logic threshold Th during the period from time t26 to t27, the input signal Sd is maintained at a high level. Therefore, during the period from time t26 to t27, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0085] At time t27, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0086] Since the periodic signal S1 is maintained at a high level during the period from time t27 to t28, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t27 to t28, the potential Pn is maintained at the potential at time t27, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t27 to t28, the detection signal S8 at a high level continues to be output in response to the input signal Sd at a high level immediately before time t27.

[0087] At time t28, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. The potential Pn drops in response to the avalanche multiplication operation of the SPAD 510. In the period from time t27 to t28, the potential Pn is less than the logic threshold Th, so the input signal Sd is maintained at a high level even after the incidence of the photon at t28. Furthermore, since the periodic signal S1 is at a high level at time t28, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd immediately before time t27.

[0088] Since the periodic signal S1 is maintained at a high level during the period from time t28 to t31, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t28 to t31, the potential Pn is maintained at the potential at time t28, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t28 to t31, the detection signal S8 at a high level continues to be output in response to the input signal Sd at a high level immediately before time t27.

[0089] At times t29 and t30, photons are incident on the SPAD 510. However, the SPAD 510 is already performing avalanche multiplication due to the incidence of the photon at time t28. Therefore, the potential Pn, the input signal Sd, and the detection signal S8 do not change due to the incidence of the photon at times t29 and t30.

[0090] At time t31, the period P7 ends and at the same time, the period P8 starts. At time t31, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from the off state to the on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t31, a high-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd. Also, at time t31, an increment process is performed in the counting unit 560. The detection signal S8 output from the circuit unit 530 immediately before time t31 is at a high level. Therefore, the counting unit 560 increments the count value.

[0091] During the period from time t31 to t32, the periodic signal S1 is maintained at a low level, so the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t31 to t32. However, during the period from time t31 to t32, the potential Pn does not exceed the logic threshold Th, so the input signal Sd is maintained at a high level. Therefore, during the period from time t31 to t32, the detection signal S8 is maintained at a high level in response to the high-level input signal Sd.

[0092] At time t32, the potential Pn exceeds the logic threshold Th, and the input signal Sd transitions from high level to low level. Since the control signal Se is at high level at time t32, the detection signal S8 transitions from high level to low level in response to the input signal Sd.

[0093] Since the periodic signal S1 is maintained at a low level during the period from time t32 to t33, the switch unit 520 is maintained in an on state and the control signal Se is maintained at a high level. The SPAD 510 is charged during the period from time t32 to t33. The input signal Sd is maintained at a low level. Therefore, during the period from time t32 to t33, the detection signal S8 is maintained at a low level in response to the input signal Sd at a low level.

[0094] At time t33, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switch unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. Also, the control signal Se transitions from a high level to a low level.

[0095] Since the periodic signal S1 is maintained at a high level during the period from time t33 to t34, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t33 to t34, the potential Pn is maintained at the potential at time t20, and the input signal Sd is maintained at a low level. Furthermore, since the control signal Se is maintained at a low level during the period from time t33 to t34, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t33.

[0096] At time t34, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logical threshold Th, and the input signal Sd transitions from low level to high level. Meanwhile, since the periodic signal S1 is at a high level at time t34, a low-level control signal Se is input to the control node E of the D latch circuit 583. Therefore, the detection signal S8 does not change in response to the input signal Sd and is maintained at a low level.

[0097] Since the periodic signal S1 is maintained at a high level during the period from time t34 to t35, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t34 to t35, the potential Pn is maintained at the potential at time t34, and the input signal Sd is maintained at a high level. Furthermore, since the control signal Se is maintained at a low level during the period from time t34 to t35, the detection signal S8 at a low level continues to be output in response to the input signal Sd at a low level immediately before time t33.

[0098] 4, when a high-level setting signal S4 is input to the pixel unit 50, the circuit unit 530 generates a high-level detection signal based on a change in the voltage of the SPAD 510 during a period when the switch unit 520 is in an on-state. That is, when a high-level setting signal S4 is input to the pixel unit 50, the circuit unit 530 outputs a detection signal based on the voltage of the SPAD 510 during a period when the switch unit 520 is in an on-state during a period when the switch unit 520 is in an on-state and an off-state. On the other hand, when a high-level setting signal S4 is input to the pixel unit 50, the circuit unit 530 does not generate a high-level detection signal based on a change in the voltage of the SPAD 510 during a period when the switch unit 520 is in an off-state. That is, when a high-level setting signal S4 is input to the pixel unit 50, only photons that are incident during a period when the switch unit 520 is in an on-state are subject to incrementing of the count value. Therefore, the counter 560 increments the count value based on the photons incident on the SPAD 510 at time t14 in the period P4 and the photons incident on the SPAD 510 at time t26 in the period P7. On the other hand, photons incident during the period in which the switch unit 520 is in the off state are not subject to increment of the count value. That is, the counter 560 does not increment the count value based on the photons incident on the SPAD 510 at time t6 in the period P2, times t10 and t11 in the period P3, times t15, t16, and t17 in the period P4, time t21 in the period P5, times t28, t29, and t30 in the period P7, and time t34 in the period P8. Therefore, the detection period Pd of photons by the pixel unit 50 when the setting signal S4 at a high level is input to the pixel unit 50 is the shaded portion shown in FIG. 4 corresponding to the period in which the periodic signal S1 is at a low level. During period P7, photons are incident on the SPAD 510 twice while the periodic signal S1 is at a low level, but the counter 560 does not increment the count value twice, but instead increments the count value by only one.

[0099] The photoelectric conversion device 100 according to the present disclosure can limit the photon detection period during one period of the periodic signal S1 when a high-level setting signal S4 is input to the pixel unit 50. Therefore, in shooting under high illuminance using an imaging system including the photoelectric conversion device 100, the number of detections of photons incident on the SPAD 510 can be reduced without adding a separate neutral density filter, a period for suppressing photon detection, a clock for dimming, or the like.

[0100] FIG. 5 is a timing diagram showing the operation of the counting unit in the first embodiment. Each period P11 to P18 corresponds to one period of the periodic signal S1. In the periods P11 to P18, a low-level setting signal S4 is input to the pixel unit 50. That is, in the periods P11 to P18, the detection signal S9 from the circuit unit 540 is selected by the selection unit 550. Therefore, the detection signal S9 is sampled in each period P11 to P18 shown in FIG. 5. FIG. 5 shows the timing Tin of the incidence of photons to the SPAD 510 in the periods P11 to P18, the periodic signal S1 input to the gate of the switch unit 520, the potential Pn of the node N, the photon detection period Pd in ​​the periods P11 to P18, the detection signal S9 from the circuit unit 540, and a timing diagram of the increment operation INC by the counting unit 560.

[0101] At time t40 before period P11, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn of the node N becomes less than the logic threshold Th, and a high-level signal is input to the input node In2 of the AND gate 584 via the NOT gate 581. Furthermore, since the periodic signal S1 is at a high level at time t40, a high-level signal is input to the input node In1 of the AND gate 584. Therefore, the detection signal S9 from the circuit unit 540 transitions from a low level to a high level based on the high-level input signals to the input nodes In1 and In2.

[0102] Since the periodic signal S1 is at a high level from time t40 to the start time t41 of the period P1, the switch section 520 is maintained in an off state. Therefore, during the period from time t40 to t41, the SPAD 510 is not charged, the potential Pn is maintained at a low level, and the input signal to the input node In2 is maintained at a high level. Also, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, the detection signal S9 is maintained at a high level.

[0103] At time t41, the periodic signal S1 transitions from a high level to a low level, and the switch unit 520 switches from an off state to an on state. When the switch unit 520 turns on, charging of the SPAD 510 begins. Also, at time t41, the input signal to the input node In1 transitions from a high level to a low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from a high level to a low level based on the low-level input signal to the input node In1. Furthermore, at time t41, an increment process is executed in the counter unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t41 is at a high level. Therefore, the counter unit 560 increments the count value.

[0104] Since the periodic signal S1 is maintained at a low level during the period from time t41 to t42, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. However, since the potential Pn does not exceed the logic threshold Th during the period from time t41 to t42, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t41 to t42, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0105] At time t42, the potential Pn exceeds the logic threshold Th, and the input signal to the input node In2 transitions from high to low. The detection signal S9 is maintained at low level based on the low level input signals to the input nodes In1 and In2.

[0106] Since the periodic signal S1 is maintained at a low level during the period from time t42 to t43, the switch section 520 is maintained in an on state, and charging of the SPAD 510 continues. The input signal to the input node In2 is maintained at a low level in accordance with the potential Pn. Furthermore, the input signal to the input node In1 is maintained at a low level in accordance with the periodic signal S1. Therefore, during the period from time t42 to t43, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2.

[0107] At time t43, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. In other words, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t43, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t43, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0108] Since the periodic signal S1 is maintained at a high level during the period from time t43 to t44, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t43 to t44, the potential Pn is maintained at the potential at time t43, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t43 to t44, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0109] At time t44, the period P11 ends, and at the same time, the period P12 starts. At time t44, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from the off state to the on state. At time t44, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. At time P11, the SPAD 510 does not perform avalanche multiplication operation, so the input signal to the input node In2 is maintained at a low level. Therefore, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2. At time t44, the counting unit 560 executes an increment process. The detection signal S9 output from the circuit unit 540 immediately before time t44 is at a low level. Therefore, the counting unit 560 does not increment the count value.

[0110] Since the periodic signal S1 is maintained at a low level during the period from time t44 to t45, the switch unit 520 is maintained in an on state. Therefore, the SPAD 510 can be charged during the period from time t44 to t45, but the SPAD 510 does not perform avalanche multiplication operation during the period P11. Therefore, the potential Pn is maintained at the potential at time t44 during the period from time t44 to t45. Therefore, the input signal to the input node In2 is maintained at a low level. Also, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2 during the period from time t44 to t45.

[0111] At time t45, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t45, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t45, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0112] Since the periodic signal S1 is maintained at a high level during the period from time t45 to t46, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t45, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t45 to t46, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0113] At time t46, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and a high-level signal is input to the input node In2. Furthermore, since the periodic signal S1 is at a high level at time t46, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 transitions from a low level to a high level based on the high-level input signals to the input nodes In1 and In2.

[0114] Since the periodic signal S1 is maintained at a high level during the period from time t46 to t47, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t46, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t46 to t47, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0115] At time t47, the period P12 ends and at the same time, the period P13 starts. At time t47, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t47, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from high level to low level based on the low level input signal to the input node In1. Furthermore, at time t47, an increment process is executed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t47 is at high level. Therefore, the counting unit 560 increments the count value.

[0116] Since the periodic signal S1 is maintained at a low level during the period from time t47 to t48, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. However, since the potential Pn does not exceed the logic threshold Th during the period from time t47 to t48, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t47 to t48, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0117] At time t48, the potential Pn exceeds the logic threshold Th, and the input signal to the input node In2 transitions from high to low. The detection signal S9 is maintained at low level based on the low level input signals to the input nodes In1 and In2.

[0118] Since the periodic signal S1 is maintained at a low level during the period from time t48 to t49, the switch section 520 is maintained in an on state, and charging of the SPAD 510 continues. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Furthermore, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t48 to t49, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2.

[0119] At time t49, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. In other words, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t49, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t49, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0120] During the period from time t49 to t50, the periodic signal S1 is maintained at a high level, and the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t49, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t49 to t50, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0121] At time t50, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and a high-level signal is input to the input node In2. Furthermore, since the periodic signal S1 is at a high level at time t50, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 transitions from a low level to a high level based on the high-level input signals to the input nodes In1 and In2.

[0122] Since the periodic signal S1 is maintained at a high level during the period from time t50 to t52, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t50, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t50 to t52, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0123] At time t51, a photon is incident on the SPAD 510. However, the SPAD 510 is already performing an avalanche multiplication operation due to the incidence of the photon at time t50. Therefore, the potential Pn and the detection signal S9 do not change due to the incidence of the photon at time t51.

[0124] At time t52, the period P13 ends, and at the same time, the period P14 starts. At time t52, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t52, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from high level to low level based on the low level input signal to the input node In1. Furthermore, at time t52, an increment process is executed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t52 is at high level. Therefore, the counting unit 560 increments the count value.

[0125] Since the periodic signal S1 is maintained at a low level during the period from time t52 to t53, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. Before time t53 is reached, the potential Pn exceeds the logic threshold Th and the input signal to the input node In2 transitions from a high level to a low level. Meanwhile, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. During the period from time t52 to t53, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In1.

[0126] At time t53, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and the input signal to the input node In2 transitions from low level to high level. Meanwhile, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, at time t53, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In1.

[0127] Since the periodic signal S1 is maintained at a low level during the period from time t53 to t54, the switch unit 520 is maintained in an on state, and the SPAD 510 is charged again. However, since the potential Pn does not exceed the logic threshold Th during the period from time t53 to t54, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t53 to t54, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0128] At time t54, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a high level in response to the potential Pn. Also, at time t54, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. Therefore, at time t54, the detection signal S9 transitions from a low level to a high level based on the high level input signals to the input nodes In1 and In2.

[0129] Since the periodic signal S1 is maintained at a high level during the period from time t54 to t55, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t54, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t54 to t55, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0130] At time t55, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. The potential Pn drops in response to the avalanche multiplication operation of the SPAD 510. Since the potential Pn is less than the logic threshold Th during the period from time t54 to t55, the input signal to the input node In2 is maintained at a high level even after the incidence of the photon at time t55. Furthermore, since the periodic signal S1 is at a high level at time t55, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0131] Since the periodic signal S1 is maintained at a high level during the period from time t55 to t58, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t55, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t55 to t58, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0132] At times t56 and t57, photons are incident on the SPAD 510. However, the SPAD 510 is already performing avalanche multiplication due to the incidence of the photon at time t55. Therefore, the potential Pn and the detection signal S9 do not change due to the incidence of the photon at times t56 and t57.

[0133] At time t58, the period P14 ends, and at the same time, the period P15 starts. At time t58, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t58, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from high level to low level based on the low level input signal to the input node In1. Furthermore, at time t58, an increment process is executed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t58 is at high level. Therefore, the counting unit 560 increments the count value.

[0134] Since the periodic signal S1 is maintained at a low level during the period from time t58 to t59, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. However, since the potential Pn does not exceed the logic threshold Th during the period from time t58 to t59, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t58 to t59, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0135] At time t59, the potential Pn exceeds the logic threshold Th, and the input signal to the input node In2 transitions from high to low. The detection signal S9 is maintained at low level based on the low level input signals to the input nodes In1 and In2.

[0136] Since the periodic signal S1 is maintained at a low level during the period from time t59 to t60, the switch section 520 is maintained in an on state, and charging of the SPAD 510 continues. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Furthermore, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t59 to t60, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2.

[0137] At time t60, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. In other words, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t60, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t60, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0138] Since the periodic signal S1 is maintained at a high level during the period from time t60 to t61, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t60, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t60 to t61, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0139] At time t61, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and a high-level signal is input to the input node In2. Furthermore, since the periodic signal S1 is at a high level at time t61, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 transitions from a low level to a high level based on the high-level input signals to the input nodes In1 and In2.

[0140] Since the periodic signal S1 is maintained at a high level during the period from time t61 to t62, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t61, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t61 to t62, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0141] At time t62, the period P15 ends and at the same time, the period P16 starts. At time t62, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t62, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from high level to low level based on the low level input signal to the input node In1. Furthermore, at time t62, an increment process is executed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t62 is at high level. Therefore, the counting unit 560 increments the count value.

[0142] Since the periodic signal S1 is maintained at a low level during the period from time t62 to t63, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. However, since the potential Pn does not exceed the logic threshold Th during the period from time t62 to t63, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t62 to t63, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0143] At time t63, the potential Pn exceeds the logic threshold Th, and the input signal to the input node In2 transitions from high to low. The detection signal S9 is maintained at low level based on the low level input signals to the input nodes In1 and In2.

[0144] Since the periodic signal S1 is maintained at a low level during the period from time t63 to t64, the switch section 520 is maintained in an on state, and charging of the SPAD 510 continues. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Furthermore, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t63 to t64, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2.

[0145] At time t64, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. In other words, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t64, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t64, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0146] Since the periodic signal S1 is maintained at a high level during the period from time t64 to t65, the switch unit 520 is maintained in an off state. Therefore, the SPAD 510 is not charged during the period from time t64 to t65, the potential Pn is maintained at the potential at time t64, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t64 to t65, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0147] At time t65, the period P16 ends, and at the same time, the period P17 starts. At time t65, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from the off state to the on state. Also, at time t65, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Also, since the SPAD 510 does not perform avalanche multiplication operation during the period P16, the input signal to the input node In2 is maintained at a low level. Therefore, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2. Furthermore, at time t65, an increment process is performed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t65 is at a low level. Therefore, the counting unit 560 does not increment the count value.

[0148] Since the periodic signal S1 is maintained at a low level during the period from time t65 to t66, the switch unit 520 is maintained in an on state. Therefore, the SPAD 510 can be charged during the period from time t65 to t66, but the SPAD 510 does not perform avalanche multiplication operation during the period P16. Therefore, the potential Pn is maintained at the potential at time t65 during the period from time t65 to t66. Therefore, the input signal to the input node In2 is maintained at a low level. Also, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2 during the period from time t65 to t66.

[0149] At time t66, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and the input signal to the input node In2 transitions from low level to high level. Meanwhile, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, at time t66, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In1.

[0150] Since the periodic signal S1 is maintained at a low level during the period from time t66 to t67, the switch unit 520 is maintained in an on state, and the SPAD 510 is charged again. However, since the potential Pn does not exceed the logic threshold Th during the period from time t66 to t67, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t66 to t67, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0151] Note that between time t66 and time t67, a photon is incident on the SPAD 510. However, the incidence of the photon at time t66 has already caused the potential Pn to be less than the logic threshold Th. Therefore, the input signal to the input node In2 and the detection signal S9 do not change due to the incidence of the photon between time t26 and time t27.

[0152] At time t67, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. That is, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a high level in response to the potential Pn. Also, at time t67, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. Therefore, at time t67, the detection signal S9 transitions from a low level to a high level based on the high level input signals to the input nodes In1 and In2.

[0153] Since the periodic signal S1 is maintained at a high level during the period from time t67 to t68, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t67, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t67 to t68, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0154] At time t68, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. The potential Pn drops in response to the avalanche multiplication operation of the SPAD 510. Since the potential Pn is less than the logic threshold Th during the period from time t67 to t68, the input signal to the input node In2 is maintained at a high level even after the incidence of the photon at time t68. Furthermore, since the periodic signal S1 is at a high level at time t68, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0155] Since the periodic signal S1 is maintained at a high level during the period from time t68 to t71, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t68, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t68 to t71, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0156] At times t69 and t70, photons are incident on the SPAD 510. However, the SPAD 510 is already performing avalanche multiplication due to the incidence of the photon at time t68. Therefore, the potential Pn and the detection signal S9 do not change due to the incidence of the photon at times t69 and t70.

[0157] At time t71, the period P17 ends and at the same time, the period P18 starts. At time t71, the periodic signal S1 transitions from high level to low level, and the switch unit 520 switches from off state to on state. When the switch unit 520 turns on, charging of the SPAD 510 starts. Also, at time t71, the input signal to the input node In1 transitions from high level to low level in response to the periodic signal S1. Therefore, the detection signal S9 transitions from high level to low level based on the low level input signal to the input node In1. Furthermore, at time t71, an increment process is executed in the counting unit 560. The detection signal S9 output from the circuit unit 540 immediately before time t71 is at high level. Therefore, the counting unit 560 increments the count value.

[0158] Since the periodic signal S1 is maintained at a low level during the period from time t71 to t72, the switch unit 520 is maintained in an on state and the SPAD 510 is charged. However, since the potential Pn does not exceed the logic threshold Th during the period from time t71 to t72, the input signal to the input node In2 is maintained at a high level. On the other hand, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t71 to t72, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In1.

[0159] At time t72, the potential Pn exceeds the logic threshold Th, and the input signal to the input node In2 transitions from high to low. The detection signal S9 is maintained at low level based on the low level input signals to the input nodes In1 and In2.

[0160] Since the periodic signal S1 is maintained at a low level during the period from time t72 to t73, the switch section 520 is maintained in an on state, and charging of the SPAD 510 continues. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, the input signal to the input node In1 is maintained at a low level in response to the periodic signal S1. Therefore, during the period from time t72 to t73, the detection signal S9 is maintained at a low level based on the low-level input signals to the input nodes In1 and In2.

[0161] At time t73, the periodic signal S1 transitions from a low level to a high level, and the switch unit 520 switches from an on state to an off state. The switching unit 520 switching to the off state stops charging the SPAD 510. In other words, the rise in the potential Pn stops. The input signal to the input node In2 is maintained at a low level in response to the potential Pn. Also, at time t73, the input signal to the input node In1 transitions from a low level to a high level in response to the periodic signal S1. At time t73, the detection signal S9 is maintained at a low level based on the low level input signal to the input node In2.

[0162] Since the periodic signal S1 is maintained at a high level during the period from time t73 to t74, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t73, and the input signal to the input node In2 is maintained at a low level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. During the period from time t73 to t74, the detection signal S9 is maintained at a low level based on the low-level input signal to the input node In2.

[0163] At time t74, a photon is incident on the SPAD 510. The incidence of the photon causes avalanche multiplication in the SPAD 510. In response to the avalanche multiplication operation of the SPAD 510, the potential Pn becomes less than the logic threshold Th, and a high-level signal is input to the input node In2. Furthermore, since the periodic signal S1 is at a high level at time t74, a high-level signal is input to the input node In1. Therefore, the detection signal S9 from the circuit unit 540 transitions from a low level to a high level based on the high-level input signals to the input nodes In1 and In2.

[0164] Since the periodic signal S1 is maintained at a high level during the period from time t74 to t75, the switch section 520 is maintained in an off state. Therefore, the potential Pn is maintained at the potential at time t74, and the input signal to the input node In2 is maintained at a high level. Furthermore, the input signal to the input node In1 is maintained at a high level in response to the periodic signal S1. Therefore, during the period from time t74 to t75, the detection signal S9 is maintained at a high level based on the high-level input signals to the input nodes In1 and In2.

[0165] As shown in Fig. 5, when a low-level setting signal S4 is input to the pixel unit 50, the circuit unit 540 generates a high-level detection signal based on the change in the voltage of the SPAD 510 during the period when the switch unit 520 is in the on state and the off state. That is, the circuit unit 540 outputs a detection signal based on the voltage of the SPAD 510 during the period when the switch unit 520 is in the on state and the off state during the period when the switch unit 520 is in the off state. Therefore, when a low-level setting signal S4 is input to the pixel unit 50, both photons that are incident during the period when the switch unit 520 is in the on state and photons that are incident during the period when the switch unit 520 is in the off state are subject to increment of the count value. Therefore, the detection period Pd of photons by the pixel unit 50 when a low-level setting signal S4 is input to the pixel unit 50 is the shaded portion shown in Fig. 5, which corresponds to the entire period of the periodic signal S1. In periods P13, P14, and P17, photons are incident on the SPAD 510 multiple times during one period of the periodic signal S1, but the counter 560 does not increment the count value by the corresponding number of times, but only increments the count value by one.

[0166] The photoelectric conversion device 100 according to the present disclosure can detect photons during the entire period of the periodic signal S1 when a low-level setting signal S4 is input to the pixel unit 50. Therefore, in shooting under low illuminance using an imaging system including the photoelectric conversion device 100, the number of detections of photons incident on the SPAD 510 can be increased. Therefore, the photoelectric conversion device 100 according to the present disclosure can provide a high-gradation image even in shooting under low illuminance.

[0167] According to this embodiment, the SPAD 510 as the detection unit is charged, and photons are detected by utilizing the current flowing in response to the incidence of photons. After a photon is incident, the SPAD 510 needs to be charged again to detect the next incidence. A count value indicating the number of times photons are detected becomes the pixel value of the pixel unit 50. As shown in FIG. 4 and FIG. 5, even if a plurality of photons are incident during one period of the periodic signal S1, the count value is increased by 1 regardless of the number of times the photons are incident. For example, under high illuminance, two or more photons may be incident during one period of the periodic signal S1, but the increase in the pixel value (count value) is saturated by the incidence of the first photon in that one period. Therefore, it may not be possible to obtain sufficient gradation for an image captured under high illuminance. If sufficient gradation cannot be obtained, the captured image may be blown out, and the image quality of the captured image may be deteriorated, such as the subject being unable to be identified.

[0168] In order to avoid saturation of the increase in pixel values ​​(count values), it is conceivable to increase the frequency of the periodic signal S1 to shorten the period. However, increasing the frequency of the periodic signal S1 increases the power consumption of an imaging system including a photoelectric conversion device and the amount of heat generated by the imaging system. Furthermore, in order to expand the bit width of the counting section, more circuits are required, which may cause a problem of increasing manufacturing costs. In addition, in order to avoid saturation of the increase in pixel values, it is conceivable to insert a neutral density filter or the like into the path of the incidence of photons to physically reduce the amount of incident photons. However, in order to insert a neutral density filter or the like, a separate mechanism for inserting and removing the neutral density filter into and from the imaging system is required, making it difficult to miniaturize the imaging system. In addition, there is a problem that the speed of response to changes in illuminance is slowed down due to the operation of inserting and removing the neutral density filter.

[0169] As shown in Fig. 4 and Fig. 5, the photoelectric conversion device 100 according to the present disclosure can control the detection period of photons during one period of the periodic signal S1 by switching the setting signal S4. That is, the photoelectric conversion device 100 according to the present disclosure can control the number of times that photons incident on the SPAD 510 are detected during one period of the periodic signal S1 by the setting signal S4. Therefore, the photoelectric conversion device according to the present disclosure can improve the image quality under both high and low illuminance without increasing the clock frequency to reduce the incident photons or adding a separate neutral density filter. That is, according to the present disclosure, it is possible to provide a photoelectric conversion device that has a high response speed to changes in illuminance and can easily and simply change the illuminance conditions at which the photon count value is saturated.

[0170] [Second embodiment] The operation of the imaging system 110 according to this embodiment will be described with reference to Fig. 1 and Figs. 6 to 9. Fig. 6 is a flowchart showing the operation of the imaging system 110 in the second embodiment. The imaging system 110 is a light detection system that captures images using different operation modes under high-illuminance and low-illuminance environments. The operation of the imaging system 110 based on pixel values ​​obtained via the photoelectric conversion device 100 will be described below.

[0171] In step S101, the overall control / arithmetic unit 116 transmits a mode signal S6 to the register block 40 of the photoelectric conversion device 100. The register block 40 transmits a setting signal S4 to the selection unit 550 of the pixel unit 50 based on the mode signal S6. The pixel unit 50 operates in a first operation mode suitable for shooting in a high-illuminance environment or a second operation mode suitable for shooting in a low-illuminance environment based on the setting signal S4. Note that either the first operation mode or the second operation mode may be set as an initial setting when the imaging system 110 is started up.

[0172] In step S102, the overall control / calculation unit 116 acquires histogram information generated by the signal processing unit 114 based on the pixel signal from the photoelectric conversion device 100. In this embodiment, the acquired histogram information is the total number of pixel units 50 for each pixel value obtained from the photoelectric conversion device 100 in frame F (i.e., the number of times each of the multiple count values ​​is output). In a high-illuminance environment, for example, a histogram as shown in FIG. 7 is obtained. That is, in a high-illuminance environment, the number of pixels peaks at a pixel value (count value) greater than a threshold H (first threshold), and the corresponding number of pixels tends to decrease as the pixel value decreases. In a low-illuminance environment, for example, a histogram as shown in FIG. 8 is obtained. That is, in a low-illuminance environment, the number of pixels peaks at a pixel value (count value) near a threshold L (second threshold), and the corresponding number of pixels tends to decrease as the pixel value increases.

[0173] In step S103, the overall control and calculation unit 116 judges whether or not to continue the imaging process by the imaging system 110. Specifically, the overall control and calculation unit 116 receives an instruction from an external device such as a computer via the external I / F unit 120. If the instruction from the external device indicates not to continue the process (NO in step S103), the overall control and calculation unit 116 ends this flowchart. If the instruction from the external device indicates to continue the process (YES in step S103), the overall control and calculation unit 116 advances the process to step S104. In the processes from step S104 onwards, the overall control and calculation unit 116 determines a setting signal S4 for a predetermined frame (e.g., frame F+3) based on histogram information for frame F.

[0174] In step S104, the overall control and calculation unit 116 determines whether or not the setting signal S4 input from the register block 40 to the pixel unit 50 is at a low level. If it is determined that the setting signal S4 is at a low level (YES in step S104), the overall control and calculation unit 116 determines that the imaging system 110 is operating in the second operation mode suitable for shooting in a low-illumination environment, and proceeds to step S105.

[0175] In step S105, the overall control and calculation unit 116 judges whether or not to change the operation mode of the imaging system 110 based on the histogram information in the frame F. Specifically, when the overall control and calculation unit 116 judges that the number of pixel units 50 showing pixel values ​​(count values) equal to or greater than the threshold H (first threshold value) is equal to or greater than a predetermined number NH (first number) (YES in step S105), the overall control and calculation unit 116 changes the setting signal S4 output from the register block 40 to a high level in step S106. That is, the overall control and calculation unit 116 changes the operation mode of the imaging system 110 to a first operation mode suitable for photographing in a high-illumination environment, and returns the process to step S102. On the other hand, when the overall control and calculation unit 116 judges that the number of pixel units 50 showing pixel values ​​(count values) equal to or greater than the threshold H (first threshold value) is less than the predetermined number NH (first number) (NO in step S105), the overall control and calculation unit 116 maintains the setting signal S4 output from the register block 40 at a low level. That is, the overall control / calculation unit 116 maintains the operation mode of the imaging system 110 in the second operation mode suitable for imaging in a low-illumination environment, and returns the process to step S102.

[0176] In step S104, if the overall control and calculation unit 116 determines that the setting signal S4 input from the register block 40 to the pixel unit 50 is at a high level (NO in step S104), the overall control and calculation unit 116 determines that the imaging system 110 is operating in the first operating mode suitable for imaging in a high-illumination environment, and proceeds to step S107.

[0177] In step S107, the overall control and calculation unit 116 judges whether or not to change the operation mode of the imaging system 110 based on the histogram information in the frame F. Specifically, when the overall control and calculation unit 116 judges that the number of pixel units 50 showing pixel values ​​(count values) equal to or less than the threshold L (equal to or less than the second threshold) is equal to or more than a predetermined number NL (equal to or more than the second number) (YES in step S107), the overall control and calculation unit 116 changes the setting signal S4 output from the register block 40 to a low level in step S108. That is, the overall control and calculation unit 116 changes the operation mode of the imaging system 110 to a second operation mode suitable for shooting in a low-illumination environment, and returns the process to step S102. On the other hand, when the overall control and calculation unit 116 judges that the number of pixel units 50 showing pixel values ​​(count values) equal to or less than the threshold L (equal to or less than the second threshold) is less than the predetermined number NL (equal to or less than the second number) (NO in step S107), the overall control and calculation unit 116 maintains the setting signal S4 output from the register block 40 at a high level. That is, the overall control / calculation unit 116 maintains the operation mode of the imaging system 110 in the first operation mode suitable for imaging in a high-illumination environment, and returns the process to step S102.

[0178] In this embodiment, the overall control and calculation unit 116 selects the detection signal S8 generated by the circuit unit 530 when the number of pixels outputting a pixel value (count value) equal to or greater than a threshold H (first threshold) is equal to or greater than a predetermined number NH (first number). Also, the overall control and calculation unit 116 selects the detection signal S9 generated by the circuit unit 540 when the number of pixels outputting a pixel value (count value) equal to or less than a threshold L (second threshold) that is smaller than the threshold H (first threshold) is equal to or greater than a predetermined number NL (second number). That is, the selection of the detection signal S8 corresponds to switching to the first operation mode or maintaining the first operation mode, and the selection of the detection signal S9 corresponds to switching to the second operation mode or maintaining the second operation mode.

[0179] Fig. 9 is a timing diagram showing the operation of the imaging system in the second embodiment. In this embodiment, the photoelectric conversion device 100 detects photons and outputs a pixel signal in each period (frame) of periods P21 to P27 shown in Fig. 9. Also, as shown in Fig. 9, histogram information as shown in Figs. 7 and 8 is generated across two consecutive periods of the periods P21 to P27. Fig. 9 shows timing diagrams of the setting signal S4, the photon detection period PD, the pixel signal output period PO, and the histogram information generation period HG.

[0180] In period P21, the setting signal S4 is at a low level. Also, in period P21, the photoelectric conversion device 100 detects the incidence of photons related to frame F. In period P22, a pixel signal of frame F is output from the photoelectric conversion device 100 to the signal processing unit 114 based on the detected photons. In a period spanning from period P22 to period P23, the signal processing unit 114 generates histogram information related to frame F. The generated histogram information is the number of pixel units 50 that output each pixel value (each count value) obtained from the photoelectric conversion device 100 in frame F, as shown in FIG. 7, for example. The signal processing unit 114 transmits the generated histogram information to the overall control and calculation unit 116. Based on the transmitted histogram information, the overall control and calculation unit 116 determines that there are a predetermined number NH (first number) or more of pixels showing a large pixel value equal to or greater than a threshold H (first threshold). Based on this determination, the overall control / calculation unit 116 controls the register block 40 so as to set the setting signal S4 to a high level during the period P24.

[0181] Similarly, in period P22, the setting signal S4 is at a low level. Also, in period P22, the photoelectric conversion device 100 detects the incidence of photons related to frame F+1. In period P23, a pixel signal of frame F+1 is output from the photoelectric conversion device 100 to the signal processing unit 114 based on the detected photons. In the period spanning from period P23 to period P24, the signal processing unit 114 generates histogram information related to frame F+1. The generated histogram information is the number of pixel units 50 that output each pixel value (each count value) obtained from the photoelectric conversion device 100 in frame F+1, as shown in FIG. 7, for example. The signal processing unit 114 transmits the generated histogram information to the overall control and calculation unit 116. Based on the transmitted histogram information, the overall control and calculation unit 116 determines that the number of pixels showing a pixel value equal to or greater than a threshold H (first threshold) is equal to or greater than a predetermined number NH (first number). Based on this determination, the overall control / calculation unit 116 controls the register block 40 so as to set the setting signal S4 to a high level during the period P25.

[0182] Similarly, in period P23, the setting signal S4 is at a low level. Also, in period P23, the photoelectric conversion device 100 detects the incidence of a photon related to frame F+2. In period P24, a pixel signal of frame F+2 is output from the photoelectric conversion device 100 to the signal processing unit 114 based on the detected photon. In the period spanning from period P24 to period P25, the signal processing unit 114 generates histogram information related to frame F+2. The generated histogram information is the number of pixel units 50 that output each pixel value (each count value) obtained from the photoelectric conversion device 100 in frame F+2, as shown in FIG. 7, for example. The signal processing unit 114 transmits the generated histogram information to the overall control and calculation unit 116. Based on the transmitted histogram information, the overall control and calculation unit 116 determines that the number of pixels showing a pixel value equal to or greater than a threshold H (first threshold) is equal to or greater than a predetermined number NH (first number). Based on this determination, the overall control / calculation unit 116 controls the register block 40 so as to set the setting signal S4 to a high level during the period P26.

[0183] In period P24, the setting signal S4 is at a high level. Also, in period P24, the photoelectric conversion device 100 detects the incidence of a photon related to frame F+3. In period P25, a pixel signal of frame F+3 is output from the photoelectric conversion device 100 to the signal processing unit 114 based on the detected photon. In the period spanning from period P25 to period P26, the signal processing unit 114 generates histogram information related to frame F+3. The generated histogram information is the number of pixel units 50 that output each pixel value (each count value) obtained from the photoelectric conversion device 100 in frame F+3, as shown in FIG. 8, for example. The signal processing unit 114 transmits the generated histogram information to the overall control and calculation unit 116. Based on the transmitted histogram information, the overall control and calculation unit 116 determines that the number of pixels showing a pixel value equal to or less than a threshold value L (second threshold value) is equal to or more than a predetermined number NL (second number). Based on this determination, the overall control / calculation unit 116 controls the register block 40 to set the setting signal S4 to a low level during period P27. By processing frames F+4 and onwards in the same manner as frames F to F+3, the setting signal S4 is determined based on the histogram information obtained from each frame.

[0184] 7 and 8, the threshold value H and the threshold value L are illustrated as different values, but the threshold value H and the threshold value L may be the same value. When the overall control / calculation unit 116 determines that the number of pixels showing a pixel value (count value) equal to or greater than the threshold value H (equal to or greater than the first threshold value) is less than a predetermined number NH (less than the first number) and the number of pixels showing a pixel value (count value) equal to or less than the threshold value L (equal to or less than the second threshold value) is less than a predetermined number NL (less than the second number), the overall control / calculation unit 116 can control the register block 40 to continue to select the detection signal that was selected immediately before the determination (i.e., to maintain the operation mode immediately before the determination).

[0185] In this embodiment, the setting signal S4 to be output is determined based on histogram information indicating the number of pixel units 50 that output each pixel value (each count value). However, the method of determining the setting signal S4 to be output is not limited to this. For example, the imaging system 110 may further include a control circuit, and the control circuit may be configured to determine the setting signal S4 to be output based on one or more count values ​​obtained by the counting unit 560 of the photoelectric conversion device 100 within a predetermined period. That is, the detection signal S8 or the detection signal S9 may be selected by the selection unit 550 based on the count value or the integrated value of the count value obtained from the pixel unit 50 within a predetermined period. Specifically, the selection unit 550 may be controlled to select the detection signal S8 when the count value is equal to or greater than a first value, and to select the detection signal S9 when the count value is less than a second value. Here, the second value may be less than the first value, or may be the same as the first value. In addition, when it is determined that the count value is smaller than the first value and greater than the second value, the selection unit 550 may be controlled to continue to select the detection signal that was selected immediately before the determination.

[0186] Also, the imaging system 110 may have a device external to the imaging system 110 execute a judgment to switch the setting signal S4, receive the result of the judgment via the external I / F unit 120, and the overall control and calculation unit 116 may control the register block 40 that outputs the setting signal S4 based on the result of the judgment. Also, in this embodiment, the judgment to switch the setting signal S4 is made based on the pixel signal output from the photoelectric conversion device 100. However, the method of making the judgment to switch the setting signal S4 is not limited to this. For example, the imaging system 110 may measure the amount of incident photons (amount of incident light) via an external light amount sensor or the like, receive the result of the measurement, and the overall control and calculation unit 116 may control the register block 40 that outputs the setting signal S4 based on the result of the measurement. Also, in this embodiment, the setting signal S4 is determined based on histogram information of three frames before, but the operation of the imaging system 110 according to the present disclosure is not limited to this configuration. For example, a circuit that can reduce the delay of a signal may be used, or a measurement value of the amount of light via a separate light amount sensor or the like may be used. Using the circuit or a separate light amount sensor, the setting signal S4 may be determined based on histogram information (count value) of at least one frame before, and the detection signal may be selected based on the determined setting signal S4.

[0187] [Third embodiment] The configuration of the photoelectric conversion device in this embodiment will be described with reference to Figs. 10 to 13. The photoelectric conversion device has a SPAD pixel including an avalanche photodiode (hereinafter referred to as "APD"). The conductivity type of the charge used as the signal charge among the charge pairs generated in the APD is called the first conductivity type. The first conductivity type refers to a conductivity type in which charges of the same polarity as the signal charge are the majority carriers. The conductivity type opposite to the first conductivity type is called the second conductivity type. In the following, an example will be described in which the signal charge is an electron, the first conductivity type is an N type, and the second conductivity type is a P type, but the signal charge may be a hole, the first conductivity type is a P type, and the second conductivity type is an N type.

[0188] FIG. 10 is a schematic diagram of a photoelectric conversion device in this embodiment, showing the configuration of a stacked photoelectric conversion device 100. The photoelectric conversion device 100 includes a sensor substrate (first substrate) 1 and a circuit substrate (second substrate) 2 stacked on each other, and the sensor substrate 1 and the circuit substrate 2 are electrically connected to each other. The photoelectric conversion device in this embodiment is a back-illuminated photoelectric conversion device in which light is incident from a first surface of the sensor substrate 1 and the circuit substrate 2 is disposed on a second surface of the sensor substrate 1. The sensor substrate 1 has a first semiconductor layer having a photoelectric conversion element described later and a first wiring structure. The circuit substrate 2 has a second semiconductor layer having a circuit such as a signal processing unit described later and a second wiring structure. The second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer are stacked in this order to form the photoelectric conversion device 100.

[0189] In the following, the sensor substrate 1 and the circuit substrate 2 may be diced chips, but are not limited to chips. For example, each substrate may be a wafer. Also, each substrate may be stacked in a wafer state and then diced, or may be chipped and then stacked and bonded. The sensor substrate 1 is provided with a pixel region 1a, and the circuit substrate 2 is provided with a circuit region 2a that processes signals detected by the pixel region 1a.

[0190] 11 is a diagram showing an example of the arrangement of the sensor substrate 1. A plurality of pixels 10 each include an APD 11, and are arranged in a two-dimensional array in a plan view to form a pixel region 1a.

[0191] The pixel 10 is typically a pixel for forming an image, but when used for TOF (Time of Flight), it does not necessarily have to form an image. That is, the pixel 10 may be a pixel for measuring the time and amount of light that arrives.

[0192] FIG. 12 is a diagram showing an example of the arrangement of the circuit board 2. On the circuit board 2, a signal processing unit 20, a vertical scanning circuit 21, a readout circuit 23, a horizontal scanning circuit 27, an output calculation unit 24, a control pulse generating circuit 25, scanning lines 26, and signal lines 29 are formed. A circuit area 2a is arranged in an area overlapping the pixel area 1a of FIG. 11 in a plan view. Furthermore, the vertical scanning circuit 21, the readout circuit 23, the horizontal scanning circuit 27, the output calculation unit 24, and the control pulse generating circuit 25 are arranged so as to overlap an area between the end of the sensor substrate 1 and the end of the pixel area 1a of FIG. 11 in a plan view. That is, the sensor substrate 1 has the pixel area 1a and a non-pixel area arranged around the pixel area 1a, and the vertical scanning circuit 21, the readout circuit 23, the horizontal scanning circuit 27, the output calculation unit 24, and the control pulse generating circuit 25 are arranged in an area overlapping the non-pixel area in a plan view.

[0193] The signal processing unit 20 is electrically connected to the pixels 10 via connection wiring provided for each pixel 10, and is arranged in a two-dimensional array in a planar view, similar to the pixels 10. The signal processing unit 20 includes a binary counter that counts photons incident on the pixels 10.

[0194] The vertical scanning circuit 21 receives a control pulse supplied from a control pulse generating circuit 25, and supplies the control pulse to the signal processing unit 20 corresponding to the pixels 10 in each row via a scanning line 26. The vertical scanning circuit 21 can be composed of logic circuits such as a shift register and an address decoder.

[0195] The readout circuit 23 obtains the pulse count value of the digital signal from the signal processing unit 20 of each row via the signal line 29. Then, the readout circuit 23 outputs the output signal to a signal processing circuit (signal processing device) outside the photoelectric conversion device 100 via the output calculation unit 24. The readout circuit 23 may also have a function of a signal processing circuit that corrects the count value. The horizontal scanning circuit 27 receives a control pulse from the control pulse generation circuit 25, and causes the output calculation unit 24 to sequentially output the count value of each column in the readout circuit 23. As described later, when the pulse count value exceeds a threshold value, the output calculation unit 24 estimates an actual image signal (pulse count value) based on the time count value and threshold value included in the additional information, and replaces (extrapolates) the pulse count value with the estimated pulse count value. On the other hand, when the pulse count value is equal to or less than the threshold value, the pulse count value is output as it is as an image signal.

[0196] The output calculation unit 24 performs a predetermined process on the pulse count value read by the readout circuit 23 and outputs an image signal to the outside. As will be described later, the output calculation unit 24 can execute processes such as calculation of the pulse count value when the pulse count value exceeds a threshold value.

[0197] In FIG. 11, the photoelectric conversion elements in the pixel region 1a may be arranged one-dimensionally. The effect of the present disclosure can be achieved even in a configuration with one pixel 10, and the configuration with one pixel 10 may also be included in the present disclosure. In a photoelectric conversion device having a plurality of pixels 10, the effect of suppressing the circuit size according to this embodiment becomes even more remarkable. It is not necessary to provide one signal processing unit 20 for each pixel 10. For example, one signal processing unit 20 may be shared by a plurality of pixels 10, and signal processing may be performed sequentially.

[0198] Fig. 13 is a block diagram of the APD and pulse generating unit in this embodiment. Fig. 13 shows a pixel 10 of a sensor substrate 1 and a pulse generating unit 22 in a signal processing unit 20 of a circuit substrate 2. An APD 11 is disposed in the pixel 10. The pulse generating unit 22 includes a quenching element 221, a waveform shaping unit 222, a counter circuit 223, and a selection circuit 224.

[0199] The APD 11 generates pairs of charges according to the incident light through photoelectric conversion. A voltage VL (first voltage) is supplied to the anode of the APD 11. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD 11. A reverse bias voltage is applied to the anode and cathode, and the APD 11 is in a state where avalanche multiplication is possible. When a photon is incident on the APD 11 while the reverse bias voltage is being supplied, the charge generated by the photon undergoes avalanche multiplication, generating an avalanche current.

[0200] Depending on the reverse bias voltage, the APD 11 can operate in Geiger mode or linear mode. The Geiger mode is an operation in a state where the potential difference between the anode and the cathode is greater than the breakdown voltage, and the linear mode is an operation in a state where the potential difference between the anode and the cathode is close to or less than the breakdown voltage. An APD operating in Geiger mode is particularly called a SPAD or SPAD type. As an example, the voltage VL (first voltage) can be −30V, and the voltage VH (second voltage) can be 1V. The APD 11 can operate in either linear mode or Geiger mode. When the APD 11 operates as a SPAD, the potential difference becomes larger compared to the APD 11 in linear mode, and the effect of withstanding voltage becomes more pronounced, so it is preferable that the APD 11 is a SPAD.

[0201] The quench element 221 is provided between a power supply line that supplies the voltage VH and the cathode of the APD 11. The quench element 221 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 11 (quench operation). The quench element 221 also has a function of returning the voltage supplied to the APD 11 to the voltage VH by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation).

[0202] The waveform shaping unit 222 functions as a signal generating unit that generates a detection pulse based on an output generated by the incidence of a photon. That is, the waveform shaping unit 222 shapes the potential change of the cathode of the APD 11 obtained at the time of photon detection, and outputs a square wave pulse signal (detection pulse). For example, an inverter circuit is used as the waveform shaping unit 222. Although an example using one inverter as the waveform shaping unit 222 is shown in FIG. 13, a circuit in which a plurality of inverters are connected in series may be used. Also, other circuits having a waveform shaping effect may be used.

[0203] The counter circuit 223 counts the pulse signal output from the waveform shaping unit 222 and holds the count value. In addition, a control pulse is supplied to the counter circuit 223 from the vertical scanning circuit 21 in Fig. 12 via a driving line 226 of the scanning line 26. When the control pulse becomes active, the signal held in the counter circuit 223 is reset.

[0204] The selection circuit 224 includes a switch circuit, a buffer circuit for outputting a signal, etc. A control pulse is supplied to the selection circuit 224 from the vertical scanning circuit 21 in Fig. 12 via a drive line 227. In response to the control pulse, the selection circuit 224 switches between electrical connection and non-connection between the counter circuit 223 and the signal line 219.

[0205] Switches such as transistors may be provided between the quench element 221 and the APD 11, and between the APD 11 and the signal processing unit 20. The supply of the voltage VH or the voltage VL may be electrically switched by a switch such as a transistor.

[0206] Fig. 14 is a diagram showing the relationship between the operation of the APD and the output signal in this embodiment. Fig. 14(a) is a diagram showing the APD 11, quench element 221, and waveform shaping unit 222 of Fig. 13. When the input side of the waveform shaping unit 222 is nodeA and the output side is nodeB, Fig. 14(b) shows the waveform change of nodeA, and Fig. 14(c) shows the waveform change of nodeB.

[0207] Between time t0 and time t1, a reverse bias voltage of VH-VL is applied to the APD 11. When a photon is incident on the APD 11 at time t1, avalanche multiplication occurs in the APD 11, an avalanche multiplication current flows through the quench element 221, and the voltage of nodeA drops. When the voltage drop becomes larger and the potential difference applied to the APD 11 becomes smaller, the avalanche multiplication of the APD 11 stops at time t3, and the voltage level of nodeA does not drop by more than a certain value. After that, between time t3 and time t5, a current that compensates for the voltage drop flows from the voltage VL to nodeA, and at time t5, nodeA is stabilized to the original voltage level. At this time, when the voltage level of nodeA falls below the threshold of the waveform shaping unit 222 from time t2 to time t4, nodeB becomes high level. That is, the voltage waveform of nodeA is shaped by the waveform shaping section 222, and a rectangular wave pulse signal is output from nodeB.

[0208] [Fourth embodiment] FIG. 15 is a diagram of a light detection system in this embodiment, and is a block diagram of a range image sensor using the photoelectric conversion device described in the above embodiment.

[0209] 15, the range image sensor 401 includes an optical system 402, a photoelectric conversion device 403, an image processing circuit 404, a monitor 405, and a memory 406. The range image sensor 401 receives light (modulated light, pulsed light) emitted from a light source device 411 toward a subject and reflected from the surface of the subject. The range image sensor 401 can obtain a range image according to the distance to the subject, based on the time from emission to reception of light.

[0210] The optical system 402 includes one or more lenses, guides image light (incident light) from a subject to the photoelectric conversion device 403 , and forms an image on the light receiving surface (sensor portion) of the photoelectric conversion device 403 .

[0211] The photoelectric conversion device according to each of the above-mentioned embodiments can be applied as the photoelectric conversion device 403. The photoelectric conversion device 403 supplies the image processing circuit 404 with a distance signal indicating a distance determined from a received light signal.

[0212] The image processing circuit 404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 403. The distance image (image data) obtained by the image processing can be displayed on a monitor 405 and stored (recorded) in a memory 406.

[0213] The range image sensor 401 configured in this way can obtain a more accurate range image as the pixel characteristics are improved by applying the above-mentioned photoelectric conversion device.

[0214] [Fifth embodiment] The technology according to the present disclosure may be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0215] Fig. 16 is a schematic diagram of the endoscopic surgery system in this embodiment. Fig. 16 shows a state in which an operator (doctor) 1131 performs surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1103. As shown in the figure, the endoscopic surgery system 1103 includes an endoscope 1100, a surgical tool 1110, and a cart 1134 on which various devices for endoscopic surgery are mounted.

[0216] The endoscope 1100 includes a lens barrel 1101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 1132, a camera head 1102 connected to a base end of the lens barrel 1101, and an arm 1121. Although Fig. 16 shows the endoscope 1100 configured as a so-called rigid scope having a rigid lens barrel 1101, the endoscope 1100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0217] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100, and light generated by the light source device 1203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 1101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 1132. The endoscope 1100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0218] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and reflected light (observation light) from an observation target is focused on the photoelectric conversion device by the optical system. The observation light is photoelectrically converted by the photoelectric conversion device to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. As the photoelectric conversion device, the photoelectric conversion device described in each of the above-mentioned embodiments may be used. The image signal is transmitted to a camera control unit (CCU) 1135 as RAW data.

[0219] The CCU 1135 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 1100 and the display device 1136. Furthermore, the CCU 1135 receives an image signal from the camera head 1102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0220] Under the control of the CCU 1135 , the display device 1136 displays an image based on an image signal that has been subjected to image processing by the CCU 1135 .

[0221] The light source device 1203 includes a light source such as an LED (Light Emitting Diode), and supplies the endoscope 1100 with irradiation light when imaging an operation site or the like.

[0222] The input device 1137 is an input interface for the endoscopic surgery system 1103. A user can input various information and instructions to the endoscopic surgery system 1103 via the input device 1137.

[0223] The treatment tool control device 1138 controls the driving of the energy treatment tool 1112 for cauterizing tissue, incising, sealing blood vessels, or the like.

[0224] The light source device 1203 can supply irradiation light to the endoscope 1100 when imaging the surgical site, and can be, for example, a white light source made of an LED, a laser light source, or a combination of these. When a white light source is configured by a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision. Therefore, the light source device 1203 can adjust the white balance of the captured image. In this case, the laser light from each of the RGB laser light sources can be irradiated to the observation target in a time-division manner, and the drive of the image sensor of the camera head 1102 can be controlled in synchronization with the irradiation timing. This makes it possible to capture images corresponding to each of the RGB colors in a time-division manner. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0225] Furthermore, the driving of the light source device 1203 may be controlled so that the intensity of the light output from the light source device 1203 is changed at predetermined time intervals. By controlling the driving of the image sensor of the camera head 1102 in synchronization with the timing of the change in the light intensity to acquire images in a time-division manner and synthesizing the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0226] Furthermore, the light source device 1203 may be configured to be capable of supplying light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, the wavelength dependency of light absorption in body tissue can be utilized. Specifically, a predetermined tissue such as blood vessels on the mucous membrane surface can be photographed with high contrast by irradiating light of a narrower band than the irradiation light (i.e., white light) during normal observation. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating excitation light. In the fluorescent observation, it is possible to irradiate excitation light to the body tissue and observe the fluorescence from the body tissue, or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 1203 may be configured to be capable of supplying narrow band light and / or excitation light corresponding to such special light observation.

[0227] [Sixth embodiment] The light detection system and the moving body of this embodiment will be described with reference to Figures 17A, 17B, and 18. In this embodiment, an example of an on-vehicle camera will be shown as the light detection system.

[0228] FIG. 17A is a schematic diagram of a light detection system in this embodiment, showing an example of a vehicle system and a light detection system mounted on the vehicle system. The light detection system 1301 includes a photoelectric conversion device 1302, an image preprocessing unit 1315, an integrated circuit 1303, and an optical system 1314. The optical system 1314 forms an optical image of a subject on the photoelectric conversion device 1302. The photoelectric conversion device 1302 converts the optical image of the subject formed by the optical system 1314 into an electrical signal. The photoelectric conversion device 1302 is any of the photoelectric conversion devices in each of the above-mentioned embodiments. The image preprocessing unit 1315 performs a predetermined signal processing on the signal output from the photoelectric conversion device 1302. The function of the image preprocessing unit 1315 may be incorporated in the photoelectric conversion device 1302. The light detection system 1301 is provided with at least two sets of an optical system 1314 , a photoelectric conversion device 1302 , and an image pre-processing unit 1315 , and the output from each set of the image pre-processing unit 1315 is input to the integrated circuit 1303 .

[0229] The integrated circuit 1303 is an integrated circuit for use in an imaging system, and includes an image processing unit 1304 including a storage medium 1305, an optical distance measuring unit 1306, a parallax calculation unit 1307, an object recognition unit 1308, and an abnormality detection unit 1309. The image processing unit 1304 performs image processing such as development processing and defect correction on the output signal of the image pre-processing unit 1315. The storage medium 1305 stores the primary storage of the captured image and the defective positions of the captured pixels. The optical distance measuring unit 1306 performs focusing and distance measurement of the subject. The parallax calculation unit 1307 calculates distance measurement information from multiple image data acquired by multiple photoelectric conversion devices 1302. The object recognition unit 1308 recognizes subjects such as cars, roads, signs, and people. When the abnormality detection unit 1309 detects an abnormality in the photoelectric conversion device 1302, it notifies the main control unit 1313 of the abnormality.

[0230] The integrated circuit 1303 may be realized by dedicated hardware, a software module, or a combination of these. It may also be realized by a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or the like, or a combination of these.

[0231] The main control unit 1313 supervises and controls the operations of the light detection system 1301, the vehicle sensor 1310, the control unit 1320, etc. The main control unit 1313 may not be provided, and the light detection system 1301, the vehicle sensor 1310, and the control unit 1320 may each have a communication interface and transmit and receive control signals via a communication network, for example, according to the CAN standard.

[0232] The integrated circuit 1303 has a function of receiving a control signal from the main control unit 1313 or transmitting a control signal or a set value to the photoelectric conversion device 1302 by its own control unit.

[0233] The optical detection system 1301 is connected to a vehicle sensor 1310, and can detect the vehicle's driving state, such as vehicle speed, yaw rate, and steering angle, as well as the state of the environment outside the vehicle, other vehicles, and obstacles. The vehicle sensor 1310 is also a distance information acquisition unit that acquires distance information to an object. The optical detection system 1301 is also connected to a driving assistance control unit 1311 that performs various driving assistance functions, such as automatic steering, automatic cruising, and collision prevention functions. In particular, the collision determination function determines whether or not a collision with another vehicle or obstacle has occurred based on the detection results of the optical detection system 1301 and the vehicle sensor 1310. This allows for avoidance control when a collision is estimated, and activation of a safety device when a collision occurs.

[0234] The light detection system 1301 is also connected to an alarm device 1312 that issues an alarm to the driver based on the result of the determination by the collision determination unit. For example, if the collision determination unit determines that there is a high possibility of a collision, the main control unit 1313 performs vehicle control such as applying the brakes, releasing the accelerator, and suppressing engine output to avoid a collision and reduce damage. The alarm device 1312 issues an alarm to the user using means such as issuing an alarm such as a sound, displaying alarm information on the display screen of a car navigation system or a meter panel, or applying vibration to a seat belt or steering wheel.

[0235] The light detection system 1301 in this embodiment can capture an image of the surroundings of the vehicle, for example, the front or rear of the vehicle. Fig. 17B is a schematic diagram of a moving body in this embodiment, and shows a configuration in which the light detection system 1301 captures an image of the area in front of the vehicle.

[0236] The two photoelectric conversion devices 1302 are disposed in front of the vehicle 1300. Specifically, it is preferable to regard the center line of the vehicle 1300 relative to the forward / backward direction or the outer shape (for example, the vehicle width) as an axis of symmetry, and to dispose the two photoelectric conversion devices 1302 in line symmetry with respect to the axis of symmetry. This makes it possible to effectively obtain distance information between the vehicle 1300 and an object to be photographed and to determine the possibility of a collision. In addition, it is preferable that the photoelectric conversion device 1302 is disposed in a position that does not obstruct the driver's field of vision when the driver visually checks the situation outside the vehicle 1300 from the driver's seat. It is preferable that the alarm device 1312 is disposed in a position that is easily within the driver's field of vision.

[0237] Next, a fault detection operation of the photoelectric conversion device 1302 in the photodetection system 1301 will be described with reference to Fig. 18. Fig. 18 is a flowchart showing the operation of the photodetection system in this embodiment. The fault detection operation of the photoelectric conversion device 1302 can be executed in accordance with steps S1410 to S1480.

[0238] In step S1410, startup settings are made for the photoelectric conversion device 1302. That is, setting information for the operation of the photoelectric conversion device 1302 is transmitted from outside the photodetection system 1301 (e.g., the main control unit 1313) or from inside the photodetection system 1301, and the photoelectric conversion device 1302 starts imaging operation and fault detection operation.

[0239] Next, in step S1420, the photoelectric conversion device 1302 acquires pixel signals from the valid pixels. In addition, in step S1430, the photoelectric conversion device 1302 acquires output values ​​from failure detection pixels provided for failure detection. The failure detection pixels include photoelectric conversion elements, just like the valid pixels. A predetermined voltage is written to the photoelectric conversion elements. The failure detection pixels output signals corresponding to the voltage written to the photoelectric conversion elements. Note that steps S1420 and S1430 may be executed in the reverse order.

[0240] Next, in step S1440, the photodetection system 1301 performs a correspondence determination between the output expected value of the fault detection pixel and the actual output value from the fault detection pixel. If the correspondence determination result in step S1440 indicates that the output expected value and the actual output value match, the photodetection system 1301 proceeds to processing in step S1450, determines that the imaging operation is performed normally, and proceeds to processing in step S1460. In step S1460, the photodetection system 1301 transmits the pixel signal of the scanning row to the storage medium 1305 and temporarily stores it. Thereafter, the photodetection system 1301 returns to the processing in step S1420 and continues the fault detection operation. On the other hand, if the correspondence determination result in step S1440 indicates that the output expected value and the actual output value do not match, the photodetection system 1301 proceeds to processing in step S1470. In step S1470, the light detection system 1301 determines that there is an abnormality in the imaging operation, and issues an alarm to the main control unit 1313 or the alarm device 1312. The alarm device 1312 displays on the display unit that an abnormality has been detected. After that, in step S1480, the light detection system 1301 stops the photoelectric conversion device 1302, and ends the operation of the light detection system 1301.

[0241] In this embodiment, the flowchart is looped for each line, but the flowchart may be looped for each set of lines, or the fault detection operation may be performed for each frame. The issuance of the alarm in step S1470 may be notified to the outside of the vehicle via a wireless network.

[0242] In addition, in the present embodiment, the control to prevent collision with other vehicles has been described, but the present disclosure can also be applied to control to automatically drive by following other vehicles, control to automatically drive without going out of lanes, and the like. Furthermore, the light detection system 1301 can be applied not only to vehicles such as the vehicle itself, but also to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the light detection system 1301 can be applied not only to moving bodies, but also to devices that widely use object recognition, such as intelligent transport systems (ITS). The photoelectric conversion device of the present disclosure may further be configured to be capable of acquiring various information such as distance information.

[0243] [Seventh embodiment] FIG. 19(a) is a diagram showing a specific example of an electronic device in this embodiment, showing glasses 1600 (smart glasses). The glasses 1600 are provided with a photoelectric conversion device 1602 described in each of the above-mentioned embodiments. A display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 1601. The photoelectric conversion device 1602 may be one or more. Also, multiple types of photoelectric conversion devices may be combined. The arrangement position of the photoelectric conversion device 1602 is not limited to that shown in FIG. 19(a).

[0244] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the photoelectric conversion device 1602 and the above-mentioned display device. The control device 1603 also controls the operations of the photoelectric conversion device 1602 and the display device. The lens 1601 is formed with an optical system for collecting light on the photoelectric conversion device 1602.

[0245] FIG. 19(b) shows glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612, and the control device 1612 is equipped with a photoelectric conversion device corresponding to the photoelectric conversion device 1602 and a display device. The lens 1611 is formed with a photoelectric conversion device in the control device 1612 and an optical system for projecting light emitted from the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source that supplies power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device 1612 may have a line of sight detection unit that detects the line of sight of the wearer. Infrared light may be used to detect the line of sight. The infrared light emission unit emits infrared light toward the eyeball of a user gazing at a display image. An image of the eyeball is obtained by detecting the reflected light of the emitted infrared light from the eyeball with an imaging unit having a light receiving element. By providing a reduction unit that reduces the amount of light from the infrared light emitting unit to the display unit in a plan view, degradation of image quality is reduced.

[0246] The gaze of the user with respect to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be applied to gaze detection using the image of the eyeball. As an example, a gaze detection method based on a Purkinje image formed by reflection of irradiated light on the cornea can be used.

[0247] More specifically, a gaze detection process based on the pupil-corneal reflex method is performed. Using the pupil-corneal reflex method, a gaze vector that indicates the direction (rotation angle) of the eyeball is calculated based on the pupil image and the Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0248] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the display image of the display device based on information on the user's line of sight from the photoelectric conversion device.

[0249] Specifically, the display device determines a first field of view area to which the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device or an external control device. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0250] The display area may include a first display area and a second display area different from the first display area. A high priority area may be determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device or an external control device. The resolution of the high priority area may be controlled to be higher than the resolution of areas other than the high priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0251] In addition, AI (Artificial Intelligence) may be used in determining the first field of view area and the area with high priority. The AI ​​may be a model configured to estimate the angle of the line of sight and the distance to an object at the end of the line of sight from the image of the eyeball, using the image of the eyeball and the direction in which the eyeball in the image was actually looking as teacher data. The AI ​​program may be provided in either the display device or the photoelectric conversion device, or may be provided in an external device. When the external device has the AI ​​program, it may be transmitted from a server or the like to the display device via communication.

[0252] In the case where display control is performed based on visual recognition detection, the present embodiment can be preferably applied to smart glasses further including a photoelectric conversion device that captures an image of the outside world. The smart glasses can display captured outside information in real time.

[0253] [Other embodiments] The present disclosure is not limited to the above-described embodiments and may be modified in various ways. For example, an example in which a part of the configuration of any of the embodiments is added to another embodiment, or an example in which a part of the configuration of any of the embodiments is replaced with another embodiment, is also an embodiment of the present disclosure.

[0254] The disclosure of this specification includes the following configurations. (Configuration 1) a detection unit that generates a voltage change due to a current generated in response to the incidence of a photon; a switch section that is provided between the detection section and a power supply node, and that changes a voltage of the detection section to a predetermined bias voltage by supplying a current from the power supply node to the detection section in an on state, and that cuts off the current from the power supply node to the detection section in an off state; a first circuit unit that generates a detection signal based on the voltage change in response to the incidence of a photon on the detection unit; a counting unit that counts the detection signal and outputs a count value; Equipped with the first circuit unit generates the detection signal based on the voltage change of the detection unit during a period in which the switch unit is in the on state. Photoelectric conversion device. (Configuration 2) 2. The photoelectric conversion device according to configuration 1, wherein the first circuit section does not generate the detection signal based on the voltage change of the detection section during a period in which the switch section is in the off state. (Configuration 3) a second circuit section that generates the detection signal based on the voltage change of the detection section during a period in which the switch section is in the on state and a period in which the switch section is in the off state; a selection unit that selects the detection signal generated by the first circuit unit or the detection signal generated by the second circuit unit and outputs the selection signal to the counting unit; 3. The photoelectric conversion device according to configuration 1 or 2, further comprising: (Configuration 4) 4. The photoelectric conversion device according to configuration 3, wherein the selection section selects the detection signal based on the count value. (Configuration 5) The photoelectric conversion device of configuration 4, wherein the selection unit selects the detection signal generated by the first circuit unit when the count value is equal to or greater than a first value, and selects the detection signal generated by the second circuit unit when the count value is less than a second value that is less than the first value. (Configuration 6) 6. The photoelectric conversion device according to configuration 4 or 5, wherein the selection section continues to select the previously selected detection signal when the count value is smaller than the first value and larger than the second value. (Configuration 7) The photoelectric conversion device of any one of configurations 1 to 6, wherein the first circuit unit outputs the detection signal based on the voltage of the detection unit during a period in which the switch unit is in the on state, during a period in which the switch unit is in the on state and the off state. (Configuration 8) the second circuit unit outputs, during a period in which the switch unit is in the off state, the detection signal based on the voltage of the detection unit during a period in which the switch unit is in the on state and the off state. 7. The photoelectric conversion device according to any one of configurations 3 to 6. (Configuration 9) The photoelectric conversion device according to any one of configurations 1 to 8, wherein the detection unit includes a SPAD. (Configuration 10) The image sensor further comprises a plurality of pixels arranged in a matrix, each of the plurality of pixels includes the detection unit, the switch unit, the first circuit unit, the second circuit unit, and the counting unit; The selection unit is selecting the detection signal generated by the first circuit unit when the number of the pixels that output the count value equal to or greater than a first threshold is equal to or greater than a first number; selecting the detection signal generated by the second circuit unit when the number of the pixels outputting the count value equal to or less than a second threshold value that is smaller than the first threshold value is equal to or greater than a second number; The photoelectric conversion device according to any one of configurations 3 to 6 and 8. (Configuration 11) The photoelectric conversion device of configuration 10, wherein the selection unit continues to select the detection signal that was previously selected when the number of the pixels that output the count value that is equal to or greater than the first threshold is less than the first number and the number of the pixels that output the count value that is equal to or less than the second threshold is less than the second number. (Configuration 12) 12. The photoelectric conversion device according to configuration 10 or 11, wherein the selection section selects the detection signal based on the count value in at least one previous frame. (Configuration 13) 12. The photoelectric conversion device according to any one of configurations 3 to 6, 8, 10 and 11, wherein the selection section selects the detection signal based on an amount of incident light measured by a light amount sensor. (Configuration 14) The photoelectric conversion device according to any one of configurations 1 to 13, a signal processing device that processes an image signal output from the photoelectric conversion device; An optical detection system comprising: (Configuration 15) The optical detection system of configuration 14, wherein the signal processing device generates a distance image representing distance information to an object based on the image signal. (Configuration 16) A mobile object, The photoelectric conversion device according to any one of configurations 1 to 13, a distance information acquisition unit that acquires distance information to an object from an image signal output from the photoelectric conversion device; a control unit that controls the moving object based on the distance information; A mobile body comprising: (Method 1) A method for controlling a photoelectric conversion device including a detection unit and a switch unit provided between the detection unit and a power supply node, the method comprising the steps of: A step of causing a voltage change in the detection unit by a current generated in response to the incidence of a photon; a step of changing a voltage of the detection unit to a predetermined bias voltage by supplying a current from the power supply node to the detection unit while the switch unit is in an on state; cutting off a current from the power supply node to the detection unit while the switch unit is in an off state; generating a detection signal based on the voltage change in response to the incidence of a photon on the detection unit; counting the detection signals and outputting a count value; Equipped with the step of generating the detection signal includes a step of generating the detection signal based on the voltage change of the detection unit during a period in which the switch unit is in the on state. A method for controlling a photoelectric conversion device.

[0255] The present disclosure can also be realized by a process in which a program for implementing one or more of the functions of the above-described embodiments is supplied to a system or device via a network or a storage medium, and one or more processors in a computer of the system or device read and execute the program. It can also be realized by a circuit (e.g., ASIC) for implementing one or more of the functions.

[0256] It should be noted that the above-mentioned embodiments are merely examples of the implementation of the present disclosure, and the technical scope of the present disclosure should not be interpreted as being limited by these embodiments. In other words, the present disclosure can be implemented in various forms without departing from its technical concept or main features. [Explanation of symbols]

[0257] 40...Register block 50…Pixel section 100...Photoelectric conversion device 110...Light detection system 510…SPAD 520…Switch section 530...Circuit section 540...Circuit section 550…Selection section 560…Counting section 570…Pixel output section

Claims

1. A detection unit that generates a voltage change by a current generated in response to the incidence of photons, A switch unit is provided between the detection unit and the power supply node, which, when in the ON state, supplies current from the power supply node to the detection unit to change the voltage of the detection unit to a predetermined bias voltage, and when in the OFF state, cuts off the current from the power supply node to the detection unit. A first circuit unit that generates a first detection signal based on the voltage change corresponding to the incidence of photons in the detection unit during the period when the switch unit is in the ON state, The switch unit comprises a second circuit unit which generates a second detection signal based on the voltage change of the detection unit during the ON state and the OFF state, A counting unit that counts the detection signals and outputs a count value, A selection unit that selects the first detection signal generated by the first circuit unit or the second detection signal generated by the second circuit unit, and outputs the selected detection signal to the counting unit. A photoelectric conversion device equipped with the following features.

2. The photoelectric converter according to claim 1, wherein the first circuit unit does not generate the detection signal based on the voltage change of the detection unit during the period when the switch unit is in the off state.

3. The photoelectric converter according to claim 1, wherein the selection unit selects the detection signal based on the count value.

4. The photoelectric converter according to claim 3, wherein the selection unit selects the detection signal generated by the first circuit unit when the count value is greater than or equal to a first value, and selects the detection signal generated by the second circuit unit when the count value is less than a second value less than the first value.

5. The photoelectric converter according to claim 4, wherein the selection unit continues to select one of the selected first detection signal and second detection signal when the count value is less than the first value and greater than the second value.

6. The photoelectric converter according to claim 1, wherein the first circuit unit outputs the detection signal based on the voltage of the detection unit during the period when the switch unit is in the ON state, during the periods when the switch unit is in the ON state and the OFF state.

7. The second circuit unit outputs the detection signal based on the voltage of the detection unit during the period when the switch unit is in the ON state and the OFF state, during the period when the switch unit is in the OFF state. The photoelectric conversion device according to claim 1.

8. The photoelectric conversion apparatus according to claim 1, wherein the detection unit includes a SPAD.

9. It further comprises multiple pixels arranged in a matrix, Each of the plurality of pixels includes the detection unit, the switch unit, the first circuit unit, the second circuit unit, and the counting unit. The aforementioned selection unit is If the number of pixels that output a count value equal to or greater than a first threshold is equal to or greater than a first number, the detection signal generated by the first circuit unit is selected. The detection signal generated by the second circuit unit is selected when the number of pixels that output the count value less than or equal to a second threshold smaller than the first threshold is greater than or equal to the second number. The photoelectric conversion device according to claim 1.

10. The photoelectric converter according to claim 9, wherein the selection unit continues to select the previously selected detection signal when the number of pixels outputting a count value equal to or greater than the first threshold is less than the first number, and the number of pixels outputting a count value equal to or less than the second threshold is less than the second number.

11. The photoelectric converter according to claim 9, wherein the selection unit selects the detection signal based on the count value at least one frame prior.

12. The photoelectric conversion device according to claim 1, wherein the selection unit selects the detection signal based on the amount of incident light measured by the light intensity sensor.

13. A photoelectric conversion device according to any one of claims 1 to 12, A signal processing device that processes the image signal output from the aforementioned photoelectric converter and A light detection system equipped with the following features.

14. The light detection system according to claim 13, wherein the signal processing device generates a distance image representing distance information to an object based on the image signal.

15. It is a mobile object, A photoelectric conversion device according to any one of claims 1 to 12, A distance information acquisition unit acquires distance information to an object from the image signal output from the photoelectric converter, A control unit that controls the moving body based on the distance information. A mobile device equipped with these features.

16. A control method for a photoelectric converter comprising a detection unit and a switch unit provided between the detection unit and a power node, The detection unit includes the step of generating a voltage change by a current generated in response to the incidence of photons, The steps include: changing the voltage of the detection unit to a predetermined bias voltage by supplying current from the power node to the detection unit while the switch unit is in the ON state; The steps include: interrupting the current from the power node to the detection unit when the switch unit is in the off state; The steps include generating a detection signal based on the voltage change corresponding to the incidence of photons in the detection unit, The steps include counting the detection signal and outputting the count value, Equipped with, The step of generating the aforementioned detection signal is: The steps include generating the detection signal based on the voltage change of the detection unit during the period when the switch unit is in the ON state, The steps include generating the detection signal based on the voltage change of the detection unit during the period when the switch unit is in the ON state and the period when it is in the OFF state, and A method for controlling a photoelectric converter, including the control of a photoelectric converter.