Plasma processing equipment

Abstract

To provide a technique for cleaning an inner wall of a chamber body.SOLUTION: A plasma processing apparatus according to one embodiment includes a DC power supply for generating DC voltage of a negative polarity to be applied to a lower electrode of a stage. In cleaning using the plasma processing apparatus, a high frequency is supplied in order to generate plasma by exciting gas in a chamber. In order to attract ions from plasma to an inner wall on a chamber body, the DC voltage of the negative polarity from the DC power supply is periodically applied to the lower electrode. In each cycle, ratio occupied by a term for applying the DC voltage to the lower electrode is set to a value larger than 40%.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] An embodiment of the present disclosure relates to a cleaning method and a plasma processing apparatus. [Background technology]

[0002] Plasma processing apparatuses are used in the manufacture of electronic devices. Plasma processing apparatuses generally include a chamber body, a stage, and a high-frequency power supply. The chamber body provides its internal space as a chamber. The chamber body is grounded. The stage is provided within the chamber and configured to support a substrate placed thereon. The stage includes a lower electrode. The high-frequency power supply supplies high-frequency waves to excite gas within the chamber. In this plasma processing apparatus, ions are accelerated by the potential difference between the potential of the lower electrode and the potential of the plasma, and the accelerated ions are irradiated onto the substrate.

[0003] In a plasma processing apparatus, a potential difference also occurs between the chamber body and the plasma. When the potential difference between the chamber body and the plasma is large, the energy of ions irradiated onto the inner wall of the chamber body becomes high, and particles are emitted from the chamber body. The particles emitted from the chamber body contaminate the substrate placed on the stage. In order to prevent the generation of such particles, Patent Document 1 proposes a technology that uses an adjustment mechanism that adjusts the earth capacitance of the chamber. The adjustment mechanism described in Patent Document 1 is configured to adjust the area ratio of the anode and cathode facing the chamber, i.e., the A / C ratio. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-228694 A Summary of the Invention [Problem to be solved by the invention]

[0005] The present disclosure provides techniques for cleaning the interior walls of a chamber body. [Means for solving the problem]

[0006] In one aspect, a cleaning method is provided that is performed in a plasma processing apparatus. The plasma processing apparatus includes a chamber body, a stage, a radio frequency power supply, and one or more DC power supplies. The chamber body provides an internal space thereof as a chamber. The stage is provided in the chamber body. The stage includes a lower electrode. The stage is configured to support a substrate placed thereon. The radio frequency power supply is configured to supply radio frequency waves for exciting a gas supplied to the chamber. The one or more DC power supplies are configured to generate a DC voltage having a negative polarity that is applied to the lower electrode. The cleaning method according to one aspect includes the steps of (i) supplying radio frequency waves from the radio frequency power supply to generate plasma of a gas supplied to the chamber, and (ii) applying a DC voltage having a negative polarity from the one or more DC power supplies to the lower electrode to attract ions in the plasma to an inner wall of the chamber body. In the step of applying the DC voltage, the DC voltage is applied periodically to the lower electrode, and a ratio of a period during which the DC voltage is applied to the lower electrode in each period is set to a value greater than 40%. Effect of the Invention

[0007] Techniques are provided for cleaning the interior walls of a chamber body. [Brief description of the drawings]

[0008] [Figure 1] 1 is a diagram illustrating an example of a plasma processing apparatus according to an embodiment of the present invention; [Diagram 2] 2 is a diagram showing an embodiment of a power supply system and a control system of the plasma processing apparatus shown in FIG. [Diagram 3] 3 is a diagram showing a circuit configuration of a DC power supply, a switching unit, a high-frequency filter, and a matching box shown in FIG. 2. FIG. [Figure 4] 2 is a timing chart relating to a plasma processing method according to an embodiment that is performed using the plasma processing apparatus shown in FIG. [Diagram 5] 4 is a timing chart showing a plasma potential. [Figure 6] FIGS. 6(a) and 6(b) are timing charts relating to a plasma processing method according to another embodiment. [Figure 7] FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. [Figure 8] FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. [Figure 9] 9 is a timing chart relating to a plasma processing method according to an embodiment that is performed using the plasma processing apparatus shown in FIG. 8. [Figure 10] FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. [Figure 11] FIG. 2 is a circuit diagram illustrating an example of a waveform adjuster. [Figure 12] FIG. 12(a) is a graph showing the relationship between the duty ratio and the etching amount of a silicon oxide film of a sample attached to the surface of the top plate 34 facing the chamber 12c, as determined in the first evaluation experiment, and FIG. 12(b) is a graph showing the relationship between the duty ratio and the etching amount of a silicon oxide film of a sample attached to the side wall of the chamber body 12, as determined in the first evaluation experiment. [Figure 13] 1 is a graph showing the relationship between the duty ratio and the amount of etching of a silicon oxide film of a sample placed on the electrostatic chuck 20, obtained in a first evaluation experiment. [Figure 14] FIG. 14(a) is a graph showing the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c, obtained in each of the second evaluation experiment and the comparative experiment, and FIG. 14(b) is a graph showing the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12, obtained in each of the second evaluation experiment and the comparative experiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Various embodiments will be described in detail below with reference to the drawings, in which the same or corresponding parts are designated by the same reference numerals.

[0010] Fig. 1 is a diagram showing an outline of a plasma processing apparatus according to an embodiment. Fig. 2 is a diagram showing an embodiment of a power supply system and a control system of the plasma processing apparatus shown in Fig. 1. The plasma processing apparatus 10 shown in Fig. 1 is a capacitively coupled plasma processing apparatus.

[0011] The plasma processing apparatus 10 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape. The chamber body 12 provides its internal space as a chamber 12c. The chamber body 12 is made of, for example, aluminum. The chamber body 12 is connected to a ground potential. A plasma-resistant film is formed on the inner wall surface of the chamber body 12, i.e., the wall surface defining the chamber 12c. This film may be a film formed by anodization or a ceramic film such as a film formed from yttrium oxide. A passage 12p is formed on the side wall of the chamber body 12. When the substrate W is loaded into the chamber 12c and when the substrate W is unloaded from the chamber 12c, the substrate W passes through the passage 12p. A gate valve 12g is provided along the side wall of the chamber body 12 to open and close the passage 12p.

[0012] In the chamber 12c, a support 15 extends upward from the bottom of the chamber body 12. The support 15 has a substantially cylindrical shape and is made of an insulating material such as ceramic. A stage 16 is mounted on the support 15. The stage 16 is supported by the support 15. The stage 16 is configured to support the substrate W in the chamber 12c. The stage 16 includes a lower electrode 18 and an electrostatic chuck 20. In one embodiment, the stage 16 further includes an electrode plate 21. The electrode plate 21 is made of a conductive material such as aluminum and has a substantially disk shape. The lower electrode 18 is provided on the electrode plate 21. The lower electrode 18 is made of a conductive material such as aluminum and has a substantially disk shape. The lower electrode 18 is electrically connected to the electrode plate 21.

[0013] A flow path 18f is provided in the lower electrode 18. The flow path 18f is a flow path for a heat exchange medium. As the heat exchange medium, a liquid refrigerant or a refrigerant (e.g., freon) that cools the lower electrode 18 by vaporizing is used. The heat exchange medium is supplied to the flow path 18f via a pipe 23a from a chiller unit provided outside the chamber body 12. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit via a pipe 23b. That is, the heat exchange medium is supplied to the flow path 18f so as to circulate between the flow path 18f and the chiller unit.

[0014] The electrostatic chuck 20 is provided on the lower electrode 18. The electrostatic chuck 20 has a main body made of an insulator and a film-like electrode provided in the main body. A DC power supply is electrically connected to the electrode of the electrostatic chuck 20. When a voltage is applied from the DC power supply to the electrode of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the substrate W placed on the electrostatic chuck 20. The generated electrostatic attractive force attracts the substrate W to the electrostatic chuck 20 and the substrate W is held by the electrostatic chuck 20. A focus ring FR is disposed on the peripheral region of the electrostatic chuck 20. The focus ring FR has a substantially annular plate shape and is formed of, for example, silicon. The focus ring FR is disposed so as to surround the edge of the substrate W.

[0015] The plasma processing apparatus 10 is provided with a gas supply line 25. The gas supply line 25 supplies a heat transfer gas, for example, He gas, from a gas supply mechanism to between the upper surface of the electrostatic chuck 20 and the rear surface (lower surface) of the substrate W.

[0016] A cylindrical portion 28 extends upward from the bottom of the chamber body 12. The cylindrical portion 28 extends along the outer periphery of the support portion 15. The cylindrical portion 28 is made of a conductive material and has a substantially cylindrical shape. The cylindrical portion 28 is connected to a ground potential. An insulating portion 29 is provided on the cylindrical portion 28. The insulating portion 29 has insulating properties and is made of, for example, quartz or ceramic. The insulating portion 29 extends along the outer periphery of the stage 16.

[0017] The plasma processing apparatus 10 further includes an upper electrode 30. The upper electrode 30 is provided above the stage 16. The upper electrode 30 closes the upper opening of the chamber body 12 together with a member 32. The member 32 has insulating properties. The upper electrode 30 is supported on the upper part of the chamber body 12 via the member 32. When a first high frequency power supply 61, which will be described later, is electrically connected to the lower electrode 18, the upper electrode 30 is connected to a ground potential.

[0018] The upper electrode 30 includes a top plate 34 and a support 36. The lower surface of the top plate 34 defines the chamber 12c. The top plate 34 is provided with a plurality of gas discharge holes 34a. Each of the plurality of gas discharge holes 34a penetrates the top plate 34 in the plate thickness direction (vertical direction). The top plate 34 is made of, but is not limited to, silicon, for example. Alternatively, the top plate 34 may have a structure in which a plasma-resistant film is provided on the surface of an aluminum base material. This film may be a film formed by anodizing, or a ceramic film such as a film formed from yttrium oxide.

[0019] The support 36 is a component that detachably supports the top plate 34. The support 36 may be made of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support 36. A plurality of gas holes 36b extend downward from the gas diffusion chamber 36a. The plurality of gas holes 36b are connected to the plurality of gas discharge holes 34a. A gas inlet 36c that introduces gas to the gas diffusion chamber 36a is formed in the support 36, and a gas supply pipe 38 is connected to the gas inlet 36c.

[0020] A gas source group 40 is connected to the gas supply pipe 38 via a valve group 42 and a flow rate controller group 44. The gas source group 40 includes a plurality of gas sources. The valve group 42 includes a plurality of valves, and the flow rate controller group 44 includes a plurality of flow rate controllers. Each of the plurality of flow rate controllers of the flow rate controller group 44 is a mass flow controller or a pressure-controlled flow rate controller. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 via the corresponding valves of the valve group 42 and the corresponding flow rate controllers of the flow rate controller group 44. The plasma processing apparatus 10 can supply gas from one or more selected gas sources of the plurality of gas sources of the gas source group 40 to the chamber 12c at individually adjusted flow rates.

[0021] A baffle plate 48 is provided between the cylindrical portion 28 and the side wall of the chamber body 12. The baffle plate 48 can be formed, for example, by coating an aluminum base material with a ceramic such as yttrium oxide. This baffle plate 48 has a large number of through holes. Below the baffle plate 48, an exhaust pipe 52 is connected to the bottom of the chamber body 12. This exhaust pipe 52 is connected to an exhaust device 50. The exhaust device 50 has a pressure controller such as an automatic pressure control valve and a vacuum pump such as a turbo molecular pump, and can reduce the pressure in the chamber 12c.

[0022] As shown in FIG. 1 and FIG. 2, the plasma processing apparatus 10 further includes a first high frequency power supply 61. The first high frequency power supply 61 is a power supply that generates a first high frequency for exciting the gas in the chamber 12c to generate plasma. The first high frequency has a frequency in the range of 27 to 100 MHz, for example, a frequency of 60 MHz. The first high frequency power supply 61 is connected to the lower electrode 18 via a first matching circuit 65 of a matching device 64 and the electrode plate 21. The first matching circuit 65 is a circuit for matching the output impedance of the first high frequency power supply 61 with the impedance on the load side (the lower electrode 18 side). The first high frequency power supply 61 does not have to be electrically connected to the lower electrode 18, and may be connected to the upper electrode 30 via the first matching circuit 65.

[0023] The plasma processing apparatus 10 further includes a second high frequency power supply 62. The second high frequency power supply 62 is a power supply that generates a second high frequency for biasing to attract ions to the substrate W. The frequency of the second high frequency is lower than the frequency of the first high frequency. The frequency of the second high frequency is within a range of 400 kHz to 13.56 MHz, for example, 400 kHz. The second high frequency power supply 62 is connected to the lower electrode 18 via a second matching circuit 66 of the matching device 64 and the electrode plate 21. The second matching circuit 66 is a circuit for matching the output impedance of the second high frequency power supply 62 with the impedance on the load side (the lower electrode 18 side).

[0024] The plasma processing apparatus 10 further includes a DC power supply 70 and a switching unit 72. The DC power supply 70 is a power supply that generates a negative DC voltage. The negative DC voltage is used as a bias voltage for attracting ions to the substrate W placed on the stage 16. The DC power supply 70 is connected to the switching unit 72. The switching unit 72 is electrically connected to the lower electrode 18 via a high-frequency filter 74. In the plasma processing apparatus 10, either the DC voltage generated by the DC power supply 70 or the second high-frequency generated by the second high-frequency power supply 62 is selectively supplied to the lower electrode 18.

[0025] The plasma processing apparatus 10 further includes a controller PC. The controller PC is configured to control the switching unit 72. The controller PC may be further configured to control one or both of the first high frequency power supply 61 and the second high frequency power supply 62.

[0026] In one embodiment, the plasma processing apparatus 10 may further include a main controller MC. The main controller MC is a computer including a processor, a storage device, an input device, a display device, etc., and controls each part of the plasma processing apparatus 10. Specifically, the main controller MC executes a control program stored in the storage device, and controls each part of the plasma processing apparatus 10 based on recipe data stored in the storage device. Through such control, the plasma processing apparatus 10 executes a process specified by the recipe data.

[0027] Below, reference will be made to Figures 2 and 3. Figure 3 is a diagram showing the circuit configuration of the DC power supply, switching unit, high-frequency filter, and matching box shown in Figure 2. The DC power supply 70 is a variable DC power supply, and generates a negative DC voltage to be applied to the lower electrode 18.

[0028] The switching unit 72 is configured to be able to stop the application of the DC voltage from the DC power supply 70 to the lower electrode 18. In one embodiment, the switching unit 72 includes a field effect transistor (FET) 72a, an FET 72b, a capacitor 72c, and a resistor element 72d. The FET 72a is, for example, an N-channel MOS FET. The FET 72b is, for example, a P-channel MOS FET. The source of the FET 72a is connected to the negative electrode of the DC power supply 70. One end of the capacitor 72c is connected to the negative electrode of the DC power supply 70 and the source of the FET 72a. The other end of the capacitor 72c is connected to the source of the FET 72b. The source of the FET 72b is connected to ground. The gate of the FET 72a and the gate of the FET 72b are connected to each other. A pulse control signal from the controller PC is supplied to a node NA connected between the gate of the FET 72a and the gate of the FET 72b. The drain of the FET 72a is connected to the drain of the FET 72b. A node NB connected to the drain of the FET 72a and the drain of the FET 72b is connected to a high-frequency filter 74 via a resistive element 72d.

[0029] The high frequency filter 74 is a filter that reduces or blocks high frequencies. In one embodiment, the high frequency filter 74 has an inductor 74a and a capacitor 74b. One end of the inductor 74a is connected to the resistive element 72d. One end of the inductor 74a is connected to one end of the capacitor 74b. The other end of the capacitor 74b is connected to the ground. The other end of the inductor 74a is connected to the matching device 64.

[0030] The matching device 64 has a first matching circuit 65 and a second matching circuit 66. In one embodiment, the first matching circuit 65 has a variable capacitor 65a and a variable capacitor 65b, and the second matching circuit 66 has a variable capacitor 66a and a variable capacitor 66b. One end of the variable capacitor 65a is connected to the other end of the inductor 74a. The other end of the variable capacitor 65a is connected to the first high frequency power supply 61 and one end of the variable capacitor 65b. The other end of the variable capacitor 65b is connected to the ground. One end of the variable capacitor 66a is connected to the other end of the inductor 74a. The other end of the variable capacitor 66a is connected to the second high frequency power supply 62 and one end of the variable capacitor 66b. The other end of the variable capacitor 66b is connected to the ground. One end of the variable capacitor 65a and one end of the variable capacitor 66a are connected to a terminal 64a of the matching device 64. The terminal 64a of the matching device 64 is connected to the lower electrode 18 via the electrode plate 21.

[0031] The control by the main control unit MC and the controller PC will be described below. In the following description, reference will be made to FIG. 2 and FIG. 4. This is a timing chart related to a plasma processing method of an embodiment executed by using the plasma processing apparatus shown in FIG. 1. In FIG. 4, the horizontal axis indicates time. In FIG. 4, the vertical axis indicates the power of the first high frequency, the DC voltage applied from the DC power supply 70 to the lower electrode 18, and the control signal output by the controller PC. In FIG. 4, the power of the first high frequency being at a high level indicates that the first high frequency is being supplied for plasma generation, and the power of the first high frequency being at a low level indicates that the supply of the first high frequency is stopped. Also, in FIG. 4, the DC voltage being at a low level indicates that a negative DC voltage is being applied from the DC power supply 70 to the lower electrode 18, and the DC voltage being 0 V indicates that no DC voltage is being applied from the DC power supply 70 to the lower electrode 18.

[0032] The main controller MC specifies the power and frequency of the first high frequency to the first high frequency power supply 61. In one embodiment, the main controller MC specifies the timing to start supplying the first high frequency to the first high frequency power supply 61 and the timing to end supplying the first high frequency. During the period when the first high frequency is being supplied by the first high frequency power supply 61, plasma of the gas in the chamber is generated. That is, during this period, a step S1 of supplying a high frequency from the high frequency power supply to generate plasma is performed. In the example of FIG. 4, the first high frequency is continuously supplied during the execution of the plasma processing method of one embodiment.

[0033] The main control unit MC specifies to the controller PC a frequency that defines the period during which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18, and a duty ratio. The duty ratio is the proportion of the period ("T1" in FIG. 4) during which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 within one period ("PDC" in FIG. 4). This duty ratio is set to 40% or less. In one embodiment, the duty ratio is set to 35% or less.

[0034] The controller PC generates a control signal according to a frequency and a duty ratio designated by the main control unit MC. The control signal generated by the controller PC may be a pulse signal. In one example, as shown in FIG. 4, the control signal generated by the controller PC has a high level in a period T1 and a low level in a period T2. The period T2 is a period excluding the period T1 within one cycle PDC. Alternatively, the control signal generated by the controller PC may have a low level in the period T1 and a high level in the period T2.

[0035] In one embodiment, the control signal generated by the controller PC is provided to a node NA of the switching unit 72. When the control signal is provided, the switching unit 72 connects the DC power supply 70 and the node NB to each other so that a negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 during the period T1. On the other hand, the switching unit 72 cuts off the connection between the DC power supply 70 and the node NB during the period T2 so that the negative DC voltage from the DC power supply 70 is not applied to the lower electrode 18. As a result, as shown in FIG. 4, during the period T1, the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18, and during the period T2, the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 is stopped. That is, in the plasma processing method of one embodiment, a step S2 is performed in which a negative DC voltage from the DC power supply 70 is periodically applied to the lower electrode 18.

[0036] Here, reference is made to Fig. 5(a) and Fig. 5(b). Fig. 5(a) and Fig. 5(b) are timing charts showing the potential of the plasma. In period T1, a negative DC voltage from the DC power supply 70 is applied to the lower electrode 18, so that positive ions in the plasma move toward the substrate W. Therefore, as shown in Fig. 5(a) and Fig. 5(b), in period T1, the potential of the plasma is low. On the other hand, in period T2, the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 is stopped, so that the movement of positive ions is reduced, and mainly electrons in the plasma move. Therefore, in period T2, the potential of the plasma is high.

[0037] In the timing chart shown in Fig. 5(a), the duty ratio is smaller than that in the timing chart shown in Fig. 5(b). If the conditions related to plasma generation are the same, the total amount of positive ions and the total amount of electrons in the plasma do not depend on the duty ratio. That is, the ratio of area A1 to area A2 shown in Fig. 5(a) is the same as the ratio of area A1 to area A2 shown in Fig. 5(b). Therefore, if the duty ratio is smaller, the plasma potential PV in period T2 is smaller.

[0038] The etching rate of the substrate W has little dependency on the duty ratio, that is, the ratio of the period T1 during which the negative DC voltage is applied to the lower electrode 18 in each period PDC. On the other hand, when the duty ratio is small, particularly when the duty ratio is 40% or less, the plasma potential is small, and the etching rate of the chamber body 12 is significantly reduced. Therefore, by setting the above-mentioned duty ratio regarding the periodic application of the negative DC voltage to the lower electrode 18 to 40% or less, it is possible to suppress the reduction in the etching rate of the substrate W and to reduce the energy of the ions irradiated to the inner wall of the chamber body 12. As a result, the generation of particles from the chamber body 12 is suppressed. Note that when the duty ratio is 35% or less, it is possible to further reduce the energy of the ions irradiated to the inner wall of the chamber body 12.

[0039] Another embodiment will be described below. Figures 6(a) and 6(b) are timing charts related to a plasma processing method of another embodiment. In each of Figures 6(a) and 6(b), the horizontal axis indicates time. In each of Figures 6(a) and 6(b), the vertical axis indicates the power of the first high frequency and the DC voltage applied to the lower electrode 18 from the DC power supply 70. In each of Figures 6(a) and 6(b), the high level of the power of the first high frequency indicates that the first high frequency is being supplied to generate plasma, and the low level of the power of the first high frequency indicates that the supply of the first high frequency is stopped. In addition, in each of Figures 6(a) and 6(b), a low level of DC voltage indicates that a negative DC voltage is being applied from the DC power supply 70 to the lower electrode 18, and a DC voltage of 0 V indicates that no DC voltage is being applied from the DC power supply 70 to the lower electrode 18.

[0040] In the embodiment shown in Fig. 6(a), a negative DC voltage is periodically applied to the lower electrode 18 from the DC power supply 70, and a first high frequency is periodically supplied to generate plasma. In the embodiment shown in Fig. 6(a), the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 and the supply of the first high frequency are synchronized. That is, the first high frequency is supplied during a period T1 when the DC voltage from the DC power supply 70 is applied to the lower electrode 18, and the supply of the first high frequency is stopped during a period T2 when the application of the DC voltage from the DC power supply 70 to the lower electrode 18 is stopped.

[0041] In the embodiment shown in Fig. 6(b), a negative DC voltage from the DC power supply 70 is periodically applied to the lower electrode 18, and a first high frequency wave is periodically supplied to generate plasma. In the embodiment shown in Fig. 6(b), the phase of the supply of the first high frequency wave is inverted with respect to the phase of the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18. That is, the supply of the first high frequency wave is stopped during a period T1 when the DC voltage from the DC power supply 70 is applied to the lower electrode 18, and the first high frequency wave is supplied during a period T2 when the application of the DC voltage from the DC power supply 70 to the lower electrode 18 is stopped.

[0042] In the embodiment shown in Fig. 6(a) and the embodiment shown in Fig. 6(b), the above-mentioned control signal from the controller PC is provided to the first high frequency power supply 61. The first high frequency power supply 61 starts supplying the first high frequency at the timing of the rising (or falling) of the control signal from the controller PC, and stops supplying the first high frequency at the timing of the falling (or rising) of the control signal from the controller PC. In the embodiment shown in Fig. 6(a) and the embodiment shown in Fig. 6(b), generation of unintended high frequency due to intermodulation distortion can be suppressed.

[0043] Hereinafter, plasma processing apparatuses according to some other embodiments will be described. FIG. 7 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. As shown in FIG. 7, a plasma processing apparatus 10A according to another embodiment is different from the plasma processing apparatus 10 in that a first high frequency power supply 61 includes a controller PC. That is, in the plasma processing apparatus 10A, the controller PC is a part of the first high frequency power supply 61. On the other hand, in the plasma processing apparatus 10, the controller PC is separate from the first high frequency power supply 61 and the second high frequency power supply 62. In the plasma processing apparatus 10A, since the controller PC is a part of the first high frequency power supply 61, the above-mentioned control signal (pulse signal) from the controller PC is not transmitted to the first high frequency power supply 61.

[0044] FIG. 8 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to yet another embodiment. The plasma processing apparatus 10B shown in FIG. 8 includes a plurality of DC power supplies 701 and 702, and a plurality of switching units 721 and 722. Each of the plurality of DC power supplies 701 and 702 is a power supply similar to the DC power supply 70, and is configured to generate a negative DC voltage to be applied to the lower electrode 18. Each of the plurality of switching units 721 and 722 has a configuration similar to that of the switching unit 72. The DC power supply 701 is connected to the switching unit 721. The switching unit 721 is configured to be able to stop the application of the DC voltage from the DC power supply 701 to the lower electrode 18, similar to the switching unit 72. The DC power supply 702 is connected to the switching unit 722. The switching unit 722 is configured to be able to stop the application of the DC voltage from the DC power supply 702 to the lower electrode 18, similar to the switching unit 72.

[0045] 9 is a timing chart related to a plasma processing method of an embodiment executed by using the plasma processing apparatus shown in FIG. 8. In FIG. 9, the horizontal axis indicates time. In FIG. 9, the vertical axis indicates the combined DC voltage (i.e., the DC voltage applied to the lower electrode 18), the DC voltage of the DC power supply 701 (i.e., the DC voltage applied from the DC power supply 701 to the lower electrode), and the DC voltage of the DC power supply 702 (the DC voltage applied from the DC power supply 702 to the lower electrode). As shown in FIG. 9, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 in each period PDC is formed by a plurality of DC voltages output in sequence from the plurality of DC power supplies 701 and 702. That is, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 in each period PDC is generated by a temporal combination of a plurality of DC voltages output in sequence from the plurality of DC power supplies 701 and 702. According to the plasma processing apparatus 10B, the load on each of the DC power supplies 701 and 702 is reduced.

[0046] In the plasma processing apparatus 10B, the controller PC supplies a control signal to the switching unit 721, which has a high level (or a low level) during a period when the DC voltage from the DC power supply 701 is applied to the lower electrode 18 and has a low level (or a high level) during a period when the DC voltage from the DC power supply 701 is not applied to the lower electrode 18. The controller PC also supplies a control signal to the switching unit 722, which has a high level (or a low level) during a period when the DC voltage from the DC power supply 702 is applied to the lower electrode 18 and has a low level (or a high level) during a period when the DC voltage from the DC power supply 702 is not applied to the lower electrode 18. That is, a control signal (pulse signal) having a different phase is supplied to each of the multiple switching units connected to the multiple DC power supplies.

[0047] FIG. 10 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to yet another embodiment. The plasma processing apparatus 10C shown in FIG. 10 is different from the plasma processing apparatus 10 in that it further includes a waveform adjuster 76. The waveform adjuster 76 is connected between the switching unit 72 and the high-frequency filter 74. The waveform adjuster 76 adjusts the waveform of the DC power output from the DC power supply 70 via the switching unit 72, that is, the DC voltage having a negative polarity value and a value of 0V alternately. Specifically, the waveform adjuster 76 adjusts the waveform of the DC voltage applied to the lower electrode 18 so that the waveform of the DC voltage has a substantially triangular shape. The waveform adjuster 76 is, for example, an integrating circuit.

[0048] FIG. 11 is a circuit diagram showing an example of the waveform adjuster 76. The waveform adjuster 76 shown in FIG. 11 is configured as an integrating circuit, and includes a resistive element 76a and a capacitor 76b. One end of the resistive element 76a is connected to the resistive element 72d of the switching unit 72, and the other end of the resistive element 76a is connected to the high-frequency filter 74. One end of the capacitor 76b is connected to the other end of the resistive element 76a. The other end of the capacitor 76b is connected to the ground. In the waveform adjuster 76 shown in FIG. 11, a delay occurs in the rise and fall of the DC voltage output from the switching unit 72 according to a time constant determined by the resistance value of the resistive element 76a and the capacitance value of the capacitor 76b. Therefore, the waveform adjuster 76 shown in FIG. 11 makes it possible to apply a voltage having a pseudo triangular waveform to the lower electrode 18. The plasma processing apparatus 10C including such a waveform adjuster 76 makes it possible to adjust the energy of the ions irradiated to the inner wall of the chamber body 12.

[0049] Although various embodiments have been described above, various modifications can be made without being limited to the above-mentioned embodiments. For example, the plasma processing apparatus of the various embodiments described above may not have the second high frequency power supply 62. That is, the plasma processing apparatus of the various embodiments described above may have a single high frequency power supply.

[0050] In addition, in the various embodiments described above, the application of a negative DC voltage from the DC power supply to the lower electrode 18 and its stop are switched between by a switching unit, but if the DC power supply itself is configured to switch between outputting a negative DC voltage and stopping the output, the switching unit is not necessary.

[0051] In addition, the characteristic configurations of the various embodiments described above can be used in any combination. Furthermore, the plasma processing apparatus according to the various embodiments described above is a capacitively coupled plasma processing apparatus, but the plasma processing apparatus in the modified embodiment may be an inductively coupled plasma processing apparatus.

[0052] When the duty ratio is high, the energy of the ions irradiated to the chamber body 12 increases. Therefore, by setting the duty ratio to a high value, for example, a value greater than 40%, it becomes possible to clean the inner wall of the chamber body 12.

[0053] The present disclosure also includes the following aspects and embodiments.

[0054] In one aspect, a plasma processing method is provided that is performed in a plasma processing apparatus. The plasma processing apparatus includes a chamber body, a stage, a radio frequency power supply, and one or more DC power supplies. The chamber body provides an internal space thereof as a chamber. The stage is provided in the chamber body. The stage includes a lower electrode. The stage is configured to support a substrate placed thereon. The radio frequency power supply is configured to supply radio frequency waves for exciting a gas supplied to the chamber. The one or more DC power supplies are configured to generate a DC voltage having a negative polarity that is applied to the lower electrode. The plasma processing method according to one aspect includes (i) a step of supplying radio frequency waves from the radio frequency power supply to generate plasma of a gas supplied to the chamber, and (ii) a step of applying a DC voltage having a negative polarity from the one or more DC power supplies to the lower electrode to attract ions in the plasma to the substrate. In the step of applying the DC voltage, the DC voltage is applied periodically to the lower electrode, and a ratio of a period during which the DC voltage is applied to the lower electrode in each period is set to 40% or less.

[0055] The etching rate of the substrate is less dependent on the ratio of the period during which the negative DC voltage is applied to the lower electrode in each period, i.e., the duty ratio. On the other hand, when the duty ratio is small, particularly when the duty ratio is 40% or less, the etching rate of the chamber body is significantly reduced. That is, the energy of the ions irradiated to the inner wall of the chamber body is reduced. Therefore, according to the plasma processing method of one embodiment, it is possible to suppress the reduction in the etching rate of the substrate and reduce the energy of the ions irradiated to the inner wall of the chamber body.

[0056] In one embodiment, the ratio, i.e., the duty ratio, is set to 35% or less. According to this embodiment, it is possible to further reduce the energy of the ions irradiated onto the inner wall of the chamber body.

[0057] In one embodiment, the plasma processing apparatus includes a plurality of DC power supplies as the one or more DC power supplies. The DC voltage applied to the lower electrode in each period is formed by a plurality of DC voltages outputted in sequence from the plurality of DC power supplies. According to this embodiment, the load of each of the plurality of DC power supplies is reduced.

[0058] In one embodiment of the plasma processing method, a high frequency wave is supplied during a period when a DC voltage is applied, and the supply of the high frequency wave is stopped during a period when the application of the DC voltage is stopped. In another embodiment of the plasma processing method, the supply of the high frequency wave is stopped during a period when a DC voltage is applied, and the high frequency wave is supplied during a period when the application of the DC voltage is stopped.

[0059] In another aspect, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber body, a stage, a high frequency power supply, one or more DC power supplies, a switching unit, and a controller. The apparatus includes a chamber body, a stage, a high frequency power supply, and one or more DC power supplies. The chamber body provides an internal space as a chamber. The stage is provided in the chamber body. The stage includes a lower electrode. The stage is configured to support a substrate placed thereon. The high frequency power supply is configured to supply a high frequency for exciting a gas supplied to the chamber. The one or more DC power supplies are configured to generate a DC voltage having a negative polarity that is applied to the lower electrode. The switching unit is configured to be able to stop application of the DC voltage to the lower electrode. The controller is configured to control the switching unit. The controller controls the switching unit to periodically apply a negative DC voltage from the one or more DC power supplies to the lower electrode in order to attract ions in a plasma of a gas generated in the chamber to the substrate, and to set a ratio of a period during which the DC voltage is applied to the lower electrode to 40% or less in each period.

[0060] In one embodiment, the controller may control the switching unit to set the ratio, ie, the duty ratio, to 35% or less.

[0061] In one embodiment, the plasma processing apparatus includes a plurality of DC power supplies as the one or more DC power supplies, and the controller controls the switching unit to form the DC voltage applied to the lower electrode in each period by a plurality of DC voltages outputted in sequence from the plurality of DC power supplies.

[0062] In one embodiment, the controller controls the high frequency power supply so that the high frequency is supplied during a period when the DC voltage is applied and the supply of the high frequency is stopped during a period when the application of the DC voltage is stopped. In another embodiment, the controller controls the high frequency power supply so that the supply of the high frequency is stopped during a period when the DC voltage is applied and the high frequency is supplied during a period when the application of the DC voltage is stopped.

[0063] An evaluation experiment conducted on a plasma processing method using the plasma processing apparatus 10 will now be described.

[0064] (First evaluation experiment)

[0065] In the first evaluation experiment, a sample having a silicon oxide film was attached to the chamber 12c side surface of the top plate 34 of the plasma processing apparatus 10 and to the side wall of the chamber body 12, and the sample having a silicon oxide film was placed on the electrostatic chuck 20, and plasma processing was performed under the conditions shown below. In the first evaluation experiment, the duty ratio of the negative DC voltage periodically applied to the lower electrode 18 was used as a variable parameter.

[0066] <Conditions of plasma processing in the first evaluation experiment> Pressure in chamber 12c: 20 mTorr (2.66 Pa) Flow rate of gas supplied to chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150sccm 1st High Frequency: 100MHz, 500W Continuous Wave Negative DC voltage to the lower electrode 18 Voltage value: -3000V Frequency: 200kHz Processing time: 60 seconds

[0067] In the first evaluation experiment, the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c, the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample attached to the side wall of the chamber body 12, and the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample placed on the electrostatic chuck 20 were measured. FIG. 12(a) is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c, which was obtained in the first evaluation experiment. FIG. 12(b) is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12, which was obtained in the first evaluation experiment. FIG. 13 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck 20, which was obtained in the first evaluation experiment.

[0068] As shown in FIG. 13, the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck 20 was less dependent on the duty ratio. Also, as shown in FIG. 12(a) and FIG. 12(b), when the duty ratio was 35% or less, the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c and the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12 were considerably small. Therefore, the first evaluation experiment confirmed that the etching rate of the substrate is less dependent on the duty ratio of the period during which the negative DC voltage is applied to the lower electrode 18 in each period PDC. Also, when the duty ratio is small, particularly when the duty ratio is 35% or less, it was confirmed that the etching rate of the chamber body 12 is significantly reduced, that is, the energy of the ions irradiated to the inner wall of the chamber body 12 is reduced. It is presumed from the graphs of FIGS. 12(a) and 12(b) that if the duty ratio is 40% or less, the energy of the ions irradiated onto the inner wall of the chamber body 12 will be significantly small.

[0069] (Second evaluation experiment)

[0070] In the second evaluation experiment, a sample having a silicon oxide film was attached to the chamber 12c side surface of the top plate 34 of the plasma processing device 10 and to the side wall of the chamber body 12, and the sample having a silicon oxide film was placed on the electrostatic chuck 20, and plasma processing was performed under the conditions shown below.

[0071] <Conditions of plasma processing in the second evaluation experiment> Pressure in chamber 12c: 20 mTorr (2.66 Pa) Flow rate of gas supplied to chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150sccm 1st High Frequency: 100MHz, 500W Continuous Wave Negative DC voltage to the lower electrode 18 Voltage value: -3000V Frequency: 200kHz Duty ratio: 35% Processing time: 60 seconds

[0072] In a comparative experiment, a sample having a silicon oxide film was attached to the surface of the top plate 34 of the plasma processing apparatus 10 facing the chamber 12c and to the side wall of the chamber body 12, and the sample having a silicon oxide film was placed on the electrostatic chuck 20, and plasma processing was performed under the conditions shown below. The second high frequency conditions in the comparative experiment were set so that the amount of etching (amount of film thickness reduction) of the silicon oxide film of the sample placed on the electrostatic chuck 20 was approximately equal between the plasma processing in the second evaluation experiment and the plasma processing in the comparative experiment.

[0073] <Plasma treatment conditions in comparative experiments> Pressure in chamber 12c: 20 mTorr (2.66 Pa) Flow rate of gas supplied to chamber 12c C4F8 gas: 24sccm O2 gas: 16sccm Ar gas: 150sccm 1st High Frequency: 100MHz, 500W Continuous Wave Secondary high frequency: 400kHz, 2500W continuous wave Processing time: 60 seconds

[0074] In each of the second evaluation experiment and the comparative experiment, the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c and the etching amount (amount of film thickness reduction) of the silicon oxide film of the sample attached to the side wall of the chamber body 12 were measured. FIG. 14(a) is a graph showing the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c obtained in each of the second evaluation experiment and the comparative experiment, and FIG. 14(b) is a graph showing the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber body 12 obtained in each of the second evaluation experiment and the comparative experiment. In the graph of FIG. 14(a), the horizontal axis indicates the radial distance from the center of the chamber 12c to the measurement position in the sample attached to the surface of the top plate 34 facing the chamber 12c, and the vertical axis indicates the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c. In the graph of (b) of Figure 14, the horizontal axis indicates the vertical distance from the chamber 12c side surface of the top plate 34 to the measurement position in the sample affixed to the side wall of the chamber 12c, and the vertical axis indicates the etching amount of the silicon oxide film of the sample affixed to the side wall of the chamber body 12.

[0075] 14(a) and 14(b), in the second evaluation experiment in which a negative DC voltage was periodically applied to the lower electrode 18, the etching amount of the silicon oxide film of the sample attached to the surface of the top plate 34 facing the chamber 12c and the silicon oxide film of the sample attached to the side wall of the chamber body 12 was significantly smaller than that in the comparative experiment using the second high frequency wave. Therefore, it was confirmed that, compared to the case of using the second high frequency wave, that is, the high frequency wave for bias, by periodically applying a negative DC voltage to the lower electrode 18, it is possible to significantly reduce the energy of the ions irradiated to the wall surfaces of the chamber body 12 and the upper electrode 30 while suppressing a decrease in the energy of the ions irradiated to the substrate on the electrostatic chuck 20. [Explanation of symbols]

[0076] 10...plasma processing apparatus, 12...chamber body, 12c...chamber, 16...stage, 18...lower electrode, 20...electrostatic chuck, 30...upper electrode, 34...top plate, 50...exhaust device, 61...first high frequency power supply, 62...second high frequency power supply, 64...matching box, 70...DC power supply, 72...switching unit, 74...high frequency filter, 76...waveform adjuster, PC...controller, MC...main control unit.

Claims

1. A chamber and A stage having a bias electrode and provided within the chamber, A high-frequency power supply configured to output high-frequency power for exciting the gas in the chamber, One or more DC power supplies configured to output a DC voltage, A switching unit connected between the one or more DC power supplies and the bias electrode, configured to periodically switch between connecting and disconnecting the one or more DC power supplies and the bias electrode, A controller that controls the switching unit and the high-frequency power supply so that the supply of the high-frequency power is stopped during the first period and supplied during the second period, in each cycle including a first period in which the one or more DC power supplies and the bias electrode are connected and a second period in which the one or more DC power supplies and the bias electrode are not connected, A plasma processing apparatus equipped with the following features.

2. The plasma processing apparatus according to claim 1, wherein the switching unit includes a first transistor and a second transistor connected in series with respect to each other.

3. The source of the first transistor is connected to the one or more DC power supplies, The source of the second transistor is connected to ground potential. The gate of the first transistor is connected to the gate of the second transistor. The controller is connected to the node between the gate of the first transistor and the gate of the second transistor. The drain of the first transistor is connected to the drain of the second transistor. The bias electrode is connected to the node between the drain of the first transistor and the drain of the second transistor. The plasma processing apparatus according to claim 2.

4. The plasma processing apparatus according to claim 2 or 3, wherein the first transistor and the second transistor are field-effect transistors.

5. The plasma processing apparatus according to any one of claims 1 to 4, wherein the proportion occupied by the first period in each of the cycles is 40% or less.

6. The plasma processing apparatus according to claim 5, wherein the proportion occupied by the first period in each of the cycles is 25% or more and 35% or less.

7. The plasma processing apparatus according to any one of claims 1 to 6, wherein the DC voltage has negative polarity.

8. A chamber and A stage provided inside the chamber, An electrode provided within the aforementioned stage, A high-frequency power supply configured to periodically output high-frequency power for generating plasma from the gas in the chamber, A DC power supply configured to periodically apply a DC voltage to the electrodes, A controller configured to control the high-frequency power supply and the DC power supply so as to alternately repeat a first period in which the DC voltage is applied to the electrodes and the high-frequency power is not output, and a second period in which the high-frequency power is output and the DC voltage is not applied to the electrodes, A plasma processing apparatus equipped with the following features.

9. The plasma processing apparatus according to claim 8, wherein the duty cycle of the DC voltage is 40% or less.

10. The plasma processing apparatus according to claim 9, wherein the duty cycle of the DC voltage is 25% or more and 35% or less.

11. The plasma processing apparatus according to any one of claims 8 to 10, wherein the DC voltage has negative polarity.

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