Shield Contact in Shielded Gate MOSFET

Abstract

The device (100, 250) includes a mesa (102, 202, 302, 402, 502) disposed between a pair of vertical trenches (101, 201, 301, 401, 501, 801) in a semiconductor substrate (105, 210, 310). A gate electrode (104g, 201G, 301G) is disposed in each of the pair of vertical trenches (101, 201, 301, 401, 501, 801), and a shield electrode (104s, 201S, 301S) is disposed below each of the gate electrodes (104g, 201G, 301G) in the pair of vertical trenches (101, 201, 301, 401, 501, 801). The device (100, 250) further includes a bridge connection trench (205, 305, 405, 505) that crosses the mesa (102, 202, 302, 402, 502). The bridge connection trench (205, 305, 405, 505) is in fluid communication with each of the pair of vertical trenches (101, 201, 301, 401, 501, 801). The bridge shield electrode (204S, 304S) is disposed in the bridge connection trench (205, 305, 405, 505) and is coupled to a shield electrode (104s, 201S, 301S) that is disposed below each of the gate electrodes (104g, 201G, 301G) in the pair of vertical trenches (101, 201, 301, 401, 501, 801).

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application is a joint venture of U.S. Provisional Patent Application No. 63 / 166,919, filed March 26, 2021. , and March 2022 9th This application claims priority to and benefit of U.S. patent application Ser. No. 17 / 653,235, filed on 2006-02-13, both of which are incorporated herein by reference in their entireties.

[0002] FIELD OF THEINVENTION The present disclosure relates to contacts in shielded gate trench MOSFETs. [Background technology]

[0003] As semiconductor devices (e.g., device cell dimensions) shrink, it becomes increasingly difficult to fabricate gate and shield contacts in semiconductor devices (e.g., shielded gate trench MOSFETs). Different lithographic design rules may be used for the active and contact regions of the semiconductor device. For proper device function, the charge in the drift region of the MOSFET must be well controlled and balanced in both the active and contact regions to avoid adversely affecting the breakdown voltage of the device. Summary of the Invention

[0004] In a general aspect, a device (e.g., a MOSFET) includes a mesa disposed between a pair of vertical trenches in a semiconductor substrate. The pair of vertical trenches includes a first vertical trench aligned parallel to a second vertical trench from the pair of vertical trenches. A gate electrode is disposed in each of the pair of vertical trenches, and a shield electrode is disposed below each of the gate electrodes in the pair of vertical trenches. Further, a bridge connection trench crosses the mesa and connects the pair of vertical trenches. The bridge connection trench is aligned along a direction perpendicular to the parallel direction of the pair of vertical trenches. A bridge shield electrode is disposed in the bridge connection trench and is coupled to each of the shield electrodes in the pair of vertical trenches. The bridge shield electrode exposes a shield electrode contact element in the bridge connection trench. The shield electrode contact element in the bridge connection trench is connected to a source metal of the device.

[0005] In a general aspect, a device (e.g., a MOSFET) includes a first mesa disposed between a first pair of vertical trenches in a semiconductor substrate and a second mesa disposed between a second pair of vertical trenches in the semiconductor substrate. The first mesa, the second mesa, and the first and second pairs of vertical trenches extend longitudinally on the semiconductor substrate from an active region of the device through a shield contact region of the device. Further, a gate electrode is disposed within each of the first and second pairs of vertical trenches, and a shield electrode is disposed below the gate electrode in each of the first and second pairs of vertical trenches. A first bridge connection trench is disposed across the first mesa at a first location, and a second bridge connection trench is disposed across the second mesa at a second location. The first bridge connection trench is in fluid communication with the first pair of vertical trenches, and the second bridge connection trench is in fluid communication with the second pair of vertical trenches.

[0006] In a general aspect, the method includes forming a mesa between a pair of vertical trenches in a semiconductor substrate and forming a bridge connection trench in the mesa in fluid communication with the pair of vertical trenches. The method further includes disposing a shield electrode in each of the pair of vertical trenches along a length of the pair of vertical trenches, disposing a gate electrode in the pair of vertical trenches longitudinally aligned above the shield electrode, and disposing a bridge shield electrode in the bridge connection trench. The bridge shield electrode is coupled to the shield electrode disposed below the gate electrode in the pair of vertical trenches. The method further includes exposing a shield electrode contact element in the bridge connection trench. [Brief description of the drawings]

[0007] [Figure 1A] 1 illustrates a portion of an example device layout for a shielded gate trench MOSFET device. [Figure 1B] FIG. 1B is a cross-sectional view of a portion of the shielded gate trench MOSFET device of FIG. 1A. [Figure 1C] FIG. 1B is a cross-sectional view of a portion of the shielded gate trench MOSFET device of FIG. 1A. [Figure 1D] 1B illustrates another portion of the exemplary device layout of the shielded gate trench MOSFET device of FIG. 1A. [Figure 2A] 1 illustrates a portion of an example device layout for a shielded gate trench MOSFET device. [Figure 2B] 2B shows a cross-sectional view of a portion of the shielded gate trench MOSFET device of FIG. 2A. [Figure 2C] 2B illustrates another portion of the example device layout of the shielded gate trench MOSFET device of FIG. 2A. [Diagram 3] 1 illustrates an example device layout for a shielded gate trench MOSFET device with a bridge connection trench. [Figure 4]1 illustrates a portion of an example device layout for a shielded gate trench MOSFET device with a bubble mesa. [Diagram 5] 1 shows a portion of a device layout having a mesa pattern, including bubble and non-bubble mesas. [Figure 6] 1 illustrates the use of an exemplary repeating pattern of bubble and non-bubble mesas in a device layout. [Figure 7A] 1 is an illustration of a cross-sectional view of a shielded gate trench MOSFET device. [Figure 7B] FIG. 7B is a top view of an example contact structure layout of the shielded gate trench MOSFET device of FIG. [Figure 8] 1 illustrates an example device layout for a shielded gate trench MOSFET device, including both narrow and wide trenches. [Figure 9] 1 illustrates an exemplary method for making contact to a shield electrode in a shielded gate trench MOSFET device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Metal oxide semiconductor field effect transistor (MOSFET) devices are used in many power switching applications. In a typical MOSFET device, a gate electrode provides turn-on and turn-off control of the device in response to an applied gate voltage. For example, in an N-type enhancement mode MOSFET, turn-on occurs when a conductive N-type inversion layer (i.e., channel region) forms in the p-type body region in response to a positive gate voltage that exceeds a characteristic threshold voltage. The inversion layer connects the N-type source region to the N-type drain region and allows majority carrier conduction between these regions.

[0009] In a trench MOSFET device, a gate electrode is formed in a trench that extends downward (e.g., vertically downward) from a major surface of a semiconductor material (which may also be referred to as a semiconductor region), such as silicon. Additionally, a shield electrode may be formed below the gate electrode in the trench (and insulated via an inter-electrode dielectric). Current flow in a trench MOSFET device is primarily vertical (e.g., in an N-doped drift region), resulting in more densely packed device cells. A device cell may include, for example, a trench that includes the gate electrode and the shield electrode. Adjacent mesas that include the drain, source, body, and channel regions of the device.

[0010] The current handling capability of a trench MOSFET device is determined by its gate channel width. To minimize cost, it may be important to keep the transistor die area size as small as possible and increase the width of the channel surface area (i.e., increase the "channel density") by creating cell structures that are repeated across the entire area of ​​the MOSFET die. A method of increasing channel density (and thus increasing channel width) is to shrink the size of the device cells, packing more device cells at a smaller pitch within a given surface area.

[0011] An exemplary trench MOSFET device may include an array of hundreds or thousands of device cells (each including a trench and an adjacent mesa). The device cells may be referred to herein as trench-mesa cells because each device cell geometrically includes a trench and a mesa (or two half-mesa) structure. The shield and gate electrodes (e.g., shield electrode 104s and gate electrode 104g in FIG. 7A) may be formed inside a linear trench (e.g., trench 101) that extends along (e.g., aligned with) a mesa (e.g., mesa 102). The shield and gate electrodes may be made of polysilicon (e.g., “n+ shield polysilicon” and “n+ gate polysilicon”) and separated from each other by a dielectric layer (e.g., inter-poly dielectric (IPD) layer 208, FIG. 1B). The IPD layer may be, for example, an oxide layer. The shield and gate electrodes are also separated from the silicon in the mesa by a dielectric layer (e.g., shield dielectric layer and gate dielectric layer).

[0012] To ensure proper electrical contact of all cells, a "planar stripe" structure is often used for trench MOSFETs fabricated on a semiconductor die surface. In the planar stripe structure, a gate electrode ("gate") and a shield electrode ("shield poly") in a trench (e.g., a linear trench) are positioned to extend (e.g., be aligned) along the length of the trench in a vertical stripe. The gate electrode (e.g., made of gate poly) is positioned above (or above) the shield electrode (e.g., made of shield poly) along the length of the trench. The gate poly in the trench is exposed and contacted at the stripe ends by a gate runner (e.g., gate metal), and the shield electrode (shield poly) in the trench is exposed and raised to the surface (using a masking step) at locations along the length of the trench for contact by the source metal.

[0013] In modern trench MOSFET devices (e.g., with narrow line widths), shield resistance is a factor that affects device efficiency and performance. Lower shield resistance can be obtained by making multiple contacts to the shield poly in the trench (e.g., by vertically raising the shield poly to the surface at multiple locations to make multiple shield contacts with the source metal).

[0014] By raising the shield poly (from just below the gate poly) perpendicular to the surface, the continuity of the gate poly running along the length of the trench is interrupted or broken. The gate poly is divided into two discontinuous segments by each instance of the shield poly raised perpendicular to the surface. In an exemplary implementation, two separate gate runners (e.g., gate metal strips) at the ends of the stripe contact the two discontinuous gate poly segments created by a single instance of the shield poly raised vertically through the trench to the surface. death Multiple instances of shield poly pulled vertically up to the surface through trenches can result in isolated gate poly segments that are floating (i.e., not connected by two separate gate runners).

[0015] The disclosure herein describes exemplary device configurations or layouts for making multiple contacts at different locations to a shield electrode in a trench while maintaining the continuity of the gate electrode extending above the shield electrode in the trench.

[0016] In an exemplary implementation of a device configuration or layout for making multiple contacts at different locations to a shield electrode, a mesa is disposed between a pair of vertical trenches (e.g., a first vertical trench aligned parallel to a second vertical trench). A bridge connection trench is disposed across (e.g., through) the mesa between two adjacent trenches. The bridge connection trench bridges or connects the two adjacent trenches. Placing the bridge connection trench may include cutting or etching the mesa and opening a link or passage that bridges or connects the two adjacent trenches (such that the bridge connection trench is in fluid communication with the two adjacent trenches). The adjacent trenches may be adjacent trenches through the bridge connection trench. In some implementations, the shield electrode in the adjacent trench is brought to the surface of the device through or from the bridge connection trench. The shield electrode in the adjacent trench is raised to approximately the top surface of the bridge connection trench without breaking the continuity of the gate electrode that extends above the shield electrode in the adjacent trench. A shield electrode contact element (bridge shield electrode contact element) may be disposed above a bridge connection trench (i.e., a surface of a trench filled with, for example, oxide or shield poly for a bridge shield electrode) that crosses the mesa between adjacent trenches.

[0017] FIG. 1A illustrates a portion of an example device layout 200 of a shielded gate trench MOSFET device (e.g., device 250 of FIGS. 1B and 1C) in which a bridge connection trench is disposed across a mesa to bridge or connect trenches adjacent to the mesa.

[0018] 1A illustrates, for example, two trenches 201 of a device that run parallel (e.g., substantially parallel) to each other, and a mesa 202 between the two trenches 201. The trench 201 and mesa 202 can be linear trenches and mesas (e.g., extending in the y-direction), respectively. The trench 201 and mesa 202 can have uniform widths Wt and Wm (e.g., lateral width in the x-direction), respectively. A bridge connection trench (e.g., bridge connection trench 205) can cross (i.e., across) the mesa 202 at a location to interconnect or connect two trenches 201 adjacent to the mesa 202. The bridge connection trench 205 can be perpendicular (e.g., substantially perpendicular) to the length of the trench 201 and mesa 202 (i.e., the bridge connection trench 205 can cross (cross) the mesa 202 in the x-direction). The bridge connection trench 205 may be in fluid communication with each of the two trenches 201. The trenches (i.e., trench 201 and bridge connection trench 205) may have, for example, the same or approximately the same vertical depth TD referenced from the top surface of mesa 202 (see, for example, Figures 1B and 1C).

[0019] The gate electrode of the device (e.g., gate electrode 201G) may extend through (or be disposed within) the two trenches 201. Additionally, the shield electrode of the device may extend (e.g., be disposed below) or below the gate electrode in the trench. The shield electrode is not visible in FIG. 1A because it is below or below the gate electrode. The shield electrode may be made of polysilicon material (shield poly). As shown in FIG. 1B, the shield poly material of the shield electrode (e.g., shield electrode 201S) may extend laterally (in the x-direction perpendicular to the length of the trench) from the trench 201 into the bridge connection trench 205. In FIG. 1A, the region of the device layout 200 where the shield poly material extends into the bridge connection trench 205 is shown diagrammatically by the dashed rectangle 204. The shield poly material that extends into the bridge connection trench 205 may rise in height to approximately the surface of the bridge connection trench 205 (across at least a portion of the width of the bridge connection trench 205). The shield poly material that extends into the bridge connection trench 205 may be referred to herein as the bridge shield electrode.

[0020] The shield poly in the bridge connection trench 205 may be exposed as a shield electrode contact element (eg, bridge shield electrode contact element 204sc) for connection to, for example, the source metal of the device.

[0021] 1B shows a cross-sectional view of a portion of a device 250 that may be formed using device layout 200. The cross-sectional view (taken in the zx plane along line DD in FIG. 1A) is across, for example, trench 201 and bridge connection trench 205 disposed across mesa 202 between two trenches 201. The trenches (i.e., trench 201 and bridge connection trench 205) may have approximately the same depth TD (e.g., referenced from the top surface of mesa 202).

[0022] As shown in FIG. 1B, the two trenches 201 include a gate electrode 201G (e.g., made of gate poly) and a shield electrode 201S (e.g., made of shield poly) disposed below or below the gate electrode 201G in the two trenches 201. The IPD layer 208 can separate the gate electrode 201G from the shield electrode 201S disposed below or below the gate electrode 201G in the two trenches 201. A gate oxide (e.g., gate oxide 201Gox) can be disposed between the gate electrode and the p-body region (p-body 253) of the adjacent mesa 202. The shield electrode 201S in the trench can be separated from the adjacent mesa 202 by a dielectric layer (e.g., shield oxide 201Sox).

[0023] The shield poly of the shield electrode 201S may extend laterally into the bridge connection trench 205 and rise up to approximately the top surface S of the mesa 202 along the side of the gate electrode in the bridge connection trench 205 as a bridge shield electrode 204S. In an exemplary implementation, the IPD layer 208 separating the gate electrode 201G from the shield electrode 201S may be a boron silica glass (BSG) layer. Additionally, the bridge shield electrode 204S (in the bridge connection trench 205) may be separated from the gate poly (in the trench 201) by a dielectric layer 207 (e.g., an oxide layer such as boron silica glass (BSG)). The dielectric layer 207 and the IPD layer 208 may be formed in a single processing step or separate processing steps. The gate electrodes 201G in the two trenches 201 remain separated by distance and are not in electrical contact with each other (separated from the bridge shield electrode 204S in the bridge connection trench 205 by a dielectric layer 207 (e.g., boron silica glass (BSG))). An inter-layer dielectric (e.g., inter-layer dielectric (ILD) 209) may be disposed on top of the device, for example, to passivate exposed surfaces (e.g., surface S of mesa 202 or surface SS of the shield poly).

[0024] A shield electrode contact element (eg, bridge shield electrode contact element 204sc) is formed on surface SS of the shield poly (eg, in some example implementations, by patterning and etching interlayer dielectric 209).

[0025] 1C shows another cross-sectional view of a portion of a device 250 that may be formed using device layout 200. The cross-sectional view (taken in the zy plane along line EE of FIG. 1A) is across the length (in the y direction) of a bridge connection trench 205 disposed across mesa 202, for example. Bridge connection trench 205 includes bridge shield electrode 204S. In the illustrated exemplary implementation, the shield poly material of bridge shield electrode 204S has a top surface SS that is approximately flush with top surface S of mesa 202, and may be covered with an interlayer dielectric 209.

[0026] As previously mentioned, the bridge shield electrode contact element 204sc is formed on the surface SS of the shield poly (eg, in some implementations, by patterning and etching the interlayer dielectric 209).

[0027] FIG. 1D illustrates a larger portion of an exemplary device layout 200 (shown in FIG. 2A) for a trench MOSFET device (eg, device 250 of FIGS. 1B and 1C).

[0028] As shown in Figure 1D, device layout 200 includes multiple mesas 202 and trenches 201, for example, of a trench MOSFET device formed on a silicon substrate 210. Mesas 202 and trenches 201 are shown extending generally longitudinally (in the y-direction) across silicon substrate 210, for example, between source regions 21. Source and body contact elements 154 of the device are formed in mesas 202 in the source regions (e.g., source regions 21) of the device. In Figure 2C, source regions 21 are shown at the top and bottom of layout 200, for example.

[0029] Further, in the bridge connection region 22, a bridge connection trench 205 is formed across the mesa 202 to link or connect the trenches 201. The bridge connection trench 205 can link or connect a pair of trenches (i.e., two trenches 201) adjacent to the mesa 202.

[0030] The bridging trenches 205 may be formed, for example, along a horizontal axis (e.g., axis AA-AA) across some or all of the mesas 202 in the device layout 200. The bridging trenches 205 that cross different mesas 202 in the device layout 200 may be located at a uniform distance (e.g., distance D) from the source regions 21 along the length of the mesa.

[0031] The bridge connection trench 205 can include a shield poly (e.g., bridge shield electrode 204S) that is elevated (pulled up) near a top surface of the bridge connection trench 205. The bridge shield electrode 204S can be exposed in the bridge connection trench 205, for example, as a shield electrode contact element (e.g., bridge shield electrode contact element 204sc) for contacting a source metal of the device.

[0032] In some implementations, the bridge shield electrode 204S (e.g., shield poly) may not be raised or raised to approximately the top surface S of the mesa adjacent to the bridge connection trench. The shield poly of the bridge shield electrode 204S may be raised partway toward the top surface of the bridge connection trench (e.g., approximately the same height as the shield electrode 201S in the trench 205) (in other words, the bridge shield electrode 204S may only partially fill the bridge connection trench 201). A dielectric layer (e.g., full-fill oxide) disposed above the bridge shield electrode 204S may fill the volume of the bridge connection trench. A shield electrode contact element (bridge shield electrode contact element) may be formed on the surface of the bridge shield electrode 204S in the bridge connection trench by etching through the full-fill oxide.

[0033] 2A and 2C show a portion of an example device layout 300 of a trench MOSFET device (e.g., device 350 of FIG. 2B) in which a bridge shield electrode 204S disposed in a bridge connection trench is covered by a dielectric layer (e.g., a fully filled oxide).

[0034] FIG. 2A illustrates, for example, two adjacent trenches 301 of a device that extend parallel (e.g., substantially parallel) to each other along a mesa 302. The mesa 302 may be a linear mesa (e.g., extending generally in the y direction) having a uniform (e.g., substantially uniform) width Wm (e.g., in the x direction). The trench 301 (similar to the trench 201 of FIG. 1A) may be a linear trench (e.g., extending generally in the y direction). A bridge connection trench (e.g., bridge connection trench 305) is disposed across the mesa 302 to interconnect or link the two adjacent trenches 301. The bridge connection trench 305 may be in fluid communication with each of the two trenches 301. The trenches (i.e., trench 301 and bridge connection trench 305) may have approximately the same depth TD (e.g., referenced from the top surface of the mesa 302) (FIG. 2B).

[0035] A gate electrode of the device (e.g., gate electrode 301G of FIG. 2B) extends through (e.g., is disposed within) two adjacent trenches 301. In addition, a shield electrode of the device extends below (e.g., is disposed below) the gate electrode in trench 301. The shield electrode in trench 301 is not visible in FIG. 2A because it is hidden below or beneath the gate electrode.

[0036] The shield electrode (shield poly) in trench 301 may extend into bridge connection trench 305 as bridge shield electrode 304S. The area of ​​device layout 200 where shield poly material extends into bridge connection trench 305 is shown diagrammatically by dashed rectangle 304. The shield poly (bridge shield electrode 304S) in bridge connection trench 305 may have a height (z-direction) on the way to the top surface of the bridge connection trench. The bridge shield electrode 304S in bridge connection trench 305 may be covered with a dielectric layer (e.g., full-fill oxide 306 in FIG. 2B) to fill bridge connection trench 305 to approximately the same height as the top surface S of mesa 302 (or bridge connection trench 305). The full-fill oxide may be a gap-fill oxide, such as, for example, BSG or a fluorine-doped plasma-enhanced chemical vapor deposition (PECVD) tetraethylorthosilicate (TEOS) silicon dioxide material.

[0037] The bridge shield electrode 304S covered by the full-fill oxide 306 may be exposed in the bridge connection trench 305 as a shield electrode contact element (e.g., bridge shield electrode contact element 304sc) by etching (e.g., deep etching) a hole through the full-fill oxide 306. The bridge shield electrode contact element 304sc may be configured to contact a source metal (not shown) of the device.

[0038] 2B shows a cross-sectional view of a portion of a device 350 that may be formed using device layout 300. The cross-sectional view (taken along line EE of FIG. 2A in the xz plane) is across, for example, two trenches 301 and a bridge connection trench 305 disposed across a mesa 302 between the two trenches 301. The trenches (i.e., trench 301 and bridge connection trench 305) may have approximately the same vertical depth TD (e.g., referenced from a top surface of mesa 302 or bridge connection trench 305).

[0039] 2B, the two trenches 301 include a gate electrode 301G (e.g., made of gate poly) and a shield electrode 301S (e.g., made of shield poly) disposed below or beneath the gate electrode 301G. A gate oxide (e.g., gate oxide 301Gox) may be disposed between the gate electrode and a p-body region (p-body 353) of an adjacent mesa 302.

[0040] The shield poly of the shield electrode 301S in the trench 301 may extend into the bridge connection trench 305 to form a bridge shield electrode 304S. The shield poly in the bridge connection trench 305 may have a height SH (z-direction) on the way to the top surface S of the bridge connection trench. The bridge shield electrode 304S in the bridge connection trench 305 may be covered with a dielectric layer (e.g., full-fill oxide 306) to approximately the same height as the top surface S of the bridge connection trench 305. The full-fill oxide may be, for example, a gap-fill oxide such as BSG or a fluorine-doped plasma-enhanced chemical vapor deposition (PECVD) tetraethylorthosilicate (TEOS) silicon dioxide material.

[0041] The shield electrode in the trench (shield electrode 301S) may be separated from the adjacent mesa 302 by a dielectric layer (e.g., shield oxide 301Sox). Additionally, the shield poly in the shield electrode 301S may be separated from the gate poly (gate electrode 301G) by a dielectric layer 308 (e.g., oxide layer, BSG layer). An interlayer dielectric (e.g., interlayer dielectric (ILD) 309) may be disposed on top of the device, for example, to passivate or protect exposed surfaces (e.g., surface S of mesa 302, surface of full-fill oxide 306, etc.).

[0042] The bridge shield electrode 304S may be exposed on the surface S of the bridge connection trench 305 as a shield electrode contact element (eg, bridge shield electrode contact element 304sc) by, for example, patterning and etching through the ILD 309 and the full fill oxide 306.

[0043] The shield poly covered by the full-fill oxide 306 may be exposed in the bridge connection trench 305 as a shield electrode contact element (e.g., bridge shield electrode contact element 304sc) by etching (e.g., deep etching) a hole (e.g., hole 306H) through the full-fill oxide 306. The bridge shield electrode contact element 304sc may be configured to connect, for example, with a source metal of the device.

[0044] FIG. 2C illustrates a larger portion of an example device layout 300 (shown in FIG. 2A ) for a trench MOSFET device (e.g., device 350 of FIG. 2B ) in which bridge connection trenches are disposed across the mesas to interconnect adjacent trenches of the trench MOSFET device.

[0045] As shown in Figure 2C, the device layout 300 includes multiple mesas 302 and trenches 301, for example, of a trench MOSFET device formed on a semiconductor substrate 310. The mesas 302 and trenches 301 are shown extending across the silicon substrate 310 longitudinally in the y-direction, for example, between source regions 31. The source and body contact elements 154 of the device are formed in the mesas 302 in the source regions (e.g., source regions 31) of the device. In Figure 2C, the source regions 31 are shown at the top and bottom of the layout 300, for example.

[0046] Additionally, bridging trenches 305 are formed across the mesas 302 to link adjacent trenches 301 together in the bridging regions 32 between the source regions 31. The bridging trenches 305 may bridge or connect adjacent trenches 301 on either side of the mesa 302. In an exemplary implementation, the bridging trenches 305 may be formed across some or all of the mesas 302 in the device layout 300 along a horizontal axis (e.g., axis AA-AA). The bridging trenches 305 on different mesas 302 in the device layout 300 may be located at a uniform distance (e.g., distance D) from the source regions 31 along the length of the mesa.

[0047] In some example implementations, referring to FIG. 1D , the bridge connection trenches 205 on different mesas 202 in the device layout 200 may be located at different distances from the source regions (e.g., source regions 21) along the length of the mesa. Similarly, referring to FIG. 2C , the bridge connection trenches 305 on different mesas 302 in the device layout 300 may be located at different distances from the source regions (e.g., source regions 31) along the length of the mesa. In other words, the distances at which the bridge connection trenches (e.g., bridge connection trenches 205 or bridge connection trenches 305) are located across different mesas in the device layout may be staggered.

[0048] FIG. 3 shows an example device layout 400 of a shielded gate trench MOSFET device having bridge connection trenches staggered across mesas 402.

[0049] As shown in FIG. 3, the bridging trenches 405 may be formed across different mesas 402 to connect adjacent trenches 401 in the bridging region 42 of the device. The bridging trenches 405 across some mesas 402 may be formed around a horizontal axis (e.g., axis AA-AA parallel to the x-direction). The bridging trenches 405 across other mesas 402 may be formed around a horizontal axis (e.g., axis BB-BB parallel to the x-direction), e.g., approximately at a distance D1 from the axis AA-AA. Thus, the bridging trenches 405 may be arranged in a staggered configuration (e.g., approximately at a distance D1 along the y-axis from each other). In the embodiment shown in FIG. 3, the bridging trenches 405 are arranged in a staggered configuration (in the x-direction) on alternating mesas 402 at alternating (staggered) distances 0 and D1 from the axis AA-AA along the longitudinal length of the mesa.

[0050] In the exemplary device layouts (e.g., layouts 200, 300, and 400) described above with reference to FIGS. 1A-3, the mesas (e.g., mesas 202, 302, and 402) and the trenches adjacent to the mesas (e.g., trenches 201, 301, and 402) are generally linear structures having uniform (e.g., substantially uniform) widths (e.g., mesa width Wm in FIG. 2A) along their lengths. Placing a bridge connection trench (e.g., bridge connection trench 205, 305, or 405) across the mesa may include etching or cutting the mesa to form a passage or opening connecting two adjacent trenches. The width (in the x-direction) of the bridge connection trench between two adjacent trenches is determined by the width (in the x-direction) of the mesa (e.g., mesa width Wm in FIG. 2A).

[0051] In an exemplary implementation, a portion of a mesa of otherwise uniform width may be widened at a location where a bridge connection trench is to be placed across the mesa to link or bridge adjacent trenches. The widened mesa portion may have a width (in the x-direction) (e.g., horizontal width Wmb in FIG. 4) that is greater than the width (e.g., width Wm) of the unwidened mesa portion. The width of the bridge connection made across the widened portion of the mesa may correspond to the width Wmb of the widened portion. The end of the mesa at the bridge connection trench made in the widened portion may be wider than the end of the mesa at the bridge connection trench made in the unwidened portion. The widened portion of the mesa may be referred to as a bubble, a mesa having a widened portion may be referred to as a bubble mesa, and the end of the mesa at the bridge connection trench in the widened portion may be referred to as a bubble mesa end. The adjacent trenches may be rerouted to fit the shape of the widened portion (i.e., bubble) in the mesa. The rerouted trench may have a uniform width over its length, or may have a width that varies or changes (eg, becomes wider or narrower) in different trench portions over its length.

[0052] FIG. 4 illustrates a portion of an example device layout 500 for a shielded gate trench MOSFET device that includes a bubble mesa having widened portions to create bridge connection trenches between adjacent trenches.

[0053] 4, the device layout 500 can include a number of bubble mesas (e.g., mesa 502) and adjacent trenches (e.g., trench 501) that generally extend parallel (e.g., substantially parallel) to one another (e.g., aligned) across the device layout in a longitudinal direction (in the y-direction). The trenches can include gate and shield electrodes (not shown) for the devices.

[0054] Mesa 502 may include one or more widened portions (e.g., bubble portions 510) along its length (e.g., in the y-direction). Mesa 502 may have a width in the x-direction. The width of mesa outer bubble portion 510 may be, for example, approximately Wm. The width of the mesa at bubble portion 510 may be, for example, Wmb, where Wmb is greater than Wm.

[0055] A bridge connection trench (e.g., bridge connection trench 505) that connects or bridges adjacent trenches can be disposed across the bubble portion of the mesa. The bubble connection trench 505 can have a width (in the x-direction) that is the same as the width of the bubble portion of the mesa (i.e., Wmb).

[0056] Placing the bubble connection trench 505 may include cutting or etching the mesa 502 in the bubble portion 510 and opening a passage connecting two adjacent trenches 501. The mesa 502 may be divided or cut into two mesa segments (e.g., mesa segments 502A and 502B) by the bubble connection trench 505, with each mesa segment (e.g., mesa segments 502A and 502B) having an end portion 502f (e.g., in the xz plane) at (i.e., terminates at) the bubble connection trench 505. The end portion 502f of each mesa segment 502A and 502B that terminates or ends at the bubble connection trench 505 may have the larger width (i.e., Wmb) of the bubble portion of the mesa rather than the smaller width Wm of the non-bubble portion of the mesa. Having a larger width for the edge portion 502f can result in better charge balance and higher BVdss in the shielded gate trench MOSFET device.

[0057] The shield electrode (shield poly) of the device may be extended into the bubble connection trench 505 (e.g., as shown in FIG. 1B or FIG. 2B) and may be exposed as a shield electrode contact element (e.g., bridge shield electrode contact element 504sc) within the bubble connection trench 505.

[0058] In an example implementation, the number of mesas in a device layout that are bubble mesas and have bridge connection trenches to adjacent trenches may be based on considerations of the characteristics of the shielded gate trench MOSFET device (e.g., shield poly resistance).

[0059] 5 illustrates a portion of a device layout 600 having a mesa pattern (e.g., mesa pattern 602P) that includes, for example, some bubble mesas and some non-bubble mesas. The mesa pattern can represent device cells that are repeated across the device.

[0060] As shown in FIG. 5 , mesa pattern 602P includes, for example, several bubble and non-bubble mesas (e.g., three bubble mesas 502(1), 502(3), and 502(5) and two non-bubble mesas 502(2) and 502(4)). The bubble mesas (i.e., mesas 502(1), 502(3), and 502(5)) are shown alternating with the non-bubble mesas (i.e., mesas 502(2) and 502(4)) in, for example, the x-direction. Bubble mesas 502(1) and 502(5) include bridge connection trenches 505 along axis HH-HH (parallel to the x-axis). Bubble mesa 502(3) includes a bridge connection trench 505 along axis GG-GG (parallel to the x-axis) and another bridge connection trench 505 along axis JJ-JJ (parallel to the x-axis). Axis GG-GG and axis JJ-JJ may each be spaced a vertical distance AD ​​from axis HH-HH (in other words, bridge connection trench 505 on mesas 502(1) and 502(5) may extend vertically from mesas 502(2) and 502(3) to mesas 502(4) and 502(5). 502 (3) is offset a distance (in the y-direction) compared to the bridge connection trench 505 above it. The non-bubble mesas (i.e., mesas 502(2) and 503(4)) may not have a bridge connection trench 505 (at least in the portion of layout 600 shown in FIG. 5).

[0061] As mentioned above, an actual MOSFET device may include an array of hundreds or thousands of trench / device cells, which may be obtained, for example, by repeating (e.g., in the x-direction) mesa structures and patterns (e.g., mesa pattern 602P).

[0062] 6 illustrates the use of an exemplary repeatable pattern of bubble mesas (e.g., mesa pattern 702P) in a device layout (e.g., device layout 700). The mesa pattern 702P may be repeatable across the device layout 700 (e.g., in the x-direction).

[0063] 6 shows only a portion of the device layout 700 in the y-direction and the x-direction. For example, the mesa pattern 702P may include several bubble mesas extending in the y-direction. The mesa pattern 702P may include, for example, two bubble mesas 502(6) and 502(7) with bridge connection trenches 505 shown in the portion of the device layout shown in FIG. 6, and several (e.g., about 12) mesas 502nb that may have bridge connection trenches 505 outside (e.g., in the y-direction) the portion of the device layout 700 shown in FIG. 6. In the device layout 700, the bubble mesa 502(6) in the mesa pattern 702P may include bridge connection trenches 501 arranged to interconnect or link adjacent trenches 505 along an axis KK-KK (parallel to the x-axis). The bubble mesas 502(7) in mesa pattern 702P may include bridge connection trenches 501 arranged to interconnect or link adjacent trenches 505 along axis LL-LL (parallel to the x-axis). Axis KK-KK and axis LL-LL may be separated (in the y-direction) by a vertical distance BD (in other words, the bridge connection trenches 505 are staggered (in the y-direction) along the lengths of bubble mesas 502(6) and 502(7).

[0064] FIG. 7A illustrates an exemplary shielded gate trench MOSFET device 100 in cross-sectional view.

[0065] The shielded gate trench MOSFET device 100 may include, for example, a mesa 102 disposed between vertical trenches 101 formed in an epitaxial layer 130 on a semiconductor substrate 105. The mesa 102 may include, for example, doped semiconductor regions (e.g., source region 152, body region 153, body region-source contact region 153c, source and body contact elements 154, and drift region 155, etc.) for forming channels of the MOSFET devices of the shielded gate trench MOSFET device 100. In an exemplary implementation, the source region 152 may be heavily doped with an n-type dopant (e.g., arsenic or phosphorus) and the body region 153 may be doped with a p-type dopant (e.g., boron). A drain contact (e.g., drain contact 105d) may be disposed on a backside of the substrate 105.

[0066] The trench 101 may include a shield electrode 104s and a gate electrode 104g. The shield electrode 104s may be disposed below the gate electrode 104g in the trench 101. A gate oxide 104gox separates the gate electrode 104g, and a shield oxide 104sox separates the shield electrode 104s in the trench 101 from the mesa 102.

[0067] 7B is a top view of a portion of an example contact structure layout (e.g., layout 800) for a shielded gate trench MOSFET device (e.g., shielded gate trench MOSFET device 100) in a planar stripe configuration. The shielded gate trench MOSFET device 100 may include, for example, parallel trenches 101 extending in a stripe pattern in the y-direction between gate metal regions (e.g., gate metal runners 104gm) in the layout 800.

[0068] The mesas 102 may be disposed between adjacent trenches 101. The mesas 102, which may include doped regions (e.g., source regions 152, body regions 153, source and body contact elements 154, and drift regions 155, etc. (FIG. 7A)) for forming a channel of a MOSFET device, may expose the source and body contact elements 154 in the xy-plane of the layout 800. A source metal layer (e.g., source metal 154m) may contact the source and body contact elements 154 across the trenches 101 in the xy-plane of the layout 800.

[0069] A gate electrode and a shield electrode (e.g., gate electrode 104g, shield electrode 104s (FIG. 7A)) may be disposed in the trench 101. A shield electrode (e.g., shield electrode 104s) may be disposed below or beneath the gate electrode 104g in the trench 101. The gate electrode and the shield electrode are not visible in FIG. 7B because they are embedded in the trench 101. However, a gate electrode contact element (e.g., gate electrode contact element 104gc) for contacting the gate electrode in the trench 101 may be exposed, for example, in the xy plane of the layout 800. FIG. 7B shows the gate electrode contact element 104gc disposed at the ends of the trench 101 at the top and bottom of the layout 800, for example. The gate electrode contact element 104gc may be contacted by a gate metal runner (e.g., gate metal runner 104gm). FIG. 7B, for example, shows a first gate metal runner 104gm contacting the gate electrode contact element 104gc at one end of the trench 101 and a second gate metal runner 104gm contacting the gate electrode contact element 104gc at the other end of the trench 101.

[0070] Additionally, shield electrode contact element 104sc may be exposed in the xy plane of the device to contact the shield electrode in trench 101. Shield electrode contact element 104sc may be exposed by pulling the shield poly to the surface vertically upward through trench 101 (breaking or splitting the gate electrode disposed above the shield electrode into two discontinuous segments (not shown)). Shield electrode contact element 104sc across trench 101 may be contacted by source metal 154m (e.g., at shield contact region 104sca).

[0071] In the above description, the trenches of the shielded gate trench MOSFET device (e.g., trench 201 of FIG. 1A, trench 301 of FIG. 2A, etc.) generally have, for example, a uniform width Wt (in the x-direction). The trenches having a uniform width Wt may be referred to as narrow trenches hereinafter. The narrow trenches adjacent to the mesas in the device layouts (e.g., device layouts 200, 300, 400, and 500) may be interconnected or linked by bridge connection trenches (e.g., bridge connection trenches 205, 305, 405, 505) disposed across the mesas (e.g., mesas 202, 302, 402, and 502). The shield electrodes in the narrow trenches adjacent to the mesas may be exposed as bridge shield electrode contact elements (e.g., electrode contact elements 204sc, 304sc, 404sc, and 504sc) in the bridge connection trenches.

[0072] In an exemplary implementation, the shielded gate trench MOSFET device may include another trench (hereafter, wide trench) having a width that may be non-uniform and may be larger than the uniform width Wt of the narrow trench. A shield electrode contact element (e.g., shield electrode contact element 104sc of FIG. 1B) may be exposed in the xy plane of the device to contact the shield electrode in the wide trench. The shield electrode contact element 104sc may be exposed by pulling the shield poly material of the shield electrode in the wide trench vertically upward through the wide trench to the surface (blocking or segmenting any gate electrode that may be disposed above the shield electrode in the trench).

[0073] FIG. 8 shows an example device layout 800 of a shielded gate trench MOSFET device that includes both narrow and wide trenches.

[0074] Device layout 800 includes, for example, a narrow trench (e.g., trench 501) and a wide trench (e.g., trench 801). Trenches 501 and 801, as well as mesas (e.g., mesa 502) formed between adjacent trenches (e.g., trench 501 or trench 801), extend longitudinally (e.g., in the y-direction) across shield contact regions 830 between active areas 840 of the device.

[0075] Each of the trenches (eg, trench 501 and trench 801) may include a gate electrode and a shield electrode (eg, gate electrode 201G, shield electrode 201S in FIG. 1B) for the device.

[0076] The shield electrode in trench 801 may be exposed as a shield electrode contact element (e.g., shield electrode contact element 104sc) in trench 801 for contact with the source metal. Shield electrode contact element 104sc may be formed in trench 801 at a position about a horizontal axis (e.g., axis AA and axis BB) that intersects shield contact region 830.

[0077] Additionally, the shield electrode in trench 501 may be exposed as a shield electrode contact element (e.g., bridge shield electrode contact element 504sc) in a bridge connection trench (e.g., bridge connection trench 505) that connects adjacent trenches 501 across, for example, a bubble mesa (e.g., mesa 502). The bridge connection trench (e.g., bridge connection trench 505) may be disposed in shield contact region 830, for example, about a horizontal axis (e.g., axis CC and axis DD). The bridge shield electrode contact element 504sc may be formed in the bridge connection trench (e.g., bridge connection trench 505) about a horizontal axis (e.g., axis CC and axis DD) in shield contact region 830.

[0078] As shown in FIG. 8, both shield electrode contact elements in the device layout 800 (e.g., shield electrode contact element 104sc in trench 801 and shield electrode contact element 504sc in bridge connection trench 805) may be connected to an overlay of source metal 154m.

[0079] FIG. 9 illustrates an exemplary method 900 for making contact to a shield electrode in a shielded gate trench MOSFET device.

[0080] The method 900 includes forming a mesa between a pair of vertical trenches in a semiconductor substrate (910), forming a bridge connection trench in the mesa in fluid communication with the pair of vertical trenches (920), disposing a shield electrode in each of the pair of vertical trenches along the length of the vertical trenches (930), and disposing a longitudinally aligned gate electrode above the shield electrode in the pair of vertical trenches (940).

[0081] The method 900 further includes disposing 950 a bridge shield electrode in the bridge connection trench, the bridge shield electrode being coupled to a shield electrode extending longitudinally below the gate electrode in the pair of vertical trenches, and exposing 960 a bridge shield electrode contact element in the bridge connection trench. In some implementations of the method 900, the bridge shield electrode can be disposed in the bridge connection trench at 950 in the same processing step as disposing 930 a shield electrode in each of the pair of vertical trenches.

[0082] The method 900 may further include connecting the bridge shield electrode contact element to a source metal of the device.

[0083] The steps of method 900 can be performed sequentially or simultaneously, in any order of the individual steps and any combination of the individual steps. For example, the bridge connection trench across the mesa (e.g., forming a bridge connection trench in the mesa in step 920) can be formed simultaneously with the pair of vertical trenches that define the mesa (e.g., forming a mesa between a pair of vertical trenches in the semiconductor substrate in step 910) (using a single mask and etch process) or can be formed separately after the mesa is formed (using two different mask and etch processes). In other words, steps 910 and 920 can be combined or can be separate sequential steps.

[0084] In an exemplary implementation of the devices described herein, each of the pair of vertical trenches and the bridge connection trench have approximately the same vertical depth.

[0085] In an exemplary implementation of the device described herein, the bridge shield electrode disposed in the bridge connection trench has approximately the same height as the height of the shield electrodes disposed below each of the gate electrodes in the pair of vertical trenches.

[0086] In an exemplary implementation of the devices described herein, the bridge shield electrode exposes a shield electrode contact element in the bridge connection trench.

[0087] In an exemplary implementation of the devices described herein, the shield electrode contact element in the bridge connection trench is connected to the source metal of the device.

[0088] In an exemplary implementation of the devices described herein, the bridge shield electrode in the bridge connection trench is covered by a full-fill oxide layer almost up to the top surface of the mesa.

[0089] In an exemplary implementation of the devices described herein, holes are placed in the full-fill oxide layer to expose bridge shield electrode contact elements in the bridge connection trenches.

[0090] In an exemplary implementation of the devices described herein, the bridge shield electrode is separated from the gate electrode by a dielectric layer.

[0091] In an example implementation of the devices described herein, the first bridge connection exposes a first shield electrode contact element in the first bridge connection trench.

[0092] In an example implementation of the devices described herein, the first shield electrode contact element in the first bridge connection is connected to the source metal of the device.

[0093] In some example implementations of the devices described herein, the bridge shield electrode rises along the side of the gate electrode to a height in the first bridge connection trench that is greater than the height of the shield electrode disposed below the gate electrode in each of the first and second pairs of vertical trenches.

[0094] In some example implementations of the devices described herein, the bridge shield electrode has a height within the first bridge connection trench that is approximately the same as the height of the shield electrode disposed below the gate electrode in each of the first pair of vertical trenches.

[0095] In an example implementation of the devices described herein, the bridge shield electrode exposes a first shield electrode contact element in the first bridge connection trench and exposes a second shield electrode contact element in the second bridge connection trench, and the first shield electrode contact element in the first bridge connection trench and the second shield electrode contact element in the second bridge connection trench are connected to a source metal of the device.

[0096] In an exemplary implementation of the device described herein, the device further includes a gate electrode disposed in the vertical trench and a shield electrode disposed below the gate electrode in the vertical trench, the shield electrode rising vertically from below the gate electrode to a surface of the device at a third position to expose a third shield electrode contact element.

[0097] Specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments, however, example embodiments may be embodied in many alternative forms and should not be construed as being limited to only the embodiments set forth herein.

[0098] Some implementations may be implemented using various semiconductor processing and / or packaging technologies. Some implementations may be implemented using various types of semiconductor processing technologies associated with semiconductor substrates including, but not limited to, silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), and / or the like.

[0099] The terminology used herein is for the purpose of describing particular implementations only and is not intended to be limiting of the implementations. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms "comprises", "comprising", "includes" and / or "including", as used herein, specify the presence of stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0100] It will also be understood that when an element, such as a layer, region, or substrate, is referred to as being on, connected to, electrically connected to, coupled to, or electrically coupled to another element, it may be directly on, connected to, or coupled to the other element, or there may be one or more intervening elements. On the other hand, when an element is referred to as being directly on, directly connected to, or directly coupled to another element or layer, no intervening elements or layers are present. Although the terms directly, directly connected, or directly coupled may not be used throughout the detailed description of the present invention, elements that are illustrated as being directly, directly connected, or directly coupled may be referred to as such. The claims of this application may be amended to describe the exemplary relationships described herein or shown in the figures.

[0101] As used herein, the singular can include the plural, unless in view of the context a specific instance clearly indicates. Spatially relative terms (e.g., throughout, above, above, below, lower, below, etc.) are intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the drawings. In some implementations, the relative terms above and below can include vertically above and vertically below, respectively. In some implementations, the term adjacent can include laterally adjacent or horizontally adjacent.

[0102] Exemplary implementations of the inventive concepts are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized implementations (and intermediate structures) of the exemplary implementations. As such, variations from the shapes of the illustrations are expected as a result, for example, of manufacturing techniques and / or tolerances. Thus, the exemplary implementations of the inventive concepts should not be construed as limited to the particular shapes of regions illustrated herein, but should include, for example, deviations in shapes that result from manufacturing. Thus, the regions illustrated in the figures are schematic in nature, and their shapes are not intended to represent the actual shapes of regions of a device, nor are they intended to limit the scope of the exemplary implementations.

[0103] It will be understood that terms such as "first", "second" and the like may be used herein to describe various elements, but these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, a "first" element can be called a "second" element without departing from the teachings of the present implementation.

[0104] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the concept of the present invention belongs. Terms as defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and it will be further understood that they are not interpreted in an idealized or overly formal sense unless expressly defined as such in this specification.

[0105] Although certain features of the described implementations have been illustrated as described herein, those skilled in the art will now conceive many modifications, substitutions, changes, and equivalents. It will therefore be understood that the appended claims are intended to cover all such modifications and changes as fall within the scope of the implementations. It will be understood that these are presented by way of example only, not limitation, and that various changes in form and details may be made. Any part of the apparatus and / or method described herein may be combined in any combination, except mutually exclusive combinations. The implementations described herein may include various combinations and / or subcombinations of features, components and / or features of the different implementations described.

Claims

1. A device, comprising: a mesa disposed between a pair of vertical trenches in a semiconductor substrate, the pair of vertical trenches including a first vertical trench aligned parallel to a second vertical trench of the pair of vertical trenches; a gate electrode disposed within each of the pair of vertical trenches; a shield electrode disposed below each of the gate electrodes in the pair of vertical trenches; a bridge connection trench that crosses the mesa and connects the pair of vertical trenches, the bridge connection trench being aligned along a direction perpendicular to the parallel direction of the pair of vertical trenches; a bridge shield electrode disposed in the bridge connection trench and coupled to each shield electrode in the pair of vertical trenches.

2. the mesa has a lateral width Wm over a portion of the length of the mesa, the mesa has an increased lateral width Wmb at a portion of the mesa traversed by the bridging trench, Wmb being greater than Wm, the bridging trench being a first bridging trench and traversing the mesa at a first location, the device comprising:

10. The device of claim 1, further comprising a second bridge connection trench traversing the mesa at a second location and connecting the pair of vertical trenches, the bridge shield electrode being additionally disposed within the second bridge connection trench.

3. A device comprising: a first mesa disposed between a first pair of vertical trenches in a semiconductor substrate; a second mesa disposed between a second pair of vertical trenches in the semiconductor substrate, a second mesa, the first mesa, the second mesa, the first pair of vertical trenches, and the second pair of vertical trenches extending longitudinally on the semiconductor substrate from an active area of ​​the device through a shield contact area of ​​the device; a gate electrode disposed within each of the first pair of vertical trenches and the second pair of vertical trenches; a shield electrode disposed under the gate electrode in each of the first pair of vertical trenches and the second pair of vertical trenches; a first bridge connection trench disposed across the first mesa at a first location, the first bridge connection trench being in fluid communication with the first pair of vertical trenches; a second bridge connection trench disposed across the second mesa at a second location, the second bridge connection trench being in fluid communication with the second pair of vertical trenches.

4. The device of claim 3, wherein the first location on the first mesa and the second location on the second mesa are longitudinally separated by a distance along the length of the first mesa and the second mesa, a bridge shield electrode is disposed in the first bridge connection trench across the first mesa at the first location, and the bridge shield electrode is coupled to the shield electrode disposed beneath the gate electrode in each of the first pair of vertical trenches.

5. A method comprising: forming a mesa between a pair of vertical trenches in a semiconductor substrate; forming a bridge connecting trench in the mesa in fluid communication with the pair of vertical trenches; disposing a shield electrode in each of the pair of vertical trenches along a length of the pair of vertical trenches; disposing a gate electrode longitudinally aligned above said shield electrode in said pair of vertical trenches; and, and disposing a bridge shield electrode in the bridge connection trench, the bridge shield electrode being coupled to the shield electrode disposed below the gate electrode in the pair of vertical trenches.

6. The method of claim 5 , further comprising exposing a shield electrode contact element in the bridge connection trench.

7. A device comprising: a mesa disposed between a pair of vertical trenches in a semiconductor substrate; a gate electrode disposed within each of the pair of vertical trenches; a shield electrode disposed below each of the gate electrodes in the pair of vertical trenches; a bridge connection trench traversing the mesa, the bridge connection trench being in fluid communication with each of the pair of vertical trenches; a bridge shield electrode disposed in the bridge connection trench, the bridge shield electrode coupled to the shield electrode disposed below each gate electrode in the pair of vertical trenches.

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