Image Sensor and Data Processing for Parallel Frame Capture in High Dynamic Range (HDR) Photography

Abstract

The present disclosure provides systems, methods, and devices for image signal processing to support improved detail preservation in photography through increased dynamic range and / or highlight preservation. The image signal processing may be performed on data being received from a split-pixel image sensor with two sets of sensor elements having different sensitivities. The image signal processing includes receiving image data including first data from a first set of sensor elements and second data from a second set of sensor elements that captures a representation of a scene with a different sensitivity than the first set of sensor elements, determining an output dynamic range for an output image frame, and determining the output image frame based on at least one of the first data and the second data and based on the output dynamic range. Other aspects and features are also claimed and described.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001]

[0001] This application claims the benefit of U.S. patent application Ser. No. 17 / 456,117, filed Nov. 22, 2021, entitled “IMAGE SENSOR AND DATA PROCESSING FOR PARALLEL FRAME CAPTURE IN HIGH DYNAMIC RANGE (HDR) PHOTOGRAPHY,” the entire contents of which are expressly incorporated by reference into this specification. [Technical field]

[0002] Aspects of the present disclosure relate generally to image processing. Several features can enable and provide improved image processing, including images with increased image detail and / or dynamic range. [Background technology]

[0003]

[0003] An image capture device is a device that can capture one or more digital images, whether still images for photography or a sequence of images for video. Capture devices can be incorporated into a wide variety of devices. By way of example, image capture devices can include standalone digital cameras or digital video camcorders, mobile phones, cellular or satellite radio phones, personal digital assistants (PDAs), panels or tablets, gaming devices, wireless communication device handsets with cameras, computing devices such as webcams, video surveillance cameras, or other devices with digital imaging or video capabilities.

[0004]

[0004] Dynamic range can be important for image quality when using an image capture device to capture a representation of a scene with a wide color gamut. Conventional image sensors have a limited dynamic range that can be smaller than the dynamic range of the human eye. Dynamic range can refer to the range of light between the bright parts of the image and the dark parts of the image. Conventional image sensors can increase the exposure time to improve details in the dark parts of the image at the expense of saturating the bright parts of the image. Alternatively, conventional image sensors can reduce the exposure time to improve details in the bright parts of the image at the expense of losing details in the dark parts of the image. Thus, image capture devices traditionally balance the conflicting demands by preserving details in the bright or dark parts of the image by adjusting the exposure time. High dynamic range (HDR) photography improves photography using these conventional image sensors by combining multiple recorded images from the image sensors. These recorded images are recorded consecutively one after the other and then combined. However, the continuous recording of images introduces ghosts or inconsistencies between the recorded image frames that reduce the quality of the HDR photo obtained by combining the recorded image frames. Summary of the Invention

[0005]

[0005] The following summarizes some aspects of the present disclosure to provide a basic understanding of the discussed technology. This summary is not an extensive overview of all of the contemplated features of the present disclosure, and is not intended to identify key or critical elements of all aspects of the present disclosure, nor to delineate the scope of any or all aspects of the present disclosure. Its sole purpose is to present some concepts of one or more aspects of the present disclosure in summary form as a prelude to the more detailed description presented later.

[0006]

[0006] The image sensor may be configured to record image frames at different sensitivities such that the image frames may be combined to produce a photograph with improved quality. The improved quality may be observed through a higher level of detail in one or more highlight regions and / or dark regions. The image sensor configuration may include a first set of sensor elements having a first sensitivity and a second set of sensor elements having a second sensitivity different from the first sensitivity. The first set of sensor elements may capture a first representation of the scene at the first sensitivity and the second set of sensor elements may capture a second representation of the scene at the second sensitivity. One such image sensor configuration is described in the following embodiments as a split pixel image sensor, although other image sensor configurations may be used to obtain the first and second sensitivities. The different sensitivities within a single image sensor may allow the first data and the second data to be recorded at least partially overlapping times. An output image frame for the photograph may be determined from at least one of the first data and the second data, and in some embodiments, from both the first data and the second data.

[0007]

[0007] Image sensors according to embodiments of the present disclosure having different sensitivities for recording a representation of a scene may be used to generate standard dynamic range (SDR) or high dynamic range (HDR) photographs. A method for processing first and second data captured at least in part in overlapping time periods from one or more sensors may include receiving image data including the first and second data from the image sensor or from a memory coupled to the image sensor. The first data may be received from a first set of sensor elements capturing a first representation of the scene at a first sensitivity. The second data may be received from a second set of sensor elements capturing a second representation of the scene at a second sensitivity different from the first sensitivity. In some embodiments, the first and second data are captured in parallel from one image sensor with a first set of sensor elements having a different configuration than the second set of sensor elements, such as in a split-pixel image sensor described in embodiments of the present disclosure.

[0008]

[0008] In one aspect of the present disclosure, a method of image processing includes receiving first data corresponding to a scene captured at a first sensitivity, the first data being captured by a first set of sensor elements; receiving second data corresponding to a scene captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern comprising a color filter array (CFA) larger than a Bayer pattern; determining an output dynamic range for an output image frame; and determining the output image frame based on the output dynamic range and at least one of the first data and the second data. Includes.

[0009] In an additional aspect of the disclosure, an apparatus includes at least one processor and a memory coupled to the at least one processor, the at least one processor receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements, receiving second data corresponding to a scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern comprising a color filter array (CFA) larger than a Bayer pattern, determining an output dynamic range for an output image frame, and determining an output image frame based on the output dynamic range and based on at least one of the first data and the second data. The method is configured to perform the steps including:

[0010]

[0010] In an additional aspect of the present disclosure, an apparatus includes means for receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements; means for receiving second data corresponding to a scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern comprising a color filter array (CFA) larger than a Bayer pattern; means for determining an output dynamic range for an output image frame; and means for determining an output image frame based on the output dynamic range and based on at least one of the first data and the second data. Includes.

[0011]

[0011] In a further aspect of the present disclosure, an apparatus includes an image sensor comprising a first set of sensor elements and a second set of sensor elements comprising uniform arrays of sensor elements representing a color pattern of a color filter array (CFA) larger than a Bayer pattern, a memory storing processor-readable code and coupled to the image sensor, and at least one processor coupled to the memory and coupled to the image sensor, the at least one processor configured to execute the processor-readable code, the processor-readable code comprising at least recording in a memory first and second data captured from an image sensor during at least partially overlapping times, the first data from a first set of sensor elements capturing a first representation of a scene with a first sensitivity and the second data from a second set of sensor elements capturing a second representation of the scene with a second sensitivity different from the first sensitivity, determining an output dynamic range for an output image frame, and determining the output image frame based on the output dynamic range and based on at least one of the first and second data. The method executes the steps including:

[0012] In an additional aspect of the disclosure, a non-transitory computer readable medium stores instructions that, when executed by a processor, cause the processor to perform operations including receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements, receiving second data corresponding to a scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern comprising a color filter array (CFA) larger than a Bayer pattern, determining an output dynamic range for an output image frame, and determining the output image frame based on the output dynamic range and at least one of the first data and the second data. Includes.

[0013]

[0013] Image capture devices, devices capable of capturing one or more digital images, whether still photographs or a sequence of images for a video, may be incorporated into a wide variety of devices. By way of example, image capture devices may include standalone digital cameras or digital video camcorders, wireless communication device handsets with cameras, such as mobile, cellular or satellite radio telephones, personal digital assistants (PDAs), panels or tablets, gaming devices, computing devices, such as webcams, video surveillance cameras, or other devices with digital imaging or video capabilities.

[0014]

[0014] Generally, this disclosure describes image processing techniques for digital cameras having image sensors and image signal processors (ISPs). The ISP may be configured to control the capture of image frames from one or more image sensors and to process one or more image frames from the one or more image sensors to generate a view of a scene in the corrected image frames. The corrected image frames may be part of a sequence of image frames forming a video sequence. The video sequence may include other image frames received from the image sensor or other image sensors and / or other corrected image frames based on input from the image sensor or another image sensor. In some embodiments, the processing of one or more image frames may be performed in the image sensor, such as in a binning module. The image processing techniques described in the embodiments disclosed herein may be performed by a circuit such as a binning module, in the image sensor, in an image signal processor (ISP), in an application processor (AP), or in a combination or two or all of these components.

[0015]

[0015] In one example, the image signal processor may receive instructions to capture a sequence of image frames in response to loading of software such as a camera application to generate a preview display from an image capture device. The image signal processor may be configured to generate a single flow of output frames based on image frames received from one or more image sensors. The single flow of output frames may include raw image data from the image sensor, binned image data from the image sensor, or corrected image frames processed by one or more algorithms, such as in a binning module in the image signal processor. For example, image frames acquired from an image sensor that may have performed some processing on the data before being output to the image signal processor may be processed in the image signal processor by processing the image frames through an image post-processing engine (IPE) and / or other image processing circuitry that performs one or more of tone mapping, portrait lighting, contrast enhancement, gamma correction, etc.

[0016]

[0016] After an output frame representative of a scene is determined by the image signal processor using image corrections such as binning described in various embodiments herein, the output frame may be displayed on a device display as a single still image and / or as part of a video sequence, may be saved to a storage device as a picture or video sequence, may be transmitted over a network, and / or may be printed on an output medium. For example, the image signal processor may be configured to obtain input frames of image data (e.g., pixel values) from different image sensors and then generate corresponding output frames of image data (e.g., preview display frames, still image capture, frames for video, frames for object tracking, etc.). In other examples, the image signal processor may output frames of image data to various output devices and / or camera modules for further processing, such as for 3A parameter synchronization (e.g., automatic focus (AF), automatic white balance (AWB), and automatic exposure control (AEC)), generating a video file via the output frames, constructing frames for display, constructing frames for storage, transmitting frames over a network connection, etc. That is, the image signal processor can acquire incoming frames from one or more image sensors, each coupled to one or more camera lenses, and then generate a flow of output frames to be output to various destinations.

[0017] In some aspects, the corrected image frame may be generated by combining aspects of the image correction of the present disclosure with other computational photography techniques, such as high dynamic range (HDR) photography or multi-frame noise reduction (MFNR). In HDR photography, a first image frame and a second image frame are captured using different exposure times, different apertures, different lenses, and / or other characteristics that may improve the dynamic range of the fused image when the two image frames are combined. In some aspects, the method may be implemented for MFNR photography, where the first image frame and the second image frame are captured using the same exposure time or different exposure times and are fused to generate a corrected first image frame having reduced noise compared to the captured first image frame.

[0018] In some aspects, the device may include an image signal processor or processor (e.g., an application processor) that includes certain functions of camera control and / or processing, such as enabling or disabling a binning module, or possibly controlling aspects of image correction. The methods and techniques described herein may be performed entirely by the image signal processor or processor, or various operations may be split between the image signal processor and a processor, or in some aspects across additional processors.

[0019]

[0019] The apparatus may include one, two, or more image sensors, such as including a first image sensor. If there are multiple image sensors, the first image sensor may have a larger field of view (FOV) than the second image sensor, or the first image sensor may have a different sensitivity or different dynamic range than the second image sensor. In one example, the first image sensor may be a wide-angle image sensor and the second image sensor may be a telephoto image sensor. In another example, the first sensor is configured to acquire images through a first lens having a first optical axis, and the second sensor is configured to acquire images through a second lens having a second optical axis different from the first optical axis. Additionally or alternatively, the first lens may have a first magnification and the second lens may have a second magnification different from the first magnification. This configuration may occur using a lens cluster on the mobile device, such as when multiple image sensors and associated lenses are located at offset positions on the front or back of the mobile device. Additional image sensors may also be included, having a larger, smaller, or the same field of view. The image correction techniques described herein may be applied to image frames captured from any of the image sensors in a multi-sensor device.

[0020]

[0020] In an additional aspect of the present disclosure, a device configured for image processing and / or image capture is disclosed. The device includes a means for capturing an image frame. The device further includes one or more means for capturing data representative of a scene, such as image sensors (including charge-coupled devices (CCDs), Bayer filter sensors, infrared (IR) detectors, ultraviolet (UV) detectors, complimentary metal-oxide-semiconductor (CMOS) sensors), time-of-flight detectors, etc.). The device may further include one or more means for integrating and / or focusing light rays into the one or more image sensors (including simple lenses, compound lenses, spherical lenses, and aspherical lenses). These components can be controlled to capture first and / or second image frames that are input to the image processing techniques described herein.

[0021]

[0021] Other aspects, features, and implementations will become apparent to those skilled in the art upon reviewing the following description of certain exemplary aspects in conjunction with the accompanying figures. Although features may be discussed in connection with certain aspects and figures below, various aspects may include one or more of the advantageous features discussed herein. In other words, although one or more aspects may be discussed as having certain advantageous features, one or more of such features may also be used in accordance with various aspects. Similarly, although exemplary aspects may be discussed below as device, system, or method aspects, the exemplary aspects may be implemented in various devices, systems, and methods.

[0022]

[0022] The method may be embedded in a computer-readable medium as a computer program code including instructions for causing a processor to perform the steps of the method. In some embodiments, the processor may be part of a mobile device including a first network adapter configured to transmit data, such as an image or video, as recorded data or as streaming data over a first network connection of a plurality of network connections, a processor coupled to the first network adapter, and a memory. The processor may cause transmission of the corrected image frame described herein over a wireless communication network, such as a 5G NR communication network.

[0023]

[0023] The above has outlined rather broadly the features and technical advantages of the examples according to the present disclosure in order to better understand the following "Description of the Preferred Embodiments". Additional features and advantages are described below. The concepts and specific examples disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. Such equivalent structures are within the scope of the appended claims. The properties of the concepts disclosed herein, both their organization and method of operation, together with associated advantages, will be better understood in light of the following description in conjunction with the accompanying figures. Each of the figures is provided for the purpose of illustration and explanation, and not as a definition of the limits of the claims.

[0024]

[0024] Although aspects and implementations are described in this application by showing some examples, those skilled in the art will understand that additional implementations and use cases may arise in many different arrangements and scenarios. The innovations described herein may be implemented across many different platform types, devices, systems, shapes, sizes, and packaging arrangements. For example, aspects and / or applications may arise with integrated chip implementations and other non-modular component-based devices (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail / purchasing devices, medical devices, artificial intelligence (AI)-enabled devices, etc.). Some examples may or may not be specifically targeted to a use case or application, but a wide variety of applicability of the described innovation may arise. Implementations may range from chip-level or modular components to non-modular, non-chip-level implementations, and even aggregated, distributed, or original equipment manufacturer (OEM) devices or systems incorporating one or more aspects of the described innovation. In some practical settings, devices incorporating the described aspects and features may also necessarily include additional components and features for the implementation and practice of the claimed and described aspects. For example, the transmission and reception of wireless signals necessarily includes several components for analog and digital purposes (e.g., hardware components including antennas, radio frequency (RF) chains, power amplifiers, modulators, buffers, processor(s), interleavers, summers / analog summers, etc.). It is contemplated that the innovations described herein may be practiced in a wide variety of devices, chip-level components, systems, distributed deployments, end-user devices, etc. of various sizes, shapes, and configurations. [Brief description of the drawings]

[0025]

[0025] A further understanding of the nature and advantages of the present disclosure can be realized by referring to the following drawings. In the attached figures, similar components or features may have the same reference label. Furthermore, various components of the same type may be distinguished by following the reference label with a dash and a second label that distinguishes the similar components. When only a first reference label is used in this specification, the description is applicable to any one of the similar components having the same first reference label, regardless of the second reference label.

[0026] [Figure 1]

[0026] A block diagram of an exemplary device that performs image capture from one or more image sensors is shown. [Diagram 2]

[0027] 1 illustrates an image capture device with a split-pixel image sensor design in accordance with some embodiments of the present disclosure. [Figure 3A]

[0028] 1 illustrates a split-pixel image sensor design for a 3×3 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. [Figure 3B]

[0029] 1 illustrates a split-pixel image sensor design for a 2×2 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. [Figure 3C]

[0030] 1 illustrates a split-pixel image sensor design for a 4×4 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. [Figure 3D]

[0031] 1 illustrates a split-pixel image sensor design for a 4×4 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. [Figure 4]

[0032] 1 shows a block diagram of an image processing technique using a 3×3 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. [Diagram 5]

[0033] 1 shows a flowchart illustrating a method for processing image data from a split-pixel image sensor according to some embodiments of the present disclosure. [Figure 6A]

[0034] 1 shows a circuit diagram of a split-pixel image sensor according to some embodiments of the present disclosure. [Figure 6B]

[0035] 4 shows a timing diagram for reading out a split-pixel image sensor according to some embodiments of the present disclosure. [Figure 7]

[0036] FIG. 1 shows a block diagram of image processing with highlight preservation using a 3×3 color filter array (CFA) pixel configuration, according to some embodiments of the present disclosure. [Figure 8]

[0037] 1 shows a flowchart illustrating a method for highlight preservation involving a split-pixel image sensor according to some embodiments of the present disclosure. [Figure 9A]

[0038] 1 shows a graph illustrating a highlight preservation image processing technique according to some embodiments of the present disclosure. [Figure 9B]

[0039] 1 shows a graph illustrating a highlight preservation image processing technique according to some embodiments of the present disclosure.

[0027]

[0040] Like reference numbers and designations in the various drawings indicate like elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028]

[0041] The detailed description of the present invention, set forth below in conjunction with the accompanying drawings, is intended as an illustration of various configurations and is not intended to limit the scope of the present disclosure. Rather, the detailed description of the present invention includes specific details intended to provide a thorough understanding of the subject matter of the present invention. Those skilled in the art will appreciate that these specific details are not required in every instance and that in some instances, well-known structures and components are shown in block diagram form for clarity of presentation.

[0029]

[0042] The present disclosure provides systems, devices, methods, and computer-readable media that support image capture and / or image processing. For example, an image sensor may be configured to record image frames at different sensitivities such that the image frames may be combined to generate a photograph with improved quality. The improved quality may be observed through a higher level of detail in one or more highlight regions and / or dark regions. The image sensor configuration may include a first set of sensor elements having a first sensitivity and a second set of sensor elements having a second sensitivity different from the first sensitivity. The first set of sensor elements may capture a first representation of a scene with the first sensitivity, and the second set of sensor elements may capture a second representation of the scene with the second sensitivity.

[0030]

[0043] Particular implementations of the subject matter described in this disclosure may be implemented to achieve one or more of the following potential advantages or benefits: In some aspects, the present disclosure provides techniques to achieve high dynamic range (HDR) photography with reduced motion artifacts. Forming HDR images from image data captured in parallel from a single image sensor, such as a split-pixel image sensor described in the embodiments of the present disclosure, may reduce motion artifacts. The exposure times for different sensor elements in the image sensor may be the same to further reduce motion artifacts. In some embodiments, the circuit configuration of the sensor elements may include capacitance to provide a higher dynamic range without using different exposure times for different sensor elements. The image sensor configuration and processing described in the techniques of the present disclosure may still support in sensor zoom, binning, and other SDR photo processing techniques by allowing different processing of image data output from the image sensor to generate different output frames.

[0031]

[0044] An exemplary device that captures image frames using one or more image sensors, such as a smartphone, may include a configuration of two, three, four, or more cameras on the back (e.g., opposite the user display) or front (e.g., on the same side as the user display) of the device. A device with multiple image sensors includes one or more image signal processors (ISPs), computer vision processors (CVPs) (e.g., AI engines), or other suitable circuitry that processes images captured by the image sensors. One or more of the image sensors may include a reconfigurable binning module. Additionally or alternatively, one or more of the image signal processors (ISPs) may include a reconfigurable binning module. The one or more image signal processors can provide the processed image frames to a memory and / or processor (such as an application processor, an image front end (IFE), an image processing engine (IPE), or other suitable processing circuitry) for further processing, such as for encoding, storage, transmission, or other manipulation.

[0032]

[0045] As used herein, an image sensor may refer to the image sensor itself as well as any particular other components coupled to the image sensor that are used to generate an image frame for processing by an image signal processor or other logic circuitry, or for storage in memory, whether a short-term buffer or longer-term non-volatile memory. For example, an image sensor may include other components of a camera, including shutters, buffers, or other readout circuitry that accesses individual pixels of the image sensor. An image sensor may also refer to an analog front end or other circuitry that converts analog signals into a digital representation of the image frame that is provided to digital circuitry coupled to the image sensor.

[0033]

[0046] In the following description, numerous specific details are set forth, such as examples of specific components, circuits, and processes, to provide a thorough understanding of the present disclosure. As used herein, the term "coupled" means directly connected or connected through one or more intervening components or circuits. In addition, in the following description, for the purpose of explanation, specific terminology is set forth to provide a thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that these specific details may not be required to practice the teachings disclosed herein. In other instances, well-known circuits and devices are shown in block diagram form to avoid obscuring the teachings of the present disclosure.

[0034]

[0047] Some portions of the following Detailed Description are presented in terms of procedures, logic blocks, processes, and other symbolic representations of operations on data bits within a computer memory. In this disclosure, a procedure, logic block, process, etc., is conceived to be a self-consistent sequence of steps or instructions leading to a desired result. The steps require physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated in a computer system.

[0035]

[0048] In the figures, a single block may be described as performing one or more functions. The one or more functions performed by the block may be implemented in a single component or across multiple components, and / or may be implemented using hardware, software, or a combination of hardware and software. To clearly illustrate this interchangeability of hardware and software, various example components, blocks, modules, circuits, and steps are described below generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure. Also, the example device may include other components than those shown, including well-known components such as a processor, memory, etc.

[0036]

[0049] Aspects of the present disclosure are applicable to any electronic device that includes or is coupled to two or more image sensors capable of capturing image frames (or "frames"). Additionally, aspects of the present disclosure may be implemented in devices having or coupled to image sensors of the same or different capabilities and characteristics (resolution, shutter speed, sensor type, etc.). Additionally, aspects of the present disclosure may be implemented in devices that process image frames, such as processing devices capable of retrieving stored images for processing, including processing devices present in cloud computing systems, regardless of whether the device includes or is coupled to an image sensor.

[0037]

[0050] Unless otherwise indicated, and as will be apparent from the discussion that follows, discussions utilizing terms such as "accessing," "receiving," "sending," "using," "selecting," "determining," "normalizing," "multiplying," "averaging," "monitoring," "comparing," "applying," "updating," "measuring," "deriving," "solving," "generating," and the like throughout this application will be understood to refer to the actions and processes of a computer system or similar electronic computing device that manipulates data represented as physical (electronic) quantities in the computer system's registers and memory, and converts such data to other data that is similarly represented as physical quantities in the computer system's registers, memory, or other such information storage, transmission, or display devices.

[0038]

[0051] The terms "device" and "apparatus" are not limited to one physical object (such as one smartphone, one camera controller, one processing system, etc.) or a particular number of physical objects. A device, as used herein, can be any electronic device having one or more components capable of implementing at least some portions of the present disclosure. Although the following description and examples use the term "device" to describe various aspects of the present disclosure, the term "device" is not limited to a particular configuration, type, or number of objects. An apparatus, as used herein, can include a device that performs the described operations, or a portion of such a device.

[0039]

[0052] 1 illustrates a block diagram of an exemplary device 100 that performs image capture from one or more image sensors. The device 100 may include or be otherwise coupled to an image signal processor 112 that processes image frames from one or more image sensors, such as a first image sensor 101, a second image sensor 102, and a depth sensor 140. In some implementations, the device 100 also includes or is coupled to a processor 104 and a memory 106 that stores instructions 108. The device 100 may also include or be coupled to a display 114 and input / output (I / O) components 116. The I / O components 116, such as a touch screen interface and / or physical buttons, may be used to interact with a user. The I / O components 116 may also include network interfaces for communicating with other devices, including a wide area network (WAN) adapter 152, a local area network (LAN) adapter 153, and / or a personal area network (PAN) adapter 154. An exemplary WAN adapter is a 4G LTE or 5G NR wireless network adapter. An exemplary LAN adapter 153 is an IEEE 802.11 WiFi wireless network adapter. An exemplary PAN adapter 154 is a Bluetooth wireless network adapter. Each of the adapters 152, 153, and / or 154 may be coupled to an antenna, including multiple antennas configured for primary and diversity reception and / or configured to receive a particular frequency band. The device 100 may further include or be coupled to a power source 118 for the device 100, such as a battery or a component that couples the device 100 to an energy source. Device 100 may also include, or be coupled to, additional features or components not shown in FIG.In one example, a wireless interface, which may include a number of transceivers and a baseband processor, may be coupled to or included within a WAN adapter 152 for a wireless communication device. In a further example, an analog front end (AFE) that converts analog image frame data to digital image frame data may be coupled between the image sensors 101 and 102 and the image signal processor 112.

[0040]

[0053] The device may include or be coupled to a sensor hub 150 that interfaces with sensors to receive data regarding the movement of the device 100, data regarding the environment surrounding the device 100, and / or other non-camera sensor data. One exemplary non-camera sensor is a gyroscope, which is a device configured to measure rotation, orientation, and / or angular velocity to generate motion data. Another exemplary non-camera sensor is an accelerometer, which is a device configured to measure acceleration, which may be used to determine the speed and distance of movement by appropriately integrating the measured acceleration, and one or more of the acceleration, speed, and / or distance may be included in the generated motion data. In some aspects, a gyroscope in an electronic image stabilization system (EIS) may be coupled to the sensor hub or directly to the image signal processor 112. In another example, the non-camera sensor may be a global positioning system (GPS) receiver.

[0041]

[0054] The image signal processor 112 can receive image data such as that used to form an image frame. In one embodiment, a local bus connection couples the image signal processor 112 to the first camera image sensor 101 and the second camera image sensor 102. In another embodiment, a wired interface couples the image signal processor 112 to an external image sensor. In a further embodiment, a wireless interface couples the image signal processor 112 to the image sensors 101, 102.

[0042]

[0055] The first camera may include a first image sensor 101 and a corresponding first lens 131. The second camera may include a second image sensor 102 and a corresponding second lens 132. Each of the lenses 131 and 132 may be controlled by an associated auto-focus (AF) algorithm 133 running in the ISP 112, which adjusts the lenses 131 and 132 to focus on a particular focal plane at a particular scene depth from the image sensors 101 and 102. The AF algorithm 133 may be assisted by a depth sensor 140.

[0043]

[0056] The first image sensor 101 and the second image sensor 102 are configured to capture one or more image frames. The lenses 131 and 132 focus light onto the image sensors 101 and 102, respectively, through one or more apertures for receiving light, one or more shutters for blocking light if outside an exposure window, one or more color filter arrays (CFAs) for filtering light other than a certain frequency range, one or more analog front ends for converting analog measurements to digital information, and / or other suitable components for imaging. The first lens 131 and the second lens 132 may have different fields of view for capturing different representations of a scene. For example, the first lens 131 may be an ultra-wide (UW) lens and the second lens 132 may be a wide (W) lens. The multiple image sensors may include a combination of ultra-wide (high field of view (FOV)), wide, telephoto, and ultra-telephoto (low FOV) sensors. That is, each image sensor may be configured via hardware configuration and / or software settings to provide different but overlapping fields of view. In one configuration, the image sensors are configured with different lenses having different magnifications resulting in different fields of view. The sensors may be configured such that the UW sensor has a larger FOV than the W sensor, which has a larger FOV than the T sensor, which has a larger FOV than the UT sensor. For example, a sensor configured for a wide FOV may capture a field of view ranging from 64 to 84 degrees, a sensor configured for an ultra-wide FOV may capture a field of view ranging from 100 to 140 degrees, a sensor configured for a telephoto FOV may capture a field of view ranging from 10 to 30 degrees, and a sensor configured for a super-telephoto FOV may capture a field of view ranging from 1 to 8 degrees.

[0044]

[0057] Image signal processor 112 processes image frames captured by image sensors 101 and 102. Although FIG. 1 illustrates device 100 as including two image sensors 101 and 102 coupled to image signal processor 112, any number of image sensors (e.g., one, two, three, four, five, six, etc.) may be coupled to image signal processor 112. In some aspects, a depth sensor, such as depth sensor 140, may be coupled to image signal processor 112, and output from the depth sensor may be processed in a similar manner as the output of image sensors 101 and 102. Additionally, any number of additional image sensors or image signal processors may be present for device 100.

[0045]

[0058] In some embodiments, the image signal processor 112 may execute instructions from a memory, such as instructions 108 from memory 106, instructions stored in a separate memory coupled to or included within the image signal processor 112, or instructions provided by the processor 104. Additionally or alternatively, the image signal processor 112 may include specific hardware (such as one or more integrated circuits (ICs)) configured to perform one or more operations described in this disclosure. For example, the image signal processor 112 may include one or more image front ends (IFEs) 135, one or more image post-processing engines 136 (IPEs), and / or one or more auto exposure compensation (AEC) 134 engines. The AF 133, the AEC 134, the AFE 135, and the APE 136 may each include application specific circuitry and may be embodied as software code executed by the ISP 112 and / or as a combination of hardware within the ISP 112 and software code executing on the ISP 112.

[0046]

[0059] In some implementations, memory 106 may include a non-transient or non-transitory computer-readable medium having stored thereon computer-executable instructions 108 for performing all or a portion of one or more operations described in this disclosure. In some implementations, instructions 108 include a camera application (or other suitable application) to be executed by device 100 to generate images or videos. Instructions 108 may also include other applications or programs executed by device 100, such as an operating system and specific applications other than for image or video generation. Execution of the camera application, such as by processor 104, may cause device 100 to generate images using image sensors 101 and 102 and image signal processor 112. Memory 106 may also be accessed by image signal processor 112 to store processed frames or by processor 104 to obtain processed frames. In some embodiments, device 100 does not include memory 106. For example, device 100 can be a circuit that includes image signal processor 112, and the memory can be external to device 100. Device 100 can be coupled to external memory and configured to access the memory to write output frames for display or long-term storage. In some embodiments, device 100 is a system on chip (SoC) that incorporates image signal processor 112, processor 104, sensor hub 150, memory 106, and input / output components 116 in a single package.

[0047]

[0060] In some embodiments, at least one of the image signal processor 112 or the processor 104 executes instructions to perform various operations described herein, including binning operations. For example, execution of those instructions may instruct the image signal processor 112 to begin or end capturing an image frame or a sequence of image frames, where the capture includes binning as described in the embodiments herein. In some embodiments, the processor 104 may include one or more general-purpose processor cores 104A capable of executing scripts or instructions of one or more software programs, such as instructions 108 stored in the memory 106. For example, the processor 104 may include one or more application processors configured to execute a camera application (or other suitable application for generating images or videos) stored in the memory 106.

[0048]

[0061] When executing the camera application, the processor 104 may be configured to instruct the image signal processor 112 to perform one or more operations related to the image sensor 101 or 102. For example, the camera application may receive a command to initiate a video preview display in which a video including a sequence of image frames from one or more image sensors 101 or 102 is captured and processed. Image correction, such as by cascaded IPE, may be applied to one or more image frames in the sequence. Execution of instructions 108 outside of the camera application by the processor 104 may also cause the device 100 to perform any number of functions or operations. In some embodiments, the processor 104 may include ICs or other hardware (e.g., an artificial intelligence (AI) engine 124) in addition to the ability to execute software to cause the device 100 to perform any number of functions or operations, such as those described herein. In some other embodiments, the device 100 does not include the processor 104, such as when all of the described functions are configured in the image signal processor 112.

[0049]

[0062] In some embodiments, display 114 may include one or more suitable displays or screens that allow for user interaction and / or allow for presenting items to a user, such as previews of image frames being captured by image sensors 101 and 102. In some embodiments, display 114 is a touch-sensitive display. I / O components 116 may be or include any suitable mechanism, interface, or device that receives input from a user (such as a command specifying an output dynamic range) and provides output to the user via display 114. For example, I / O components 116 may include (but are not limited to) a graphical user interface (GUI), a keyboard, a mouse, a microphone, a speaker, a compressible bezel, one or more buttons (such as a power button), sliders, switches, etc.

[0050]

[0063] Although shown coupled together via the processor 104, the components (such as the processor 104, memory 106, image signal processor 112, display 114, and I / O components 116) may be coupled together in various other arrangements, such as via one or more local buses, not shown for simplicity. Although the image signal processor 112 is shown as separate from the processor 104, the image signal processor 112 may also be a core of the processor 104, an application processor unit (APU), included in a system on chip (SoC) or otherwise included with the processor 104. Although the device 100 is referred to in examples herein implementing aspects of the present disclosure, some device components may not be shown in FIG. 1 to avoid obscuring aspects of the present disclosure. Additionally, other components, multiple components, or combinations of components may be included in a suitable device implementing aspects of the present disclosure. Thus, the present disclosure is not limited to any particular device, or configuration of components, including the device 100.

[0051]

[0064] FIG. 2 illustrates an image capture device with a split pixel image sensor design according to some embodiments of the present disclosure. The image capture device 100 may have one or more cameras, including a first camera with a first image sensor 101. Light reflected by the scene is represented by photons collated by a first lens 131 and directed to the first image sensor 101. The first image sensor 101 includes sensor elements that convert the light represented by the photons into electrical signals, such as charge-coupled devices (CCDs) or active pixel devices (e.g., complementary metal oxide semiconductor (CMOS) devices). The first image sensor 101 may include many arrays of these sensor elements. Distinct colors in the scene may be detected by including color filters on each of the sensor elements, such that each sensor element measures the intensity of a particular color at a particular location in the scene. The sensor elements and color filters may be organized into a particular cell size that is repeated over a larger size. Each of the sensor elements may be part of a uniform array of sensor elements 200, where each sensor element has the same surface area exposed to receive light. A uniform sensor array may have a group of sensor elements that collectively form a color filter array (CFA) pattern that is larger than the Bayer pattern.

[0052]

[0065] As an example, the image sensor 101 may include a color filter array (CFA) 200 including sensor elements 202-G, 202-R, 202-B, 204-G, 204-R, and 204-B. The green sensor elements 202-G and 204-G may be organized in a 3×3 array, the red sensor elements 202-R and 204-R may be organized in a 3×3 array, and the blue sensor elements 202-B and 204-B may be organized in a 3×3 array. The green, blue, and red arrays may be organized in a 6×6 array, with the upper left quadrant including the green image sensors 202-G and 204-G, the upper right quadrant including the red sensor elements 202-R and 204-R, the lower left quadrant including the blue sensor elements 202-B and 204-B, and the lower right quadrant including the green sensor elements 202-S and 204-S. 2 shows one exemplary color filter array (CFA) configuration, e.g., with a 3×3 array for each color and 6×6 cells repeated across image sensor 200, although color filter arrays (CFAs) of other configurations may be used. In some embodiments, sensor elements 204-G, 204-R, 204-B, and 204-S may have associated neutral density filters that reduce the intensity of light reaching elements 204-G, 204-R, 204-B, and 204-S such that element 204 has a lower sensitivity than element 202. In some embodiments, all sensor elements may have neutral density filters, but stronger filters are associated with sensor elements 204-G, 204-R, 204-B, and 204-S. Alternative CFA arrays with split pixel designs according to some embodiments are shown in FIGS. 3A-3D.

[0053]

[0066] A readout from the color filter array (CFA) may combine photons collected from multiple sensor elements in the CFA 200 to obtain a pixel value of an image frame representing a scene. Some elements, such as several adjacent border elements in a quadrant, may be combined into larger pixel groups, and the photons collected by the elements in the pixel group are summed or otherwise combined to generate a pixel value of the image frame. For example, the eight green sensor elements 202-G in the upper left quadrant may be combined to obtain a first green pixel value. Some elements, such as the center green element 204-G in the quadrant, may be read out separately as a smaller pixel group to obtain a second green pixel value with a different sensitivity. Similarly, the eight red sensor elements 202-R in the upper right quadrant may be combined to obtain a first red pixel value and the central red element 204-R may be read out to obtain a second red pixel, the eight blue sensor elements 202-B in the lower left quadrant may be combined to obtain a first blue pixel value and the central blue element 204-B may be read out to obtain a second blue pixel, the eight green sensor elements 202-S in the lower right quadrant may be combined to obtain a third green pixel value and the central green element 204-S may be read out to obtain a fourth green pixel value.

[0054]

[0067] Different pixel values ​​can be used to form an image frame. Large and small pixels of the split pixel configuration provide different sensitivities and therefore equivalents of different exposure times. The different pixel values ​​can be combined with different image processing techniques to obtain a representation of a scene with different characteristics, such as a standard dynamic range (SDR) or high dynamic range (HDR) image. For example, an HDR image frame can be determined as a combination of a first image frame based on element 202 and a second image frame based on element 204, where the first image frame is determined from a first green pixel value, a first red pixel value, a first blue pixel value, and a third green pixel value, and the second image frame is determined from a second green pixel value, a second red pixel value, a second blue pixel value, and a fourth green pixel value. The first and second image frames can represent a scene at two different equivalent exposure times, allowing for the determination of an HDR image frame with a higher dynamic range than either the first or second image frame.

[0055]

[0068] Conventional HDR image sensors use different exposure times to obtain first and second image frames to be combined into an HDR image frame. However, due to different levels of motion blur introduced by the different exposure times, the different exposure times result in motion artifacts in the combined HDR image frame. A split-pixel image sensor as described in FIG. 2 and other embodiments herein allows for the determination of a combined HDR image frame from image frames with the same exposure time but different numbers of sensor elements leading to different sensitivities. Each element of the CFA array 200 may operate with the same exposure time such that each of the large pixel group (e.g., green sensor element 202-G) and the small pixel group (e.g., green sensor element 204-G) is exposed to the same scene and does not suffer from the same motion blur as a conventional HDR sensor. In some embodiments, the large pixel group and the small pixel group may operate with different exposure times to further increase the dynamic range of the combined HDR image frame determined from the first image frame based on the large pixel group and from the second image frame based on the small pixel group.

[0056]

[0069] Additional split-pixel sensor designs for different CFA patterns are shown in Figures 3A, 3B, 3C, and 3D.

[0057]

[0070] 3A illustrates a split-pixel image sensor design with a 3×3 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. The CFA array 310 includes a first quadrant 312 of a 3×3 array of sensor elements, with the peripheral sensor elements forming large pixel groups and the central sensor elements forming small pixel groups. Quadrants 314, 316, and 318 are configured similarly to the first quadrant 312 with large and small pixel groups.

[0058]

[0071] Embodiments of the present disclosure may have CFAs of different sizes than the 3×3 array of FIG. 3A, such as a 2×2 array size as shown in FIG. 3B, or a 4×4 array size as shown in FIG. 3C and FIG. 3D. FIG. 3B illustrates a split-pixel image sensor design with a 2×2 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. The CFA array 320 includes a first quadrant 322 of a 2×2 array of sensor elements with the top and left sensor elements forming a large pixel group and the bottom right sensor elements of the 2×2 array, which is the first quadrant 322, forming a small pixel group. Quadrants 324, 326, and 328 are configured similarly to the first quadrant 322. FIG. 3C illustrates a split-pixel image sensor design with a 4×4 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. The CFA array 330 includes a first quadrant 332 of a 4×4 array of sensor elements with 15 of the 4×4 sensor elements forming a large pixel group and one of the sensor elements forming a small pixel group. The single sensor element forming the small pixel group may be any one of the 16 sensor elements in quadrant 332, such as the shaded element shown in quadrant 332 in Figure 3C. Quadrants 334, 336, and 338 are configured similarly to the first quadrant 332 with large and small pixel groups.

[0059]

[0072] In some embodiments, the small pixel group may include multiple sensor elements, as in the embodiment of FIG. 3D. FIG. 3D illustrates a split pixel image sensor design with a 4×4 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. CFA array 340 includes a first quadrant 342 of a 4×4 array of sensor elements, with the perimeter 12 sensor elements forming a large pixel group and the inner 4 sensor elements forming a small pixel group. Quadrants 344, 346, and 348 are configured similarly to first quadrant 342. Although each of the quadrants of the repeating cell illustrated in FIGS. 3A-3D are shown to be similarly configured, the quadrants may have different configurations, such as when different configurations are appropriate for different colors. Additionally, although each of the CFA arrays in FIGS. 3A-3D are shown with a similar GRBG color filter arrangement, the color filters may be configured differently, such as two blue quadrants or two red quadrants, or RGB color filters interspersed throughout the CFA array.

[0060]

[0073] Regardless of the configuration of the CFA array with different large and small pixel groups, the large and small pixel groups may or may not be combined to determine an output frame determined to be appropriate for the scene or determined based on user input. Different techniques for determining an output image frame are illustrated in FIG. 4. FIG. 4 illustrates a block diagram of an image processing technique using a 3×3 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. The CFA array 412 may generate raw data as a series of sensor values ​​read out from individual sensor elements of the CFA array 412. The raw data may be processed in one or more of processing paths 430, 432, and / or 434.

[0061]

[0074] A first processing path 430 determines a non-HDR output image frame. The path 430 includes a binning block 402 configured to perform 8-pixel binning on the values ​​of the CFA array 412. Small pixels can be discarded in the first processing path 430 to reduce the CFA array 412 to eight values ​​in each quadrant of the cells of the CFA array 412. The eight values ​​can be averaged or summed to obtain a single pixel value for each quadrant to reduce the 3×3 CFA array 412 to a Bayer-represented output image frame 414 that has the same dynamic range as the large pixels of the CFA array 412. The output image frame 414 can have a lower resolution than the CFA array 412. The binning of the block 402 can match the configuration of the CFA array 412. For example, if the input is a CFA array being generated by a sensor such as the split-pixel image sensor of FIG. 3C, the binning of the block 402 can be 15-pixel binning.

[0062]

[0075] The second processing path 432 determines a non-HDR output image frame that captures a full resolution image, or an image capture frame 418 with in-sensor zoom. As an example, in binning mode, a 108MP sensor with a 3×3 configuration for sensor elements may generate a 12MP Bayer. In full resolution mode, the remosaic block 406 generates different image frames. In full resolution mode, the mosaic block 416 can receive three 108MP raw images, and the data frame 418 is a 108MP Bayer. In in-sensor zoom mode, it outputs only a 12MP 3×3 raw image frame 416, and the image frame 418 is a 12MP Bayer. This 12MP Bayer has 1 / 3 the FOV of the binning mode 12MP Bayer, hence the name in-sensor zoom. This technique may also be applied to sensor images operating at full resolution, or may be switchable between in-sensor zoom and in-sensor embodiments.

[0063]

[0076] Path 432 includes a replacement pixel generation module 404 configured to generate replacement data to replace the small pixel group values ​​with values ​​determined from the large pixel group values ​​to determine an intermediate image frame 416. The intermediate image frame 416 is processed by a re-mosaic module 406 that determines an output image frame 418 of a re-mosaic Bayer pattern having the same dynamic range as the dynamic range of the large pixel group of the CFA array 412. The output image frame 418 may have a resolution that matches the resolution of the CFA array 412.

[0064]

[0077] The third processing path 434 determines the HDR output frame by combining the large and small pixel group values ​​from the CFA array 412. The values ​​of the CFA array 412 are input to the pixel separation module 408 to determine a Bayer patterned first image frame 420 from the large pixel group and a Bayer patterned second image frame 422 from the small pixel group. The HDR processing module 410 may receive the image frames 420 and 422, which are different representations of a scene captured at different equivalent exposure times, and use the image frames 420 and 422 to determine the HDR output frame 424 based on tone mapping. The HDR output image frame 424 may be of a lower resolution than the CFA array 412.

[0065]

[0078] The determination of which processing path of FIG. 4 to perform on the received CFA array may be based on whether the image capture device is configured to determine an HDR output image frame or an SDR output image frame. A method 500 for processing raw data from a CFA array is shown in FIG. 5. FIG. 5 shows a flowchart illustrating a method for processing image data from a split-pixel image sensor according to some embodiments of the present disclosure. The method 500 includes receiving image data at block 502, where the image data includes first data corresponding to a first set of sensor elements (e.g., a large group of pixels) capturing a first representation of a scene at a first sensitivity. The image data may also include second data corresponding to a second set of sensor elements (e.g., a small group of pixels) capturing a second representation of a scene at a second sensitivity different from the first sensitivity of the first set of sensor elements. For example, the second set of sensor elements may have a neutral density filter, a different capacitance, and / or a different exposure time. In some embodiments, the first data and the second data may be captured in parallel from one image sensor. In some embodiments, the image data is received from a split-pixel image sensor with a color filter array (CFA) configuration such as those shown in Figures 3A-3D. The image data may be received by an image signal processor or processors, such as ISP 112 or processor 104 of Figure 1, from one or more image sensors, such as image sensors 101, 102, and / or 140 of Figure 1.

[0066]

[0079] At block 504, a dynamic range for the output image frame is determined, such as whether the output image frame is configured to be a high dynamic range (HDR) or a standard dynamic range (SDR) image frame. The determination of the output dynamic range may be based on user input, such as by allowing a user to select SDR or HDR for output in a camera application. The determination of the output dynamic range may also or alternatively be based on a system default. The determination of the output dynamic range may also or alternatively be based on an analysis of the image data, such as to determine whether the image data has a wide color gamut that exceeds a color threshold range that indicates that the scene would benefit from HDR representation. The determination of the output dynamic range may also or alternatively be based on an analysis of a previous image frame, such as whether the same or similar scene was recently represented in an HDR image frame or an SDR image frame. The determination may be performed by an ISP or processor, such as ISP 112 or processor 104 of FIG. 1, based on settings stored in memory 106 and / or input received via component 116.

[0067]

[0080] If the output dynamic range is determined to be an HDR representation, the method 500 continues at block 506. If the output dynamic range is determined to be an SDR representation, the method continues at block 508. Although two outcomes are shown from decision block 504, other outcomes may be possible, for example, by applying multiple threshold levels to the output dynamic range. For example, different processing may be performed based on whether the output dynamic range is determined to be an 8-bit representation, a 9-bit representation, or a 10-bit representation.

[0068]

[0081] In block 506, when the output dynamic range is an HDR representation, an output image frame having an HDR representation of the scene in the image data is determined based on the first data and the second data. That is, the output image frame for the HDR representation is based on the first data, such as from a large group of pixels of a split-pixel image sensor shown in FIGS. 3A-3D, and the second data, such as from a small group of pixels of a split-pixel image sensor shown in FIGS. 3A-3D. The first and second data from different groups of pixels may be representations of a scene having different sensitivities to light, such as by having different exposure times or different filter strengths or different capacitances. Combining the first data and the second data may generate an output image frame having a higher dynamic range than the first dynamic range of the first data and a higher dynamic range than the second dynamic range of the second data. The processing in block 506 may be the processing represented in processing path 434 of FIG. 4, where the output image frame corresponds to HDR output frame 424. Processing corresponding to block 506, as represented by processing path 434, may be performed by an image signal processor such as ISP 112 of FIG. 1, by a processor such as processor 104 of FIG.

[0069]

[0082] In block 508, when the output dynamic range is an SDR representation, an output image frame having an SDR representation of the scene in the image data is determined based on at least the first data. In some embodiments, the output image frame may be based only on the first data, such as by discarding the second data and / or a portion of the first data. For example, the SDR representation may be generated by binning the first data and discarding the second data. In this example, the processing in block 508 may be the processing represented in processing path 430 of FIG. 4, where the output image frame corresponds to output frame 414. As another example, the SDR representation may be generated by filling missing values ​​in the first data by using replacement pixel generation and re-mosaicing the resulting data. In this example, the processing in block 508 may be the processing represented in processing path 432 of FIG. 4, where the output image frame corresponds to output frame 418. The decision to perform processing according to path 430 or 432 may be based on a required resolution of a zoom level set for the image capture device. Processing corresponding to block 508 as represented in processing paths 430 or 432 may be performed by an image signal processor, such as ISP 112 of Figure 1, by a processor, such as processor 104 of Figure 1, or by a combination of ISP 112 and processor 104. In some embodiments, the determination of the output image frame having an SDR representation may be further based on the second data, such as by adjusting highlighted regions in the first data based on corresponding portions of the second data.

[0070]

[0083] A split-pixel image sensor having different sensitivities between different groups of pixels in the image sensor can be achieved in one embodiment with a circuit arrangement of sensor elements shown in FIG. 6A. FIG. 6A shows a circuit diagram of a split-pixel image sensor according to some embodiments of the present disclosure. The circuit 600 can include two separate floating nodes, where a first floating node 610 is shared by a first group 612 of sensor elements (e.g., a group of large pixels) and a second floating node 620 is shared by a second group 622 of sensor elements (e.g., a group of small pixels). The first group 612 of elements can have m elements and the second group 622 of elements can have n elements. Each of the m elements and the n elements can have a corresponding access transistor TL1-TLm and TGS1-TGSn, respectively, having a configurable path comprising at least a transistor gate FDG configured to couple the floating gate nodes 610 and 620 of the groups 612 and 622. When the elements are arranged, for example, as shown in FIG. 3A, m=8 and n=1. When the elements are arranged, for example, as shown in FIG. 3D, m=8 and n=4. A second floating node 620 corresponding to the second group 622 may be constructed with a full well capacitance large enough to allow for a high dynamic range. In some embodiments, a capacitor 630 may be added to the floating node 620 to further increase the dynamic range.

[0071]

[0084] In other embodiments, different sensitivities between different pixel groups in an image sensor may be achieved through other features or combinations of features. For example, a neutral density (ND) filter may be applied to some of the pixels such that some incident light is blocked, resulting in more light being required to saturate the pixel's sensor element (e.g., "full well equivalent brightness") with the ND filter. A split-pixel image sensor may use different capacitances and / or combinations of ND filters to obtain different sensitivities between groups of pixels. In some embodiments, the full well capacity (FWC) may be determined in part by the voltage swing at nodes 610 and / or 620. The voltage swing may be controlled through additional capacitance at capacitor 630 such that the FWC is adjusted to change the sensitivity. In some embodiments, a lateral over-flow integrated capacitor (LOFIC) may be used to further increase the FWC, in which case during exposure, the TGS1-n pixels are partially opened so that any excess charge collected by SPD1-SPDn overflows into capacitor 630. In some embodiments, the sensitivity may additionally or alternatively be altered by controlling different groups of pixels with different exposure times.

[0072]

[0085] A timing diagram for reading out elements in a configuration like FIG. 6A is shown in FIG. 6B. FIG. 6B shows a timing diagram for reading out a split-pixel image sensor according to some embodiments of the present disclosure. The diagram in FIG. 6B is simplified to show a configuration with three elements (LPD1, LPD2, LPD3 with corresponding TGL1, TGL2, and TGL3 access signals) in the first group 612, such as the 2×2 color filter array (CFA) configuration of FIG. 3B, and one element (SPD with corresponding TGS access signal) in the second group 622. However, a similar timing diagram can be used to operate image elements of different configurations. At time 652, a reset occurs prior to the desired start of image capture by exposure of the elements to light reflected from the scene. First, the small pixel group is read out. At time 654, the SPD signal is read out, followed by an SPD reset at time 656. Next, the large pixel group is read out. At time 658, an LPD1 reset occurs, followed by the LPD1 signal being read out at time 660. At time 662, an LPD3 reset occurs, followed by the LPD2 signal being read out at time 664. At time 666, an LPD3 reset occurs, followed by the LPD3 signal being read out at time 668.

[0073]

[0086] Other timings may be used to control a split-pixel image sensor as depicted in the circuit of FIG. 6A. In some embodiments where ND filters are used, the SPD signal / reset may be read out either before or after the LPD. For example, after the FDG signal goes high, the RST signal may be set high to reset nodes 610 and 620, followed by a readout of the SPD reset level, and the TGS may be set to a high level, followed by a second readout of the SPD signal level. This timing or other timings may be used to perform true correlated double-sample (CDS), which may result in lower noise in the resulting image. As another example, when the split-pixel image sensor includes a capacitor 630 and an FDG access transistor, the FDG signal may be set high for the SPD reset and signal readout. As a further example related to an embodiment using LOFIC, the timing of FIG. 6B may be shown modified such that the TGS signal has a low level, a medium level, and a high level. During the exposure time, the TGS signal is set to the medium level. Since the capacitor 630 is accumulating signal during the exposure, double sampling can be implemented by first reading out the SPD signal followed by the SPD reset value. As another example, readout timing when different exposure times are used can include a reset of the SPD signal. For multiple exposure times, at time 652, the RST signal and TGL 1-n can be set high, with an additional reset occurring between times 652 and 654 where the RST, TGS, and FDG signals are set high.

[0074]

[0087] The different representations of the scene being captured by the first data from the first group of sensor elements and the second data from the second group of sensor elements can be used to improve highlight regions of the representation of the scene, whether the output image frame is an SDR or HDR representation. The highlight regions of the image can be over-exposed by adjusting the exposure time to improve details in the shadow regions of the image. When the dynamic range of the scene exceeds the dynamic range of the image sensor, a shorter exposure time reduces the signal-to-noise ratio (SNR) of the captured image, and a longer exposure time results in saturation and clamping of the highlight regions. Challenges with highlight regions are evident in bright sky photographs where sky details are lost due to saturation, and therefore clamping, of pixel values ​​in the highlight regions. A high dynamic range (HDR) image frame can reduce the appearance of clamping and saturation in the highlight regions by having a larger dynamic range that can capture the dynamic range of the scene. Standard dynamic range (SDR) image frames, and in some embodiments HDR image frames, may be improved by adjusting highlight regions using first data from a first group of sensor elements and second data from a second group of sensor elements.

[0075]

[0088] One technique for image processing with highlight preservation is illustrated in FIG. 7. FIG. 7 illustrates a block diagram of image processing with highlight preservation using a 3×3 color filter array (CFA) pixel configuration according to some embodiments of the present disclosure. The processing path 700 begins with receiving data 724 from a first image sensor 101, such as a split-pixel image sensor. The data 724 may include raw values ​​of a first data for a first group of elements, such as large groups of pixels, and a second data for a second group of elements, such as small groups of pixels. Processing of the first data through a replacement pixel generation block 704 to generate an image frame 726 and through a re-mosaic block 708 to generate an image frame 730 may be similar to the processing path 432 of FIG. 4. The image frame 730 may be input to a highlight preservation block 710, which may reduce the appearance of clamped or saturated regions in the image frame 730. The highlight preservation block 710 may perform highlight preservation using the second data, which may be separated by a pixel separation block 706 to generate an image frame 728. The highlight preservation block 710 can use data from image frame 728 to modify highlight regions in image frame 730 to generate an output image frame, such as a photograph, or a series of output image frames 712, such as a video. The different sensitivity used to obtain the second data can result in additional detail present in the highlight regions in image frame 728 that can be used to modify image frame 730, such as by replacing some values ​​in image frame 730 with values ​​or scaled values ​​from image frame 728.

[0076]

[0089] A method of highlight preservation using first and second data is shown in FIG. 8. FIG. 8 shows a flowchart illustrating a method of highlight preservation using a split-pixel image sensor according to some embodiments of the present disclosure. The method 800 includes, at block 802, receiving image data, the image data including first data corresponding to a first set of sensor elements capturing a first representation of a scene at a first sensitivity. The image data may also include second data corresponding to a second set of sensor elements capturing a second representation of a scene at a second sensitivity different from the first sensitivity of the first set of sensor elements. For example, the second set of sensor elements may have a neutral density filter, a different capacitance, and / or a different exposure time. In some embodiments, the first data and the second data may be captured in parallel from one image sensor. In some embodiments, the image data is received from a split-pixel image sensor comprising a color filter array (CFA) configuration as shown in FIGS. 3A-3D.

[0077]

[0090] In block 804, the first set of pixels may be processed in a first processing pass to generate first processed data as a first representation of the scene. For example, with reference to Figure 7, a first set of pixels from data 724 may be processed through a first processing pass, such as blocks 704 and 708, to generate first processed data represented as image frame 730.

[0078]

[0091] In block 806, the second set of pixels may be processed in a second processing path as a second representation of the scene to generate second processed data. For example, with reference to Figure 7, the second set of pixels from data 724 may be processed through a second processing path, such as block 706, to generate second processed data represented as image frame 728.

[0079]

[0092] In block 808, an output image frame may be determined with improved appearance of highlight regions in the scene by combining the first processed data with the second processed data. The processed data from blocks 804 and 806 may have different representations of the scene with different light sensitivities such that highlight regions in the first processed data that were clamped or saturated are not clamped or saturated in the second processed data. The output image frame determined in block 808 may use portions of the second processed data to modify, such as by replacing, portions of the first processed data to preserve detail in highlight regions of the first processed data. In some embodiments, the output image frame of block 808 may be a high dynamic range (HDR) image frame. In some embodiments, the output image frame of block 808 may be a standard dynamic range (SDR) image frame. An exemplary algorithm of highlight preservation used in determining the output image frame of block 808 is described with reference to FIGS. 9A and 9B.

[0080]

[0093] One exemplary highlight preservation algorithm preserves the bit width of the image, as in the exemplary embodiment of FIG. 9A. FIG. 9A shows a graph illustrating an image processing technique of highlight preservation according to some embodiments of the present disclosure. An original signal 902 from a first set of sensor elements, such as a large group of pixels, may saturate in the highlight regions. Saturation in the highlight regions causes the raw values ​​from the sensor elements to be clamped to a value of 2^N-1, where N is the sensor bit width (e.g., 10 bits or 12 bits). The raw values ​​of the original signal 902 may be adjusted to a scaled signal 904, where the clamping value of the scaled signal 904 is (2^N-1) / M, where M is a scale ratio (e.g., 1.5, 2, 3, 4, etc.). The scale ratio M may be based on the ratio of sensitivities between the two sets of sensor elements, or the equivalent exposure time of the signals captured from the two sets of sensor elements. The scale ratio M may be a sufficient scaling ratio such that the combination of the original signal from the first data outside the highlight region and the highlight region of the second data is representable in a particular sensor bit width, such as the bit width of the original signal 902. The highlight region of the scaled signal 904 may be adjusted based on raw values ​​from a second set of sensor elements, such as a small group of pixels. The different sensitivity of the second set of sensor elements allows the second set of sensor elements to maintain detail in the highlight region. The adjusted scaled signal 904 shown in FIG. 9A has improved detail over the original signal 902 based on the benefit of two representations of the scene based on two different sensitivities. In this embodiment, the sensor output bit width does not change because the maximum value of the scaled signal 904 remains less than the maximum value of the original signal 902. The scene representation based on the scaled signal 904 may be darker than when based on the original signal 902. In some embodiments, the scaled signal 904 may be applied to a tone mapping algorithm to adjust the tone curve based on the scale ratio to adjust the brightness of the image for the purpose of improving the appearance of the image.

[0081]

[0094] One exemplary highlight preservation algorithm increases the bit width of the image, as in the exemplary embodiment of FIG. 9B. FIG. 9B shows a graph illustrating an image processing technique of highlight preservation according to some embodiments of the present disclosure. An original signal 914 from a first set of sensor elements, such as a large group of pixels, may saturate 912 in the highlight region. Saturation in the highlight region causes the raw values ​​from the sensor elements to be clamped to a value of 2^N-1, where N is the sensor bit width (e.g., 10 bits or 12 bits) of the original signal 914. The highlight region of the original signal 914 may be adjusted, such as by being replaced, based on the raw values ​​from a second set of sensor elements, such as a small group of pixels. The different sensitivity of the second set of sensor elements allows the second set of sensor elements to improve the details in the highlight region. The original signal 914 with a restored signal 916 in the highlight region as shown in FIG. 9B has improved details than the original signal 914 based on the benefit of two representations of the scene based on two different sensitivities. The resulting signal may be part of an HDR image frame with a bit width greater than the bit width of the original signal 914. The value range and corresponding bit-width of the original signal 914 with highlight regions adjusted using the restored signal 916 is 2^K-1, where K is the bit-width after HDR fusion.

[0082]

[0095] It should be noted that one or more blocks (or operations) described with reference to Figures 4, 5, 6B, 7, and / or 8 may be combined with one or more blocks (or operations) described with reference to another figure. For example, one or more blocks (or operations) of Figure 4 may be combined with one or more blocks (or operations) of Figure 7. As another example, one or more blocks associated with Figure 5 may be combined with one or more blocks associated with Figure 8. As another example, one or more blocks associated with Figures 4, 5, 6B, 7, and / or 8 may be combined with one or more blocks (or operations) associated with Figures 1, 2, and / or 6A.

[0083]

[0096] In one or more aspects, the techniques for supporting image processing may include additional aspects, such as any single aspect or any combination of aspects described below or with respect to one or more other processes or devices described elsewhere herein. In a first aspect, supporting image processing may include an apparatus configured to capture and / or process image data, such as in an image capture device. The apparatus may include a split-pixel image sensor according to one or more embodiments described herein. In addition, the apparatus may implement or operate according to one or more aspects as described below. For example, the apparatus may perform a step including receiving image data, the image data including first data corresponding to a first set of sensor elements capturing a first representation of a scene with a first sensitivity and second data corresponding to a second set of sensor elements capturing a second representation of the scene with a second sensitivity different from the first sensitivity. In some aspects, such as in combination with one or more aspects described below, the first data and the second data were captured in parallel from one image sensor. In some aspects, the first data and the second data include values ​​of a color pattern, such as a color filter array (CFA) larger than a Bayer pattern, examples of such a CFA are 2×2CFA, 3×3CFA, 4×4CFA, 5×5CFA, 6×6CFA, 7×7CFA, 8×8CFA, or N×N CFA. In some aspects, each of the first and second sets of sensor elements may have the same size, such that the first and second sets form a uniform array of sensor elements with the same surface area exposed to collect light. In some aspects, the apparatus may further include determining an output dynamic range for the output image frame and determining the output image frame based on at least one of the first and second data and based on the determined output dynamic range. In some implementations, the apparatus includes a wireless device, such as a user equipment (UE) or a base station (BS).In some implementations, the apparatus may include at least one processor and a memory coupled to the processor. The processor may be configured to perform the operations described herein with respect to the apparatus. In some other implementations, the apparatus may include a non-transitory computer-readable medium having program code recorded thereon, the program code being executable by a computer to cause the computer to perform the operations described herein with respect to the apparatus. In some implementations, the apparatus may include one or more means configured to perform the operations described herein. In some implementations, a method of image processing may include one or more operations described herein with respect to the apparatus.

[0084]

[0097] In a second aspect, in combination with the first aspect, the first set of sensor elements is associated with a neutral density (ND) filter configured to reduce incident light on the first set of sensor elements.

[0085]

[0098] In a third aspect, in combination with one or more of the first or second aspect, a first set of sensor elements is associated with a first capacitance that is greater than a second capacitance associated with a second set of sensor elements.

[0086]

[0099] In a fourth aspect, in combination with one or more of the first to third aspects, the second set of sensor elements captured the second data at a second exposure time different from a first exposure time of the first set of sensor elements capturing the first data.

[0087]

[0100] In a fifth aspect, in combination with one or more of the first to fourth aspects, determining the output image frame includes combining the first data with corresponding second data to generate an output image frame having an output dynamic range, the output dynamic range being higher than the first dynamic range of the first data and higher than the second dynamic range of the second data.

[0088]

[0101] In a sixth aspect, in combination with one or more of the first to fifth aspects, determining the output image frame includes generating replacement data corresponding to a second set of sensor elements based on the first data, and determining third data based on combining the first data and the replacement data, wherein the output image frame is based on the third data.

[0089]

[0102] In a seventh aspect, in combination with one or more of the first to sixth aspects, determining the output image frame further includes modifying highlight regions in the third data based on the second data.

[0090]

[0103] In an eighth aspect, in combination with one or more of the first to seventh aspects, modifying the highlight area in the third data includes determining scaled third data based on the second data such that the third data outside the highlight area and the second data inside the highlight area are representable in a sensor bit width of the third data, and replacing the highlight area of ​​the scaled third data with a corresponding portion of the second data.

[0091]

[0104] In a ninth aspect, in combination with one or more of the first to eighth aspects, modifying the highlighted region in the third data includes replacing the highlighted region of the third data with a corresponding portion of the second data.

[0092]

[0105] In a tenth aspect, in combination with one or more of the first to ninth aspects, receiving the first data includes reading out a first set of sensor elements via a first floating node, and receiving the second data includes reading out a second set of sensor elements via a second floating node.

[0093]

[0106] In an eleventh aspect, in combination with one or more of the first to tenth aspects, the apparatus further includes an image sensor comprising a first set of sensor elements and a second set of sensor elements, the first set of sensor elements and the second set of sensor elements comprising a uniform array of sensor elements representing a color pattern of a color filter array (CFA) larger than a Bayer pattern.

[0094]

[0107] In one or more aspects, techniques for supporting image processing may include additional aspects, such as any single aspect or any combination of aspects described with respect to one or more other processes or devices described below or elsewhere herein. In a twelfth aspect, supporting image processing includes an image sensor comprising a first set of sensor elements and a second set of sensor elements, the first set of sensor elements and the second set of sensor elements comprising a uniform array of sensor elements representing a color pattern of a color filter array (CFA) that is larger than a Bayer pattern; a memory storing processor-readable code and coupled to the image sensor; and at least one processor coupled to the memory and coupled to the image sensor. At least one processor may be configured to execute processor readable code that causes the at least one processor to: record in a memory first and second data captured from an image sensor during at least partially overlapping times, the first data from a first set of sensor elements capturing a first representation of a scene with a first sensitivity and the second data from a second set of sensor elements capturing a second representation of the scene with a second sensitivity different from the first sensitivity; determine an output dynamic range for an output image frame; and determine the output image frame based on the output dynamic range and based on at least one of the first data and the second data. The method executes the steps including:

[0095]

[0108] In a thirteenth aspect, in combination with one or more of the first to twelfth aspects, the apparatus further includes a neutral density filter coupled to the second set of sensor elements.

[0096]

[0109] In a fourteenth aspect, in combination with one or more of the first to thirteenth aspects, the apparatus further includes an image sensor comprising a first floating node coupled to the first set of sensor elements, a second floating node coupled to the second set of sensor elements, and a configurable path coupling the first floating node and the second floating node.

[0097]

[0110] In a fifteenth aspect, in combination with one or more of the first to fourteenth aspects, recording the first data and the second data in the memory includes controlling a configurable path to record the first data via a first floating node and controlling a configurable path to record the second data via a second floating node.

[0098]

[0111] In a sixteenth aspect, in combination with one or more of the first to fifteenth aspects, the image sensor comprises a capacitor coupled between the second floating node and the second set of sensor elements.

[0099]

[0112] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, the data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0100]

[0113] The components, functional blocks, and modules described herein with respect to Figures 1-9 include, among other examples, processors, electronic devices, hardware devices, electronic components, logic circuits, memories, software code, firmware code, or any combination thereof. Software should be construed broadly to mean, among other examples, instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, and / or functions, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Additionally, features discussed herein may be implemented via dedicated processor circuitry, via executable instructions, or combinations thereof.

[0101]

[0114] Those skilled in the art will further appreciate that the various exemplary logic blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability of hardware and software, various exemplary components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosure. Those skilled in the art will also readily appreciate that the order or combination of components, methods, or interactions described herein are merely examples, and that the components, methods, or interactions of various aspects of the disclosure may be combined or performed in other ways than those shown and described herein.

[0102]

[0115] The various example logic, logic blocks, modules, circuits, and algorithmic processes described in connection with the implementations disclosed herein may be implemented as electronic hardware, computer software, or a combination of both. Interchangeability between hardware and software has been generally described in terms of functionality and illustrated in the various example components, blocks, modules, circuits, and processes described above. Whether such functionality is implemented in hardware or software depends on the particular application and design constraints imposed on the overall system.

[0103]

[0116] The hardware and data processing devices used to implement the various example logic, logic blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed using general purpose single-chip or multi-chip processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller, or state machine. In some implementations, a processor may be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In some implementations, particular processes and methods may be performed by circuitry specific to a given function.

[0104]

[0117] In one or more aspects, the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, or any combination thereof, including the structures disclosed herein and their structural equivalents. Implementations of the subject matter described herein may also be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a computer storage medium for execution by or to control the operation of a data processing apparatus.

[0105]

[0118] If implemented in software, the functions may be stored on or transmitted over a computer-readable medium as one or more instructions or code. The processes of the methods or algorithms disclosed herein may be executed in processor-executable software modules that may reside on a computer-readable medium. Computer-readable media includes both computer storage media and communication media, including any medium that may enable transfer of a computer program from one place to another. A storage medium may be any available medium that may be accessed by a computer. By way of example, and not limitation, such computer-readable media may include random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to store desired program code in the form of instructions or data structures and that may be accessed by a computer. Also, any connection may be properly referred to as a computer-readable medium. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks typically reproduce data magnetically and discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer readable media. Additionally, operations of a method or algorithm may reside on machine readable and computer readable media, which may be embodied in a computer program product as one or any combination or set of code and instructions.

[0106]

[0119] Various modifications of the implementations described in this disclosure may be readily apparent to those skilled in the art, and the general principles defined herein may be applied to several other implementations without departing from the spirit or scope of this disclosure. Thus, the claims are not limited to the implementations shown herein, but should be accorded the widest scope consistent with this disclosure, the principles and novel features disclosed herein.

[0107]

[0120] In addition, those skilled in the art will readily appreciate that the terms "upper" and "lower" may be used to facilitate description of the figures, and refer to relative positions that correspond to the orientation of the figure on a suitably oriented page, and may not reflect the proper orientation of any device in which it may be implemented.

[0108]

[0121] Some features described herein in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, although features may be described above as working in several combinations, and may even be initially claimed as such, one or more features from a claimed combination may, in some cases, be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0109]

[0122] Similarly, although operations are shown in the figures in a particular order, this should not be understood as requiring such operations to be performed in the particular order or sequential order shown, or that all of the operations shown be performed, to achieve desirable results. Additionally, the figures may generally depict one or more exemplary processes in the form of a flow diagram. However, other operations not shown may be incorporated into the generally depicted exemplary process. For example, one or more additional operations may be performed before, after, simultaneously with, or between any of the depicted operations. In some circumstances, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged within multiple software products. Additionally, some other implementations fall within the scope of the following claims. In some cases, the actions recited in the claims may be performed in a different order and still achieve desirable results.

[0110]

[0123] The term "or" as used herein, including in the claims, when used in a list of two or more items means that any one of the listed items may be employed alone, or any combination of two or more of the listed items may be employed. For example, if a composition is described as containing components A, B, or C, the composition may contain only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, or a combination of A, B, and C. Also, as used herein, including in the claims, in a list of items ending with "at least one of" indicates a disjunctive list, such as, for example, a list of "at least one of A, B, or C" means any of A or B or C or AB or AC or BC or ABC (i.e., A and B and C) or any of these in any combination thereof. As one of ordinary skill in the art would understand, the term "substantially" is defined as most of what is specified (including what is specified, e.g., substantially 90 degrees includes 90 degrees, and substantially parallel includes parallel), but not necessarily all of it. In any disclosed implementation, the term "substantially" may be replaced with "within [a percentage] of" what is specified, where the percentage includes .1, 1, 5, or 10 percent.

[0111]

[0124] The above description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements; receiving second data corresponding to the scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern including a color filter array (CFA) that is larger than a Bayer pattern; determining an output dynamic range for an output image frame; determining the output image frame based on the output dynamic range and the first data and the second data, wherein determining the output image frame comprises inputting the first data and the second data to a pixel separation module to determine a Bayer-patterned first image frame from the first data and a Bayer-patterned second image frame from the second data; and inputting the first image frame and the second image frame to a high dynamic range (HDR) processing module to determine the output image frame based on tone mapping using the first image frame and the second image frame. A method comprising:

2. The method of claim 1 , wherein the first set of sensor elements is associated with a neutral density (ND) filter configured to reduce light incident on the first set of sensor elements.

3. The method of claim 1 , wherein the first set of sensor elements is associated with a first capacitance that is greater than a second capacitance associated with the second set of sensor elements.

4. 2. The method of claim 1, wherein the second set of sensor elements captured the second data at a second exposure time that is different from a first exposure time of the first set of sensor elements capturing the first data.

5. a memory for storing processor-readable code; at least one processor coupled to the memory; wherein the at least one processor is configured to execute the processor-readable code, the processor-readable code causing the at least one processor to: receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements; receiving second data corresponding to the scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern including a color filter array (CFA) that is larger than a Bayer pattern; determining an output dynamic range for an output image frame; determining the output image frame based on the output dynamic range and based on the first data and the second data, wherein determining the output image frame comprises inputting the first data and the second data to a pixel separation module to determine a Bayer-patterned first image frame from the first data and a Bayer-patterned second image frame from the second data; and inputting the first image frame and the second image frame to a high dynamic range (HDR) processing module to determine the output image frame based on tone mapping using the first image frame and the second image frame. An apparatus for causing a step including the steps of:

6. The apparatus of claim 5 , wherein the first set of sensor elements are associated with a neutral density (ND) filter configured to reduce light incident on the first set of sensor elements.

7. The apparatus of claim 5 , wherein the first set of sensor elements is associated with a first capacitance that is greater than a second capacitance associated with the second set of sensor elements.

8. 6. The apparatus of claim 5, wherein the second set of sensor elements captured the second data at a second exposure time that is different from a first exposure time of the first set of sensor elements capturing the first data.

9. 6. The apparatus of claim 5, wherein determining the output image frame comprises combining first data with corresponding second data to generate the output image frame having the output dynamic range, the output dynamic range being higher than a first dynamic range of the first data and higher than a second dynamic range of the second data.

10. 6. The apparatus of claim 5, further comprising an image sensor including the first set of sensor elements and the second set of sensor elements, wherein the first set of sensor elements and the second set of sensor elements include the uniform array of sensor elements representing the color pattern of a color filter array (CFA) that is larger than a Bayer pattern.

11. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to: receiving first data corresponding to a scene being captured at a first sensitivity, the first data being captured by a first set of sensor elements; receiving second data corresponding to the scene being captured at a second sensitivity, the second data being captured by a second set of sensor elements, the first set of sensor elements and the second set of sensor elements forming a uniform array of sensor elements configured in a color pattern including a color filter array (CFA) that is larger than a Bayer pattern; determining an output dynamic range for an output image frame; determining the output image frame based on the output dynamic range and based on the first data and the second data, wherein determining the output image frame comprises inputting the first data and the second data to a pixel separation module to determine a Bayer-patterned first image frame from the first data and a Bayer-patterned second image frame from the second data; and inputting the first image frame and the second image frame to a high dynamic range (HDR) processing module to determine the output image frame based on tone mapping using the first image frame and the second image frame. A non-transitory computer-readable medium for performing operations including:

Images