Photoelectric conversion device and photoelectric conversion system

Abstract

To suppress deterioration of device characteristics depending on avalanche multiplication.SOLUTION: A photoelectric conversion device comprises: a first APD; a first pulse generation circuit which generates a first pulse signal on the basis of output from the first APD; a first switch provided between a first power source, which supplies a first voltage, and one terminal of the first APD; and a second switch provided between a second power source, which supplies a second voltage, and one terminal of the first APD. The first switch is brought into an on-state, such that the first APD is brought into a recharge state, and the first switch is brought into an off-state, such that the first APD is brought into a standby state. The second switch is brought into an on-state, such that the first APD is brought into an inactive state, and the second switch is brought into an off-state, such that the first APD is brought into an active state. A period in which the first switch is in the on-state is different from a period in which the second switch is in the on-state.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a structure of a photoelectric conversion device and a photoelectric conversion system. [Background technology]

[0002] 2. Description of the Related Art Photoelectric conversion devices having pixels each including a plurality of avalanche photodiodes (APDs) are known.

[0003] Patent Document 1 discloses an APD, a quench circuit connected to the APD, a signal control circuit to which a signal output from the APD is input, and a pulse generation circuit connected to the quench circuit and the signal control circuit. It discloses that a pulse signal generated by the pulse generation circuit controls the on / off of the quench circuit and resets the output signal of the APD, thereby outputting a pulse signal according to input photons even under high luminance. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2020-123847 A Summary of the Invention [Problem to be solved by the invention]

[0005] Since an APD has only one electrode for charge collection, and all the charges are collected at that electrode, causing avalanche multiplication, there is a possibility that device characteristics that depend on avalanche multiplication may be degraded. [Means for solving the problem]

[0006] One aspect of the present invention is a photoelectric conversion device having a first avalanche photodiode, the photoelectric conversion device comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first switch provided between a first power supply that supplies a first voltage and one terminal of the first avalanche photodiode; a second power supply that supplies a second voltage different from the first voltage; and a second switch provided between the first power supply and one terminal of the first avalanche photodiode, the first switch being turned on to place the first avalanche photodiode in a recharge state, the first switch being turned off to place the first avalanche photodiode in a standby state, the second switch being turned on to place the first avalanche photodiode in an inactive state, and the second switch being turned off to place the first avalanche photodiode in an active state, and a period during which the first switch is turned on and a period during which the second switch is turned on are different.

[0007] Another aspect of the present invention is a photoelectric conversion device including a first avalanche photodiode, the photoelectric conversion device having: a first pulse generating circuit that generates a first pulse signal based on an output from the first avalanche photodiode; a first power supply that supplies a first voltage to one terminal of the first avalanche photodiode via a first switch; a second power supply that supplies a second voltage different from the voltage of the first power supply to the other terminal of the first avalanche photodiode; and a third power supply that supplies a third voltage different from the voltage of the first power supply and the voltage of the second power supply to the one terminal via a second switch, the photoelectric conversion device characterized in that a period during which the first switch is in an on state is different from a period during which the second switch is in an on state. Effect of the Invention

[0008] By reducing the frequency of use of electrodes for charge collection, degradation of device characteristics that depend on avalanche multiplication is suppressed. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing a configuration of a photoelectric conversion device according to an embodiment. [Diagram 2] 4 is an example of an arrangement of a sensor substrate of a photoelectric conversion device according to an embodiment. [Diagram 3] 4 is an example of the layout of a circuit board of a photoelectric conversion device according to an embodiment. [Figure 4] 1 is a block diagram including an equivalent circuit of a photoelectric conversion element of a photoelectric conversion device according to an embodiment. [Diagram 5] 5 is a diagram showing the relationship between the operation of an APD and an output signal of the photoelectric conversion device according to the embodiment. FIG. [Figure 6] 1 is a diagram illustrating an example of the configuration of a photoelectric conversion element and a signal processing circuit according to a first embodiment. [Figure 7] 4 is a timing chart showing the operation of the signal processing circuit according to the first embodiment. [Figure 8] FIG. 1 is a conceptual diagram of a photoelectric conversion element according to a first embodiment. [Figure 9] FIG. 4 is a cross-sectional view of a photoelectric conversion element according to a second embodiment. [Figure 10] FIG. 11 is a potential diagram of a photoelectric conversion element according to a second embodiment. [Figure 11] FIG. 4 is a plan view of a photoelectric conversion element according to a second embodiment. [Figure 12] FIG. 11 is a potential diagram of a photoelectric conversion element according to a second embodiment. [Figure 13] FIG. 11 is a cross-sectional view of a photoelectric conversion element according to a third embodiment. [Figure 14] FIG. 11 is a cross-sectional view of a trench structure of a photoelectric conversion element according to a third embodiment. [Figure 15] FIG. 11 is a plan view of a photoelectric conversion element according to a third embodiment. [Figure 16] FIG. 11 is a cross-sectional view of a photoelectric conversion element according to a fourth embodiment. [Figure 17] FIG. 13 is a plan view of a photoelectric conversion element according to a fourth embodiment. [Figure 18] FIG. 13 is a conceptual diagram of a photoelectric conversion element according to a fifth embodiment. [Figure 19] FIG. 13 is a plan view of a photoelectric conversion element according to a sixth embodiment. [Figure 20] FIG. 13 is a functional block diagram of a photoelectric conversion system according to a seventh embodiment. [Figure 21] FIG. 13 is a functional block diagram of a photoelectric conversion system according to an eighth embodiment. [Figure 22] FIG. 13 is a functional block diagram of a photoelectric conversion system according to a ninth embodiment. [Figure 23] FIG. 23 is a functional block diagram of a photoelectric conversion system according to a tenth embodiment. [Figure 24] FIG. 23 is a functional block diagram of a photoelectric conversion system according to an eleventh embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] The following embodiments are intended to embody the technical ideas of the present invention, and are not intended to limit the present invention. The sizes and positional relationships of the components shown in the drawings may be exaggerated to clarify the explanation. In the following explanation, the same components may be denoted by the same reference numerals, and the explanation may be omitted.

[0011] A configuration common to the photoelectric conversion devices in each embodiment will be described with reference to Figs. 1 to 5. The photoelectric conversion device has a SPAD pixel including an avalanche diode (APD). The conductivity type of the charge used as the signal charge among the charge pairs generated in the avalanche diode is called the first conductivity type. The first conductivity type refers to a conductivity type in which the charge of the same polarity as the signal charge is the majority carrier. The conductivity type opposite to the first conductivity type is called the second conductivity type. In the following, an example will be described in which the signal charge is an electron, the first conductivity type is an N type, and the second conductivity type is a P type, but the signal charge may be a hole, the first conductivity type is a P type, and the second conductivity type is an N type.

[0012] When the signal charge is electrons, the signal is read out from the cathode of the APD, but when the signal charge is holes, the signal is read out from the anode of the APD. Therefore, the relationship between the cathode and anode of the APD is reversed.

[0013] In this specification, the term "planar view" refers to a view from a direction perpendicular to the light incident surface of the semiconductor layer on which the photoelectric conversion element described later is disposed. Also, the term "cross section" refers to a surface in a direction perpendicular to the light incident surface of the semiconductor layer on which the photoelectric conversion element is disposed. Note that, when the light incident surface of the semiconductor layer is a rough surface when viewed microscopically, the planar view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0014] In the following description, the anode of the APD is set to a fixed potential, and a signal is taken out from the cathode side. Therefore, the first conductive type semiconductor region having charges of the same polarity as the signal charge as the majority carrier is an N-type semiconductor region, and the second conductive type semiconductor region having charges of a different polarity than the signal charge as the majority carrier is a P-type semiconductor region. The present invention is also valid when the cathode of the APD is set to a fixed potential, and a signal is taken out from the anode side. In this case, the first conductive type semiconductor region having charges of the same polarity as the signal charge as the majority carrier is a P-type semiconductor region, and the second conductive type semiconductor region having charges of a different polarity than the signal charge as the majority carrier is an N-type semiconductor region. In the following, a case where one node of the APD is set to a fixed potential will be described, but the potentials of both nodes may fluctuate.

[0015] In this specification, when the term "impurity concentration" is used simply, it means the net impurity concentration minus the amount compensated by the impurity of the opposite conductivity type. In other words, "impurity concentration" refers to the NET doping concentration. A region where the P-type doped impurity concentration is higher than the N-type doped impurity concentration is a P-type semiconductor region. Conversely, a region where the N-type doped impurity concentration is higher than the P-type doped impurity concentration is an N-type semiconductor region.

[0016] First, a configuration common to each embodiment will be described.

[0017] FIG. 1 is a diagram showing the configuration of a photoelectric conversion device 100 according to an embodiment of the present invention. In the following, a case where the photoelectric conversion device 100 is a stacked type photoelectric conversion device will be described as an example. That is, a photoelectric conversion device configured by stacking and electrically connecting two substrates, a sensor substrate 11 and a circuit substrate 21, will be described as an example. However, the photoelectric conversion device is not limited to this. For example, the photoelectric conversion device may be a photoelectric conversion device in which the configuration included in the sensor substrate 11 and the configuration included in the circuit substrate are arranged on a common semiconductor layer, as described below. In the following, a photoelectric conversion device in which the configuration included in the sensor substrate 11 and the configuration included in the circuit substrate are arranged on a common semiconductor layer will also be referred to as a non-stacked photoelectric conversion device.

[0018] The sensor substrate 11 has a first semiconductor layer having a photoelectric conversion element 102 described later, and a first wiring structure. The circuit substrate 21 has a second semiconductor layer having circuits such as a signal processing circuit 103 described later, and a second wiring structure. The photoelectric conversion device 100 is configured by laminating the second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer in this order.

[0019] FIG. 1 illustrates a back-illuminated photoelectric conversion device in which light is incident from a first surface and a circuit board is disposed on a second surface opposite the first surface. In the case of a non-stacked photoelectric conversion device, the surface on which the transistors of the signal processing circuit are disposed is called the second surface. In the case of a back-illuminated photoelectric conversion device, the first surface opposite the second surface of the semiconductor layer is the light incident surface. In the case of a front-illuminated photoelectric conversion device, the second surface of the semiconductor layer is the light incident surface.

[0020] In the following, the sensor substrate 11 and the circuit substrate 21 will be described as diced chips, but are not limited to chips. For example, each substrate may be a wafer. Also, each substrate may be stacked in a wafer state and then diced, or each chip may be stacked and bonded after being chipped.

[0021] A pixel region 12 is disposed on the sensor substrate 11, and a circuit region 22 that processes signals detected in the pixel region 12 is disposed on the circuit substrate 21.

[0022] 2 is a diagram showing an example of the arrangement of the sensor substrate 11. Pixels 101 each having a photoelectric conversion element 102 including an avalanche photodiode (hereinafter, APD) are arranged in a two-dimensional array in a plan view to form a pixel region 12.

[0023] The pixel 101 is typically a pixel for forming an image, but when used for TOF (Time of Flight), it does not necessarily have to form an image. That is, the pixel 101 may be a pixel for measuring the time when light arrives and the amount of light.

[0024] 3 is a configuration diagram of the circuit board 21. It has a signal processing circuit 103 for processing electric charges photoelectrically converted by the photoelectric conversion element 102 in FIG. 2, a readout circuit 112, a control pulse generation unit 115, a horizontal scanning circuit unit 111, a signal line 113, and a vertical scanning circuit unit 110.

[0025] The photoelectric conversion element 102 in FIG. 2 and the signal processing circuit 103 in FIG. 3 are electrically connected via a connection wiring provided for each pixel.

[0026] The vertical scanning circuit section 110 receives a control pulse supplied from a control pulse generating section 115 and supplies the control pulse to each pixel. The vertical scanning circuit section 110 uses logic circuits such as a shift register and an address decoder.

[0027] The control pulse generating unit 115 has a signal generating unit 215 that generates a control signal P_CLK for a switch, which will be described later. The signal generating unit 215 generates a pulse signal for controlling the switch, as will be described later. For example, as shown in FIG. 4(a), the signal generating unit 215 may generate a control signal P_CLK in common for a plurality of pixels in the pixel region, or as shown in FIG. 4(b), the control signal P_CLK may be generated for each pixel. When the pulse signal P_CLK is generated in common, at least one of the period, the number of pulses, and the pulse width of the signal P_EXP pulse signal for controlling the exposure period is generated in common in correspondence with the exposure period. When the control signal P_CLK is controlled for each pixel, a signal can be generated using both the input signal P_CLK_IN output from the control pulse generating unit 115 and the signal P_EXP for controlling the exposure period. The control pulse generating unit 115 preferably has, for example, a frequency dividing circuit. This allows simple control and reduces an increase in the number of elements.

[0028] The signal output from the photoelectric conversion element 102 of the pixel is processed by the signal processing circuit 103. The signal processing circuit 103 is provided with a counter, a memory, etc., and the memory holds digital values.

[0029] The horizontal scanning circuit unit 111 inputs a control pulse for sequentially selecting each column to the signal processing circuit 103 in order to read out the signal from the memory of each pixel in which the digital signal is held.

[0030] A signal is output to the signal line 113 from the signal processing circuit 103 of the pixel selected by the vertical scanning circuit unit 110 for the selected column.

[0031] The signal output to the signal line 113 is output via an output circuit 114 to a recording unit or a signal processing unit outside the photoelectric conversion device 100 .

[0032] In Fig. 2, the photoelectric conversion elements in the pixel region may be arranged one-dimensionally. The effect of the present invention can be obtained even with only one pixel, and the case of one pixel is also included in the present invention, but the effect of reducing power consumption of this embodiment can be easily obtained with a photoelectric conversion device having multiple pixels. The function of the signal processing unit does not necessarily need to be provided for each photoelectric conversion element, and for example, one signal processing unit may be shared by multiple photoelectric conversion elements and signal processing may be performed sequentially.

[0033] 2 and 3, a plurality of signal processing circuits 103 are arranged in a region overlapping the pixel region 12 in a planar view. A vertical scanning circuit section 110, a horizontal scanning circuit section 111, a readout circuit 112, an output circuit 114, and a control pulse generating section 115 are arranged so as to overlap between an end of the sensor substrate 11 and an end of the pixel region 12 in a planar view. In other words, the sensor substrate 11 has the pixel region 12 and a non-pixel region arranged around the pixel region 12. A plurality of signal processing circuits 103 are arranged in a region overlapping the non-pixel region in a planar view. A vertical scanning circuit section 110, a horizontal scanning circuit section 111, a readout circuit 112, an output circuit 114, and a control pulse generating section 115 are arranged.

[0034] The arrangement of the signal lines 113, the readout circuits 112, and the output circuits 114 is not limited to that shown in Fig. 3. For example, the signal lines 113 may be arranged to extend in the row direction, and the readout circuits 112 may be arranged at the ends of the signal lines 113.

[0035] Fig. 4 is an example of a block diagram including the equivalent circuits of Fig. 2 and Fig. 3. Fig. 4(a) is an example in which the signal generating unit 215 is provided in common to a plurality of pixels, and Fig. 4(b) is an example in which the control signal P_CLK can be controlled for each pixel.

[0036] In FIG. 4, a photoelectric conversion element 102 having an APD 201 is provided on a sensor substrate 11, and other members are provided on a circuit substrate 21.

[0037] The APD201 generates a pair of electric charges according to the incident light by photoelectric conversion. One of the two nodes of the APD201 is connected to a control line (second power supply) to which a driving voltage VL (second voltage) is supplied. The other of the two nodes of the APD201 is connected to a control line (first power supply) to which a driving voltage VH (first voltage) higher than the voltage VL supplied to the anode is supplied. In FIG. 4, one node of the APD201 is an anode, and the other node of the APD is a cathode. A reverse bias voltage is supplied to the anode and cathode of the APD201 such that the APD201 performs an avalanche multiplication operation. By supplying such a voltage, the electric charges generated by the incident light undergo avalanche multiplication, and an avalanche current is generated.

[0038] When a reverse bias voltage is supplied, there are two modes: a Geiger mode in which the potential difference between the anode and cathode is greater than the breakdown voltage, and a linear mode in which the potential difference between the anode and cathode is close to or less than the breakdown voltage.

[0039] An APD operated in Geiger mode is called a SPAD. For example, the voltage VL (second voltage) is −30 V, and the voltage VH (first voltage) is 1 V. The APD 201 may be operated in either linear mode or Geiger mode. In the case of a SPAD, the potential difference is larger than that of a linear mode APD, and the effect of withstanding voltage is more pronounced, so a SPAD is preferable.

[0040] The switch 202 is connected to a control line to which a drive voltage VH is supplied and to the APD 201. The switch 202 is connected to one of the anode and cathode nodes of the APD. The switch 202 switches the potential difference between the anode and cathode of the APD between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication. Hereinafter, switching from the second potential difference to the first potential difference is also referred to as turning on the switch 202, and switching from the first potential difference to the second potential difference is also referred to as turning off the switch 202. The switch 202 functions as a quenching element. The switch 202 functions as a load circuit (quenching circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 201 (quenching operation). The switch 202 also has a function of returning the voltage supplied to the APD 201 to the drive voltage VH by passing a current equivalent to the voltage drop caused by the quench operation (recharge operation). In other words, the switch 202 functions as a control circuit for controlling the occurrence of avalanche multiplication in the APD 201.

[0041] 4 shows a case where the switch 202 is a PMOS transistor. A control signal P_CLK for the switch 202, which is supplied from the signal generating unit 215, is applied to a gate electrode of the MOS transistor that constitutes the switch 202. In this embodiment, the voltage applied to the gate electrode of the switch 202 is controlled to control the on and off of the switch 202.

[0042] The signal processing circuit 103 has a waveform shaping section 210, a counter circuit 211, and a selection circuit 212. In Fig. 4, the signal processing circuit 103 has the waveform shaping section 210, the counter circuit 211, and the selection circuit 212, but in this specification, it is sufficient that the signal processing circuit 103 has at least one of the waveform shaping section 210, the counter circuit 211, and the selection circuit 212.

[0043] The waveform shaping unit 210 shapes the potential change of the cathode of the APD 201 obtained when a photon is detected, and outputs a pulse signal. The node on the input side of the waveform shaping unit 210 is nodeA, and the node on the output side is nodeB. The waveform shaping unit 210 changes the output potential from the node nodeB depending on whether the input potential to the node nodeA is equal to or higher than a predetermined value or lower. For example, in FIG. 5, when the input potential to the node nodeA becomes a high potential equal to or higher than the judgment threshold, the output potential from the node nodeB becomes a low level. When the input potential to the node nodeA becomes a potential lower than the judgment threshold, the output potential from the node nodeB becomes a high level. For example, an inverter circuit is used as the waveform shaping unit 210. In FIG. 4, an example in which one inverter is used as the waveform shaping unit 210 is shown, but a circuit in which multiple inverters are connected in series may be used, or other circuits having a waveform shaping effect may be used.

[0044] It is possible to perform a quench operation and a recharge operation using the switch 202 according to the avalanche multiplication in the APD 201, but depending on the timing of photon detection, it may not be determined as an output signal. For example, assume that avalanche multiplication occurs in the APD, the node nodeA becomes low level, and a recharge operation is performed. In general, the decision threshold of the waveform shaping unit 210 is set to a potential higher than the potential difference at which avalanche multiplication occurs in the APD. When a photon is incident when the potential of the node nodeA is lower than the decision threshold due to the recharge operation and the potential is such that avalanche multiplication is possible in the APD, avalanche multiplication occurs in the APD and the voltage of nodeA drops. In other words, since the potential of nodeA drops at a voltage lower than the decision threshold, the output potential from the node nodeB does not change even though a photon is detected. Therefore, even though avalanche multiplication occurs, it is not determined as a signal. In particular, under high illuminance, photons enter continuously in a short period of time, making it difficult to determine as a signal. As a result, even if the illuminance is high, the actual number of incident photons is likely to deviate from the output signal.

[0045] In contrast, by applying a control signal P_CLK to the switch 202 to switch the switch 202 between an on state and an off state, it is possible to determine a signal even when photons enter the APD continuously in a short period of time. In FIG. 5, an example is described in which the control signal P_CLK is a pulse signal with a repetitive cycle. In other words, in FIG. 5, a form is described in which the switch 202 is switched on and off at a predetermined clock frequency. However, the effect of suppressing an increase in power consumption of the photoelectric conversion device can be obtained even if the pulse signal is not a signal with a repetitive cycle.

[0046] The counter circuit 211 counts the pulse signal output from the waveform shaping unit 210 and holds the count value. When a control pulse pRES is supplied via a drive line 213, the signal held in the counter circuit 211 is reset.

[0047] A control pulse pSEL is supplied to the selection circuit 212 from the vertical scanning circuit unit 110 in Fig. 3 via a drive line 214 (not shown in Fig. 3) in Fig. 4, and switches between electrical connection and non-connection between the counter circuit 211 and the signal line 113. The selection circuit 212 includes, for example, a buffer circuit for outputting a signal. An output signal OUT shown in Fig. 4 is a signal output from a pixel.

[0048] The electrical connection may be switched by disposing a switch such as a transistor between the switch 202 and the APD 201 or between the photoelectric conversion element 102 and the signal processing circuit 103. Similarly, the supply of the voltage VH or the voltage VL to the photoelectric conversion element 102 may be electrically switched using a switch such as a transistor.

[0049] In this embodiment, a configuration using the counter circuit 211 has been shown. However, instead of the counter circuit 211, a photoelectric conversion device 100 may be configured to acquire the pulse detection timing using a time-to-digital converter (hereinafter, TDC) and a memory. In this case, the generation timing of the pulse signal output from the waveform shaping unit 210 is converted into a digital signal by the TDC. To measure the timing of the pulse signal, a control pulse pREF (reference signal) is supplied to the TDC from the vertical scanning circuit unit 110 in FIG. 1 via a drive line. The TDC acquires, as a digital signal, a signal obtained by converting the input timing of the signal output from each pixel via the waveform shaping unit 210 into a relative time based on the control pulse pREF.

[0050] As shown in FIG. 4(b), the signal generating unit 215 may be provided for each pixel. In FIG. 4(b), the circuits after the waveform shaping unit 210 shown in FIG. 4(a) and the signal generating unit are omitted. It is assumed that the signal generating unit 215 in FIG. 4(a) is provided for each pixel. In FIG. 4(b), a logic circuit is provided within the pixel to determine whether or not to supply a pulse signal to the switch 202. A signal P_EXP that controls the exposure period and an input signal P_CLK_IN that controls the control signal P_CLK are input to the logic circuit. Then, an inverted signal is output. For example, when the signal P_EXP that controls the exposure period is at a low level and the input signal P_CLK_IN is at a low level, a high-level signal is output from the control signal P_CLK. That is, the switch is turned off. Also, when the signal P_EXP that controls the exposure period is at a high level and the input signal P_CLK_IN is at a high level, a low-level signal is output from the control signal P_CLK. That is, the switch is turned on. Furthermore, when either the signal P_EXP that controls the exposure period or the input signal P_CLK_IN is at a low level, a high-level signal is output as the control signal P_CLK. That is, the switch 202 is turned off. It is preferable to control the switch for each pixel in this manner. When the circuit diagram of FIG. 4(b) is used, as will be described in the second embodiment below, when the exposure period P becomes a low level, the control signal P_CLK is maintained at a high level. That is, the switch is turned off.

[0051] FIG. 5 is a diagram showing a schematic diagram of the relationship between the control signal P_CLK of the switch, the potential of the node nodeA, the potential of the node nodeB, and the output signal. In this embodiment, when the control signal P_CLK is at a high level, the drive voltage VH is not easily supplied to the APD, and when the control signal P_CLK is at a low level, the drive voltage VH is supplied to the APD. The high level of the control signal P_CLK is, for example, 1V, and the low level of the control signal P_CLK is, for example, 0V. When the control signal P_CLK is at a high level, the switch is turned off, and when the control signal P_CLK is at a low level, the switch is turned on. The resistance value of the switch when the control signal P_CLK is at a high level is higher than the resistance value of the switch when the control signal P_CLK is at a low level. When the control signal P_CLK is at a high level, even if avalanche multiplication occurs in the APD, a recharge operation is not easily performed, so the potential supplied to the APD is a potential equal to or lower than the breakdown voltage of the APD. Therefore, the avalanche multiplication operation in the APD stops.

[0052] As shown in Fig. 4, it is preferable that the switch 202 is configured with one transistor, and that one transistor performs the quenching operation and the recharge operation. This makes it possible to reduce the number of circuits compared to the case where the quenching operation and the recharge operation are performed by different circuit elements. In particular, when each pixel has a counter circuit and the SPAD signal is read out for each pixel, it is preferable to reduce the circuit area used for the switch in order to place the counter circuit, and the effect of configuring the switch 202 with one transistor becomes significant.

[0053] At time t1, the control signal P_CLK changes from high level to low level, the switch is turned on, and the recharge operation of the APD is started. This causes the potential of the cathode of the APD to transition to high level. Then, the potential difference between the potentials applied to the anode and cathode of the APD becomes a state in which avalanche multiplication is possible. The potential of the cathode is the same as that of the node nodeA. Therefore, when the potential of the cathode transitions from low level to high level, the potential of the node nodeA becomes equal to or higher than the judgment threshold value at time t2. At this time, the pulse signal output from the node nodeB is inverted and goes from high level to low level. After that, the potential difference of the drive voltage VH-drive voltage VL is applied to the APD 201. The control signal P_CLK becomes high level, and the switch is turned off.

[0054] Next, at time t3, when a photon is incident on the APD 201, avalanche multiplication occurs in the APD 201, and the voltage of the cathode drops. That is, the voltage of the node nodeA drops. When the amount of voltage drop becomes larger and the voltage difference applied to the APD 201 becomes smaller, the avalanche multiplication of the APD 201 stops as at time t2, and the voltage level of the node nodeA does not drop by more than a certain value. When the voltage of the node nodeA becomes lower than the decision threshold while the voltage of the node nodeA is dropping, the voltage of the node nodeB goes from low level to high level. That is, the part of the output waveform at the node nodeA that exceeds the decision threshold is waveform-shaped by the waveform shaping unit 210 and output as a signal at the nodeB. Then, it is counted by the counter circuit, and the count value of the counter signal output from the counter circuit increases by 1 LSB.

[0055] Between time t3 and time t4, photons are incident on the APD. However, since the switch is off and the voltage applied to the APD 201 does not have a potential difference that allows avalanche multiplication, the voltage level of the node A does not exceed the decision threshold.

[0056] At time t4, the control signal P_CLK changes from high to low, turning the switch on. As a result, a current flows to node A to compensate for the voltage drop from the drive voltage VH, and the voltage of node A transitions to its original voltage level. At this time, the voltage of node A becomes equal to or higher than the decision threshold at time t5, so the pulse signal of node B is inverted and goes from high to low.

[0057] At time t6, node A is stabilized to the original voltage level, and the control signal P_CLK goes from low to high. Therefore, the switch is turned off. After this, the potentials of the nodes and signal lines change in response to the control signal P_CLK and the incidence of photons, as described from time t1 to time t6.

[0058] The photoelectric conversion devices of the respective embodiments will be described below.

[0059] <First embodiment> The configuration of the photoelectric conversion device and the driving method thereof in the first embodiment will be described with reference to Figures 6 to 7. In the following description, the same components are denoted by the same reference numerals, and the description will be omitted or simplified.

[0060] FIG. 6 is a diagram showing an example of the configuration of the photoelectric conversion element 102 and the signal processing circuit 103 according to the first embodiment.

[0061] In FIG. 6, the photoelectric conversion element 102 has an APD 2011 (first avalanche photodiode) and an APD 2012 (second avalanche photodiode).

[0062] Each of the APD2011 and APD2012 generates a pair of charges according to the incident light by photoelectric conversion. One of the two nodes of the APD2011 and APD2012 is connected to a control line to which a drive voltage VL (second voltage) is supplied. The other of the two nodes of the APD2011 and APD2012 is connected to a control line to which a drive voltage VH (first voltage) higher than the voltage VL supplied to the anode is supplied. A reverse bias voltage is supplied to the anode and cathode of the APD2011 and APD2012 so that the APD2011 and APD2012 perform avalanche multiplication. By supplying such a voltage, the charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0063] A PMOS transistor 2021 (first switch) as a switch is connected to a control line (first power supply) to which a drive voltage is supplied and one terminal of the APD 2011. Similarly, a PMOS transistor 2022 (third switch) is connected to a control line to which a drive voltage is supplied and one terminal of the APD 2012. The PMOS transistor 2021 is connected to the cathode of the APD 2011, and the PMOS transistor 2022 is connected to the cathode of the APD 2012.

[0064] Furthermore, the PMOS transistor 2021 and the PMOS transistor 2022 function as quenching elements. The PMOS transistor 2021 functions as a load circuit (quenching circuit) during signal multiplication by avalanche multiplication, and suppresses the voltage supplied to the APD 2011 to suppress avalanche multiplication (quenching operation). The PMOS transistor 2022 also functions as a load circuit during signal multiplication by avalanche multiplication, and suppresses the voltage supplied to the APD 2012 to suppress avalanche multiplication. In addition, the PMOS transistor 2021 has a function of returning the voltage supplied to the APD 2011 to the drive voltage VH by flowing a current equivalent to the voltage drop caused by the quenching operation (recharge operation). The PMOS transistor 2022 also has a function of returning the voltage supplied to the APD 2012 to the drive voltage VH.

[0065] A control signal P_CLK1 for the PMOS transistor 2021, supplied from a signal generating unit 215 (not shown), is applied to the gate electrode of the PMOS transistor 2021. A control signal P_CLK2 for the PMOS transistor 2022 is applied to the gate electrode of the PMOS transistor 2022. In the first embodiment, the voltages applied to the gate electrodes of the PMOS transistor 2021 and the PMOS transistor 2022 are controlled to control the on and off of the PMOS transistor 2021 and the PMOS transistor 2022 as switches.

[0066] A drain of an NMOS transistor 2031 (second switch) serving as a switch is connected to the cathode, which is the other terminal, of the APD 2011, and a source of the NMOS transistor 2031 is grounded. A drain of an NMOS transistor 2032 (fourth switch) is connected to the cathode of the APD 2012, and a source of the NMOS transistor 2032 is grounded. In other words, a third voltage is supplied to the NMOS transistor 2031 and the NMOS transistor 2032 from a third power supply.

[0067] A PMOS transistor 2021 and an NMOS transistor 2031 are connected to the APD 2011. Both MOS transistors switch the potential difference between the anode and cathode of the APD 2011 between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication. For example, the voltage VL (second voltage) is −30 V, the voltage VH (first voltage) is 1 V, and the breakdown voltage of the APD 2011 is 30.5 V. When the PMOS transistor 2021 is on and the NMOS transistor 2031 is off, the reverse bias voltage supplied to the APD 2011 is VH-VL=31 V, which is greater than the breakdown voltage of 30.5 V, so that the APD 2011 operates as an avalanche multiplier. In this case, the first potential difference is 31 V. On the other hand, when the PMOS transistor 2021 is off and the NMOS transistor 2031 is on, the reverse bias voltage supplied to the APD 2011 is 0-VL=30V, which is smaller than the breakdown voltage of 30.5V. Therefore, the APD 2011 does not perform avalanche multiplication. In this case, the second potential difference is 30V.

[0068] If the PMOS transistor 2021 and the NMOS transistor 2031 are turned on at the same time, the PMOS transistor 2021 and the NMOS transistor 2031 are shorted, causing a through current. The same happens if the PMOS transistor 2022 and the NMOS transistor 2032 are turned on at the same time. Therefore, the PMOS transistor 2021 and the NMOS transistor 2031 are controlled so as not to be turned on at the same time. Alternatively, it is necessary to provide another switch between the voltage supply wiring and the PMOS transistor 2021 or the NMOS transistor 2031 to prevent a through current from flowing. The PMOS transistor 2022 and the NMOS transistor 2032 are controlled in the same manner.

[0069] Similarly, a PMOS transistor 2022 and an NMOS transistor 2032 are connected to the APD 2012. Both MOS transistors switch the potential difference between the anode and cathode of the APD 2012 between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication.

[0070] A control signal P_ACT1 for the NMOS transistor 2031, supplied from a signal generating unit 215 (not shown), is applied to the gate electrode of the NMOS transistor 2031. In the first embodiment, the voltage applied to the gate electrode of the NMOS transistor 2031 is controlled to control the on / off of the NMOS transistor 2031 as a switch. Similarly, a control signal P_ACT2 for the NMOS transistor 2032 is applied to the gate electrode of the NMOS transistor 2032.

[0071] Hereinafter, a state in which the control signal P_ACT1 turns on the NMOS transistor 2031 and the potential difference between the anode and cathode of the APD 2011 is a second potential difference that does not cause avalanche multiplication is also referred to as inactive. On the other hand, a state in which the control signal P_ACT1 turns off the NMOS transistor 2031 and the potential difference between the anode and cathode of the APD 2011 is a first potential difference that causes avalanche multiplication is also referred to as active.

[0072] Similarly, a state in which the control signal P_ACT2 turns on the NMOS transistor 2032 and the potential difference between the anode and cathode of the APD 2012 is a second potential difference that does not cause avalanche multiplication is also called inactive. A state in which the control signal P_ACT2 turns off the NMOS transistor 2032 and the potential difference between the anode and cathode of the APD 2012 is a first potential difference that causes avalanche multiplication is also called active.

[0073] The signal processing circuit 103 includes a waveform shaping unit 2101 , a waveform shaping unit 2102 , a counter circuit 211 , a selection circuit 212 , and an OR circuit 220 .

[0074] The waveform shaping unit 2101 shapes the potential change of the cathode of the APD 2011 obtained at the time of photon detection, and outputs a pulse signal. The waveform shaping unit 2102 shapes the potential change of the cathode of the APD 2012 obtained at the time of photon detection, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping unit 2101 (first pulse generation circuit) and the waveform shaping unit 2102 (second pulse generation circuit). Although an example using one inverter as the waveform shaping unit 2101 and the waveform shaping unit 2102 is shown in FIG. 6, a circuit in which a plurality of inverters are connected in series may be used, or another circuit having a waveform shaping effect may be used.

[0075] The OR circuit 220 bundles the first pulse signal output from the waveform shaping unit 2101 and the second pulse signal output from the waveform shaping unit 2102 into one signal, and outputs the bundled signal to the counter circuit 211. As a result, the counter circuit 211 counts the total number of photons detected by the APD 2011 and the APD 2012.

[0076] The counter circuit 211 counts the pulse signal output from the OR circuit 220 and holds the count value.

[0077] Here, the APD 2011, the PMOS transistor 2021, the NMOS transistor 2031, and the waveform shaping unit 2101 are defined as a first pixel element. Meanwhile, the APD 2012, the PMOS transistor 2022, the NMOS transistor 2032, and the waveform shaping unit 2102 are defined as a second pixel element. In the configuration example of Fig. 6, there are two pixel elements, but the number of pixel elements may be three or more and is not particularly limited.

[0078] Next, a method for driving the photoelectric conversion device according to the first embodiment will be described using the configuration of FIG. 6 as an example.

[0079] If the photoelectric conversion element 102 has only one APD as in Figure 4, all the charges are collected by one electrode and avalanche multiplication occurs, which may cause degradation of the device characteristics that depend on avalanche multiplication. Therefore, by providing one photoelectric conversion element 102 with two or more APDs and alternately or cyclically setting each APD to an active state as in Figure 6, it is possible to suppress degradation of the device characteristics.

[0080] As shown in Fig. 6, when the photoelectric conversion element 102 has two APDs, the avalanche multiplication frequency of each APD is reduced to about half that of when there is only one APD, so that the deterioration of the device characteristics can be suppressed by about two times. Also, as a configuration not shown, consider a case where the photoelectric conversion element 102 further includes a third avalanche photodiode. When the photoelectric conversion element 102 has three APDs, the avalanche multiplication frequency of each APD is reduced to about one-third that of when there is only one APD, so that the deterioration of the device characteristics can be suppressed by about three times. In other words, the greater the number of APDs constituting the photoelectric conversion element 102, the greater the effect of suppressing the deterioration of the device characteristics.

[0081] 7(a) and (b) are timing charts showing the operation of the signal processing circuit 103 according to the first embodiment.

[0082] 7A is a timing chart when the photoelectric conversion element 102 has two APDs 2011 and 2012. When the control signal P_CLK1 is at a low level, the PMOS transistor 2021 is turned on. When the control signal P_CLK2 is at a low level, the PMOS transistor 2022 is turned on. When the control signal P_ACT1 is at a high level, the NMOS transistor 2031 is turned on. When the control signal P_ACT2 is at a high level, the NMOS transistor 2032 is turned on. The control signals P_CLK1, P_CLK2, P_ACT1, and P_ACT2 are at a high level, for example, when each signal is 1V. The control signals P_CLK1, P_CLK2, P_ACT1, and P_ACT2 are at a low level, for example, when each signal is 0V.

[0083] When the control signals P_CLK1 and P_CLK2 are at low level, the drive voltage VH is supplied to the APD 2011 and the APD 2012, and a recharge operation is performed. When the control signals P_ACT1 and P_ACT2 are at high level, the ground voltage is supplied to the APD 2011 and the APD 2012, and they become inactive.

[0084] 7(a), during the period from time t1 to time t2, the control signal P_ACT1 is at a low level, and the APD 2011 is in an active state. Also, one cycle of the control signal P_CLK1 is input, and one photon can be counted during this period. Meanwhile, the control signal P_ACT2 is at a high level, and the APD 2012 is in an inactive state.

[0085] During the period from time t2 to time t3, the control signal P_ACT2 is at a low level, and the APD 2012 is in an active state. Also, one cycle of the control signal P_CLK2 is input, and one photon can be counted during this period. Meanwhile, the control signal P_ACT1 is at a high level, and the APD 2011 is in an inactive state.

[0086] Thereafter, the APD 2011 and the APD 2012 are alternately put into the active state by the control signal P_ACT1 and the control signal P_ACT2, thereby making it possible to suppress deterioration of the device characteristics.

[0087] If the PMOS transistor 2021 and the NMOS transistor 2031 are turned on at the same time, the PMOS transistor 2021 and the NMOS transistor 2031 are shorted out, causing a through current. Therefore, the low level period of the control signal P_CLK1 and the high level period of the control signal P_ACT1 are controlled not to overlap.

[0088] At time t1, the control signal P_ACT1 transitions to a low level, turning off the NMOS transistor 2031 and putting the APD 2011 into an active state. By synchronizing the timing and transitioning the control signal P_CLK1 to a low level, the APD 2011 performs a recharge operation.

[0089] At time t2, the control signal P_ACT1 transitions to high level, turning on the NMOS transistor 2031 and putting the APD 2011 in an inactive state, and the control signal P_CLK1 remains unchanged at high level.

[0090] After time t3, the same control is repeated to prevent the low level period of the control signal P_CLK1 from overlapping with the high level period of the control signal P_ACT1.

[0091] Similarly, if the PMOS transistor 2022 and the NMOS transistor 2032 are turned on at the same time, the PMOS transistor 2022 and the NMOS transistor 2032 are shorted, causing a shoot-through current. Therefore, the low level period of the control signal P_CLK2 and the high level period of the control signal P_ACT2 are controlled so as not to overlap.

[0092] At time t1, the control signal P_ACT2 transitions to high level, turning on the NMOS transistor 2032 and putting the APD 2012 in an inactive state, and the control signal P_CLK2 remains unchanged at high level.

[0093] At time t2, the control signal P_ACT2 transitions to a low level, turning off the NMOS transistor 2032 and activating the APD 2012. By synchronizing the timing and transitioning the control signal P_CLK2 to a low level, the APD 2012 performs a recharge operation.

[0094] After time t3, the same control is repeated to prevent the low-level period of the control signal P_CLK2 from overlapping with the high-level period of the control signal P_ACT2. In other words, a first period during which the APD 2011 is in a standby state and an active state is followed by a second period during which the APD 2012 is in a standby state and an active state, and the first period is resumed after the second period, in a cyclical manner.

[0095] FIG. 7B is a timing chart in the case where the photoelectric conversion element 102 has three APDs and two periods of the control signal P_CLK are input during one active period.

[0096] In Fig. 7(b), during the period from time t1 to time t2, the control signal P_ACT1 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT1 are in an active state. In addition, the control signal P_CLK1 is input for two periods, and two photons can be counted during this period. Meanwhile, the control signals P_ACT2 / 3 are at a high level, and each APD connected to each NMOS transistor controlled by the control signals P_ACT2 / 3 is in an inactive state.

[0097] During the period from time t2 to time t3, the control signal P_ACT2 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT2 are in an active state. In addition, the control signal P_CLK2 is input for two periods, and two photons can be counted during this period. Meanwhile, the control signals P_ACT1 / 3 are at a high level, and each APD connected to each NMOS transistor controlled by the control signals P_ACT1 / 3 is in an inactive state.

[0098] During the period from time t3 to time t4, the control signal P_ACT3 is at a low level, and the APDs connected to the NMOS transistors controlled by the control signal P_ACT3 are in an active state. In addition, the control signal P_CLK3 is input for two periods, and two photons can be counted during this period. Meanwhile, the control signals P_ACT1 / 2 are at a high level, and each APD connected to each NMOS transistor controlled by the control signals P_ACT1 / 2 is in an inactive state.

[0099] Thereafter, the APDs are cyclically put into the active state by the control signals P_ACT1 / 2 / 3, thereby suppressing deterioration of the device characteristics. Note that the order of putting the APDs into the active state may be the control signal P_ACT1, the control signal P_ACT2, and the control signal P_ACT3, or the control signal P_ACT1, the control signal P_ACT3, and the control signal P_ACT2.

[0100] 7(b), the number of pixel elements in the first embodiment may be three or more, and is not particularly limited. Also, the number of cycles of the control signal P_CLK input during one active period may be one cycle or two or more cycles.

[0101] As described above, in the first embodiment, the photoelectric conversion element 102 is configured with two or more APDs, and the APDs are alternately or cyclically put into an active state, thereby making it possible to suppress deterioration of device characteristics.

[0102] <Second embodiment> The configuration of a photoelectric conversion device according to the second embodiment and a driving method thereof will be described with reference to Fig. 8 to Fig. 12. In the following description, the same components are denoted by the same reference numerals, and description thereof may be omitted.

[0103] In the first embodiment, a photoelectric conversion device in which the photoelectric conversion element 102 is composed of two or more APDs and the APDs are alternately or cyclically set to the active state has been described. In this case, since light incident on an area in which an APD in an inactive state exists cannot be detected, the sensitivity is lower than when all the APDs are constantly set to the active state.

[0104] 8A and 8B are conceptual diagrams showing a decrease in sensitivity when the photoelectric conversion element 102 is composed of four APDs and is cyclically put into an active state.

[0105] 8(a) is a plan view of a pixel 101 showing how the APDs are cyclically activated in the order of APD1, APD2, APD3, and APD4, starting from the top left APD and moving clockwise. The white areas indicate the active areas of the pixel 101, and the gray areas indicate the inactive areas of the pixel 101. Charges photoelectrically converted in the inactive areas are not avalanche multiplied and therefore cannot be detected as photons. In other words, the sensitivity of the pixel 101 is approximately 1 / 4 lower than when all four APDs are activated.

[0106] Fig. 8(b) is a plan view of the pixel 101 showing the state where APD1, APD2, APD3, and APD4 are constantly in the active state. Since there is no inactive region, the possibility of missing a photon is lower than in the case of Fig. 8(a), and the sensitivity is about four times higher than when each of the four APDs is in the active state one by one. On the other hand, in the case of Fig. 8(b), the power consumption due to avalanche multiplication is about four times higher than in the case of Fig. 8(a), and the degradation rate of the device characteristics of each APD is also about four times faster.

[0107] Here, a case where the configuration in Fig. 6 is operated by the drive in Fig. 8(b) will be described. Consider a case where the APD 2011 and the APD 2012 are constantly in an active state and photons are detected by both the APD 2011 and the APD 2012. The OR circuit 220 takes the logic of the pulse signals output from the waveform shaping units 2101 and 2102, respectively, and outputs it to the counter circuit 211 as one signal. Therefore, photons detected by each APD are not counted multiple times.

[0108] Note that Figure 8 is merely an image, and it is not necessarily the case that all light incident on the active regions shown in white undergoes avalanche multiplication after photoelectric conversion, and that light incident on the inactive regions shown in grey does not necessarily undergo avalanche multiplication at all after photoelectric conversion. In reality, the midpoints of each APD are considered to be approximate potential peaks, and photons within the regions surrounded by the peaks gather at each APD and undergo avalanche multiplication.

[0109] FIG. 9 is a cross-sectional view taken along a line perpendicular to the surface direction of the substrate, cutting two pixels of a photoelectric conversion element 102 of a photoelectric conversion device according to the second embodiment.

[0110] The following describes the structure and function of the photoelectric conversion element 102. The photoelectric conversion element 102 has a first semiconductor region 311 of N type, a fourth semiconductor region 314, a sixth semiconductor region 316, and a seventh semiconductor region 317. It further includes a second semiconductor region 312, a third semiconductor region 313, and a fifth semiconductor region 315 of P type.

[0111] In the second embodiment, in the cross section shown in Fig. 9, an N-type first semiconductor region 311 is formed in the vicinity of the surface facing the light incident surface, and an N-type seventh semiconductor region 317 is formed around it. A P-type second semiconductor region 312 is formed at a position overlapping the first semiconductor region 311 and the seventh semiconductor region 317 in a planar view to constitute an APD. An N-type fourth semiconductor region 314 is further disposed at a position overlapping the second semiconductor region 312 in a planar view, and an N-type sixth semiconductor region 316 is formed around it. In the cross section shown in Fig. 9, cross sections of two APDs are seen per photoelectric conversion element 102.

[0112] The first semiconductor region 311 constituting the APD has a higher N-type impurity concentration than the fourth semiconductor region 314 and the seventh semiconductor region 317. A PN junction is formed between the P-type second semiconductor region 312 and the N-type first semiconductor region 311, but by making the impurity concentration of the second semiconductor region 312 lower than that of the first semiconductor region 311, the entire region of the second semiconductor region 312 becomes a depletion layer region. Furthermore, this depletion layer region extends to a partial region of the first semiconductor region 311, and a strong electric field is induced in the extended depletion layer region. This strong electric field causes avalanche multiplication in the depletion layer region extending to a partial region of the first semiconductor region 311, and a current based on the multiplied charges is output as a signal charge. When light incident on the photoelectric conversion element 102 is photoelectrically converted and avalanche multiplication occurs in this depletion layer region, the generated first conductivity type charges are collected in the first semiconductor region 311.

[0113] 9, the fourth semiconductor region 314 and the seventh semiconductor region 317 are formed to have approximately the same size, but the size of each semiconductor region is not limited to this. For example, the fourth semiconductor region 314 may be formed to be larger than the seventh semiconductor region 317 so that charges are collected in the first semiconductor region 311 from a wider range.

[0114] The pixels of the photoelectric conversion element are separated by a pixel separation section 324 having a trench structure, and a P-type fifth semiconductor region 315 formed around the pixel separation section separates adjacent photoelectric conversion elements by a potential barrier. Since the photoelectric conversion elements are also separated by the potential of the fifth semiconductor region 315, a trench structure such as the pixel separation section 324 is not essential as a pixel separation section. In addition, when the pixel separation section 324 is provided, its depth and position are not limited to the configuration of FIG. 9. The pixel separation section 324 may be a deep trench isolation (DTI) that penetrates the semiconductor layer, or may be a DTI that does not penetrate the semiconductor layer. Metal may be embedded in the DTI to improve light blocking performance. The pixel separation section 324 may be configured to surround the entire periphery of the photoelectric conversion element in a plan view, or may be configured only on the opposite side of the photoelectric conversion element, for example. On the other hand, an insulating separation section such as a trench structure is not provided between the APDs provided in each pixel.

[0115] A pinning film 321, a planarizing film 322, and a microlens 323 are further formed on the light incident surface side of the semiconductor layer. A filter layer (not shown) may be further disposed on the light incident surface side. The filter layer may be various optical filters such as a color filter, an infrared light cut filter, and a monochrome filter. The color filter may be an RGB color filter, an RGBW color filter, or the like.

[0116] FIG. 10 is a potential diagram per APD of the photoelectric conversion element 102 shown in FIG.

[0117] Dotted line 70 in Fig. 10 indicates the potential distribution of line segment FF' in Fig. 9, and solid line 71 in Fig. 10 indicates the potential distribution of line segment EE' in Fig. 9. Fig. 10 shows the potential as seen from electrons, which are the main carrier charge in the N-type semiconductor region. If the main carrier charge is holes, the relationship between high and low potentials is reversed. Depth A in Fig. 10 corresponds to height A in Fig. 9. Similarly, depth B corresponds to height B, depth C corresponds to height C, and depth D corresponds to height D.

[0118] 10, the potential height of the solid line 71 at depth A is A1, the potential height of the dotted line 70 is A2, the potential height of the solid line 71 at depth B is B1, and the potential height of the dotted line 70 is B2. Also, the potential height of the solid line 71 at depth C is C1, the potential height of the dotted line 70 is C2, the potential height of the solid line 71 at depth D is D1, and the potential height of the dotted line 70 is D2.

[0119] 9 and 10, the potential height of the first semiconductor region 311 corresponds to A1, and the potential height near the center of the second semiconductor region 312 corresponds to B1. In addition, the potential height of the seventh semiconductor region 317 corresponds to A2, and the potential height of the outer edge of the second semiconductor region 312 corresponds to B2.

[0120] 10, the potential gradually decreases from depth D to depth C. Then, the potential gradually increases from depth C to depth B, and the potential reaches the B2 level at depth B. Furthermore, the potential decreases from depth B to depth A, and reaches the A2 level at depth A.

[0121] On the other hand, for solid line 71, the potential gradually decreases from depth D to depth C and from depth C to depth B, reaching level B1 at depth B. Then, the potential steeply decreases from depth B to depth A, reaching level A1 at depth A. At depth D, the potentials of dotted line 70 and solid line 71 are approximately the same height, and in the regions indicated by line segments EE' and FF', there is a potential gradient that gradually decreases toward the second surface side of semiconductor layer 301. Therefore, charges generated in the photodetector move toward the second surface side due to the gradual potential gradient.

[0122] Here, in the avalanche diode of the second embodiment, the P-type second semiconductor region 312 has a lower impurity concentration than the N-type first semiconductor region 311, and potentials are supplied to the first semiconductor region 311 and the second semiconductor region 312 such that they are reverse biased to each other. As a result, a depletion layer region is formed on the second semiconductor region 312 side. With this structure, the second semiconductor region 312 serves as a potential barrier for charges photoelectrically converted in the fourth semiconductor region 314, making it easier for the charges to be collected in the first semiconductor region 311.

[0123] In FIG. 9, the second semiconductor region 312 is formed on the entire surface of the photoelectric conversion element, but for example, the second semiconductor region 312 may not be provided in the portion overlapping the first semiconductor region 311 in a plan view, and a slit through which the fourth semiconductor region 314 extends may be formed. In that case, due to a potential difference between the second semiconductor region 312 and the slit portion, the potential becomes lower from the line segment FF' to the line segment EE' at the depth C in FIG. 9. As a result, in the process of moving the charge photoelectrically converted in the fourth semiconductor region 314, the charge is more likely to move in the direction of the first semiconductor region 311. On the other hand, when the second semiconductor region 312 is formed on the entire surface as in FIG. 9, the applied voltage for obtaining a strong electric field required for avalanche multiplication can be lowered compared to the case where a slit is formed, and noise due to the formation of a local strong electric field region can be suppressed.

[0124] The charges that have moved to the vicinity of the second semiconductor region 312 are accelerated by the steep potential gradient from depth B to depth A of the solid line 71 in FIG. 10, that is, by the strong electric field, and are avalanche multiplied.

[0125] In contrast, between the seventh semiconductor region 317 and the P-type second semiconductor region 312 in Fig. 9, that is, from depth B to depth A of the dotted line 70 in Fig. 10, the potential distribution is such that avalanche multiplication does not occur. Therefore, the charge generated in the fourth semiconductor region 314 can be counted as signal charge without increasing the area of ​​the strong electric field region (avalanche multiplication region) relative to the size of the photodiode. Note that, although the seventh semiconductor region 317 has been described so far as being of N-type conductivity, it may be a P-type semiconductor region as long as the concentration satisfies the above-mentioned potential relationship.

[0126] 10. The charge in the fourth semiconductor region 314 is structured so that it is easy for the charge in the fourth semiconductor region 314 to move to the second semiconductor region 312 due to the above-mentioned reason. Therefore, the charge photoelectrically converted in the second semiconductor region 312 moves to the first semiconductor region 311 and is detected as a signal charge by avalanche multiplication. Therefore, it has sensitivity to the charge photoelectrically converted in the second semiconductor region 312.

[0127] 10 indicates the cross-sectional potential of the line segment FF' in FIG. 9. In the dotted line 70, the intersection of the height A and the line segment FF' in FIG. 9 is A2, the intersection of the height B and the line segment FF' is B2, the intersection of the height C and the line segment FF' is C2, and the intersection of the height D and the line segment FF' is D2. Electrons photoelectrically converted in the fourth semiconductor region 314 in FIG. 9 move along the potential D2 to C2 in FIG. 10, but the potential from C2 to B2 is a potential barrier for the electrons, so they cannot overcome it. Therefore, the electrons move to the center of the fourth semiconductor region 314 in FIG. 9, indicated by the line segment EE'. The electrons move along the potential gradient from C1 to B1 in FIG. 10, are avalanche multiplied by the steep potential gradient from B1 to A1, and are detected as signal charges after passing through the first semiconductor region 311.

[0128] 9 moves along the potential gradient from potential B2 to C2 in FIG. 10. Thereafter, as described above, it moves to the vicinity of the center of the fourth semiconductor region 314 in FIG. 9, indicated by line segment EE'. Then, it is avalanche-multiplied by the steep potential gradient from B1 to A1. The avalanche-multiplied charges pass through the first semiconductor region 311 and are then detected as signal charges.

[0129] Fig. 11 is a pixel plan view of two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the second embodiment. Fig. 11(a) is a plan view seen from the surface opposite to the light incident surface, and Fig. 11(b) is a plan view seen from the light incident surface side. Fig. 9 can be said to be a cross-sectional view cut at line segment HH' in Fig. 11(a).

[0130] 11(a) and 11(b), the first semiconductor region 311, the fourth semiconductor region 314, and the seventh semiconductor region 317 are circular and arranged concentrically. With this structure, it is possible to obtain the effect of suppressing local electric field concentration at the end of the strong electric field region between the first semiconductor region 311 and the second semiconductor region 312 and reducing the DCR. The shape of each semiconductor region is not limited to a circle, and may be, for example, a polygon with the center of gravity aligned.

[0131] A method of suppressing a decrease in sensitivity by inducing photocharges detected in an area where an APD in an inactive state exists to an APD in an active state will be described using the potential diagram in Fig. 12. A solid line 71 in Fig. 12 shows the potential distribution of a line segment EE' in Fig. 9, and a dotted line 72 in Fig. 12 shows the potential distribution of a line segment GG' in Fig. 9. Here, a case will be described in which a potential is applied to the cathode so that the APD depicted on the line segment EE' is in the active state, and a potential is applied to the cathode so that the APD depicted on the line segment GG' is in the inactive state. The solid line 71 in Fig. 12 is equivalent to the solid line 71 in Fig. 10.

[0132] 12, the potential height of the solid line 71 at depth A is A1, the potential height of the dotted line 72 is A3, the potential height of the solid line 71 at depth B is B1, and the potential height of the dotted line 72 is B3. Also, the potential height of the solid line 71 at depth C is C1, the potential height of the dotted line 72 is C3, the potential height of the solid line 71 at depth D is D1, and the potential height of the dotted line 72 is D3.

[0133] 12, the potential gradually decreases from depth D to depth C and from depth C to depth B, reaching a B1 level at depth B. The potential then steeply decreases from depth B to depth A, reaching a A1 level at depth A. At depth D, the potentials of dotted line 72 and solid line 71 are approximately the same height, and in the regions indicated by line segments EE' and GG', there is a potential gradient that gradually decreases toward the second surface side of semiconductor layer 301. Therefore, charges generated in the photodetector move toward the second surface side due to the gentle potential gradient.

[0134] Here, by appropriately adjusting the impurity concentrations of the first semiconductor region 311 and the second semiconductor region 312, the presence or absence of a potential barrier at depth B can be controlled by the potential applied to the cathode. With respect to the dotted line 72 in Fig. 12, when a lower potential is applied to the cathode of the APD on the line segment GG' than to the cathode on the line segment EE', the potential gradually decreases from depth D to depth C on the line segment GG'. Then, the potential gradually increases from depth C to depth B, and the potential at depth B is at the B3 level. Furthermore, the potential decreases from depth B to depth A, and is at the A3 level at depth A.

[0135] Electrons photoelectrically converted in the fourth semiconductor region 314 on the line segment GG' in FIG. 9 move along the potential D3 to C3 in FIG. 12, but cannot overcome the potential barrier from C3 to B3. Therefore, the electrons move toward the fourth semiconductor region 314 on the line segment EE' in FIG. 9. The moved electrons move along the potential gradient from C1 to B1 in FIG. 12, are avalanche multiplied by the steep potential gradient from B1 to A1, pass through the first semiconductor region 311, and are detected as signal charges. In other words, photocharges generated near the inactive APD can also be guided to the active APD by utilizing the potential barrier, thereby suppressing a decrease in sensitivity.

[0136] As described above, in the second embodiment, the photocharges detected in the region where the inactive APD exists are guided to the active APD, thereby making it possible to suppress a decrease in sensitivity.

[0137] <Third embodiment> The configuration of a photoelectric conversion device in the third embodiment will be described with reference to Fig. 13 to Fig. 15. In the following description, configurations common to the first and second embodiments will be denoted by the same reference numerals, and description thereof may be omitted.

[0138] FIG. 13 is a cross-sectional view taken along a direction perpendicular to the surface direction of the substrate, cutting two pixels of a photoelectric conversion element 102 of a photoelectric conversion device according to the third embodiment.

[0139] In the photoelectric conversion device according to this embodiment, a concave-convex structure 325 is formed by trenches on the surface of the semiconductor layer on the light incident side. The concave-convex structure 325 is surrounded by a P-type third semiconductor region 313, and scatters light incident on the photoelectric conversion element 102. Since the incident light travels obliquely inside the photoelectric conversion element, an optical path length equal to or greater than the thickness of the semiconductor layer 301 can be ensured, and light with a longer wavelength can be photoelectrically converted compared to a case without the concave-convex structure 325. In addition, the concave-convex structure 325 prevents the incident light from being reflected within the substrate, thereby improving the photoelectric conversion efficiency of the incident light.

[0140] The fourth semiconductor region 314 and the uneven structure 325 are formed so as to overlap in a plan view. The area where the fourth semiconductor region 314 and the uneven structure 325 overlap in a plan view is larger than the area of ​​the portion of the fourth semiconductor region 314 that does not overlap with the uneven structure 325. Charges generated at a position far from the avalanche multiplication region formed between the first semiconductor region 311 and the fourth semiconductor region 314 take a longer time to travel to the avalanche multiplication region than charges generated at a position close to the avalanche multiplication region. This may cause timing jitter to worsen. By arranging the fourth semiconductor region 314 and the uneven structure 325 at a position where they overlap in a plan view, the electric field deep in the photodiode can be increased, and the collection time of charges generated at a position far from the avalanche multiplication region can be shortened, thereby making it possible to reduce timing jitter.

[0141] Furthermore, the third semiconductor region 313 three-dimensionally covers the concave-convex structure 325, thereby making it possible to suppress the generation of thermally excited charges at the interface of the concave-convex structure 325. This suppresses the DCR (Dark Count Rate) of the photoelectric conversion element 102.

[0142] FIG. 14 is an enlarged cross-sectional view of two of the trenches forming the concave-convex structure 325 of the photovoltaic device according to the third embodiment.

[0143] The trench structure is composed of a material different from that of the third semiconductor region 313. For example, when the third semiconductor region 313 is silicon, the main member constituting the trench structure is a silicon oxide film or a silicon nitride film, but may contain a metal or an organic material. The trench is formed, for example, at a depth of 0.1 to 0.6 μm from the surface of the semiconductor layer. In order to sufficiently increase the diffraction effect of incident light, it is desirable that the depth of the trench is greater than the width of the trench. Here, the width of the trench is the width from the interface between the pinning film 321 and the third semiconductor region 313 to the interface between the pinning film 321 and the third semiconductor region 313 on a plane passing through the center of gravity of the trench cross section. The depth of the trench is the depth from the light incident surface of the semiconductor layer 301 to the bottom of the trench.

[0144] 14 indicates one period of unevenness structure 325 composed of multiple trenches. The distance from the center of gravity of one trench in unevenness structure 325 to the center of gravity of another trench adjacent to that trench in the cross-sectional view is defined as the period of unevenness structure 325, and the average of the periods of unevenness over the entire unevenness structure 325 is defined as the effective period.

[0145] The trench formation process will be described below. First, a groove is formed in the third semiconductor region 313 of the semiconductor layer 301 by etching. Then, a pinning film 321 is formed on the surface of the third semiconductor region 313 and inside the trench by a method such as chemical vapor deposition. The inside of the trench covered with the pinning film 321 is filled with a filling material 332. The trench forming the concave-convex structure 325 can be filled by the same process as the trench forming the pixel separating section 324. In this case, the sidewall of the trench forming the concave-convex structure 325 and the sidewall of the trench forming the pixel separating section 324 have the same impurity concentration.

[0146] The filling member 332 has a void 331 therein. Since the refractive index of the void 331 is lower than that of the filling member 332, an optical path difference occurs between the light that passes through the void and the light that passes through the other parts. Compared to the case where no void is provided in the filling member, the refractive index difference of the entire uneven structure 325 becomes larger, and the phase difference generated in the light that passes through the uneven structure 325 also becomes larger, so that the diffraction of the incident light is easily strengthened. In other words, by providing a void in the filling member, the intensity of the incident light is increased at a specific phase, and the effect of improving the sensitivity is obtained. Note that the filling member 332 does not have to have the void 331 therein.

[0147] Fig. 15 is a pixel plan view of two pixels of the photoelectric conversion element 102 of the photoelectric conversion device according to the third embodiment. Fig. 15(a) is a plan view seen from the surface opposite to the light incident surface, and Fig. 15(b) is a plan view seen from the light incident surface side. Fig. 13 can be said to be a cross-sectional view cut along line II' in Fig. 15(a).

[0148] 15(b), the uneven structure 325 is formed in a lattice shape in a plan view. The uneven structure 325 is formed to overlap the first semiconductor region 311 and the fourth semiconductor region 314. However, the bottom of the trench at the intersection of the trenches is located closer to the light incident surface side than half the thickness of the semiconductor layer 301. Here, the trench depth is the depth from the second surface to the bottom, and can also be referred to as the depth of the recess of the uneven structure 325.

[0149] As described above, in the third embodiment, the unevenness structure 325 scatters light incident on the photoelectric conversion element 102. Since the incident light travels obliquely inside the photoelectric conversion element, an optical path length equal to or greater than the thickness of the semiconductor layer 301 can be ensured, and light with a longer wavelength can be photoelectrically converted compared to a case where the unevenness structure 325 is not provided.

[0150] <Fourth embodiment> The configuration of a photoelectric conversion device according to the fourth embodiment will be described with reference to Fig. 16 and Fig. 17. In the following description, configurations common to the first to third embodiments will be denoted by the same reference numerals, and description thereof may be omitted.

[0151] 16 is a cross-sectional view taken along a direction perpendicular to the surface direction of the substrate, cutting two pixels of a photoelectric conversion element 102 of a photoelectric conversion device according to the fourth embodiment. The difference from the third embodiment is that a microlens 323 and a concave-convex structure 325 are formed on each of a plurality of APDs in each pixel.

[0152] FIG. 17 is a pixel plan view of two pixels of the photoelectric conversion element 102 in the photoelectric conversion device according to the fourth embodiment.

[0153] Fig. 17(a) is a plan view seen from the surface opposite to the light incident surface, and Fig. 17(b) is a plan view seen from the light incident surface side. Fig. 16 can be said to be a cross-sectional view taken along line segment JJ' in Fig. 17(a).

[0154] 17(b), the photoelectric conversion element 102 in each pixel is composed of four APDs, and each APD is formed with a microlens 323 and a concave-convex structure 325. The center of gravity of the concave-convex structure 325 is included in the avalanche multiplication region in plan view.

[0155] When four microlenses 323 are formed in each pixel, light can be collected with a higher curvature even with the same lens thickness compared to when one microlens 323 is formed in each pixel. This allows light to be collected in an area closer to the avalanche multiplication area, making it possible to improve the response speed of photon detection.

[0156] <Fifth embodiment> A method of driving a photoelectric conversion device in the fifth embodiment will be described with reference to Fig. 18. In the following description, configurations common to the first to fourth embodiments will be given the same reference numerals, and description thereof may be omitted.

[0157] 8, when the photoelectric conversion element 102 is composed of two or more APDs and the APDs are alternately or cyclically activated, a side effect of this is that reduced sensitivity can become an issue. However, if the number of APDs activated is increased in order to suppress the reduction in sensitivity, power consumption increases and the deterioration of device characteristics is accelerated. In other words, there is a trade-off between sensitivity, power consumption, and device characteristics.

[0158] In the method of driving the photoelectric conversion device according to the fifth embodiment, the arrangement and number of active and inactive APDs in one pixel are changed over time. Figures 18(a), (b), and (c) are conceptual diagrams showing three examples in which the photoelectric conversion element 102 is configured with four APDs and driven in six cyclic patterns. The white areas indicate the active areas of the pixel 101, and the gray areas indicate the inactive areas of the pixel 101.

[0159] Fig. 18(a) shows six patterns of active and inactive areas repeated in one cycle from time t1 to time t2. In the patterns shown in Fig. 18(a), the ratio of time that each APD is in the active state is 12 / 24 (=1 / 2) compared to the case of Fig. 8(b) where each APD is always in the active state.

[0160] In this case, the sensitivity, power consumption due to avalanche multiplication, and degradation rate of device characteristics are all roughly doubled compared to the case in Fig. 8(a) where the ratio of time that each APD is in the active state is 1 / 4 when each APD is in the constantly active state. Also, compared to the case in Fig. 8(b) where four APDs are in the constantly active state, the sensitivity, power consumption due to avalanche multiplication, and degradation rate of device characteristics are all roughly 1 / 2.

[0161] 8(b), since it is known that the sensitivity is about 1 / 2, the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by the reciprocal of the sensitivity, 2 / 1, in a subsequent process (not shown). In other words, the count value may be corrected according to the ratio of the period during which each APD is set to the standby state and the active state to the exposure period.

[0162] Fig. 18(b) shows six patterns of active and inactive areas repeated per cycle, from time t1 to time t2. In Fig. 18(b), the ratio of time each APD is in the active state is 16 / 24 (=2 / 3) compared to Fig. 8(b) where each APD is always in the active state.

[0163] In this case, compared to the case of Fig. 8(a) in which the ratio of time that each APD is in an active state is 1 / 4 of the time when each APD is in a constantly active state, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 2 / 3÷1 / 4 = 8 / 3 times faster. Also, compared to the case of Fig. 8(b) in which all four APDs are in an active state, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 2 / 3÷1 = 2 / 3 times faster.

[0164] In addition, since it is known that the sensitivity is approximately 2 / 3 times that of the case in FIG. 8(b), the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by the reciprocal, 3 / 2, in a subsequent process not shown.

[0165] Fig. 18(c) shows six patterns of active and inactive areas repeated in one cycle from time t1 to time t2. In Fig. 18(c), the ratio of time each APD is in the active state is 8 / 24 (=1 / 3) compared to Fig. 8(b) where each APD is always in the active state.

[0166] In this case, compared to the case of Fig. 8(a) in which the ratio of time that each APD is in an active state is 1 / 4, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 1 / 3÷1 / 4 = 4 / 3 times faster. Also, compared to the case of Fig. 8(b) in which all four APDs are in an active state at all times, the deterioration rates of the sensitivity, power consumption, and device characteristics are all approximately 1 / 3÷1 = 1 / 3 times faster.

[0167] In addition, since it is known that the sensitivity is approximately 1 / 3 times that of the case in FIG. 8(b), the decrease in sensitivity may be corrected by multiplying the count value of the counter circuit 211 by the reciprocal, 3 / 1, in a subsequent process not shown.

[0168] As described above, in the fifth embodiment, the arrangement and number of active and inactive APDs in one pixel are changed over time, thereby improving the degree of freedom in setting the sensitivity, power consumption, and device characteristics. This makes it possible to drive the photoelectric conversion device appropriately depending on which of the sensitivity, power consumption, and device characteristics is prioritized. In addition, a decrease in sensitivity can be suppressed by correcting the count value of the counter circuit 211 through post-stage processing (not shown).

[0169] 8 in the second embodiment, a decrease in sensitivity can become a problem as a side effect of configuring the photoelectric conversion element 102 with two or more APDs and alternately or cyclically putting the APDs into an active state. In the method for driving a photoelectric conversion device in the sixth embodiment, in a use case where the impact of a decrease in sensitivity is small, the APDs are alternately or cyclically put into an active state, thereby suppressing deterioration of device characteristics.

[0170] An example of an electronic device to which the photoelectric conversion device 100 is applied is a digital camera. In digital cameras, an AE (Automatic Exposure) function is known that automatically adjusts exposure so that a captured image is appropriately bright regardless of the brightness of the subject. To realize this function, a subsequent process (not shown) obtains brightness information of the subject, such as an integrated value of pixel values, from the photoelectric conversion device 100.

[0171] In this embodiment, the photoelectric conversion device 100 is driven using a similar concept. If a post-processing step (not shown) acquires information on the brightness of the subject and determines that the current frame has high illuminance, there is a high possibility that saturation will occur even if the image is captured at low sensitivity. For this reason, the APDs are alternately or cyclically set to the active state in the next frame to suppress deterioration of device characteristics. On the other hand, if the current frame is not determined to have high illuminance, all APDs are controlled to be in the active state to detect all incident photons.

[0172] Alternatively, feedforward control may be performed to determine whether or not each APD is alternately or cyclically put into an active state depending on the shooting conditions of the digital camera, such as the standby mode, F-number, and ISO sensitivity.

[0173] In the standby mode, the photoelectric conversion device 100 is not capturing images, so there is no effect from a decrease in sensitivity, and the APDs are alternately or cyclically put into an active state to suppress deterioration of the device characteristics.

[0174] When the F-number is small, the illuminance is likely to be high and there is a high possibility that the counter will become saturated even when shooting at low sensitivity. Therefore, by alternately or cyclically setting each APD to an active state, degradation of the device characteristics can be suppressed.

[0175] Similarly, when the ISO sensitivity is low, the illumination level is high and there is a high possibility that the counter will become saturated even if shooting at a low sensitivity. Therefore, by alternately or cyclically putting the APDs into the active state, degradation of the device characteristics can be suppressed.

[0176] As described above, in use cases where the impact of sensitivity reduction is small, degradation of device characteristics can be suppressed by alternately or cyclically setting each APD to an active state.

[0177] Sixth embodiment The sixth embodiment will be described with reference to FIG.

[0178] In the above-described embodiments, each pixel of the photoelectric conversion element 102 has a plurality of APDs. In the photoelectric conversion element 102 according to this embodiment, each pixel has one APD. In this embodiment, the avalanche diodes of the pixels included in the first region of the imaging region of the photoelectric conversion device 100 are activated, and the avalanche photodiodes of the pixels included in the second region are deactivated, thereby reducing power consumption. Here, the first region may be, for example, a range irradiated with light (for example, the center of the imaging region), and the second region may be, for example, a range that is not irradiated with light on the outer periphery of the imaging region relative to the first region. Note that the operation of each APD of the photoelectric conversion device according to this embodiment is similar to that shown in any of the first to fifth embodiments.

[0179] Fig. 19 is a schematic diagram showing the distribution of light incident on the pixel region 12 and the distribution of the active / inactive states of each of the photoelectric conversion elements 102 in the pixel region 12. Fig. 19(a) shows the light distribution, and Fig. 19(b) shows which photoelectric conversion elements 102 are held in an active or inactive state. Light is particularly likely to be incident on the central portion of the pixel region 12, and light is less likely to be incident on the peripheral portion. In this embodiment, power consumption can be reduced by controlling only the photoelectric conversion elements 102 in the region where light is incident so that they are in the active state.

[0180] Seventh embodiment The photoelectric conversion system according to this embodiment will be described with reference to Fig. 20. Fig. 20 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0181] The photoelectric conversion device described in the above embodiment is applicable to various photoelectric conversion systems. Examples of the applicable photoelectric conversion system include digital still cameras, digital camcorders, security cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, and observation satellites. In addition, a camera module having an optical system such as a lens and an imaging device is also included in the photoelectric conversion system. FIG. 22 illustrates a block diagram of a digital still camera as an example of these.

[0182] 20 includes an image pickup device 1004, which is an example of a photoelectric conversion device, and a lens 1002 that forms an optical image of a subject on the image pickup device 1004. The photoelectric conversion system further includes an aperture 1003 that varies the amount of light passing through the lens 1002, and a barrier 1001 that protects the lens 1002. The lens 1002 and the aperture 1003 form an optical system that focuses light on the image pickup device 1004. The image pickup device 1004 is a photoelectric conversion device according to any one of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0183] The photoelectric conversion system has a signal processing unit 1007 which is an image generating unit that generates an image by processing an output signal output from an imaging device 1004. The signal processing unit 1007 performs various corrections and compression as necessary to output image data. The signal processing unit 1007 may be formed in a semiconductor layer in which the imaging device 1004 is provided, or may be formed in a semiconductor layer different from that of the imaging device 1004. Moreover, the imaging device 1004 and the signal processing unit 1007 may be formed in the same semiconductor layer.

[0184] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. The photoelectric conversion system further includes a recording medium 1012 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out data on the recording medium 1012. The recording medium 1012 may be built into the photoelectric conversion system, or may be removable.

[0185] The photoelectric conversion system further includes an overall control / calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the image capture device 1004 and the signal processing unit 1007. Here, the timing signals and the like may be input from outside, and the photoelectric conversion system only needs to include at least the image capture device 1004 and the signal processing unit 1007 that processes the output signal output from the image capture device 1004.

[0186] The imaging device 1004 outputs an imaging signal to a signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004, and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0187] In this way, according to this embodiment, it is possible to realize a photoelectric conversion system to which the photoelectric conversion device (imaging device) according to any one of the above embodiments is applied.

[0188] <Eighth embodiment> The photoelectric conversion system and the moving object of this embodiment will be described with reference to Fig. 21. Fig. 21 is a diagram showing the configuration of the photoelectric conversion system and the moving object of this embodiment.

[0189] FIG. 21(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 2300 has an imaging device 2310. The imaging device 2310 is the photoelectric conversion device described in any of the above embodiments. The photoelectric conversion system 2300 has an image processing unit 2312 that performs image processing on a plurality of image data acquired by the imaging device 2310. The photoelectric conversion system 2300 also has a parallax acquisition unit 2314 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the photoelectric conversion system 2300. The photoelectric conversion system 2300 further has a distance acquisition unit 2316 that calculates a distance to an object based on the calculated parallax, and a collision determination unit 2318 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 2314 and the distance acquisition unit 2316 are examples of distance information acquisition means that acquire distance information to an object. That is, distance information may be acquired using not only the phase difference but also ToF (Time Of Flight) technology. The collision determination unit 2318 may determine the possibility of a collision using any of these pieces of distance information. The distance information acquisition means may be realized by dedicated hardware or a software module. Also, it may be realized by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or the like, or a combination of these.

[0190] The photoelectric conversion system 2300 is connected to a vehicle information acquisition device 2320, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is also connected to a control ECU 2330, which is a control device (control unit) that outputs a control signal to generate a braking force for the vehicle based on the judgment result of the collision judgment unit 2318. The photoelectric conversion system 2300 is also connected to an alarm device 2340 that issues an alarm to the driver based on the judgment result of the collision judgment unit 2318. For example, when the judgment result of the collision judgment unit 2318 indicates that there is a high possibility of a collision, the control ECU 2330 performs vehicle control to avoid a collision and reduce damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 2340 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0191] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 2300. Fig. 21(b) shows a photoelectric conversion system for imaging the area in front of the vehicle (imaging range 2350). A vehicle information acquisition device 2320 sends instructions to the photoelectric conversion system 2300 or the imaging device 2310. This configuration can further improve the accuracy of distance measurement.

[0192] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from lanes, etc. Furthermore, the photoelectric conversion system is not limited to vehicles such as the vehicle itself, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies, but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0193] <Ninth embodiment> The photoelectric conversion system of this embodiment will be described with reference to Fig. 22. Fig. 22 is a block diagram showing an example of the configuration of a range image sensor which is the photoelectric conversion system.

[0194] 22, the distance image sensor 1401 is configured to include an optical system 1402, a photoelectric conversion device 1403, an image processing circuit 1404, a monitor 1405, and a memory 1406. The distance image sensor 1401 can obtain a distance image according to the distance to the subject by receiving light (modulated light or pulsed light) that is projected from a light source device 1411 toward the subject and reflected by the surface of the subject.

[0195] The optical system 1402 is configured to have one or more lenses, and guides image light (incident light) from a subject to the photoelectric conversion device 1403 , forming an image on the light receiving surface (sensor portion) of the photoelectric conversion device 1403 .

[0196] The photoelectric conversion device 1403 is any of the photoelectric conversion devices described in the above-mentioned embodiments, and a distance signal indicating a distance determined from a received light signal output from the photoelectric conversion device 1403 is supplied to an image processing circuit 1404.

[0197] The image processing circuit 1404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 1403. The distance image (image data) obtained by this image processing is then supplied to a monitor 1405 for display, or supplied to a memory 1406 for storage (recording).

[0198] In the range image sensor 1401 configured in this way, by applying the above-mentioned photoelectric conversion device, it is possible to obtain, for example, a more accurate range image as the pixel characteristics improve.

[0199] <Tenth embodiment> The photoelectric conversion system of this embodiment will be described with reference to Fig. 23. Fig. 23 is a diagram showing an example of a schematic configuration of an endoscopic surgery system which is the photoelectric conversion system of this embodiment.

[0200] 23 shows a state in which an operator (doctor) 1131 is performing surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1103. As shown in the figure, the endoscopic surgery system 1103 is composed of an endoscope 1100, a surgical tool 1110, and a cart 1134 on which various devices for endoscopic surgery are mounted.

[0201] The endoscope 1100 is composed of a lens barrel 1101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 1132, and a camera head 1102 connected to the base end of the lens barrel 1101. In the illustrated example, the endoscope 1100 is configured as a so-called rigid lens barrel having a rigid lens barrel 1101, but the endoscope 1100 may be configured as a so-called flexible lens barrel having a flexible lens barrel.

[0202] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100, and light generated by the light source device 1203 is guided to the tip of the lens barrel 1101 by a light guide extending inside the lens barrel 1101, and is irradiated via the objective lens toward an observation target in a body cavity of a patient 1132. The endoscope 1100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0203] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and reflected light (observation light) from an observation target is collected by the optical system onto the photoelectric conversion device. The observation light is photoelectrically converted by the photoelectric conversion device to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The photoelectric conversion device may be any of the photoelectric conversion devices described in the above-mentioned embodiments. The image signal is transmitted to a camera control unit (CCU) 1135 as RAW data.

[0204] The CCU 1135 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 1100 and the display device 1136. Furthermore, the CCU 1135 receives an image signal from the camera head 1102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0205] Under the control of the CCU 1135 , the display device 1136 displays an image based on an image signal that has been subjected to image processing by the CCU 1135 .

[0206] The light source device 1203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 1100 with irradiation light when photographing an operation site or the like.

[0207] The input device 1137 is an input interface for the endoscopic surgery system 1103. A user can input various information and instructions to the endoscopic surgery system 1103 via the input device 1137.

[0208] The treatment tool control device 1138 controls the driving of the energy treatment tool 1112 for cauterizing tissue, incising, sealing blood vessels, or the like.

[0209] The light source device 1203 that supplies irradiation light to the endoscope 1100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 1203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation target with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 1102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0210] Furthermore, the light source device 1203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 1102 in synchronization with the timing of the change in the light intensity to acquire images in a time-division manner and synthesizing the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0211] The light source device 1203 may be configured to supply light in a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, the wavelength dependency of light absorption in body tissue is utilized. Specifically, a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast by irradiating light in a narrower band than the irradiation light (i.e., white light) in normal observation. Alternatively, the special light observation may be a fluorescent observation in which an image is obtained by fluorescence generated by irradiating excitation light. In the fluorescent observation, it is possible to irradiate excitation light to the body tissue and observe the fluorescence from the body tissue, or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 1203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0212] <Eleventh embodiment> The photoelectric conversion system of this embodiment will be described with reference to FIG. 24. FIG. 24(a) is a diagram showing an example of the configuration of glasses 1600 (smart glasses) which are the photoelectric conversion system. The glasses 1600 have a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device described in the above-mentioned twelfth embodiment. A display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 1601. The photoelectric conversion device 1602 may be one or more. A combination of multiple types of photoelectric conversion devices may also be used. The arrangement position of the photoelectric conversion device 1602 is not limited to that shown in FIG. 24(a).

[0213] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the photoelectric conversion device 1602 and the display device. The control device 1603 also controls the operations of the photoelectric conversion device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light on the photoelectric conversion device 1602.

[0214] FIG. 24(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612, and the control device 1612 is equipped with a photoelectric conversion device corresponding to the photoelectric conversion device 1602 and a display device. The lens 1611 is formed with an optical system for projecting light emitted from the photoelectric conversion device in the control device 1612 and the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source for supplying power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device may have a line of sight detection unit that detects the line of sight of the wearer. Infrared light may be used for detecting the line of sight. The infrared light emission unit emits infrared light toward the eyeball of a user gazing at a display image. An imaging unit having a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By having a reduction means for reducing light from the infrared light emission unit to the display unit in a planar view, deterioration of image quality is reduced.

[0215] The gaze of the user with respect to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be applied to gaze detection using the image of the eyeball. As an example, a gaze detection method based on a Purkinje image formed by reflection of irradiated light on the cornea can be used.

[0216] More specifically, a gaze detection process based on the pupil-corneal reflex method is performed. Using the pupil-corneal reflex method, a gaze vector that indicates the direction (rotation angle) of the eyeball is calculated based on the pupil image and the Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0217] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the display image of the display device based on information on the user's line of sight from the photoelectric conversion device.

[0218] Specifically, the display device determines a first field of view area to which the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be received from an external control device. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0219] The display area may have a first display area and a second display area different from the first display area, and a high priority area may be determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be received from an external control device. The resolution of the high priority area may be controlled to be higher than the resolution of areas other than the high priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0220] In addition, AI may be used to determine the first field of view area and the area with high priority. The AI ​​may be a model configured to estimate the angle of the line of sight and the distance to an object at the end of the line of sight from the image of the eyeball, using the image of the eyeball and the direction in which the eyeball in the image was actually looking as teacher data. The AI ​​program may be included in the display device, the photoelectric conversion device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0221] When display control is performed based on visual recognition detection, the present invention is preferably applicable to smart glasses further including a photoelectric conversion device for capturing an image of the outside world. The smart glasses can display captured outside information in real time.

[0222] The above-described embodiments can be modified as appropriate without departing from the technical concept. In addition, an example in which a part of the configuration of any of the embodiments is added to another embodiment, or an example in which a part of the configuration of any of the embodiments is replaced with another embodiment, is also included in the embodiments of the present invention.

[0223] The disclosure of this embodiment also includes the following configurations and methods.

[0224] (Configuration 1) A photoelectric conversion device including a first APD, the photoelectric conversion device having a first pulse generating circuit that generates a first pulse signal based on an output from the first APD, a first power supply that supplies a first voltage to one terminal of the first APD via a first switch, and a second power supply that supplies a second voltage different from the voltage of the first power supply to the other terminal of the first APD, the second power supply that supplies a third voltage different from the voltage of the first power supply and the voltage of the second power supply to the one terminal via a second switch, the photoelectric conversion device being characterized in that a period during which the first switch is in an on state is different from a period during which the second switch is in an on state.

[0225] (Configuration 2) The photoelectric conversion device according to configuration 1, wherein the first APD is in a recharge state by turning on the first switch, and in a standby state by turning off the first switch, the first APD is in an inactive state by turning on the second switch, and in an active state by turning off the second switch.

[0226] (Configuration 3) A photoelectric conversion device having a first APD, the photoelectric conversion device further comprising: a first pulse generating circuit that generates a first pulse signal based on an output from the first APD; a first switch provided between a first power supply that supplies a first voltage and one terminal of the first APD; a second power supply that supplies a second voltage different from the first voltage; and a second switch provided between the first power supply and the one terminal of the first APD. The first APD is placed in a recharge state by turning on the first switch, and in a standby state by turning off the first switch. The first APD is placed in an inactive state by turning on the second switch, and in an active state by turning off the second switch. The photoelectric conversion device is characterized in that a period during which the first switch is in an on state is different from a period during which the second switch is in an on state.

[0227] (Configuration 4) A photoelectric conversion device having a second APD, the photoelectric conversion device further comprising: a second pulse generating circuit that generates a second pulse signal based on an output from the second APD; a third switch provided between a first power supply that supplies a first voltage and one terminal of the second APD; a second power supply that supplies a second voltage different from the first voltage; and a fourth switch provided between the one terminal of the second APD. The second APD is placed in a recharge state by turning on the third switch, and in a standby state by turning off the third switch. The second APD is placed in an inactive state by turning on the fourth switch, and in an active state by turning off the fourth switch. The photoelectric conversion device according to configuration 3, characterized in that a period during which the third switch is in an on state is different from a period during which the fourth switch is in an on state.

[0228] (Configuration 5) The photoelectric conversion device according to configuration 2 or 4, wherein a first period during which the first APD is in the standby state and the active state is followed by a second period during which the second APD is in the standby state and the active state, and the second switch and the fourth switch are cyclically controlled so that the first period is resumed after the second period.

[0229] (Configuration 6) The first APD and the second APD each include a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type to which signal charges are transferred from the first semiconductor region. A reverse bias voltage for avalanche multiplication of the signal charges is applied to the second semiconductor region and the third semiconductor region. The photoelectric conversion device according to configuration 5 further includes a control means for transferring the signal charges to the third semiconductor region of the first APD or the second APD set to the active state.

[0230] (Configuration 7) 7. The photoelectric conversion device according to configuration 6, wherein the control means is the second switch.

[0231] (Configuration 8) The photoelectric conversion device according to any one of configurations 5 to 7, wherein whether or not to perform the control is set according to shooting conditions.

[0232] (Configuration 9) a counter that counts the pulse signal generated by the first pulse generating circuit; The photoelectric conversion device according to any one of configurations 2 and 4 to 8, wherein the count value of the counter is corrected in accordance with a ratio of a period during which the first APD is set to the standby state and the active state to an exposure period for acquiring one image.

[0233] (Configuration 10) The photoelectric conversion device according to any one of Configuration 2 or Configurations 4 to 9, further comprising a third APD.

[0234] (Configuration 11) The photoelectric conversion device according to any one of configurations 2 and 4 to 10, further comprising a first pixel and a second pixel, and a separation portion between the first pixel and the second pixel.

[0235] (Configuration 12) 12. The photoelectric conversion device according to configuration 11, wherein no insulating separation section is provided between the first APD and the second APD.

[0236] (Configuration 13) The photoelectric conversion device according to any one of configurations 1 to 12, wherein the second switch is a switch that switches the voltage applied to the first APD to a voltage higher than a breakdown voltage of the first APD or a voltage lower than the breakdown voltage.

[0237] (Configuration 14) The photoelectric conversion device according to any one of configurations 2 and 4 to 13, which has an imaging region in which a plurality of pixels are arranged in a two-dimensional array, and which controls the first APDs of pixels included in a first region of the imaging region to be in the active state and the second APDs of pixels included in a second region of the imaging region to be in the inactive state, specifically, controls the second switch and the fourth switch.

[0238] (Configuration 15) A photoelectric conversion device according to any one of configurations 1 to 14, a signal processing unit that generates an image using a signal output from the photoelectric conversion device.

[0239] (Configuration 16) A moving object including the photoelectric conversion device according to any one of configurations 1 to 14, A moving body comprising: a control unit that controls the movement of the moving body using a signal output from the photoelectric conversion device. [Explanation of symbols]

[0240] 2011 APD 2012 APD 2101 Waveform shaping section 2102 Waveform shaping section 2021 PMOS Transistor 2022 PMOS transistor 2031 NMOS transistor 2032 NMOS transistor

Claims

1. A photoelectric conversion device comprising a first avalanche photodiode and a second avalanche photodiode, A first pulse generation circuit generates a first pulse signal based on the output from the first avalanche photodiode, A second pulse generation circuit generates a second pulse signal based on the output from the second avalanche photodiode, A first power supply that supplies a first voltage to one terminal of the first avalanche photodiode via a first switch, A second power supply is provided to the other terminal of the first avalanche photodiode, supplying a second voltage different from the voltage of the first power supply. A third power supply is provided via a second switch to supply a third voltage to one of the terminals, which is different from the voltage of the first power supply and the voltage of the second power supply. The OR circuit connected to the first pulse generation circuit and the second pulse generation circuit, The OR circuit is connected to a counter circuit, A photoelectric conversion device characterized in that the period during which the first switch is in the ON state is different from the period during which the second switch is in the ON state.

2. By turning on the first switch, the first avalanche photodiode enters a recharge state. By turning off the first switch, the first avalanche photodiode enters a standby state. By turning on the second switch, the first avalanche photodiode becomes inactive. The photoelectric conversion device according to claim 1, characterized in that the first avalanche photodiode becomes active when the second switch is turned off.

3. A photoelectric conversion device having a first avalanche photodiode and a second avalanche photodiode, A first pulse generation circuit generates a first pulse signal based on the output from the first avalanche photodiode, A second pulse generation circuit generates a second pulse signal based on the output from the second avalanche photodiode, A first switch is provided between a first power supply that supplies a first voltage and one terminal of the first avalanche photodiode, A second power supply that provides a second voltage different from the first voltage, and a second switch provided between the first avalanche photodiode and one of its terminals, A third switch is provided between the first power supply and one terminal of the second avalanche photodiode, The system comprises the second power supply and a fourth switch provided between the second avalanche photodiode and one of its terminals, By turning on the first switch, the first avalanche photodiode enters a recharge state. By turning off the first switch, the first avalanche photodiode enters a standby state. By turning on the second switch, the first avalanche photodiode becomes inactive. By turning the second switch off, the first avalanche photodiode becomes active. The period during which the first switch is ON is different from the period during which the second switch is ON. By turning on the third switch, the second avalanche photodiode enters a recharge state. By turning off the third switch, the second avalanche photodiode enters a standby state. By turning on the fourth switch, the second avalanche photodiode becomes inactive. By turning off the fourth switch, the second avalanche photodiode becomes active. The period during which the third switch is ON is different from the period during which the fourth switch is ON. A photoelectric converter characterized in that the second switch and the fourth switch are cyclically controlled such that after a first period in which the first avalanche photodiode is in the standby state and the active state, the second period in which the second avalanche photodiode is in the standby state and the active state, and after the second period, the first period returns again.

4. Each of the first avalanche photodiode and the second avalanche photodiode comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type to which signal charges are transferred from the first semiconductor region. A reverse bias voltage for avalanche multiplication of the signal charge is applied to the second semiconductor region and the third semiconductor region. The photoelectric conversion device according to claim 3, further comprising control means for moving the signal charge to the third semiconductor region of the first avalanche photodiode or the second avalanche photodiode set to the active state.

5. The photoelectric conversion device according to claim 4, characterized in that the control means is the second switch.

6. The photoelectric converter according to claim 3, characterized in that it is set whether or not to perform the control described above according to the shooting conditions.

7. It has a counter that counts the pulse signals generated by the first pulse generation circuit, The photoelectric conversion apparatus according to claim 3, characterized in that the count value of the counter is corrected in proportion to the ratio of the period during which the first avalanche photodiode is set to the standby state and the active state with respect to the exposure period for acquiring one image.

8. The photoelectric conversion device according to claim 2, further characterized by having a third avalanche photodiode.

9. The photoelectric conversion device according to claim 3, further comprising a third avalanche photodiode.

10. The photoelectric converter has a first pixel and a second pixel, The photoelectric conversion device according to claim 3, characterized in that it has a separation portion between the first pixel and the second pixel.

11. The photoelectric conversion device according to claim 10, characterized in that no insulating separation portion is provided between the first avalanche photodiode and the second avalanche photodiode.

12. The photoelectric conversion device according to claim 1, characterized in that the second switch is a switch that switches the voltage applied to the first avalanche photodiode to a voltage higher than the breakdown voltage of the first avalanche photodiode or a voltage lower than or equal to the breakdown voltage.

13. It has an imaging area in which multiple pixels are arranged in a two-dimensional array, The first avalanche photodiode of a pixel included in the first region of the imaging region becomes active. The photoelectric conversion device according to claim 3, characterized in that the second switch and the fourth switch are controlled so that the second avalanche photodiode having a pixel included in the second region of the imaging region is in the inactive state.

14. The photoelectric conversion device according to claim 13, characterized in that the second region is located further outward than the first region in the imaging region.

15. A photoelectric conversion device having a first avalanche photodiode and a second avalanche photodiode, A first pulse generation circuit generates a first pulse signal based on the output from the first avalanche photodiode, A second pulse generation circuit generates a second pulse signal based on the output from the second avalanche photodiode, A first switch is provided between a first power supply that supplies a first voltage and one terminal of the first avalanche photodiode, A second power supply that provides a second voltage different from the first voltage, and a second switch provided between the first avalanche photodiode and one of its terminals, A third switch is provided between the first power supply and one terminal of the second avalanche photodiode, The system comprises the second power supply and a fourth switch provided between the second avalanche photodiode and one of its terminals, The OR circuit connected to the first pulse generation circuit and the second pulse generation circuit, A photoelectric conversion device characterized by having a counter circuit connected to the OR circuit.

16. A photoelectric conversion device according to any one of claims 1 to 15, A photoelectric conversion system characterized by having a signal processing unit that generates an image using the signal output by the aforementioned photoelectric conversion device.

17. A mobile body comprising a photoelectric converter according to any one of claims 1 to 15, A mobile body characterized by having a control unit that controls the movement of the mobile body using a signal output by the photoelectric converter.

Images