Plasma etching method and apparatus

JP2025009736A5Pending Publication Date: 2026-09-18SPTS TECH LTD
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Patent Information

Application Number
JP2023216455
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-30
Filing Date
2023-12-22
Publication Date
2026-09-18

AI Technical Summary

Technical Problem

ESC clamping causes prolonged dechuck times due to residual static charge on the substrate and wafer support, reducing productivity and throughput in plasma etching processes.

Method used

A method and apparatus utilizing a bipolar electrostatic chuck (ESC) with alternating bipolar operating modes and controlled cooling gas pressure to maintain substrate placement during plasma etching, followed by an inert plasma to dissipate residual charge, enabling rapid dechucking.

Benefits of technology

Significantly reduces dechuck time, especially at high temperatures, by minimizing substrate movement and charge dissipation, thereby enhancing process efficiency.

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Abstract

To reduce a dechucking time from the end of plasma etching processing up to a time point at which a substrate can be lifted from an ESC.SOLUTION: A method of plasma-etching a semiconductor substrate comprises the steps of: arranging, in a chamber, the semiconductor substrate on a substrate supporter which comprises a bipolar electrostatic chuck ("ESC") comprising at least a first electrode and a second electrode and a cooling gas system for supplying a cooling gas to a lower surface of the semiconductor substrate at a corresponding pressure so that an upper surface of the semiconductor substrate may be exposed to plasma etching and the lower surface of the semiconductor substrate is supported by the substrate supporter; plasma-etching the semiconductor substrate; and removing the semiconductor substrate from the substrate support after the plasma etching step is completed.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present invention relates to a method for plasma etching a semiconductor substrate The present invention further relates to a corresponding apparatus for plasma etching a semiconductor substrate. [Background technology]

[0002] In vacuum plasma etch and deposition tools in the semiconductor manufacturing industry, subatmospheric pressures in the process chambers make it difficult to prevent wafer movement and to remove heat from plasma or exothermic processes from the wafer or substrate. When pressure drops, heat transfer is limited due to poor retention and direct conduction of heat from the substrate to the substrate support. To achieve ideal control of the substrate temperature, an electrostatic chuck, or "ESC," is used to control the temperature of the substrate in the vacuum system. Due to the electrostatic attraction between the ESC and the substrate, a recess or channel between the substrate and the surface of the ESC can be pressurized with an inert gas, such as He, at a sufficiently high pressure. This promotes good thermal conduction between the substrate and the thermally controlled ESC. This process is known as backside pressure. Electrostatic clamping of the substrate can be maintained even if the process chamber is operated at a pressure much lower than the pressure between the ESC and the substrate, allowing for precise temperature control.

[0003] Generally, there are two main types of ESCs used to clamp substrates in vacuum systems: bipolar ("Coulomb") and monopolar ("Johnsen-Rahbek") ESCs. In both types, a dielectric structure encapsulates a metallic electrode or electrodes, which is then attached to a metallic substrate support. This is shown in FIG. 1. The substrate support 2, typically made of aluminum or stainless steel, is connected to an RF source 4, and an electrostatic chuck ESC 6 is attached to the top surface of the substrate support 2. The ESC 6 has a metallic electrode sandwiched between two layers of dielectric material. These electrodes are attached to a high voltage DC power source 8, which can provide up to ±9 kV for relatively thick ceramic layers over 0.5 mm thick. For thinner polymer layers such as polyimide, which can be less than 0.1 mm thick, a DC power of less than ±2 kV is typically provided. A pipe 20 in the substrate support 2 provides backside gas ingress of coolant gas, typically He or Ar, allowing gas to be injected between the substrate 12 and the surface of the ESC 6. The coolant passages 10 allow coolant flow to remove heat from the substrate support 2, while a resistive heater (not shown) may facilitate high temperature operation. A lift assembly 18 is utilized to raise and lower the substrate 12 with the coating 14. A shield ring 16, typically made of ceramic, protects the substrate support 2 from the plasma and aids in plasma shaping adjacent to the substrate 12.

[0004] In bipolar ESCs, there are at least two electrodes of opposite polarity that generate an electrostatic field at the back of the substrate. In this case, the substrate must accommodate the charging motion. Therefore, the substrate must be made of semiconductor or metallic materials. Bipolar ESCs are widely used in the semiconductor and photoelectric industries, since many of the substrates processed are semiconductors themselves.

[0005] In a monopolar ESC, one or more electrodes are held at a single potential and rely on an external electron source to generate the electrostatic field. Plasma generation, typically by a plasma chamber, creates a current path to ground, allowing the monopolar ESC to clamp the substrate to the substrate support. To accommodate this type of operation, a very small amount of leakage current occurs through the insulating ceramic layer used in the ESC. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2021-100104 A Summary of the Invention [Problem to be solved by the invention]

[0007] Clamping by the ESC can cause problems at the completion of the etch process due to residual electrostatic charge on the substrate and wafer support. It can take a significant amount of time, possibly several minutes, for the accumulated charge to dissipate. Thus, the substrate has a long residence time in the process module since it is essentially clamped to the surface of the ESC. This is very detrimental to productivity as it reduces the throughput of the tool. The time between the end of the plasma etch process and the point at which the substrate can be lifted off the ESC is known as the dechucking time. There is a demand for improvements to existing techniques to reduce the dechucking time.

[0008] SUMMARY OF THE PRESENT EMBODIMENT The present invention, in at least some of its embodiments, is intended to address at least some of the problems and needs set forth above. [Means for solving the problem]

[0009] According to a first aspect of the present invention, there is provided a method for plasma etching a semiconductor substrate, the method comprising the steps of: placing, in a chamber, a semiconductor substrate on a substrate support comprising a bipolar electrostatic chuck ("ESC") comprising at least a first electrode and a second electrode, and a cooling gas system for supplying cooling gas at a corresponding pressure to an underside of the semiconductor substrate, such that an upper surface of the semiconductor substrate can be exposed to plasma etching and the lower surface of the semiconductor substrate is supported by the substrate support; plasma etching the semiconductor substrate; and, once the plasma etching step is completed, removing the semiconductor substrate from the substrate support. and removing the semiconductor substrate from the substrate support, wherein during the plasma etching step, a cooling gas is supplied to an underside of the semiconductor substrate at a corresponding pressure, and the ESC is switched between a first bipolar mode of operation in which a positive pressure is applied to the first electrode and a negative pressure is applied to the second electrode, and a second bipolar mode of operation in which a negative pressure is applied to the first electrode and a positive pressure is applied to the second electrode, and when the ESC is switched between the first and second bipolar modes of operation, the pressure of the cooling gas is reduced below that at other times during the plasma etching step to maintain placement of the semiconductor substrate on the substrate support.

[0010] The pressure of the cooling gas may be reduced to less than 1 Torr when the ESC switches between the first and second bipolar operating modes. The pressure of the cooling gas may be reduced to less than 0.1 Torr when the ESC switches between the first and second bipolar operating modes. Lower pressures may be used, but in practice it may be advantageous to pump out the gas line that supplies the cooling gas to the underside of the ESC. The purpose of this is to prevent the semiconductor substrate from being lifted by the cooling gas when the ESC switches between the first and second bipolar operating modes, since clamping by the ESC is then significantly reduced.

[0011] During the plasma etching step, the ESC may be switched between the first and second bipolar modes of operation multiple times. During the plasma etching step, the ESC may be switched between the first and second bipolar modes of operation at least three times. In principle, in any given practical application, the ESC may be switched between the first and second bipolar modes of operation any number of times and with any switching frequency to obtain favorable results. The number of times the ESC switches may be an even or odd number. The ESC may be switched after operating in the first or second bipolar modes for 30 seconds or more, optionally 60 seconds or more, and optionally 180 seconds or less.

[0012] The semiconductor substrate may achieve a temperature of at least 140° C. during the plasma etching step. The semiconductor substrate may achieve a temperature of at least 150° C. during the plasma etching step. The semiconductor substrate may achieve a temperature of up to 300° C., optionally up to 250° C. during the plasma etching step. Surprisingly, the inventors have determined that by applying the present invention to applications in which semiconductor substrates are plasma etched at relatively high temperatures, dechucking times can be significantly reduced.

[0013] The step of plasma etching the semiconductor substrate may be performed using a plasma generating device such as an inductively coupled plasma (ICP) device. The invention is not limited by the type of plasma etching performed, and non-ICP plasma etching techniques may be used.

[0014] An RF bias signal may be applied to the substrate support during and / or after the step of plasma etching the semiconductor substrate.

[0015] The method may include a further step of exposing the semiconductor substrate to a plasma formed in an inert gas or inert gaseous mixture, where the further step is performed between the steps of plasma etching the semiconductor substrate and removing the semiconductor substrate from the substrate support. This plasma is an inert, typically low energy plasma that may contribute to "dechucking" the semiconductor substrate by providing a current path to ground. This may remove any residual charge from the semiconductor substrate and the ESC surface. The inert gas or inert gaseous mixture may include He and / or Ar. An RF bias signal applied to the plasma generator and / or the substrate support may be used to form the plasma in the inert gas or inert gaseous mixture.

[0016] The method may be used in a situation where the semiconductor substrate is moved by the cooling gas when the ESC is switched between the first and second bipolar operating modes without reducing the pressure of the cooling gas.

[0017] The semiconductor substrate may be an InP semiconductor substrate. Plasma etching of InP semiconductor substrates may generally be performed at relatively high temperatures to remove volatile species. However, the present invention is not limited to any particular semiconductor substrate. It is expected that the present invention will be particularly well suited for plasma etching of other semiconductor substrates that require relatively high processing temperatures.

[0018] The ESC may include a dielectric material. When the ESC switches between the first and second bipolar modes of operation, the resistance of the dielectric material may be greater than or equal to 10 12 From 10 13 It may be in the ohm-centimeter range.

[0019] According to a second aspect of the present invention, there is provided an apparatus for plasma etching a semiconductor substrate, the apparatus comprising: a chamber; a bipolar electrostatic chuck ("ESC") disposed within the chamber, the ESC comprising at least a first electrode and a second electrode; a substrate support comprising a cooling gas system configured to supply a cooling gas at a corresponding pressure to an underside of the semiconductor substrate; a plasma generating device configured to maintain a plasma in the chamber for etching the semiconductor substrate; a mechanism for removing the semiconductor substrate from the substrate support; and a controller configured to control the apparatus to perform a step of plasma etching the semiconductor substrate, in which the ESC is switched between a first bipolar mode of operation in which a positive pressure is applied to the first electrode and a negative pressure is applied to the second electrode, and a second bipolar mode of operation in which a negative pressure is applied to the first electrode and a positive pressure is applied to the second electrode, and when the ESC is switched between the first and second bipolar modes of operation, a pressure of the cooling gas is reduced below that at other times during the plasma etching step to maintain placement of the semiconductor substrate on the substrate support.

[0020] An apparatus utilising the method according to the first aspect of the invention for plasma etching a semiconductor substrate.

[0021] The plasma generating device may be an inductively coupled plasma (ICP) device, although other types of plasma generating devices may be used.

[0022] The apparatus may further include a bypass valve in fluid communication with the cooling gas system and a gas pump, the controller configured to open and close the bypass valve to exhaust the cooling gas by the gas pump, thereby reducing pressure of the cooling gas when the ESC switches between the first and second bipolar operating modes.

[0023] The electrodes of the ESC may be non-interdigitated, for example, the electrodes may be semicircular electrodes.

[0024] The ESC may include Al2O3.

[0025] The mechanism for removing the semiconductor substrate from the substrate support can be any suitable mechanism, which may employ elements such as lift pins or other substrate lifting arrangements, and robotic arms, as are known to those skilled in the art.

[0026] For the avoidance of doubt, whenever the terms "comprising," "including," and other similar terms are used herein, it is to be understood that the invention also encompasses more restrictive terms such as "consisting of" and "consisting essentially of."

[0027] The invention as set out above extends to any inventive combination of the features set out above or in the following description, drawings or claims, for example any feature disclosed in relation to the first aspect of the invention may be combined with any feature disclosed in relation to the second aspect of the invention. [Brief description of the drawings]

[0028] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings in which: [Figure 1] 1 is a schematic diagram of a known substrate support; [Diagram 2] 1 is a semi-schematic cross-sectional view of an inductively coupled plasma device. [Diagram 3] 3 is a flowchart showing a processing sequence according to the present invention. [Figure 4] FIG. 2 is a schematic diagram of the ESC and cooling gas system. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] 2 is a semi-schematic diagram of an apparatus 20 suitable for plasma etching a semiconductor substrate in accordance with the present invention. Apparatus suitable for carrying out the method of the present invention includes a compatible SPTS Omega® ICP etching system, commercially available from SPTS Technologies Limited, Newport, South Wales, UK. All of the exemplary embodiments and comparative examples described below were carried out using this apparatus.

[0030] The apparatus 20 includes a chamber 21 and a plasma generator for maintaining a plasma within the chamber. The chamber 21 has a dielectric cylindrical wall 22, a gas inlet 23, and a gas outlet 24. Through the gas inlet 23, a suitable gas can be introduced into the chamber 21. Through the gas outlet 24, gas can be removed from the chamber using a suitable pump. The plasma generator includes a coil 25 electrically drivable by an RF power source 26 via an impedance matching network 27. The coil 25 is disposed around the dielectric wall 22. Typically, the RF power source 26 provides RF power to the coil 25 at a frequency of 2 to 20 MHz, although lower frequencies can also be used (e.g., 380 kHz). The apparatus 20 further includes a substrate support 28 on which a semiconductor substrate 29 can be placed for processing. The substrate support 28 includes an electrostatic chuck (ESC) that utilizes a back pressure of a cooling gas during etching. The substrate support 28 is connected to an RF power source 30 via a ceramic break 31 and an impedance matching network 32. The power supply 30 provides an RF electrical bias to the substrate support 28. Typically, the RF power supply 30 provides RF power at a frequency of 2 to 20 MHz, optionally 13.56 MHz, although lower frequencies are also available (e.g., 375 kHz). A controller (not shown) is configured for device control, including operation of the ESC and supply of cooling gas. The ESC is a bipolar ESC with two semicircular metal electrodes separated by a small gap of up to 2 mm, embedded in an Al2O3 ceramic layer. Other ceramics such as AlN, or thin polymer dielectric films can also be used.

[0031] The present invention utilizes a polarity switch of the voltage applied to the bipolar electrodes of the ESC. In particular, the ESC is switched between a first bipolar mode of operation in which a positive pressure is applied to the first electrode and a negative pressure is applied to the second electrode, and a second bipolar mode of operation in which a negative pressure is applied to the first electrode and a positive pressure is applied to the second electrode. When the polarity switch occurs, the backpressure of the cooling gas is reduced to prevent the semiconductor substrate from floating away from the substrate support, which would otherwise cause wafer movement. The backpressure is then increased to a "steady state" backpressure while the ESC is in the first or second bipolar mode of operation. In this manner, dechucking times are significantly reduced, especially for relatively high temperature plasma etch processes.

[0032] In FIG. 3, a processing sequence according to the present invention is presented. The SPTS Omega® system is a cluster tool, and during normal operation, the processing modules are kept under vacuum. In step 300, a robot picks up a wafer from a cassette or FOUP and places it on lift pins on an ESC in an ICP etch chamber. The wafer is lowered onto the surface of the ESC and electrostatically clamped in 302 by applying high voltages (equal and opposite) to two bipolar electrodes embedded in the ceramic layer of the ESC. In 304, a back pressure of a suitable cooling gas, such as He, is applied to the back of the wafer, and the plasma etch process begins while process gas is supplied to the chamber and a plasma is generated. The back pressure is typically 3 to 30 Torr, depending on the specific application. During this plasma etch step (306), the polarity of the bipolar electrodes is switched and control of the cooling gas pressure begins. Once the plasma etch process is complete (e.g., as determined by time or endpoint), a final polarity / cooling gas control step is completed and the process gas is replaced with an inert gas such as Ar in step 308. A dechucking plasma is then generated (310), which lasts for a period of time, typically 10 to 60 seconds. Once the dechucking plasma step is complete, the wafer is lifted off the ESC by the lift pins, picked up by the robot, and removed from the chamber (312).

[0033] FIG. 4 is a schematic diagram of the ESC and cooling gas system. This ESC and cooling gas system are incorporated into a commercially available Omega® system to provide an adaptive Omega® system used in the experiments described herein. FIG. 4 shows the ESC 41, vacuum chamber 42, RF match box 43, nitrogen gas purge line 44, He valve 45, backside pressure unit 46, He bypass valve 47, and pump 48. The configuration shown in FIG. 4 is advantageous because it allows for fast gas switching. In particular, the presence of the He bypass valve 47 allows the line to be pumped directly to the back of the ESC 41 when this valve 47 and the He valve 45 are opened. This allows the He pressure at the back of the semiconductor substrate to be controlled quickly (within seconds). In this way, the He backpressure can be rapidly reduced and then rapidly increased to the normal, steady state He backpressure. This rapid switching of the He pressure can be easily synchronized to a polarity switching event.

[0034] Comparative Example Experiments were performed on 150mm Si wafers in a SPTS Omega ICP etch tool using bipolar ESCs operating at high and low temperatures. A conventional etch and dechuck process was then performed. The ICP source was operated at 13.56 MHz and the ESC was RF biased at 13. [Table 1]

[0035] As can be seen from Table 1, with a clamping voltage of ±5 kV and low temperature operation, dechucking can occur within a maximum of 10 seconds. Using the same clamping voltage, increasing the temperature of the ESC significantly increased the dechucking time up to 900 seconds. Table 1 also shows that by lowering the clamping voltage to ±2 kV, the dechucking time can be reduced to 300 seconds. However, even a 300 second dechucking step is not a practical approach. During the dechucking step, an inert plasma formed in Ar or He is used to remove the charge from the substrate.

[0036] Without wishing to be bound by any particular theory or speculation, it is believed that by increasing the temperature, the Al2O3 ceramic layer covering the conductive electrode can be made to have a ρ of up to 10 15 Ohm-centimeters to ρ up to 10 12 From 10 13 It is expected that the resistance will drop to ohm-centimeters, which is believed to be a contribution of the Johnsen-Rahbek (JR) effect to the clamping electrostatic force. Typically, ρ is 10 13 Above ohm-centimeters, the Coulomb force exceeds the JR force, while ρ is 10 10 Below ohm-centimeters, the JR force is stronger. It is believed that this additional ceramic charging results in longer dechucking times. These comparative examples show that conventional etching and dechucking techniques can result in undesirably long dechucking times, even when a dechucking plasma is used to remove charge from the substrate. EXAMPLES

[0037] A series of experiments were carried out according to the invention with an ESC temperature of 180°C. In the experiments, the polarity of the high voltage applied to the ESC electrodes is alternated for a period of time during the etching step with a controlled He back pressure. A few seconds before each voltage switch, the He cooling gas back pressure is reduced. This prevents the wafer from moving when the corresponding JR clamping force is reduced. By reducing the He flow at each switch in the polarity of the applied ESC voltage, the plasma etching can be maintained and the charge generated on the substrate can be minimized. This allows a relatively short dechucking cycle. After the etching step, an inert dechucking plasma was generated. Table 2 shows the dechucking plasma conditions used. Typically, up to 500W of RF power is applied to the ICP coil at 13.56MHz with an Ar flow of up to 100sccm and a chamber pressure of up to 5mTorr. The experiment duration was fixed at 30 seconds. The plasma etching step utilizes typical process conditions (except for ESC switching and cooling gas back pressure). Therefore, there is no need to explain the detailed processing of this step. [Table 2]

[0038] Table 3 shows three examples using various combinations of He backpressure, He switch / off times, intervals between polarity switches, and dechucking times. In each case, the dechucking plasma is used for a default period of 30 seconds before the wafer is properly lifted off the ESC and removed from the process chamber. These examples show that realistic dechucking times of 30 seconds or less can be easily achieved. Adequate substrate retention and cooling were maintained. [Table 3]

[0039] Tests were performed at 180° C. using an Al2O3 bipolar ESC, but the same principles apply over a wide temperature range when using a bipolar Coulomb clamp when no plasma is present and JR forces are high when a plasma or other charge source is introduced into the process chamber. For Al2O3, we expect this to be realized over a temperature range of at least 140 to 300° C. For other ESC materials, the temperature ranges at which significant dechucking time improvements are observed are likely to be different. The invention is not limited to any particular operating temperature. Nor is the invention limited to any one plasma etching technique. The parameters and operating conditions described herein can be modified to suit any given application. For example, the number of times the ESC is switched between the first and second bipolar operating modes, the duration of each operating mode before switching, and the timing and duration for which the cooling gas backpressure is reduced can be determined by one of ordinary skill in the art using the principles described herein. [Explanation of symbols]

[0040] 20 equipment 21 Chamber 28 Substrate supporter 41 ESC 47 He bypass valve 48 Pump

Claims

1. A method for plasma etching a semiconductor substrate, The steps include: positioning a semiconductor substrate in a chamber on a substrate support comprising a bipolar electrostatic chuck ("ESC") having at least a first electrode and a second electrode, and a cooling gas system supplying cooling gas to the lower surface of the semiconductor substrate at a corresponding pressure, such that the upper surface of the semiconductor substrate can be exposed to the plasma etching and the lower surface of the semiconductor substrate is supported by the substrate support; The steps include: Plasma etching the semiconductor substrate, The plasma etching step is completed, and the step includes removing the semiconductor substrate from the substrate support, A method characterized in that, during the plasma etching step, a cooling gas is supplied to the lower surface of the semiconductor substrate at a corresponding pressure, the ESC switches between a first bipolar operating mode in which positive pressure is applied to the first electrode and negative pressure is applied to the second electrode, and a second bipolar operating mode in which negative pressure is applied to the first electrode and positive pressure is applied to the second electrode, and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is lowered compared to the pressure at other times during the plasma etching step, thereby maintaining the position of the semiconductor substrate on the substrate support.

2. The method according to claim 1, characterized in that the pressure of the cooling gas is reduced to less than 1 Torr when switching between the first and second bipolar operating modes of the ESC.

3. The method according to claim 1 or 2, characterized in that during the plasma etching step, the ESC is switched between the first and second bipolar operating modes multiple times.

4. The method according to claim 3, characterized in that during the plasma etching step, the ESC is switched between the first and second bipolar operating modes at least three times.

5. The method according to claim 1, characterized in that the semiconductor substrate achieves a temperature of at least 140°C during the plasma etching step.

6. The method according to claim 1, further comprising the step of exposing the semiconductor substrate to a plasma formed in an inert gas or an inert gaseous mixture, wherein the further step is performed between the step of plasma etching the semiconductor substrate and the step of removing the semiconductor substrate from the substrate support.

7. The method according to claim 6, characterized in that the inert gas or inert gaseous mixture contains He and / or Ar.

8. The method according to claim 1, characterized in that the semiconductor substrate is moved by the cooling gas when the ESC is switched between the first and second bipolar operating modes without reducing the pressure of the cooling gas.

9. The method according to claim 1, characterized in that the semiconductor substrate is an InP semiconductor substrate.

10. The ESC includes a dielectric material, and when switching between the first and second bipolar operating modes of the ESC, the resistance of the dielectric material is 10 12 from 10 13 The method according to claim 1, characterized in that it is within the range of ohms and centimeters.

11. An apparatus for plasma etching a semiconductor substrate using the method described in claim 1, Chamber and, A substrate support comprising a bipolar electrostatic chuck ("ESC") disposed within the chamber and having at least a first electrode and a second electrode, and a cooling gas system that supplies cooling gas to the lower surface of the semiconductor substrate at a corresponding pressure, A plasma generator for maintaining plasma in the chamber in order to etch the semiconductor substrate, A mechanism for removing the semiconductor substrate from the substrate support, The apparatus comprises a controller configured to control the apparatus for performing the step of plasma etching the semiconductor substrate, wherein in the step, the ESC switches between a first bipolar operating mode in which positive pressure is applied to the first electrode and negative pressure is applied to the second electrode, and a second bipolar operating mode in which negative pressure is applied to the first electrode and positive pressure is applied to the second electrode, and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is lowered to a level lower than the pressure at other times during the plasma etching step, thereby maintaining the position of the semiconductor substrate on the substrate support.

12. The apparatus according to claim 11, characterized in that the plasma generating apparatus is an inductively coupled plasma (ICP) apparatus.

13. The apparatus according to claim 11 or 12, further comprising a bypass valve and a gas pump that are in fluid communication with the cooling gas system, wherein the controller is configured to open and close the bypass valve so that the pressure of the cooling gas decreases when the ESC switches between the first and second bipolar operating modes, by opening the bypass valve to discharge the cooling gas using the gas pump.

14. The apparatus according to claim 11, characterized in that the electrodes of the ESC are non-comb type.

15. The aforementioned ESC is Al 2 O 3 The apparatus according to claim 11, characterized by including