Electro-optical device manufactured by using deep ultraviolet radiation
Patent Information
- Application Number
- JP2024202841
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-05-11
- Filing Date
- 2024-11-21
- Publication Date
- 2026-09-08
AI Technical Summary
Fabricating lithium niobate (LN) optical devices with desired performance characteristics is challenging due to high losses and difficulties in achieving uniformity and reproducibility using electron beam lithography.
The use of deep ultraviolet (DUV) photolithography to fabricate LN optical devices, which involves providing a hard mask layer, patterning the mask using DUV lithography, and transferring the pattern to the LN layer for etching, allowing for improved surface roughness and reduced losses.
DUV lithography results in LN optical devices with improved surface roughness and reduced losses, enhancing the performance and ease of fabrication while increasing throughput and reproducibility.
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Abstract
Description
[Technical field]
[0001] CROSS REFERENCE TO RELATED APPLICATIONS: This application is a continuation-in-part of co-pending U.S. patent application Ser. No. 16 / 785,206, filed Feb. 7, 2020, entitled LITHIUM NIOBATE DEVICES FABRICATED USING DEEP ULTRAVIOLET RADIATION, which is hereby incorporated by reference for all purposes. [Background technology]
[0002] Optical devices such as waveguides are utilized in a variety of applications. It may be desirable for lithium niobate devices to be used in waveguides, resonators, and other optical and electro-optical devices. However, lithium niobate is notoriously difficult to fabricate into devices having desired performance characteristics. Therefore, a mechanism for providing optical devices that utilize lithium niobate and have sufficient performance characteristics is desirable.
[0003] Various embodiments of the invention are disclosed in the following detailed description and the accompanying drawings. [Brief description of the drawings]
[0004] [Figure 1A] FIG. 1A illustrates an embodiment of an optical device comprising lithium niobate fabricated using ultraviolet photolithography. [Figure 1B] FIG. 1B illustrates an embodiment of an optical device comprising lithium niobate fabricated using ultraviolet photolithography.
[0005] [Diagram 2] FIG. 2 illustrates one embodiment of measurements showing transmission through an optical device comprising lithium niobate and fabricated using ultraviolet photolithography.
[0006] [Diagram 3]FIG. 3 is a flow chart illustrating one embodiment of a method for forming an optical device comprising lithium niobate using ultraviolet photolithography.
[0007] [Figure 4] FIG. 4 illustrates an embodiment of an optical device comprising lithium niobate that is formed using ultraviolet photolithography during fabrication. [Diagram 5] FIG. 5 illustrates an embodiment of an optical device comprising lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 6] FIG. 6 illustrates an embodiment of an optical device comprising lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 7] FIG. 7 illustrates an embodiment of an optical device comprising lithium niobate that is formed using ultraviolet photolithography during fabrication. [Figure 8] FIG. 8 illustrates an embodiment of an optical device comprising lithium niobate formed using ultraviolet photolithography during fabrication.
[0008] [Figure 9] FIG. 9 is a flow chart illustrating one embodiment of a method for forming an optical device comprising lithium niobate using deep ultraviolet photolithography.
[0009] [Figure 10] FIG. 10 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 11] FIG. 11 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 12] FIG. 12 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 13]FIG. 13 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 14] FIG. 14 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 15] FIG. 15 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication.
[0010] [Figure 16] FIG. 16 illustrates another embodiment of an optical device including lithium niobate formed using ultraviolet photolithography during fabrication. [Figure 17] FIG. 17 illustrates another embodiment of an optical device comprising lithium niobate, formed using ultraviolet photolithography during fabrication. [Figure 18] FIG. 18 illustrates another embodiment of an optical device comprising lithium niobate, formed using ultraviolet photolithography during fabrication. [Figure 19] FIG. 19 illustrates another embodiment of an optical device comprising lithium niobate, formed using ultraviolet photolithography during fabrication. [Figure 20] FIG. 20 illustrates another embodiment of an optical device comprising lithium niobate, formed using ultraviolet photolithography during fabrication. [Figure 21] FIG. 21 illustrates another embodiment of an optical device comprising lithium niobate, formed using ultraviolet photolithography during fabrication. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] The present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a composition of matter, a computer program product embodied on a computer-readable storage medium, and / or a processor, e.g., a processor configured to execute instructions stored in and / or provided by a memory coupled to the processor. These implementations, or any other form the invention may take, may be referred to herein as techniques. In general, the order of steps of the disclosed processes may be varied within the scope of the invention.
[0012] A detailed description of one or more embodiments of the present invention is provided below, along with the accompanying drawings illustrating the principles of the present invention. Although the present invention has been described in connection with such embodiments, the present invention is not limited to any embodiment. The scope of the present invention is limited only by the claims, and the present invention encompasses numerous variations, modifications, and equivalents. In order to provide a thorough understanding of the present invention, numerous specific details are set forth in the following description. These details are provided for the purpose of example, and the present invention may be practiced according to the claims without some or all of these specific details. For the sake of clarity, technical items that are known in the technical field related to the present invention have not been described in detail so as not to unnecessarily obscure the present invention.
[0013] Lithium niobate (LN) is desirable for use in optical devices, particularly in electron-optical devices. As used herein, optical devices may include optical devices and electron-optical devices. The desirability of LN is due, at least in part, to the change in refractive index of LN with respect to an applied external electric field. However, fabrication of LN optical devices with desired performance characteristics is challenging. For example, LN optical devices may have losses that are greater than desired. Recently, LN optical devices have been fabricated using an electron beam (e.g., using electron beam lithography) to pattern a mask layer. The underlying hard mask and LN layer may be etched using other techniques. LN optical devices so formed may have improved performance. However, electron beam lithography is time consuming, can be non-uniform, and may have limited repeatability. The electron beam utilizes a scanning procedure to pattern the mask, which is inherently slow. Moreover, the electron beam is susceptible to drift during use. Because of the limited range of beam deflection, electron beam photolithography can only pattern relatively small areas, e.g., areas on the order of one square millimeter or less. To pattern larger areas, the stage for the electron beam is shifted and the electron beam lithography is repeated. In addition to slowing down throughput, this aspect of electron beam lithography can cause misalignments in the stitches between these areas. These misalignments adversely affect the performance of the device being fabricated. Therefore, improved methods of fabricating LN optical devices are desired.
[0014] Other nonlinear optical materials may suffer from similar drawbacks as LN. For example, lithium tantalate (e.g., LiTaO3) has similar optical properties as LN. Lithium tantalate (LT) may also be difficult to fabricate. Furthermore, LT may be susceptible to damage during high temperature fabrication methods. Other ferroelectric nonlinear (e.g., second order) optical materials may be desirable for use in optical devices. Such ferroelectric nonlinear optical materials may include, but are not limited to, potassium niobate (e.g., KNbO3), gallium arsenide (GaAs), potassium titanyl phosphate (KTP), lead titanyl zirconate (PZT), and barium titanate (BaTiO3). The described techniques may also be used for other nonlinear ferroelectric optical materials, especially for materials that may be difficult to fabricate otherwise. For example, such nonlinear ferroelectric optical materials may have sluggish chemical etching reactions using conventional etching chemistries such as compounds of fluorine, chlorine, or bromine. As a result, improved methods of fabricating devices utilizing ferroelectric nonlinear optical materials such as LT are desirable.
[0015] A method of fabricating an optical device and an optical device so formed are described. At least a portion of the optical device includes LN and is fabricated using photolithography, such as deep ultraviolet (DUV) lithography. Fabricating the optical device may include providing a hard mask layer on the LN layer. A mask is fabricated on the hard mask layer. The mask is formed using DUV photolithography. More specifically, the mask layer is provided, for example, by spin coating on a DUV photoresist. The mask layer may be heat treated. Portions of the mask layer may be selectively exposed to electromagnetic radiation in the DUV wavelength range. In some embodiments, the mask layer is heat treated again after exposure. The mask layer is developed. Thus, portions of the mask layer are removed to form a pattern of openings that expose the underlying hard mask layer. A hard mask is formed from the hard mask layer by transferring the pattern of the mask to the hard mask layer. For example, portions of the hard mask layer that are not covered by the openings of the mask may be selectively etched. The hard mask may have recesses or openings in areas where the hard mask layer has been etched. The pattern of the hard mask may be transferred to the LN layer using, for example, physical etching. At least the exposure may be performed multiple times for multiple stitch regions across the substrate surface. In some cases, each of these stitch regions is at least 10 millimeters by 10 millimeters. In some embodiments, the stitch regions may be at least 15 millimeters by 15 millimeters. In some embodiments, each stitch region is at least 20 millimeters by 20 millimeters. Thus, longer and / or more optical devices including LN may be fabricated within a single stitch region using DUV lithography.
[0016] The LN in the optical device fabricated using DUV lithography has an improved surface roughness for the sidewalls. For example, the short-range root mean square surface roughness of the sidewalls of the LN in the optical device formed using DUV photolithography is less than 10 nanometers. In some embodiments, the root mean square surface roughness is 5 nanometers or less. In some cases, the short-range root mean square surface roughness does not exceed 2 nanometers. The LN in the optical device can also have improved performance. In some aspects, the LN in the optical device has a loss of 2 dB / cm or less. In some embodiments, the LN has a loss of less than 1.0 dB / cm. In some cases, the loss is 0.5 dB / cm or less. Thus, the performance of the optical device including the LN can be improved.
[0017] Although the apparatus and methods described herein are described in the context of LN, they may be applied to other nonlinear (e.g., second order) optical materials, particularly ferroelectric nonlinear optical materials, which may be difficult to fabricate using conventional techniques. Such nonlinear ferroelectric optical materials may have sluggish chemical etching reactions for conventional etches using chemicals such as fluorine, chlorine, or bromine compounds. For example, LT, potassium niobate, gallium arsenide, potassium titanyl phosphate, lead titanyl zirconate, and / or barium titanate may be used in place of or in addition to LN. For example, methods of fabricating optical devices, and optical devices so formed, are such that at least a portion of the optical device includes a ferroelectric nonlinear optical material (e.g., LT) and is fabricated utilizing photolithography, such as DUV lithography. Fabricating the optical device may include providing a hard mask layer on the ferroelectric nonlinear optical layer. A mask is fabricated on the hard mask layer. The mask is formed using DUV photolithography. More specifically, the mask layer is provided, for example by spin-coating onto a DUV photoresist. The mask layer may be heat-treated. Portions of the mask layer may be selectively exposed to electromagnetic radiation in the DUV wavelength range. In some embodiments, the mask layer is heat-treated again after exposure. The mask layer is developed. Portions of the mask layer are thus removed to form a pattern of openings that expose the underlying hard mask layer. A hard mask is formed from the hard mask layer by transferring the pattern of the mask to the hard mask layer. For example, portions of the hard mask layer that are not covered by the openings of the mask may be selectively etched. The hard mask may have recesses or openings in areas where the hard mask layer is etched. The pattern of the hard mask may be transferred to the ferroelectric nonlinear optical layer, for example using physical etching. At least the exposure may be performed multiple times for multiple stitch areas across the substrate surface. In some cases, each of these stitch areas is at least 10 millimeters by 10 millimeters.In some embodiments, the stitch areas may be at least 15 mm by 15 mm. In some embodiments, each stitch area is at least 20 mm by 20 mm. Thus, longer and / or more optical devices including LN can be fabricated within a single stitch area using DUV lithography.
[0018] The ferroelectric nonlinear optical material in the optical device fabricated using DUV lithography has an improved surface roughness for the sidewall. For example, the short-range root mean square surface roughness of the sidewall of the ferroelectric nonlinear optical material (e.g., LT) in the optical device formed using DUV photolithography is less than 10 nanometers. In some embodiments, the root mean square surface roughness is 5 nanometers or less. In some cases, the short-range root mean square surface roughness does not exceed 2 nanometers. The ferroelectric nonlinear optical material, such as LT, in the optical device can also have improved performance. In some aspects, the ferroelectric nonlinear optical material in the optical device has a loss of 2 dB / cm or less. In some embodiments, the ferroelectric nonlinear optical material has a loss of less than 1.0 dB / cm. In some cases, the loss is 0.5 dB / cm or less. Thus, the performance of the optical device including the ferroelectric nonlinear optical material can be improved.
[0019] 1A and 1B show embodiments of apparatus 100A and 100B, respectively, including LN fabrication using photolithography, such as DUV lithography. FIG. 1A is a schematic diagram showing apparatus 100A including optical device 110A formed on substrate 101A. FIG. 1A is not to scale. Substrate 101A may include a carrier wafer and any underlying layers between the wafer and optical device 110A. Optical device 110A includes an LN region. Although only a portion of optical device 110A is shown, all of the layers may be formed of LN. In some embodiments, optical device 110A may include other components not shown. Optical device 110A includes flat region 111A, sidewalls 112A and 114A, and top surface 116A. Thus, optical device 110 includes a ridge having sidewalls 112A and 114A and top surface 116A. Thus, in the illustrated embodiment, the LN layer is not completely etched. In other embodiments and / or in other regions, the LN layer may be completely etched to expose underlying layers, such as the substrate 101A. In such embodiments, some or all of the flat region 111A may be omitted.
[0020] Similarly, FIG. 1B is a micrograph of device 100B including optical device 110B formed on a substrate (not shown). The substrate may include a carrier wafer, as well as any underlying layers between the wafer and optical device 110B. Optical device 110B is constructed from an LN layer. In some embodiments, optical device 110B may include other components not shown. Optical device 110B includes a ridge having sidewalls 112B and 114A, as well as a top surface 116B and a flat region 111B.
[0021] The LN regions of the optical device 110A and the optical device 110B are formed using DUV lithography. As a result, the sidewalls 112A, 114A, 112B, and 114B of the optical devices 110A and 110B have improved surface roughness. The short-range root mean square (RMS) surface roughness is the RMS surface roughness at a length (e.g., along the direction l) of 200 nanometers or less. The short-range RMS surface roughness of the sidewalls 112A and 114A of the LN regions in the optical device 110A and the short-range RMS surface roughness of the LN optical device 110B are each less than 10 nanometers. In some embodiments, the short-range RMS surface roughness for the LN regions of both the optical device 110A and the LN optical device 110B is 5 nanometers or less. The short-range RMS surface roughness of the LN regions of optical device 110A and LN optical device 110B does not exceed 2 nanometers in some embodiments. Additionally, the short-range RMS roughness of each of top surfaces 116A and 116B is, in some embodiments, 1 nanometer or less. In some embodiments, the long-range (greater than 200 nanometers and up to 200 micrometers) RMS surface roughness of sidewalls 112A, 114A, 112B, and / or 114B may be different from the short-range RMS surface roughness.
[0022] Due to the improved smoothness, the optical device may have improved performance. This can be seen with reference to FIG. 2, which illustrates one embodiment 200 of measurements showing transmission through an optical device including lithium niobate and fabricated using ultraviolet photolithography. Graph 200 shows transmission through an LN optical device, such as optical device 110A and / or 110B, operating as a resonator. The dips in graph 200 indicate resonances. In some embodiments, the width of the peak is on the order of picometers, indicating the efficiency of the corresponding optical device. In some embodiments, the LN regions of optical device 110A and LN optical device 110B have a signal loss of 5 dB / cm or less. In some embodiments, the LN regions of optical device 110A and LN optical device 110B each have a loss of 2 dB / cm or less. In some such embodiments, the loss for each of the LN regions of optical device 110A and LN optical device 110B is less than 1.0 dB / cm. For example, this loss may be less than or equal to 0.5 dB / cm in some embodiments.
[0023] Thus, the optical devices 110A and 110B fabricated using DUV lithography may have reduced surface roughness and improved efficiency. Furthermore, because patterning is performed using DUV lithography, the optical devices 110A and 110B may be fabricated over larger areas of the substrates 101A and 101B with higher repeatability, better uniformity, and higher throughput. Thus, methods for fabricating optical devices including LN, and the optical devices so formed, may be improved.
[0024] FIG. 3 is a flow chart illustrating one embodiment of a method 300 for forming an optical device including LN using ultraviolet lithography, such as DUV lithography. The method 300 is described in the context of a process that may have sub-processes. Although described in a particular order, other orders may be utilized that are not inconsistent with the description herein. The method 300 begins after an LN layer is provided on a substrate. In some embodiments, the LN layer may be thin, e.g., 10 micrometers or less in thickness. In some embodiments, the LN layer may be 1 micrometer or less in thickness. In some embodiments, the LN layer may be 700 nanometers or less in thickness. In some such embodiments, the thickness may be 400 nanometers or less. Other thicknesses are possible. An underlayer, such as silicon dioxide, may be present between the LN layer and a carrier wafer. In some embodiments, the carrier wafer may include silicon, quartz, silica, LN, sapphire, and / or other materials. For example, a LN layer may be present on an underlying layer of silicon dioxide having a thickness nominally at least 2 micrometers and no more than 5 micrometers. Other thicknesses, additional layers, and / or other layers may be present.
[0025] At 302, a hardmask layer is provided. In some embodiments, the hardmask may include one or more of amorphous silicon, silicon dioxide, silicon nitride, ceramic, metal (e.g., Ti), or other hardmask materials. In some embodiments, chemical vapor deposition (CVD) or other deposition methods may be utilized at 302.
[0026] At 304, a mask is formed on the hard mask layer using UV lithography. In some embodiments, 304 includes providing a mask layer. For example, the mask layer may be a photoresist layer spin-coated on the hard mask layer. Using UV lithography, portions of the mask layer are selectively exposed to light. In some embodiments, the wavelength of the electromagnetic radiation used for UV photolithography is 450 nanometers or less. In some embodiments, DUV lithography is utilized. For example, the wavelength of the electromagnetic radiation used may be less than 250 nanometers. In some embodiments, other wavelengths of electromagnetic radiation may be used to expose the mask layer. Also, as part of 304, the mask layer may be thermally treated (e.g., baked) before and / or after exposure. The exposed mask is also developed. In some embodiments, a post-development bake is not performed. Thus, portions of the mask layer are removed to form openings in the mask layer. As a result, a mask having a pattern is formed.
[0027] At 306, a hard mask is provided from the hard mask layer. To do so, a mask formed by DUV lithography is utilized. Thus, a pattern from the mask may be transferred to the hard mask layer. A hard mask is thus formed. In some embodiments, 306 includes chemically and / or physically removing portions of the hard mask layer that are not covered by the pattern in the mask. In some embodiments, the removal at 306 forms openings in the hard mask layer to provide the hard mask. In some embodiments, the removal at 306 forms recesses in the hard mask layer to provide the hard mask. A hard mask may be used in method 300 because a mask patterned using DUV lithography may be more susceptible to removal by the etch used to pattern the LN layer at 308, as described below. Such removal of the mask may result in the sidewalls of the optical device having a greater surface roughness than desired. However, in other embodiments, for example, when a greater surface roughness is acceptable, steps 302 and 304 may be omitted.
[0028] At 308, the LN layer is etched using the hard mask. Thus, at 308, the pattern in the hard mask may be transferred to the LN layer. In some embodiments, at 308, a physical etch is used. At 308, for example, dry etching, reactive ion etching (RIE), plasma etching, and / or other physical etching mechanisms may be utilized. In some embodiments, at 308, a chemical etch or other etch may be used. In embodiments where the hard mask includes recesses instead of openings, the pattern transfer at 308 also removes at least a portion of the thin portion of the hard mask. In some embodiments, the LN layer is not completely etched through 308. Thus, the optical device formed may be a raised portion or ridge remaining after 308. In some embodiments, at 308, a portion of the LN layer may be completely etched. Also, at 308, all of the remaining mask and / or hard mask may be removed.
[0029] At 310, some or all of the method 300 is optionally repeated. For example, at 304, a mask layer may be applied and baked. After one area is exposed, the stage may be shifted to expose additional areas of the mask layer. Thus, this portion of 304 may be repeated. Once all desired areas are exposed, the mask layer may be developed to apply a mask to the entire substrate. The pattern may then be transferred to an underlying layer at 306 and 308. Thus, in some embodiments, at least a portion of 304 is repeated one or more times. In other embodiments, 302, 304, 306, and 308 may be repeated for different areas of the substrate. Thus, multiple areas of the device may be fabricated. For example, larger optical devices and / or optical devices that extend across the edges of the patterned areas may be formed.
[0030] For example, Figures 4-8 show one embodiment of a device 400 including LN and formed using method 300 during fabrication. Figures 4-8 are not to scale, and only a portion of device 400 is shown. Additionally, device 400 is for illustrative purposes and may not represent a particular device. For example, the sidewalls are shown as generally vertical and flat, while the top surface is shown as generally horizontal and flat. However, some variation typically exists.
[0031] 4 shows the device 400 after the mask layer has been applied as part of 304. Thus, a substrate 401 is shown, which may include a carrier wafer, an underlayer 402, an LN layer 410, a hard mask layer 420, and a DUV mask layer 430. The underlayer 402 may be an insulator, such as silicon dioxide. In this embodiment, the underlayer 402 is shown separately from the substrate 401. In some embodiments, other layers may be present and / or some of the layers shown may be omitted. For example, in some embodiments, the underlayer 402 may be omitted.
[0032] 5 shows device 400 after completion of 304. DUV mask layer 430 has been selectively exposed to DUV light and developed, thus forming DUV mask 430A. Portions of hard mask layer 420 are not covered by DUV mask 430A.
[0033] 6 shows the apparatus 400 after 306 has been completed. Thus, a hard mask 420A has been formed. In the illustrated embodiment, the pattern of the DUV mask 430A has been transferred to the hard mask 420A. In the illustrated embodiment, the hard mask 420A has recesses 422 in the areas where the hard mask layer 430 has been etched. Thus, the pattern of the DUV mask 430A has been transferred to the hard mask 420A.
[0034] 7-8 show the apparatus 400 after 308 is completed. The DUV mask 430A and the hard mask 420A have also been removed. FIG. 7 is a cross-sectional view of the apparatus 400. FIG. 8 is a top view of the apparatus 400 showing the stitches (indicated by dashed lines). Thus, the LN optical device 410A is shown in FIGS. 7 and 8. Also shown in FIG. 8 is the LN optical device 410B. In some embodiments, the LN optical device 410A and / or the LN optical device 410B include other components. However, for simplicity, only a portion of the LN optical device 410A and a portion of the LN optical device 410B are shown. The LN optical devices 410A and 410B may be considered as bumps formed in the LN layer 410 by removing the portions of the LN layer that are not covered by the hard mask 420A. Thus, the sidewalls of optical devices 410A and 410B, such as sidewalls 412 and 414, are sidewalls for the ridges. In some embodiments, at 308, LN layer 410 may be completely etched away. In such embodiments, after 308 is completed, an underlying layer, such as underlayer 402, may be exposed.
[0035] The LN optical devices 410A and 410B are in different stitch areas exposed at different times. Therefore, as shown in FIG. 8, the LN optical devices 410A and 410B may not be aligned. Therefore, the LN optical devices 410A and 410B are slightly spread out in the stitch area to reduce the effect of such misalignment. Therefore, in the illustrated embodiment, the LN optical devices 410A and 410B can be considered as part of a single optical device that spans multiple stitch areas. The LN optical devices 410A and 410B are also formed using DUV lithography. Thus, each has a sidewall. The sidewalls 412 and 414 of the LN optical device 410A are labeled in FIG. 7 and FIG. 8. By using DUV lithography, the sidewalls 412 and 414 have improved surface roughness. The short-range RMS surface roughness of the sidewalls 412 and 414 of the LN optical device 410A is less than 10 nanometers, respectively. In some embodiments, the short-range RMS surface roughness for each sidewall 412 and 414 of the LN optical device 410A is less than or equal to 5 nanometers. In some embodiments, the short-range RMS surface roughness for each sidewall 412 and 414 of the LN optical device 410A does not exceed 2 nanometers. The LN optical device 410B has a similar short-range RMS surface roughness as the LN optical device 410A.
[0036] The optical devices 410A and 410B may have improved performance. In some embodiments, the LN optical devices 410A and 410B each have a signal loss of 5 dB / cm or less. In some embodiments, the LN optical devices 410A and 410B each have a loss of 2 dB / cm or less. In some such embodiments, the loss of each of the LN optical devices 410A and 410B is less than 1.0 dB / cm. For example, this loss may be 0.5 dB / cm or less in some embodiments.
[0037] Thus, the LN optical devices 410A and 410B can have improved manufacturability and performance, and reduced sidewall surface roughness. Because DUV lithography is utilized, throughput can be increased, the time required to fabricate the device 400 can be reduced, uniformity can be improved, and reproducibility can be improved. DUV lithography also has a large stitch area. For example, in some embodiments, single shot DUV lithography can be performed on a stitch area that is at least 10 millimeters by 10 millimeters. In some embodiments, the stitch area can be at least 15 millimeters by 15 millimeters. For example, the stitch area can be nominally 20 millimeters by 20 millimeters or larger. Thus, the number of stitches as shown in FIG. 8 is reduced. This can not only improve throughput and reproducibility, but also reduce misalignment of the optical devices (e.g., as shown between the LN optical devices 410A and 410B).
[0038] FIG. 9 is a flow chart illustrating one embodiment of a method 900 for forming an optical device including LN using DUV lithography. The method 900 is described in the context of a process that may have sub-processes. Although described in a particular order, other orders not inconsistent with the description herein may be utilized. The method 900 begins after an LN layer is provided on a substrate, such as a carrier wafer. In some embodiments, the LN layer may be thin, e.g., 10 micrometers or less in thickness. In some embodiments, the LN layer may be 1 micrometer or less in thickness. In some embodiments, the LN layer may be 700 nanometers or less in thickness. In some such embodiments, the thickness may be 400 nanometers or less in thickness. Other thicknesses are possible. An insulating underlayer, such as silicon dioxide, may be present between the LN layer and the underlying wafer. For example, the LN layer may be present on an underlayer of silicon dioxide having a thickness nominally at least 2 micrometers and no greater than about 5 micrometers. Other thicknesses, additional layers, and / or other layers may be present.
[0039] At 902, a stop layer may be provided. The stop layer is insensitive to an etch that may be used in forming the hard mask. For example, as described below, if a chemical etch is used in selectively removing a portion of the hard mask layer, the stop layer provided at 902 is insensitive to the chemicals used in such an etch. If multiple etches are used in forming the hard mask, it is desirable that the stop layer provided at 902 be insensitive to at least the final etch used in patterning the hard mask. The etch stop layer provided at 902 may also be removed without undue damage to the underlying LN layer. In some embodiments, 902 may be omitted.
[0040] At 904, a hardmask layer is provided. In some embodiments, the hardmask may include one or more of amorphous silicon, silicon dioxide, silicon nitride, aluminum oxide, titanium dioxide, ceramic, other semiconductors, and / or other hardmask materials. In some embodiments, a metal hardmask may be used. In some embodiments, CVD, plasma enhanced CVD, or other deposition methods may be utilized at 904.
[0041] At 906, an anti-reflective coating (ARC) layer is provided on the hard mask layer. In some embodiments, the ARC layer is spin-coated on the hard mask layer. The ARC layer is configured to reduce reflection of DUV electromagnetic radiation from underlying layers during DUV lithography for the DUV mask. In some embodiments, 906 may be omitted.
[0042] At 908, a DUV mask layer is provided on the ARC layer. In some embodiments, the DUV mask layer is a polymer, such as a DUV photoresist. For example, a DUV photoresist, such as UV™ 210 Positive DUV Photoresist, may be used. In some embodiments, 908 includes spin-coating the DUV mask layer. However, other deposition methods are possible.
[0043] At 910, the DUV mask layer is heat treated prior to exposure. Thus, 910 may be considered a pre-exposure bake or pre-exposure heat treatment. In some embodiments, the heat treatment at 910 is performed at a temperature greater than 140 degrees Celsius. In some embodiments, the heat treatment is performed at a temperature greater than 145 degrees Celsius. For example, a temperature at or near 150 degrees Celsius may be used for the heat treatment at 910. In some embodiments, the heat treatment is greater than 1 minute. In some embodiments, at least 70 seconds are used for the heat treatment. In some embodiments, the heat treatment at 910 is at least 80 seconds. For example, the device may be heat treated at or near 150 degrees Celsius for a time period of nominally 90 seconds or more.
[0044] In some embodiments, 910 includes gradually increasing the temperature to which the device is exposed in the pre-exposure thermal treatment. In some embodiments, the temperature (e.g., as measured of the mask layer, of other parts of the device, or in an oven or on a hot plate) is increased at a rate of 140 degrees Celsius per minute or less. In some embodiments, the rate of increase in temperature is 125 degrees Celsius per minute or less. In some embodiments, the temperature is increased at a rate of 100 degrees Celsius per minute or less.
[0045] At 912, the DUV mask layer is selectively exposed to DUV radiation. For example, at 912, a wavelength of 250 nanometers or less may be used. In some embodiments, 912 includes exposing multiple stitch regions. For example, the stitch regions may be exposed, the stage moved, and other regions exposed with the same or a different reticle. Thus, the DUV mask layer is selectively exposed to DUV radiation.
[0046] At 914, the DUV mask layer is thermally treated after exposure. Thus, 914 may be considered a post-exposure bake or post-exposure thermal treatment. In some embodiments, the thermal treatment at 914 is performed at a temperature greater than 140 degrees Celsius. In some embodiments, the thermal treatment is performed at a temperature greater than 145 degrees Celsius. For example, a temperature at or near 150 degrees Celsius may be used for the thermal treatment at 914. In some embodiments, the thermal treatment is greater than 1 minute. In some embodiments, at least 70 seconds are used for the thermal treatment. In some embodiments, the thermal treatment at 914 is at least 80 seconds. For example, the device may be thermally treated at or near 150 degrees Celsius for a time period of nominally 90 seconds or more.
[0047] In some embodiments, 914 includes gradually increasing the temperature to which the device is exposed in the post-exposure thermal treatment. In some embodiments, the temperature (e.g., as measured of the mask layer, of other parts of the device, or in an oven or on a hot plate) is increased at a rate of 140 degrees Celsius per minute or less. In some embodiments, the rate of increase in temperature is 125 degrees Celsius per minute or less. In some embodiments, the temperature is increased at a rate of 100 degrees Celsius per minute or less.
[0048] At 916, the exposed DUV mask layer is also developed. In some embodiments, a post-develop bake is not performed. Thus, portions of the DUV mask layer are removed to form openings in the DUV mask layer. As a result, a patterned DUV mask is formed.
[0049] At 918, the portions of the ARC layer that are not covered by the openings in the DUV mask are removed. For example, the ARC layer may be etched at 918. In some embodiments, 918 may be omitted. In such embodiments, the ARC layer may be removed in the same manner as utilized at 920.
[0050] At 920, the pattern of the DUV mask is transferred to the hard mask layer. In some embodiments, the pattern of the DUV mask is also transferred to the ARC layer. A hard mask is thus formed. In some embodiments, 920 includes chemically and / or physically removing portions of the hard mask layer that are not covered by the pattern in the mask. For example, if the hard mask layer is a silicon dioxide layer, fluorine-based chemistries may be used at 920. In other embodiments, dry etching, RIE, or other etching mechanisms may be used. In some embodiments, the removal at 920 forms openings in the hard mask layer to provide the hard mask. In such embodiments, the stop layer formed at 902 may prevent damage to the underlying LN layer. In some embodiments, the removal at 920 forms recesses in the hard mask layer to provide the hard mask. Thus, damage to the LN layer may still be avoided.
[0051] At 922, the pattern of the hard mask may be transferred to the stop layer. This may occur via chemical or physical etching. The etch used to remove the stop layer at 922 is different from one or more of the etches used to pattern the hard mask at 920. In some embodiments, 922 may be omitted.
[0052] At 924, the pattern in the hard mask is transferred to the LN layer. In some embodiments, at 924, a physical etch is used. For example, dry etching, reactive ion etching (RIE), plasma etching, and / or other physical etching mechanisms may be utilized. In some embodiments, at 924, a chemical etch or other removal mechanism may be used. In some embodiments, at 924, the LN layer is not completely etched. Thus, the LN optical device may be formed with or may include ridges remaining after partial removal of portions of the LN layer. In some embodiments, the LN layer may be completely etched in some areas. In embodiments where the hard mask includes recesses instead of openings, the pattern transfer at 924 also removes at least a portion of the thin portion of the hard mask. In some embodiments, the pattern transfer at 924 may also remove some or all of the etch stop layer that is not covered by the hard mask. The etch used to form the hard mask at 920 may be separate from the etch used to remove portions of the LN layer at 924. As a result, these etches can be optimized separately. This may lead to smoother sidewalls in the optical device being fabricated.
[0053] At 926, any remaining DUV mask, ARC layer, and / or hard mask may be removed, and fabrication of the device may be completed, e.g., the formed LN optical device may be singulated and / or additional components may be fabricated.
[0054] For example, Figures 10-15 show one embodiment of a device 1000 including LN and formed using method 900 during fabrication. Figures 10-15 are not to scale, and only a portion of device 1000 is shown. Additionally, device 1000 is for illustrative purposes and may not represent a particular device. For example, the sidewalls are shown as vertical and flat, while the top surface is shown as horizontal and flat. However, some variations typically exist.
[0055] 10 depicts the device 1000 after 904, 906, and 908 have been completed. Thus, a substrate 1001 is shown, which may include a carrier wafer, an underlayer 1002, an LN layer 1010, a hard mask layer 1030, an ARC layer 1040, and a DUV mask layer 1050. The underlayer 1002 may be an insulator, such as silicon dioxide. In this embodiment, the underlayer 1002 is shown separately from the substrate 1001. In some embodiments, other layers may be present and / or some layers shown may be omitted. For example, in some embodiments, the underlayer 1002 may be omitted. In the illustrated embodiment, an etch stop layer is not utilized. Thus, 902 and 922 are omitted.
[0056] 11 depicts device 1000 after steps 910, 912, 914, and 916 have been completed. DUV mask layer 1050 has been pre-exposure baked, selectively exposed to DUV radiation, post-exposure baked, and developed. In this manner, DUV mask 1050A has been formed. A portion of ARC layer 1040 is not covered by DUV mask 1050A.
[0057] 12 shows device 1000 after 918 is completed, i.e., after the portions of ARC layer 1040 not covered by DUV mask 1050A have been removed in another manner (e.g., as part of 920). Thus, portions of hardmask layer 1030 are uncovered.
[0058] 13 shows the apparatus 1000 after 920 is completed. Thus, the pattern of the DUV mask 1050A has been transferred to the hard mask 1030A. In the illustrated embodiment, in the areas where the hard mask layer 1030 was etched, the hard mask 1030A has recesses 1030B. Thus, the pattern of the DUV mask 1050A has been transferred to the hard mask 1030A.
[0059] 14 shows device 1000 after 924 is completed. Thus, LN optical devices 1010A and 1010B have been formed. LN device 1010A has sidewalls 1012A and 1014A. LN optical device 1010B has sidewalls 1012B and 1014B.
[0060] 15 shows the apparatus 1000 after 926 has been completed and the layers above the LN optical devices 1010A and 1010B have been removed. The apparatus 1000 may undergo further processing to complete optical devices and / or other devices utilizing the LN optical devices 1010A and / or 1010B.
[0061] The LN optical devices 1010A and 1010B are formed using DUV lithography in the method 900. Thus, the sidewalls 1012A, 1014A, 1012B, and 1014B of the LN optical devices 1010A and 1010B have improved surface roughness. The short-range RMS surface roughness of the sidewalls 1012A, 1014A, 1012B, and 1014B, respectively, is less than 10 nanometers. In some embodiments, the short-range RMS surface roughness for each of the sidewalls 1012A, 1014A, 1012B, and 1014B is less than or equal to 5 nanometers. In some embodiments, the short-range RMS surface roughness of each of the sidewalls 1012A, 1014A, 1012B, and 1014B does not exceed 2 nanometers.
[0062] The optical devices 1010A and 1010B may have improved performance. In some embodiments, the LN optical devices 1010A and 1010B each have a signal loss of 5 dB / cm or less. In some embodiments, the LN optical devices 1010A and 1010B each have a loss of 2 dB / cm or less. In some such embodiments, the loss of each of the LN optical devices 1010A and 1010B is less than 1.0 dB / cm. For example, this loss may be 0.5 dB / cm or less in some embodiments.
[0063] 16-21 illustrate one embodiment of a device 1600 including LN and formed using method 900 during fabrication. FIGs. 16-21 are not to scale, and only a portion of device 1600 is shown. Additionally, device 1600 is for illustrative purposes and may not represent a particular device. For example, the sidewalls are shown as vertical and flat, while the top surface is shown as horizontal and flat. However, some variations typically exist.
[0064] FIG. 16 depicts device 1600 after steps 902, 904, 906, and 908 have been completed. Thus, substrate 1601 is shown, which may include a carrier wafer, underlayer 1602, LN layer 1610, etch stop layer 1620, hard mask layer 1630, ARC layer 1640, and DUV mask layer 1650. Underlayer 1602 may be an insulator, such as silicon dioxide. In this embodiment, underlayer 1602 is shown separate from substrate 1601. Etch stop layer 1620 may include amorphous silicon and / or other materials that are unreactive to one or more of the etches used for hard mask layer 1630. Etch stop layer 1620 may be at least 10 nanometers thick and no more than 50 nanometers thick in some embodiments. In some embodiments, etch stop layer 1620 may also be removed without undue damage to underlying LN layer 1610. In some embodiments, other layers may be present and / or some of the layers shown may be omitted, for example, in some embodiments, bottom layer 1602 may be omitted.
[0065] 17 shows the device 1600 after steps 910, 912, 914, 916, and 918 have been completed. The DUV mask layer 1650 has been pre-exposure baked, selectively exposed to DUV radiation, post-exposure baked, and developed. In this manner, a DUV mask 1650A has been formed. The portions of the ARC layer 1640 that are not covered by the DUV mask 1650A have been removed. Thus, the ARC layer portions 1640A remain. A portion of the hard mask layer 1630 is uncovered.
[0066] 18 shows the apparatus 1600 after 920 is completed. Thus, the pattern of the DUV mask 1650A has been transferred to the hard mask 1630A. In the illustrated embodiment, the hard mask 1630A has openings 1630B in the areas where the hard mask layer 1630 has been etched. Thus, a portion of the etch stop layer 1620 is uncovered. Thus, the pattern of the DUV mask 1650A has been transferred to the hard mask 1630A.
[0067] 19 shows device 1600 after 922 is completed, i.e., after etch stop layer 1620 has been selectively etched as part of the transfer of the pattern to LN layer 1610. Thus, the uncovered areas of etch stop layer 1620 have been removed. A portion 1620A of the etch stop layer remains. In some embodiments, etch stop layer 1620 need not be completely removed at 922. In such embodiments, LN layer 1610 may be covered by a portion of the etch stop layer. Such portion is then removed by the pattern transfer at 924.
[0068] 20 shows device 1600 after 924 has been completed. Thus, LN optical devices 1610A and 1610B have been formed. LN device 1610A has sidewalls 1612A and 1614A. LN optical device 1610B has sidewalls 1612B and 1614B.
[0069] 21 shows the apparatus 1600 after 926 has been completed and the layers above the LN optical devices 1610A and 1610B have been removed. The apparatus 1600 may undergo further processing to complete optical devices and / or other devices utilizing the LN optical devices 1610A and / or 1610B.
[0070] The LN optical devices 1610A and 1610B are formed using DUV lithography of the method 900. Thus, the sidewalls 1612A, 1614A, 1612B, and 1614B of the LN optical devices 1610A and 1610B have improved surface roughness. The short-range RMS surface roughness of the sidewalls 1612A, 1614A, 1612B, and 1614B, respectively, is less than 10 nanometers. In some embodiments, the short-range RMS surface roughness for each of the sidewalls 1612A, 1614A, 1612B, and 1614B is less than or equal to 5 nanometers. In some embodiments, the short-range RMS surface roughness of each of the sidewalls 1612A, 1614A, 1612B, and 1614B does not exceed 2 nanometers.
[0071] The optical devices 1610A and 1610B may have improved performance. In some embodiments, each LN optical device 1610A and 1610B has a signal loss of 5 dB / cm or less. In some embodiments, each LN optical device 1610A and 1610B has a loss of 2 dB / cm or less. In some such embodiments, the loss of each of the LN optical devices 1610A and 1610B is less than 1.0 dB / cm. For example, this loss may be 0.5 dB / cm or less in some embodiments.
[0072] Thus, the method 900 provides LN optical devices 1010A, 1010B, 1610A, and / or 1610B that can have improved manufacturability and performance, and reduced sidewall surface roughness. Because DUV lithography is utilized, throughput can be increased, the time required to fabricate devices 1000 and 1600 can be reduced, uniformity can be improved, and reproducibility can be improved. Moreover, the use of DUV lithography can be more easily scaled to fabrication of multiple devices in manufacturing. DUV lithography also has a larger stitch area. For example, in some embodiments, single shot DUV lithography can be performed on a stitch area that is at least 10 millimeters by 10 millimeters. In some embodiments, the stitch area can be at least 15 millimeters by 15 millimeters. For example, the stitch area can be nominally 20 millimeters by 20 millimeters, or larger. Thus, the number of stitches (not shown) is reduced. This can not only increase throughput and reproducibility, but also reduce misalignment in optical devices, thus improving the fabrication and performance of LN-containing optical devices.
[0073] As mentioned above, the fabrication techniques and devices described herein apply to other nonlinear optical materials, such as ferroelectric nonlinear optical materials, including but not limited to LT. For example, LT, potassium niobate, gallium arsenide, potassium titanyl phosphate, lead titanyl zirconate, and / or barium titanate may be used in place of or in addition to LN. Thus, the performance and fabrication of optical devices including ferroelectric nonlinear optical materials may be improved.
[0074] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, the present invention is not limited to the details provided. There are many alternative ways to implement the present invention. The disclosed embodiments are illustrative and not restrictive.
Claims
1. A method for providing an apparatus, The apparatus includes an optical device, at least a portion of the optical device includes at least one ferroelectric nonlinear optical material, the at least portion of the optical device is fabricated using ultraviolet (UV) photolithography, and includes a sidewall of the ferroelectric nonlinear optical material, the sidewall having a short-range root mean square surface roughness of less than 10 nanometers. The side wall is fabricated using UV photolithography, the first etching, and the second etching. The aforementioned UV photolithography is used to form a mask for fabricating a hard mask from a hard mask layer. The first etching is for removing a portion of the hard mask layer to form the hard mask having a recess, The second etching is for removing a portion of the ferroelectric nonlinear optical material to form the side wall, The second etching method is selected from dry etching, reactive ion etching (RIE), plasma etching, and chemical etching. The second etching is a method different from the first etching, such that the sidewall has a short-range root mean square surface roughness of less than 10 nanometers.
2. A method according to claim 1, wherein the at least one ferroelectric nonlinear optical material comprises at least one of lithium niobate, lithium tantalate, potassium niobate, gallium arsenide, potassium titanium phosphate, lead titanium zirconate, and barium titanate.
3. A method according to claim 2, wherein the at least one ferroelectric nonlinear optical material is selected from lithium tantalate and lithium niobate.
4. A method according to claim 1, wherein the side wall has a height of at least 400 nanometers.
5. A method according to claim 1, wherein the side wall is included in at least one stitch region, and each of the at least one stitch region has an area of at least 10 mm × 10 mm.
6. A method according to claim 5, wherein the short-range root mean square surface roughness is 5 nanometers or less.
7. A method according to claim 1, wherein at least a portion of the optical device has a loss of 2 dB / cm or less.
8. A method according to claim 7, wherein the loss is less than 1.0 dB / cm.
9. A method according to claim 8, wherein the loss is less than 0.5 dB / cm.
10. A method according to claim 9, wherein the loss is 0.1 dB / cm or less.