Semiconductor device

Abstract

To provide a semiconductor device capable of improving characteristics thereof.SOLUTION: According to an embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor members, and a first insulating member. The first semiconductor member is disposed between the first and second electrodes and has a first conductivity type. The first semiconductor member includes first to third partial regions. A second direction from the first partial region to the second partial region intersects a first direction from the first electrode to the second electrode. A direction from the first partial region to the third partial region is along the first direction. The second semiconductor member has a second conductivity type. The second semiconductor member includes first and second semiconductor regions. The third semiconductor member has the first conductivity type. The second semiconductor region is disposed between the second partial region and the fourth semiconductor member in the first direction. The fourth semiconductor member has the first conductivity type, or does not contain impurities of the second conductivity type. The third partial region is disposed between the first partial region and the third electrode in the first direction.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] For example, in semiconductor devices, improvements in characteristics are desired. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-45865 A Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiment provides a semiconductor device capable of improving characteristics. [Means for solving the problem]

[0005] According to an embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member of a first conductivity type, a second semiconductor member of a second conductivity type, a third semiconductor member of the first conductivity type, a fourth semiconductor member, and a first insulating member. The first semiconductor member is provided between the first electrode and the second electrode, and includes a first partial region, a second partial region, and a third partial region. A second direction from the first partial region to the second partial region intersects with a first direction from the first electrode to the second electrode. A direction from the first partial region to the third partial region is along the first direction. The second semiconductor member includes a first semiconductor region and a second semiconductor region. The third semiconductor member is provided such that the first semiconductor region is located between the third partial region and the third semiconductor member in the second direction, and is electrically connected to the second electrode. The fourth semiconductor member is provided such that the second semiconductor region is located between the second partial region and the fourth semiconductor member in the first direction. The fourth semiconductor member is electrically connected to the second electrode and is of the first conductivity type or does not contain impurities of the second conductivity type. The third electrode is provided such that the third partial region is located between the third electrode and the first partial region in the first direction. The first insulating member includes a first insulating region provided between the third partial region and the third electrode. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Diagram 2] FIG. 2 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. [Diagram 3] FIG. 3 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor member 11, a second semiconductor member 12, a third semiconductor member 13, a fourth semiconductor member 14, and a first insulating member 41. The first semiconductor member 11, the second semiconductor member 12, the third semiconductor member 13, and the fourth semiconductor member 14 may be included in a semiconductor layer 11S.

[0009] A first direction D1 from the first electrode 51 to the second electrode 52 is defined as a Z-axis direction. A direction perpendicular to the Z-axis direction is defined as an X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as a Y-axis direction.

[0010] The first semiconductor member 11 is provided between the first electrode 51 and the second electrode 52. The first semiconductor member 11 is of a first conductivity type. The first semiconductor member 11 includes a first partial region 11a, a second partial region 11b, and a third partial region 11c. A second direction D2 from the first partial region 11a to the second partial region 11b intersects with the first direction D1 from the first electrode 51 to the second electrode 52. The second direction D2 may be, for example, the X-axis direction.

[0011] The direction from the first partial region 11a to the third partial region 11c is along the first direction D1.

[0012] The second semiconductor member 12 is of a second conductivity type. The first conductivity type is one of n-type and p-type. The second conductivity type is the other of n-type and p-type. In the following, the first conductivity type is n-type and the second conductivity type is p-type.

[0013] The second semiconductor member 12 includes a first semiconductor region 12a and a second semiconductor region 12b.

[0014] The third semiconductor member 13 is of the first conductivity type. The first semiconductor region 12a is located between the third partial region 11c and the third semiconductor member 13 in the second direction D2. The third semiconductor member 13 is electrically connected to the second electrode 52.

[0015] The second semiconductor region 12b is provided between the second partial region 11b and the fourth semiconductor member 14 in the first direction D1. The fourth semiconductor member 14 is electrically connected to the second electrode 52. The fourth semiconductor member 14 satisfies a first condition or a second condition. In the first condition, the fourth semiconductor member 14 is of the first conductivity type. In the second condition, the fourth semiconductor member 14 is substantially free of impurities of the second conductivity type. In the second condition, the fourth semiconductor member 14 may be, for example, an i (intrinsic) layer.

[0016] The third partial region 11c is provided between the first partial region 11a and the third electrode 53 in the first direction D1.

[0017] The first insulating member 41 includes a first insulating region 41a. The first insulating region 41a is provided between the third partial region 11c and at least a part of the third electrode 53.

[0018] In the semiconductor device 110, the current between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be a potential based on the potential of the second electrode 52. The first electrode 51 functions as, for example, a drain electrode. The second electrode 52 functions as, for example, a source electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor (for example, a MOS transistor). The first insulating region 41a is, for example, a gate insulating film.

[0019] In the embodiment, for example, the above-mentioned fourth semiconductor member 14 is provided. In a current path including the fourth semiconductor member 14, the resistance can be increased. For example, the transient characteristics during switching can be made gentle. For example, the voltage change with time (dV / dt) can be mitigated. This makes it possible to reduce, for example, switching noise. According to the embodiment, a semiconductor device capable of improving characteristics can be provided.

[0020] In one example where the fourth semiconductor member 14 is of the first conductivity type, the fourth impurity concentration of the first conductivity type in the fourth semiconductor member 14 may be higher than the first impurity concentration of the first conductivity type in the first semiconductor member 11. This can further reduce switching noise.

[0021] In the semiconductor device 110, the third impurity concentration of the first conductivity type in the third semiconductor member 13 is higher than the first impurity concentration of the first conductivity type in the first semiconductor member 11. The third semiconductor member 13 is in contact with, for example, the second electrode 52. The first semiconductor member 11 is, for example, an n-layer. The third semiconductor member 13 is, for example, an n-layer. + The first semiconductor member 11 is, for example, an n-drift layer.

[0022] As shown in FIG. 1, the semiconductor device 110 may further include a fifth semiconductor member 15. The fifth semiconductor member 15 is of a second conductivity type. At least a portion of the fifth semiconductor member 15 is provided between the second partial region 11b and the second electrode 52 in the first direction D1. A fifth impurity concentration of the second conductivity type in the fifth semiconductor member 15 is higher than a second impurity concentration of the second conductivity type in the second semiconductor member 12. The second semiconductor member 12 is, for example, a p-layer. The fifth semiconductor member 15 is, for example, a p + It is a layer.

[0023] 1, a portion of the first semiconductor region 12a may be provided between the third partial region 11c and the fifth semiconductor member 15 in the second direction D2. A portion of the fifth semiconductor member 15 may be provided between the first semiconductor region 12a and the fourth semiconductor member 14 in the second direction D2. A portion of the fifth semiconductor member 15 may be provided between a portion of the fourth semiconductor member 14 and another portion of the fourth semiconductor member 14 in the second direction D2.

[0024] 1, the semiconductor device 110 may further include a first conductive layer 31. The first conductive layer 31 includes a silicide. The first conductive layer 31 includes, for example, Ni and Si. The first conductive layer 31 is provided between the fourth semiconductor member 14 and the second electrode 52, and between the third semiconductor member 13 and the second electrode 52. By providing the first conductive layer 31, good ohmic contact is easily obtained. For example, the first conductive layer 31 contacts the second electrode 52.

[0025] In this example, at least a portion of the first conductive layer 31 is provided between a portion of the fifth semiconductor member 15 and another portion of the fifth semiconductor member 15 in the second direction D2.

[0026] As shown in FIG. 1, in the semiconductor device 110, the first semiconductor member 11 may further include a fourth partial region 11d and a fifth partial region 11e. The direction from the first partial region 11a to the fourth partial region 11d intersects with the first direction D1. For example, the direction from the first partial region 11a to the fourth partial region 11d may be along the second direction D2. The direction from the first partial region 11a to the fourth partial region 11d may be any direction intersecting with the first direction D1. The direction from the fourth partial region 11d to the fifth partial region 11e is along the first direction D1.

[0027] The fifth partial region 11e is in Schottky contact with the second electrode 52. A portion including the fifth partial region 11e and the second electrode 52 functions as, for example, a Schottky barrier diode (SBD). By providing the SBD, for example, it is possible to improve the withstand capability of the semiconductor device 110 when a "reverse voltage" is applied. When a "reverse voltage" is applied, the potential of the second electrode 52 is higher than the potential of the first electrode 51.

[0028] 1, the second electrode 52 may include a first electrode portion 52a and a second electrode portion 52b. The second electrode portion 52b is provided between the fifth sub-region 11e and the first electrode portion 52a. The second electrode portion 52b includes at least one selected from the group consisting of Ni, Ti, V, and Mo, for example. By providing the second electrode portion 52b, a Schottky barrier can be stably obtained.

[0029] For example, an SBD is combined with the fourth semiconductor member 14. This allows the hole injection start current to be increased in the static characteristic mode when a reverse voltage is applied, for example. On the other hand, in the I surge mode, the diode formed between the fourth semiconductor member 14 and the second semiconductor member 12 is likely to break down. This makes it easy to increase the flowing current. For example, a large I FSM (Peak 1 cycle surge current) can be easily obtained. Stable characteristics can be easily obtained. According to the embodiment, a semiconductor device capable of improving characteristics can be provided.

[0030] 1, the semiconductor device 110 may further include a sixth semiconductor member 16 of the first conductivity type. The sixth semiconductor member 16 is provided between the first electrode 51 and the first semiconductor member 11. A sixth impurity concentration of the first conductivity type in the sixth semiconductor member 16 is higher than a first impurity concentration of the first conductivity type in the first semiconductor member 11. The sixth semiconductor member 16 may be, for example, n + It is a layer.

[0031] 1, the first insulating member 41 may further include a second insulating region 41b. At least a portion of the second insulating region 41b is provided between the third electrode 53 and the second electrode 52.

[0032] FIG. 2 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. 2 is a schematic plan view of a portion of the semiconductor device 110 including the fourth semiconductor member 14. As shown in FIG. 2, in the semiconductor device 110, the third electrode 53 extends along a third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The third direction D3 may be, for example, the Y-axis direction. In this example, the fourth semiconductor member 14 extends along the third direction D3.

[0033] FIG. 3 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. 3 illustrates a portion of a semiconductor device 111 according to the embodiment. The configuration of the fourth semiconductor member 14 in the semiconductor device 111 is different from the configuration of the fourth semiconductor member 14 in the semiconductor device 110. The remaining configuration of the semiconductor device 111 may be similar to the configuration of the semiconductor device 110.

[0034] 3, in the semiconductor device 111, the third electrode 53 also extends along the third direction D3. As already described, the third direction D3 intersects with a plane including the first direction D1 and the second direction D2. In the semiconductor device 111, a plurality of fourth semiconductor members 14 are provided. The direction from one of the plurality of fourth semiconductor members 14 to another of the plurality of fourth semiconductor members 14 is along the third direction D3. A part of the fifth semiconductor member 15 may be provided between one of the plurality of fourth semiconductor members 14 and another of the plurality of fourth semiconductor members 14.

[0035] FIG. 4 is a schematic plan view illustrating a portion of the semiconductor device according to the first embodiment. 4 illustrates a portion of a semiconductor device 112 according to the embodiment. The configuration of the fourth semiconductor member 14 in the semiconductor device 112 is different from the configuration of the fourth semiconductor member 14 in the semiconductor device 110. The remaining configuration of the semiconductor device 112 may be similar to the configuration of the semiconductor device 110.

[0036] 4, in the semiconductor device 112, the third electrode 53 also extends along a third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. A plurality of fourth semiconductor members 14 are provided. The direction from one of the plurality of fourth semiconductor members 14 to another of the plurality of fourth semiconductor members 14 is along the second direction D2. A part of a fifth semiconductor member 15 may be provided between one of the plurality of fourth semiconductor members 14 and another of the plurality of fourth semiconductor members 14.

[0037] 4, in the semiconductor device 112, the multiple fourth semiconductor members 14 may be aligned along the second direction D2 and the third direction D3. A part of the fifth semiconductor member 15 is provided between the multiple fourth semiconductor members 14.

[0038] In the semiconductor devices 110 to 112, the characteristics can be controlled by the arrangement and area ratio of the fourth semiconductor member 14, and the like.

[0039] In one example according to the first embodiment, the concentration of the first conductivity type impurity in the first semiconductor member 11 is, for example, 1×1014 cm -3 More than 1×10 17 cm -3 In one example according to the first embodiment, the concentration of the second conductivity type impurity in the second semiconductor member 12 is, for example, 1×10 16 cm -3 More than 1×10 20 cm -3 In one example according to the first embodiment, the concentration of the second conductivity type impurity in the third semiconductor member 13 is, for example, 1×10 19 cm -3 More than 1×10 21 cm -3 The following is the result.

[0040] In one example of the first condition, the concentration of the first conductivity type impurity in the fourth semiconductor member 14 is, for example, 1×10 16 cm -3 More than 1×10 21 cm -3 In one example of the second condition, the concentration of the second conductivity type impurity in the fourth semiconductor member 14 is 1×10 15 cm -3 The following is the result.

[0041] In one example according to the first embodiment, the concentration of the second conductivity type impurity in the fifth semiconductor member 15 is, for example, 1×10 16 cm -3 More than 1×10 21 cm -3 In one example according to the first embodiment, the concentration of the first conductivity type impurity in the sixth semiconductor member 16 is, for example, 1×10 15 cm -3 More than 1×10 19 cm -3 The above impurity concentration may be, for example, a substantial carrier concentration.

[0042] Second embodiment FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. 5, the semiconductor device 120 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor member 11, a second semiconductor member 12, a third semiconductor member 13, a fourth semiconductor member 14, a fifth semiconductor member 15, and a first insulating member 41. In the semiconductor device 120, the fourth semiconductor member 14 is of the second conductivity type. Except for this, the configuration of the semiconductor device 120 may be similar to the configuration of the semiconductor devices 110 to 112.

[0043] In the semiconductor device 120, the fourth semiconductor member 14 is of the second conductivity type. The second semiconductor region 12b is provided between the second partial region 11b and the fourth semiconductor member 14 in the first direction D1. The fourth semiconductor member 14 is electrically connected to the second electrode 52.

[0044] The fifth semiconductor member 15 is of the second conductivity type. At least a portion of the fifth semiconductor member 15 is provided between the second partial region 11b and the second electrode 52 in the first direction D1. A fifth impurity concentration of the second conductivity type in the fifth semiconductor member 15 is higher than a second impurity concentration of the second conductivity type in the second semiconductor member 12. The fifth impurity concentration is higher than a fourth impurity concentration of the second conductivity type in the fourth semiconductor member 14.

[0045] The third partial region 11c is provided between the first partial region 11a and the third electrode 53 in the first direction D1. The first insulating region 41a of the first insulating member 41 is provided between the third partial region 11c and at least a part of the third electrode 53.

[0046] In the semiconductor device 120, the resistance can be increased in a current path including the fourth semiconductor member 14. For example, the transient characteristics during switching can be made gentler. For example, the voltage change with time (dV / dt) can be mitigated. This makes it possible to reduce, for example, switching noise. According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0047] In the semiconductor device 120, the first semiconductor member 11 may further include a fourth partial region 11d and a fifth partial region 11e. The fifth partial region 11e is in Schottky contact with the second electrode 52. The portion including the fifth partial region 11e and the second electrode 52 functions as, for example, a Schottky barrier diode (SBD). By providing the SBD, for example, it is possible to improve the withstand voltage when a reverse voltage is applied. For example, the SBD is combined with the above-mentioned fourth semiconductor member 14. As a result, for example, when a reverse voltage is applied, it is possible to increase the injection start current of holes in the static characteristic mode. On the other hand, in the I surge mode, the diode formed between the fourth semiconductor member 14 and the second semiconductor member 12 is likely to break down. This makes it easy to increase the flowing current. For example, when a large I FSM (Peak 1 cycle surge current) is easily obtained. Stable characteristics can be easily obtained. According to the embodiment, a semiconductor device capable of improving characteristics can be provided.

[0048] In one example according to the second embodiment, the concentration of the second conductivity type impurity in the fourth semiconductor member 14 is, for example, 1×10 16 cm -3 More than 1×10 21 cm -3 The following is an example of the configurations of the semiconductor devices 110 to 112 that may be applied to the semiconductor device 120 within the scope of technical feasibility.

[0049] Third embodiment FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the third embodiment. As shown in FIG. 6, the semiconductor device 130 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor member 11, a second semiconductor member 12, a third semiconductor member 13, a fourth semiconductor member 14, a fifth semiconductor member 15, and a first insulating member 41. In the semiconductor device 130, the fourth semiconductor member 14 may have the configuration described in relation to the first or second embodiment. In the semiconductor device 130, the first semiconductor member 11 includes a sixth partial region 11f. The sixth partial region 11f is between the first partial region 11a and the third partial region 11c in the first direction D1. The direction from the third partial region 11c to the second semiconductor region 12b is along the second direction D2. The configuration of the semiconductor device 130 other than this may be the same as the configuration of the semiconductor devices 110 to 112 or the semiconductor device 120.

[0050] In the semiconductor device 130, the sixth partial region 11f is, for example, an n-pillar (or an n-drift layer). The second semiconductor region 12b is, for example, a p-type pillar. A plurality of structures including the sixth partial region 11f and the second semiconductor region 12b may be provided. For example, the total amount of carriers in the n-drift layer is substantially the same as the total amount of carriers in the p-type pillar. The semiconductor device 130 has, for example, a superjunction structure. For example, even when the impurity concentration in the n-drift layer is increased to reduce the on-resistance, a high breakdown voltage can be maintained.

[0051] In the semiconductor device 130, the capacitance is likely to change abruptly. In the semiconductor device 130, the total gate charge (Qg) changes significantly. In such a configuration, when it is made into a multi-chip, switching noise is likely to increase. In the semiconductor device 130, the fourth semiconductor member 14 can reduce the voltage change with time (dV / dt). This can reduce the switching noise.

[0052] In the first, second and third embodiments, for example, the gate electrode (third electrode 53) may be provided in a trench provided in the n drift layer (first semiconductor member 11) via a gate insulating film (first insulating region 41a). For example, the embodiments may be applied to a so-called trench gate electrode structure.

[0053] In the first, second and third embodiments, for example, the first semiconductor member 11, the second semiconductor member 12, the third semiconductor member 13 and the fourth semiconductor member 14 contain SiC. The first semiconductor member 11, the second semiconductor member 12, the third semiconductor member 13 and the fourth semiconductor member 14 may contain at least one selected from the group consisting of 4H-SiC, 6H-SiC and 3C-SiC. These semiconductor regions contain crystals. These semiconductor members may contain silicon. These semiconductor members may contain a compound semiconductor containing Ga.

[0054] For example, the impurities of the first conductivity type include at least one selected from the group consisting of N, P, and As. For example, the impurities of the second conductivity type include at least one selected from the group consisting of B, Al, and Ga.

[0055] In an embodiment, information regarding the length and thickness is obtained by observation using an electron microscope, etc. Information regarding the composition of the material is obtained by secondary ion mass spectrometry (SIMS) or energy dispersive X-ray spectroscopy (EDX), etc.

[0056] The embodiments may include the following technical solutions. (Technical proposal 1) A first electrode; A second electrode; a first semiconductor member of a first conductivity type provided between the first electrode and the second electrode, the first semiconductor member including a first partial region, a second partial region, and a third partial region, a second direction from the first partial region to the second partial region intersecting a first direction from the first electrode to the second electrode, and a direction from the first partial region to the third partial region being along the first direction; a second semiconductor member of a second conductivity type, the second semiconductor member including a first semiconductor region and a second semiconductor region; a third semiconductor member of the first conductivity type, the first semiconductor region being between the third partial region and the third semiconductor member in the second direction, the third semiconductor member being electrically connected to the second electrode; A fourth semiconductor member, the second semiconductor region being provided between the second partial region and the fourth semiconductor member in the first direction, the fourth semiconductor member being electrically connected to the second electrode, the fourth semiconductor member being of the first conductivity type, or the fourth semiconductor member not containing impurities of the second conductivity type; a third electrode, the third partial region being provided between the first partial region and the third electrode in the first direction; A semiconductor device comprising: a first insulating member including a first insulating region, the first insulating region being provided between the third partial region and at least a portion of the third electrode.

[0057] (Technical proposal 2) The semiconductor device described in Technical Proposal 1, wherein a fourth impurity concentration of the first conductivity type in the fourth semiconductor member is higher than a first impurity concentration of the first conductivity type in the first semiconductor member.

[0058] (Technical proposal 3) Further comprising a fifth semiconductor member of the second conductivity type; At least a portion of the fifth semiconductor member is provided between the second partial region and the second electrode in the first direction, The semiconductor device according to Technical Proposal 1 or 2, wherein a fifth impurity concentration of the second conductivity type in the fifth semiconductor member is higher than a second impurity concentration of the second conductivity type in the second semiconductor member.

[0059] (Technical proposal 4) A first electrode; A second electrode; a first semiconductor member of a first conductivity type provided between the first electrode and the second electrode, the first semiconductor member including a first partial region, a second partial region, and a third partial region, a second direction from the first partial region to the second partial region intersecting a first direction from the first electrode to the second electrode, and a direction from the first partial region to the third partial region being along the first direction; a second semiconductor member of a second conductivity type, the second semiconductor member including a first semiconductor region and a second semiconductor region; a third semiconductor member of the first conductivity type, the first semiconductor region being between the third partial region and the third semiconductor member in the second direction, the third semiconductor member being electrically connected to the second electrode; a fourth semiconductor member of the second conductivity type, the second semiconductor region being provided between the second partial region and the fourth semiconductor member in the first direction, the fourth semiconductor member being electrically connected to the second electrode; a fifth semiconductor member of the second conductivity type, at least a portion of the fifth semiconductor member being provided between the second partial region and the second electrode in the first direction, and a fifth impurity concentration of the second conductivity type in the fifth semiconductor member being higher than a second impurity concentration of the second conductivity type in the second semiconductor member and higher than a fourth impurity concentration of the second conductivity type in the fourth semiconductor member; a third electrode, the third partial region being provided between the first partial region and the third electrode in the first direction; A semiconductor device comprising: a first insulating member including a first insulating region, the first insulating region being provided between the third partial region and at least a portion of the third electrode.

[0060] (Technical proposal 5) A semiconductor device described in Technical Proposal 3 or 4, wherein a portion of the first semiconductor region is provided between the third partial region and the fifth semiconductor member in the second direction.

[0061] (Technical proposal 6) The semiconductor device according to any one of Technical Solutions 3 to 5, wherein a portion of the fifth semiconductor member is provided between the first semiconductor region and the fourth semiconductor member in the second direction.

[0062] (Technical proposal 7) a first conductive layer including a silicide; The first conductive layer is provided between the fourth semiconductor member and the second electrode, and between the third semiconductor member and the second electrode, A semiconductor device described in any one of Technical Solutions 3 to 6, wherein at least a portion of the first conductive layer is provided between a portion of the fifth semiconductor member and another portion of the fifth semiconductor member in the second direction.

[0063] (Technical proposal 8) a first conductive layer including a silicide; The semiconductor device described in any one of Technical Proposals 1 to 6, wherein the first conductive layer is provided between the fourth semiconductor member and the second electrode, and between the third semiconductor member and the second electrode.

[0064] (Technical proposal 9) The semiconductor device according to Technical Proposal 7 or 8, wherein the first conductive layer contains Ni and Si.

[0065] (Technical proposal 10) The semiconductor device according to any one of Technical Solutions 7 to 9, wherein the first conductive layer is in contact with the second electrode.

[0066] (Technical proposal 11) The semiconductor device according to Technical Proposal 1 or 4, wherein a third impurity concentration of the first conductivity type in the third semiconductor member is higher than a first impurity concentration of the first conductivity type in the first semiconductor member.

[0067] (Technical proposal 12) The first semiconductor member further includes a fourth partial region and a fifth partial region, a direction from the first partial region to the fourth partial region intersects with the first direction, a direction from the fourth partial region to the fifth partial region is along the first direction, The semiconductor device according to any one of Technical Solutions 1 to 11, wherein the fifth partial region is in Schottky contact with the second electrode.

[0068] (Technical proposal 13) the second electrode includes a first electrode portion and a second electrode portion; the second electrode portion is provided between the fifth region and the first electrode portion, The semiconductor device according to Technical Proposal 12, wherein the second electrode portion includes at least one selected from the group consisting of Ni, Ti, V, and Mo.

[0069] (Technical proposal 14) The semiconductor device according to Technical Proposal 12 or 13, wherein the direction from the first partial region to the fourth partial region is along the second direction.

[0070] (Technical proposal 15) The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, The semiconductor device according to any one of Technical Solutions 1 to 14, wherein the fourth semiconductor member extends along the third direction.

[0071] (Technical proposal 16) The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, A plurality of the fourth semiconductor members are provided, a direction from one of the plurality of fourth semiconductor members to another of the plurality of fourth semiconductor members is along the third direction; The semiconductor device described in any one of Technical Proposals 3 to 7, wherein a portion of the fifth semiconductor member is provided between the one of the plurality of fourth semiconductor members and the other one of the plurality of fourth semiconductor members.

[0072] (Technical proposal 17) The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, A plurality of the fourth semiconductor members are provided, a direction from one of the plurality of fourth semiconductor members to another of the plurality of fourth semiconductor members is along the second direction; A part of the fifth semiconductor member is provided between the one of the plurality of fourth semiconductor members and the other one of the plurality of fourth semiconductor members. The semiconductor device according to any one of Technical Schemes 3 to 7.

[0073] (Technical proposal 18) A plurality of the fourth semiconductor members are provided, The plurality of fourth semiconductor members are arranged along the second direction and the third direction, the third direction intersects with a plane including the first direction and the second direction, The semiconductor device according to any one of Technical Schemes 3 to 7, wherein a portion of the fifth semiconductor member is provided between the plurality of fourth semiconductor members.

[0074] (Technical proposal 19) The first insulating member further includes a second insulating region, The semiconductor device according to any one of Technical Solutions 1 to 18, wherein at least a portion of the second insulating region is between the third electrode and the second electrode.

[0075] (Technical proposal 20) The semiconductor device according to any one of Technical Proposals 1 to 19, wherein the first semiconductor member, the second semiconductor member, the third semiconductor member, and the fourth semiconductor member contain SiC.

[0076] According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0077] The above describes the embodiments of the present invention with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of each element, such as electrodes, semiconductor members, and insulating members, included in the semiconductor device are included in the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from the known range.

[0078] Furthermore, any combination of two or more elements of each of the specific examples, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0079] In addition, all semiconductor devices that can be implemented by those skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also belong to the scope of the present invention as long as they include the gist of the present invention.

[0080] In addition, within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0081] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0082] 11-16: first to sixth semiconductor members, 11S: semiconductor layer, 11a-11f: first to sixth partial regions, 12a, 12b: first and second semiconductor regions, 31: first conductive layer, 41: first insulating member, 41a, 41b: first and second insulating regions, 51-53: first to third electrodes, 52a, 52b: first and second electrode portions, 110-112, 120, 130: semiconductor device, D1-D3: first to third directions

Claims

1. A first electrode; A second electrode; provided between the first electrode and the second electrode, a first partial region, a second partial region and a third partial region; A first semiconductor member of a first conductivity type, in which a second direction from the first partial region to the second partial region intersects with a first direction from the first electrode to the second electrode, and a direction from the first partial region to the third partial region is along the first direction; a second semiconductor member of a second conductivity type including a first semiconductor region and a second semiconductor region; A third semiconductor member of the first conductivity type, the third semiconductor member being provided such that the first semiconductor region is located between the third partial region and the third semiconductor member in the second direction, and being electrically connected to the second electrode; A fourth semiconductor member that is provided so that the second semiconductor region is located between the second partial region in the first direction, is electrically connected to the second electrode, and is of the first conductivity type or does not contain impurities of the second conductivity type; a third electrode provided such that the third partial region is located between the first partial region and the third electrode in the first direction; a first insulating member including a first insulating region provided between the third partial region and the third electrode; A semiconductor device having the above structure.

2. Further comprising a fifth semiconductor member of the second conductivity type; At least a portion of the fifth semiconductor member is provided between the second partial region and the second electrode in the first direction, 2. The semiconductor device according to claim 1, wherein a fifth impurity concentration of the second conductivity type in the fifth semiconductor member is higher than a second impurity concentration of the second conductivity type in the second semiconductor member.

3. A first electrode; A second electrode; provided between the first electrode and the second electrode, a first partial region, a second partial region and a third partial region; A first semiconductor member of a first conductivity type, in which a second direction from the first partial region to the second partial region intersects with a first direction from the first electrode to the second electrode, and a direction from the first partial region to the third partial region is along the first direction; a second semiconductor member of a second conductivity type including a first semiconductor region and a second semiconductor region; A third semiconductor member of the first conductivity type, the third semiconductor member being provided such that the first semiconductor region is located between the third partial region and the third semiconductor member in the second direction, and being electrically connected to the second electrode; a fourth semiconductor member of the second conductivity type, the fourth semiconductor member being provided such that the second semiconductor region is located between the second partial region and the second electrode in the first direction, and electrically connected to the second electrode; A fifth semiconductor member of the second conductivity type, at least a portion of the fifth semiconductor member being provided between the second partial region and the second electrode in the first direction, and a fifth impurity concentration of the second conductivity type in the fifth semiconductor member being higher than a second impurity concentration of the second conductivity type in the second semiconductor member and higher than a fourth impurity concentration of the second conductivity type in the fourth semiconductor member; a third electrode provided such that the third partial region is located between the first partial region and the third electrode in the first direction; a first insulating member including a first insulating region provided between the third partial region and the third electrode; A semiconductor device having the above structure.

4. a first conductive layer including a silicide; The first conductive layer is provided between the fourth semiconductor member and the second electrode, and between the third semiconductor member and the second electrode, The semiconductor device according to claim 2 , wherein at least a portion of the first conductive layer is provided between a portion of the fifth semiconductor member and another portion of the fifth semiconductor member in the second direction.

5. The first semiconductor member further includes a fourth partial region and a fifth partial region, a direction from the first partial region to the fourth partial region intersects with the first direction, a direction from the fourth partial region to the fifth partial region is along the first direction; The semiconductor device according to claim 1 , wherein the fifth partial region is in Schottky contact with the second electrode.

6. The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, The semiconductor device according to claim 1 , wherein the fourth semiconductor member extends along the third direction.

7. The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, A plurality of the fourth semiconductor members are provided, a direction from one of the plurality of fourth semiconductor members to another of the plurality of fourth semiconductor members along the third direction; The semiconductor device according to any one of claims 2 to 4, wherein a portion of the fifth semiconductor member is provided between the one of the plurality of fourth semiconductor members and the other one of the plurality of fourth semiconductor members.

8. The third electrode extends along a third direction, the third direction intersects with a plane including the first direction and the second direction, A plurality of the fourth semiconductor members are provided; a direction from one of the plurality of fourth semiconductor members to another of the plurality of fourth semiconductor members along the second direction; A part of the fifth semiconductor member is provided between the one of the plurality of fourth semiconductor members and the other one of the plurality of fourth semiconductor members. The semiconductor device according to any one of claims 2 to 4.

9. A plurality of the fourth semiconductor members are provided, The plurality of fourth semiconductor members are arranged along the second direction and the third direction, the third direction intersects with a plane including the first direction and the second direction, The semiconductor device according to any one of claims 2 to 4, wherein a portion of the fifth semiconductor member is provided between the plurality of fourth semiconductor members.

10. The semiconductor device according to claim 1 , wherein the first semiconductor member, the second semiconductor member, the third semiconductor member, and the fourth semiconductor member contain SiC.

Images