Semiconductor device

Abstract

To provide highly reliable semiconductor devices suitable for miniaturization and high density.SOLUTION: A first transistor is on a semiconductor substrate, a second transistor with an oxide semiconductor is above the first transistor, and a capacitive element is on the second transistor, and the capacitive element has a first conductor, a second conductor, and an insulator, and the second conductor covers the side surface of the first conductor through the insulator.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device having a capacitor.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one aspect relates to an article, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition. Therefore, the present invention more specifically disclosed herein The technical field of one embodiment of the present invention is a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, devices, power storage devices, storage devices, imaging devices, driving methods thereof, or manufacturing methods thereof, etc. can be cited as an example.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices, etc. , and may include a semiconductor device. [Background technology]

[0004] The technology of constructing transistors using semiconductor materials is attracting attention. Integrated circuits (ICs) and image display devices (simply referred to as display devices) It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor materials, but other materials include oxide semiconductors. Semiconductors are attracting attention.

[0005] For example, zinc oxide or In-Ga-Zn oxide semiconductors are used as oxide semiconductors. Techniques for fabricating transistors have been disclosed (see Patent Documents 1 and 2).

[0006] In recent years, miniaturized transformers have become increasingly popular as electronic devices become more compact and lightweight. There is an increasing demand for integrated circuits that integrate semiconductor elements such as transistors at high density. ri-Gate transistor and COB (capacitor over bitline An MIM capacitance element having a MOSFET structure has been introduced (Non-Patent Document 1). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A [Non-patent literature]

[0008] [Non-Patent Document 1] R.Brain et al.,”A 22nm High Performance Embedded DRAM SoC Technology Featuring Tri-gate Transistors and MIMCAP COB”,2013 SYMPOSIUM ON VLSI TECHNOLOGY 2-1 Summary of the Invention [Problem to be solved by the invention]

[0009] An object of one embodiment of the present invention is to provide a semiconductor device suitable for miniaturization and high density. do.

[0010] Another object is to provide a semiconductor device with good electrical characteristics. Another object of the present invention is to provide a semiconductor device having a novel structure. Another object of the present invention is to provide a novel semiconductor device. do.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for the embodiment to solve all of these problems. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0012] One embodiment of the present invention includes a first transistor on a semiconductor substrate, a second transistor including an oxide semiconductor on the first side; The capacitor includes a first conductor, a second conductor, and an insulator. The second conductor covers the side surface of the first conductor via an insulator.

[0013] One embodiment of the present invention includes a first transistor on a semiconductor substrate, a second transistor including an oxide semiconductor on the first side; The interlayer film is provided with a capacitance element on the interlayer film, and the capacitance element includes a first conductor, a second conductor, and an insulator, and an upper surface of the second conductor in a region where the interlayer film and the insulator overlap each other. is below the bottom surface of the first conductor in the region where the interlayer film and the first conductor overlap. It is.

[0014] In the above-mentioned structure, the insulator is a laminate of a material with high dielectric strength and a high-k material. It has been done.

[0015] In the above configuration, a first transistor is provided between the first transistor and the second transistor. The insulating film has an interlayer film having a barrier property and wiring having a barrier property.

[0016] In the above structure, a second barrier layer is provided between the capacitor and the second transistor. The interlayer film has the following structure:

[0017] In the above structure, the interlayer film near the second transistor contains excess oxygen. .

[0018] In addition, in the above configuration, the display device, the microphone, the speaker, the operation keys, the touch panel The electronic device has a panel or an antenna. Effect of the Invention

[0019] According to one aspect of the present invention, a semiconductor device suitable for miniaturization and high density can be provided. In addition, in a semiconductor device, it is possible to suppress the deterioration of electrical characteristics that accompanies miniaturization.

[0020] Alternatively, it is possible to impart good electrical characteristics to the semiconductor device. Alternatively, a semiconductor device having a novel configuration can be provided. Alternatively, a novel semiconductor device or the like can be provided. The above does not necessarily preclude the existence of other effects. It is not necessary for the invention to have all of these effects. Effects other than these may be included in the specification, drawings, claims, etc. It is obvious from the description in the specification, drawings, claims, etc. However, it is possible to extract effects other than these. [Brief description of the drawings]

[0021] [Figure 1] 2A and 2B are diagrams illustrating a top view and a cross-sectional structure of a capacitor according to an embodiment. [Diagram 2] 2A and 2B are diagrams illustrating a top view and a cross-sectional structure of a capacitor according to an embodiment. [Diagram 3] 2A and 2B are diagrams illustrating a top view and a cross-sectional structure of a capacitor according to an embodiment. [Figure 4] 2A and 2B are diagrams illustrating a top view and a cross-sectional structure of a capacitor according to an embodiment. [Diagram 5] 1A and 1B are diagrams illustrating a top surface of a capacitor according to an embodiment. [Figure 6] 1A to 1C are a configuration example and a circuit diagram of a semiconductor device according to an embodiment; [Figure 7] 1 shows a configuration example of a semiconductor device according to an embodiment. [Figure 8] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 9] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 10] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 11] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 12] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 13] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 14] 1A to 1C illustrate an example of a manufacturing method of a semiconductor device according to an embodiment. [Figure 15] FIG. 2 is a diagram for explaining the range of the atomic ratio of an oxide semiconductor according to the present invention. [Figure 16] A diagram explaining the InMZnO4 crystal. [Figure 17] FIG. 1 is a band diagram of a stacked structure of oxide semiconductors. [Figure 18] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 19] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 20] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 21] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 22] 1A and 1B are diagrams illustrating structural analyses of a CAAC-OS and a single crystal oxide semiconductor by XRD, and diagrams showing selected-area electron diffraction patterns of a CAAC-OS. [Figure 23] Cross-sectional TEM image and planar TEM image of CAAC-OS, and their image analysis images. [Figure 24] Electron diffraction pattern of nc-OS and cross-sectional TEM image of nc-OS. [Diagram 25] Cross-sectional TEM image of a-like OS. [Figure 26] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Figure 27] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a memory device according to one embodiment of the present invention. [Figure 28] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 30] 1A to 1C are a circuit diagram, a top view, and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Diagram 31] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Diagram 32] FIG. 1 is a perspective view illustrating an electronic device according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, an embodiment will be described with reference to the drawings. However, the embodiment may be different from the embodiment. The present invention can be implemented in any manner without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0023] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic representations, and are not limited to the shapes or values ​​shown in the drawings. In the drawings, the same reference numerals are used to denote the same parts or parts having similar functions. In addition, when referring to similar functions, the hatch pattern is used. Similarly, there are cases where no particular reference numeral is given.

[0024] In addition, in this specification and the like, ordinal numbers such as 1st, 2nd, etc. are used for convenience. Therefore, for example, "first" should be changed to "second " or "third" can be used as appropriate. The ordinal numbers used to identify an aspect of the present invention may not match those used in the present invention. There is a match.

[0025] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used. The relationship is used for convenience in describing the drawings. The dimensions change depending on the direction in which each component is depicted. It is not limited to words and phrases, and can be rephrased appropriately depending on the situation.

[0026] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The semiconductor device may include a semiconductor device.

[0027] In this specification, a transistor includes a gate, a drain, and a source. It is an element that has at least three terminals. And the drain (drain terminal, drain Between the source (source terminal, source region or source electrode) and the The semiconductor device has a channel region and allows a current to flow through the drain, the channel region, and the source. In this specification and the like, the channel region is a region through which a current mainly flows. This refers to the area in which

[0028] In addition, the source and drain functions may differ depending on whether transistors with different polarities are used or the circuit operation. In some cases, such as when the direction of the current changes during operation, the positions may be reversed. In the text, the terms source and drain may be used interchangeably. .

[0029] In this specification and the like, a silicon oxynitride film is a film having a composition containing more oxygen than nitrogen. The content of oxygen is preferably 55 atomic % or more and 65 atomic % or less, and nitrogen is preferably 100 atomic % or more. 1 atomic % to 20 atomic %, silicon is 25 atomic % to 35 atomic %, hydrogen is 0.1 The concentration range is from 1 atomic % to 10 atomic %. The composition of the material is one in which the nitrogen content is greater than the oxygen content, and preferably the nitrogen content is 55 atomic % to 65 atomic %, oxygen is 1 atomic % to 20 atomic %, silicon is 25 atomic % % or more and 35 atomic % or less, and hydrogen is contained in the concentration range of 0.1 atomic % or more and 10 atomic % or less. To say something.

[0030] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." In some cases, it may be possible to change the term to

[0031] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0032] For example, in the present specification, when it is explicitly stated that X and Y are connected, In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected is also considered to be disclosed in the present specification. Therefore, the present invention is not limited to a specific connection relationship, for example, a connection relationship shown in a drawing or a sentence. Any connections other than those shown in the drawings or text shall be deemed to be included in the drawings or text. do.

[0033] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.). , etc.).

[0034] An example of a direct connection between X and Y is a circuit that allows electrical connection between X and Y. The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, When a device (such as an electrode, display element, light-emitting element, or load element) is not connected between X and Y and an element (e.g., a switch, transistor, Capacitor elements, inductors, resistor elements, diodes, display elements, light-emitting elements, load elements, etc.) This is the case where X and Y are connected without an intervening

[0035] An example of a case where X and Y are electrically connected is The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, One or more elements (such as an electrode, a display element, a light-emitting element, or a load element) are connected between X and Y. The switch has a function of being controlled to be turned on and off. A switch can be in a conducting (on) or non-conducting (off) state, allowing current to flow. The switch has the function of controlling whether or not current flows. When X and Y are electrically connected, This includes the case where X and Y are directly connected.

[0036] An example of a case where X and Y are functionally connected is a case where a functional connection between X and Y is possible. Circuits that perform the above functions (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( power supply circuits (voltage boost circuits, voltage drop circuits, etc.), level shifter circuits that change the potential level of signals, etc.) , voltage sources, current sources, switching circuits, amplifier circuits (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more devices (such as a memory circuit, a control circuit, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X If X is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there are cases where X and Y are directly connected and cases where X and Y are functionally connected. and the case where they are electrically connected to each other.

[0037] In addition, if it is explicitly stated that X and Y are electrically connected, are electrically connected (i.e., there is another element or circuit between X and Y) When X and Y are functionally connected (i.e., when X and Y are connected), (When there is a functional connection between X and Y via another circuit in between) and when X and Y are directly connected (i.e., when X and Y are connected without any other element or circuit between them) is deemed to be disclosed in the present specification. If it is explicitly stated that it is connected, The same contents are deemed to be disclosed in the present specification and the like.

[0038] For example, the source (or the first terminal, etc.) of the transistor is connected via Z1 (or The drain (or second terminal, etc.) of the transistor is electrically connected to Z 2 (or not), it may be electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. and another part of Z2 is directly connected to Y, It is possible to do so.

[0039] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor The terminals of the transistor (or the first terminal, etc.) are electrically connected to each other, and X, the source of the transistor (or the first terminal, etc.) 1 terminal, etc.), the drain (or second terminal, etc.) of the transistor, and Y. "The source (or the third) of the transistor is connected to the The drain (or second terminal, etc.) of the transistor is electrically connected to X. The transistor source (or first terminal, etc.) is electrically connected to Y, and the transistor source (or first terminal, etc.) is electrically connected to X. The drain (or second terminal, etc.) of the transistor, Y, is electrically connected in this order. " Alternatively, "X is the source (or first terminal, etc.) of a transistor. The transistor is electrically connected to Y via a drain (or a second terminal, etc.) and a transistor is electrically connected to X via a drain (or a second terminal, etc.). The source (or first terminal, etc.) of a resistor, the drain (or second terminal, etc.) of a transistor, ), Y is provided in this connection order. By using a simple expression method and specifying the order of connections in the circuit configuration, Distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined based on the above.

[0040] Or, as another way of expressing it, for example, "the source (or first terminal, etc.) of a transistor is electrically connected to X through at least a first connection path, and the first connection path is , the second connection path does not have a second connection path, and the second connection path is a transistor The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The first connection path is a path via Z1, and the second connection path is a path between the transistor The drain (or second terminal, etc.) of the capacitor is electrically connected to Y through at least a third connection path. The third connection path does not include the second connection path, and the third connection path The connection path is the path through Z2. The source (or the first terminal, etc.) of the resistor is connected to the resistor via Z1 by at least the first connection path. and X is electrically connected to the first connection path, and the first connection path does not have a second connection path; The second connection path includes a connection path through a transistor, and the second connection path includes a drain of the transistor. (or the second terminal, etc.) is connected to Y via Z2 by at least a third connection path. The third connection path does not have the second connection path. Alternatively, the source (or the first terminal, etc.) of the transistor may be at least The first electrical path is electrically connected to X through Z1, and the first electrical path is The primary path does not have a second electrical path, and the second electrical path is a From the source (or first terminal, etc.) to the drain (or second terminal, etc.) of the transistor The drain (or second terminal, etc.) of the transistor is connected to at least a third The third electrical path is electrically connected to Y through Z2. , the fourth electrical path is not included, and the fourth electrical path is a drain of the transistor (or second terminal, etc.) to the source (or first terminal, etc.) of the transistor. Using the same expression as these examples, the circuit configuration By defining the connection path in Distinguish between the first terminal (or the second terminal, etc.) and the drain (or the second terminal, etc.) to determine the technical scope. can be done.

[0041] Note that these expression methods are merely examples, and the present invention is not limited to these expression methods. , Y, Z1, and Z2 are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0042] In addition, the circuit diagram shows independent components as if they are electrically connected to each other. Even if the components are the same, one component may have the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film has the function of the wiring and The function of both components is combined with the function of the electrode. Electrical connection means that one conductive film has the functions of multiple components. cases are also included in this category.

[0043] (Embodiment 1) [Configuration example] FIG. 1A shows an example of a top view of a capacitor 100. FIG. 1B shows a top view of a capacitor 100 shown in FIG. 1(C) is a cross-sectional view corresponding to the dashed line A1-A2 shown in FIG. FIG. 2 is an enlarged view of the area enclosed in the circle.

[0044] The capacitor 100 is provided on an insulator 102 and includes a conductor 104, an insulator 112, and a conductor The insulator 112 includes an insulator 112a and an insulator 112b.

[0045] The conductor 104 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High-melting-point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, are used. It is preferable to use tungsten, and it is particularly preferable to use tungsten. When forming the structure simultaneously with other structures such as the above, low resistance metal materials such as Cu (copper) and Al (aluminum) are used. Minium) or the like can be used.

[0046] The insulator 112 is provided to cover the side and top surfaces of the conductor 104. Examples of the material include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and alumina oxide. Aluminum, aluminum oxide nitride, aluminum oxide nitride, aluminum nitride, halide Hafnium oxide, hafnium nitride, hafnium oxide nitride, hafnium nitride, etc. It is provided as a laminate or a single layer.

[0047] For example, in the case of the two-layer structure shown in FIG. 1, the insulator 112a is made of a material such as aluminum oxide. A high-k material is used, and the insulator 112b is made of an insulating material such as silicon oxynitride. It is preferable to use a material having a high edge strength. By providing the insulator 112a, a sufficient capacity can be ensured, and by providing the insulator 112b, the dielectric strength can be increased. This improves the capacitance and suppresses electrostatic damage to the capacitance element 100.

[0048] The conductor 116 is arranged to cover the side and top surfaces of the conductor 104 via the insulator 112. In addition, in the region where the insulator 102 and the insulator 112 contact each other as shown in FIG. The upper surface of the insulator 112 and the conductor 104 in the region where the insulator 112 and the conductor 104 contact each other. It is preferable that the distance d between the bottom surface of 4 and the bottom surface of the substrate 1 is 0 or more.

[0049] With this configuration, the side surface of the conductor 104 is surrounded by the conductor 116 via the insulator 112. Therefore, in the capacitor 100, the region surrounded by the dashed line in FIG. Since the total surface area of ​​the projected area (the sum of the top and side surfaces) functions as a capacitance, the capacity per projected area is large. The device can be formed.

[0050] The conductor 116 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High melting point materials such as tungsten and molybdenum that have both heat resistance and electrical conductivity can be used. It is preferable to use a material such as tungsten, and it is particularly preferable to use tungsten. When forming the structure simultaneously with other structures such as the above, low resistance metal materials such as Cu (copper) and Al (aluminum) are used. Minium) or the like can be used.

[0051] In the capacitance element 100, the conductor 116 is connected to the side and the side of the conductor 104 via the insulator 112. By covering the upper surface, the capacitance per projection area of ​​the capacitor element can be increased. This makes it possible to reduce the area of ​​the semiconductor device, increase the degree of integration, and miniaturize the device.

[0052] The above is a description of the configuration example.

[0053] <Variation 1> As a modification of this embodiment, a conductor as shown in FIG. 2(A) and FIG. 2(B) may be used. The corners of the conductor 104 may be rounded. Since the covering property of the insulator 112 and the conductor 116 is improved, the insulation of the capacitance element 100 is improved. The strength can be improved.

[0054] This configuration can suppress electrostatic damage to the capacitance element 100, and therefore the semiconductor device It is possible to improve reliability.

[0055] <Variation 2> In a modified example of this embodiment, a recess is provided on the side surface of the conductor 104. For example, as shown in FIG. 3(A) and FIG. 3(B), A side surface is formed on the conductor 104a on the inner side of the conductor 104a and the conductor 104c. With this configuration, the conductor 116 is provided so as to cover the insulator 112. The conductive material 104a is configured to cover a part of the upper surface of the conductive material 104a and a part of the bottom surface of the conductive material 104c through the conductive material 104a. Therefore, the capacitance per projection area of ​​the capacitive element can be increased.

[0056] Although the conductor 104 has a three-layer structure in FIGS. 3A and 3B, For example, it may have a laminated structure of four or more layers.

[0057] This configuration increases the capacitance per projection area of ​​the capacitive element 100. This allows the semiconductor device to have a smaller area, a higher degree of integration, and a finer structure.

[0058] <Variation 3> In a modified example of this embodiment, the shape of the conductor 104 is processed to make the conductor The side area of ​​104 can be increased. For example, the side area of ​​104 shown in FIG. In this way, it is preferable to provide an opening in the conductor 104. When the side area formed inside the opening is large, the capacitance per projected area of ​​the capacitive element is increased. It is possible to do so.

[0059] In addition, in FIG. 4(A) and FIG. 4(B), a rectangular opening is provided in the conductor 104. The mouth may be polygonal or circular in shape.

[0060] For example, as shown in FIG. 5(C) to FIG. 5(L), a plurality of openings may be provided. When openings are provided using the minimum processing dimensions, the grid shown in FIG. 5(G) or FIG. 5(H) is used. The tubular shape can effectively increase the capacity.

[0061] Also, for example, as shown in FIG. 5(A) or FIG. 5(B), it may be formed in a comb-like shape.

[0062] This configuration increases the capacitance per projection area of ​​the capacitive element 100. This allows the semiconductor device to have a smaller area, a higher degree of integration, and a finer structure.

[0063] (Embodiment 2) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0064] [Configuration example] FIG. 6 shows an example of a semiconductor device (memory device) using a capacitor according to one embodiment of the present invention. FIG. 6(B) is a circuit diagram of FIG. 6(A). FIG. 6(C) is a circuit diagram of FIG. A) is an expanded portion of the configuration.

[0065] The semiconductor device shown in FIG. 6A and FIG. 6B includes a transistor 300 and a transistor The capacitor 200 and the capacitance element 100 are the same as those in the embodiment. The capacitive element described in the first aspect can be used.

[0066] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the off-state current of the transistor 200 is small, the transistor 200 can be used as a semiconductor device (memory device). By using it for long-term storage, it is possible to retain the memory contents for a long period of time. Semiconductors that do not require a refresh operation or that require a refresh operation very infrequently Since it is possible to use the device as a single unit (memory device), power consumption can be reduced significantly. do.

[0067] In FIG. 6B, the wiring 3001 is electrically connected to the source of the transistor 300. The wiring 3002 is electrically connected to the drain of the transistor 300. 003 is electrically connected to one of the source and drain of the transistor 200, and the wiring 3 004 is electrically connected to the gate of the transistor 200. The gate of 300 and the other of the source and drain of the transistor 200 are connected to a capacitance element The wiring 3005 is electrically connected to one of the electrodes of the capacitor 100. are electrically connected.

[0068] In addition, by arranging the semiconductor devices shown in FIG. 6(A) and FIG. 6(B) in a matrix, A memory device (memory cell array) can be formed.

[0069] In a semiconductor device according to one embodiment of the present invention, one electrode covers a side surface of the other electrode via an insulator. Therefore, in the capacitor element 100, the capacitance is increased even on the side surface of one electrode. By forming the amount, the capacitance per projection area of ​​the capacitive element can be increased. This makes it possible to reduce the area of ​​semiconductor devices, increase their integration density, and miniaturize them.

[0070] As shown in FIG. 6A, the semiconductor device of one embodiment of the present invention includes a transistor 300 and a transistor The transistor 200 is disposed above the transistor 300. The capacitor 100 is disposed above the transistor 300 and the transistor 200. It is provided.

[0071] The transistor 300 is disposed on a substrate 301, and includes a conductor 306, an insulator 304, and a substrate 305. A semiconductor region 302 consisting of a part of 01 and functioning as a source region or a drain region. The low resistance region 308a and the low resistance region 308b are connected to each other.

[0072] Transistor 300 can be either p-channel or n-channel.

[0073] The region in which the channel of the semiconductor region 302 is formed, the region in the vicinity thereof, the source region, or the drain region In the low resistance region 308a and the low resistance region 308b, which are to be the drain region, silicon is It is preferable that the semiconductor material includes a silicon-based semiconductor, and it is preferable that the semiconductor material includes single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium The insulating layer may be made of a material having a thickness of 100 nm, such as gallium aluminum arsenide (GaAlAs), or the like. By applying stress to the crystal lattice and changing the lattice spacing, we have developed silicon with controlled effective mass. Alternatively, GaAs and GaAlAs may be used to form a transistor. The 300 is a HEMT (High Electron Mobility Transistor) tor).

[0074] The low resistance region 308a and the low resistance region 308b are semiconductor layers applied to the semiconductor region 302. In addition to the material, elements that provide n-type conductivity, such as arsenic or phosphorus, or p-type conductivity, such as boron, are added. The element contains an element that imparts electrical conductivity.

[0075] The conductor 306 that functions as the gate electrode is made of an element that imparts n-type conductivity, such as arsenic or phosphorus. Semiconductor materials such as silicon that contain elements that give them p-type conductivity, such as boron or arsenic. A conductive material such as a metal material, an alloy material, or a metal oxide material can be used.

[0076] The threshold voltage can be adjusted by determining the work function depending on the conductor material. Specifically, it is preferable to use materials such as titanium nitride and tantalum nitride for the conductor. Furthermore, in order to achieve both electrical conductivity and embeddability, tungsten or aluminum is used as the conductor. It is preferable to use any metal material as the lamination, and tungsten is particularly preferable because of its heat resistance. It is preferable from a sexual standpoint.

[0077] In addition, the transistor 300 shown in FIG. 6 has a semiconductor region 302 (substrate 3) in which a channel is formed. The side and top surfaces of the semiconductor region 302 are covered with an insulator 303. The conductor 306 is provided so as to cover the conductor 304. Such a transistor 300 may be formed by forming a protruding portion on a semiconductor substrate. Since it uses a fin-type transistor, it is also called a fin-type transistor. The insulating layer may have an insulating material that functions as a mask for forming the protrusions. Although the case where a protrusion is formed by processing a part of a semiconductor substrate has been shown, the case where a protrusion is formed by processing an SOI substrate Alternatively, a semiconductor film having a shape may be formed.

[0078] Note that the transistor 300 illustrated in FIG. 6A is an example, and the structure is not limited to the above. An appropriate transistor may be used depending on the configuration and driving method. For example, Thus, the configuration of the transistor 300 may be provided as a planar type.

[0079] Covering the transistor 300 are an insulator 320, an insulator 322, an insulator 324, and an insulator 326. The bodies 326 are stacked one on top of the other.

[0080] The insulator 322 flattens the step caused by the transistor 300 and the like provided below. The top surface of the insulator 322 is chemically mechanically polished to enhance its planarization. Chemical Mechanical Polishing (CMP) method, etc. The surface may be planarized by the planarization process used.

[0081] The insulator 324 is a dielectric that separates the transistor 200 from the substrate 301, or the transistor 300, etc. It functions as a barrier film to prevent hydrogen and impurities from diffusing into the region where it is provided. For example, the insulator 324 may be a nitride such as silicon nitride.

[0082] In addition, the insulators 320, 322, 324, and 326 are provided with a capacitance element 1. 00, or a conductor 328, a conductor 330, etc. electrically connected to the transistor 200 are buried. The conductor 328 and the conductor 330 are plugs or wiring. As will be described later, the conductor having the function of a plug or wiring is In this specification and the like, the wiring and the In addition, the wiring and the plug electrically connecting thereto may be integral with each other. In some cases, the conductor functions as a wiring, and in other cases, part of the conductor functions as a plug.

[0083] The materials for each plug and wiring (the conductor 328, the conductor 330, etc.) are metal materials. Conductive materials such as metal oxides, alloys, or metal oxides can be used in a single layer or in a laminated form. Using high melting point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, It is preferable to use tungsten, and it is particularly preferable to use aluminum or It is preferable to form the wiring layer from a low-resistance conductive material such as copper. The wiring resistance can be reduced.

[0084] A wiring layer may be provided over the insulator 326 and the conductor 330. For example, in FIG. In the above, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, the insulators 350, 352, and 354 are provided with a conductor 356 and a conductor The conductor 356 and the conductor 358 are plugs or wires. It functions as a line.

[0085] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator. In addition, the conductor 356 and the conductor 358 are made of an insulating material. It is preferable to use a conductor having a barrier property against hydrogen. In the opening of the body 350, a conductor having a barrier property against hydrogen is formed. In this configuration, the transistor 300 and the transistor 200 are separated by a barrier layer. As a result, the diffusion of hydrogen from the transistor 300 to the transistor 200 can be suppressed. can.

[0086] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the conductivity of the transistor 300. .

[0087] The transistor 200 is provided above the insulator 354. 6C is an enlarged view of the transistor 200 shown in FIG. However, the present invention is not limited to this structure, and appropriate transistors can be used according to the circuit configuration and driving method. That's good.

[0088] On the insulator 354, the insulator 210, the insulator 212, the insulator 214, and the insulator 216 are The insulators 210, 212, 214, and 216 are stacked in this order. The conductor 218, the conductor 205, etc. are embedded in the insulator 216. The conductive body 218 is a plug electrically connected to the capacitor element 100 or the transistor 300. The conductor 205 functions as a gate electrode of the transistor 200. It has the function of

[0089] Any of the insulators 210, 212, 214, and 216 may be heated by oxygen or water. It is preferable to use a material that has a barrier property against oxygen. When a nitride semiconductor is used, the interlayer film near the transistor 200 has an oxygen excess region. By providing an insulator, the reliability of the transistor 200 can be improved. In this way, oxygen is efficiently diffused from the interlayer film near the transistor 200 to the transistor 200. In order to achieve this, the transistor 200 and the interlayer film are provided with a barrier against hydrogen and oxygen. It is advisable to sandwich the material between layers that support the material.

[0090] For example, aluminum oxide, hafnium oxide, tantalum oxide, etc. may be used. By laminating a film having a barrier property, this function can be ensured more reliably.

[0091] On the insulator 216, an insulator 220, an insulator 222, and an insulator 224 are stacked in this order. In addition, the insulators 220, 222, and 224 are provided with conductors 2. A part of the conductive material 218 is embedded in the capacitor element 100 or the transistor. It functions as a plug or wiring that electrically connects to resistor 300.

[0092] The insulator 220 and the insulator 224 are made of an oxide film, a silicon oxide nitride film, or the like. In particular, the insulator 224 is preferably an insulator containing excess oxygen (chemically It is preferable to use an insulator containing oxygen in excess of the stoichiometric composition. The silicon-containing insulator is in contact with the oxide 230 in which the channel region of the transistor 200 is formed. By providing the insulator 222, oxygen vacancies in the oxide can be compensated for. and insulator 224 do not necessarily have to be made of the same material.

[0093] The insulator 222 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or alumina oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba,Sr)TiO3( Insulators containing so-called high-k materials such as BST can be used in single or multilayer configurations. It is preferable to use aluminum oxide, bismuth oxide, germanium oxide, etc., as the insulator. Niobium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. stomach.

[0094] The insulator 222 may have a laminated structure of two or more layers. In that case, The present invention is not limited to a laminated structure made of two or more materials, but may be a laminated structure made of different materials.

[0095] Between the insulator 220 and the insulator 224, there is an insulator 222 including a high-k material. Under certain conditions, the insulator 222 can capture electrons and increase the threshold voltage. That is, the insulator 222 may become negatively charged.

[0096] For example, the insulators 220 and 224 are made of silicon oxide, and the insulator 222 is made of Using materials with many electron capture levels such as hafnium oxide, aluminum oxide, and tantalum oxide If the temperature is higher than the operating temperature or storage temperature of the semiconductor device (for example, 125°C), or more and 450° C. or less, typically 150° C. or more and 300° C. or less), The potential of the source electrode and drain electrode is kept higher than that of the drain electrode for 10 milliseconds or more, typically 1 minute or more. By maintaining the temperature at 100° C., electrons move from the oxide 230 to the conductor 205. Some of the migrating electrons are captured by the electron capture level of the insulator 222.

[0097] The transistor in which the necessary number of electrons are captured in the electron capture level of the insulator 222 has a threshold voltage The voltage of the conductor 205 is shifted to the positive side. It is possible to control the threshold voltage accordingly. By having this, the transistor 200 is in a non-conducting state (off state) even when the gate voltage is 0V. The transistor is a normally-off type transistor (also called a normally-off state).

[0098] The electron capture process may be performed during the manufacturing process of a transistor. after formation of a conductor connecting to the source or drain conductor of the transistor, or After the end of the front-end process (wafer processing), after the wafer dicing process, or after packaging It is advisable to carry out this step at any stage before shipping from the factory.

[0099] In addition, it is preferable to use a material having a barrier property against oxygen and hydrogen for the insulator 222. When such a material is used, oxygen is released from the oxide 230 and the oxide 230 is exposed to the outside. This can prevent the inclusion of impurities such as hydrogen.

[0100] The oxide 230a, the oxide 230b, and the oxide 230c are In-M-Zn oxide (M The oxide 230 is formed of a metal oxide such as Al, Ga, Y, or Sn. Alternatively, In-Ga oxide or In-Zn oxide may be used.

[0101] The oxide 230 according to the present invention will be described below.

[0102] The oxide used for the oxide 230 preferably contains at least indium or zinc. It is preferable that the alloy contains indium and zinc. It is preferable that the metal oxide contains aluminum, gallium, yttrium, tin, or the like. , boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium The metal ion exchange material may contain one or more metals selected from the group consisting of tungsten, sodium, and the like.

[0103] Here, let us consider a case where the oxide contains indium, element M, and zinc. Note that element M is , aluminum, gallium, yttrium or tin. For other elements M Available elements include boron, silicon, titanium, iron, nickel, germanium, and zinc. Conium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten However, the element M can be a combination of multiple of the above elements. There are cases where this is acceptable.

[0104] First, the oxide according to the present invention will be described with reference to FIGS. 15(A), 15(B), and 15(C). The preferred range of the atomic ratio of indium, element M, and zinc will be described below. In FIG. 15, the atomic ratio of oxygen is not shown. The terms for the element M and the atomic ratio of zinc are [In], [M], and [Zn], respectively. do.

[0105] In Figures 15(A), 15(B), and 15(C), the dashed lines indicate [In]:[M] :[Zn]=(1+α):(1-α):1 atomic ratio (-1≦α≦1), [ The line where the atomic ratio of In]:[M]:[Zn]=(1+α):(1-α):2, [I n]:[M]:[Zn]=(1+α):(1-α):3, ]:[M]:[Zn]=(1+α):(1-α):4 atomic ratio line, and [ This line represents the atomic ratio of In:M:Zn=(1+α):(1-α):5. .

[0106] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β is :[M]:[Zn]=1:3:β atomic ratio line, [In]:[M]:[Zn] = 1:4:β atomic ratio line, [In]:[M]:[Zn]=2:1:β atoms The line where the atomic ratio is [In]:[M]:[Zn]=5:1:β Represents the

[0107] The dotted line indicates the atomic number of [In]:[M]:[Zn]=(1+γ):2:(1-γ). The line where the ratio (-1 ≦ γ ≦ 1) is shown in FIG. Oxides with an atomic ratio of [n] = 0:2:1 or close to it have a spinel type crystal structure. Cheap.

[0108] In FIG. 15(A) and FIG. 15(B), indium, which is contained in the oxide of one embodiment of the present invention, An example of a preferred range of the atomic ratio of element M and zinc is shown.

[0109] As an example, FIG. 16 shows InMZnO, where [In]:[M]:[Zn]=1:1:1. 4. Also, Fig. 16 shows the crystal structure of InMZn The crystal structure of MZnO4 is shown in FIG. 16. The metal elements in the MZnO2 layer are In this case, the ratio of element M to zinc is equal. Lead is substituted and has a random arrangement.

[0110] InMZnO4 has a layered crystal structure (also called a layered structure), as shown in Figure 16. For one InO2 layer containing indium, two MZnO2 layers containing elements M and zinc It becomes.

[0111] InMZnO4 has a layered crystal structure (also called a layered structure), as shown in Figure 16. The layer containing indium and oxygen (hereinafter referred to as the In layer) is 1, while the element M, zinc, and The (M,Zn) layer containing oxygen is called 2.

[0112] Indium and the element M can be substituted for each other. Therefore, the element M in the (M, Zn) layer M can be replaced with indium and expressed as an (In,M,Zn) layer. In that case, the In layer It has a layered structure with one layer and two (In,M,Zn) layers.

[0113] In the oxide with the atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1 , (M,Zn) layers are 3. That is, [Z When n] becomes large, when the oxide crystallizes, the ratio of the (M, Zn) layer to the In layer becomes Increase.

[0114] However, in the oxide, the number of (M, Zn) layers per In layer is a non-integer. In this case, there are multiple types of layered structures in which the number of (M, Zn) layers is an integer for one In layer. For example, when [In]:[M]:[Zn]=1:1:1.5, the In layer A layered structure with 1 (M,Zn) layer, 2 (M,Zn) layers, and a layered structure with 3 (M,Zn) layers. In some cases, a layered structure may be formed in which

[0115] For example, when forming an oxide film using a sputtering device, the ratio of the atoms in the target may deviate from the original ratio. In particular, depending on the substrate temperature during film formation, the [Zn ] may result in the film's [Zn] being smaller than that of the

[0116] In addition, multiple phases may coexist in an oxide (two-phase coexistence, three-phase coexistence, etc.). For example, At atomic ratios close to the atomic ratio of [In]:[M]:[Zn]=0:2:1, the spin Two phases, a crystalline structure with a layered structure and a crystalline structure with a panel structure, tend to coexist. At atomic ratios close to the atomic ratio of [Zn]=1:0:0, bixbyite-type Two phases, a crystalline structure and a layered crystalline structure, tend to coexist. When multiple phases coexist in an oxide In the case where grain boundaries are formed between different crystal structures, There is a match.

[0117] In addition, by increasing the indium content, the carrier mobility (electron mobility) of the oxide can be increased. This is mainly due to the fact that in oxides containing indium, element M and zinc The s orbital of the heavy metal contributes to carrier conduction, and increasing the indium content As a result, the overlapping area of ​​s orbitals becomes larger, and oxides with a high indium content This is because the carrier mobility is higher than in oxides with a lower indium content.

[0118] On the other hand, as the indium and zinc content in the oxide decreases, the carrier mobility decreases. Therefore, the atomic ratio [In]:[M]:[Zn]=0:1:0 and its vicinity In the atomic ratio having a certain value (eg, region C shown in FIG. 15C), the insulating property becomes high.

[0119] Therefore, the oxide according to one embodiment of the present invention has a layered structure with high carrier mobility and few grain boundaries. It is preferable that the atomic ratio be that shown in region A in FIG. 15(A), which is likely to result in a structure.

[0120] In addition, in region B shown in FIG. 15(B), [In]:[M]:[Zn]=4:2:3 to 4. 1 and its neighboring values. For example, the atomic ratio [In]:[M] :[Zn]=5:3:4. Oxides having an atomic ratio shown in region B are particularly It is an excellent oxide with high crystallinity and high carrier mobility.

[0121] The condition for an oxide to form a layered structure is not uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the atomic ratio. However, depending on the formation conditions, a layered structure may or may not be formed. The regions shown are regions showing the atomic ratios in which the oxide has a layered structure, and are regions A to C. The boundary is not strict.

[0122] Next, the case where the above oxide is used in a transistor will be described.

[0123] In addition, by using the above oxide in a transistor, carrier scattering at grain boundaries can be reduced. This allows realization of a transistor with high field effect mobility. In addition, a highly reliable transistor can be realized.

[0124] In addition, it is preferable to use an oxide having a low carrier density for a transistor. For example, The oxide has a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's all Just do that.

[0125] In addition, high-purity intrinsic or substantially high-purity intrinsic oxides have a low carrier generation source. Therefore, the carrier density can be reduced. Since the oxide having a low density of defect states may have a low density of trap states.

[0126] In addition, the charges trapped in the oxide trap levels take a long time to disappear. Therefore, oxides with high trap state density are A transistor in which a channel region is formed in a region other than the gate insulating film may have unstable electrical characteristics.

[0127] Therefore, in order to stabilize the electrical characteristics of the transistor, it is necessary to reduce the impurity concentration in the oxide. In order to reduce the impurity concentration in the oxide, it is effective to It is also preferable to reduce the concentration of impurities. Impurities include hydrogen, nitrogen, alkali metals, and alkali metals. These include alkaline earth metals, iron, nickel, and silicon.

[0128] Here, the influence of each impurity in the oxide will be described.

[0129] When silicon or carbon, which is one of the group 14 elements, is included in the oxide, Therefore, the concentration of silicon and carbon in the oxide and the The concentration of silicon and carbon near the interface (Secondary Ion Mass Spectroscopy (SIMS) The concentration obtained by ion mass spectrometry (Ion Mass Spectrometry) is calculated by multiplying the concentration by 2 x 1 0 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following .

[0130] In addition, when an oxide contains an alkali metal or an alkaline earth metal, a defect level is formed, Therefore, alkali metals or alkaline earth metals may generate carriers. Transistors using oxides with high conductivity tend to be normally-on. It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the product. is the concentration of alkali metals or alkaline earth metals in the oxide obtained by SIMS, 1×10 18 atoms / cm 3 Less than or equal to 2×10 16 atoms / cm 3below to.

[0131] In addition, when nitrogen is included in an oxide, electrons that act as carriers are generated, and the carrier density As a result, the transistors using oxides containing nitrogen as semiconductors are Therefore, the amount of nitrogen in the oxide is as small as possible. For example, the nitrogen concentration in the oxide is preferably reduced by SIMS. 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 below , more preferably 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 The following applies.

[0132] In addition, the hydrogen contained in the oxide reacts with the oxygen that bonds with the metal atom to form water, so oxygen When hydrogen enters the oxygen vacancy, electrons, which act as carriers, are generated. In addition, some of the hydrogen may bond with oxygen that bonds with metal atoms, forming a carrier. Therefore, transistors using oxides containing hydrogen Therefore, hydrogen in the oxide is reduced as much as possible. Specifically, it is preferable that the hydrogen concentration of the oxide is measured by SIMS. , 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3less than 1×10 18 atoms / cm 3 Less than.

[0133] By using oxide with sufficiently reduced impurities for the channel region of a transistor, a stable It is possible to impart excellent electrical properties.

[0134] Next, the case where the oxide has a two-layer structure or a three-layer structure will be described. Oxide S1, The band diagram of the insulator adjacent to the stacked structure of oxides S2 and S3 and the band diagram of oxides S1 and The laminated structure of oxide S1 and oxide S2 is connected to the laminated structure of oxide S2 and oxide S3 by an insulating barrier. The block diagram will be explained with reference to FIG.

[0135] FIG. 17(A) shows an insulator I1, an oxide S1, an oxide S2, an oxide S3, and an insulator I2. FIG. 17(B) is an example of a band diagram in the thickness direction of a laminated structure having an insulator I1 FIG. 1 is a band diagram in the thickness direction of a stacked structure having an oxide S2, an oxide S3, and an insulator I2. FIG. 17C shows an example of an insulator I1, an oxide S1, an oxide S2, and an insulator I 2 is an example of a band diagram in the thickness direction of a laminated structure having a first layer and a second layer. In order to obtain the conduction band of the insulator I1, the oxide S1, the oxide S2, the oxide S3, and the insulator I2, The lowest energy level (Ec) is shown.

[0136] The oxides S1 and S3 have a lower energy level at the conduction band lower end closer to the vacuum level than the oxide S2. The energy level of the conduction band minimum of oxide S2 is close to that of oxide S1 and oxide S2. The difference between the energy level of the conduction band minimum of 3 and that of 0.15 eV or more, or 0.5 eV or more and is preferably 2 eV or less, or 1 eV or less. That is, the oxide S1 The electron affinity of oxide S2 is larger than that of oxide S3, and oxides S1 and S2 are The difference between the electron affinity of the substance S3 and the electron affinity of the oxide S2 is 0.15 eV or more, or 0 It is preferably 0.5 eV or more and 2 eV or less, or 1 eV or less.

[0137] As shown in FIG. 17(A), FIG. 17(B), and FIG. 17(C), oxide S1, oxide S 2. In the oxide S3, the energy level at the bottom of the conduction band changes smoothly. It can be said that the band diagram changes continuously or that the junction changes continuously. In order to achieve this, the interface between oxide S1 and oxide S2, or the interface between oxide S2 and oxide S3 must be In this case, the defect level density of the mixed layer formed in the semiconductor device is preferably reduced.

[0138] Specifically, oxides S1 and S2, and oxides S2 and S3 have a common element other than oxygen. By using this element (as the main component), it is possible to form a mixed layer with a low defect level density. For example, if oxide S2 is In-Ga-Zn oxide, oxide S1 and oxide S3 are , In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc. may be used.

[0139] At this time, the main carrier path is oxide S2. The interface between oxide S1 and oxide S2 , and the defect state density at the interface between the oxide S2 and the oxide S3 can be reduced. Therefore, the effect of interface scattering on carrier conduction is small, and a high on-current can be obtained.

[0140] When an electron is captured in a trap level, the captured electron behaves like a fixed charge. Therefore, the threshold voltage of the transistor is shifted in the positive direction. By providing S3, the trap level can be moved away from the oxide S2. By forming the transistor in this way, the threshold voltage of the transistor is prevented from shifting in the positive direction. It is possible.

[0141] The oxide S1 and the oxide S3 are made of materials having a sufficiently low electrical conductivity compared to the oxide S2. At this time, the oxide S2, the interface between the oxide S2 and the oxide S1, and the oxide S2 and the oxide S The interface with oxide S1 and oxide S3 mainly functions as a channel region. In FIG. 15(C), it is preferable to use an oxide having an atomic ratio shown in region C where the insulating property is high. In addition, in the region C shown in FIG. 15(C), [In]:[M]:[Zn]=0:1:0, The atomic ratios shown are values ​​close to the atomic ratios.

[0142] In particular, when an oxide having an atomic ratio shown in region A is used for oxide S2, oxides S1 and For the oxide S3, an oxide having [M] / [In] of 1 or more, preferably 2 or more is used. In addition, it is preferable that the oxide S3 has a sufficiently high insulating property [M] / It is preferable to use an oxide in which ([Zn]+[In]) is 1 or more.

[0143] One of the conductors 240a and 240b functions as a source electrode and the other functions as a drain electrode. It functions as an in-electrode.

[0144] The conductor 240a and the conductor 240b are made of aluminum, titanium, chromium, nickel, Copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, etc. The metal or alloy containing it as the main component is used in a single layer structure or a laminated structure. For example, A single layer structure of an aluminum film containing silicon, a tantalum film or a tantalum nitride film is laminated. A two-layer structure with an aluminum film on a titanium film, a two-layer structure with an aluminum film on a tungsten film, A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film. A two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film, A two-layer structure of a titanium film or titanium nitride film and a layer of a titanium film or titanium nitride film. An aluminum film or copper film is laminated on the substrate, and a titanium film or titanium nitride film is formed on the aluminum film or copper film. A three-layer structure consisting of a molybdenum film or a molybdenum nitride film and a molybdenum film or a nitride film. An aluminum film or copper film is laminated on the molybdenum film, and then a molybdenum film is laminated on top of that. There are three-layer structures that form a film or a molybdenum nitride film. Alternatively, a transparent conductive material containing zinc oxide may be used.

[0145] The insulator 250 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or alumina oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba,Sr)TiO3( Insulators containing so-called high-k materials such as BST can be used in single or multilayer configurations. Alternatively, these insulators may be made of, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0146] In addition, the insulator 250, like the insulator 224, contains more oxygen than satisfies the stoichiometric composition. It is preferable to use an oxide insulator containing a large amount of oxygen.

[0147] Note that the insulator 250 is a laminate similar to the insulators 220, 222, and 224. The insulator 250 may have a structure in which the insulator 250 captures a necessary amount of electrons for the electron capture level. By including an insulator, the threshold voltage of the transistor 200 can be shifted to the positive side. With this configuration, the transistor 200 can be In this case, the transistor is a normally-off transistor, which is in a non-conducting state (also referred to as an off state) even when the transistor is turned on.

[0148] The conductor 260 having the function of the gate electrode is made of, for example, aluminum, chromium, copper, or tungsten. Metals selected from the group consisting of tungsten, titanium, molybdenum, and tungsten, or the above-mentioned metals The alloy may be an alloy of the above metals or a combination of the above metals. Alternatively, metals selected from one or more of the group consisting of manganese and zirconium may be used. In addition, semiconductors such as polycrystalline silicon doped with impurity elements such as phosphorus, nickel, For example, a titanium film may be stacked on an aluminum film. A two-layer structure in which a titanium film is laminated on a titanium nitride film; a two-layer structure in which a titanium film is laminated on a titanium nitride film; A two-layer structure in which a tantalum nitride film is laminated on a tungsten nitride film, and a tungsten nitride film is laminated on a tantalum nitride film or a tungsten nitride film. A two-layer structure in which a titanium film is laminated on top of the titanium film, and an aluminum film is laminated on top of the titanium film. There are three-layer structures in which a titanium film is formed on top of the aluminum. One selected from the group consisting of tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film made of a combination of a plurality of metals, or a nitride film may be used.

[0149] The conductor 260 may be made of indium tin oxide or indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide, indium zinc oxide, and silicon oxide were added to titanium oxide. A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of a light-transmitting conductive material and the above metal may also be used.

[0150] The insulator 280 is preferably made of an oxide material that loses some oxygen when heated.

[0151] As an oxide material that releases oxygen by heating, It is preferable to use an oxide containing oxygen. When an oxide film containing oxygen is heated, some of the oxygen is released. The oxide film containing more oxygen than the oxide film containing less oxygen was analyzed by thermal desorption spectroscopy (TDS). Absorption Spectroscopy (Absorptive Spectroscopy) analysis revealed that the amount of oxygen in terms of oxygen atoms was The amount of desorption is 1.0×10 18 atoms / cm 3 More than 3.0×10 20 ato ms / cm 3 The oxide film is as above. Note that the surface temperature of the film during the TDS analysis was The temperature range is preferably 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower. .

[0152] For example, such a material may include silicon oxide or silicon oxynitride. It is preferable to use a metal oxide. Silicon oxynitride refers to a material that contains more oxygen than nitrogen in its composition. Silicon oxide refers to a material whose composition contains more nitrogen than oxygen.

[0153] The insulator 280 covering the transistor 200 is a planarizing layer that covers the uneven surface underneath. It may also function as a membrane.

[0154] In addition, an insulator 270 may be provided so as to cover the conductor 260. When a desorbed oxide material is used, the conductor 260 is oxidized by the desorbed oxygen. To prevent this, the insulator 270 uses a material that has a barrier property against oxygen. By doing so, the oxidation of the conductor 260 is suppressed, and the desorbed oxygen is efficiently removed from the insulator 280. can be fed to oxide 230.

[0155] On the insulator 280, an insulator 282 and an insulator 284 are laminated in this order. In addition, the insulators 280, 282, and 284 are provided with the conductors 244, 246, and 248. The conductor 244 is a capacitance element. 100 or a plug or wiring that electrically connects to the transistor 300. The conductor 246a and the conductor 246b are the capacitor 100 or a transistor. It functions as a plug or wiring that electrically connects to 200 .

[0156] Either or both of the insulators 282 and 284 are provided with a barrier against oxygen and hydrogen. It is preferable to use a material having a high conductivity. Oxygen desorbed from the adjacent interlayer film can be efficiently diffused into the transistor 200. do.

[0157] The capacitance element 100 is provided above the insulator 284. The capacitive element described in the embodiment is used.

[0158] A conductor 104 and a conductor 124 are provided on the insulator 102. The body 124 is a plug that electrically connects to the transistor 200 or the transistor 300. , or has a function as wiring.

[0159] An insulator 112 is provided on the conductor 104, and a conductor 116 is provided on the insulator 112. The conductor 116 covers the side surface of the conductor 104 via the insulator 112. Since the side surface of the conductor 104 also functions as a capacitance, This allows the capacitance to be increased, thus enabling the area of ​​semiconductor devices to be reduced, and the devices to be highly integrated and miniaturized. It becomes Noh.

[0160] Note that the insulator 102 may be provided at least in a region overlapping with the conductor 104. For example, as shown in FIG. 7B, the insulator 102 is separated from the conductor 104 and the conductor 12. 4, and the insulator 102 and the insulator 112 may be in contact with each other. stomach.

[0161] An insulator 120 and an insulator 122 are laminated in this order on the conductor 116. In addition, the insulator 120, the insulator 122, and the insulator 102 have a conductor 126 embedded therein. The conductor 126 is electrically connected to the transistor 200 or the transistor 300. It functions as a plug or wiring for electrical connection.

[0162] The insulator 120 covering the capacitor element 100 also serves as a planarizing film that covers the uneven surface underneath. It may also function as a

[0163] The above is a description of the configuration example.

[0164] [Example of manufacturing method] An example of a method for manufacturing the semiconductor device shown in the above configuration example will be described below with reference to FIGS. I will use this to explain.

[0165] First, a substrate 301 is prepared. A semiconductor substrate is used as the substrate 301. For example, crystalline silicon substrates (including p-type semiconductor substrates and n-type semiconductor substrates), silicon carbide and A compound semiconductor substrate made of gallium nitride or the like can be used. In the following, a single crystal silicon substrate is used as the substrate 301. This section explains what happens if

[0166] Next, an element isolation layer is formed on the substrate 301. The element isolation layer is formed by LOCOS (Local Orthogonal Oscillator). xidation of Silicon) method or STI (Shallow Trench The insulating layer 12 may be formed by using a method such as a ch isolation method.

[0167] In addition, when a p-type transistor and an n-type transistor are formed on the same substrate, the substrate 30 For example, a p-type well may be formed in an n-type substrate 301. Impurity elements such as boron that give the semiconductor a high conductivity are added to form a p-well, and a An n-type transistor and a p-type transistor may be formed.

[0168] Next, an insulator that will become the insulator 304 is formed on the substrate 301. For example, after the surface nitriding treatment, The interface between silicon and silicon nitride is oxidized to form a silicon oxynitride film. For example, a thermal silicon nitride film may be formed on the surface at 700° C. in an NH3 atmosphere, and then oxygen A silicon oxynitride film is obtained by performing radical oxidation.

[0169] The insulator is formed by sputtering, CVD (Chemical Vapor Deposition) ition) method (thermal CVD method, MOCVD (Metal Organic CVD) method, PECVD (Plasma Enhanced CVD) method, etc.), MBE (Mol ecular beam epitaxy) method, ALD (Atomic Layer D) deposition method, or PLD (Pulsed Laser Deposition) method Alternatively, the insulating layer 12 may be formed by film formation using a film-on method or the like.

[0170] Next, a conductive film is formed to become the conductor 306. The conductive film is made of tantalum, tungsten, or the like. Metals selected from the group consisting of tungsten, titanium, molybdenum, chromium, niobium, etc., or It is preferable to use an alloy material or compound material containing the main component of the metal. In addition, a metal nitride film and the above-mentioned metal film can be used. The metal nitride may be tungsten nitride, molybdenum nitride, Titanium nitride can be used. By providing a metal nitride film, the adhesion of the metal film can be improved. The work function of the conductor 306 can be improved, and peeling can be prevented. By determining the thickness of the conductive film, the threshold voltage of the transistor 300 can be adjusted. The material may be appropriately selected depending on the characteristics required for the transistor 300 .

[0171] Conductive films are formed by sputtering, deposition, CVD (thermal CVD, MOCVD, PECV In addition, the damage caused by plasma is reduced. For this purpose, a thermal CVD method, an MOCVD method or an ALD method is preferable.

[0172] Next, a resist mask is formed over the conductive film by lithography or the like, and the conductive film The unnecessary portion of the conductor 306 is then removed by removing the resist mask. can be formed.

[0173] Here, a method for processing a film to be processed will be described. When processing a film to be processed finely, various Various microfabrication techniques can be used. For example, a resist formed by lithography or the like A method of slimming the mask may be used. A dummy pattern is formed, a sidewall is formed on the dummy pattern, and then the dummy pattern is The sidewall is removed, and the film to be processed is etched using the remaining sidewall as a resist mask. In addition, in order to achieve a high aspect ratio for etching the film to be processed, For this reason, it is preferable to use anisotropic dry etching. A hard mask made of the following material may also be used.

[0174] The light used to form the resist mask is, for example, i-line (wavelength 365 nm) or g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these can be used. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can also be used. In addition, the exposure may be performed by an immersion exposure technique. (EUV: Extreme Ultra-violet) or X-rays may be used. Instead of light for exposure, an electron beam can be used. Extreme ultraviolet light, X-rays or electron beams can also be used. The use of a child beam is preferable because it allows extremely fine processing. When exposure is performed by scanning any beam, no photomask is required.

[0175] In addition, before forming the resist film that will become the resist mask, the adhesion between the film to be processed and the resist film is An organic resin film having a function of improving the spin property may be formed. The surface is then flattened by covering the steps below using a coating method or the like. This makes it possible to reduce the variation in thickness of the resist mask provided above the organic resin film. In particular, when fine processing is performed, the organic resin film is required to have a high resistance to the light used for exposure. It is preferable to use a material that functions as an anti-reflection film. As the resin film, for example, BARC (Bottom Anti-Reflection The organic resin film is removed at the same time as the resist mask is removed. Alternatively, it may be removed after removing the resist mask.

[0176] After the conductor 306 is formed, a sidewall may be formed to cover the side surface of the conductor 306. The side wall is formed by depositing an insulator thicker than the conductor 306 and then anisotropically etching the insulator. The insulating material can be formed by applying insulating material to only the side portions of the conductor 306 .

[0177] When the sidewall is formed, the insulator 304 is also etched at the same time. Thus, the insulator 304 is formed under the conductor 306 and the sidewall. After the conductor 306 is formed, the conductor 306 or a resist for processing the conductor 306 is The insulator 304 is etched using the mask as an etching mask. In this case, the insulator 304 is formed under the conductor 306. Alternatively, The insulator was used as it is as the insulator 304 without etching. It is also possible.

[0178] Next, in the region of the substrate 301 where the conductor 306 (and the sidewall) are not provided, An element that gives n-type conductivity, such as phosphorus, or an element that gives p-type conductivity, such as boron Add the ingredient.

[0179] Next, after forming the insulator 320, a process for activating the element that provides the above-mentioned conductivity is performed. Heat treatment is performed.

[0180] The insulator 320 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. Aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, aluminum nitride Silicon nitride containing oxygen and hydrogen can be used. By using SiNOH, the amount of hydrogen released by heating can be increased. In addition, TEOS (Tetra-Ethyl-Ortho-Silicate ) or a step-covering film formed by reacting silane, etc. with oxygen or nitrous oxide, etc. A good silicon oxide can also be used.

[0181] The insulator 320 is formed by, for example, a sputtering method, a CVD method (thermal CVD method, MOCVD method, P It can be formed by using methods such as ECVD, MBE, ALD, or PLD. In particular, the insulator is formed by a CVD method, preferably a plasma CVD method. This is preferable because it can improve the coating property. In addition, it is possible to reduce damage caused by plasma. For this purpose, a thermal CVD method, an MOCVD method or an ALD method is preferable.

[0182] Heat treatment is carried out in an inert gas atmosphere such as rare gas or nitrogen gas, or in a reduced pressure atmosphere, e.g. For example, it can be performed at a temperature of 400° C. or higher and below the strain point of the substrate.

[0183] At this stage, transistor 300 is formed.

[0184] Next, an insulator 322 is formed on the insulator 320. The insulator 322 has the same structure as the insulator 320. The upper surface of the insulator 322 can be formed by a method such as CMP. (Figure 8(A)).

[0185] Next, the low resistance region 308a and the low resistance region 308 are formed on the insulator 320 and the insulator 322. Then, an opening is formed that reaches the conductive material 306 and the like (FIG. 8(B)). A conductive film is formed so as to cover the conductive film (FIG. 8(C)). The conductive film is formed by, for example, a sputtering method. , CVD method (including thermal CVD method, MOCVD method, PECVD method, etc.), MBE method, ALD method Alternatively, it can be formed by using a PLD method or the like.

[0186] Next, the conductive film is planarized so that the top surface of the insulator 322 is exposed. Conductor 328a, conductor 328b, conductor 328c, etc. are formed (Figure 8(D)). In addition, the arrows in the figure indicate CMP processing. 28a, conductor 328b, and conductor 328c function as plugs or wiring. In this specification, the terms "plug," "conductor," and "conductor 328" are used interchangeably. Or if it has a function as wiring, it shall be treated in the same manner.

[0187] Next, an insulator 322 and an insulator 324 are formed on the insulator 320, and then a damascene process is performed. The conductor 330a, the conductor 330b, and the conductor 330c are formed by a method such as a method for forming a conductive material. 9(A)). The insulators 322 and 324 are made of the same material and in the same manner as the insulator 320. The conductive film that becomes the conductor 330 can be made of the same material as the conductor 328. It can be made with materials and methods.

[0188] Next, after forming the insulator 352 and the insulator 354, a dual damascene method or the like is used. The insulator 352 and the insulator 354 are connected to the conductor 358a, the conductor 358b, and the conductor The insulator 352 and the insulator 354 form an insulator 358c (FIG. 9B). The conductive film 358 can be made of the same material and by the same method as in 20. can be made of materials and methods similar to those of the conductor 328.

[0189] Next, the transistor 200 is formed. After forming the insulator 210, the insulator 210 is exposed to hydrogen or oxygen. The insulating material 210 is formed of an insulator 212 having a barrier property and an insulator 214. It may be made of the same materials and methods as the insulator 320 .

[0190] The insulators 212 and 214 are formed by, for example, a sputtering method or a CVD method (thermal C (including VD, MOCVD, PECVD, etc.), MBE, ALD, PLD, etc. In particular, any of the insulators can be formed using an ALD method. By forming a dense, uniform thickness, the defects such as cracks and pinholes are reduced. It is possible to form an insulator having a thickness.

[0191] Next, an insulator 216 is formed on the insulator 214. The insulator 216 has the same structure as the insulator 210. It can be fabricated using the same materials and methods (Figure 9(C)).

[0192] Next, conductor 35 is connected to insulator 210, insulator 212, insulator 214, and insulator 216. 8a, the conductor 358b, and the conductor 358c are formed (FIG. 10(A) )).

[0193] Next, an opening is formed in the insulator 216. At this time, the opening formed in the insulator 216 is By widening the opening formed in the insulator 216, It is possible to ensure sufficient design margin for the plugs or wiring formed in this process. Cut.

[0194] After that, a conductive film is formed so as to fill the opening (FIG. 10(C)). The conductive film can be made of the same material and by the same method as the conductive film 328. By performing the treatment, the upper surface of the insulator 216 is exposed, and the conductors 218a and 218b are , the conductor 218c, and the conductor 205 are formed (FIG. 11(A)). represents the CMP process.

[0195] Next, the insulator 220, the insulator 222, and the insulator 224 are formed. The edge 222 and the insulator 224 may be made of the same materials and in the same manner as the insulator 210. In particular, it is preferable to use a high-k material for the insulator 222.

[0196] Next, an oxide that will become oxide 230a and an oxide that will become oxide 230b are formed in that order. It is preferable that the oxide be continuously formed without being exposed to the air.

[0197] After the oxide that becomes the oxide 230b is formed, it is preferable to perform a heat treatment. At a temperature of 50°C to 650°C, preferably 300°C to 500°C, in an inert gas atmosphere The treatment may be carried out in an atmosphere containing 10 ppm or more of oxidizing gas, or under reduced pressure. The heat treatment atmosphere is an inert gas atmosphere, and then oxygen is added to replace the oxygen that has been removed. The heat treatment may be performed in an atmosphere containing 10 ppm or more of a chemical gas. This may be performed immediately after the oxide film that will become the oxide 230b is formed, or the oxide film that will become the oxide 230b may be processed to form islands. The heat treatment may be performed after the oxide 230b is formed. Oxygen is supplied to the oxide 230a and the oxide 230b from the insulator formed on the oxide 230a. This can reduce oxygen vacancies in the oxide.

[0198] Then, a conductor 240a and a conductor 240b are formed on the oxide 230b. Then, a resist mask is formed in the same manner as above, and the conductive film is The unnecessary parts of the oxide are then removed by etching using the conductive film as a mask. The resist mask is then removed to leave the island-like By forming a laminated structure of the oxide 230a, the island-shaped oxide 230b, and the island-shaped conductor, This can be done.

[0199] Next, a resist mask is formed on the island-shaped conductive film by the same method as above, and unnecessary portions of the conductive film are removed. The resist mask is then removed to reveal the conductive portion. 2, the conductive body 240a and the conductive body 240b are formed.

[0200] Next, the oxide that becomes the oxide 230c, the insulator that becomes the insulator 250, and the conductor 260 are Then, a resist is formed on the conductive film in the same manner as described above. A mask is formed and unnecessary portions of the conductive film are removed by etching to form a conductive film 26. Form 0.

[0201] Next, an insulator that will become the insulator 250 and an insulator that will become the insulator 270 are formed on the conductor 260. The insulator 270 is a material having a barrier property against hydrogen and oxygen. It is preferable to use a resist mask on the insulator in the same manner as described above. The insulating material that becomes the insulating material 270, the insulating material that becomes the insulating material 250, and the oxide 23 The unnecessary parts of the oxide that will become 0c are removed by etching. The resist mask is then removed. By removing the insulating layer 202, the transistor 200 is formed.

[0202] Next, the insulator 280 is formed. The insulator 280 is made of a material having more oxygen than the stoichiometric composition. It is preferable to use an oxide containing a large amount of oxygen. After that, a planarization process using a CMP method or the like may be performed to improve the planarization of the upper surface. .

[0203] In order to make the insulator 280 contain excess oxygen, for example, the insulator is heated in an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulator 280 after the film formation to remove excess oxygen. Alternatively, both of these measures may be combined.

[0204] For example, oxygen (at least oxygen radicals, oxygen atoms, oxygen ions) may be present in the insulator 280 after deposition. The oxygen introduction method includes introducing oxygen into the silicon substrate to form a region containing excess oxygen. These include ion implantation, ion doping, plasma immersion ion implantation, and plasma Zuma processing or the like can be used.

[0205] In addition, a gas containing oxygen can be used for the oxygen introduction process. Examples of gases that can be used include oxygen, nitrous oxide, nitrogen dioxide, carbon dioxide, and carbon monoxide. In the oxygen introduction process, a rare gas may be added to the oxygen-containing gas. For example, Alternatively, a mixture of carbon dioxide, hydrogen and argon gas can be used.

[0206] In addition, as an oxygen introduction process, an oxide was formed on the insulator 280 using a sputtering device. For example, a method for depositing the insulator 282 is to use a sputtering apparatus. By forming an insulator 282 in an oxygen gas atmosphere using Oxygen can be introduced into 280.

[0207] Next, the insulator 284 is formed. The insulator 284 is made of the same material and The insulator 284 can be made by a method having a barrier property against oxygen and hydrogen. It is preferable to use aluminum oxide or the like that can be used for the insulator 284 by using the ALD method. By forming the material in a uniform shape, it is possible to reduce defects such as cracks and pinholes, and to obtain a dense material. It is possible to form an insulator having a uniform thickness.

[0208] By laminating a dense film of insulator 284 on insulator 282, the insulator The excess oxygen can be effectively trapped on the transistor 200 side (FIG. 11(B) ).

[0209] Next, the capacitor 100 is formed. First, the insulator 102 is formed over the insulator 284. Insulator 102 may be made of similar materials and methods as insulator 210 .

[0210] Next, insulator 220, insulator 222, insulator 224, insulator 280, insulator 282, and and insulator 284, conductor 218a, conductor 218b, conductor 218c, conductor 240a , and openings reaching conductor 240b, etc. are formed.

[0211] Thereafter, a conductive film is formed so as to fill the opening, and a planarization process is performed on the conductive film. The upper surface of the insulator 216 is exposed, and the conductors 244a, 244b, 244c, and The conductive film is formed by the conductor 328. It can be prepared using the same materials and methods as those described above.

[0212] Next, the conductive film 104A is formed on the insulator 102. The conductive film 104A can be formed of the same material and by the same method as the conductive film 328. Then, a resist mask 190 is formed (FIG. 12(A)).

[0213] By etching the conductive film 104A, the conductors 124a, 124b, and 12 4c, and the conductor 104 are formed. This etching process is called an over-etching process. By doing so, a part of the insulator 102 can be removed at the same time (FIG. 12(B)). The insulator 102 needs only to be removed to a depth greater than the thickness of the insulator 112 to be formed later. That is, the upper surface of the region of the insulator 102 where the over-etching process has been performed is a conductive layer. The insulator 1 is disposed on the transistor 200 side in the film thickness direction with respect to the top surface of the region overlapping with the insulator 104. This is an over-etching process with an etching depth of more than the thickness of the conductive film 12. By forming 04 by over-etching, the etching can be completed without leaving any etching residue. It is possible to switch the

[0214] In addition, by switching the type of etching gas during the etching process, This allows a portion of the insulator 102 to be removed efficiently.

[0215] Also, for example, after the conductor 104 is formed, the resist mask 190 is removed, and the conductor 10 4 may be used as a hard mask to remove a portion of the insulator 102.

[0216] After the conductor 104 is formed, the surface of the conductor 104 may be subjected to a cleaning process. By carrying out the cleaning process, etching residues and the like can be removed.

[0217] Furthermore, when the film types of the insulator 102 and the insulator 284 are different, the insulator 284 is etched. In that case, as shown in FIG. The structure is such that the insulator 102 is formed in the region overlapping with the conductor 104.

[0218] Next, an insulator 112 is formed to cover the side and upper surfaces of the conductor 104 (FIG. 13(A)). The insulator 112 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, aluminum Mininium, Hafnium Oxide, Hafnium Oxynitride, Hafnium Oxide Nitride, Hafnium Nitride The above may be used, and the layer may be a laminate or a single layer.

[0219] For example, high-k materials such as aluminum oxide and silicon oxynitride have low dielectric strength. It is preferable to use a laminated structure of materials having a large h The igh-k material ensures sufficient capacity, and the high dielectric strength material improves dielectric strength. Therefore, electrostatic damage to the capacitance element 100 is suppressed, and the reliability of the capacitance element 100 is improved. It is possible.

[0220] Next, a conductive film 116A is formed on the insulator 112 (FIG. 13(A)). The conductive body 16A can be formed using the same materials and methods as the conductive body 104. A resist mask 190 is formed on the conductive film 116A, and unnecessary portions of the conductive film 116A are The resist mask is then removed, leaving the conductor 116 Form.

[0221] The conductor 116 is arranged to cover the side and top surfaces of the conductor 104 via the insulator 112. That is, in the region where the insulator 102 and the insulator 112 contact each other as shown in FIG. The upper surface of the insulator 112 and the conductor 104 in the region where the insulator 112 and the conductor 104 contact each other. It is advisable to set it so that the distance d between the bottom surface of 04 is 0 or more.

[0222] With this configuration, the side surface of the conductor 104 faces the conductor 116 via the insulator 112. Therefore, in the capacitor 100, the region surrounded by the dashed line in FIG. Since the sum of the top and side surfaces functions as a capacitance, it is a capacitive element with a large capacity per projection area. A child can be formed.

[0223] Next, the insulator 120 is formed to cover the capacitor element 100 (FIG. 13(B)). The insulator serving as the insulator 102 can be formed using the same material and method as the insulator 102 .

[0224] Next, the insulator 120 is provided with the conductors 124a, 124b, 124c, and 124d. An opening is formed that reaches the body 104, etc.

[0225] Thereafter, a conductive film is formed so as to fill the opening, and a planarization process is performed on the conductive film. The upper surface of the insulator 120 is exposed, and the conductors 126a, 126b, 126c, and The conductive film is formed using the same material as the conductor 244 and the same conductive film as the conductor 126d. It can be created by the above method.

[0226] Next, a conductive film that will become the conductor 128 is formed. The conductive film is formed by, for example, sputtering. method, CVD method (including thermal CVD method, MOCVD method, PECVD method, etc.), MBE method, ALD In particular, the conductive film can be formed by a CVD method, preferably a PLD method. It is preferable to form the film by a plasma CVD method, since this method can improve the covering property. In order to reduce damage caused by plasma, it is preferable to use a thermal CVD method, MOCVD method, or The ALD method is preferred.

[0227] The conductive film that becomes the conductor 128 may be made of, for example, aluminum, chromium, copper, tantalum, titanium, or the like. Metals selected from the group consisting of tungsten, molybdenum, and tungsten, or alloys containing the above-mentioned metals. The metal layer can be formed of gold or an alloy of the above-mentioned metals. Alternatively, a metal selected from one or more of silicon, zinc, zirconium, etc. may be used. Semiconductors such as polycrystalline silicon doped with impurity elements such as arsenic, nickel silicide, For example, a titanium film may be laminated on an aluminum film. Layer structure, two-layer structure with titanium film laminated on titanium nitride film, tungsten on titanium nitride film Two-layer structure with laminated films, tungsten film on tantalum nitride film or tungsten nitride film A two-layer structure is formed by laminating a titanium film and an aluminum film on the titanium film. There are three-layer structures, such as a titanium film on top of aluminum. One or more selected from tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film made of a combination of the above metals or a nitride film may be used.

[0228] Next, a resist mask is formed over the conductive film that will become the conductor 128 by the same method as described above. The unnecessary portion of the conductive film is removed by etching. Then, the resist mask is removed. This forms conductor 128a, conductor 128b, conductor 128c, and conductor 128d. Complete.

[0229] Next, the insulator 122 is formed on the insulator 120 (FIG. 14). The edge can be formed from the same materials and by the same methods as the insulator 122 and the like.

[0230] Through the above steps, a semiconductor device of one embodiment of the present invention can be manufactured.

[0231] This embodiment may be appropriately combined with at least a part of other embodiments described in this specification. It can be implemented together.

[0232] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0233] <Transistor structure 1> An example of a transistor according to one embodiment of the present invention is described below. 18B and 18C are top views and diagrams of a transistor according to one embodiment of the present invention. 18(A) is a top view, and FIG. 18(B) is a cross-sectional view of the part shown in FIG. 18(A). 18(C) is a cross-sectional view corresponding to the dashed dotted line X1-X2, and FIG. 18(C) is a cross-sectional view corresponding to the dashed dotted line Y1-Y2. In addition, in the top view of FIG. 18(A), some elements are shown in order to clarify the drawing. It is omitted in the illustration.

[0234] In the transistor 200 shown in FIG. 18, the transistor 200 shown in FIG. The same reference numerals are used to designate structures having the same functions as those of the structures forming the same components.

[0235] The transistor 200 includes a conductor 205 that functions as a gate insulating layer, and a conductor 260. and an insulator 220, an insulator 222, and an insulator 224 that function as gate insulating layers. The insulator 250, the oxide 230 having the region where the channel is to be formed, and the source or drain A conductor 240a functions as one of the inputs, and a conductor 240b functions as the other of the source or drain. and an insulator 280 having excess oxygen.

[0236] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide and an oxide 230c on the substrate 230b. Note that when the transistor 200 is turned on, Current flows mainly through the oxide 230b (a channel is formed). The oxide 230a and the oxide 230c are in the vicinity of the interface with the oxide 230b (if they are in a mixed region). In some cases, current may flow through the upper and lower regions, while other regions may function as insulators. There is.

[0237] The insulator 216 may be a silicon oxide film, a silicon oxynitride film, or the like. The insulator 216 may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxynitride. Gallium, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride It is possible to use insulating films with barrier properties against oxygen and hydrogen, such as silicon nitride and silicon oxide. When such materials are used, impurities such as hydrogen from the substrate or other structures can be easily absorbed. The insulator 216 functions as a layer that prevents impurities from being mixed in. The insulator 216 may have a layered structure.

[0238] The conductor 205 may be made of any of a variety of materials including molybdenum, titanium, tantalum, tungsten, aluminum, copper, and chromium. A metal film containing an element selected from the group consisting of chromium, neodymium, and scandium, or a metal film containing the above elements. Metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) Or, indium tin oxide, indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide containing tin, indium oxide containing titanium oxide, titanium oxide Indium tin oxide, indium zinc oxide, indium stannate with silicon oxide A conductive material such as a carbide or an oxide can also be used. It is also possible to use a laminated structure of the above.

[0239] The insulators 220 and 224 are made of an oxygen-containing material such as a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator 224 contains excess oxygen (stoichiometric amount) It is preferable to use an insulator containing excess oxygen relative to the theoretical composition. By providing an insulator containing the compound in contact with the oxide 230, oxygen vacancies in the oxide 230 are compensated for. It should be noted that the insulators 220 and 224 do not necessarily have to be made of the same material. It is not necessary to form the

[0240] The insulator 220 and the insulator 224 may have a layered structure. The insulating film containing the oxide 230 is provided in contact with the oxide 230, and is further wrapped in a barrier film to form the oxide. A state where the composition is nearly stoichiometric, or where there is more oxygen than stoichiometric, In addition, it is possible to prevent impurities such as hydrogen from entering the oxide 230. Cut.

[0241] The insulator 222 may be hafnium oxide, hafnium oxynitride, aluminum oxide, or aluminum oxynitride. Aluminum, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride Zirconium oxide, zirconium oxynitride, silicon nitride, tantalum oxide, titanium oxide STO(Strontium Titan Oxide), BST(Barium Strontium Titanium Oxide, etc. can be used. The body 222 may have a laminated structure of two or more layers. In that case, the laminated layers are made of the same material. The structure is not limited to this, and may be a laminated structure made of different materials.

[0242] In addition, any one of the insulators 220, 224, and 222 may be made resistant to oxygen and hydrogen. It is preferable to use a material with a barrier property for the purpose. This can prevent the release of oxygen from the oxide 230 and the inclusion of impurities such as hydrogen from the outside. do.

[0243] The insulators 220 and 224 are made of silicon oxide, and the insulator 222 is made of hafnium oxide. When configured, the insulators 220 and 224 are formed by chemical vapor deposition (CVD, atomic The insulating layer 222 may be formed by a sputtering method. Note that when a sputtering method is used to form the insulator 222, the insulator 222 can be formed. It tends to crystallize at low temperatures, and the amount of fixed charge generated may be large.

[0244] In the semiconductor device shown in FIG. 18, an insulator 2 is provided between the oxide 230 and the conductor 260. A barrier film may be provided in addition to the oxide 230c. It may be used.

[0245] The conductor 260, the conductor 240a, and the conductor 240b are made of the same material as the conductor 205. For example, molybdenum, titanium, tantalum, tungsten, aluminum, a metal film containing an element selected from the group consisting of aluminum, copper, chromium, neodymium, and scandium, or Metal nitride films containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) Indium tin oxide, indium oxide containing tungsten oxide, Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, acid Indium tin oxide with titanium dioxide, indium zinc oxide, indium with silicon dioxide Alternatively, a conductive material such as tin oxide or the like may be used. The metal material may also be laminated.

[0246] The insulator 250 is an insulator containing oxygen, such as a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator 250 contains excess oxygen (compared to the stoichiometric composition). It is preferable to use an insulator containing excess oxygen. By providing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 can be compensated for. can.

[0247] The insulator 250 may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxide. Gallium nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride Use insulating films such as silicon nitride and silicon nitride that have barrier properties against oxygen and hydrogen. When such a material is used, oxygen is released from the oxide 230 and the outside It functions as a layer that prevents impurities such as hydrogen from entering from the inside.

[0248] The insulator 250 may have a layered structure. For example, an insulating film containing excess oxygen may be The oxide is then placed in contact with the stoichiometric composition of the SiO2 layer and wrapped in a barrier film. The oxygen concentration can be adjusted to match the stoichiometric composition, or to be supersaturated with more oxygen than the stoichiometric composition. In addition, the intrusion of impurities such as hydrogen into the oxide 230 can be prevented.

[0249] With the above structure, the threshold voltage of a transistor including an oxide semiconductor can be By changing the gate voltage in the positive direction, the transistor is in a non-conducting (off) state even when the gate voltage is 0V. A normally-off transistor can be provided.

[0250] In addition, by appropriately adjusting the film thicknesses of the insulators 220, 222, and 224, the threshold It is possible to control the value voltage. Alternatively, a transistor with a small leakage current when non-conducting can be used. In addition, a transistor having stable electrical characteristics can be provided. Alternatively, a transistor with a large on-state current can be provided. It is possible to provide a transistor with a small threshold swing value. Therefore, a highly reliable transistor can be provided.

[0251] <Transistor structure 2> FIG. 19 shows an example of a structure applicable to a transistor 200. 19(A) shows the top surface of the transistor 200. For clarity of the drawing, some of the films are not shown in FIG. In addition, FIG. 19B corresponds to the dashed line X1-X2 shown in FIG. 19(C) is a cross-sectional view taken along line Y1-Y2.

[0252] In the transistor 200 shown in FIG. 19, the transistor 200 shown in FIG. The same reference numerals are used to designate structures having the same functions as the structures they constitute.

[0253] In the structure shown in FIG. 19, the three ends of the conductor 240a and the conductor 240b are made of oxide. 230. Thus, the conductors 240a and 240b are The oxide 230 can be shaped at the same time, which reduces the number of masks and steps. In addition, the yield and productivity can be improved.

[0254] In addition, the structure is such that the region in the oxide 230b where the channel is formed is surrounded by the gate electrode. The electric field of the conductor 260, which functions as a gate, can electrically surround the The structure of the transistor, which electrically surrounds the semiconductor by the electric field of the gate electrode, is called surro This is called an unded channel (s-channel) structure. A channel is formed through the entire region of oxide 230b facing conductor 260 via 0. In the s-channel structure, a large current flows between the source and drain of the transistor. This allows the on-state current to be increased. To provide a transistor in which leakage current is suppressed because a voltage is applied to the entire periphery of the transistor. can be done.

[0255] <Transistor structure 3> FIG. 20 shows an example of a structure applicable to a transistor 200. 20(A) shows the top surface of the transistor 200. For clarity of the drawing, some of the films are not shown in FIG. In addition, FIG. 20B corresponds to the dashed line X1-X2 shown in FIG. 20A. 20(C) is a cross-sectional view taken along line Y1-Y2.

[0256] In the transistor 200 shown in FIG. 20, the transistor 200 shown in FIG. The same reference numerals are used to designate structures having the same functions as the structures they constitute.

[0257] The structure shown in FIG. 20 includes an oxide 230c, an insulator 25, and a silicon oxide 260 in an opening formed in an insulator 280. 0, a conductor 260 is formed. In addition, one of the conductors 240a and 240b is The end of the conductor 2 is aligned with the end of the opening formed in the insulator 280. The three ends of the conductor 240a and the conductor 240b are aligned with a part of the end of the oxide 230. Therefore, the conductor 240a and the conductor 240b are not covered by the oxide 230 or the insulator 28. This allows the opening of the 0 to be shaped at the same time, reducing the number of masks and processes. In addition, the yield and productivity can be improved.

[0258] Furthermore, the transistor 200 shown in FIG. Since the conductor 260 and the conductor 261 are hardly overlapped, the parasitic capacitance of the conductor 260 is small. In other words, it is possible to provide a transistor 200 having a high operating frequency. This can be done.

[0259] In addition, the structure is such that the region in the oxide 230b where the channel is formed is surrounded by the gate electrode. The electric field of the conductor 260, which functions as a -channel structure, the oxide layer facing the conductor 260 through the insulator 250 In some cases, a channel is formed throughout the entire region of the object 230b. In the s-channel structure, This allows a large current to flow between the source and drain of the transistor, thereby increasing the on-state current. In addition, since the voltage is applied to the entire area where the channel is formed, leakage current is reduced. It is possible to provide a transistor with suppressed current.

[0260] <Transistor structure 4> FIG. 21 shows an example of a structure applicable to a transistor 200. 21(A) shows the top surface of the transistor 200. For clarity of the drawing, some of the films are not shown in FIG. In addition, FIG. 21B corresponds to the dashed line X1-X2 shown in FIG. 21(C) is a cross-sectional view taken along line Y1-Y2.

[0261] In the transistor 200 shown in FIG. 21, the transistor 200 shown in FIG. The same reference numerals are used to designate structures having the same functions as the structures they constitute.

[0262] The structure shown in FIG. 21 has oxide 230 functioning as either a source or drain region. and region 245a serving as the other of the source region or the drain region. The region is doped with boron, phosphorus, and aluminum using the conductor 260 as a mask. It can be formed by adding impurities such as fluorine to the oxide 230. By using an insulator 280 containing hydrogen, such as a silicon nitride film, hydrogen can be converted into oxide 23 It can be formed by diffusing a part of 0. Therefore, the mask or process can be reduced. In addition, the yield and productivity can be improved.

[0263] In addition, the structure is such that the region in the oxide 230b where the channel is formed is surrounded by the gate electrode. The electric field of the conductor 260, which functions as a Due to the -channel structure, the oxide 2 facing the conductor 260 through the insulator 250 In some cases, a channel is formed in the entire region of 30b. A large current can be passed between the source and drain of the transistor, making it possible to increase the on-state current. In addition, since a voltage is applied to the entire area where the channel is formed, leakage current It is possible to provide a transistor in which the above-mentioned problem is suppressed.

[0264] The configurations, methods, etc. shown in the present embodiment may be used in conjunction with configurations shown in other embodiments and other examples. The composition, method, etc. can be appropriately combined for use.

[0265] (Embodiment 4) In this embodiment, a semiconductor device including the transistor described in the above embodiment The following will explain this with reference to FIGS. 22 to 26.

[0266] <Structure of oxide semiconductor> The structure of an oxide semiconductor will be described below.

[0267] Oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, c-axis-aligned (CAAC-OS) crystalline oxide semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconducting uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-l ike oxide semiconductor and amorphous oxide semiconductor. do.

[0268] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor other than the amorphous oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- Examples of such materials include OS, polycrystalline oxide semiconductors, and nc-OS.

[0269] Amorphous structures are generally isotropic, have no inhomogeneous structure, and are metastable arrangements of atoms. The bond angles are flexible, and the short-range order is not fixed. It is said that...

[0270] That is, the stable oxide semiconductor is transformed into a completely amorphous In addition, it is not isotropic (for example, it does not have a periodic structure in a small region). On the other hand, an oxide semiconductor having an a-li structure cannot be called a completely amorphous oxide semiconductor. The ke OS is not isotropic, but has an unstable structure with voids. In terms of instability, a-like OS is similar in physical properties to amorphous oxide semiconductors. .

[0271] <caac-os> First, let me explain about CAAC-OS.

[0272] CAAC-OS is an oxide semiconductor that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of conductor.

[0273] CAAC-OS was analyzed by X-ray diffraction (XRD). For example, the InGaZnO4, which is classified into the space group R-3m, The structure of CAAC-OS with crystals is analyzed by the out-of-plane method. As shown in FIG. 22(A), a peak appears at a diffraction angle (2θ) of about 31°. The peak is attributed to the (009) plane of the InGaZnO4 crystal, so The crystal has a c-axis orientation, and the c-axis is the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). It can be seen that the crystal is oriented in a direction perpendicular to the upper surface. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the center are due to the crystal structure classified into the space group Fd-3m. It is preferable that -OS does not show such a peak.

[0274] On the other hand, in-pla, X-rays are incident on the CAAC-OS in a direction parallel to the surface on which the film is to be formed. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I The lattice constant is assigned to the (110) plane of the nGaZnO4 crystal. The 2θ is fixed at around 56°. The analysis (φ scan) is performed while rotating the sample around the axis (φ axis) of the normal vector of the sample surface. Even if the annealing is performed, no clear peak appears as shown in FIG. When φ was scanned with 2θ fixed at around 56° for nO4, the results were as shown in Figure 22(C). As shown in Fig. 1, six peaks are observed that are attributable to crystal planes equivalent to the (110) plane. From the structural analysis using RD, it was found that the orientation of the a-axis and b-axis of CAAC-OS is irregular. It can be confirmed that:

[0275] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with nO4 crystals, a probe was applied parallel to the CAAC-OS surface. When an electron beam with a diameter of 300 nm is incident, a diffraction pattern (control pattern) as shown in FIG. This is also called the limited-area electron diffraction pattern.) may appear. This diffraction pattern includes In The spots are due to the (009) plane of the GaZnO4 crystal. In some cases, the pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is aligned with the surface on which the material is formed. On the other hand, for the same sample, the direction of the sample surface is The diffraction pattern when an electron beam with a probe diameter of 300 nm is incident vertically is shown in Figure 22(E). A ring-shaped diffraction pattern is confirmed in FIG. 22(E). Electron diffraction using an electron beam with a diameter of 300 nm also revealed that the pellets in the CAAC-OS It can be seen that the a-axis and b-axis of the slit have no orientation. The first ring is due to the (010) and (100) planes of the InGaZnO4 crystal. It is considered that the second ring in FIG. 22(E) is due to the (110) plane, etc. It is possible.

[0276] In addition, a transmission electron microscope (TEM) A combined analysis image of the bright-field image and the diffraction pattern of CAAC-OS was obtained using a microscope. (also called high-resolution TEM image), multiple pellets can be confirmed. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries (grain bows), are not clearly visible. In some cases, it may not be possible to clearly identify the CAAC It can be said that the -OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0277] Figure 23(A) shows a high-resolution T The TEM image is shown. For high-resolution TEM imaging, spherical aberration correction is used. The spherical aberration correction function was used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, the atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. It can be observed that.

[0278] From FIG. 23(A), a pellet, which is an area where metal atoms are arranged in layers, can be confirmed. It has been found that the size of a single pellet can be 1 nm or more, or 3 nm or more. Therefore, the pellets are called nanocrystals (nc). CAAC-OS can also be used with CANC (C-Axis Aligned nan The pellets are also called oxide semiconductors with CAAC -OS surface or top surface unevenness, and CAAC-OS surface or top surface unevenness is parallel to the surface.

[0279] In addition, Fig. 23(B) and Fig. 23(C) show CAAC images observed from a direction approximately perpendicular to the sample surface. 23(D) and 23(E) show Cs-corrected high-resolution TEM images of the -OS plane. These are images obtained by processing the images of Fig. 23(B) and Fig. 23(C), respectively. First, the method of converting FIG. 23(B) into a fast Fourier transform (FFT) is Then, the FFT image is obtained by Fourier Transform (FFT) processing. In the FFT image, the origin is used as the reference point, and the distance is 2.8 nm. -1 From 5.0 nm -1 Remaining range between Next, the masked FFT image is subjected to an inverse fast Fourier transform (IFFT: Inverse Fast Fourier Transform (IFFT) processing is used to The image thus obtained is called an FFT filtered image. The filtered image is an image in which periodic components are extracted from a Cs-corrected high-resolution TEM image. The sequence is shown.

[0280] In FIG. 23(D), the area where the lattice arrangement is disturbed is indicated by a dashed line. The area surrounded by the dashed line is The area indicated by the dashed line is the connection between the pellets. The broken line indicates a hexagonal shape, so it can be seen that the pellets are hexagonal. The shape of the dot is not limited to a regular hexagon, and is often a non-regular hexagon.

[0281] In FIG. 23(E), a lattice pattern is formed between an area with a uniform lattice arrangement and an area with a different lattice arrangement. The dotted lines indicate the locations where the orientation of the array changes, and the dashed lines indicate the changes in the orientation of the lattice array. Even in the vicinity of the dotted line, no clear grain boundaries can be identified. When the surrounding lattice points are connected to the center, a distorted hexagon, pentagon, and / or heptagon are formed. In other words, it is clear that the formation of grain boundaries is suppressed by distorting the lattice arrangement. This is because the atomic arrangement of CAAC-OS is not dense in the ab-plane direction and The substitution of metal elements changes the bond distance between atoms, allowing for distortion. This is thought to be because

[0282] As described above, the CAAC-OS has a c-axis orientation and is complex in the ab-plane direction. A number of pellets (nanocrystals) are connected to form a distorted crystal structure. AC-OS, CAA crystal(c-axis-aligned ab-pl It can also be called an oxide semiconductor having an ane-anchored crystal. do.

[0283] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors is improved by the incorporation of impurities. CAAC-OS is a material that can be degraded by impurities and defects ( It can also be said that the oxide semiconductor has few oxygen vacancies.

[0284] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, oxygen is more abundant than metal elements such as silicon that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, thereby changing the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, and nitrogen Carbon oxide and other elements have a large atomic radius (or molecular radius), so they can easily arrange the atoms of oxide semiconductors. This causes the crystallinity to decrease.

[0285] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in an oxide semiconductor can become carrier traps or can displace carriers. For example, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0286] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than a career Such an oxide semiconductor can be a high-purity intrinsic or It is essentially a high-purity intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and In other words, it can be said that the oxide semiconductor has stable characteristics.

[0287] <nc-os> Next, we will explain nc-OS.

[0288] The following describes the case where nc-OS is analyzed by XRD. For example, When structural analysis is performed using the out-of-plane method, no peaks indicating orientation appear. That is, the crystals of the nc-OS do not have any orientation.

[0289] For example, an nc-OS having InGaZnO4 crystals was sliced ​​to a thickness of 34 nm. When an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on the region shown in FIG. A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in (A) was observed. In addition, the diffraction pattern (nm) when an electron beam with a probe diameter of 1 nm was incident on the same sample was The electron diffraction pattern (B) is shown in FIG. 24(B). From FIG. 24(B), a ring-shaped region Therefore, nc-OS has a probe diameter of 50 nm. Although no order was observed by irradiating the electron beam, the order was observed by irradiating the electron beam with a probe diameter of 1 nm. By projecting the images, order is confirmed.

[0290] In addition, when an electron beam with a probe diameter of 1 nm is incident on an area with a thickness of less than 10 nm, As shown in FIG. 24(C), an electron diffraction pattern was observed in which the spots were arranged in a roughly regular hexagonal shape. Therefore, in the range of thickness less than 10 nm, the nc-OS is ordered. It can be seen that the crystals have highly crystalline regions. Therefore, there are some areas where no regular electron diffraction pattern is observed.

[0291] FIG. 24(D) shows the Cs-corrected high resolution image of the cross section of nc-OS observed from a direction approximately parallel to the surface on which the film was formed. The nc-OS is shown in the high-resolution TEM image, with the areas indicated by the auxiliary lines. As shown in Fig. 1, there are areas where crystals can be confirmed, and areas where no clear crystals can be confirmed. The crystal part in the nc-OS has a size of 1 nm to 10 nm. In particular, the size of the crystal part is often between 1 nm and 3 nm. An oxide semiconductor having a diameter of more than 0 nm and less than 100 nm is called a microcrystalline oxide semiconductor. It is sometimes called a crystalline oxide semiconductor. For example, in the case of nc-OS, the grain boundaries may not be clearly identified in high-resolution TEM images. It is possible that the nanocrystals originate from the same source as the pellets in CAAC-OS. Therefore, hereinafter, the crystalline parts of the nc-OS may be referred to as pellets.

[0292] In this way, the nc-OS can be used in microscopic regions (e.g., regions of 1 nm to 10 nm, especially The atomic arrangement has periodicity in the region of 1 nm to 3 nm. There is no regularity in the crystal orientation between different pellets. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous OS. It may be difficult to distinguish it from an oxide semiconductor.

[0293] In addition, since the crystal orientation between pellets (nanocrystals) is not regular, nc-OS is Oxide with RANC (Random Aligned nanocrystals) Semiconductor or NANC (Non-Aligned nanocrystals) In other words, the oxide semiconductor can be called an oxide semiconductor.

[0294] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. , the nc-OS has a higher density of defect states than the CAAC-OS.

[0295] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a conductor.

[0296] Figure 25 shows high-resolution cross-sectional TEM images of the a-like OS. This is a high-resolution cross-sectional TEM image of the a-like OS at the start of electron irradiation. ) is 4.3 × 10 8 e - / nm 2 Electrons (e - ) High a-like OS after irradiation 25(A) and 25(B) show that the a-like OS It can be seen that from the start of electron irradiation, striped bright regions extending in the vertical direction are observed. It can be seen that the shape of the bright regions changes after electron irradiation. It is estimated to be in the degree range.

[0297] Because of the porosity, the a-like OS is an unstable structure. To demonstrate that the OS has a less stable structure compared with CAAC-OS and nc-OS. , shows the change in structure due to electron irradiation.

[0298] The samples prepared were a-like OS, nc-OS, and CAAC-OS. The sample in is also an In-Ga-Zn oxide.

[0299] First, high-resolution cross-sectional TEM images of each sample are obtained. Each of the above has a crystalline portion.

[0300] The unit cell of the InGaZnO4 crystal has three In-O layers and a Ga-Zn- It is known that the structure has a total of nine layers, including six O layers, stacked in layers in the c-axis direction. The spacing between these adjacent layers is the same as the lattice spacing (also called the d value) of the (009) plane. The value is about 0.29 nm, which is determined by crystal structure analysis. In the figure below, the areas where the lattice spacing is between 0.28 nm and 0.30 nm are InGaZn The lattice fringes correspond to the ab plane of the InGaZnO4 crystal. do.

[0301] Figure 26 shows an example of the average size of the crystal parts (22 to 30 places) of each sample. The length of the lattice fringes mentioned above is the size of the crystal part. The crystal part of the OS grows larger according to the cumulative dose of electrons used in obtaining the TEM image. As can be seen from Fig. 26, in the early stages of TEM observation, the size of the particles was about 1.2 nm. The part of the crystal that was a nucleus (also called the initial nucleus) is filled with electrons (e - ) cumulative exposure of 4.2 × 10 8 e - / nm 2 It can be seen that the size of the crystals grows to about 1.9 nm in the nc The cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals in the range from The size of the crystalline parts of the nc-OS and CAAC-OS was The results show that the thicknesses are approximately 1.3 nm and 1.8 nm, respectively. A Hitachi transmission electron microscope H-9000NAR was used for the TEM observations. Electron beam irradiation conditions The acceleration voltage was 300 kV and the current density was 6.7 × 10 5 e - / (nm 2 ·s), irradiation area The diameter was set to 230 nm.

[0302] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, the growth of the crystals in the nc-OS and CAAC-OS was hardly observed by electron irradiation. That is, compared with the nc-OS and CAAC-OS, the a-like OS It is clear that this is an unstable structure.

[0303] In addition, because of the porosity, a-like OS is more resistant to vascular endothelial cell proliferation than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is lower than that of a single crystal of the same composition. The density of nc-OS is 78.6% or more and less than 92.3% of that of CAAC. The density of the -OS is 92.3% or more and less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a density of less than 78% of that of the oxide semiconductor.

[0304] For example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a hexagonal crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 is less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and that of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 is less than.

[0305] If single crystals of the same composition do not exist, single crystals of different compositions can be combined in any ratio. By doing so, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density of a single crystal of a desired composition is calculated by the ratio of the single crystals of different compositions. The density can be estimated by using a weighted average. It is preferable to estimate them together.

[0306] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, an nc-OS, The CAAC-OS may be a laminated film having two or more kinds.

[0307] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0308] (Embodiment 5) In this embodiment, a semiconductor device including a transistor according to one embodiment of the present invention is An example of the circuit will be described.

[0309] <Storage device> The semiconductor device shown in FIG. 27 is different from the semiconductor device shown in FIG. In this case, too, information can be written and read by the same operation as in the semiconductor device shown in FIG. A holding action is possible.

[0310] The reading of data in the semiconductor device shown in FIG. When the capacitor 200 is brought into a conductive state, the wiring 3003 in a floating state and the capacitor element 100 are brought into a conductive state. As a result, the charge is redistributed between the wiring 3003 and the capacitor 100. The amount of change in the potential of the wiring 3003 is the potential of one of the electrodes of the capacitor 100 ( or the charge stored in the capacitance element 100).

[0311] For example, the potential of one of the electrodes of the capacitance element 100 is V, the capacitance of the capacitance element 100 is C, and the wiring 30 The capacitance component of the wiring 3003 is denoted by CB, and the potential of the wiring 3003 before the charge is redistributed is denoted by VB0. Then, the potential of the wiring 3003 after the charge is redistributed is (CB×VB0+C×V) / (C Therefore, the state of the memory cell is one of the electrodes of the capacitor 100. If the electric potential has two states, V1 and V0 (V1>V0), the electric potential V1 is maintained. In this case, the potential of the wiring 3003 (=(CB×VB0+C×V1) / (CB+C)) is the potential V The potential of the wiring 3003 when 0 is held (=(CB×VB0+C×V0) / (CB+ It can be seen that it is higher than C).

[0312] By comparing the potential of the wiring 3003 with a predetermined potential, information can be read out. do.

[0313] In this case, the transistor using the oxide semiconductor is used for the driving circuit for driving the memory cell. A transistor made of another semiconductor is used as the transistor 300 to drive the transistor. It may be configured to be stacked and arranged on the circuit.

[0314] The semiconductor device described above applies a transistor with a small off-current using an oxide semiconductor so that it is possible to retain the stored content over a long period of time. That is, the refresh operation becomes unnecessary, or the frequency of the refresh operation can be made extremely low, so that a semiconductor device with low power consumption can be realized. Also, even in a situation where there is no power supply (however, it is preferable that the potential is fixed), it is possible to retain the stored content over a long period of time.

[0315] In addition, since the semiconductor device does not require a high voltage for writing information, element degradation is less likely to occur. For example, unlike conventional non-volatile memories, electrons are not injected into or extracted from the floating gate, so problems such as insulator degradation do not occur. That is, the semiconductor device according to one aspect of the present invention has no limit on the number of rewritable times, which was a problem in conventional non-volatile memories, and is a semiconductor device with a dramatically improved reliability. Furthermore, since information is written depending on the conductive state and non-conductive state of the transistor, high-speed operation is possible.

[0316] (Embodiment 6) In this embodiment, an example of a CPU including a semiconductor device such as a transistor according to one aspect of the present invention and the above-described memory device will be described.

[0317] <Configuration of CPU> FIG. 28 is a block diagram showing the configuration of an example of a CPU that partially uses the above-described transistor.

[0318] The CPU shown in FIG. 28 includes an ALU 1191 (ALU: Arithmetic Unit) on a board 1190. ic logic unit, arithmetic circuit), ALU controller 1192, instruction A timing decoder 1193, an interrupt controller 1194, and a timing controller 1195, register 1196, register controller 1197, bus interface 1 198, rewritable ROM 1199, and ROM interface 1189 The substrate 1190 may be a semiconductor substrate, an SOI substrate, a glass substrate, or the like. 199 and the ROM interface 1189 may be provided on a separate chip. The CPU shown in FIG. 28 is merely an example showing a simplified configuration. There are many different configurations depending on the application. For example, the CPU or arithmetic circuit shown in FIG. A configuration including the above is considered as one core, and multiple such cores are included, and each core operates in parallel. The number of bits that the CPU can handle in the internal arithmetic circuit and data bus is as follows: For example, it can be 8-bit, 16-bit, 32-bit, 64-bit, etc.

[0319] The instructions input to the CPU via the bus interface 1198 are The signal is input to the decoder 1193, decoded, and then passed to the ALU controller 1192, the interface Rupture Controller 1194, Register Controller 1197, Timing Controller Entered into 1195.

[0320] ALU controller 1192, interrupt controller 1194, register controller The controller 1197 and the timing controller 1195 control various Specifically, the ALU controller 1192 controls the operation of the ALU 1191. The interrupt controller 1194 also generates signals for the CPU program. During system execution, interrupt requests from external I / O devices and peripheral circuits are handled according to their priority and mask. The register controller 1197 determines the address of the register 1196 and processes it. It generates addresses and reads and writes to register 1196 depending on the state of the CPU.

[0321] The timing controller 1195 also includes the ALU 1191 and the ALU controller 119 2, an instruction decoder 1193, an interrupt controller 1194, and It generates a signal to control the operation timing of the register controller 1197. The timing controller 1195 generates an internal clock signal based on the reference clock signal. The internal clock generating unit supplies an internal clock signal to the various circuits described above.

[0322] In the CPU shown in FIG. 28, a register 1196 is provided with a memory cell. The above-mentioned transistors and memory devices can be used as the memory cells of 1196. do.

[0323] In the CPU shown in FIG. 28, the register controller 1197 receives the According to the instruction, the holding operation is selected in the register 1196. In the memory cell of the Select whether to hold data by flip-flops. If the power supply voltage is set to 0, the power supply voltage is supplied to the memory cells in the register 1196. If data retention is selected for the capacitive element, data is rewritten to the capacitive element. This allows the supply of power supply voltage to the memory cells in the register 1196 to be stopped.

[0324] FIG. 29 is a circuit diagram of an example of a storage element 1200 that can be used as the register 1196. The memory element 1200 includes a circuit 1201 in which stored data is volatilized when the power is cut off, and a A circuit 1202 that prevents stored data from volatilizing when the circuit is turned off, a switch 1203, and a switch 1204. 1206, a capacitor 1207, and a circuit 1220 having a selection function. The circuit 1202 includes a capacitor 1208, a transistor 1209, and a transistor 10. The memory element 1200 may include a diode, a resistor, It may further include other elements such as an inductor.

[0325] Here, the above-mentioned memory device can be used for the circuit 1202. When the supply of power supply voltage to the ND (0V) or a potential at which the transistor 1209 is turned off is continuously input. For example, the gate of the transistor 1209 is grounded via a load such as a resistor. .

[0326] The switch 1203 uses a transistor 1213 of one conductivity type (for example, an n-channel type). The switch 1204 is configured as a transistor of the opposite conductivity type (for example, a p-channel type). An example using a transistor 1214 is shown. Here, the first terminal of the switch 1203 The input corresponds to one of the source and drain of the transistor 1213, and the second input of the switch 1203. The terminal of corresponds to the other of the source and drain of the transistor 1213, and the switch 1203 A control signal RD input to the gate of the transistor 1213 switches the first terminal and the second terminal Conduction or non-conduction between the terminals (i.e., the conductive or non-conductive state of the transistor 1213) The first terminal of the switch 1204 is connected to the source and drain of a transistor 1214. The second terminal of the switch 1204 corresponds to one of the drains of the The switch 1204 is connected to the gate of the transistor 1214. A control signal RD is input to the first terminal and the second terminal to establish or break continuity (i.e., The conductive or non-conductive state of transistor 1214 is selected.

[0327] One of the source and drain of the transistor 1209 is connected to a pair of electrodes of the capacitor 1208. The connection part is electrically connected to one of the gate electrodes of the transistor 1210 and the gate of the transistor 1210. The node M2 ​​is connected to the source or drain of the transistor 1210. The other is electrically connected to a wiring (for example, a GND line) that can supply 1203 (one of the source and drain of the transistor 1213). The second terminal of the switch 1203 (the source and drain of the transistor 1213) is connected to the The other terminal of the switch 1204 (one of the source and drain terminals of the transistor 1214) The second terminal of the switch 1204 (the source terminal of the transistor 1214) is electrically connected to the The other of the source and drain terminals is electrically connected to a wiring that can supply the power supply potential VDD. The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213) ) and a first terminal of the switch 1204 (one of the source and drain of the transistor 1214 ), an input terminal of a logic element 1206, and one of a pair of electrodes of a capacitor 1207; are electrically connected. Here, the connection point is referred to as node M1. The other of the electrodes may be configured to have a constant potential input thereto. It can be configured so that a power supply potential (GND, etc.) or a high power supply potential (VDD, etc.) is input. The other of the pair of electrodes of the capacitor 1207 is connected to a line that can supply a low power supply potential. The other of the pair of electrodes of the capacitor 1208 is electrically connected to a line (for example, a GND line). For example, a low power supply potential (GND, etc.) can be input. ) or a high power supply potential (such as VDD) can be input to the capacitance element 120. The other of the pair of electrodes 8 is connected to a wiring capable of supplying a low power supply potential (for example, GND The power supply is electrically connected to the power supply line.

[0328] The capacitors 1207 and 1208 are used to reduce parasitic capacitance of transistors and wirings. It is possible to omit it by making active use of it.

[0329] A control signal WE is input to the gate of the transistor 1209. and the switch 1204 is connected between the first terminal and the second terminal by a control signal RD that is different from the control signal WE. A conductive state or a non-conductive state between the first and second terminals of one switch is selected. When the terminals of the switch are in a conductive state, the first and second terminals of the other switch are in a non-conductive state. It becomes.

[0330] The other of the source and drain of the transistor 1209 is connected to a data register 1204. In FIG. 29, the signal output from the circuit 1201 corresponds to the The example shown is input to the other of the source and drain of the switch 1203. The signal output from the second terminal (the other of the source and drain of the transistor 1213) is The logic value is inverted by the logic element 1206 to become an inverted signal, and the inverted signal is output via the circuit 1220. and input to the circuit 1201.

[0331] In FIG. 29, the second terminal of the switch 1203 (the source and drain of the transistor 1213) The signal output from the other of the two trains is routed through logic element 1206 and circuit 1220. The second terminal of the switch 1203 is connected to the first terminal of the switch 1203. The signal output from the other of the source and drain of the transistor 1213 is inverted. For example, the following may be included in the circuit 1201: When there is a node that holds a signal with the inverted logical value of the signal input from the input terminal The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213) A signal output from the input terminal can be input to the node.

[0332] In addition, in FIG. 29, among the transistors used in the memory element 1200, The transistors other than the transistor 1209 are made of a film or a substrate 119 made of a semiconductor other than an oxide semiconductor. For example, a transistor having a channel formed at 0 can be used. The transistor may have a channel formed in a silicon substrate. All the transistors used in the 1200 are transistors whose channels are formed of oxide semiconductors. Alternatively, the memory element 1200 may include other elements besides the transistor 1209. The other transistors may include a transistor in which the channel is formed of an oxide semiconductor. The transistor has a channel formed in a layer or substrate 1190 made of a semiconductor other than an oxide semiconductor. Alternatively, the transistor may be a transistor having a capacitance of 100 .mu.m.

[0333] For example, a flip-flop circuit can be used for the circuit 1201 in FIG. The logic element 1206 may be, for example, an inverter or a clocked inverter. It is possible.

[0334] In the semiconductor device according to one embodiment of the present invention, while a power supply voltage is not supplied to the memory element 1200, The data stored in the circuit 1201 is transferred to the capacitor 1208 in the circuit 1202. It can be held by

[0335] In addition, a transistor in which a channel is formed in an oxide semiconductor has an extremely small off-state current. For example, the off-state current of a transistor in which a channel is formed in an oxide semiconductor The off-current is significantly lower than that of transistors with a channel formed in silicon. By using this transistor as the transistor 1209, the memory element 120 The signal held in the capacitance element 1208 is maintained for a long period of time even while the power supply voltage is not supplied to the In this way, the memory element 1200 can retain its stored contents (data) even when the supply of power supply voltage is stopped. ) can be held.

[0336] In addition, by providing the switches 1203 and 1204, the precharge operation Since the circuit 1201 is a memory element that performs the above-mentioned operation after the power supply voltage is restarted, This shortens the time it takes to restore the original data.

[0337] In the circuit 1202, the signal held by the capacitor 1208 is The power supply voltage to the memory element 1200 is then restarted. After that, the transistor 1210 The state (conducting or non-conducting) is determined and can be read out from the circuit 1202. Therefore, even if the potential corresponding to the signal held in the capacitance element 1208 fluctuates slightly, the original It is possible to accurately read out the signal.

[0338] Such a memory element 1200 may be a register or a cache memory of a processor. By using it in a storage device, it is possible to prevent data loss in the storage device due to a power supply interruption. In addition, after the supply of power voltage is resumed, the state before the power supply was stopped can be restored in a short time. Therefore, the entire processor, or one or more components of the processor, Since the power supply can be stopped for a short period of time in multiple logic circuits, power consumption can be reduced. It can be suppressed.

[0339] Although the memory element 1200 has been described as being used as a CPU, the memory element 1200 can also be used as a DSP ( Digital Signal Processor), custom LSI, R It can also be applied to FPGA (Radio Frequency) devices. Field Programmable Gate Arrays (CPLDs) Programmable logic devices (PLDs) such as programmable logic devices (PLCs) LSIs such as Logic Devices, RF (Radio Frequency) devices It can also be applied to chairs.

[0340] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0341] (Embodiment 7) In this embodiment, a display device including a transistor according to one embodiment of the present invention will be described. This will be described with reference to FIG. 30 and FIG.

[0342] <Display device configuration> Display elements used in display devices include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, etc. The light-emitting element can be a light-emitting display element. Therefore, the category includes elements whose luminance can be controlled, specifically inorganic EL (Electroluminescent) The following is an example of a display device. Display devices using EL elements (EL display devices) and display devices using liquid crystal elements (liquid crystal display devices) This section explains the display device.

[0343] The display device described below is a panel in which a display element is sealed, and a control circuit is attached to the panel. This includes modules in which ICs including controllers are mounted.

[0344] The display device described below refers to an image display device or a light source (including a lighting device). Also, connectors, such as FPC, modules with TCP attached, and TCP with printers A module or display element with a printed wiring board has an IC (integrated circuit) mounted on it by the COG method. The display device also includes all modules mounted on the display device.

[0345] 30A and 30B are diagrams illustrating an example of an EL display device according to one embodiment of the present invention. FIG. 30(B) is a top view showing the entire EL display device. FIG. 30C is a cross section of the MN corresponding to a part of the dashed line MN in FIG. 30B. .

[0346] FIG. 30A is an example of a circuit diagram of a pixel used in an EL display device.

[0347] In this specification, the terms "active elements" and "passive elements" are used interchangeably. For all terminals of devices (capacitive elements, resistive elements, etc.), the connection destination is not specified. However, a person skilled in the art may be able to configure one aspect of the invention. Even if the destination is not specified, one aspect of the invention is clear. When the contents are described in this specification, etc., one aspect of the invention that does not specify a connection destination is In particular, if the terminal is connected to multiple When multiple locations are anticipated, it is not necessary to limit the connection destination of the terminal to a specific location. Therefore, active elements (transistors, diodes, etc.) and passive elements (capacitive elements, resistive elements) By specifying the connection destinations of only some of the terminals on It may be possible to configure a clear embodiment.

[0348] In this specification and the like, if at least the connection destination of a certain circuit is specified, it is understood by those skilled in the art that If you are a person who has experience in the field of electronics, you may be able to identify the invention. In some cases, a person skilled in the art can identify an invention by at least specifying the function. In other words, if the function is specified, one aspect of the invention is clear. It may be possible to determine that one aspect of the invention is described in the present specification. Therefore, even if the function of a circuit is not specified, if the connection destination is specified, it can be considered as an embodiment of the invention. and can constitute one embodiment of the invention. For a certain circuit, even if the connection destination is not specified, if the function is specified, it can be considered as one aspect of the invention. What is disclosed can constitute an embodiment of the invention.

[0349] The EL display device shown in FIG. 30(A) includes a switch element 743, a transistor 741, and a capacitor. The light emitting element 719 includes a capacitance element 742 and a light emitting element 719 .

[0350] Note that FIG. 30(A) is an example of a circuit configuration, and therefore, if a transistor is further added, Conversely, at each node in FIG. 30(A), it is possible to It is also possible to avoid adding passive elements.

[0351] The gate of the transistor 741 is connected to one end of the switch element 743 and one end of the capacitance element 742. The source of the transistor 741 is electrically connected to the other electrode of the capacitor 742. and is electrically connected to one electrode of the light-emitting element 719. The source of the switch element 741 is supplied with a power supply potential VDD. The other end of the switch element 743 is connected to the signal line 74 The other electrode of the light-emitting element 719 is electrically connected to the light-emitting element 719. A constant potential is applied to the other electrode of the light-emitting element 719. The potential shall be the ground potential GND or a potential lower than that.

[0352] It is preferable to use a transistor as the switch element 743. This allows the pixel area to be reduced, resulting in an EL display device with high resolution. The switch element 743 is a transistor manufactured through the same process as the transistor 741. By using the transistor 74, the productivity of the EL display device can be improved. As the switch element 743, for example, the above-mentioned transistor is applied. It is possible.

[0353] 30B is a top view of the EL display device. The EL display device is made up of a substrate 700 and a substrate 7 50, a sealant 734, a driving circuit 735, a driving circuit 736, a pixel 737, and an FP The sealing material 734 includes the pixel 737, the driving circuit 735, and the driving circuit The driving circuit 735 is disposed between the substrate 700 and the substrate 750 so as to surround the driving circuit 736. Alternatively / and the driving circuit 736 may be disposed outside the sealing material 734 .

[0354] FIG. 30C is a cross-sectional view of an EL display device corresponding to a part of the dashed line MN in FIG. 30B. It is.

[0355] In FIG. 30C, a conductor 705 and a conductor Insulator 701 with 705 embedded therein, insulator 702a on insulator 701, insulator 702b , and an insulator 702c, and a semiconductor 703a, a semiconductor 703b, and A semiconductor 703c, a conductor 707a and a conductor 707b on the semiconductor 703b, and a semiconductor The structure shown has an insulator 706 on 703c and a conductor 704 on the insulator 706. The structure of the transistor 741 is an example and is different from the structure shown in FIG. It's okay.

[0356] Therefore, in the transistor 741 shown in FIG. The insulator 705 functions as a gate electrode, and the insulators 702 and 706 function as gate insulators. The conductor 707a and the conductor 707b function as a source electrode or a drain electrode. The semiconductor 703 functions as an in-electrode. The electrical properties of the semiconductor 703 change when exposed to light. Therefore, at least one of the conductors 705 and 704 is light-shielding. It is preferable that the compound has the following structure:

[0357] In FIG. 30C, a conductor 714a over an insulator 710 and a conductor A structure having an insulator 714b on 714a and a conductor 714c on the insulator 714b is formed. show.

[0358] In the capacitor 742, the conductor 714a functions as one electrode, and the conductor 714c functions as It serves as the other electrode.

[0359] A capacitor 742 shown in FIG. 30C has a large capacitance per occupied area. Therefore, the EL display device shown in FIG. 30(C) has high display quality.

[0360] An insulator 720 is provided over the transistor 741 and the capacitor 742. The insulator 710 is connected between the conductor 707a, which serves as the source of the transistor 741, and the conductor The insulator 720 may have an opening that reaches the conductor 707b. The conductor 781 is electrically connected to the transistor 741 through an opening in the insulator 720. Connected.

[0361] A partition 784 having an opening reaching the conductor 781 is disposed over the conductor 781. A light-emitting layer 782 is disposed on the wall 784 so as to be in contact with the conductor 781 at the opening of the partition wall 784. A conductor 783 is disposed over the light-emitting layer 782. The overlapping region of the conductor 783 becomes the light-emitting element 719 .

[0362] So far, an example of an EL display device has been described. Next, an example of a liquid crystal display device will be described. do.

[0363] FIG. 31(A) is a circuit diagram showing an example of the configuration of a pixel of a liquid crystal display device. The pixel shown in FIG. A transistor 751, a capacitor element 752, and an element in which liquid crystal is filled between a pair of electrodes (liquid crystal The liquid crystal element 753 is also included.

[0364] In the transistor 751, one of the source and the drain is electrically connected to a signal line 755. The gate is electrically connected to the scan line 754.

[0365] In the capacitor 752, one electrode is electrically connected to the other of the source and drain of the transistor 751. The other electrode is electrically connected to a wiring that supplies a common potential.

[0366] In the liquid crystal element 753, one electrode is connected to the other of the source and drain of the transistor 751. The other electrode is electrically connected to a wiring that supplies a common potential. The common potential applied to the wiring to which the other electrode of the capacitor 752 is electrically connected and the common potential applied to the other electrode of the liquid crystal element 753 may be different potentials.

[0367] The liquid crystal display device will be described assuming that the top view is the same as that of the EL display device. A cross-sectional view of the liquid crystal display device corresponding to the dotted-chain line MN is shown in FIG. In this case, the FPC 732 is connected to the wiring 733a via the terminal 731. 3a is a conductor or a semiconductor of the same type as the conductor or semiconductor that constitutes the transistor 751. Alternatively, a semiconductor may be used.

[0368] For the transistor 751, refer to the description of the transistor 741. For 752, refer to the description of the capacitor 742. Although the structure of the capacitor 752 corresponding to the capacitor 742 in (C) is shown, the present invention is not limited to this. stomach.

[0369] Note that when an oxide semiconductor is used as the semiconductor of the transistor 751, the off-state current is extremely small. Therefore, the charge held in the capacitor 752 can be Therefore, the voltage applied to the liquid crystal element 753 can be maintained for a long period of time. Therefore, when displaying a moving image or a still image with little movement, the transistor 751 is turned off. This eliminates the need for power to operate the transistor 751, and the liquid crystal display has low power consumption. In addition, the area occupied by the capacitor 752 can be reduced; It is possible to provide a liquid crystal display device with a high aperture ratio or a high-definition liquid crystal display device.

[0370] An insulator 720 is provided over the transistor 751 and the capacitor 752. A conductor 791 is disposed on the insulating material 720. The conductor 791 is connected to the insulating material 720 through an opening in the insulating material 720. 751.

[0371] An insulator 792 functioning as an alignment film is provided over the conductor 791. A liquid crystal layer 793 is disposed on the liquid crystal layer 793. An insulator 794 that functions as an alignment film is disposed on the liquid crystal layer 793. 94 is disposed on the insulator 794. A spacer 795 is disposed on the insulator 794. A conductor 796 is disposed on the insulator 794. The substrate 79 7 is placed.

[0372] The liquid crystal driving method is TN (Twisted Nematic) mode, ST N (Super Twisted Nematic) mode, IPS (In-Plane -Switching) mode, FFS(Fringe Field Switchin) g) Mode, MVA (Multi-domain Vertical Alignmen) t) mode, PVA (Patterned Vertical Alignment) mode mode, ASV (Advanced Super View) mode, ASM (Axial ly Symmetric aligned Micro-cell) mode, OCB( Optically Compensated Birefringence (Optical Compensated Birefringence) mode, ECB(Electrically Controlled Birefringence) e) mode, FLC (Ferroelectric Liquid Crystal) mode AFLC (AntiFerroelectric Liquid Crystal) ) mode, PDLC (Polymer Dispersed Liquid Crystal al mode, guest host mode, Blue Phase mode, etc. However, the present invention is not limited to this, and various driving methods can be used. can be done.

[0373] By using the above-mentioned structure, it is possible to provide a display device having a capacitance element with a small occupancy area. Alternatively, a display device with high display quality can be provided. It is possible to provide a display device.

[0374] For example, in this specification and the like, the term "display element," "display device having a display element," "light-emitting element," A light-emitting device, which is a device having a light-emitting element and a light-emitting element, can be used in various forms or in various The display element, the display device, the light-emitting element, or the light-emitting device may include, for example, For example, a light-emitting diode (LED) may be used, such as white, red, green, or blue. ting Diode), transistor (transistor that emits light according to electric current), electron Output element, liquid crystal element, electronic ink, electrophoretic element, grating light valve (GLV) , Plasma Display Panels (PDP), MEMS (Micro-Electro-Mechanical Systems) Display elements using a digital micromirror device (DMD), DMS (Digital Micro Shutter), IMOD (Interferometric Modulation motion element, shutter type MEMS display element, optical interference type MEMS display element, Electrowetting elements, piezoelectric ceramic displays, and carbon nanotubes In addition to these, electrical or magnetic The display medium has a contrast, brightness, reflectance, transmittance, etc. that change due to thermal effects. That's fine.

[0375] An example of a display device using an EL element is an EL display. An example of a display device using this method is a field emission display (FED). is a flat panel display using the SED method (SED: Surface-conduction E LCD displays are used in the following applications: An example of the device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). play, reflective LCD, direct-view LCD, projection LCD) An example of a display device using electronic ink or electrophoretic elements is an electronic page. In addition, there are also other LCDs that can realize semi-transmissive and reflective LCD displays. In this case, a part or the whole of the pixel electrode may be made to function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0376] When using an LED, graphene or graphene is placed under the LED electrode or nitride semiconductor. Graphene and graphite can be arranged in layers to form a multilayer film. In this way, by providing graphene or graphite, it is possible to form a nitride on the graphene or graphite. Semiconductors, such as n-type GaN semiconductors having crystals, can be easily formed into films. Furthermore, a p-type GaN semiconductor having crystals can be placed on top of it to form an LED. It is possible to fabricate a crystalline n-type GaN semiconductor using graphene or graphite. An AlN layer may be provided. The GaN semiconductor in the LED is formed by MOCVD. However, by providing graphene, the GaN semiconductor of the LED can be It is also possible to form the film by a tar deposition method.

[0377] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0378] (Embodiment 8) In this embodiment, an electronic device using a transistor according to one embodiment of the present invention will be described. We will explain about this.

[0379] <Electronic equipment> A semiconductor device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium. Image playback devices with advanced functions (typically DVD: Digital Versatile Disc (Devices having a display capable of playing back recording media such as 3D models and displaying the images) In addition, an electronic device in which the semiconductor device according to one embodiment of the present invention can be used Mobile phones, handheld game consoles, portable data terminals, e-book terminals, video cameras , cameras such as digital still cameras, goggle-type displays (head-mounted displays) Ray), navigation systems, audio playback devices (car audio, digital audio players, copiers, fax machines, printers, printer-combiners, automated teller machines Examples of such electronic devices include ATMs and vending machines. vinegar.

[0380] FIG. 32A shows a portable game machine, which includes a housing 901, a housing 902, a display unit 903, and a display unit 904. 904, microphone 905, speaker 906, operation key 907, stylus 908 The portable game machine shown in FIG. 32A has two display units 903 and a display However, the number of display units that the portable game machine has is not limited to this. .

[0381] FIG. 32B shows a portable data terminal, which includes a first housing 911, a second housing 912, and a first display unit 9 13, a second display unit 914, a connection unit 915, an operation key 916, etc. The first display unit 911 is provided in the first housing 911, and the second display unit 914 is provided in the second housing 912. The first housing 911 and the second housing 912 are connected by a connection part 915. The angle between the first housing 911 and the second housing 912 can be changed by the connection part 915. The image on the first display unit 913 is transmitted between the first housing 911 and the second housing 912 at the connection unit 915. 12. Also, the first display unit 913 may be configured to switch according to the angle between the first display unit 913 and the second display unit 913. and a display having a function as a position input device added to at least one of the first and second display units 914. The function of the position input device may be achieved by touching the display device. The function as a position input device can be added by providing a touch panel. It can also be added by providing a photoelectric conversion element, also called a photosensor, in the pixel portion of the display device. It is possible.

[0382] FIG. 32C shows a notebook personal computer, which includes a housing 921, a display unit 922, and a keyboard. The display device 922 includes a keyboard 923, a pointing device 924, and the like.

[0383] FIG. 32(D) shows an electric refrigerator-freezer, which includes a housing 931, a refrigerator compartment door 932, and a freezer compartment door 93. Holds 3rd place.

[0384] FIG. 32E shows a video camera, which includes a first housing 941, a second housing 942, a display unit 943, The operation key 944, the lens 945, the connection part 946, etc. 945 is provided in the first housing 941, and the display unit 943 is provided in the second housing 942. The first housing 941 and the second housing 942 are connected by a connection portion 946. The angle between the first housing 941 and the second housing 942 can be changed by the connection part 946. The image on the display unit 943 is transmitted between the first housing 941 and the second housing 94 at the connection unit 946. 2.

[0385] FIG. 32(F) shows an automobile, which includes a body 951, wheels 952, a dashboard 953, and lights. 954 etc.

[0386] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0387] In the above embodiment, one aspect of the present invention has been described. The embodiments are not limited to these. In other words, various embodiments of the invention are described in the present embodiment and the like. Therefore, one embodiment of the present invention is not limited to a specific embodiment. In one embodiment, the channel forming region, source region, drain region, etc. of a transistor are oxidized. However, the present invention is not limited to this embodiment. Therefore, or depending on the situation, various transistors, transistors, The channel formation region of a transistor, or the source region, drain region, etc. of a transistor, In some cases, or depending on the circumstances, one of the present invention may include a semiconductor. Various transistors, channel forming regions of transistors, or transistors according to the embodiments The source and drain regions of the transistor are made of, for example, silicon, germanium, silicon germanium, Rumanium, silicon carbide, gallium arsenide, aluminum gallium arsenide, indium phosphide , gallium nitride, or an organic semiconductor. For example, in some cases or depending on the situation, various trans A transistor channel forming region, or a source region or drain region of a transistor The insulating region and the like do not necessarily include an oxide semiconductor. [Explanation of symbols]

[0388] 100 Capacitive element 102 Insulators 104 Conductors 104a Conductor 104A conductive film 104b Conductor 104c conductor 112 Insulators 112a Insulator 112b Insulator 116 Conductors 116A conductive film 120 Insulator 122 Insulator 124 Conductors 124a Conductor 124b Conductor 124c conductor 126 Conductors 126a Conductors 126b Conductors 126c conductor 126d Conductors 128 Conductors 128a Conductor 128b Conductor 128c conductor 128d Conductor 190 Resist Mask 200 Transistors 205 Conductors 210 Insulators 212 Insulators 214 Insulators 216 Insulators 218 Conductors 218a Conductor 218b Conductor 218c conductor 220 Insulator 222 Insulators 224 Insulators 230 Oxides 230a Oxide 230b Oxide 230c oxide 240a Conductor 240b conductor 244 Conductors 244a Conductors 244b Conductor 244c conductor 245a area 245b area 246a Conductor 246b Conductor 250 Insulator 260 Conductors 270 Insulators 280 Insulator 282 Insulators 284 Insulators 300 Transistors 301 Substrate 302 Semiconductor area 304 Insulators 306 Conductors 308a Low resistance area 308b Low resistance region 320 Insulator 322 Insulators 324 Insulators 326 Insulators 328 Conductors 328a Conductors 328b Conductor 328c Conductor 330 Conductors 330a Conductor 330b Conductor 330c conductor 350 Insulator 352 Insulator 354 Insulators 356 Conductors 358 Conductors 358a Conductor 358b Conductor 358c conductor 700 Substrates 701 Insulators 702 Insulators 702a Insulator 702b Insulator 702c Insulator 703 Semiconductors 703a Semiconductor 703b Semiconductors 703c Semiconductor 704 Conductors 705 Conductors 706 Insulators 707a Conductor 707b Conductor 710 Insulators 714a Conductor 714b Insulator 714c conductor 719 Light emitting element 720 Insulator 731 Terminal 732 FPC 733a Wiring 734 Sealing material 735 Drive Circuit 736 Drive Circuit 737 pixels 741 Transistor 742 Capacitive element 743 Switching element 744 Signal Line 750 Board 751 Transistor 752 Capacitive element 753 Liquid crystal element 754 scan lines 755 Signal Line 781 Conductors 782 Light-emitting layer 783 Conductors 784 Bulkhead 791 Conductors 792 Insulators 793 Liquid crystal layer 794 Insulators 795 Spacer 796 Conductors 797 Circuit Board 901 Case 902 Case 903 Display section 904 Display section 905 Microphone 906 Speaker 907 Operation Key 908 Stylus 911 Case 912 Case 913 Display section 914 Display section 915 Connection 916 Operation Key 921 Case 922 Display section 923 Keyboard 924 Pointing Device 931 Case 932 Refrigerator door 933 Freezer door 941 Case 942 Case 943 Display section 944 Operation Key 945 Lens 946 Connection 951 Body 952 wheels 953 Dashboard 954 Light 1189 ROM Interface 1190 Board 1191 ALU 1192 ALU Controller 1193 Instruction Decoder 1194 Interrupt Controller 1195 Timing Controller 1196 Registers 1197 Register Controller 1198 Bus Interface 1199 ROM 1200 memory elements 1201 Circuit 1202 Circuit 1203 Switch 1204 Switch 1206 Logic elements 1207 Capacitive element 1208 Capacitive element 1209 Transistor 1210 Transistor 1213 Transistor 1214 Transistor 1220 Circuit 3001 Wiring 3002 Wiring 3003 Wiring 3004 Wiring 3005 Wiring

Claims

[Claim 1] A first transistor is provided on a semiconductor substrate; a second transistor above the first transistor; a capacitance element above the second transistor; the capacitive element includes a first conductor, a second conductor, and an insulator; The semiconductor device according to claim 1, wherein the second conductor covers a side surface of the first conductor via the insulator.

Images