Semiconductor device

Abstract

To provide a semiconductor device with excellent electric characteristics.SOLUTION: The semiconductor device has an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a second insulator in contact with the first insulator. The first insulator has excess oxygen. The second insulator has a function of capturing or fixing hydrogen. The hydrogen in the oxide semiconductor is coupled with the excess oxygen. The hydrogen coupled with the excess oxygen is captured by or fixed to the second insulator through the first insulator. The excess oxygen coupled with hydrogen remains in the first insulator as the excess oxygen.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, and There are cases where the child devices and the like can be said to have semiconductor devices.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. An aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the issue of the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and It is an assembly of semiconductor elements having a memory and on which electrodes that serve as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, such as printed circuit boards. They are mounted on printed wiring boards and used as components in a variety of electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (simply called displays). It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used for this purpose, but other materials include Oxide semiconductors are attracting attention.

[0007] In addition, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). In addition, for example, the leakage current of a transistor using an oxide semiconductor is low. The application of this technology has led to the disclosure of a storage device that can retain stored contents for a long period of time. (See Patent Document 2.)

[0008] In recent years, with the trend towards smaller and lighter electronic devices, there is a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2012-257187 A [Patent Document 2] JP 2011-151383 A Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another embodiment of the present invention provides a semiconductor device having normally-off electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor having a large on-state current. Another object of the present invention is to provide a semiconductor device having high frequency characteristics. Another object of the present invention is to provide a semiconductor device having a micro Another object of the present invention is to provide a semiconductor device that can be easily fabricated or highly integrated. An object of one embodiment of the present invention is to provide a semiconductor device with high productivity.

[0011] One embodiment of the present invention is to provide a semiconductor device capable of retaining data for a long period of time. One object of one embodiment of the present invention is to provide a semiconductor device in which data can be written at a high speed. One object of one embodiment of the present invention is to provide a semiconductor device having high design freedom. One object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. One object of the present invention is to provide a novel semiconductor device. is one of the challenges.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0013] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a first insulator. and a second insulator in contact with the substrate, the first insulator having excess oxygen and the second insulator having water. The hydrogen in the oxide semiconductor combines with the excess oxygen and The hydrogen that combines with the excess oxygen passes through the first insulator and is captured or attached to the second insulator, The excess oxygen combined with hydrogen remains as excess oxygen in the first insulator, forming a semiconductor device.

[0014] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a first insulator. a second insulator in contact with the edge and a third insulator in contact with the second insulator, The first insulator has excess oxygen, the second insulator has the function of capturing or fixing hydrogen, and the third The insulator has a barrier property against hydrogen, and hydrogen in the oxide semiconductor combines with excess oxygen to form the excess The hydrogen that combines with the excess oxygen passes through the first insulator and is captured or attached to the second insulator, The excess oxygen combined with hydrogen remains as excess oxygen in the first insulator, forming a semiconductor device.

[0015] In the above, the third insulator includes silicon nitride.

[0016] In the above, the second insulator includes aluminum oxide.

[0017] In the above, the aluminum oxide is formed by a sputtering method.

[0018] In the above, the oxide semiconductor is an In-Ga-Zn oxide.

[0019] One aspect of the present invention is a memory device including the semiconductor device described above and a capacitor device. It is a vice. Effect of the Invention

[0020] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having high productivity can be provided. An apparatus can be provided.

[0021] Alternatively, a semiconductor device capable of retaining data for a long period of time can be provided. Alternatively, a semiconductor device with a high data writing speed can be provided. It is possible to provide a semiconductor device having a high degree of freedom. It is possible to provide a semiconductor device. Alternatively, it is possible to provide a novel semiconductor device. .

[0022] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these are described in the specification. The above will become apparent from the description, drawings, claims, etc. From the above description, it is possible to extract other effects. [Brief description of the drawings]

[0023] [Figure 1] Cross-sectional view of a laminated structure. [Diagram 2] 1A to 1B are diagrams illustrating a diffusion model in an insulator. [Diagram 3] 1A to 1B are diagrams illustrating a diffusion model in an insulator. [Figure 4] 1A is a top view of a semiconductor device, and FIGS. 1B to 1D are cross-sectional views of the semiconductor device. [Diagram 5] 1A is a top view of a semiconductor device, and FIGS. 1B to 1D are cross-sectional views of the semiconductor device. [Figure 6] 1A is a top view of a semiconductor device, and FIGS. 1B to 1D are cross-sectional views of the semiconductor device. [Figure 7] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 8] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 9] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 10] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 11] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 12] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 13] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 14] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 15] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 16]1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 17] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 18] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 19] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 20] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 21] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 22] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 23] 1A is a top view illustrating a method for manufacturing a semiconductor device, and FIG. 1B to FIG. 1D are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 24] 1A to 1B are cross-sectional views of a semiconductor device. [Diagram 25] FIG. [Figure 26] FIG. 1A is a top view of a semiconductor device, and FIG. [Figure 27] 1A to 1B are cross-sectional views of a semiconductor device. [Figure 28] FIG. [Figure 29] FIG. [Diagram 30] 1A to 1B are cross-sectional views of a semiconductor device. [Diagram 31] (A) Diagram explaining the classification of IGZO crystal structures, (B) Diagram explaining the XRD spectrum of silica glass, (C) Diagram explaining the XRD spectrum of crystalline IGZO. [Diagram 32] FIG. 1 is a cross-sectional view showing a configuration of a storage device. [Diagram 33]FIG. 1 is a cross-sectional view showing a configuration of a storage device. [Diagram 34] FIG. 1 is a cross-sectional view showing a configuration of a storage device. [Diagram 35] FIG. 1 is a cross-sectional view showing a configuration of a storage device. [Diagram 36] FIG. 2 is a diagram showing various storage devices by hierarchy. [Figure 37] 1A and 1B are a block diagram and a perspective view showing a configuration example of a storage device. [Figure 38] 1A to 1H are circuit diagrams showing configuration examples of a memory device. [Figure 39] 1A and 1B are circuit diagrams showing configuration examples of a memory device. [Diagram 40] 1A to 1B are schematic diagrams of a semiconductor device. [Diagram 41] (A) to (E) are schematic diagrams of a memory device. [Diagram 42] 1A to 1C are block diagrams showing configuration examples of a semiconductor device. [Diagram 43] 1A is a block diagram showing a configuration example of a semiconductor device, FIG. 1B is a circuit diagram showing a configuration example of the semiconductor device, and FIG. 1C is a timing chart showing an operation example of the semiconductor device. [Diagram 44] FIG. 1 is a block diagram illustrating a configuration example of a semiconductor device. [Diagram 45] 1A is a circuit diagram showing a configuration example of a semiconductor device, and FIG. 1B is a timing chart showing an operation example of the semiconductor device. [Diagram 46] FIG. 1 is a block diagram showing a semiconductor device. [Figure 47] FIG. 1 is a circuit diagram showing a semiconductor device. [Figure 48] 1A to 1B are schematic diagrams showing examples of electronic components. [Figure 49] 1A to 1F are diagrams showing electronic devices. [Figure 50] (A) Schematic diagram of the sample, (B) TDS analysis results. [Figure 51] Schematic diagram of the sample. [Figure 52] 1A to 1B are diagrams showing the results of SIMS analysis. [Diagram 53] 1A to 1B are diagrams showing the results of SIMS analysis. [Figure 54] FIG. 1 shows the results of SIMS analysis. [Figure 55] 1A to 1C are diagrams illustrating the integral values ​​of hydrogen concentration in each structure. [Figure 56] Schematic diagram of the sample. [Figure 57] 1A to 1B are diagrams showing the results of SIMS analysis of a sample according to an embodiment. [Figure 58] 1A to 1B are diagrams showing the results of SIMS analysis of a sample according to an embodiment. [Figure 59] 1A to 1C are cross-sectional views of a sample. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, the embodiments will be described with reference to the drawings. It is understood that the present invention can be practiced in many different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiment modes.

[0025] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in schematic form, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this is not reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. In addition, when referring to similar functions, In such cases, the hatch patterns may be the same and no particular reference numbers may be used.

[0026] In addition, in particular in top views (also called "plan views") and perspective views, etc., the invention is easily understood. In order to simplify the illustration, some of the components may be omitted. may be omitted.

[0027] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second "the" or "third" can be used as appropriate. The ordinal numbers described herein may not coincide with the ordinal numbers used to identify an aspect of the present invention. There are cases where this is the case.

[0028] In addition, in this specification, the terms "above" and "below" that indicate an arrangement are used to refer to the relationship between components. The positional relationship is used for convenience in describing the drawings. The relationship changes accordingly depending on the direction in which each configuration is depicted. The terms are not limited to those described above, and may be rephrased appropriately depending on the situation.

[0029] For example, in the present specification, it is explicitly stated that X and Y are connected. The cases are when X and Y are electrically connected and when X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification, etc. Therefore, the connection relationship is limited to a specific one, for example, the connection relationship shown in the figure or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. It shall be so.

[0030] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0031] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0032] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the semiconductor device is to be formed (channel formation region) (hereinafter referred to as the "effective channel width") The channel width shown in a top view of a transistor (hereinafter referred to as the apparent channel width) is For example, if the gate covers the side of the semiconductor, , the effective channel width becomes larger than the apparent channel width, and the effect of this becomes negligible. For example, in a miniature transistor where the gate covers the side of the semiconductor, There are cases where the proportion of the channel formation region formed on the side of the semiconductor increases. In that case, , the effective channel width is larger than the apparent channel width.

[0033] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, Channel width is difficult to measure accurately.

[0034] In this specification, when the term "channel width" is used, it refers to the apparent channel width. In this specification, when the term "channel width" is used, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, etc. The channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0035] The impurities in a semiconductor are, for example, substances other than the main components that make up the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. For example, The DOS (Density of States) of the semiconductor increases and the crystallinity decreases. When the semiconductor is an oxide semiconductor, the semiconductor characteristics may be deteriorated. The impurities to be changed include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, for example: Hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Oxides In the case of a semiconductor, water may also function as an impurity. In some cases, oxygen vacancies may be formed due to the inclusion of impurities. In this case, impurities that change the properties of a semiconductor include, for example, oxygen and Group 1 elements excluding hydrogen. , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0036] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains more oxygen than silicon. It has a high nitrogen content.

[0037] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." In addition, the term "conductor" can be replaced with "conductive film" or "conductive layer." In addition, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0038] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes the case where the angle is between -5 degrees and 5 degrees. "Almost parallel" means that the two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. "Perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. " refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0039] In this specification, the term "barrier film" refers to a film that prevents impurities such as water and hydrogen from passing through, and oxygen. If the barrier film is conductive, it is called a conductive barrier. It is sometimes called the a membrane.

[0040] In this specification, the term "metal oxide" refers to metals in a broad sense. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, the Metal oxides are sometimes called oxide semiconductors. In the case of a transistor, a transistor having an oxide or an oxide semiconductor is used. In other words:

[0041] In this specification and the like, normally off means that no potential is applied to the gate, or The current per 1 μm of channel width that flows through a transistor when a ground potential is applied to the gate At room temperature, -20 A or less, 1×10 at 85℃ -18 A or below, or 1×10 at 125℃ -16 This means that it is A or lower.

[0042] (Embodiment 1) An example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described below. The method for producing the same will be described.

[0043] <Configuration Example 1 of Semiconductor Device> 4(A), 4(B), 4(C), and 4(D) are diagrams showing a transmission line according to one embodiment of the present invention. 2A and 2B are a top view and a cross-sectional view of a transistor 200 and the periphery of the transistor 200.

[0044] FIG. 4A is a top view of a semiconductor device including a transistor 200. FIG. 4(B) and FIG. 4(C) are cross-sectional views of the semiconductor device. 4(A) is a cross-sectional view of a portion indicated by a dashed line A1-A2 in FIG. FIG. 4(C) is a cross-sectional view taken along the dashed line A3-A4 in FIG. 4(A). 1 is a cross-sectional view of the portion indicated by the arrow A in FIG. 1 and is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 4(D) is a cross-sectional view of a portion indicated by a dashed line A5-A6 in FIG. In the top view of FIG. 4(A), some elements are omitted for clarity.

[0045] Here, the transistor 200 has a region in which a channel is formed (hereinafter, a channel forming region A metal oxide (hereinafter, oxide semiconductor) that functions as an oxide semiconductor is added to a semiconductor containing the metal oxide. It is preferable to use a conductive material such as a conductor.

[0046] As an oxide semiconductor, for example, In-M-Zn oxide (element M is aluminum, gallium, Al, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Tantalum, tungsten, magnesium, etc.) In addition, the following metal oxides are preferably used as oxide semiconductors: In-Ga oxide, In-Z An n-oxide may also be used.

[0047] The transistor 200 having an oxide semiconductor in a channel formation region is in a non-conducting state. Since the leakage current is extremely small, a semiconductor device with low power consumption can be provided. Conductors can be formed into films using methods such as sputtering, making them ideal for constructing highly integrated semiconductor devices. The transistor 200 may be used.

[0048] On the other hand, in a transistor using an oxide semiconductor, As a result, the electrical characteristics change and the device becomes normally on (when no voltage is applied to the gate electrode). In the case of a transistor with a large current, a channel is present and current flows through the transistor.

[0049] Therefore, an oxide semiconductor in which the impurity concentration and the density of defect states are reduced is preferably used. In this specification and the like, a low impurity concentration and a low defect level density are referred to as high purity intrinsic or or essentially high purity intrinsic.

[0050] Therefore, it is preferable that the impurity concentration in the oxide semiconductor be reduced as much as possible. Impurities in the oxide semiconductor include, for example, hydrogen, nitrogen, alkali metals, alkaline earth metals, and the like. Examples of rare earth metals include iron, nickel, and silicon.

[0051] In particular, hydrogen, an impurity contained in oxide semiconductors, creates oxygen vacancies (V O In addition, oxygen vacancies may form. Defects with hydrogen (hereafter referred to as V O H.) generates electrons that act as carriers. In addition, some of the hydrogen may react with oxygen that bonds with metal atoms and become carriers. It may generate electrons.

[0052] Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is a normally-on transistor. In addition, hydrogen in the oxide semiconductor is easily degraded by stress such as heat or an electric field. Because hydrogen is easily mobile, the reliability of transistors deteriorates when a large amount of hydrogen is contained in an oxide semiconductor. There is also a risk that this may happen.

[0053] Therefore, the oxide semiconductor used in the transistor has impurities such as hydrogen and oxygen vacancies. It is preferable to use a high-purity intrinsic oxide semiconductor having reduced conductivity.

[0054] Therefore, in order to prevent the intrusion of impurities from the outside, materials that suppress the diffusion of impurities (hereinafter The transistor 200 is preferably sealed using a material having a barrier property against impurities. stomach.

[0055] In this specification, the term "barrier property" refers to the function of suppressing the diffusion of a corresponding substance (permeability). Or, the corresponding substance is captured and fixed (gettering). This function is also called "gaming."

[0056] For example, aluminum oxide is a material that has the function of suppressing the diffusion of hydrogen and oxygen. Minium, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride Silicon nitride or silicon oxide nitride, etc. In particular, silicon nitride or silicon oxide nitride Since it has a high barrier property against hydrogen, it is preferable to use it as a sealing material.

[0057] Furthermore, for example, aluminum oxide is used as a material having the function of capturing and fixing hydrogen. Metal oxides such as ZnO, hafnium oxide, gallium oxide, and indium gallium zinc oxide There is.

[0058] Here, the structure for sealing the transistor 200 is a single layer or a laminated structure of two or more layers. In particular, the structure for sealing the transistor 200 may be a laminated structure, more preferably a It is advisable to provide such a structure so that it has a nested structure.

[0059] Specifically, the following description will be given using a case where the structure sealing the transistor 200 has a two-layer structure. The structure for sealing the transistor 200 includes a first insulating layer adjacent to the transistor 200. The transistor has a second structure disposed outside the first structure. The second structure 200 is provided via the first structure.

[0060] In the above-mentioned configuration, the first structure is made of a material having a function of capturing and fixing hydrogen. In addition, the second structure may have a function of suppressing the diffusion of hydrogen and oxygen. It is advisable to use materials that have this function.

[0061] A material having the function of capturing and fixing hydrogen is provided on the side close to the transistor 200. By using the above, in the transistor 200 or between the first structure and the transistor 200 Hydrogen in the interlayer film provided on the first structure is captured and fixed to the first structure, so that the transistor The hydrogen concentration in the catalyst 200 can be reduced.

[0062] Specifically, it is preferable to use aluminum oxide. In particular, aluminum oxide having low crystallinity or Amorphous aluminum oxide has a higher hydrogen trapping and In addition, the amount of adhesion may be large. The hydrogen diffusion property of the silicon is that it diffuses hydrogen when heated. Between the regions with low hydrogen concentration, low-crystalline or amorphous aluminum oxide is placed. When the heat treatment is performed, hydrogen in the region with low hydrogen concentration is circulated through the aluminum oxide. diffuses into the region with higher hydrogen concentration.

[0063] Therefore, the first structure is made of aluminum oxide having low crystallinity or being amorphous. In this case, the transistor 200 may be sealed with the first structure, and then a heat treatment may be performed. By the heat treatment, hydrogen in the transistor 200 is removed from the interlayer film and the oxide film. The aluminum oxide is diffused outward through the transistor 200 and the aluminum oxide. In other words, the hydrogen concentration in the semiconductor device can be reduced. The amount of charge can be reduced.

[0064] On the other hand, the second structure seals the transistor 200 via the first structure. The hydrogen diffused from the outside of the second structure is absorbed by the second structure into the inside of the second structure. In other words, the first structure is prevented from diffusing into the second structure (the transistor 200 side). The hydrogen present in the structure inside the structure can be efficiently captured and fixed. .

[0065] Specifically, the first structure is made of a metal oxide such as aluminum oxide. The first structure may be made of a nitride such as silicon nitride. In the second embodiment, an aluminum oxide film is disposed between the transistor 200 and the silicon nitride film. It is good.

[0066] Furthermore, the hydrogen concentration in the film can be controlled by appropriately setting the film formation conditions for the material used for the structure. can be reduced.

[0067] Generally, films formed using the CVD method have higher thermal conductivity than films formed using the sputtering method. On the other hand, the compound gas used in the CVD method often contains hydrogen, and The film formed by the VD method has a higher hydrogen content than the film formed by the sputtering method. The quantity is large.

[0068] Therefore, for example, a film having a reduced hydrogen concentration in the film adjacent to the transistor 200 may be used. (Specifically, a film formed by sputtering) is preferably used. As a film for suppressing diffusion, a film with high film-forming properties but a relatively high hydrogen concentration in the film (specifically In the case of using a film formed by a CVD method, the hydrogen concentration is compared with that of the transistor 200. The film has high performance and high covering ability, and has the function of capturing and fixing hydrogen. It is advisable to provide a film having a reduced elemental concentration.

[0069] In other words, the film disposed adjacent to the transistor 200 has a relatively low hydrogen concentration. On the other hand, a film having a relatively high hydrogen concentration may be used at a distance from the transistor 200. It is advisable to place them apart.

[0070] Specifically, the transistor 200 is formed of a nitride film formed by using a CVD method. When sealing with a silicon film, the transistor 200 and a nitride film formed by a CVD method are An aluminum oxide film formed by sputtering is placed between the silicon oxide film and the aluminum oxide film. More preferably, the silicon nitride film is formed by a CVD method and the silicon nitride film is formed by a sputtering method. A film was formed by sputtering between the aluminum oxide film formed by the etching method and the aluminum oxide film formed by the sputtering method. It is preferable to dispose a silicon nitride film.

[0071] In addition, when the film is formed by the CVD method, it does not contain hydrogen atoms or the content of hydrogen atoms is By depositing the film using a compound gas with low hydrogen concentration, the hydrogen concentration in the deposited film is reduced. This is also fine.

[0072] A specific configuration for sealing the transistor 200 will be described below with reference to FIG.

[0073] The semiconductor device according to one embodiment of the present invention includes an insulator 211 on a substrate (not shown), an insulator 212 on the insulator 212; an insulator 214 on the insulator 212; and a transistor on the insulator 214. 200, an insulator 280 on the transistor 200, and an insulator 282 on the insulator 280; An insulator 287 covers the side of the insulator 280, and an insulator 282 and an insulator 287 cover the side of the insulator 280. An edge 283, an insulator 284 on the insulator 283, and an insulator provided in contact with the insulator 284. and a body 274.

[0074] In addition, the insulators 211, 212, 214, 280, 282, The insulator 287, the insulator 283, the insulator 284, and the insulator 274 function as interlayer films. .

[0075] Here, when a structure having an excess oxygen region is provided in the vicinity of an oxide semiconductor, The excess oxygen in the structure having the excess oxygen region is diffused into the oxygen vacancies generated in the conductor, The oxygen deficiency can be compensated for.

[0076] In this specification, the oxygen released by heating is sometimes called excess oxygen. Oxygen in excess of the stoichiometric composition is sometimes called excess oxygen. The region where oxygen exists in excess of the stoichiometric composition is also called an excess oxygen region.

[0077] Here, the excess oxygen in the insulator prevents diffusion of hydrogen in the oxide semiconductor in contact with the insulator. This can be an influential factor. The details are explained using Figure 1. The structure shown in Figure 1 The body includes an oxide semiconductor 10 containing hydrogen, an insulator having excess oxygen in contact with the oxide semiconductor 10, and The metal oxide 14 is in contact with the insulator 12. The group atom is the metal atom X.

[0078] Hydrogen present in the oxide semiconductor 10 is absorbed through the insulator 12 in contact with the oxide semiconductor 10. The diffusion of hydrogen occurs when excess oxygen in the insulator 12 is absorbed by the oxide semiconductor. It reacts with hydrogen in 10 to form OH bonds, and diffuses through the insulator 12. Hydrogen with OH bonds When the hydrogen atom reaches the metal oxide 14, it bonds with the metal atom X in the metal oxide 14. The oxygen atoms react with the metal and are captured or fixed in the metal oxide. It is presumed that the oxygen atoms of the excess oxygen that were present remain in the insulator 12 as excess oxygen. In other words, it is likely that the excess oxygen in the insulator 12 plays a bridging role in the diffusion of the hydrogen. Highly sexual.

[0079] In FIG. 4, the oxide semiconductor 10 corresponds to the oxide 230c, and the insulator 12 corresponds to the insulator 230c. Therefore, the insulator 280 in contact with the oxide 230c is heated to convert the oxide It is preferable to remove the element.

[0080] As an insulator having an excess oxygen region, specifically, an oxide insulator in which a part of oxygen is released by heating is used. It is preferable to use oxides that lose some oxygen when heated. Thermal Desorption Spectroscopy (TDS) analysis revealed that oxygen molecules The amount of desorption is 1.0×10 18 molecules / cm 3 More than 1.0×10 19 molecules / cm 3 More preferably, 2.0×10 19 molecu les / cm 3 or more than 3.0×10 20 molecules / cm 3 Acid that is greater than or equal to The surface temperature of the film during the TDS analysis was 100°C or higher and 700°C or higher. °C or lower, or in the range of 100°C to 400°C.

[0081] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, Silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon and Silicon oxide doped with nitrogen and silicon oxide having vacancies can be used. Silicon oxide and silicon oxynitride are preferred because they are stable to heat.

[0082] Thus, the insulator 280 may be silicon oxide, silicon oxynitride, silicon oxynitride, fluorine, or the like. Silicon oxide doped with nitrogen, silicon oxide doped with carbon, and oxide doped with carbon and nitrogen. It is preferable that the insulating layer 100 has a silicon oxide having voids or the like.

[0083] In particular, silicon oxide and silicon oxynitride are suitable for use as the insulator 280 because of their thermal In addition, silicon oxide, silicon oxynitride, and oxide having vacancies are preferred. Materials such as silicon can easily form regions containing oxygen that desorbs when heated. The insulator 280 may also have a laminated structure of the above materials, for example. The silicon oxide film is formed by sputtering, and the CVD film is laminated on top of it. A silicon oxynitride layer may be formed on the silicon oxide layer. Good too.

[0084] To provide an excess oxygen region in the insulator 280, the insulator 280 is provided with an oxygen (at least an oxygen laminar The oxygen-rich region is formed by introducing oxygen into the nucleus. Form.

[0085] Specifically, as an example of the oxygen introduction process, a sputtering apparatus is used on the insulator 280. For example, a method for forming the insulator 282 is to deposit a metal oxide. The insulator 282 is formed by depositing the film under an oxygen gas atmosphere using a sputtering device. While this is happening, oxygen can be introduced into the insulator 280.

[0086] In particular, silicon oxynitride is used as the insulator 280, and aluminum oxide is used as the insulator 282. It is preferable to use silicon oxynitride. By forming an aluminum nitride film, an excess oxygen region is formed in the silicon oxynitride film. It can be formed.

[0087] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. stomach.

[0088] Specifically, when silicon oxide is used for the insulator 280 in contact with the oxide 230, The diffusion behavior of excess oxygen and hydrogen in the insulator 280, and the diffusion behavior of hydroxyl groups This was investigated by quantum molecular dynamics calculations.

[0089] <Calculation model and calculation method> First, a model of the amorphous SiO2 structure (a-SiO2 structure model) was The model with one OH group added to the standard model and one H atom added The calculation was performed using a model in which one oxygen atom was added.

[0090] Specifically, as a reference crystal model, a crystal having multiple gap regions as shown in FIG. The a-SiO2 structure model 20 was used. The model 20 is composed of 24 atoms. .

[0091] The model 24 shown in FIG. 2(B) is a model in which H atoms corresponding to impurities and There are O atoms corresponding to excess oxygen and one O atom in the gap region 21 of the model 20. and one H atom was placed in the gap region 22. Also, the model 26 shown in FIG. In the model 20, OH groups corresponding to impurities are present, and the interstitial region of the model 20 is One OH group was placed in region 21.

[0092] The specific calculation contents are shown below. In addition, the atomic relaxation calculation was performed using the first-principles electronic structure calculation package. Cage VASP (Vienna ab initio simulation pack) The calculation conditions are shown in the table below.

[0093] [Table 1]

[0094] In addition, considering the process temperature, the calculation for 150ps was performed at a temperature of 700K (up to 400℃). was carried out.

[0095] <About diffusion behavior> In model 24 shown in Figure 2(B), immediately after the start of the calculation, the O atom corresponding to the excess oxygen is , it bonds with H atoms, which are impurities, to form hydroxyl groups (OH groups), resulting in amorphous S The OH groups then began to diffuse through the amorphous SiO2 structure. The molecules were observed to diffuse throughout the structure and move between multiple interstitial regions.

[0096] In addition, in the model 26 shown in FIG. 3(A), the OH group is in the amorphous SiO2 The molecules were observed to diffuse throughout the structure and move between multiple interstitial regions.

[0097] Here, FIG. 3(B) shows a schematic diagram visualizing the diffusion behavior between 0 and 50 ps. FIG. 3(B) shows the locus of the central coordinates of the O atom and the H atom in the OH group. The amorphous SiO2 structure is fixed as the initial structure. As shown in the figure, the OH groups are distributed across multiple gap regions (areas surrounded by dotted lines in the figure). It was confirmed that it was spreading.

[0098] From the above, hydrogen present in the oxide semiconductor 10 is absorbed by the insulator 1 The hydrogen diffusion occurs when excess oxygen in the insulator 12 is converted to oxygen. It was confirmed that the hydrogen reacts with the hydrogen in the oxide semiconductor 10 to form OH bonds and diffuses through the insulator 12. came.

[0099] In addition, the insulator 211, the insulator 212, the insulator 214, the insulator 282, the insulator 287, The insulator 283 and the insulator 284 are made of a material having a barrier property against impurities. Therefore, the oxide semiconductor included in the transistor 200 can be kept highly pure and intrinsic.

[0100] Specifically, the insulator 214, the insulator 287, and the insulator 282 form a 0 and the insulator 280 form a sealing structure (hereinafter, also referred to as a sealing structure). For example, As shown in FIG. 4, an insulator 214 is provided under the transistor 200. An insulator 282 is provided above the transistor 200. The side of the transistor 200 is provided with an insulator 287. The sidewall-shaped insulator 287 is provided in a sidewall shape. The upper end of insulator 287 abuts the end of insulator 214 , and the upper end of insulator 287 abuts the end of insulator 282 .

[0101] Here, it is preferable that the insulator 287 and the insulator 214 are in contact with each other reliably. In order to provide an area where the edge 214 and the insulator 287 are in reliable contact with each other, It is preferable to provide an insulator 287 so as to be in contact with the side surface of the insulator 212 .

[0102] Thus, insulator 214, insulator 287, and insulator 282 prevent transistor 20 from It has a structure that surrounds 0.

[0103] Here, the insulators 214, 287, and 282 are made of the same material. In addition, preferably, the deposition method of the insulator 214, the insulator 287, and the insulator 282 is the same. It is preferable to form the insulator 214, the insulator 287, and the like under the same conditions. By contacting the insulator 282, a highly airtight sealing structure can be formed.

[0104] In addition, the insulators 214, 287, and 282 are provided with a hydrogen trapping and solidifying material. It is preferable to use a material that has an adhesive function. Specifically, aluminum oxide, Metal oxides such as hafnium, gallium oxide, and indium gallium zinc oxide are used. This can be done.

[0105] The insulators 214, 287, and 282 that form the encapsulation structure are The insulator 280 is disposed adjacent to the transistor 200. or hydrogen mixed in the insulator 280 is captured and fixed, thereby forming a transistor 200 The hydrogen concentration in the oxide semiconductor can be reduced.

[0106] In addition, the insulator 214, the insulator 287, and the like, which are structures for sealing the transistor 200, The insulator 282 is a sealing structure provided by the insulators 211, 212, and 283. is surrounded by

[0107] For example, as shown in FIG. 4, below the insulator 214, there are an insulator 211 and an insulator 2 12 is placed, and an insulator 283 is provided to cover the insulator 287 and the insulator 282. In addition, the transistor 20 is provided with the insulator 214, the insulator 287, and the insulator 282. The insulator 211 and the insulator 283 are in contact with each other on the outside of the structure sealing the 0, forming a second seal. Form a stop structure.

[0108] Here, the insulators 211, 212 and 283 have a resistance to hydrogen and oxygen. It is preferable to use a material that has a function of suppressing diffusion. In particular, silicon nitride or Silicon oxide has high barrier properties against hydrogen, so it can be used as a sealing material. preferable.

[0109] In addition, an insulating film having high film-covering properties is provided on the upper side of the insulator 283 that covers the upper side of the transistor 200. It is preferable to provide an insulator 284. The insulator 284 is made of the insulators 211 and 212. It is preferable to use the same material as the insulator 283 .

[0110] For example, the insulators 212 and 283 are formed by a sputtering method. The sealing structure can be provided by a film having a relatively low hydrogen concentration therein.

[0111] On the other hand, the film formed by the sputtering method has a relatively low film coverage. The insulating layer 211 and the insulating layer 284 are formed by using a CVD method or the like that has high film-forming properties. This can improve the airtightness.

[0112] Therefore, the insulators 212 and 283 have a higher hydrogen content than the insulators 211 and 284. A low concentration is preferred.

[0113] Preferably, the insulators 211, 212, 214, 282, and The body 287, the insulator 283, and the insulator 284 are made of a material having a barrier property against oxygen. The sealing structure has a barrier property against oxygen, so that the insulator 280 Therefore, the outward diffusion of excess oxygen can be suppressed and the excess oxygen can be efficiently supplied to the transistor 200. Cut.

[0114] In addition, in the semiconductor device of one embodiment of the present invention, The conductor 240 (conductor 240a and conductor 240b) functions as a The insulator 241 (insulator 241a, and an insulator 241b) are provided. Also, on the insulator 284 and the conductor 240, The conductor 246 (conductor 246a) is electrically connected to the conductor 240 and functions as a wiring. , and conductor 246b). Also, on conductor 246 and on insulator 274 An insulator 286 is provided.

[0115] Here, the insulator 272, the insulator 273, the insulator 280, the insulator 282, the insulator 283, In addition, the insulator 241 (insulator 241a, or insulator 241b) is provided, and conductor 240 (conductor 240a, Alternatively, a first conductor of the conductor 240b) is provided, and a second conductor of the conductor 240 is provided on the inner side. An electrical conductor is provided.

[0116] The height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 284 can be made approximately the same. In addition, in the figure, a first conductor of the conductor 240 and a second conductor of the conductor 240 are stacked. However, the present invention is not limited to this configuration. For example, the conductor 24 The insulating film 10 may be provided as a single layer or a laminated structure of three or more layers.

[0117] The conductors 240a and 240b are made of tungsten, copper, or aluminum. It is preferable to use a conductive material mainly composed of rubber. The conductor 240b may have a laminated structure. Although 40b has a circular shape in top view, this is not limited to this. For example, The conductor 240a and the conductor 240b are substantially circular, such as elliptical, or rectangular when viewed from above. or a polygonal shape such as a square with rounded corners.

[0118] In addition, when the conductor 240 has a layered structure, impurities such as water or hydrogen, and oxygen It is preferable to use a conductive material that has a function of suppressing transmission. For example, tantalum, nitride, etc. Tantalum oxide, titanium, titanium nitride, ruthenium, or ruthenium oxide may be used. In addition, it is preferable that the porous membrane has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. The conductive material may be used in a single layer or a multilayer structure. Impurities such as water or hydrogen diffused from the conductor 280 etc. are absorbed in the conductor 240a and the conductor 2 40b, it is possible to further reduce the inclusion of the oxide 230. 280 from being absorbed by the conductors 240a and 240b. This can be done.

[0119] The insulators 241a and 241b may be, for example, silicon nitride or aluminum oxide. An insulator such as silicon nitride oxide or silicon oxynitride may be used. The body 241b is made up of an insulator 274, an insulator 283, an insulator 282, an insulator 280, an insulator 27 3 and insulator 272, water or hydrogen, etc., can be prevented from entering the insulator 280, etc. What impurities are mixed into the oxide 230 through the conductors 240a and 240b? In particular, silicon nitride has a high blocking effect against hydrogen. In addition, the oxygen contained in the insulator 280 is preferably can prevent it from being absorbed into the

[0120] In addition, the conductive material 240a and the conductive material 240b are in contact with each other and function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 shall be made of conductive materials mainly composed of tungsten, copper, or aluminum. The conductor 246 may also be a laminated structure, for example, titanium or The conductor 246 may be a laminate of titanium nitride and the above-mentioned conductive material. The insulating film 12 may be formed so as to be embedded in an opening provided in the insulating film 12 .

[0121] [Transistor 200] As shown in FIG. 4, the transistor 200 includes an insulator 216 and a conductor 205 (conductor 206). 05a, and conductor 205b), insulator 222, insulator 224, and oxide 230 ( oxide 230a, oxide 230b, and oxide 230c) and conductor 242 (conductor 2 42a, and conductor 242b), and oxide 243 (oxide 243a, and oxide 24 3b), an insulator 272, an insulator 273, an insulator 250, and a conductor 260 (conductor 2 60a, and conductor 260b).

[0122] In transistor 200, conductor 260 functions as a first gate of the transistor. The conductor 205 functions as a second gate of the transistor. 2a and the conductor 242b function as a source electrode and a drain electrode.

[0123] The oxide 230 functions as a semiconductor having a channel formation region.

[0124] Insulator 250 serves as the first gate insulator and is connected to insulator 222 and insulator 22. 4 acts as the second gate insulator.

[0125] Here, the transistor 200 shown in FIG. 4 has an opening in an interlayer film such as an insulator 280. Within the insulating layer 250, a conductor 260 is formed in a self-aligned manner through the insulating layer 250.

[0126] That is, the conductor 260 is provided on the interlayer film including the insulator 280 via the insulator 250. Since the opening is filled, the conductive material is not formed in the region between the conductive material 242a and the conductive material 242b. There is no need to align the electric body 260.

[0127] In addition, it is preferable to provide an oxide 230c in an opening provided in the interlayer film including the insulator 280. Therefore, the insulator 250 and the conductor 260 are preferably formed by oxidizing the oxide 230c. The layer structure includes a layered structure of the oxide 230a and a layered structure of the oxide 230b. This makes it possible to form the oxide 230c and the insulator 250 by successive film formation. Therefore, the interface between the oxide 230 and the insulator 250 can be kept clean. The effect of disturbances on carrier conduction is reduced, and the transistor 200 has a high on-state current and It is possible to obtain a higher frequency characteristic.

[0128] In addition, in the transistor 200 shown in FIG. 4, the bottom and side surfaces of the conductor 260 are covered with an insulator 2. 50. Additionally, the bottom and side surfaces of the insulator 250 contact the oxide 230c.

[0129] Also, the transistor 200 may be configured as shown in FIG. 4(B), FIG. 4(C), and FIG. 4(D). In other words, the insulator 282 and the oxide 230c are in direct contact with each other. This makes it possible to suppress the diffusion of oxygen contained in the insulator 280 into the conductor 260. .

[0130] Therefore, the oxygen contained in the insulator 280 is transferred to the oxide 230a and the oxide 230c through the oxide 230c. Since the oxide 230a and the oxide 230b can be efficiently supplied with the oxygen, the oxygen can be efficiently supplied to the oxide 230a and the oxide 230b. The oxygen vacancies in the material 230b are reduced, and the electrical characteristics and reliability of the transistor 200 are improved. It is possible to do so.

[0131] The following describes in detail the configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. This article explains:

[0132] The transistor 200 includes an oxide 230 (oxide 230a, oxide The oxide 230c is provided with a metal oxide (hereinafter It is preferable to use a semiconductor material other than the above-mentioned which is a nitride semiconductor.

[0133] For example, metal oxides that function as oxide semiconductors have an energy gap of 2 eV or more. It is preferable to use an energy gap of 2.5 eV or more. By using a thin metal oxide, the leakage current (on) of the transistor 200 in the non-conducting state is By using such transistors, It is possible to provide a semiconductor device with low power consumption.

[0134] Specifically, the oxide 230 is an In-M-Zn oxide (wherein the element M is aluminum, Gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel Kel, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium One or more selected from the group consisting of tungsten, tantalum, magnesium, etc. In particular, the element M may be an oxide of a metal such as aluminum, gallium, yttrium, or the like. It is preferable to use thorium or tin. In addition, the oxide 230 may be In oxide, In-M Oxide, In-Zn oxide, or M-Zn oxide may be used.

[0135] As shown in FIG. 4, the oxide 230 is formed of an oxide 230a on the insulator 224 and an oxide 230b on the insulator 224. 230b on the oxide 230a, and a second oxide 230c disposed on the oxide 230b and at least partially on the oxide 230b. and an oxide 230c in contact with the upper surface of the oxide 230b. The side of c is made of oxide 243a, oxide 243b, conductor 242a, conductor 242b, and insulator. It is preferable that the insulating material 272, the insulating material 273, and the insulating material 280 are provided in contact with each other.

[0136] That is, the oxide 230 is composed of an oxide 230a, an oxide 230b on the oxide 230a, The oxide 230c is on the oxide 230b. The oxide 230a is placed under the oxide 230b. By having the oxide 230a, the structure formed below the oxide 230a can be prevented from being transferred to the oxide 230b. The diffusion of impurities can be suppressed. By this, impurities from the structure formed above the oxide 230c are transferred to the oxide 230b. It is possible to suppress the diffusion of substances.

[0137] In the transistor 200, the oxide 23 is formed in the channel formation region and in the vicinity thereof. 1 shows a structure in which three layers of oxide 230a, oxide 230b, and oxide 230c are laminated. However, the present invention is not limited to this. For example, a single layer of oxide 230b, oxide 23 a two-layer structure of oxide 230b and oxide 230a, a two-layer structure of oxide 230b and oxide 230c, or For example, the oxide 230c may have a two-layer structure. In this case, a four-layer laminate structure may be provided.

[0138] In addition, the oxide 230 has a laminated structure of multiple oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for the oxide 230a, The atomic ratio of element M in the metal oxide used for oxide 230b is It is preferable that the atomic ratio of the metal oxide used for the oxide 230a is larger than that of the element M. In the oxide 230b, the atomic ratio of element M to In is In the oxide 230b, the atomic ratio of element M to In is preferably larger than that of element M. In the metal oxide used in the present invention, the atomic ratio of In to the element M is In the metal oxide, the atomic ratio of In to the element M is preferably larger than that of In. The oxide 230c is a metal oxide that can be used for the oxide 230a or the oxide 230b. Compounds such as fluorine-containing fluorine compounds can be used.

[0139] Specifically, the oxide 230a is In:Ga:Zn=1:3:4 [atomic ratio], or a composition close to that, or 1:1:0.5 [atomic ratio] or a composition close to that The oxide 230b may be In:Ga:Zn=4:2:3. [atomic ratio] or a composition close to that, or 1:1:1 [atomic ratio] or a composition close to that A metal oxide having a similar composition may be used. = 1:3:4 [atomic ratio] or a composition close to that, In:Ga:Zn = 4:2:3 [atomic ratio] In:Ga:Zn=5:1:3 [atomic ratio] or a composition close to that, Composition in the vicinity, In:Ga:Zn=10:1:3 [atomic ratio] or a composition in the vicinity , Ga:Zn=2:1 [atomic ratio] or a composition close to that, or Ga:Zn=2: 5 [atomic ratio] or a metal oxide having a composition close to that. A specific example of a layered structure of 0c is In:Ga:Zn=4:2:3 [atomic ratio] ] or a composition close to that, and In:Ga:Zn=1:3:4 [atomic ratio] or Layer structure with nearby composition, In:Ga:Zn=4:2:3 [atomic ratio] or nearby and In:Ga:Zn=5:1:3 [atomic ratio] or a stack of compositions close to that. Structure, Ga:Zn=2:1 [atomic ratio] or a composition close to that, and In:Ga:Zn= 4:2:3 [atomic ratio] or a layered structure with a composition close to that, Ga:Zn=2:5 [atomic ratio] In:Ga:Zn=4:2:3 [atomic ratio] or a composition close to that, The layered structure is made up of gallium oxide and In:Ga:Zn=4:2:3 [atomic The composition ratio is preferably in the range of 0.1 to 1.0, and more preferably in the range of 0.1 to 1.0. This includes a range of ±30% of the desired atomic ratio.

[0140] The oxide 230b may have crystallinity. For example, the oxide 230b may have crystallinity. S(c-axis aligned crystalline oxide semic It is preferable to use a crystalline oxide such as CAAC-OS. The material has few impurities and defects (such as oxygen vacancies), is highly crystalline, and has a dense structure. Therefore, the extraction of oxygen from the oxide 230b by the source electrode or the drain electrode In addition, even if a heat treatment is performed, oxygen is not removed from the oxide 230b. Since the transistor 200 can be manufactured at high temperatures ( It is stable against the so-called thermal budget.

[0141] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. Preferably, the conductor 205 is embedded in the insulator 216 .

[0142] Here, the conductor 260 functions as a first gate (also called a top gate). The conductor 205 also functions as a second gate (also called a bottom gate). There are cases.

[0143] When the conductor 205 functions as a gate electrode, the potential applied to the conductor 205 is By changing the potential applied to the transistor 20 independently of the potential applied to the body 260, the In particular, the threshold voltage (Vth) of 0 can be controlled by applying a negative potential to the conductor 205. By applying this, the Vth of the transistor 200 is increased and the off-current is reduced. Therefore, it is better to apply a negative potential to the conductor 205 than not to apply a negative potential to the conductor 205. The drain current when the potential applied to the conductor 260 is 0 V is smaller than that when the potential applied to the conductor 260 is 0 V. can be done.

[0144] As shown in FIG. 4A, the conductor 205 is a conductor 242a of the oxide 230 and It is preferable that the area is larger than the area that does not overlap with the conductor 242b. As shown in Fig. 2C, the conductor 205 is thicker than the end of the oxide 230 that intersects with the channel width direction. It is preferable that the oxide 230 also extends in the outer region. At the outer side of the side in the width direction, the conductor 205 and the conductor 260 are connected with an insulator therebetween. Alternatively, the conductor 205 may be provided large so that the conductor In the plasma processing in the manufacturing process after the formation of the dielectric 205, local charging However, one aspect of the present invention is to alleviate this. The conductor 205 is not limited to the conductor 242a and the conductor 242b. It is sufficient to overlap with the oxide 230 located thereon.

[0145] In addition, with the bottom surface of the insulator 224 as a reference, the oxide 230a and the oxide 230b and the conductor The height of the bottom surface of the conductor 260 in the region where the conductor 260 does not overlap the oxide 230b is It is preferable that the bottom surface of the substrate is located at a position lower than the height of the bottom surface of the substrate.

[0146] As shown in the figure, a conductor 260 acting as a gate is formed on the oxide 2 of the channel forming region. The side and top surfaces of the insulating layer 30b are covered with the oxide 230c and the insulator 250. As a result, the electric field generated from the conductor 260 is distributed throughout the entire channel formation region generated in the oxide 230b. Therefore, the on-current of the transistor 200 is increased, and the frequency characteristic is improved. In this specification, the first gate and the second gate The structure of a transistor in which the channel formation region is electrically surrounded by an electric field is called surro This is called the unded channel (S-channel) structure.

[0147] The conductor 205a has a conductive property that suppresses the permeation of impurities such as water or hydrogen and oxygen. For example, titanium, titanium nitride, tantalum, or tantalum nitride may be used. The conductor 205b can be made of tungsten, copper, or aluminum. It is preferable to use a conductive material having a thickness of 100 μm and a thickness of 100 μm. A multi-layer structure having more than one layer may also be used.

[0148] Here, the oxide semiconductor, the insulator or conductor located under the oxide semiconductor, and the oxide The insulating or conductive material on the upper layer of the oxide semiconductor is separated into different layers without being exposed to the atmosphere. By continuously depositing the seeds, the concentration of impurities (especially hydrogen and water) is reduced, resulting in a substantially high-purity This is preferable because a highly intrinsic oxide semiconductor film can be formed.

[0149] At least one of the insulators 222, 272, and 273 is water or hydrogen. The above impurities are prevented from entering the transistor 200 from the substrate side or from above. Therefore, the insulator 222 and the insulator 223 preferably function as a barrier insulating film. At least one of the insulators 272 and 273 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, Diffusion of impurities such as nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms It is preferable to use an insulating material that has a function of suppressing the impurities (i.e., the impurities are unlikely to permeate). Or, the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use an insulating material having this property (which is difficult for the oxygen to permeate).

[0150] For example, silicon nitride or silicon oxynitride is used as the insulator 273. As the insulating material 272, it is preferable to use aluminum oxide or hafnium oxide. It is.

[0151] As a result, impurities such as water or hydrogen pass through the insulator 222 and enter the transistor from the substrate side. It is possible to suppress the diffusion of the ferroelectric material to the insulator 224. This can suppress the oxygen from diffusing to the substrate side via the insulator 222.

[0152] In addition, impurities such as water or hydrogen are arranged through the insulators 272 and 273. This can suppress the diffusion of the insulating material 280 and the like to the transistor 200 side. In this way, the transistor 200 is protected from impurities such as water or hydrogen, and from the diffusion of oxygen. The structure is surrounded by an insulator 272 having a function of suppressing the noise and an insulator 273. preferable.

[0153] The insulator 222 and the insulator 224 function as gate insulators.

[0154] Here, it is preferable that the insulator 224 in contact with the oxide 230 is heated to release oxygen. In this specification, the oxygen released by heating may be referred to as excess oxygen. The insulator 224 may be made of silicon oxide or silicon oxynitride as appropriate. By providing an insulator containing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 are reduced. Therefore, the reliability of the transistor 200 can be improved.

[0155] Specifically, the insulator 224 is made of an oxide material from which some oxygen is released when heated. It is preferable that the oxides which desorb oxygen by heating are those which are determined by thermal desorption spectrometry (TDS). Thermal Desorption Spectroscopy (TDS) analysis revealed that oxygen The amount of molecules desorbed is 1.0×10 18 molecules / cm 3 More than 1.0x, preferably 10 19 molecules / cm 3 More preferably, 2.0×10 19 mole cules / cm 3 or more than 3.0×10 20 molecules / cm 3 That's all. The surface temperature of the film during the TDS analysis was 100°C or higher for 7 00°C or lower, or in the range of 100°C to 400°C is preferred.

[0156] The insulator 222 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. For example, the insulator 222 is preferably a barrier insulating film that suppresses the Preferably, the insulator 222 has a lower hydrogen permeability than the insulator 224. 3, the insulator 224 and the oxide 230 are surrounded, and water or Impurities such as hydrogen can be prevented from entering the transistor 200 .

[0157] Further, the insulator 222 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). For example, Preferably, the body 222 has a lower oxygen permeability than the insulator 224. The oxide 230 has a function of suppressing the diffusion of impurities and oxygen contained in the insulator 2. This is preferable because it can reduce diffusion below 22. This can suppress reaction with the body 224 and the oxygen contained in the oxide 230.

[0158] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is recommended to use an insulator containing oxide. Insulators containing oxides include aluminum oxide, hafnium oxide, aluminum and hafnium oxide, and It is preferable to use an oxide containing hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 is oxidized by the oxide 230. The emission of hydrogen and the incorporation of impurities such as hydrogen into the oxide 230 from the periphery of the transistor 200 are prevented. It acts as a suppressing layer.

[0159] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. may be added to these insulators. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0160] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT These include so-called high-k materials such as (Ba,Sr)TiO3 (BST) or (Ba,Sr)TiO3 (BST). As miniaturization and high integration of transistors progresses, If the gate insulator is made thinner, problems such as leakage current may occur. By using a high-k material as the insulator, the physical thickness can be maintained while This makes it possible to reduce the gate potential during transistor operation.

[0161] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. good.

[0162] Also, the oxide 230b and the conductor 242 functioning as a source electrode or a drain electrode are (conductor 242a and conductor 242b) and oxide 243 (oxide 243a and The conductor 242 and the oxide 230 may be arranged in such a manner that they are not in contact with each other. Therefore, the conductor 242 can be prevented from absorbing oxygen from the oxide 230. By preventing the oxidation of the conductor 242, the decrease in the conductivity of the conductor 242 can be suppressed. Therefore, it is preferable that the oxide 243 has a function of suppressing the oxidation of the conductor 242. I wish.

[0163] Therefore, it is preferable that the oxide 243 has a function of suppressing the permeation of oxygen. The oxygen is prevented from passing between the conductor 242, which functions as an electrode or a drain electrode, and the oxide 230b. By disposing the oxide 243 having the function of suppressing the electric field, the conductor 242 and the oxide 230b This is preferable because it reduces the electrical resistance between the transistor and the The electrical characteristics and reliability of the transistor 200 can be improved.

[0164] The oxide 243 may be a metal oxide having an element M. In particular, the element M is Aluminum, gallium, yttrium, or tin may be used. Oxide 243 is It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or less. The thickness is preferably at most 5 nm, and more preferably at least 1 nm and at most 3 nm. It is preferable that the oxide 243 has crystallinity. When the oxide 243 has crystallinity, the oxide 23 The release of oxygen from the oxide 243 can be effectively suppressed. In the case of a crystalline structure such as a crystalline structure, the release of oxygen in the oxide 230 may be suppressed.

[0165] The oxide 243 is not necessarily provided. In that case, the conductor 242 (conductor 2 When the oxide 230 comes into contact with the conductor 242a and the conductor 242b, the oxide in the oxide 230 The hydrogen may diffuse into the conductor 242, causing the conductor 242 to oxidize. As a result, the conductivity of the conductor 242 is likely to decrease. The conductor 242 absorbs the oxygen in the oxide 230. This can be rephrased.

[0166] In addition, oxygen in the oxide 230 is converted into conductor 242 (conductor 242a and conductor 242b ) between the conductor 242a and the oxide 230b and between the conductor 242b A foreign layer may be formed between the conductor 242 and the oxide 230b. Since the layer also contains a large amount of oxygen, it is presumed that the layer has insulating properties. The three-layer structure of the oxide 230b, the hetero layer, and the oxide 230b is a three-layer structure consisting of a metal, an insulator, and a semiconductor. It can be considered as a MIS (Metal-Insulator-Semiconductor) structure. In some cases, this is called a diode junction structure, or a MIS structure. be.

[0167] The above-mentioned different layer is not limited to being formed between the conductor 242 and the oxide 230b. For example, a different layer may be formed between the conductor 242 and the oxide 230c, or between the conductor 242 and the oxide 230c. 42 and oxide 230b, and between conductor 242 and oxide 230c. There are cases.

[0168] On the oxide 243, a conductor 242 ( The conductor 242 has a thickness of, for example, , 1 nm or more and 50 nm or less, preferably 2 nm or more and 25 nm or less.

[0169] The conductor 242 may be aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, etc. Ru, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metal element selected from rontium and lanthanum, or an alloy containing the above metal elements Alternatively, it is preferable to use an alloy of the above-mentioned metal elements. For example, titanium nitride tantalum, titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum oxide, titanium nitride, titanium and aluminum nitride, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, and oxides containing strontium and ruthenium. The oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize or absorb oxygen. This is preferable because it is a material that maintains its conductivity even when absorbed.

[0170] The insulator 272 is provided in contact with the upper surface of the conductor 242 and functions as a barrier layer. With this configuration, the conductor 242 can effectively suppress the overcurrent of the insulator 280. Absorption of excess oxygen can be suppressed. In addition, by suppressing oxidation of the conductor 242, It is possible to suppress an increase in the contact resistance between the transistor 200 and the wiring. This can provide the transistor 200 with good electrical characteristics and reliability.

[0171] Therefore, it is preferable that the insulator 272 has a function of suppressing the diffusion of oxygen. For example, Preferably, the insulator 272 is more effective at suppressing oxygen diffusion than the insulator 280. The body 272 may be, for example, an oxide of aluminum or hafnium or both. The insulator 272 may be, for example, aluminum nitride. An insulator containing the above may be used.

[0172] As shown in FIGS. 4B and 4D, the insulator 272 is formed on a part of the upper surface of the conductor 242b and The insulator 272 is in contact with the side surfaces of the conductor 242a and the conductor 242b. The insulator 272 is in contact with the side of the conductor 242a. In this way, for example, oxygen added to the insulator 280 is absorbed into the conductor 2 It is possible to suppress absorption by 42.

[0173] The insulator 250 functions as a gate insulator. The insulator 250 is formed on the oxide 230c. The insulator 250 is preferably disposed in contact with the surface. , silicon oxynitride, silicon nitride, silicon oxide doped with fluorine, and oxide doped with carbon. Silicon oxide doped with carbon and nitrogen, and silicon oxide with vacancies were used. In particular, silicon oxide and silicon oxynitride are stable against heat. This is preferable.

[0174] Like the insulator 224, the insulator 250 is made of an insulator that releases oxygen when heated. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing it in contact with the upper surface of the oxide 230c, the channel forming region of the oxide 230b In addition, the insulator 250 can effectively supply oxygen to the insulator 224. It is preferable that the concentration of impurities such as water or hydrogen is reduced. , preferably 1 nm or more and 20 nm or less.

[0175] A metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen from the insulator 250 to the conductor 260, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0176] The metal oxide may also function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, the metal oxide It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant, as the oxide. By making the base insulator have a laminated structure of the insulator 250 and the metal oxide, the base insulator is stable against heat. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0177] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, tantalum, tin, titanium, tantalum, nickel, germanium, magnesium, etc. The metal oxide may contain one or more metals selected from the following: Aluminum oxide, an insulator containing oxides of either or both of aluminum and hafnium Aluminum, hafnium oxide, oxides containing aluminum and hafnium (hafnium oxide) It is preferable to use a material such as a laminate.

[0178] Alternatively, the metal oxide may function as a part of the gate. In the above, it is preferable to provide a conductive material containing oxygen on the channel formation region side. By providing the conductive material on the channel formation region side, oxygen released from the conductive material forms a channel. This makes it easier for the area to be supplied.

[0179] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used. Indium tin oxide, tungsten oxide, etc. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide doped with silicon may also be used. The use of such a material allows the channel to be formed. In some cases, hydrogen can be captured from the metal oxide that is formed. It may be possible to capture hydrogen that is mixed in through insulators, etc.

[0180] Although the conductor 260 is shown as having a two-layer structure in FIG. 4, it may have a single layer structure or a structure having three or more layers. The above laminated structure may also be used.

[0181] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N2O, NO, NO2, etc.), conductive material with the function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having a function of suppressing the diffusion of at least one of the above-mentioned elements.

[0182] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can suppress the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum, nitride, and the like. It is preferable to use tantalum chloride, ruthenium, ruthenium oxide, or the like.

[0183] The conductor 260b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material, such as tungsten, copper, or aluminum. The conductive material 260b may be a laminated material. For example, a laminate structure of titanium or titanium nitride and the above conductive material may be used. good.

[0184] <<Modification 1 of the semiconductor device>> Hereinafter, a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described with reference to FIG. An example of the device will be described.

[0185] Here, FIG. 5(A) shows a top view. FIG. 5(B) shows the A1-A FIG. 5(C) is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 5(A) is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 5(A) is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in FIG. 1, some elements are omitted for clarity of illustration.

[0186] The semiconductor device shown in FIG. 5 is different from the semiconductor device shown in FIG. 4 in that an insulator 212 and an insulator 283 are Specifically, the insulator 212 is in contact with the lower part of the insulator 273. In addition, the insulator 212 may be provided so as to overlap the transistor 200. The thickness of the folded region may be thicker than the region in contact with the insulator 283 .

[0187] <<Modification 2 of Semiconductor Device>> Hereinafter, a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described with reference to FIG. An example of the device will be described.

[0188] Here, Fig. 6(A) shows a top view. Fig. 6(B) shows the A1-A FIG. 6(C) is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 6(A) is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 6(A) is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in FIG. 1, some elements are omitted for clarity of illustration.

[0189] For example, as shown in FIG. 6, the insulator 211 and the insulator 284 are each formed of a material that does not contain hydrogen atoms. When forming a film by CVD using a compound gas that is low in hydrogen or has a low hydrogen atom content , insulator 212, and insulator 284 are not necessarily required.

[0190] For example, a compound gas that does not contain hydrogen atoms or has a low hydrogen atom content is used. , the insulator 211, the insulator 212, the insulator 283, and the insulator 284 are formed by a CVD method. That is, the insulator 211, the insulator 212, the insulator 283, and The concentration of hydrogen contained in the insulator 284 is reduced, and the hydrogen is mixed into the channel formation region of the oxide semiconductor. Hydrogen may be reduced.

[0191] For example, in the deposition of a film containing silicon atoms, such as a silicon nitride film, the deposition gas is silicon. Gases with molecules containing hydrogen atoms are mainly used. In order to achieve this, it is preferable that the molecule containing the silicon atom contains a small number of hydrogen atoms. It is more preferable that the molecule containing silicon atoms does not contain hydrogen atoms. It is preferable that the deposition gas other than the gas having molecules containing hydrogen atoms contains a small amount of hydrogen atoms. It is preferable that the alkyl group does not contain hydrogen atoms.

[0192] The above silicon-containing molecule is called Si x -R y For example, the functional group R is The isocyanate group (-N=C=O), the cyanate group (-OC≡N), the cyano group (- C≡N), diazo group (=N2), azide group (-N3), nitroso group (-NO), and nitroso group (-NO). At least one of the nitro groups (-NO2) can be used. For example, 1≦x≦3, 1≦ The following formula should be satisfied: y≦8. Examples of molecules that contain silicon atoms include tetraisopropyl ether. Socyanate silane, tetracyanate silane, tetracyanosilane, hexaisocyanate The silicone isocyanate silane, octaisocyanate silane, etc. can be used. Although a molecule in which the same type of functional group is bonded to an atom is illustrated, the present embodiment is not limited to this. However, it is also possible to have a structure in which different types of functional groups are bonded to silicon atoms.

[0193] In addition, for example, a halogen (Cl, Br, I, or F) is used as the functional group R. For example, 1≦x≦2 and 1≦y≦6 may be satisfied. Examples of molecules containing Although an example of using chlorine as a functional group is shown, other functional groups besides chlorine can be used. In addition, halogens such as bromine, iodine, and fluorine may be used as functional groups. The atoms may be configured to have different types of halogens bonded thereto.

[0194] The insulators 211, 212, 283, and 284 are formed as described above. Chemical vapor deposition (CVD) is a process that uses gases that contain molecules containing silicon atoms. The CVD method is a method for forming a thin film. Since the speed is relatively fast, this method is suitable for forming a thick insulating film.

[0195] As a CVD method, plasma CVD (PECVD: Plasma ECVD) is a method that uses plasma. enhanced CVD method, or thermal CVD (TCVD) It is preferable to use the thermal CVD method. When using the thermal CVD method, the film is formed under atmospheric pressure. Now Atmospheric Pressure CVD (APCVD) method Alternatively, low pressure CVD (LPCVD: Low Pressure) may be used, which performs film formation under reduced pressure lower than atmospheric pressure. The low pressure CVD method may also be used.

[0196] The insulators 211, 212, 283, and 284 are formed by using a CVD method. When forming a film, it is preferable to use an oxidizing agent. Examples of oxidizing agents include O2, O3, NO, and N O2, N2O, N2O3, N2O4, N2O5, CO, CO2, etc. that do not contain hydrogen atoms It is preferable to use a gas having a low viscosity.

[0197] The insulators 211, 212, 283, and 284 are formed by the following method. It may be performed by the LD (Atomic Layer Deposition) method. In the LD method, the first source gas for the reaction (hereinafter referred to as the precursor, metal precursor) is The reactant gas is a reactant gas. (also called non-metallic precursors) are alternately introduced into the chamber, and these The film is formed by repeatedly introducing the source gas.

[0198] The ALD method uses a self-regulating atomic property to form a film by switching the source gas. Therefore, the ALD method is suitable for the deposition of ultra-thin films. , deposition on structures with high aspect ratios, deposition with few defects such as pinholes, and coating properties For this reason, the ALD method can form a film having excellent properties. In addition to the insulators 283 and 284, the transistor 200 also includes insulators 250 and is suitable for depositing the insulator 224.

[0199] The ALD method uses thermal A, which reacts precursors and reactants using only thermal energy. The LD (Thermal ALD) method can be used, or a plasma-excited reactant can be used. Alternatively, a plasma enhanced ALD (PEALD) method using a tungsten carbide may be used.

[0200] When the ALD method is used, a gas having a molecule containing a silicon atom is used as a precursor. The oxidizing agent may be used as a reactant. The amount of hydrogen trapped in insulator 274, insulator 280, insulator 224, and insulator 250 can be significantly reduced.

[0201] In the above, an example was shown in which the molecule containing silicon atoms does not contain hydrogen atoms. However, the present embodiment is not limited to this. In the above-mentioned molecule containing silicon atoms, A part of the functional group bonded to the silicon atom may be replaced with a hydrogen atom. The above silicon-containing molecules contain fewer hydrogen atoms than silane (SiH4). In other words, the above-mentioned silicon atom-containing molecule preferably has three atoms per silicon atom. It is preferable that the molecule has a hydrogen atom less than or equal to the silicon atom. It is more preferred if the gas has 3 or less hydrogen atoms per silicon atom.

[0202] As described above, insulator 21 is formed by the film forming method using a gas in which hydrogen atoms are reduced or removed. 1. At least one of the insulator 212, the insulator 283, and the insulator 284 is deposited. This can reduce the amount of hydrogen contained in these insulators.

[0203] Thus, the transistor 200 and the insulator 280 are capable of trapping impurities such as hydrogen and The first sealing structure is made of a material that adheres to the substrate, and the second sealing structure is made of a material that suppresses the diffusion of impurities such as hydrogen. By using the second sealing structure, a double sealing structure is formed, and the sealed area The hydrogen concentration in the insulator 283 and the insulator 21 are reduced, and hydrogen mixed in from the outside is prevented from entering the insulator 283 and the insulator 21. It can be reduced by 2.

[0204] <<Metal oxides>> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Metal oxides applicable to the oxide 230 according to the present invention will be described below.

[0205] The metal oxide preferably contains at least indium or zinc. In addition to these, gallium, yttrium, and zinc are preferably included. It is preferable that the alloy contains boron, titanium, iron, nickel, germanium, etc. nium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum Contains one or more of the following: tungsten, magnesium, etc. Good too.

[0206] Here, the metal oxide is an In-M-Zn oxide having indium, element M and zinc. The element M can be aluminum, gallium, yttrium, or The element M is tin. Other elements that can be used for M include boron, titanium, iron, and nickel. Ru, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium However, the element M is the same as above. In some cases, a combination of multiple elements may be acceptable.

[0207] In this specification, metal oxides containing nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0208] [Metal oxide composition] CA, which is a metal oxide that can be used in a transistor disclosed in one embodiment of the present invention, C-OS(Cloud-Aligned Composite Oxide Semiconductor) onductor), and CAAC-OS(c-axis Aligned Cryst This paper explains the structure of a GaN-based oxide semiconductor (GaN-based

[0209] CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. A part of the material has an insulating function, and the whole material has a semiconductor function. In addition, CAC-OS or CAC-metal oxide is used as the active layer of a transistor. When used in a material, the function of conductivity is to allow electrons (or holes) to flow as carriers, and The insulating function is the function of preventing the flow of electrons that act as carriers. By making the two functions work in a complementary manner, a switching function (On / Off) is realized. The function of providing a CAC-OS or CAC-metal oxide with a In CAC-OS or CAC-metal oxide, the functions are separated. By combining them, the functions of both can be maximized.

[0210] In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive and insulating regions in the material are formed at the nanoparticle level. In addition, the conductive and insulating regions may be separated by a metal. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. There may be cases where this occurs.

[0211] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and an insulating region are The peripheral region is 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. The following sizes may be present in the material:

[0212] In addition, CAC-OS and CAC-metal oxide have different band gaps. For example, CAC-OS or CAC-metal oxide e is a component with a wide gap due to the insulating region and a component with a narrow gap due to the conductive region. In the case of this configuration, when a carrier is caused to flow, In the component with a narrow gap, carriers mainly flow. The component having a narrow gap acts complementary to the component having a wide gap. In conjunction with the component, carriers also flow to the component with a wide gap. C-OS or CAC-metal oxide is used for the channel formation region of a transistor. In this case, the transistor has a high current driving capability in the on-state, i.e., a large on-current, and High field effect mobility can be obtained.

[0213] That is, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite It can also be called atrix composite.

[0214] [Metal oxide structures] Oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis all-crystalline oxide semiconductor) igned crystalline oxide semiconductor), Crystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor) iconductor), pseudo-amorphous oxide semiconductor (a-like OS:amorph crystalline-like oxide semiconductor and amorphous oxide semiconductor etc.

[0215] In addition, when focusing on the crystal structure, oxide semiconductors may be classified differently from the above. Here, the classification of crystal structures of oxide semiconductors will be described with reference to FIG. FIG. 31A shows a GaN-GaN thin film transistor (GaN-GaN thin film transistor) using an oxide semiconductor, typically IGZO (In, Ga, Zn FIG. 2 is a diagram for explaining the classification of crystal structures of metal oxides containing

[0216] As shown in Figure 31(A), IGZO is roughly divided into Amorphous and Cry They are classified into stalline and crystal. Also, among amorphous Completely amorphous is also included. Among the ine, CAAC (c-axis aligned crystalline) , nc (nanocrystalline), and CAC (Cloud-Aligned In addition, Crystal includes single c Includes crystal, quartz, and poly crystal.

[0217] The structure within the bold frame in Figure 31(A) is a new crystalline phas This structure belongs to the se group. This structure is between Amorphous and Crystal. It is in the boundary region. That is, it is between the energetically unstable Amorphous and the Cryst In other words, it has a structure completely different from alline.

[0218] The crystal structure of the film or substrate was determined by X-ray diffraction (XRD). The evaluation can be performed using the ion image. XRD scan of IGZO (also called crystalline IGZO) with a crystal structure classified as ine The spectra are shown in Figures 31(B) and (C). Figure 31(B) shows quartz glass, and Figure 31(C) shows ) is the XRD spectrum of crystalline IGZO. The composition of O is In:Ga:Zn=4:2:3 [atomic ratio]. The crystalline IGZO shown in C) has a thickness of 500 nm.

[0219] As shown by the arrow in FIG. 31(B), the peaks in the XRD spectrum of the quartz glass are almost the same. On the other hand, as shown by the arrow in Figure 31(C), crystalline IGZO has a The asymmetric peak of the XRD spectrum indicates that the crystal In other words, if the peaks in the XRD spectrum are not symmetrical, the It cannot be said that the material (here, crystalline IGZO) is amorphous.

[0220] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The nanocrystals are connected together to form a distorted crystal structure. In a region, a lattice arrangement is formed between a region having a uniform lattice arrangement and another region having a uniform lattice arrangement. This refers to the point where the direction of the

[0221] Nanocrystals are basically hexagonal, but are not limited to regular hexagons and may have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in the CAAC-OS, clear grain boundaries (grain bows) were observed even in the vicinity of the strain. It is difficult to confirm the presence of the lattice distortion. This is because the CAAC-OS has ab-plane orientation. In the case of the SiO2, the arrangement of oxygen atoms is not dense, and the bond distance between atoms is reduced by the substitution of metal elements. This is because distortion can be tolerated due to changes in the distance, etc.

[0222] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter, the In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M tend to have a layered structure. When the element M in the (M,Zn) layer is replaced with indium, (In,M,Zn ) layer. Also, when the indium in the In layer is replaced with the element M, (In, M) layer.

[0223] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides is reduced by the incorporation of impurities and the generation of defects. Therefore, CAAC-OS is a metal oxide with few impurities and defects (oxygen vacancies, etc.). Therefore, the physical properties of metal oxides having CAAC-OS are stable. Therefore, metal oxides with CAAC-OS are heat-resistant and highly reliable.

[0224] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. Sometimes it is indistinguishable from the body.

[0225] In addition, In-, a type of metal oxide containing indium, gallium, and zinc, Ga-Zn oxide (hereinafter referred to as IGZO) has a stable structure when made into the above-mentioned nanocrystals. In particular, IGZO tends to have difficulty growing crystals in the air, so large crystals may form. A crystal smaller than a crystal (here, a crystal of a few mm or a crystal of a few cm) (for example, the above-mentioned In some cases, a more stable structure may be obtained by forming the material into a nanocrystal.

[0226] The a-like OS is a metal oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has voids or low density regions. The ke-OS has a lower crystallinity than the nc-OS and CAAC-OS.

[0227] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention can be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more kinds.

[0228] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0229] When impurities are introduced into an oxide semiconductor, defect states or oxygen vacancies may be formed. Therefore, when impurities are mixed into the channel formation region of the oxide semiconductor, The electrical characteristics of the transistors used are likely to fluctuate, which may result in poor reliability. If the channel formation region contains oxygen vacancies, the transistor will have normally-on characteristics. Cheap.

[0230] The defect levels may include trap levels. Charges trapped in the levels take a long time to dissipate, and are treated as if they were fixed charges. Therefore, metal oxide with high trap state density is used for the channel formation region. A transistor having such a structure may have unstable electrical characteristics.

[0231] Furthermore, when impurities are present in a channel formation region of an oxide semiconductor, the junction The crystallinity of the oxide provided in contact with the channel formation region may be reduced. If the crystallinity of the channel formation region is low, the stability or In addition, the oxide formed in contact with the channel forming region tends to deteriorate the reliability. Poor crystallinity may result in the formation of interface states, which may deteriorate the stability or reliability of the transistor. There is.

[0232] Therefore, in order to improve the stability or reliability of a transistor, It is effective to reduce the impurity concentration in the channel forming region and its vicinity. Examples of the elements include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0233] Specifically, in the channel formation region of the oxide semiconductor and in its vicinity, The concentration of the above impurities obtained by 18 atoms / cm 3 Hereinafter, preferably 2×10 16 atoms / cm 3 Alternatively, a channel of the oxide semiconductor may be formed as follows. The concentration of the above impurities obtained by elemental analysis using EDX in the region and its vicinity The oxide semiconductor is an oxide semiconductor containing an element M. In the case of using an oxide semiconductor, the element M The concentration ratio of the above impurities to is less than 0.10, preferably less than 0.05. The concentration of element M used in calculating the above concentration ratio is the region in which the concentration of the impurity is calculated. The concentration may be the concentration in the same region or the concentration in the oxide semiconductor.

[0234] In addition, metal oxides with reduced impurity concentrations have a low defect level density, so the trap level density is low. The degree may also be lower.

[0235] In addition, when hydrogen enters an oxygen vacancy in a metal oxide, the oxygen vacancy and hydrogen combine to form V O H VO H acts as a donor, and electrons, which act as carriers, are generated. In addition, some of the hydrogen may bond with oxygen, which bonds with metal atoms, and become carriers. It may generate children.

[0236] Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is a normally-on transistor. In addition, hydrogen in the oxide semiconductor is easily degraded by stress such as heat or an electric field. Because hydrogen is easily mobile, the reliability of transistors deteriorates when a large amount of hydrogen is contained in an oxide semiconductor. There is also a risk that this may happen.

[0237] In other words, V in the oxide semiconductor O Reduce H as much as possible and use high-purity intrinsic or substantially high-purity It is preferable to make the V O Obtain an oxide semiconductor with sufficiently reduced H In order to achieve this, it is necessary to remove impurities such as moisture and hydrogen from the oxide semiconductor (dehydration and dehydrogenation treatments). ) and supplying oxygen to the oxide semiconductor to compensate for oxygen vacancies (addition This is sometimes referred to as oxygenation treatment. O H and impurities are sufficiently reduced By using this oxide semiconductor in the channel formation region of a transistor, stable electrical characteristics can be achieved. can be granted.

[0238] In addition, the transistor is preferably formed using an oxide semiconductor with a low carrier concentration. In order to reduce the carrier concentration of an oxide semiconductor, the impurity concentration in the oxide semiconductor is In the present specification and the like, the impurity concentration is low and the defect level density is low. A state having a low density of states is called a high-purity intrinsic state or a substantially high-purity intrinsic state. Impurities in the steel include, for example, hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, etc. Kel, silicon, etc.

[0239] In particular, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. Therefore, oxygen vacancies may be formed in the oxide semiconductor. If oxygen vacancies are present in the region, the transistor may have normally-on characteristics. In addition, defects in which hydrogen has entered the oxygen vacancies function as donors, generating electrons as carriers. In addition, some of the hydrogen may combine with oxygen, which combines with metal atoms, to form carriers. Therefore, the hydrogen-rich oxide semiconductor is used The transistor tends to have a normally-on characteristic.

[0240] A defect in which hydrogen has entered an oxygen vacancy (V O H) can function as a donor in the oxide semiconductor. However, it is difficult to quantitatively evaluate the defects. In some cases, the carrier concentration is evaluated instead of the donor concentration. In the literature, the parameter of oxide semiconductors is not the donor concentration, but the condition when no electric field is applied. In other words, the carrier concentration in the "carrier "Donor concentration" can sometimes be rephrased as "donor concentration."

[0241] Therefore, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. In oxide semiconductors, secondary ion mass spectrometry (SIMS) The hydrogen concentration obtained by mass spectrometry was calculated as 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 Less than, more preferred 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 The oxide semiconductor in which impurities such as hydrogen are sufficiently reduced is used as the By using it in a channel formation region, stable electrical characteristics can be imparted.

[0242] The carrier concentration of the oxide semiconductor in the channel formation region is 1×10 18 cm -3 below Preferably, the concentration is 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 Being less than More preferably, 1 × 10 12 cm -3 It is more preferable that the channel The lower limit of the carrier concentration of the oxide semiconductor in the hole formation region is not particularly limited. 1×10 -9 cm -3 It can be said that:

[0243] According to one embodiment of the present invention, a semiconductor device with high reliability can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided.

[0244] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-mentioned metal oxides. As the compound 230, a semiconductor material having a band gap (a semiconductor that is not a zero-gap semiconductor) is used. For example, semiconductors of single elements such as silicon, gallium arsenide, etc. Compound semiconductors and layered materials (also called atomic layer materials, two-dimensional materials, etc.) that function as semiconductors It is preferable to use a layered material that functions as a semiconductor. is preferably used for the semiconductor material.

[0245] In this specification, the term "layered material" refers to a group of materials having a layered crystal structure. The layered crystal structure is formed by covalent and ionic bonds, and the layers are The structure is made up of layers of molecules that are weaker than covalent or ionic bonds, such as those formed by the force of a sulphur atom. Layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used for the channel formation region. This makes it possible to provide a transistor with a large on-state current.

[0246] Layered materials include graphene, silicene, and chalcogenides. is a compound that contains chalcogen. Chalcogen is also a general term for elements in group 16. These include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0247] The oxide 230 may be, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides that can be used as the oxide 230 include: The following are molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS e2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten telluride (typically is WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (represented by ZrS2), zirconium selenide (represented by Representative examples include ZrSe2).

[0248] <Method for manufacturing semiconductor device> Next, a semiconductor device having a transistor 200 according to the present invention shown in FIG. The manufacturing method will be described with reference to Figs. 7 to 23. In Figs. 7 to 23, (B) of each figure shows the part indicated by the dashed line A1-A2 in (A). 1 is a cross-sectional view taken along the channel length direction of the transistor 200. In addition, (C) of each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in (A). , (D) and (A) are cross-sectional views of the transistor 200 in the channel width direction. ) is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in each figure. In the diagram, some elements have been omitted for clarity.

[0249] First, a substrate (not shown) is prepared, and an insulator 211 is formed on the substrate. The deposition of 11 films is performed by sputtering, chemical vapor deposition (CVD), and molecular beam epitaxy (MBE). BE:Molecular Beam Epitaxy, Pulsed Laser Deposition (PLD) Pulsed Laser Deposition (ALD) method, etc. It can be done.

[0250] The CVD method is divided into two types: plasma CVD (PECVD), which uses plasma, and heat CVD, which uses heat. They can be classified into thermal CVD, which uses heat, and photo-CVD, which uses light. The process can be divided into metal CVD and metal organic CVD. , Atmospheric pressure CVD method, in which film formation is performed under atmospheric pressure, and low pressure CVD method, in which film formation is performed under reduced pressure lower than atmospheric pressure. D method.

[0251] The plasma CVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the workpiece because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc., contained in a semiconductor device. On the other hand, in the case of thermal CVD, which does not use plasma, such plasma damage occurs. Since the thermal CVD method does not require any heat treatment, the yield of the semiconductor device can be increased. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0252] In addition, the ALD method uses only thermal energy to react with the precursor and reactant. Thermal ALD method, which uses plasma-excited reactants The EALD (Plasma Enhanced ALD) method, for example, can be used.

[0253] The ALD method utilizes the self-regulating nature of atoms to deposit atoms one layer at a time. This allows for extremely thin film deposition, film deposition on structures with high aspect ratios, and no pinholes. It is possible to form a film with few defects, excellent coverage, and low temperature. The PEALD method uses plasma, which allows deposition at lower temperatures. In addition, the precursors used in the ALD method do not contain impurities such as carbon. For this reason, films formed by the ALD method are not as good as those formed by other film formation methods. The amount of impurities may be higher than that of the films that have been treated with X-ray annealing. X-ray Photoelectron Spectros (XPS) This can be done using the (copy)

[0254] The CVD and ALD methods are deposition methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is not easily affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it ideal for achieving high aspect ratios. However, the ALD method is relatively slow in forming a film. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a faster deposition rate. may be preferred.

[0255] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, the film formation By changing the flow rate ratio of the source gas while heating, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gas, multiple film forming chambers are used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transportation or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0256] In this embodiment, the insulator 211 is formed of silicon nitride by CVD. Next, the insulator 212 is formed on the insulator 211. The insulator 212 is formed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the embodiment, the insulator 212 is formed of silicon nitride by sputtering. do.

[0257] Next, a film that will become the insulator 214 is formed on the insulator 212. The film is formed by sputtering, CVD, MBE, PLD or ALD. In this embodiment, aluminum oxide is used as the film that becomes the insulator 214. Use.

[0258] The insulators 211 and 212 are made of an insulating material such as silicon nitride that is difficult for copper to penetrate. By using an insulating material, and further disposing a film that becomes an insulator 214 on the insulator 212, an insulator 2 Even if a metal that easily diffuses, such as copper, is used for the conductor layer below 11 (not shown), the metal is insulated. Diffusion into upper layers through the insulator 211 and the insulator 212 can be suppressed. In addition, by using an insulator such as silicon nitride that is difficult for impurities such as water or hydrogen to penetrate, This makes it possible to suppress the diffusion of impurities such as water or hydrogen from the layer below the insulator 211. Cut.

[0259] The hydrogen concentration of the insulator 212 is lower than the hydrogen concentration of the insulator 211, and the film becomes the insulator 214. The hydrogen concentration in the insulator 212 is preferably lower than the hydrogen concentration in the insulator 212. Silicon nitride is deposited by the deposition method, and silicon nitride is deposited by the CVD method. It is possible to form silicon nitride having a lower hydrogen concentration than the insulator 211 that is the film. By using aluminum oxide as the film to be the insulator 214, the hydrogen concentration is lower than that of the insulator 212. It can be lowered.

[0260] The transistor 200 is formed on the film that will become the insulator 214 in a subsequent process. The film adjacent to the transistor 200 preferably has a relatively low hydrogen concentration. Preferably, the target film is located remotely from the transistor 200 .

[0261] Next, a film that will become the insulator 216 is formed on the film that will become the insulator 214. The deposition of the film is performed by sputtering, CVD, MBE, PLD, or ALD. In this embodiment, a silicon oxide film is used as the film that becomes the insulator 216. The film that becomes the insulator 216 is made of silicon oxynitride or silicon oxynitride. It is preferable to form the film by a film forming method using a reduced or eliminated gas. The hydrogen concentration in the film that becomes the insulator 216 can be reduced.

[0262] Next, an opening is formed in the film that will become the insulator 216, reaching the film that will become the insulator 214. The term "opening" also refers to a region where an opening is formed. The opening may be formed by wet etching, but dry etching is also preferred. In addition, the film that becomes the insulator 214 is preferably made of the insulator 216. An insulator that functions as an etching stopper film when forming a groove by etching a film that becomes For example, it is preferable to select silicon oxide as the film that will become the insulator 216 that forms the groove. When a silicon oxynitride film or a silicon oxide nitride film is used, the film that becomes the insulator 214 is a silicon nitride film, An aluminum oxide film or a hafnium oxide film is preferably used.

[0263] After the opening is formed, a conductive film that will become the conductor 205a is formed. The conductive film has a property that prevents oxygen from passing through. It is preferable to include a conductor having a function of suppressing the electric field. For example, tantalum nitride, tantalum Alternatively, tantalum, tungsten, titanium, etc. may be used. It is a laminated film of tungsten, molybdenum, aluminum, copper, and molybdenum tungsten alloy. The conductive film that becomes the conductor 205a can be formed by a sputtering method, a CVD method, an MBE method, or the like. The method can be carried out by using a deposition method, a PLD method, an ALD method, or the like.

[0264] In this embodiment, the conductive film that becomes the conductor 205a has a multi-layer structure. A tantalum nitride film is formed by a deposition method, and titanium nitride is laminated on the tantalum nitride. By using such a metal nitride as the lower layer of the conductor 205b, the conductor 20 Even if a metal that easily diffuses, such as copper, is used as the conductive film that becomes 5b, the metal may be a conductor 205 It can prevent the outward diffusion of a.

[0265] Next, a conductive film that will become the conductor 205b is formed. The conductive film can be formed by a plating method, a sputtering method, or the like. The deposition can be performed by a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, the conductive film that becomes the conductor 205b is made of a low-resistance conductive material such as copper. A film is formed.

[0266] Next, CMP (Chemical Mechanical Polishing) By performing this, a conductive film that becomes the conductor 205a and a conductive film that becomes the conductor 205b are formed. The openings are then removed to expose the film that will become the insulator 216. As a result, the conductor 205 is only present in the openings. a and conductor 205b remain. This forms the conductor 205 with a flat upper surface. It should be noted that the CMP process removes a part of the film that will become the insulator 216. In some cases (see Figure 7).

[0267] In the above, the conductor 205 is embedded in the opening of the film that becomes the insulator 216. However, the present embodiment is not limited to this. A conductor 205 is formed on the film, a film to be an insulator 216 is formed on the conductor 205, and the insulator By performing CMP processing on the film that will become the insulator 216, a part of the film that will become the insulator 216 is removed, forming a conductive The surface of the body 205 may be exposed.

[0268] Next, a film that becomes the insulator 216 and a film of the insulator 222 are formed on the conductor 205. The body 222 is an insulator containing oxides of one or both of aluminum and hafnium. It is preferable to form a film containing oxides of either or both of aluminum and hafnium. Insulators including aluminum oxide, hafnium oxide, aluminum and hafnium It is preferable to use oxides containing aluminum (hafnium aluminate). Insulators containing oxides of either or both of hafnium and oxygen have high resistance to oxygen, hydrogen, and water. The insulator 222 has a barrier property against hydrogen and water, so that the The hydrogen and water contained in the structure provided around the transistor 200 are absorbed by the insulator 222. The diffusion of the oxide 230 into the inside of the transistor 200 is suppressed through the oxygen vacancies in the oxide 230. The generation of losses can be suppressed.

[0269] The insulator 222 is formed by sputtering, CVD, MBE, PLD, or A. This can be done using the LD method or the like.

[0270] Next, the insulator 224 is deposited on the insulator 222. The deposition of the insulator 224 is carried out by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide or silicon oxynitride is used as the insulator 224. The insulator 224 is formed by the deposition method using a gas in which hydrogen atoms are reduced or removed. This can reduce the hydrogen concentration in the insulator 224. The insulator 224 will be the insulator 224 that contacts the oxide 230a in a later process. It is preferable that the hydrogen concentration is reduced as shown below.

[0271] Subsequently, a heat treatment is preferably performed. The reaction temperature is preferably 300° C. or higher and 500° C. or lower, and more preferably 320° C. or higher and 450° C. or lower. The heat treatment may be performed in a nitrogen or inert gas atmosphere, or in an atmosphere of oxidizing gas at a concentration of 10ppm. m or more, 1% or more, or 10% or more. Heat treatment is also performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by To compensate for the lost oxygen, the gas contains 10 ppm or more, 1% or more, or 10% or more of oxidizing gas. The heat treatment may be performed in an atmosphere containing the above-mentioned.

[0272] In this embodiment, the treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for 1 hour, and then the The heat treatment is then performed in an oxygen atmosphere at a temperature of 400°C for one hour. Impurities such as water and hydrogen contained in the body 224 can be removed.

[0273] The heat treatment may be performed after the formation of the insulator 222. Heat treatment conditions can be used.

[0274] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be, for example, a high-density plasma treatment using microwaves. It is preferable to use a device with a power source that generates plasma. Alternatively, an RF or other By using high-density plasma, Oxygen radicals can be generated, and by applying RF to the substrate side, it becomes a high-density plasma. As a result, the generated oxygen radicals can be efficiently guided into the insulator 224. After performing plasma treatment containing an inert gas using this device, In addition, a plasma treatment containing oxygen may be performed. Note that the conditions of the plasma treatment may be appropriately selected. By this, impurities such as water and hydrogen contained in the insulator 224 can be removed. In this case, the heat treatment is not necessary.

[0275] Here, aluminum oxide is formed on the insulator 224 by, for example, a sputtering method. A film may be formed and CMP may be performed until the aluminum oxide reaches the insulator 224. By performing CMP, the surface of the insulator 224 is planarized and smoothed. By placing the aluminum oxide on the insulator 224 and performing CMP, This makes it easier to detect the end point of the MP. Also, a part of the insulator 224 is polished by CMP. However, the thickness of the insulator 224 may become thin. By planarizing and smoothing the surface of the insulator 224, the oxide film to be formed later can be easily formed. In some cases, it may be possible to prevent deterioration of the coverage and to prevent a decrease in the yield of the semiconductor device. On the insulator 224, an aluminum oxide film is formed by sputtering. In this case, oxygen can be added to the insulator 224, which is preferable.

[0276] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulator 224 (see FIG. 7). It is preferable that the oxide film is formed continuously without exposing it to the air. By forming the oxide film 230A and the oxide film 230B without opening the film, the oxide film 230A and the oxide film 230B are protected from the atmospheric environment. Impurities or moisture can be prevented from adhering to the oxide film 230A and the oxide film 230B. This allows the vicinity of the interface to be kept clean.

[0277] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, etc. The deposition can be performed by using a deposition method, a PLD method, an ALD method, or the like.

[0278] For example, the oxide film 230A and the oxide film 230B are formed by a sputtering method. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the oxide film to be formed is reduced. In addition, when the oxide film is formed by sputtering, In this case, the above-mentioned In-M-Zn oxide target can be used.

[0279] In particular, when the oxide film 230A is formed, a part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxide film 230A may be sputtered with the oxide gas 224. The percentage of oxygen contained in the gas should be 70% or more, preferably 80% or more, and more preferably 100%. That's good.

[0280] In addition, when the oxide film 230B is formed by a sputtering method, the oxide film 230B is formed by sputtering. The ratio of oxygen to be added is set to 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. The transistors used in the above region have a relatively high field effect mobility. By performing the film formation while However, one embodiment of the present invention is not limited to this. The oxide film 230B is formed by a sputtering method. In this case, the ratio of oxygen contained in the sputtering gas is preferably more than 30% and less than 100%. If the film is formed with a concentration of 70% or more and 100% or less, an oxygen-excess oxide semiconductor is formed. A transistor using an oxygen-excess oxide semiconductor for a channel formation region has a relatively high Reliability is gained.

[0281] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: Zn=1:1:0.5[atomic ratio] (2:2:1[atomic ratio]), or 1:3:4[ The oxide film 230B is formed by sputtering a target having a ratio of 1:1 to 1:1. By the annealing method, the atomic ratio of In:Ga:Zn=4:2:4.1 or 1:1:1 The film is formed using a target with a ratio of the number of atoms. By appropriately selecting the ratio, the oxide 230 can be formed to have the desired characteristics.

[0282] Next, a heat treatment may be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0283] Next, an oxide film 243A is formed on the oxide film 230B (see FIG. 7). The film is formed by sputtering, CVD, MBE, PLD, or ALD. The oxide film 243A has an atomic ratio of Ga to In that is equal to or larger than that of the oxide film 230B. In the present embodiment, the atomic ratio of the oxide film 2 is preferably larger than that of the Ga atom to the In atom. 43A is prepared by sputtering with the atomic ratio of In:Ga:Zn=1:3:4. The film is formed using a target of

[0284] Next, a conductive film 242A is formed on the oxide film 243A (see FIG. 7). The film is formed by sputtering, CVD, MBE, PLD, or ALD. It can be done.

[0285] Next, the oxide film 230A, the oxide film 230B, and the oxide film 243A are formed by lithography. , and the conductive film 242A is processed into an island shape to form an oxide 230a, an oxide 230b, and an oxide layer 243B, and a conductive layer 242B are formed (see FIG. 8). The oxide 230b, the oxide layer 243B, and the conductive layer 242B are at least partially conductive. The substrate 205 is formed so as to overlap the substrate 205. The processing may be performed by dry etching or wet etching. Dry etching is suitable for fine processing. In this process, the thickness of the insulator 224 in the region not overlapping with the oxide 230a is thin. Sometimes it becomes difficult.

[0286] In the lithography method, first, the resist is exposed through a mask. The resist mask is formed by removing or leaving the resist-removed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. For example, KrF excimer laser light, ArF excimer laser light, Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the photoresist to light. A liquid immersion technique may be used in which the substrate is filled with liquid (e.g., water) and exposed to light. Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not necessary. The resist mask can be removed by ashing or the like. Which dry etching process is performed, which wet etching process is performed, and which dry etching process is performed After the treatment, wet etching is performed, or after the treatment, dry etching is performed. It is possible to carry out the filtering process.

[0287] Moreover, instead of the resist mask, a hard mask made of an insulator or a conductor may be used. When a hard mask is used, an insulating film or a conductive film that is a hard mask material is formed on the conductive film 242A. forming a film, forming a resist mask thereon, and etching the hard mask material; A hard mask having a desired shape can be formed by etching the conductive film 242A, etc. This can be done after removing the resist mask, or with the resist mask left on. In the latter case, the resist mask may disappear during etching. The hard mask may be removed by etching after etching such as 2A. If the material of the mask does not affect the subsequent process or can be used in the subsequent process, it is not necessarily hard There is no need to remove the mask.

[0288] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. : Capacitively Coupled Plasma (CAP) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power source may be applied to one of the parallel plate type electrodes. A configuration in which a plurality of different high frequency power sources are applied to the electrodes may be used. Alternatively, a parallel plate electrode may be used. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching apparatus or the like can be used.

[0289] In addition, the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 242B The side surface of the oxide 230a is preferably approximately perpendicular to the upper surface of the insulator 222. , oxide 230b, oxide layer 243B, and conductor layer 242B are formed on the sides of insulator 222. Since the upper surface of the substrate 200 is substantially perpendicular to the upper surface of the substrate 200, a small area is required when providing the plurality of transistors 200. However, the present invention is not limited to this, and the oxide 230a, the oxide 230b, The angle between the side surface of the oxide layer 243B and the conductive layer 242B and the top surface of the insulator 222 is low. Alternatively, the angle may be set to be as small as possible.

[0290] Next, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductor An insulator 272 is deposited on the conductive layer 242B (see FIG. 9). This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. In this embodiment, the insulator 272 is made of aluminum oxide by sputtering. By forming an aluminum oxide film by sputtering, The insulator 224 may be implanted with oxygen.

[0291] Next, the insulator 273 is deposited on the insulator 272. The deposition of the insulator 273 is performed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the embodiment, silicon nitride is deposited as the insulator 273 by sputtering. (See Figure 9.)

[0292] Next, an insulating film that will become the insulator 280 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. For example, a silicon oxide film can be formed as the insulator 280 by using a sputtering method. Then, a silicon oxide film is formed on it using the PEALD method or the thermal ALD method. The insulating film that becomes the insulator 280 may be formed by using the above-mentioned gas in which hydrogen atoms are reduced or removed. This makes it possible to reduce the hydrogen concentration in the insulator 280. It can be reduced.

[0293] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface. As in the case of the insulator 224, for example, a spa A film of aluminum oxide is formed by a galvanic deposition method, and the aluminum oxide is then covered with an insulator 280. CMP may be performed until

[0294] Next, a part of the insulator 280, a part of the insulator 273, a part of the insulator 272, the conductive layer 24 A part of the oxide layer 243B and a part of the oxide layer 243B are processed to form an opening reaching the oxide 230b. The opening is preferably formed so as to overlap the conductor 205 (see FIG. 11). By forming the opening, the conductor 242a, the conductor 242b, the oxide 243a, and An oxide 243b is formed.

[0295] A part of the insulator 280, a part of the insulator 273, a part of the insulator 272, and the oxide layer 243B The processing of the conductive layer 242B and the conductive layer 242C is performed by dry etching or wet etching. Dry etching can be used. Dry etching is suitable for fine processing. In addition, the processing may be performed under different conditions. For example, A part of the insulator 273 is processed by dry etching, and a part of the insulator 273 is processed by wet etching. Then, a part of the insulator 272 is processed by a dry etching method to remove the oxide layer 243B and the conductive layer 243B. A portion of the layer 242B may be processed by dry etching.

[0296] By performing processes such as dry etching, etching gases, etc. The impurities caused by the oxidation are attached to or inside the oxide 230a and the oxide 230b. Impurities can diffuse into the silicon. Examples of impurities include fluorine and chlorine.

[0297] In order to remove the above impurities, cleaning is performed. These include wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning methods may be combined as appropriate.

[0298] Wet cleaning uses oxalic acid, phosphoric acid, ammonia water, or hydrofluoric acid. The cleaning process may be carried out using an aqueous solution diluted with carbonated water or pure water. Alternatively, ultrasonic cleaning using carbonated water may be performed.

[0299] Until now, the oxide 230 has been removed by processes such as dry etching or the above-mentioned cleaning process. The thickness of the oxide 243a of the oxide layer 230b and the region not overlapping with the oxide 243b is The thickness of the oxide 243a and the region overlapping with the oxide 243b may be thinner than that of the oxide 243a. (See Figure 11).

[0300] After the etching or cleaning, a heat treatment may be performed. The heating may be performed at a temperature of 100°C or higher and 450°C or lower, more preferably 350°C or higher and 400°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere of oxidizing gas at 10ppm. For example, the heat treatment is carried out in an atmosphere containing oxygen at least 1%, 10%, or 20%. This is preferably done in air, so that oxygen is provided to the oxide 230a and the oxide 230b. Supply oxygen deficiency V O In addition, the heat treatment can be performed under reduced pressure. Alternatively, after heat treatment in an oxygen atmosphere, it is possible to continuously heat the substrate in a nitrogen atmosphere without exposing it to the air. A heat treatment may be carried out.

[0301] Next, an oxide film 230C is formed (see FIG. 12). The heat treatment may be carried out under reduced pressure without exposure to air and without continuous oxidation. It is preferable that the heat treatment is performed in an atmosphere containing oxygen. By carrying out such a treatment, it is preferable to form a layer on the surface of the oxide 230b. The moisture and hydrogen adsorbed on the oxide 230a and the water in the oxide 230b are removed. The molecular and hydrogen concentrations can be reduced. The temperature is preferably 0° C. or lower, and more preferably 150° C. or higher and 350° C. or lower. In this case, the heat treatment is performed at a temperature of 200° C. under reduced pressure.

[0302] Here, the oxide film 230C is at least a part of the upper surface of the oxide 230b, A part of the side surface, a part of the side surface of the conductor 242, a part of the side surface of the insulator 272, and the side of the insulator 273 It is preferable that the insulating body 280 is provided so as to contact a part of the surface and a part of the side surface of the insulating body 280 . The conductor 242 is connected to the oxide 243, the insulator 272, the insulator 273, and the oxide film 230C. By being surrounded, the decrease in the conductivity due to oxidation of the conductor 242 is suppressed in the subsequent steps. It is possible.

[0303] The oxide film 230C is formed by sputtering, CVD, MBE, PLD, or A This can be done by using the LD method or the like. The oxide film 230C is formed by doping In with Ga atoms. It is preferable that the atomic ratio of Ga to In in the oxide film 230B is larger than the atomic ratio of Ga to In in the oxide film 230B. In the present embodiment, the oxide film 230C is formed by sputtering In:Ga:Zn= The film is formed using a target with an atomic ratio of 1:3:4.

[0304] The oxide film 230C may be a laminate. For example, In The film was formed using a target with an atomic ratio of Ga:Zn=4:2:4.1. The film may be formed using a target having an atomic ratio of n:Ga:Zn=1:3:4.

[0305] During the formation of the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide 230C. a and the oxide 230b. Alternatively, when forming the oxide film 230C, A portion of the oxygen contained in the sputtering gas may be supplied to the insulator 280. Therefore, the ratio of oxygen contained in the sputtering gas for the oxide film 230C is preferably 70% or more. It is preferable that the ratio is 80% or more, and more preferably 100%.

[0306] Next, a heat treatment may be performed. The heat treatment may be performed under reduced pressure and exposed to the atmosphere. The insulating film 250A may be formed in succession without performing the heat treatment. Therefore, the moisture and hydrogen adsorbed on the surface of the oxide film 230C are removed, and the oxide film 230C is further oxidized. The moisture concentration and hydrogen concentration in the oxide 230a, the oxide 230b and the oxide film 230C are reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the heat treatment temperature is 200°C.

[0307] Next, an insulating film 250A is formed on the oxide film 230C (see FIG. 12). The method is formed by sputtering, CVD, MBE, PLD, or ALD. The insulating film 250A may be formed by reducing or removing the hydrogen atoms. It is preferable to form the insulating film 250A by a film forming method using a gas. The insulating film 250A is an insulating film that will be in contact with the oxide 230c in a later process. Since the hydrogen concentration is reduced in this manner, the hydrogen concentration in the hydrogen-containing gas is preferably reduced.

[0308] Next, microwaves or high frequencies such as RF may be irradiated. Alternatively, high frequency waves such as RF may penetrate the insulator 280, the oxide 230b, and the oxide 230a. In particular, the oxide 230a and the oxide 230b are Thank you, V O A reaction occurs in which the H bond is broken, resulting in dehydrogenation. Some of the removed hydrogen may be removed from the oxide 230 and the insulator 280. In this way, some of the hydrogen may be gettered to the conductor 242. By irradiating the insulating material 280, the oxide 230b, and the oxide with high frequency waves or RF, The hydrogen concentration in the oxide 230a can be reduced.

[0309] In addition, oxygen gas is converted into plasma by microwaves or high frequencies such as RF, and oxygen radiator is used. That is, the insulator 280, the oxide 230b, and the oxide 230a may be formed. The plasma treatment may be carried out in an atmosphere containing oxygen. This is sometimes called oxygen plasma treatment. The oxygen radicals formed also cause the insulator 28 Oxygen can be supplied to the oxide 230a, oxide 230b, and oxide 230c. The insulator 280, the oxide 230b, and the oxide 230a are subjected to a plasma treatment in an atmosphere containing oxygen. When performing the treatment, the oxide 230 is configured so that it is difficult to irradiate microwaves or high frequencies such as RF. It may also be.

[0310] The oxygen plasma treatment is carried out by using an electric field that generates high-density plasma using, for example, microwaves. It is preferable to use a microwave processing device having a microwave source. A power source for applying RF may be provided on the substrate side. By using high density plasma, In addition, by applying RF to the substrate side, high density oxygen radicals can be generated. The oxygen ions generated by the plasma are efficiently transported through the insulator 280 and the oxide 230. The oxygen plasma treatment is preferably carried out under reduced pressure. The pressure is 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more, Preferably, the pressure is 400 Pa or more. In addition, the oxygen flow ratio (O2 / O2+Ar) is 50 % or less, preferably 10% to 30%. After the oxygen plasma treatment, the substrate is continuously heated without being exposed to the outside air. A heat treatment may then be carried out.

[0311] Next, the conductive film 260A (conductive film 260Aa and conductive film 260Ab) is formed (FIG. 1 The conductive film 260Aa and the conductive film 260Ab are formed by a sputtering method, a CV method, etc. The deposition can be carried out by using a method such as CVD, MBE, PLD, or ALD. For example, In the present embodiment, the conductive film 260Aa is formed by the ALD method. Then, a conductive film 260Ab is formed by using the CVD method.

[0312] Next, the oxide film 230C, the insulating film 250A, the conductive film 260Aa, and The oxide 230 is removed by polishing the conductive film 260Ab until the insulator 280 is exposed. c. Forming the insulator 250 and the conductor 260 (the conductor 260a and the conductor 260b) (See Figure 14.)

[0313] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. After the heat treatment, the temperature and hydrogen concentration can be reduced. The insulator 282 may be deposited immediately after the above process.

[0314] Next, on the conductor 260, on the oxide 230c, on the insulator 250, and on the insulator 280 , forming an insulator 282. The insulator 282 is formed by a sputtering method, a CVD method, an MB method, etc. This can be done using the E method, the PLD method, the ALD method, or the like (see FIG. 15).

[0315] The insulator 282 is formed by depositing aluminum oxide by, for example, a sputtering method. It is preferable to form the insulator 282 in an oxygen-containing atmosphere by using a sputtering method. By performing the deposition, oxygen can be added to the insulator 280 while the film is being formed. It is preferable to deposit the insulator 282 while heating the substrate. By forming an insulator 282 in contact with the upper surface of the This is preferable because it can prevent the oxygen contained in the conductive material 80 from being absorbed into the conductive material 260. .

[0316] Here, before the insulator 282 is formed, a sputtering method is used to form a film in an atmosphere containing oxygen. The step of forming a metal oxide film and then removing the metal oxide may be repeated one or more times. This process allows excess oxygen to be introduced into the insulator 280. By repeating this process several times, the amount of excess oxygen contained in the insulator 280 can be appropriately adjusted. This can be done.

[0317] After the insulator 282 is formed, a heat treatment is preferably performed (see FIG. 15(B)). The curves shown in the graph indicate the heat treatment. Specifically, the graphs show the heat treatment in an atmosphere containing oxygen and an atmosphere containing nitrogen. or in a mixed atmosphere of oxygen and nitrogen at a temperature of 350°C or higher, preferably 400°C or higher. The heat treatment time is 1 hour or more, preferably 4 hours or more, and more preferably 8 hours or more. That is all.

[0318] The heat treatment converts hydrogen in the oxide 230 into insulators 280 and 282. That is, hydrogen in the transistor 200 can diffuse outward through the insulating 280 and insulator 282 to form transistor 200 and The hydrogen concentration in the insulator 282 can be reduced. The absolute amount of the element can be reduced.

[0319] Next, a part of the insulator 282, a part of the insulator 280, a part of the insulator 273, and the insulator 272 a part of the insulator 224; a part of the insulator 222; a part of the film that becomes the insulator 216; A part of the film that will become the body 214 and a part of the insulator 212 are processed to form the insulator 216 and An insulator 214 is formed, and an opening is formed that reaches the insulator 211 (see FIG. 16). The opening may be formed so as to surround the transistor 200. In some cases, the transistor 200 is formed so as to be surrounded by the opening. , a portion of a side surface of the insulator 282, a portion of a side surface of the insulator 280, a portion of a side surface of the insulator 273, A part of the side of the insulator 272, a part of the side of the insulator 224, a part of the side of the insulator 222, A part of the side of the edge 216, a part of the side of the insulator 214, and a part of the side of the insulator 212 is exposed.

[0320] A part of the insulator 282, a part of the insulator 280, a part of the insulator 273, and a part of the insulator 272 , a portion of the insulator 224, a portion of the insulator 222, a portion of the film that becomes the insulator 216, and the insulator The part of the film that becomes the body 214 and the part of the insulator 212 are processed by dry etching or Dry etching is suitable for fine processing. In addition, the processing may be performed under different conditions.

[0321] In addition, even if microwaves or high-frequency waves such as RF are irradiated to the insulator 280, The irradiated microwave or high frequency such as RF may damage the insulator 280, the oxide 230b, and oxide 230a, etc., and may be able to remove hydrogen therein. For example, in oxide 230a and oxide 230b, V O The reaction in which the H bond is broken is A part of the hydrogen generated at this time is dehydrogenated into the oxide 230 and the insulator 231. 80. Also, some of the hydrogen may be gettered to the conductor 242. There may be cases where this occurs.

[0322] Next, the insulator 282, the insulator 280, the insulator 273, the insulator 272, the insulator 224, the insulator Covering the edge 222, the insulator 216, the insulator 214 and the insulator 212 is an insulator 287A. (See FIG. 17). The insulator 287A is formed under the same conditions as the insulator 282. For example, the insulator 287A is preferably formed by a sputtering method, a CVD method, or the like. This can be performed using the MBE method, the PLD method, the ALD method, or the like.

[0323] Specifically, the insulator 287A is, for example, aluminium oxide deposited by a sputtering method. It is preferable to form a film of insulating material in an oxygen-containing atmosphere by using a sputtering method. By forming the insulator 287A, oxygen can be added to the insulator 280 while the insulator 287A is being formed. At this time, it is preferable to form the insulator 287A while heating the substrate. In addition, since the insulator 282 is formed in contact with the upper surface of the conductor 260, the insulator 287 In the film formation process of A, the oxygen contained in the insulator 280 is prevented from being absorbed into the conductor 260. It can be controlled.

[0324] Next, the insulator 287A is subjected to anisotropic etching to remove the insulator 282 and the insulator body 280, insulator 273, insulator 272, insulator 224, insulator 222, insulator 216, An insulator 287 is formed on the side surfaces of the insulators 214 and 212 (see FIG. 18).

[0325] Here, the side end of the insulator 282 and the upper end of the insulator 287 are in contact with each other, and the side end of the insulator 214 The contact between the lower end of the insulator 287 and the transistor 200 and the insulator 280 A sealing structure can be formed.

[0326] As the anisotropic etching process, a dry etching process is preferably performed. This removes the insulating film formed on the surface approximately parallel to the substrate surface, and the insulator 287 is formed automatically. It can be formed in a self-consistent manner.

[0327] In addition, after the insulator 287 is formed, it is preferable to perform a heat treatment (see FIG. 18(B)). The curves shown in the graph indicate the heat treatment. Specifically, the graphs show the heat treatment in an atmosphere containing oxygen and an atmosphere containing nitrogen. or in a mixed atmosphere of oxygen and nitrogen at a temperature of 350°C or higher, preferably 400°C or higher. The heat treatment time is 1 hour or more, preferably 4 hours or more, and more preferably 8 hours or more. That is all.

[0328] The heat treatment converts hydrogen in the oxide 230 into insulators 280, 282, and 287 and out through the insulator 287. The hydrogen diffuses outward through insulator 280, insulator 282, and insulator 287. , reducing the hydrogen concentration in the transistor 200, the insulator 282, and the insulator 287. In other words, the absolute amount of hydrogen present in the semiconductor device can be reduced.

[0329] In addition, the insulator 283 is formed by covering the insulators 282, 287, and 211. (See FIG. 19). The insulator 283 can be formed by sputtering, CVD, MBE, or PL The insulator 283 can be formed by a multi-layer structure. For example, a silicon nitride film may be formed by using a sputtering method, and the silicon nitride may be Silicon nitride may be deposited on the insulating layer by CVD. 283 contacts the insulator 211 at the bottom of the opening. 0 is enclosed by the insulator 283 on the top and sides and by the insulator 211 on the bottom. In this manner, the transistor 200 is enclosed by the insulator 283 and the insulator 211 having high barrier properties. By embedding the insulating material in the insulating layer, it is possible to prevent moisture and hydrogen from entering from the outside.

[0330] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The treatment is carried out for 1 hour. The heat treatment removes the acid added by the formation of the insulator 282. The element is diffused into the insulator 280, and then through the oxide 230c, the oxide 230a, and In this way, the oxide 230 is subjected to oxygen addition treatment. By this, oxygen vacancies in the oxide 230 (oxide 230b) are repaired by oxygen.

[0331] Furthermore, hydrogen remaining in the oxide 230 passes through the insulator 280 and the insulator 282. The oxide 230 diffuses into the insulator 287 and is captured or attached to the insulator 287. The hydrogen remaining in the V O It is possible to suppress the formation of H. Note that the heat treatment can be performed not only after the formation of the insulator 283 but also after the formation of the insulator 282. You may go.

[0332] In addition, an insulator 284 may be formed on the insulator 283 (see FIG. 20). It is preferable that the insulator 284 is formed by a film forming method that has high film-forming properties. For example, the insulator 28 The deposition of the film 4 is performed by sputtering, CVD, MBE, PLD, or ALD. The insulator 284 can be formed using the same material as the insulators 212 and 283. It is preferable to use the same material.

[0333] Specifically, it is preferable to form a silicon nitride film by using a CVD method. CVD method using a compound gas that does not contain hydrogen atoms or has a low hydrogen atom content The film may be formed by the method described above.

[0334] The insulator 284 is formed by a film formation method using a gas in which hydrogen atoms are reduced or removed. In this way, the amount of hydrogen contained in the insulator 284 can be reduced. The hydrogen concentration in the oxide semiconductor is reduced, and the amount of hydrogen entering the channel formation region of the oxide semiconductor is reduced. It is possible to plan this.

[0335] Next, an insulating film that will become the insulator 274 is formed on the insulator 284. The deposition of the protective film is done by sputtering, CVD, MBE, PLD, or ALD. In addition, the insulating film to be the insulator 274 is formed by reducing the above-mentioned hydrogen atoms. Alternatively, it is preferable to form the film by a film forming method using the removed gas. The hydrogen concentration in the insulating film 274 can be reduced.

[0336] Next, the insulating film that will become the insulator 274 is subjected to CMP processing to form the insulator 274 with a flat upper surface. (See Figure 21).

[0337] Next, the insulator 272, the insulator 273, the insulator 280, the insulator 282, the insulator 283, and An opening is formed in the insulator 284, reaching the conductor 242 (see FIG. 22). The formation of the opening may be performed by using a lithography method. In FIG. 22(A), the shape of the opening is , the opening is circular in top view, but is not limited thereto. However, when viewed from above, the shape may be an approximately circular shape such as an ellipse, a polygonal shape such as a square, or a polygonal shape such as a square. The corners may be rounded.

[0338] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator The insulating film that becomes the insulator 241 is formed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film that becomes the insulator 241 is an insulating film that has a function of suppressing oxygen permeation. For example, it is preferable to form an aluminum oxide film by using the PEALD method. Alternatively, silicon nitride may be formed by the PEALD method in the same manner as in the formation of the insulator 283. Silicon nitride is preferred because it has a high blocking property against hydrogen. stomach.

[0339] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented. This suppresses the permeation of the conductor 240a and the conductor 240b to be formed next, thereby preventing oxidation. In addition, impurities such as water and hydrogen can be removed from the conductors 240a and 240b. It can prevent the virus from spreading to the outside.

[0340] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is preferable to use a laminated structure containing a conductor such as tantalum nitride or titanium nitride. The conductor 24 may be a laminate of tungsten, molybdenum, copper, etc. The conductive film that becomes the conductor 240a and the conductor 240b can be formed by a sputtering method, a CVD method, or an MBE method. The method can be carried out by using a deposition method, a PLD method, an ALD method, or the like.

[0341] Next, a CMP process is performed to remove the conductive film that will become the conductor 240a and the conductor 240b. A portion is removed to expose the top surfaces of insulators 284 and 274. As a result, only the openings are formed. The conductive film remains to form the conductors 240a and 240b having flat upper surfaces. By the CMP process, the upper surface of the insulator 284 A portion of the insulating material 274 and a portion of the top surface of the insulating material 274 may be removed.

[0342] Next, a conductive film that will become the conductor 246 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. can.

[0343] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a. The conductor 246a contacts the upper surface of the conductor 240b, and the conductor 246b contacts the upper surface of the conductor 240b. At this time, the conductor 246a and the conductor 246b do not overlap with the insulator 284. A portion of the insulation 284 in the recessed area may be removed (see FIG. 23).

[0344] Next, an insulator 286 is formed on the conductor 246 and the insulator 284 (see FIG. 4). The insulator 286 is deposited by sputtering, CVD, MBE, PLD or A. This can be done using the LD method or the like. Also, the insulator 286 may be multi-layered. For example, For example, a silicon nitride film is formed by sputtering, and then CVD is performed on the silicon nitride. Silicon nitride may be deposited on the conductor 246 and on the insulator 284 by using a method such as the steps of: By forming the insulator 286, the upper surface and the side surface of the conductor 246 become insulated. The edge 286 is in contact with the conductor 246, and the lower surface of the conductor 246 is in contact with the insulator 284. 6 may be configured to be wrapped with an insulator 284 and an insulator 286. By adopting this configuration, the permeation of oxygen from the outside is suppressed, and oxidation of the conductor 246 is prevented. In addition, it is possible to prevent impurities such as water and hydrogen from diffusing to the outside from the conductor 246. This is preferable because it is possible to

[0345] Through the above steps, a semiconductor device including the transistor 200 shown in FIG. 4 can be manufactured. As shown in FIGS. 7 to 23, the semiconductor device can be manufactured by using the method for manufacturing the semiconductor device described in this embodiment mode. In this manner, the transistor 200 can be manufactured.

[0346] <Applications of semiconductor devices> In the following, the above-mentioned <Configuration Example 1 of the semiconductor device> will be described with reference to FIGS. 24 to 29. Regarding an example of a semiconductor device including a transistor 200 according to one embodiment of the present invention, In the semiconductor device shown in FIGS. The structures constituting the semiconductor device shown in FIG. 4 and having the same functions are designated by the same reference numerals. In this section, the constituent materials of the transistor 200 are described as "semiconductors." The materials explained in detail in the section "Apparatus Configuration Example 1" can be used.

[0347] <<Application example 1 of semiconductor device>> 24(A) and 24(B) show a plurality of transistors 200_1 to 200_2. 200_n (n is a natural number greater than or equal to 3) is collectively defined as insulator 283 and insulator 211. In FIG. 24(A) and FIG. 24(B), the transistor The transistors 200_1 to 200_n appear to be aligned in the channel length direction. However, the present invention is not limited to this. _n may be arranged in the channel width direction or may be arranged in a matrix. Also, they may be arranged without any regularity depending on the design.

[0348] As shown in FIG. 24A, a plurality of transistors 200_1 to 200_ The portion where the insulator 283 and the insulator 211 contact each other on the outside of the insulating film 265 (hereinafter referred to as the sealing portion 265) is The sealing portion 265 is formed on the plurality of transistors 200_1. The transistor 200_n is formed so as to surround the transistor 200_n. The plurality of transistors 200_1 to 200_n are connected to an insulator 283 and an insulator 21. Therefore, the transistor group surrounded by the sealing portion 265 can be formed on the substrate. There will be multiple locations.

[0349] In addition, a dicing line (scribe line, dividing line, or The substrate may be divided at the dicing line. Since the semiconductor device is cut, the group of transistors enclosed by the sealing portion 265 can be extracted as one chip. It becomes.

[0350] In addition, in FIG. 24A, a plurality of transistors 200_1 to 200_n In the example shown in FIG. 24, the sealing portion 265 surrounds the upper surface of the semiconductor device 10. However, the present invention is not limited to this. As shown in FIG. 1B, a plurality of transistors 200_1 to 200_n are In FIG. 24B, the plurality of transistors 200_1 and 200_2 may be surrounded by a sealing portion. The transistor 200_n is surrounded by a sealing portion 265a, and is further surrounded by an outer sealing portion 265b. It is structured as follows.

[0351] In this manner, the plurality of transistors 200_1 to 200_ By surrounding n, the area where the insulator 283 and the insulator 211 are in contact increases, This can further improve the adhesion between the edge 283 and the insulator 211. Indeed, a plurality of transistors 200_1 to 200_n can be sealed. .

[0352] In this case, even if a dicing line is provided overlapping the sealing portion 265a or the sealing portion 265b, Alternatively, a dicing line may be provided between the sealing portion 265a and the sealing portion 265b.

[0353] <<Application example 2 of semiconductor device>> FIG. 25 is a cross-sectional view of a transistor 200. The transistor 200 shown in FIG. The structure without the oxide 230b is different from the transistor 200 shown in FIG. The transistor 200 shown in FIG. 25 includes an oxide 230a, an oxide 230c1, and an oxide 230c2. The oxide 230 is formed by the lower surface of the conductor 242a and the The bottom surface of the conductor 242b contacts the oxide 230a.

[0354] The oxide 230 is a stack of oxides 230a, 230c1, and 230c2. This structure provides the following excellent effects.

[0355] For example, the oxide 230a has a composition of In:Ga:Zn=1:3:4 [atomic ratio], The composition of the oxide 230c1 is In:Ga:Zn=4:2:3 [atomic ratio], and the oxide 230c2 is By making c2 have a composition of In:Ga:Zn=1:3:4 [atomic ratio], the oxide 230c In this case, the insulator 280 may be provided with a channel forming region. , the insulator 272, the insulator 273, the conductor 242 (the conductor 242a, the conductor 242b), and The oxide 230c1 and the oxide 230c2 are formed along the openings formed in the oxide 230a and the oxide 230c1. The conductor 242a is formed in a U-shape. The side surface of the inductor 242b and the side surface of the oxide 230c1 may be in contact with each other. In addition, the oxide 230c2 is in contact with the upper surface of the oxide 230c1, and the insulator 250 is This can prevent contact with the oxide 230c1.

[0356] With the above configuration, the conductor 242 (the conductor 242a and the conductor 242b) The contact area between the conductor 242 and the oxide 230c1 can be reduced. By reducing the contact area with the oxide 230c1, the This can reduce possible junction leakage current. In addition, by adjusting the thickness of the conductor 242, the contact area with the oxide 230c1 can be adjusted arbitrarily. It becomes possible to adjust it.

[0357] For example, a semiconductor device having a transistor 200 shown in FIG. It can be suitably used in space, including artificial satellites. During this time, cosmic radiation, or electrons and protons emitted from the sun, enter the interior of semiconductor devices. In the transistor 200 shown in FIG. In this case, the transistor has a reduced junction leakage current, so it is highly resistant to cosmic radiation, etc. It can also be said that this structure is highly resistant to shocks and highly reliable.

[0358] <<Application example 3 of semiconductor device>> 26(A)(B) and 27(A)(B) are diagrams illustrating a memory device 290. FIG. 26(A) is a top view of a memory device 290, and FIG. 26(B) is a top view of a memory device 290. 26(B) is a cross-sectional view taken along the dashed line A1-A2 shown in FIG. The diagram corresponds to a cross-sectional view in the channel length direction of a transistor.

[0359] FIG. 27(A) is a cross-sectional view taken along the dashed line A3-A4 in FIG. 26(A). 27(B) is a cross-sectional view taken along the dashed line A5-A6 shown in FIG. The cross-sectional view shown in FIG. 27A corresponds to a cross-sectional view in the channel width direction of a transistor.

[0360] The memory device 290 shown in FIGS. 26(A) and 27(A) and 27(B) is a trans The transistor includes a capacitance device 292 and a wiring connected to the transistor. More specifically, the memory device 290 includes an insulator 211 and an insulator 212 on the insulator 211. , an insulator 214 on the insulator 212, and a conductor 205 (conductor 205a and conductor 2 05b), insulator 216 on insulator 214, insulator 222, insulator 224, and oxide The object 230 (oxide 230a, oxide 230b, and oxide 230c) and the conductor 242 (conductor 242a and conductor 242b) and oxide 243 (oxide 243a and Oxide 243b), insulator 272, insulator 273, insulator 250, and conductor 260 (conductor 260a and conductor 260b).

[0361] Also, above the oxide 230, there is an insulator 280, and an insulator 282 on the insulator 280. Also, an insulator 212, an insulator 214, an insulator 216, an insulator 222, an insulator The insulating member 224, the insulating member 272, the insulating member 273, the insulating member 280, and the insulating member 282 are in contact with each other. An insulator 287 is provided so as to cover the insulator 282. An insulator 284 on the edge 283 is provided.

[0362] Additionally, the memory device 290 is electrically connected to the conductor 242a and functions as a plug. The conductor 240a is connected to the side of the conductor 240a. In addition, on the insulator 284 and the conductor 240a, A conductor 246a is provided to connect the conductor 246a and function as a wiring. , and on insulator 274 is provided insulator 286 .

[0363] The memory device 290 also includes a capacitance device 292. The capacitance device 292 is , a conductor 242b, an insulator 272 and an insulator 273 provided on the conductor 242b, , and a conductor 294 provided on the insulator 273. That is, the capacitive device 29 2 constitutes the MIM (Metal-Insulator-Metal) capacitor. One of the pair of electrodes of the capacitance device 292, that is, the conductor 242b, is a transistor. The source electrode or drain electrode of the capacitor device 29 can also be used. The dielectric layer of 2 is a protective layer, i.e., an insulator 272, provided for the transistor, and It can also serve as the insulator 273. Therefore, in the manufacturing process of the capacitance device 292, Since part of the transistor manufacturing process can be shared, semiconductor device manufacturing with high productivity can be achieved. It can be placed.

[0364] As shown in FIG. 27B, in a cross section in the channel width direction of the transistor, The quantum device 292 has an area overlapping the conductor 294 even on the side of the conductor 242b. Since it is possible to form capacitance in this region, It is possible to increase the capacitance value even further.

[0365] The conductor 294 may be made of a material that can be used for the conductor 242. That would be good.

[0366] Also, in the memory device 290, the conductor 260 is a first gate of a transistor. The conductor 205 serves as a second gate of the transistor. The conductor 242a and the conductor 242b are the source and drain electrodes of the transistor. It functions as:

[0367] The oxide 230 functions as a semiconductor having a channel formation region of a transistor. Insulator 250 serves as the first gate insulator and is connected to insulator 222 and insulator 2. 24 acts as a second gate insulator.

[0368] The insulator 214, the insulator 272, and the insulator 273 function as interlayer films. 4. The insulators 272 and 273 are made of a material having a barrier property against oxygen or a material having a barrier property against water. It is preferable to form the insulator 214 and the insulator 27 using a material capable of absorbing hydrogen. 2 and the insulator 273 are made of a material capable of absorbing hydrogen, The amount of hydrogen in the gas 290 can be kept constant. Materials that can be used for the insulator 273 include Al compounds or Al and elemental Element Ma (element Ma is an element with low electronegativity (highly reactive element), e.g., Mg, Zr, Compounds having a substituent (representing Si, B, etc.) can be used.

[0369] The transistors included in the memory device 290 are shown in FIG. As shown in FIG. 27B, the insulator 282 and the oxide 230c are in direct contact with each other. By adopting this structure, the oxygen contained in the insulator 280 is In addition, the oxygen contained in the insulator 280 can be prevented from diffusing into the oxide 2. 30c, the oxide 230a and the oxide 230b can be efficiently supplied thereto. Therefore, oxygen vacancies in the oxide 230a and the oxide 230b are reduced, and the current of the transistor is improved. The thermal characteristics and reliability can be improved.

[0370] Also, the transistors included in the memory device 290 shown in FIG. In the opening provided in the interlayer film, the conductor 260 is formed in a self-aligned manner with the insulator 250 interposed therebetween. That is, the conductor 260 is formed in a layer including the insulator 280 through the insulator 250. Since the insulating film is formed to fill the opening in the insulating film, the insulating film is formed between the conductor 242a and the conductor 242b. In this region, alignment of the conductor 260 is not required.

[0371] In addition, an oxide 230c is provided in an opening provided in an interlayer film including an insulator 280. Therefore, the insulator 250 and the conductor 260 are preferably connected via the oxide 230c. The oxide 230b and the oxide 230a have a stacked structure and overlap each other. This makes it possible to form the oxide 230c and the insulator 250 by successive film formation. Therefore, the interface between the oxide 230 and the insulator 250 can be kept clean. The effect of scattering on carrier conduction is reduced, and the transistors in the memory device 290 The MOSFET can achieve high on-current and high frequency characteristics.

[0372] The transistors in the memory device 290 shown in FIG. A channel formation region is formed at or near the interface between the oxide 230b and the oxide 230c. The oxide 230c is formed by the insulator 280, the insulator 272, the insulator 273, the conductor 242 (the conductor 242a, conductor 242b), oxide 243 (oxide 243a, oxide 243b) and oxide The insulating layer 230 is formed in a U-shape so as to fit the opening formed in the insulating layer 230b.

[0373] For example, the channel length of a transistor is miniaturized (typically, 5 nm or more and less than 60 nm, preferably Preferably, the thickness is 10 nm or more and 30 nm or less. In this case, the memory device 290 shown in FIG. By using a transistor structure having the above structure, the effective L length can be increased. When the distance between the conductor 242a and the conductor 242b is 20 nm, the effective L length is 4 The distance between the conductor 242a and the conductor 242b, i.e., the maximum The length can be increased by about two to three times as much as the small processing dimension. The memory device 290 is one of the structures of transistors and capacitance devices that are excellent for miniaturization. become.

[0374] <<Semiconductor Device Application Example 4>> Next, the response of the memory device 290 shown in FIGS. 26(A)(B) and 27(A)(B) will be described. The usage examples will be explained with reference to FIG. 28 and FIG.

[0375] 28 and 29 show a plurality of memory devices 290 stacked vertically. FIG. 1 is a cross-sectional view of a memory device having a structure similar to that shown in FIG.

[0376] FIG. 28 shows a memory device 290_1, a memory device 290_2, and a memory device The example shows a configuration in which the 290_n (n is a natural number of 3 or more) and the 290_n are stacked. As shown in FIG. 28, the memory device 290_2 has a conductor 24 which functions as a plug. The position of 0a is arranged at a different position from that of the memory device 290_1. This can reduce the parasitic capacitance with adjacent memory devices, or This has the effect of increasing the degree of freedom in circuit design. In the embodiment, the position of the conductor 240a functioning as a plug is changed to correspond to the upper and lower memory devices. However, the present invention is not limited to this. For example, when viewed from above, The conductor 240a, which functions as a plug, is rotated in a quarter direction around the body 260. Alternatively, a capacitive device 292 may be disposed.

[0377] Alternatively, in a cross-sectional view in the channel width direction, the conductor 240a functioning as a plug is An example of such a configuration is shown in FIG. By configuring the memory device in such a way that, for example, the bit line for writing That is, in multiple memory devices 290, the bit Since the lines and other components can be shared, this structure is advantageous for miniaturization. In the embodiment, a conductor 240a is provided adjacent to the bit line, which serves as a plug for electrical connection to the bit line. However, the present invention is not limited to this. For example, The back gate electrodes of transistors are common to adjacent memory devices. This is also fine.

[0378] 28 and 29, the memory device 290_1, the memory device 29 0_2, and memory device 290_n are made of insulator 287, insulator 283, and insulator 290_n. The insulator 283 and the insulator 211 are covered with the memory cell 84. The insulating body 284 is in contact with the outer periphery of the rear device 290_1. The edge 284 and the insulator 286 are in contact with each other.

[0379] In addition, an insulator 2 is provided between the memory device 290_1 and the memory device 290_2. 82, insulator 296, insulator 298, and insulator 214 are provided.

[0380] The insulators 296 and 298 are made of the same material as the insulator 211, for example. For example, the insulator 282 and the insulator 214 can be made of aluminum oxide. Insulator 286 and insulator 298 may be formed of silicon nitride.

[0381] In the transistor 200 shown in FIG. 4, an insulator 205 is provided below the conductor 205. 28 and 29, the insulating layer 11, the insulating layer 212, and the insulating layer 214 are laminated. In the transistors included in the memory devices 290_2 to 290_n shown in FIG. In this case, a part of the layer formed on the upper part of the transistor of the memory device in the lower layer is shared. This allows one or two layers to be eliminated from the three-layer laminate structure. In other words, by using some of the insulators in common between the upper and lower memory devices, A highly productive semiconductor device can be obtained.

[0382] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a highly productive semiconductor device can be provided. can be provided.

[0383] This embodiment may be any of the other embodiments or examples at least a portion of which are described herein. can be implemented in appropriate combination.

[0384] (Embodiment 2) In this embodiment, one mode of a semiconductor device that can be applied to other embodiments of the present invention will be described. An example of the configuration of a semiconductor device will be described below.

[0385] <Configuration Example 2 of Semiconductor Device> FIG. 30A is a cross-sectional view of a transistor 2100A in the channel length direction.

[0386] The transistor 2100A is provided on a substrate 2102, an insulating layer 2121, an insulating layer 21 22, insulating layer 2123, conductive layer 2106, insulating layer 2103, semiconductor layer 2108, insulating layer 2 110, metal oxide layer 2114, conductive layer 2112, insulating layer 2124, insulating layer 2125, insulating On the substrate 2102, an insulating layer 2121, an insulating layer 2122, an insulating layer 2126, etc. are provided. 123 is provided in order, a conductive layer 2106 is provided on the insulating layer 2123, and the insulating layer 2123 An insulating layer 2103 is provided over the conductive layer 2106. The island-shaped semiconductor layer 2108 is The insulating layer 2103 is provided over the insulating layer 2103 and has a region overlapping with part of the conductive layer 2106. 110 is provided on the semiconductor layer 2108. The metal oxide layer 2114 and the conductive layer 211 2 are laminated in this order on the insulating layer 2110, and a part of the semiconductor layer 2108, It has a region that overlaps with part of the conductive layer 2106 .

[0387] The insulating layer 2124 has an area in contact with a part of the insulating layer 2123, and is layer 2103, a semiconductor layer 2108, an insulating layer 2110, a metal oxide layer 2114, and a conductive layer The insulating layer 2125 is provided on the insulating layer 2122 and the insulating layer 2121. The insulating layer 2126 has an area in contact with a part of the insulating layer 2124. It is provided on the border layer 2125 .

[0388] In the transistor 2100A, at least the semiconductor layer 2108 is The insulating layer 2123 and the insulating layer 2124 are provided between the semiconductor layer 2108 In addition, the insulating layer 2123 and the insulating layer 2124 are preferably in contact with each other on the outside. 2121 and insulating layer 2122, and insulating layer 2125 and insulating layer 2126. In this case, it is preferable that the insulating layer 2125 is in contact with at least the insulating layer 2122. , and further preferably in contact with the insulating layer 2121 .

[0389] In other words, in the transistor 2100A, the semiconductor layer 2108 is and an insulating layer 2124. The semiconductor layer 2108, the insulating layer 2123, and the insulating The layer 2124 is surrounded by an insulating layer 2122 and an insulating layer 2125. 2108, insulating layer 2123, insulating layer 2124, insulating layer 2122, and insulating layer 2125 are Since the insulating layer 2121 and the insulating layer 2126 are sandwiched between the insulating layer 2121 and the insulating layer 2126, It can be said that it is surrounded by the insulating layer 2121 and the insulating layer 2126 .

[0390] In other words, the sealing structure provided by the insulating layer 2123 and the insulating layer 2124 is similar to that of the above-mentioned embodiment. The insulating material 214, the insulating material 287, and the insulating material 282 described in the embodiment are provided. Therefore, the insulating layer 2123 and the insulating layer 2124 are equivalent to a sealing structure. , the description of insulator 287, and insulator 282 can be taken into consideration.

[0391] In addition, a sealing layer provided by the insulating layer 2121, the insulating layer 2122, and the insulating layer 2125 The structure is the same as that of the insulators 211, 212, and 283 described in the previous embodiment. Therefore, the insulating layer 2122 and the insulating layer 2125 correspond to a sealing structure formed by the insulating layer 2122. The descriptions of insulators 211, 212, and 283 can be referred to.

[0392] Furthermore, the insulating layer 2126 corresponds to the insulator 284 described in the previous embodiment. For the insulating layer 2126, the description of the insulator 284 can be referred to.

[0393] The ends of the conductive layer 2112 and the metal oxide layer 2114 are located inside the ends of the insulating layer 2110. In other words, the insulating layer 2110 is located at least on the semiconductor layer 2108. , has a portion that protrudes outward beyond the ends of the conductive layer 2112 and the metal oxide layer 2114.

[0394] In addition, the end of the conductive layer 2112 is located inside the end of the metal oxide layer 2114. In addition, the insulating layer 2124 is in contact with a part of the upper surface and the side surface of the metal oxide layer 2114. It will be established.

[0395] In the transistor 2100A, the end of the conductive layer 2112 is in contact with the metal oxide layer 2114. In other words, the metal oxide layer 2114 is at least an insulating layer. On 2110, there is a portion that protrudes outward beyond the end of the conductive layer 2112.

[0396] The end of the conductive layer 2112 is located inside the end of the metal oxide layer 2114, The step on the side surface of the conductive layer 2112 and the metal oxide layer 2114 becomes gentler, and the conductive layer 2112 and layers formed on the metal oxide layer 2114 (e.g., insulating layer 2124, insulating layer 2125 , the step coverage of the insulating layer 2126) is improved, and defects such as step discontinuities and voids in the layer occur. This can be suppressed.

[0397] The conductive layer 2112 and the metal oxide layer 2114 are preferably formed by a wet etching method. In addition, the metal oxide layer 2114 may be etched at a higher rate than the conductive layer 2112. By using a material with a slower thermal conductivity, the edge of the conductive layer 2112 is more sensitive to the thermal conductivity than the edge of the metal oxide layer 2114. Furthermore, the metal oxide layer 2114 and the conductive layer 2115 can be formed in the same process. 2112, which can increase productivity.

[0398] The present embodiment is not limited to the above. Alternatively, the side of the conductive layer 2112 and the metal oxide layer 2114 may coincide with each other. The side surfaces may have coplanar surfaces.

[0399] The semiconductor layer 2108 is made up of a pair of regions 2108L sandwiching a channel forming region therebetween, and a The region 2108L is a region of the semiconductor layer 2108 that is adjacent to the insulating layer 2108N. 110 and not overlapping with the metal oxide layer 2114 and the conductive layer 2112. It is.

[0400] The region 2108C functions as a channel forming region. If the gate electrode is conductive, it functions as a part of the gate electrode and therefore functions as a gate insulating layer. An electric field is applied to the region 2108C from the gate electrode through the insulating layer 2110, which corresponds to the channel region. However, the present embodiment is not limited to this. The conductive layer 2106 is not overlapped with the region 2108L and the region 2108N. In some cases, channels may form in the septum (part of the septum).

[0401] The region 2108L functions as a buffer region for reducing the drain electric field. The region 2108L is a region that does not overlap with the conductive layer 2112 and the metal oxide layer 2114. Therefore, even when a gate voltage is applied to the conductive layer 2112, the channel is hardly formed. The region 2108L preferably has a higher carrier concentration than the region 2108C. This allows the region 2108L to function as an LDD region.

[0402] Region 2108L is a region having the same or lower resistance compared to region 2108C, The oxygen vacancy density is the same or higher, and the impurity concentration is the same or higher. It can also be referred to as the degree or high region.

[0403] Region 2108L is a region having the same or higher resistance than region 2108N, The oxygen vacancy density is the same or low, the impurity concentration is the same or low, and the impurity concentration is the same. It can also be referred to as a moderate or low area.

[0404] In this manner, the region 2108C which is the channel forming region and the source region or drain region A region 2108L that functions as an LDD region is provided between the region 2108N that functions as an LDD region. This results in a highly reliable transistor with both high drain breakdown voltage and high on-current. It is possible to achieve this.

[0405] Region 2108N functions as a source region or a drain region, and The region 2108N is the region with the lowest resistance compared to other regions. The area with the highest carrier concentration and the highest oxygen vacancy density compared to the other areas of 108. It can also be said to be the region with the highest impurity concentration.

[0406] The lower the electrical resistance of the region 2108N, the more preferable. For example, the sheet resistance of the region 2108N is Value is 1Ω / □ or more 1×10 3 Less than Ω / □, preferably 1Ω / □ or more 8×10 2 Ω / □ or less It is preferable to set it to lower.

[0407] In addition, the electrical resistance of the region 2108C in the state where the channel is not formed is higher. For example, the sheet resistance value of the region 2108C is preferably 1×10 9 Ω / □ or more, preferably is 5 x 10 9 Ω / □ or more, preferably 1×10 10 It is preferable that it is Ω / □ or more. .

[0408] The higher the electrical resistance of the region 2108C in the state where no channel is formed, the more preferable. However, if an upper limit is to be set, for example, in the case of the line in area 2108C, The value of the port resistor is 1×10 9 Ω / □ or more 1×10 12 Ω / □ or less, preferably 5×10 9 Ω / □ or more 1×10 12 Ω / □ or less, more preferably 1×10 10 Ω / □ or more 1×10 1 2 It is preferable that the resistance is Ω / □ or less.

[0409] The sheet resistance value of the region 2108L is, for example, 1×10 3 Ω / □ or more 1×10 9 Ω / □ or less Lower, preferably 1 x 10 3 Ω / □ or more 1×10 8 Ω / □ or less, more preferably 1×10 3 Ω / □ or more 1×10 7 The resistance can be set to Ω / □ or less. As a result, a transistor having good electrical characteristics and high reliability can be obtained. The resistance can be calculated from the resistance value. Such an area 2108L is divided into an area 2108N and an area By providing it between 2108C, the source-drain breakdown voltage of the transistor 2100A is increased. It can be done.

[0410] In addition, the electrical resistance of the region 2108C in a state where a channel is not formed is 1 x 10 of electrical resistance of 108N 6 1×10 times more 12 times or less, preferably 1×10 6 more than twice Top 1×10 11 times or less, more preferably 1×10 61×10 times more 10 The number of employees must be less than twice the number of employees. can be done.

[0411] The electrical resistance of the region 2108C in the state where no channel is formed is 1 x 10 of electrical resistance in L 0 1×10 times more 9 times or less, preferably 1×10 1 more than 1×1 0 8 times or less, more preferably 1×10 2 1×10 times more 7 It can be up to twice as much.

[0412] The electrical resistance of region 2108L is 1×10 0 1×10 times more 9 times or less, preferably 1×10 1 1×10 times more 8 times or less, more preferably 1×10 1 Double More than 1×10 7 It can be up to twice as much.

[0413] The region 2108L having the above-mentioned resistance is provided between the region 2108N and the channel forming region. By doing so, the source-drain breakdown voltage of the transistor 2100A can be increased.

[0414] The carrier concentration in the semiconductor layer 2108 is the lowest in the region 2108C, It is preferable that the distribution is such that the density is higher in the region 108L than in the region 2108N. By providing the region 2108L between the region 2108C and the region 2108N, for example, Even if impurities such as hydrogen diffuse from the region 2108N during the process, the region 2108C The carrier concentration can be kept extremely low.

[0415] The carrier concentration in the region 2108C functioning as a channel forming region is preferably as low as possible. 1×10 18 cm -3 It is preferable that the value is less than 1×10 17 cm -3 Below It is more preferable to use 1×10 16 cm -3 More preferably, it is 1×1 0 13 cm -3 More preferably, it is 1×10 12 cm -3 Is less than or equal to It is more preferable that the lower limit of the carrier concentration of the region 2108C is not particularly limited. There is no, for example, 1×10 -9 cm -3 It can be said that:

[0416] On the other hand, the carrier concentration in the region 2108N is, for example, 5×10 18 cm -3 That's all good Preferably 1×10 19 cm -3 More preferably, 5×10 19 cm -3 That's all. There is no particular limit to the upper limit of the carrier concentration in the region 2108N. But for example, 5×10 21 cm -3 , or 1 × 10 22 cm -3 etc.

[0417] The carrier concentration in region 2108L is between the values ​​in regions 2108C and 2108N. For example, 1×10 14 cm -3 More than 1×10 20 cm -3 Less than The value of

[0418] The carrier concentration in the region 2108L does not have to be uniform. In some cases, the carrier concentration is reduced toward the channel formation region. For example, either the hydrogen concentration or the oxygen vacancy concentration in the region 2108L, or Both have a gradient in which the concentration decreases from the region 2108N side to the channel formation region side.

[0043]

[0419] The semiconductor layer 2108 preferably contains a metal oxide. The metal oxide that can be used is oxide 230, etc., and other embodiments or configuration examples are to be referred to. In addition, the insulating layer 2103 in contact with the channel formation region of the semiconductor layer 2108 can be formed. It is preferable to use an oxide film for the insulating layer 2110. For example, a silicon oxide film or an oxide An oxide film such as a silicon nitride film or an aluminum oxide film can be used. The oxygen desorbed from the insulating layer 2103 and the insulating layer 2110 is transported to the channel of the semiconductor layer 2108. By supplying oxygen to the semiconductor layer 2108, oxygen vacancies in the semiconductor layer 2108 can be reduced.

[0420] A portion of the end of the insulating layer 2110 is located on the semiconductor layer 2108. The conductive layer 2112 and the gate insulating layer are overlapped with each other. The portion that does not overlap with the metal oxide layer 2114 (i.e., the portion that overlaps with the region 2108L) Yes.

[0421] The insulating layer 2110 may have a laminated structure of two or more layers. 0 is an insulating layer 2110a, an insulating layer 2110b on the insulating layer 2110a, and an insulating layer 2110b In this example, the insulating layer 2110a is a three-layer structure with the insulating layer 2110c on top. Since the edge layer 2110b and the insulating layer 2110c can be made of insulating films of the same material, The interfaces between the insulating layers 2110a, 2110b, and 2110c are clearly visible. Therefore, in this embodiment, the insulating layer 2110a and the insulating layer The interfaces between the insulating layer 2110b and the insulating layer 2110c are shown by dashed lines.

[0422] The insulating layer 2110a has a region in contact with a channel formation region of the semiconductor layer 2108. The edge layer 2110c has an area in contact with the metal oxide layer 2114. The insulating layer 2110b has It is located between insulating layer 2110a and insulating layer 2110c.

[0423] The insulating layer 2110a, the insulating layer 2110b, and the insulating layer 2110c each contain an oxide. In this case, the insulating layer 2110a, the insulating layer 2110b and the insulating The edge layers 2110c are preferably deposited successively in the same deposition apparatus.

[0424] For example, the insulating layer 2110a, the insulating layer 2110b, and the insulating layer 2110c may be made of oxide. Silicon film, silicon oxynitride film, silicon oxynitride film, aluminum oxide film, oxide haf tungsten oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film , magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film. An insulating layer including the above may be used.

[0425] The insulating layer 2110 in contact with the semiconductor layer 2108 has a stacked structure of oxide insulating films. It is preferable that the oxygen concentration in the stoichiometric composition is 100% or more, and more preferable that the oxygen concentration in the stoichiometric composition is 100% or more. In other words, the insulating layer 2110 includes an insulating film capable of releasing oxygen. For example, the insulating layer 2110 is formed in an oxygen atmosphere. Then, a heat treatment or a plasma treatment is performed in an oxygen atmosphere. Oxygen is supplied to the insulating layer 2110 by forming an oxide film in an oxygen atmosphere. In particular, the insulating layer 2110A in contact with the semiconductor layer 2108 may be formed in the same manner as described in the previous embodiment. As with the previously described insulator 280, it is preferred that it contains an excess of oxygen.

[0426] For example, the insulating layer 2110a, the insulating layer 2110b, and the insulating layer 2110c are formed by sputtering. Chemical Vapor Deposition (CVD) method, vacuum evaporation method, pulsed laser deposition (PLD) method ition) method, Atomic Layer Deposition (ALD) method The CVD method can be, for example, plasma chemical vapor deposition. There are plasma enhanced CVD (PECVD) and thermal CVD methods. do.

[0427] In particular, the insulating layer 2110a, the insulating layer 2110b, and the insulating layer 2110c are formed by plasma CVD. It is preferable to form the film by the method.

[0428] The insulating layer 2110c, like the insulator 250, has a surface area larger than that of the insulating layer 2110b. This reduces defects and creates an extremely dense film that is less likely to adsorb impurities in the air, such as water. It is preferable that there is.

[0429] The insulating layer 2110b is formed thicker than the insulating layers 2110a and 2110c. For example, it is preferable that the insulating layer 2110a is formed at a higher rate than the insulating layer 2110c. By using a lower condition, the insulating layer 2110b may be formed thicker. The time required for the film formation process 10 can be shortened.

[0430] Here, the boundary between the insulating layer 2110a and the insulating layer 2110b, and the boundary between the insulating layer 2110b and the insulating layer Since the boundaries of 2110c may be unclear, in FIG. 30(A), these boundaries are broken. The insulating layer 2110a and the insulating layer 2110b have different film densities. In this case, a transmission electron microscope (TEM) image of a cross section of the insulating layer 2110 is In ion electron microscopy images, these boundaries are Similarly, the difference in contrast between the insulating layer 2110b and the insulating layer 2110c may be observed. The boundary of the insulating layer 2110c may also be observable.

[0431] When the conductive layer 2112 and the metal oxide layer 2114 are formed, the conductive layer 2112 is not overlapped with the metal oxide layer 2114. In some cases, the thickness of the insulating layer 2110 in the region where the metal oxide layer is not formed may be thin. The insulating layer 2110c in the area not overlapping with 2114 is removed, and the insulating layer 2110a and the insulating layer In addition, the insulating layer 2110b in the region overlapping with the metal oxide layer 2114 is In comparison with the edge layer 2110b, the insulating layer 2110b in the area that does not overlap with the metal oxide layer 2114 The thickness may be reduced.

[0432] By reducing the thickness of the insulating layer 2110 in the area not overlapping with the metal oxide layer 2114, , the step at the end of the insulating layer 2110 becomes smaller, and the layer (e.g., The step coverage of the insulating layers 2124, 2125, and 2126 is improved, and the layers are not subject to step cuts. This can prevent defects such as cracks and porosity from occurring.

[0433] The insulating layer 2110 may have a different structure from that shown in FIG. Insulating layers 2110a, 2110b, and 2110c remain in the area not overlapping with . In addition, the insulating layer 2110c in the region overlapping with the metal oxide layer 2114 may be formed. In comparison, the thickness of the insulating layer 2110c in the region not overlapping with the metal oxide layer 2114 is thinner. The insulating layer 2110c may remain in the region not overlapping with the metal oxide layer 2114. By using a structure in which the insulating layer 2110 is provided, it is possible to prevent water from being adsorbed to the insulating layer 2110. The thickness of the insulating layer 2110c in the region overlapping with the layer 2114 is preferably 1 nm to 50 nm. is 2 nm or more and 40 nm or less, and more preferably 3 nm or more and 30 nm or less.

[0434] The insulating layer 2110 is made up of an insulating layer 2110a and an insulating layer 2110 on the insulating layer 2110a. Alternatively, the insulating layer 2110 may have a single layer structure. As the insulating layer 2110, the insulating layer 2110a, the insulating layer 2110b or the insulating layer 2110 may be used depending on the purpose. 110c can be selected as appropriate.

[0435] The insulating layer 2103 can have a layered structure. In FIG. 30(A), the insulating layer 2103 is From the conductive layer 2106 side, the insulating layer 2103a, the insulating layer 2103b, the insulating layer 2103c, and The insulating layer 2103 and the insulating layer 2103d are stacked in this order. The insulating layer 2103a is in contact with the conductive layer 2106. The insulating layer 2103d is in contact with the semiconductor layer 2108.

[0436] The insulating layer 2103 has a high withstand voltage, a small film stress, and is not prone to releasing hydrogen or water. The film has few defects, and the diffusion of the metal elements contained in the conductive layer 2106 is suppressed. It is preferable to satisfy one or more of the above, and it is most preferable to satisfy all of the above. .

[0437] Among the four insulating layers of the insulating layer 2103, the insulating layer 21 located on the conductive layer 2106 side is The insulating layers 2103a, 2103b, and 2103c are made of insulating films containing nitrogen. On the other hand, the insulating layer 2103d in contact with the semiconductor layer 2108 is preferably an insulating film containing oxygen. It is preferable to use the insulating layer 2103. It is preferable to use a Zuma CVD apparatus to perform continuous film formation without exposure to the atmosphere.

[0438] The insulating layer 2103a, the insulating layer 2103b, and the insulating layer 2103c may be, for example, silicon nitride. Nitrogen-containing films such as silicon oxide, silicon nitride, aluminum nitride, and hafnium nitride As the insulating layer 2103d, an insulating film containing the insulating layer 211 can be preferably used. The insulating film that can be used in .0 can be used.

[0439] The insulating layers 2103a and 2103c can prevent the diffusion of impurities from below. The insulating layer 2103a is preferably a dense film that can be formed by the conductive layer 2106. The insulating layer 2103c absorbs the metal elements and the hydrogen and water contained in the insulating layer 2103b. It is preferable that the insulating layer 2103a and the insulating layer 2103 are a film that can be locked. For the insulating layer 2103c, an insulating film formed under conditions of a lower film formation rate than that of the insulating layer 2103b is used. can.

[0440] On the other hand, the insulating layer 2103b is an insulating film formed under conditions of low stress and high film formation speed. In addition, the insulating layer 2103b is preferably used as the insulating layer 2103a and the insulating layer 2103b. It is preferable that it is formed thicker than 3c.

[0441] For example, the insulating layer 2103a, the insulating layer 2103b, and the insulating layer 2103c are each Even when a silicon nitride film formed by plasma CVD is used, the insulating layer 2103b Therefore, the film has a lower film density than the other two insulating layers. In transmission electron microscope images, etc., this can be observed as a difference in contrast. In addition, the boundary between the insulating layer 2103a and the insulating layer 2103b and the insulating layer 210 The boundary between the insulating layer 2103b and the insulating layer 2103c may be unclear. The boundaries between these are indicated by dashed lines.

[0442] The insulating layer 2103d in contact with the semiconductor layer 2108 has a surface on which impurities such as water are absorbed. It is preferable to use a dense insulating film that is difficult to adhere to. It is preferable to use an insulating film in which impurities such as hydrogen are reduced. For example, the insulating layer 2103 As the insulating layer 2110c, an insulating film similar to the insulating layer 2110c of the insulating layer 2110 may be used as the insulating layer 2110d. can.

[0443] The conductive layer 2106 is made of a metal film or In the case of using an alloy film, the insulating layer 2103a is not provided, and the insulating layer 2103b and the insulating layer Alternatively, the insulating layer 2103c and the insulating layer 2103d may be stacked.

[0444] The insulating layer 2103 having such a laminated structure makes it possible to form a highly reliable transistor. It is possible to achieve this.

[0445] The insulating layer 2123 and the insulating layer 2124 are formed by the semiconductor layer 2108, the insulating layer 2103, and It is preferable to use a material that absorbs impurities such as hydrogen contained in the insulating layer 2110. The insulating layer 2123 and the insulating layer 2124 are preferably made of a material containing aluminum oxide. In this case, the insulating layer 2123 and the insulating layer 2124 can be formed of a material such as hydrogen. It functions as a gettering layer for impurities. This includes hydrogen atoms, hydrogen molecules, hydrogen combined with oxygen, etc., and ionized forms thereof.

[0446] In addition, the materials used for the insulating layers 2123 and 2124 suppress the permeation of oxygen. It is more preferable that the effect is to

[0447] As shown in FIG. 30A, the insulating layer 2124 is adjacent to the conductive layer 21 in the channel length direction. 12, the top and side surfaces of metal oxide layer 2114, the top and side surfaces of insulating layer 2110, The insulating layer 2103 is provided to cover the upper and side surfaces of the semiconductor layer 2108 and the side surfaces of the insulating layer 2103. The insulating layer 2103 is in contact with the insulating layer 2123 on the outside. The end of the insulating layer 2103 is approximately aligned with the end of the semiconductor layer 2108. The surface and the side surface of the semiconductor layer 2108 are flush with each other.

[0448] Although not shown, the insulating layer 2110 is not overlapped with the insulating layer 2110 in the channel width direction. The edge layer 2123 is preferably provided in contact with an insulating layer 2124 .

[0449] By adopting the above structure, the semiconductor layer 2108, the insulating layer 2103, the insulating layer 2110, etc. Impurities such as hydrogen contained in the silicon dioxide are efficiently absorbed into the insulating layers 2123 and 2124. This allows the semiconductor layer to getter impurities such as hydrogen. 2108, the insulating layer 2103, the insulating layer 2110, etc., the oxygen contained in the insulating layer 2123 , and diffusion to the outside of the insulating layer 2124 can be suppressed.

[0450] The insulating layer 2121, the insulating layer 2122, the insulating layer 2125, and the insulating layer 2126 are each formed of a hydrogen It is preferable to use a material that suppresses the transmission of the insulating layer 2121, the insulating layer 2122, and the insulating layer 2123. Layer 2125 and insulating layer 2126 may be, for example, silicon nitride or a nitride-containing Materials containing silicon oxide can be used. Such materials include silicon nitride. In this case, it is preferable to use the insulating layer 2121, the insulating layer 2122, and the insulating layer 2125. The insulating layer 2126 functions as a protective layer against impurities such as hydrogen. Here, hydrogen refers to hydrogen atoms, hydrogen molecules, hydrogen combined with oxygen, etc., and their ions. This includes compounds.

[0451] The insulating layer 2125 is provided over the insulating layer 2124. 123 and the insulating layer 2122 so as to surround the insulating layer 2124. Further, the insulating layer 2125 is formed on the outer side of the insulating layer 2123 and the insulating layer 2124. The insulating layer 2126 is provided over the insulating layer 2125.

[0452] By adopting the above structure, the insulating layer 2121, the insulating layer 2122, the insulating layer 2125, and the insulating It is possible to suppress impurities such as hydrogen from entering the semiconductor layer 2108 from the outside of the edge layer 2126. In other words, in the transistor 2100A, at least the semiconductor layer 2108 is an insulating layer. surrounded by layer 2121, insulating layer 2122, insulating layer 2125, and insulating layer 2126. This makes it possible to suppress the intrusion of impurity elements such as hydrogen from the outside.

[0453] In this embodiment, a laminated structure of an insulating layer 2125 and an insulating layer 2126 is used as a protective layer. However, one of the insulating layers 2125 and 2126 may not be provided if it is not necessary. The insulating layer 2125 may have a laminated structure of two or more layers. 2121 and the insulating layer 2122. If one of the insulating layers 2122 is unnecessary, it may not be provided. A laminated structure of the above may also be used.

[0454] In addition, the end of the insulating layer 2110, the end of the metal oxide layer 2114, and the end of the conductive layer 2112 The ends of the metal oxide layer 2114 preferably have a tapered shape. The taper angle of the end of the conductive layer 2110 is preferably smaller than the taper angle of the end of the insulating layer 2110. The end of 112 has a smaller taper angle than the end of the metal oxide layer 2114. With such a structure, the insulating layer 2110, the metal oxide layer 2114, and and layers formed on the conductive layer 2112 (e.g., insulating layer 2124, insulating layer 2125, and The covering property of the insulating layer 2126 is improved, and defects such as discontinuities and voids in the layer are prevented. It can be suppressed.

[0455] In this specification, the taper angle is the angle at which the target layer is cut when viewed from a cross section (e.g., perpendicular to the surface of the substrate). This refers to the inclination angle between the side and bottom surfaces of the layer when observed from a direction perpendicular to the intersecting plane.

[0456] A part of the conductive layer 2106 functions as a first gate electrode (also called a bottom gate electrode). A part of the conductive layer 2112 serves as a second gate electrode (also referred to as a top gate electrode). A part of the insulating layer 2103 functions as a first gate insulating layer. A portion of the insulating layer 2110 functions as a second gate insulating layer.

[0457] The conductive layer 2106 may be electrically connected to the conductive layer 2112. Thus, the conductive layer 2106 and the conductive layer 2112 can be applied with the same potential.

[0458] Although not shown, the conductive layer 2112 and the conductive layer 2106 are It is preferable that the semiconductor layer 2108 protrudes outward from the edge of the semiconductor layer 2108. The entire layer 2108 in the channel width direction is electrically conductive via the insulating layers 2110 and 2103. The layer 2112 and the conductive layer 2106 are covered with the conductive layer 2112 .

[0459] With this structure, the semiconductor layer 2108 is electrically connected to the pair of gate electrodes. In this case, the conductive layer 2106 and the conductive layer 2112 are electrically surrounded by the conductive layer 2106 and the conductive layer 2112. It is preferable to apply the same potential to the semiconductor layer 2108. This induces a channel in the semiconductor layer 2108. Since an electric field for increasing the on-state current of the transistor 2100A can be effectively applied, This also makes it possible to miniaturize the transistor 2100A.

[0460] Note that the conductive layer 2112 and the conductive layer 2106 may not be connected to each other. A constant potential is applied to one of the pair of gate electrodes, and the other is applied to drive the transistor 2100A. In this case, the transistor 210 It is also possible to control the threshold voltage when driving 0 A from the other electrode.

[0461] As shown in FIG. 30A, the transistor 2100A is formed on an insulating layer 2126. The conductive layer 2120a and the conductive layer 2120b may be included. The conductive layer 2120a and the conductive layer 2120b function as a source electrode or a drain electrode. The layer 2120b is provided on the insulating layer 2124, the insulating layer 2125, and the insulating layer 2126, respectively. Through the opening 2119a or the opening 2119b, are electrically connected.

[0462] The semiconductor layer 2108 may be used as the oxide 230 in other embodiments or configurations. For example, the semiconductor layer 2108 may be an oxide such as a metal oxide. , indium, and M (M is gallium, aluminum, silicon, boron, yttrium , tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium tungsten, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten It is preferable that the alloy contains at least one selected from the group consisting of zinc, tin, magnesium, and zinc. In particular, M is one selected from aluminum, gallium, yttrium, and tin. It is preferable that there are multiple types of.

[0463] In particular, the semiconductor layer 2108 is made of an oxide containing indium, gallium, and zinc. It is preferable that

[0464] The semiconductor layer 2108 may be a layer having a different composition, a layer having a different crystallinity, or a layer having a different impurity concentration. Alternatively, a laminated structure may be used in which layers having different thicknesses are laminated.

[0465] It is preferable to use a low resistance material for the conductive layer 2112. By using such materials, parasitic resistance can be reduced, resulting in a transistor with a high on-current. In addition, a semiconductor device having a high on-state current can be obtained. By reducing the wiring resistance in high-definition display devices, signal delays can be suppressed, enabling high-speed operation. Since the conductive layer 2112 functions as a gate electrode, or for a gate electrode such as conductor 260 or conductor 205 as described in other configuration examples. For example, the conductive layer 2112 may be made of copper, Silver, gold, aluminum, etc. can be used. In particular, copper has low resistance and is This is preferable because it is suitable for mass production.

[0466] The conductive layer 2112 may have a layered structure. When the conductive layer 2112 has a layered structure, A second conductive layer is provided on top or bottom of the first low resistance conductive layer, or both. The second conductive layer is made of a conductive material that is less susceptible to oxidation (has oxidation resistance) than the first conductive layer. It is preferable to use a second conductive layer that suppresses the diffusion of the components of the first conductive layer. For the second conductive layer, for example, indium oxide, indium Zinc oxide, indium tin oxide (ITO), silicon-containing indium tin oxide Metal oxides such as zinc oxide, titanium nitride, tantalum nitride, and molybdenum nitride Metal nitrides such as butanol and tungsten nitride can be suitably used.

[0467] The metal oxide layer 2114 located between the insulating layer 2110 and the conductive layer 2112 is It functions as a barrier film that prevents oxygen contained in 110 from diffusing to the conductive layer 2112 side. Furthermore, the metal oxide layer 2114 is formed by absorbing hydrogen and water contained in the conductive layer 2112 into the insulating layer 2110. The metal oxide layer 2114 also functions as a barrier film to prevent diffusion to the other side. At least a material less permeable to oxygen and hydrogen than the insulating layer 2110 can be used.

[0468] The metal oxide layer 2114 absorbs oxygen from aluminum, copper, etc., into the conductive layer 2112. Even when a metal material that is easily oxidized is used, oxygen diffuses from the insulating layer 2110 to the conductive layer 2112. Even if the conductive layer 2112 contains hydrogen, the conductive layer 2112 can be prevented from diffusing. Prevents hydrogen from diffusing from the conductive layer 2112 through the insulating layer 2110 to the semiconductor layer 2108. As a result, the carrier concentration in the channel formation region of the semiconductor layer 2108 can be It can be made extremely low.

[0469] The metal oxide layer 2114 can be made of an insulating material or a conductive material. When the metal oxide layer 2114 has insulating properties, it functions as a part of the gate insulating layer. On the other hand, if the metal oxide layer 2114 is conductive, it functions as a part of the gate electrode. do.

[0470] For the metal oxide layer 2114, an insulating material having a higher dielectric constant than silicon oxide is used. In particular, an aluminum oxide film, a hafnium oxide film, or a hafnium aluminum film is preferable. It is preferable to use a polyester film or the like since the driving voltage can be reduced.

[0471] The metal oxide layer 2114 may be made of a metal oxide. For example, indium oxide may be used. Indium, indium zinc oxide, indium tin oxide (ITO), and silicon-containing indium An oxide containing indium, such as indium tin oxide (ITSO), can be used. Conductive oxides containing indium are preferred because of their high conductivity. The inclusion of fluorine makes the film difficult to crystallize and has a high flatness. The metal oxide layer 2114 contains zinc oxide and gallium. Metal oxides such as zinc oxide can be used as the metal oxide layer 2114. A laminated structure of these may also be used.

[0472] The metal oxide layer 2114 may be an oxide layer containing at least one of the same elements as the semiconductor layer 2108. In particular, oxide semiconductors applicable to the semiconductor layer 2108 are preferably used. In this case, it is preferable to use a material similar to that of the semiconductor layer 210 as the metal oxide layer 2114. By applying a metal oxide film formed using the same sputtering target as in 8, This is preferable because the equipment can be shared.

[0473] Alternatively, both the semiconductor layer 2108 and the metal oxide layer 2114 may contain indium and gallium. In the case of using a metal oxide material containing gallium, the composition (content ratio) of gallium is higher than that of the semiconductor layer 2108. ) is preferably used because it can further increase the blocking ability against oxygen. In this case, the semiconductor layer 2108 contains more indium than the metal oxide layer 2114. By using a material with high conductivity, the field effect mobility of the transistor 2100A can be increased. can.

[0474] The metal oxide layer 2114 is preferably formed using a sputtering apparatus. For example, when forming an oxide film using a sputtering device, the formation is performed in an atmosphere containing oxygen gas. By forming the insulating layer 2110 and the semiconductor layer 2108, oxygen can be suitably added.

[0475] Conductive layer 2106 may be the same as conductive layer 2112, conductive layer 2120a, or conductive layer 2120b. In particular, when a material containing copper is used for the conductive layer 2106, the wiring resistance is reduced. In addition, the conductive layer 2106 may be made of tungsten, molybdenum, or the like. By using a material containing a high melting point metal, processing can be carried out at high temperatures in subsequent steps. do.

[0476] The region 2108N is a region containing an impurity element (first element). Examples of such elements include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, and ma. Examples of rare gases include helium, Neon, argon, krypton, and xenon. In particular, boron, phosphorus, magnesium It is preferable that the alloy contains two or more of these elements. good.

[0477] The above impurity elements are added by ion implantation, ion doping, etc. In addition, the formation of the insulating layer 2124 in contact with the region 2108N can Pure elements may be added to region 2108N.

[0478] The process of adding an impurity element to the region 2108N is performed using the insulating layer 2110 as a mask. This allows the region 2108N to be formed in a self-aligned manner.

[0479] The region 2108N has an impurity concentration of 1×10 19 atoms / cm 3 That's it, 1×10 2 3 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 That's it, 5 x 10 22 atoms / cm 3 Less than or equal to 1×10 20 atoms / cm 3 That's it, 1 ×10 22 atoms / cm 3 It is preferred to include a region in which:

[0480] The concentration of impurities contained in the region 2108N is measured, for example, by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry, X-ray photoelectron spectrometry, Optical method (XPS:X-ray Photoelectron Spectroscopy) When using XPS analysis, the surface or back side of the sample can be analyzed. By combining ion sputtering and XPS analysis, it is possible to determine the concentration distribution in the depth direction. This can be done.

[0481] In the region 2108N, the impurity element is preferably present in an oxidized state. For example, impurity elements such as boron, phosphorus, magnesium, aluminum, and silicon are used. It is preferable to use such an element that is easily oxidized. Such an element that is easily oxidized is a semiconductor. Since it can exist stably in an oxidized state by bonding with oxygen in the layer 2108, it can be used at high temperatures in the subsequent process. When exposed to high temperatures (for example, 400°C or higher, 600°C or higher, or 800°C or higher) In addition, the impurity element is prevented from taking away oxygen from the semiconductor layer 2108. As a result, many oxygen vacancies are generated in the region 2108N. By bonding with the junction, the region 2108N becomes a carrier supply source, and the resistance of the region 2108N becomes extremely low. do.

[0482] In addition, when performing a process at high temperatures in a later step, the film near the outside or the region 2108N may be damaged. If a large amount of oxygen is supplied to the region 2108N from the Therefore, when performing high-temperature processing, it is necessary to use insulating materials with high barrier properties against oxygen. Processing is preferably performed with layer 2124 covering semiconductor layer 2108 .

[0483] The insulating layer 2124 is provided in contact with a region 2108N of the semiconductor layer 2108.

[0484] The insulating layer 2124 may be, for example, an insulating film containing aluminum oxide. do.

[0485] The region 2108N contains many oxygen vacancies due to the addition of impurity elements as described above. It is an attitude.

[0486] By adopting such a configuration, the transistor 210 has excellent electrical characteristics and high reliability. 0A can be achieved.

[0487] <Configuration Example 3 of Semiconductor Device> FIG. 30B is a cross-sectional view of the transistor 2100B in the channel length direction.

[0488] The transistor 2100B is provided on a substrate 2102, and includes an insulating layer 2121 and an insulating layer 212 2, insulating layer 2123, conductive layer 2134, insulating layer 2136, semiconductor layer 2138, conductive layer 21 42a, conductive layer 2142b, insulating layer 2144, insulating layer 2146, insulating layer 2124, insulating layer 2125, and an insulating layer 2126. A conductive layer 2134 is provided on the insulating layer 2123. The insulating layer 2136 is provided to cover the conductive layer 2134. The conductive layer 2142a and the conductive layer 2142b have an island shape and are provided on the insulating layer 2136. 2142b are in contact with the upper surface of the semiconductor layer 2138 and are spaced apart from each other on the semiconductor layer 2138. In addition, the insulating layer 2136, the conductive layer 2142a, the conductive layer 2142b, An insulating layer 2144 is provided over the semiconductor layer 2138, and an insulating layer 2144 is provided over the insulating layer 2144. The insulating layer 2124 is provided on the insulating layer 2146. The insulating layer 2125 has an area in contact with a part of the insulating layer 2122 and the insulating layer 2123. The insulating layer 2124 has an area in contact with a part of the insulating layer 212. 6 is provided on the insulating layer 2125.

[0489] In the transistor 2100B, at least the semiconductor layer 2138 is The insulating layer 2123 and the insulating layer 2124 are provided between the semiconductor layer 2108 In addition, the insulating layer 2123 and the insulating layer 2124 are preferably in contact with each other on the outside. 2121 and insulating layer 2122, and insulating layer 2125 and insulating layer 2126. In this case, it is preferable that the insulating layer 2125 is in contact with at least the insulating layer 2122. , and is preferably in contact with the insulating layer 2121. In other words, the transistor 2100B 2, the semiconductor layer 2138 is surrounded by an insulating layer 2123 and an insulating layer 2124, The semiconductor layer 2108, the insulating layer 2123, and the insulating layer 2124 are The semiconductor layer 2138, the insulating layer 2123, and the insulating layer 2125 are surrounded by the edge layer 2125. 24, insulating layer 2122 and insulating layer 2125 are insulating layers 2121 and 2126 Since the insulating layer 2121 and the insulating layer 2126 are sandwiched between the insulating layers 2121 and 2126, It can be said that they feel more enclosed.

[0490] The conductive layer 2134 functions as a gate electrode. A part of the insulating layer 2136 serves as a gate insulating layer. The conductive layer 2142a functions as one of a source electrode or a drain electrode. The conductive layer 2142b functions as the other. The overlapping region functions as a channel formation region. A so-called bottom gate electrode is provided on the formation surface side (substrate 2102 side) of 138. Here, the side opposite to the conductive layer 2134 of the semiconductor layer 2138 is The surface on the side of the semiconductor layer 2100B is sometimes referred to as the back channel surface. No protective layer is provided between the back channel side of 2138 and the source and drain electrodes. This is a so-called channel etch structure transistor.

[0491] The semiconductor layer 2138 is made up of a semiconductor layer 2138a and a semiconductor layer 2138b in this order from the surface on which the semiconductor layer 2138 is to be formed. The semiconductor layer 2138a and the semiconductor layer 2138b are both laminated. It is preferable that the semiconductor layer 2138 located on the back channel side contains a metal oxide. b is a film having higher crystallinity than the semiconductor layer 2138a located on the conductive layer 2134 side. In this way, when the conductive layer 2142a and the conductive layer 2142b are processed, the semiconductor layer This can prevent a part of 2138 from being etched away and disappearing.

[0492] The semiconductor layer 2138 may be a metal oxide such as oxide 230 as shown in other embodiments or configurations. For example, the semiconductor layer 2138 can be made of an oxide such as indium oxide. , M (M is gallium, aluminum, silicon, boron, yttrium, tin, copper, barium, Nadium, Beryllium, Titanium, Iron, Nickel, Germanium, Zirconium, Molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable that M is selected from aluminium, arsenium, ruthenium, zinc, and zinc. One or more selected from aluminum, gallium, yttrium, and tin It is preferable.

[0493] In particular, the semiconductor layer 2138 is made of an oxide containing indium, gallium, and zinc. It is preferable that

[0494] The semiconductor layer 2138a and the semiconductor layer 2138b are layers having different compositions and different crystallinity. A layer having a different impurity concentration may be used. A laminate structure of three or more layers may also be used. stomach.

[0495] The conductive layer 2142a and the conductive layer 2142b are, in order from the formation surface side, the conductive layer 21 The conductive layer 43a, the conductive layer 2143b, and the conductive layer 2143c are stacked.

[0496] The conductive layer 2143b is made of a low-resistance conductive material, such as copper, silver, gold, or aluminum. In particular, it is preferable that the conductive layer 2143b contains copper or aluminum. It is preferable that the conductive layer 2143b has a lower resistance than the conductive layer 2143a and the conductive layer 2143c. It is preferable to use a conductive material. It is possible to make b have an extremely low resistance.

[0497] The conductive layer 2143a and the conductive layer 2143c are each independently a conductive layer 2143b For example, the conductive layer 2143a and the conductive layer 2143b may be made of different conductive materials. 43c each independently represents titanium, tungsten, molybdenum, chromium, tantalum, zinc It is preferable to use a conductive material containing, for example, lead, indium, platinum, or ruthenium.

[0498] In this manner, the conductive layer 2143b containing copper, aluminum, or the like is electrically connected to the conductive layer 2143a. By sandwiching the conductive layer 2143b between the conductive layer 2143c, oxidation of the surface of the conductive layer 2143b can be suppressed. In particular, the semiconductor layer 2143b can be prevented from diffusing into the surrounding layers. By providing the conductive layer 2143a between the conductive layer 2138 and the conductive layer 2143b, The metal elements contained in b can be prevented from diffusing into the semiconductor layer 2138, and the reliability is improved. A high transistor 2100B can be realized.

[0499] Here, an insulating layer 2144 is provided in contact with an end of the conductive layer 2143b.

[0500] The conductive layer 2142a and the conductive layer 2142b are not limited to a three-layer structure. It may be a two-layer structure including a conductive layer containing gold or aluminum, or a four-layer structure. For example, the conductive layer 2142a and the conductive layer 2142b may be a conductive layer 2143a and a conductive layer 2144. Alternatively, a conductive layer 2143b and a conductive layer 2143c may be laminated. A two-layer structure may also be used.

[0501] The conductive layer 2134 is used for the conductive layer 2143a, the conductive layer 2143b, and the conductive layer 2143c. The conductive materials described above that can be used can be used appropriately. In particular, conductive materials containing copper can be used. It is preferable to use

[0502] The insulating layer 2136 and the insulating layer 2144 in contact with the semiconductor layer 2138 are made of an insulating material containing an oxide. In addition, it is preferable to use a conductive material for the insulating layer 2136 and the insulating layer 2144. In this case, an insulating material containing oxide is used for a layer in contact with the semiconductor layer 2138.

[0503] The insulating layer 2136 is made of a nitride insulating film such as silicon nitride or aluminum nitride. When an insulating material that does not contain oxide is used, oxygen may be added to the top of the insulating layer 2136. It is preferable to perform a process of adding oxygen to the silicon substrate to form a region containing oxygen. Examples of the treatment include heat treatment or plasma treatment in an atmosphere containing oxygen, and ion doping. Ping processing, etc.

[0504] The insulating layer 2146 functions as a protective layer to protect the transistor 2100B. 2146 is silicon nitride, silicon oxynitride, silicon oxide, silicon oxynitride, oxide Inorganic insulating materials such as aluminum and aluminum nitride can be used. The layer 2146 is made of a material that does not easily diffuse oxygen, such as silicon nitride or aluminum oxide. By using the insulating layer 2144, the semiconductor layer 2138 and the insulating layer 2144 are prevented from being insulated from heat during the manufacturing process. This is preferable because it is possible to prevent oxygen from being released to the outside through the edge layer 2146. .

[0505] Alternatively, the insulating layer 2146 may be made of an organic insulating material that functions as a planarizing film. Alternatively, the insulating layer 2146 may be a laminate of a film containing an inorganic insulating material and a film containing an organic insulating material. may also be used.

[0506] In addition, the semiconductor layer 2138 is A pair of low resistance regions that function as a source region and a drain region are formed in the vicinity of the first region. The region may be a part of the semiconductor layer 2138 and may be formed in a region different from the channel formation region. The low-resistance region is also a region with high carrier density or n-type. In addition, in the semiconductor layer 2138, a pair of low resistance regions A region sandwiched between the conductive layer 2134 and overlapping with the conductive layer 2134 functions as a channel formation region.

[0507] The insulating layer 2123 and the insulating layer 2124 may be made of the material shown in the previous configuration example. can.

[0508] As shown in FIG. 30B, the insulating layer 2136 and the insulating layer 2144 are , and the insulating layer 2146 are formed on the conductive layer 2134, the semiconductor layer 2138, the conductive layer 2142a, and At this time, the end of the insulating layer 2136 is partially removed. The end of the insulating layer 2144 and the end of the insulating layer 2146 are approximately aligned with each other. In addition, the side surface of the insulating layer 2136, the side surface of the insulating layer 2144, and the side surface of the insulating layer 2146 may be The side surfaces may each have a coplanar surface. The layer 2144 and the insulating layer 2146 have areas that do not overlap with the insulating layer 2123 .

[0509] The insulating layer 2124 is formed on the top and side surfaces of the insulating layer 2146, the side surfaces of the insulating layer 2144, and The insulating layer 2136 is provided so as to cover the side surface thereof and has a region in contact with a part of the insulating layer 2123 .

[0510] Although not shown, the insulating layer 2136, the insulating layer 2144, The insulating layer 2123 in the region not overlapping with the insulating layer 2146 is provided in contact with the insulating layer 2124. It is preferable that the above-mentioned

[0511] By adopting the above structure, the semiconductor layer 2138, the insulating layer 2136, the insulating layer 2144, and Impurities such as hydrogen contained in the insulating layer 2146 are removed from the insulating layer 2123 and the insulating layer 212 4, which can efficiently absorb impurities such as hydrogen and other impurities. In addition, the semiconductor layer 2138, the insulating layer 2136, the insulating layer 2144, and the insulating layer 2146 are The oxygen contained in the insulating layer 2123 and the insulating layer 2124 is prevented from diffusing outward. can.

[0512] The insulating layer 2121, the insulating layer 2122, the insulating layer 2125, and the insulating layer 2126 are The materials shown in the configuration examples can be used.

[0513] The insulating layer 2125 is provided over the insulating layer 2124. 123 and the insulating layer 2122 so as to surround the insulating layer 2124. Further, the insulating layer 2125 is formed on the outer side of the insulating layer 2123 and the insulating layer 2124. The insulating layer 2126 is provided over the insulating layer 2125.

[0514] By adopting the above structure, the insulating layer 2121, the insulating layer 2122, the insulating layer 2125, and the insulating It is possible to suppress impurities such as hydrogen from entering the semiconductor layer 2138 from the outside of the edge layer 2126. In other words, in the transistor 2100B, at least the semiconductor layer 2138 is an insulating layer. surrounded by layer 2121, insulating layer 2122, insulating layer 2125, and insulating layer 2126. This makes it possible to suppress the intrusion of impurity elements such as hydrogen from the outside.

[0515] In this embodiment, a laminated structure of an insulating layer 2125 and an insulating layer 2126 is used as a protective layer. However, one of the insulating layers 2125 and 2126 may not be provided if it is not necessary. The insulating layer 2125 may have a laminated structure of two or more layers. 2121 and the insulating layer 2122. If one of the insulating layers 2122 is unnecessary, it may not be provided. A laminated structure of the above may also be used.

[0516] By adopting such a configuration, the transistor 210 has excellent electrical characteristics and high reliability. 0B can be achieved.

[0517] This embodiment may be any of the other embodiments or examples at least a portion of which are described herein. can be implemented in appropriate combination.

[0518] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0519] [Storage device 1] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG. In the semiconductor device, the transistor 200 is provided above the transistor 300, and the capacitance element The transistor 100 is provided above the transistor 300 and the transistor 200. In this case, the transistor 200 described in the previous embodiment is used as the transistor 200. In addition, the transistor 200 may be the transistor described in the previous embodiment. 2100A or 2100B may be used. In the above embodiment, the transistors of the memory device 290 shown in FIG. 26 and FIG. 27 are may be used, and a capacitive device 292 may be provided as the capacitive element 100.

[0520] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This makes it possible to retain the memory contents for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0521] In the semiconductor device shown in FIG. 32, a wiring 1001 is electrically connected to the source of a transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0522] In addition, the memory device shown in FIG. 32 has a memory cell array arranged in a matrix. It can be configured.

[0523] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. 3, an insulator 315 serving as a gate insulator, and a semiconductor region 31 3, and a low resistance region 314a serving as a source region or a drain region, and The transistor 300 may be a p-channel or an n-channel Any type is acceptable.

[0524] Here, the transistor 300 shown in FIG. 32 has a semiconductor region 313 ( A part of the substrate 311 has a convex shape. The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may be used. Since it uses a protruding part, it is also called a FIN type transistor. In addition, the insulating layer may have an insulating material that functions as a mask for forming the protrusions. Here, a case where a protrusion is formed by processing a part of a semiconductor substrate is shown, but a SOI substrate is also processed. A semiconductor film having a convex shape may be formed by the above-mentioned method.

[0525] Note that the transistor 300 shown in FIG. 32 is just an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration and driving method.

[0526] <Capacitive element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode, a conductor 120 serving as the second electrode, and The insulator 130 functions as a dielectric. It is preferable to use an insulator that can be used as the insulator 286 shown in the embodiment.

[0527] Also, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used for the capacitor 100, the transistor 200, and has a function as a plug or wiring that is electrically connected to the transistor 300 .

[0528] In FIG. 32, the conductor 112 and the conductor 110 are shown to have a single-layer structure. However, the present invention is not limited to this, and may be a laminated structure of two or more layers. For example, Conductors that have barrier properties between weak conductors and those with high electrical conductivity have good adhesion to conductors with high electrical conductivity. may form a highly conductive material.

[0529] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrogen Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium The conductive layer may be formed as a laminate or a single layer.

[0530] For example, the insulator 130 may be made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a laminated structure with a high-k material. The semiconductor device 100 has a high dielectric constant (high-k) insulator, so that it can ensure sufficient capacitance. By using an insulator having a large dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0531] In addition, oxide is an insulator for high dielectric constant (high-k) materials (materials with a high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, Oxynitrides with Aluminum and Hafnium, Silicon and Hafnium an oxide having silicon and hafnium, an oxide nitride having silicon and hafnium, or an oxide nitride having silicon and hafnium Nitrides containing fluorine.

[0532] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. Silicon oxide, silicon nitride, silicon nitride, silicon oxide doped with fluorine, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, vacancy-containing silicon oxide Examples include concrete or resin.

[0533] <Wiring layer> Between each structure, a wiring layer is provided in which an interlayer film, wiring, plugs, etc. are provided. Also, a plurality of wiring layers may be provided according to the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in the present specification and the like, the wiring and the plug that are electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as a wiring, or when the conductor In some cases, some parts also function as plugs.

[0534] For example, an insulator 320, an insulator 322, and an insulator 323 are provided on the transistor 300 as an interlayer film. The edge member 324 and the insulator 326 are laminated in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. A conductor 328 and a conductor 330 are embedded in the conductive layer 200. The conductor 328 and the conductor 330 function as plugs or wiring.

[0535] In addition, the insulator that functions as an interlayer film acts as a flattening film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be chemically mechanically polished ( The surface may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like.

[0536] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In the insulating layer 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or a wiring.

[0537] Similarly, the insulator 210, the insulator 211, the insulator 212, the insulator 214, and the insulator 2 16 includes a conductor 218 and a conductor (conductor 205) that constitutes a transistor 200. The conductor 218 is embedded in the capacitor 100 or the transistor 30. 0, or functions as wiring. , and on the insulator 130, an insulator 150 is provided.

[0538] Here, like the insulator 241 shown in the above embodiment, the conductor 240 functions as a plug. An insulator 217 is provided in contact with the side surface of the insulator 18. The insulator 217 is made of the insulator 210 and the insulator 211, insulator 212, insulator 214, and insulator 216 are connected to the inner walls of the openings. That is, the insulator 217 is provided as a conductor 218, an insulator 210, and an insulator 211, insulator 212, insulator 214, and insulator 216. Since the conductor 205 can be formed in parallel with the conductor 218, the conductor 205 In some cases, an insulator 217 may be formed in contact with the side surface of the substrate.

[0539] The insulator 217 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 217 may be an insulator such as silicon. Since the insulating member 210 or the insulating member 222 is provided in contact with the insulating member 214 and the insulating member 222, Impurities such as water or hydrogen from 16, etc., are mixed into the oxide 230 through the conductor 218. In particular, silicon nitride has a high blocking effect against hydrogen. In addition, oxygen contained in the insulator 210 or the insulator 216 is preferably contained in the conductor 218. can prevent it from being absorbed into the

[0540] Insulator 217 can be formed in a manner similar to insulator 241. For example, PEA Silicon nitride is deposited using the LD method, and the conductor 356 is reached using anisotropic etching. It is sufficient to form an opening through which the

[0541] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides having insulating properties. These include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0542] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0543] For example, the insulators 150, 210, 352, and 354 have relatively low resistance. It is preferable to have an insulator with a low dielectric constant, for example silicon oxynitride. , silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon and and silicon oxide with added nitrogen, silicon oxide or resin with voids. Alternatively, the insulator is preferably silicon oxide, silicon oxynitride, or silicon nitride oxide. Silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, carbon Lamination of silicon oxide doped with silicon and nitrogen or silicon oxide having voids and resin It is preferable that the silicon oxide and silicon oxynitride have the structure. Therefore, by combining it with resin, it is possible to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), etc. Examples include polyimide, polycarbonate, and acrylic.

[0544] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 211, 212, and 350, etc. For the insulating layer, an insulator that has a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used. .

[0545] Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, the following insulators have the function of suppressing the permeation of impurities such as hydrogen and oxygen: Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide tungsten oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon oxide nitride, silicon nitride, etc. can be used. .

[0546] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as arsenic, A silicide such as nickel silicide may also be used.

[0547] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., may be a metal material, an alloy material, a metal nitride material, or the like formed from the above-mentioned materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high melting point material such as tungsten or molybdenum that is also electrically conductive. It is preferable to use tungsten. Alternatively, low resistance conductive materials such as aluminum and copper can be used. It is preferable to form the wiring from a low-resistance conductive material. can be done.

[0548] <Wiring or plug of layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the conductor and the insulator having the excess oxygen region. It is preferable to provide such a function.

[0549] For example, in FIG. 32, insulator 224 and insulator 280 have excess oxygen, and conductor 2 40, an insulator 241 may be provided between the insulator 241 and the insulator 222 and the insulator 240. 72, an insulator 273, an insulator 282, an insulator 283, and an insulator 284 are provided in contact with each other. As a result, the insulator 224 and the transistor 200 become insulators having barrier properties. This allows for a sealing structure.

[0550] In other words, by providing the insulator 241, the excess of the insulators 224 and 280 It is possible to suppress the absorption of oxygen into the conductor 240. By having the above, hydrogen, which is an impurity, diffuses into the transistor 200 through the conductor 240. This can suppress the occurrence of

[0551] The insulator 241 is made of a material that suppresses the diffusion of impurities such as water or hydrogen, and oxygen. For example, silicon nitride, silicon oxide nitride, It is preferable to use aluminum oxide or hafnium oxide. In particular, silicon nitride is Magnesium oxide is preferred because it has a high blocking ability against hydrogen. Nesium, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, acid Metal oxides such as lanthanum oxide, neodymium oxide, or tantalum oxide can be used. do.

[0552] As in the above embodiment, the transistor 200 includes the insulators 211 and 212. , insulator 214, insulator 287, insulator 282, insulator 283, and insulator 284. By adopting such a configuration, the insulator 274, the insulator 150, etc. This can reduce the hydrogen contained in the insulating material 280 and the like from being mixed in with the insulating material 280 and the like.

[0553] Here, the conductor 240 is connected to the insulator 284, the insulator 283, and the insulator 282, The body 214, the insulator 212, and the insulator 211 are penetrated by a conductor 218. As shown in FIG. 1, the insulator 241 is provided in contact with the conductor 240, and the insulator 217 is provided in contact with the conductor 218. As a result, the insulator 211, insulator 212, insulator 214, insulator 287, insulator 282, insulator 283, and In this way, the amount of hydrogen that gets mixed into the inside of the insulator 284 can be reduced. body 211, insulator 212, insulator 214, insulator 287, insulator 282, insulator 283, The insulators 284, 241, and 217 more securely encapsulate the transistor 200. This prevents impurities such as hydrogen contained in the insulator 274 from entering from the outside. can be done.

[0554] Also, the insulators 216, 224, 280, 250, and 27 4 is a film formation method using a gas in which hydrogen atoms are reduced or removed, as shown in the previous embodiment. It is preferable that the insulators 216, 224, and 226 are formed by the method described above. 80, insulator 250, and insulator 274 may have reduced hydrogen concentrations.

[0555] In this way, the hydrogen concentration in the silicon-based insulating film in the vicinity of the transistor 200 is reduced, and the hydrogen concentration in the silicon-based insulating film in the vicinity of the transistor 200 is reduced. The hydrogen concentration in the compound 230 can be reduced.

[0556] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to produce multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The following describes the method of cutting the wire. First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the semiconductor device is cut at a grinding line and divided (divided) into a plurality of semiconductor devices.

[0557] Here, for example, as shown in FIG. 32, the area where the insulator 283 and the insulator 211 contact each other It is preferable to design the dicing line so that the dicing line overlaps the dicing line. In the vicinity of the region that will become the dicing line provided on the outer edge of the memory cell having the data buffer 200, The insulator 282, the insulator 280, the insulator 273, the insulator 272, the insulator 224, the insulator Openings are provided in 222, insulator 216, insulator 214, and insulator 212.

[0558] That is, the insulator 282, the insulator 280, the insulator 273, the insulator 272, the insulator 22 4, through the openings in the insulators 222, 216, 214, and 212, In this case, the insulator 211 and the insulator 283 are in contact with each other. Insulator 273, insulator 272, insulator 224, insulator 222, insulator 216, and insulator An opening is provided in the insulator 214, and the insulator 212 and the insulator 283 are in contact with each other through the opening. For example, the insulators 212 and 283 may be made of the same material and by the same method. The insulator 212 and the insulator 283 may be formed of the same material and by the same method. For example, it is preferable to use silicon nitride. stomach.

[0559] Due to this structure, the insulator 211, the insulator 212, the insulator 214, the insulator 287, the insulator 282, insulator 283, and insulator 284 may encapsulate transistor 200. Insulator 211, insulator 212, insulator 214, insulator 287, insulator 282, insulator At least one of the body 283 and the insulator 284 inhibits the diffusion of oxygen, hydrogen, and water. Since the semiconductor element shown in this embodiment has a function, the substrate is By dividing the plate, even if it is processed into multiple chips, water can be easily absorbed from the side of the divided substrate. This can prevent impurities such as hydrogen or water from entering and diffusing into the transistor 200. .

[0560] In addition, this structure prevents excess oxygen in the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen in the insulator 280 and the insulator 224 can be prevented from The oxide is then efficiently supplied to the transistor 200, which forms the channel of the transistor 200. The oxygen vacancies in the oxide in which the channel of the transistor 200 is formed are reduced by the use of the nitrogen atom. This allows the oxide in which the channel in the transistor 200 is formed to be formed. The oxide semiconductor can have a low density of defect states and stable characteristics. The fluctuation of the electrical characteristics of the transistor 200 can be suppressed and the reliability can be improved. do.

[0561] In the memory device shown in FIG. 32, the shape of the capacitor element 100 is a planar type. The storage device shown in the embodiment is not limited to this. For example, as shown in FIG. Alternatively, the shape of the capacitive element 100 may be a cylinder. The configuration below the edge 150 is similar to that of the semiconductor device shown in FIG.

[0562] The capacitance element 100 shown in FIG. 33 includes an insulator 150 on an insulator 130 and a An insulator 142 and a conductor disposed within an opening formed in the insulator 150 and the insulator 142. A conductor 115, an insulator 145 on the conductor 115 and the insulator 142, and a The semiconductor device has a conductor 125 and an insulator 152 on the conductor 125 and the insulator 145. The conductor 115 and the insulator 142 are inserted into the openings formed in the insulator 150 and the insulator 142. 5, and at least a portion of the conductor 125 is disposed thereon.

[0563] The conductor 115 functions as a lower electrode of the capacitor 100, and the conductor 125 functions as a lower electrode of the capacitor 100. 0, and insulator 145 serves as a dielectric for capacitive element 100. In the openings of the insulator 150 and the insulator 142, the capacitance element 100 is provided with a bottom surface, The upper and lower electrodes are also opposed to each other on the side with a dielectric material between them. The capacitance per area can be increased. In this way, the capacitance of the capacitance element 100 can be increased. By increasing the capacitance per unit area, miniaturization or high integration of semiconductor devices can be achieved. can be promoted.

[0564] The insulator 152 may be made of any insulator that can be used for the insulator 280. The edge 142 acts as an etch stop when forming the opening in the insulator 150. It is preferable to use an insulator that can be used for the insulator 214.

[0565] The shape of the openings formed in the insulator 150 and the insulator 142 when viewed from above is rectangular. Alternatively, the shape may be a polygon other than a rectangle, or the corners of the polygon may be rounded. Here, when viewed from above, the opening may be in a circular shape including an ellipse. It is preferable that the overlapping area between the gate and the transistor 200 is large. As a result, the area occupied by the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. This can be done.

[0566] The conductor 115 is disposed in contact with an opening formed in the insulator 142 and the insulator 150. It is preferable that the upper surface of the conductor 115 is substantially flush with the upper surface of the insulator 142. The lower surface of the conductor 115 contacts the conductor 110 through the opening of the insulator 130. The conductive layer 5 is preferably formed by ALD or CVD. Any conductor that can be used for 05 may be used.

[0567] The insulator 145 is disposed to cover the conductor 115 and the insulator 142. For example, It is preferable to form the insulator 145 by using an ALD method or a CVD method. 45 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium oxynitride, hafnium nitride For example, the insulator 1 may be made of fluorine or the like, and may be formed as a laminate or a single layer. 45, zirconium oxide, aluminum oxide, zirconium oxide are layered in this order. An insulating film having such a structure can be used.

[0568] The insulator 145 is made of a material with high dielectric strength, such as silicon oxide nitride, or a material with high dielectric strength. It is preferable to use high-k materials. Alternatively, materials with high dielectric strength and high A stack of dielectric (high-k) materials may also be used.

[0569] In addition, oxide is an insulator for high dielectric constant (high-k) materials (materials with a high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, Oxynitrides with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium; oxide nitrides having silicon and hafnium; By using such high-k materials, the insulator 1 Even if the insulator 145 is made thick, the capacitance of the capacitance element 100 can be sufficiently secured. By making the thickness of the conductor 115 and the conductor 125 thicker, the leakage current occurring between the conductor 115 and the conductor 125 is suppressed. It is possible.

[0570] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Examples include silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin. For example, silicon nitride (SiN x ), which was prepared using the PEALD method. Silicon oxide (SiO x ), and silicon nitride (SiN x ) In this case, an insulating film having a large dielectric strength can be used. By using the above, the dielectric strength is improved and electrostatic breakdown of the capacitance element 100 can be suppressed. .

[0571] The conductor 125 is disposed so as to fill the openings formed in the insulators 142 and 150. The conductor 125 is connected to the wiring 10 via the conductor 140 and the conductor 153. The conductor 125 is formed by using the ALD method or the CVD method. For example, a conductive material that can be used for the conductive material 205 may be used. stomach.

[0572] The conductor 153 is provided on an insulator 154 and is covered with an insulator 156. The conductor 153 may be made of any conductor that can be used for the conductor 112. The insulator 156 may be an insulator that can be used for the insulator 152. 53 is in contact with the upper surface of the conductor 140, and It serves as a terminal of transistor 300 .

[0573] 32 and 33, the transistor 200 is stacked on the transistor 300. However, the present embodiment is not limited to this. 26 and 27, or 28, a plurality of vertically stacked memory devices 290 are provided, as shown in FIG. This is also fine.

[0574] FIG. 34 shows memory devices 290_1 to 290_n (n is a natural number of 2 or more). In this embodiment, the memory device 290_n is provided, but the present invention is not limited to this. For example, The value of n may not be set. 2 or more and 200 or less, preferably 2 or more and 100 or less, more preferably 2 or more and 10 or less. FIG. 34B shows a channel length direction of a transistor included in a memory device 290. FIG. 34(A) shows a cross-sectional view of the transistor in the portion indicated by the dashed line AB in FIG. 34(B). 34 shows a cross-sectional view of the memory device in the channel width direction. The underlying structure is similar to that of the storage device shown in FIG.

[0575] As shown in FIG. 34, memory devices 290_1 to 290_4 are disposed on an insulator 354. Each layer including the memory device 290 includes a capacitance device 29 2 and conductors 240 are provided. The memory devices 290 in each layer are 0, and is electrically connected to the conductor 240 of the adjacent layer, and the transistor 300 In addition, in FIG. 34B, the conductors 240_1 to 240_2 are electrically connected to each other. The hidden portion of 40_n in the channel width direction is shown by a dotted line.

[0576] The memory device 290 shown in FIG. 34 has a different structure from the memory device 290 shown in FIG. In the memory device 290 shown in FIG. 0b, and an insulator 241 is formed on the side of the conductor 240. Here, since the insulator 241 is not formed on the lower surface of the conductor 240, the conductors of each layer The bottom surface of the conductor 240 is connected to the conductor 242a of the layer and the conductor 246a of the layer below. This allows the memory devices 290 in each layer to be electrically connected to the conductors 246a in the layer immediately below. can be electrically connected.

[0577] However, the memory device described in this embodiment is not limited to the structure shown in FIG. For example, an oxide 230b or the like is formed between the upper conductor 246a and the lower conductor 246a. In addition, for example, the conductors 240_1 to 240_n may be connected to each other. Alternatively, the through electrode may be formed of two through electrodes.

[0578] In addition, since the capacitance device 292 is formed in a planar type in each layer, the height of each layer is This makes it relatively easy to prevent excessive growth of memory devices. The number of layers of the memory device 290 can be increased. For example, the number of layers of the memory device 290 can be increased to 100. It may be to some extent.

[0579] The above is a description of the configuration example. By using this configuration, In a semiconductor device using a transistor, the fluctuation of electrical characteristics is suppressed and the reliability is improved. Alternatively, a transistor including an oxide semiconductor having a large on-state current can be provided. Alternatively, a transistor including an oxide semiconductor and having a low off-state current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. do.

[0580] [Storage device 2] An example of a memory device using a semiconductor device according to one embodiment of the present invention is shown in FIG. The memory device shown in FIG. 32 includes the transistor 200, the transistor 300, and the capacitor In addition to the semiconductor device having the capacitor 100 , a transistor 400 is also included.

[0581] The transistor 400 can control the second gate voltage of the transistor 200. For example, the first gate and the second gate of the transistor 400 are connected to the source and the diode. and connect the source of the transistor 400 and the second gate of the transistor 200. In this configuration, when the second gate of the transistor 200 is held at a negative potential, The first gate-source voltage and the second gate-source voltage of the transistor 400 are In the transistor 400, the second gate voltage and the first gate voltage Since the drain current at 0V is very small, the transistors 200 and Even if power is not supplied to the transistor 400, the negative potential of the second gate of the transistor 200 can be maintained for a long time. This allows the transistor 200 and the transistor 400 to be maintained for a certain period of time. A storage device having such a function is capable of retaining stored contents for a long period of time.

[0582] Therefore, in FIG. 35, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the gate of the transistor 200, and the wiring 1006 is The back gate of the transistor 300 is electrically connected to the back gate of the transistor 200. The gate and the other of the source and drain of the transistor 200 are connected to the capacitor element 100. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. The wiring 1007 is electrically connected to the source of the transistor 400. The wiring 1008 is electrically connected to the gate of the transistor 400. The wiring 1010 is electrically connected to the back gate of the transistor 400. Here, the wiring 1006, the wiring 1007, the wiring 1008, and wiring 1009 are electrically connected.

[0583] The storage device shown in FIG. 35 is arranged in a matrix, similar to the storage device shown in FIG. By doing so, a memory cell array can be configured. 0 can control the second gate voltages of the plurality of transistors 200. In particular, the number of transistors 400 is preferably smaller than the number of transistors 200. 35 includes a transistor 200 and a and the transistor 400 are formed by the insulator 211, the insulator 212, the insulator 214, the insulator 287, It may be sealed with insulator 282 , insulator 283 , and insulator 284 .

[0584] <Transistor 400> Transistor 400 is formed in the same layer as transistor 200 and is fabricated in parallel. The transistor 400 functions as a first gate. Conductor 460 (conductor 460a and conductor 460b) serving as a second gate. A functional conductor 405, an insulator 222, an insulator 224, and and an insulator 450, an oxide 430c having a channel forming region, and a The conductor 442a, the oxide 443a, the oxide 431a, and the oxide 431b are connected to the drain. The conductor 442b, the oxide 443b, the oxide 432a, and the oxide 43 2b. Also, similar to the transistor 200, a conductor functioning as a plug is , and is provided in contact with the conductor 442a and the conductor 442b.

[0585] In the transistor 400, the conductor 405 is the same layer as the conductor 205. The oxide 431a and oxide 432a are the same layer as the oxide 230a. b, and oxide 432b are the same layer as oxide 230b. Oxide 443 is the same layer as oxide 243. Oxide 4 The oxide 30c is the same layer as the oxide 230c. The insulator 450 is the same layer as the insulator 250. The conductor 460 is in the same layer as the conductor 260.

[0586] It should be noted that structures formed in the same layer can be formed simultaneously. For example, oxide 4 30c can be formed by processing an oxide film that will become oxide 230c.

[0587] The oxide 430c that functions as the active layer of the transistor 400 is the same as the oxide 230, etc. Similarly, oxygen vacancies are reduced, and impurities such as hydrogen and water are reduced. The threshold voltage of the transistor 400 is set to be greater than 0 V to reduce the off-current and to provide a second gate. The drain current when the first gate voltage and the first gate voltage are 0 V can be made very small. do.

[0588] The configurations and methods shown in this embodiment may be the same as those shown in other embodiments and examples. It can be used in appropriate combination.

[0589] (Embodiment 4) In this embodiment, a semiconductor device using an oxide according to one embodiment of the present invention will be described with reference to FIGS. 37 and 38. Transistors used as conductors (hereinafter sometimes referred to as OS transistors) and capacitive elements This section describes a storage device to which the OS is applied (hereinafter, sometimes referred to as an OS memory device). The OS memory device includes at least a capacitive element and an OS transistor that controls the charging and discharging of the capacitive element. The off-state current of the OS transistor is extremely small, so The memory device has excellent retention characteristics and can function as a non-volatile memory.

[0590] Generally, in semiconductor devices such as computers, various memory devices are used depending on the application. Figure 36 shows various storage devices by hierarchy. Fast access speed is required, and the lower the storage device, the larger the storage capacity and the higher the recording density. In FIG. 36, from the top layer, the CPU or other processor has registers and The memory embedded in the chip is SRAM (Static Random Access Memory). ory), DRAM (Dynamic Random Access Memory), Shows 3D NAND memory.

[0591] The memory embedded as a register in a CPU or other arithmetic processing unit is used to temporarily store the results of calculations. Therefore, the frequency of access from the processor is high. The registers hold the setting information of the processor. It also has functions.

[0592] SRAM is used, for example, for caches. Caches are data held in main memory. It has the function of duplicating and storing some of the information stored in the cache. By duplicating the data, the speed of accessing the data can be increased.

[0593] DRAM is used, for example, as main memory. Main memory reads data from storage. DRAM has the function of storing programs and data. The recording density of DRAM is approximately 0.1~0.3Gbit / mm 2 It is.

[0594] 3D NAND memory is used, for example, for storage. Storage is for long-term storage. It has the function of storing necessary data and various programs used by the processing unit. Therefore, storage requires a larger memory capacity and a higher recording density rather than an increased operating speed. The recording density of memory devices used for storage is approximately 0.6 to 6.0 Gbit / m m 2 It is.

[0595] A storage device according to one embodiment of the present invention has high operating speed and can retain data for a long period of time. In one embodiment of the present invention, a storage device has a hierarchy in which a cache is located and a hierarchy in which a main memory is located. It can be suitably used as a storage device located in the boundary area 901 including both. The storage device according to one aspect of the present invention has a hierarchy in which a main memory is located and a hierarchy in which a storage is located. The memory device can be suitably used as a memory device located in the boundary area 902 including both of the above.

[0596] <Storage device configuration example> FIG. 37A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 1 411, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 142 0, column circuit 1430, output circuit 1440, and control logic circuit 1460.

[0597] The column circuits 1430 include, for example, column decoders, precharge circuits, sense amplifiers, and write The precharge circuit has the function of precharging the wiring. The sense amplifier has a function of amplifying the data signal read from the memory cell. The above wiring is connected to the memory cells of the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal. RDATA is output to the outside of the memory device 1400. For example, the memory device may have a row decoder, a word line driver circuit, etc., and may select a row to be accessed. do.

[0598] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 11, and the high power supply voltage (VIL) for the memory cell array 1470. The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0599] The control logic circuit 1460 processes external input signals (CE, WE, RE). It processes the row decoder and column decoder control signals and generates the row decoder and column decoder control signals. CE is the chip enable signal. where WE is a write enable signal and RE is a read enable signal. The signals processed by the control logic circuit 1460 are not limited to these. Instead, other control signals may be input as necessary.

[0600] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the recell MC, the number of memory cells MC in one row, etc.

[0601] In FIG. 37A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. Although an example of forming the insulating film on a surface has been shown, the present embodiment is not limited to this. For example, as shown in FIG. 37B, the memory cell array 1411 is provided on a part of the peripheral circuit 1411. 70 may be provided so as to overlap the memory cell array 1470. For example, In this way, a sense amplifier may be provided.

[0602] FIG. 38 illustrates an example of a memory cell configuration that can be applied to the above-mentioned memory cell MC.

[0603] [DOSRAM] 38A to 38C show examples of circuit configurations of memory cells in a DRAM. In this study, a DRAM using a memory cell of one OS transistor and one capacitor element type is called DOSRA. M(Dynamic Oxide Semiconductor Random Acc The memory cell 1471 shown in FIG. The transistor M1 has a gate (sometimes called a front gate) and a back gate.

[0604] A first terminal of the transistor M1 is connected to a first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0605] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used for applying a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0606] In addition, the memory cell MC is not limited to the memory cell 1471, and the circuit configuration may be changed. For example, the memory cell MC can be a memory cell 1472 shown in FIG. In addition, the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 14 shown in FIG. 73, a transistor with a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured with a transistor M1.

[0607] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. In addition, the memory device 290 shown in FIG. 26 and FIG. 27 in the above embodiment can be The transistor and capacitance device 292 is a transistor M1 and a capacitance element CA. The transistor M1 may be an OS transistor. This makes it possible to make the leakage current of the transistor M1 very low. The written data can be retained for a long time by the transistor M1, so the memory This reduces the frequency of refreshing the cells. In addition, the leakage current is very low, so the memory cell 147 1, multi-value data or analog data for memory cell 1472 and memory cell 1473 can be held.

[0608] In addition, in the DOSRAM, as described above, By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0609] Here, a memory cell array 1470 is provided on a peripheral circuit 1411. FIG. 39A shows an example of a memory device 1400 in which a plurality of memory cells 1471 are provided in the memory cell 470. As shown in.

[0610] In the memory cell array 1470, a plurality of memory cells 1471 are arranged in a matrix. The wiring WOL, wiring BGL, etc. are also arranged in the row direction or the column direction in the memory cell array 1470. The wiring BIL is connected to a column circuit 1430 provided in the peripheral circuit 1411. The memory cell array 1470 is electrically connected to a sense amplifier and the like via wiring BIL. .

[0611] The memory cell array 1470 includes OS transistors, and is In this manner, the insulator 211, the insulator 212, the insulator 214, the insulator 287, the insulator 282, the insulator It is preferable that the sealing is performed by an edge 283 and an insulator 284. For example, as shown in FIG. As shown in FIG. 1, the upper surface, side surface, and lower surface of the memory cell array 1470 are insulators 211, Insulator 212, insulator 214, insulator 287, insulator 282, insulator 283, and insulator Preferably, the body 284 provides a seal.

[0612] As shown in FIG. 39B, a plurality of memory cell arrays 1470_1 to Alternatively, the memory arrays 1470_n (n is a natural number of 2 or more) may be stacked. The structure of the memory cell array 1470 is almost the same as that shown in FIG. The column circuit 1430 and the memory cells 1471 of each memory cell array 1470 are connected by In addition, as shown in FIG. 34, the wiring BIL is The memory cell array 1470_n may be formed by penetrating a single or multiple conductors 240. good.

[0613] The memory cell array 1470 includes OS transistors, and is similar to the previous embodiment. As shown in FIG. 1, the insulator 211, the insulator 212, the insulator 214, the insulator 287, the insulator 28 2, insulator 283, and insulator 284. For example, as shown in FIG. 28, FIG. 29, or FIG. 33, a plurality of memory cell arrays 1470 The upper surface, side surface, and lower surface of the insulating material 211, the insulating material 212, the insulating material 214, the insulating material 28 are 7, it is preferable that the insulating material 282, the insulating material 283, and the insulating material 284 are used to seal the insulating material 282, the insulating material 283, and the insulating material 2...

Claims

1. 1. A semiconductor device including a transistor having an oxide semiconductor layer, a first insulating layer having a region in contact with a first surface of the oxide semiconductor layer, a second insulating layer having a region in contact with a second surface of the oxide semiconductor layer, and a first conductive layer having a region in contact with the second insulating layer, a third insulating layer having a region in contact with an end portion of the oxide semiconductor layer, a region in contact with a top surface of the first conductive layer, and a region in contact with a top surface of the first insulating layer; a fourth insulating layer having a region in contact with a side surface of the first insulating layer and a region in contact with an end portion of the third insulating layer; the first conductive layer functions as a gate electrode of the transistor; The first insulating layer has an excess oxygen region.

2. The semiconductor device of claim 1 , wherein the third insulating layer comprises aluminum oxide.

3. 3. The semiconductor device according to claim 1, wherein the oxide semiconductor layer is an In--Ga--Zn oxide.

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