Method of manufacturing semiconductor device

Abstract

To provide a method of manufacturing a semiconductor device capable of suppressing variation in electric characteristics, and of improving reliability.SOLUTION: A method of manufacturing a semiconductor device includes: forming an insulating film on an oxide semiconductor film; forming a buffer film on the insulating film; adding oxygen to the buffer film and the insulating film; forming a conductive film on the buffer film added with oxygen; and adding an impurity element to the oxide semiconductor film by using the conductive film as a mask. In addition, an insulating film overlapped with the oxide semiconductor film and containing hydrogen may be formed after adding the impurity element to the oxide semiconductor film.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention relates to a method, manufacture, or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, or any of these devices. In particular, one aspect of the present invention relates to a field effect transistor, a driving method thereof, and a manufacturing method thereof. The present invention relates to a semiconductor device having a transistor.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), input / output devices, and The electronic equipment may include a semiconductor device. [Background technology]

[0003] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called thin-film transistors (TFTs)) is attracting attention. It is widely used in electronic devices such as integrated circuits (ICs) and image display devices (display devices). Semiconductor materials such as silicon are widely known as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as another material.

[0004] In addition, a base insulating film that releases oxygen by heating is used as a base insulating film for the oxide semiconductor film in which a channel is formed. A semiconductor device using an insulating film that projects outward has been disclosed (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2012-9836 A Summary of the Invention [Problem to be solved by the invention]

[0006] In a transistor using an oxide semiconductor film, The oxygen vacancies caused by the oxygen vacancies lead to poor electrical characteristics of a transistor. A transistor that has oxygen vacancies in the channel region has a negative shift in threshold voltage. This is due to the oxygen deficiency in the channel region. This is because the loss causes charges to be generated, resulting in a lower resistance.

[0007] In addition, if oxygen vacancies are present in the channel region of the oxide semiconductor film, changes over time and the optical gate B The electrical characteristics of the transistor are measured by the T (Bias-Temperature) stress test. A typical problem is that the threshold voltage varies.

[0008] In view of the above problems, one aspect of the present invention provides a semiconductor device that suppresses fluctuations in electrical characteristics and improves reliability. Another object of the present invention is to provide a method for manufacturing the above semiconductor device. Another object of the present invention is to provide a method for manufacturing a semiconductor device with reduced power consumption. An object of one embodiment of the present invention is to provide a method for manufacturing a novel semiconductor device. Alternatively, in a semiconductor device including a transistor including an oxide semiconductor, Another object of the present invention is to suppress the noise and improve the reliability. Another object of the present invention is to provide a semiconductor device with reduced power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device.

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0010] One embodiment of the present invention is a method for forming an insulating film over an oxide semiconductor film, forming a buffer film over the insulating film, Oxygen is added to the buffer film and the insulating film, a conductive film is formed on the buffer film to which oxygen is added, and the conductive film In the method for manufacturing a semiconductor device, an impurity element is added to an oxide semiconductor film using a mask.

[0011] After the impurity element is added to the oxide semiconductor film, An insulating film may be formed.

[0012] Alternatively, the insulating film to which oxygen has been added and the buffer film to which oxygen has been added are etched to form an oxide film. After exposing a part of the oxide semiconductor film, an impurity element is introduced into the oxide semiconductor film by using the conductive film as a mask. may be added to form an insulating film containing hydrogen which overlaps with the oxide semiconductor film.

[0013] One embodiment of the present invention is to form an insulating film over an oxide semiconductor film, A buffer film having the above structure is formed on the insulating film, oxygen is added to the buffer film and the insulating film, and the oxygen-added buffer film and the insulating film are formed on the insulating film. A conductive film is formed over the buffer film, and an impurity element is added to the oxide semiconductor film by using the conductive film as a mask. The present invention relates to a method for manufacturing a semiconductor device.

[0014] After the impurity element is added to the oxide semiconductor film, An insulating film may be formed.

[0015] Alternatively, the insulating film to which oxygen is added is etched to expose part of the oxide semiconductor film. Then, an impurity element is added to the oxide semiconductor film by using the conductive film as a mask, and the oxide semiconductor film is An insulating film having overlapping hydrogen may be formed.

[0016] Alternatively, after oxygen is added to the buffer film and the insulating film, heat treatment may be performed.

[0017] When the buffer film to which oxygen has been added is an insulator, the conductive film functions as a gate electrode. Alternatively, when the buffer film to which oxygen has been added is a semiconductor, the conductive film and the buffer film to which oxygen has been added are It functions as a gate electrode.

[0018] The buffer film is made of indium, zinc, titanium, aluminum, tungsten, or tantalum. and molybdenum.

[0019] The impurity elements are hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, and rare gas. Or, the impurity element is one or more of boron, nitrogen, fluorine, aluminum, phosphorus. , and one or more of the noble gases, and hydrogen.

[0020] The oxide semiconductor film has a region in contact with the insulating film containing hydrogen. A typical example of an insulating film is a nitride insulating film, and a typical example of a nitride insulating film is silicon nitride. There is a membrane.

[0021] The gate electrode may contain the same metal element as the oxide semiconductor film. The gate electrode is formed of a conductive oxide semiconductor film. Effect of the Invention

[0022] According to one embodiment of the present invention, a semiconductor in which fluctuations in electrical characteristics are suppressed and reliability is improved According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be manufactured. According to one embodiment of the present invention, a novel semiconductor device can be manufactured. A method of manufacture may be provided.

[0023] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0024] [Figure 1] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 2] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 3] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Diagram 5] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 6] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 10] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 11] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 12] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 13] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 15] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 16] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 18] 1A to 1C are cross-sectional views illustrating one mode of a manufacturing process of a semiconductor device. [Figure 19] FIG. 1 is a diagram for explaining a computational model. [Figure 20] FIG. 1 is a diagram for explaining an initial state and a final state. [Figure 21] FIG. 1 is a diagram illustrating the activation barrier. [Figure 22] FIG. 1 is a diagram for explaining an initial state and a final state. [Diagram 23] FIG. 1 is a diagram illustrating the activation barrier. [Figure 24] A diagram explaining VoH transition levels. [Diagram 25] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Figure 26] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 27] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 28] 1A to 1C illustrate a structure and a band structure of a transistor according to one embodiment of the present invention. [Figure 29] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 30] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Diagram 31] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Diagram 32] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Diagram 33] Electron diffraction pattern of CAAC-OS. [Diagram 34] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Diagram 35] 1 is a projection diagram illustrating a configuration of an input / output device according to an embodiment. [Diagram 36] FIG. 1 is a cross-sectional view illustrating a configuration of an input / output device according to an embodiment. [Figure 37] 3A to 3C are diagrams for explaining configurations and driving methods of a detection circuit 19 and a converter CONV according to the embodiment. [Figure 38] 1A to 1C are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] Hereinafter, embodiments of the present invention disclosed in this specification will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and any deviation from the spirit and scope of the present invention is not permitted. It will be easily understood by those skilled in the art that the form and details of the present invention may be modified in various ways. Therefore, the present invention should not be construed as being limited to the description of the following embodiments. .

[0026] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily shown in order to facilitate understanding. The actual position, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0027] In this specification, ordinal numbers such as "first," "second," and "third" refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0028] In this specification, the terms "above" and "below" refer to the positional relationship of components "directly above" or "below." For example, the term "gate electrode on a gate insulating film" does not necessarily mean "directly under" the gate insulating film. If the expression "gate electrode" is used, it excludes those that include other components between the gate insulating film and the gate electrode. do not.

[0029] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not intended to be limiting. For example, an "electrode" may be used as a part of a "wire." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the wiring is formed integrally.

[0030] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A current flows through the drain, the channel region, and the source. In this specification and the like, the channel region refers to a region through which a current mainly flows. The flow area.

[0031] In addition, the functions of "source" and "drain" may differ when using transistors with different polarities. In some cases, such as when the direction of the current changes during circuit operation, the two may be interchanged. Therefore, in this specification and the like, the terms "source" and "drain" are used interchangeably. It is assumed that this is possible.

[0032] In this specification, "electrically connected" means "something that has some kind of electrical effect" This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0033] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to two lines that are arranged at an angle between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0034] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0035] (Embodiment 1) In this embodiment mode, one embodiment of a semiconductor device and a manufacturing method thereof will be described with reference to FIGS. This will be explained using:

[0036] <Configuration of Semiconductor Device> 1A to 1D show examples of transistors included in a semiconductor device. A cross-sectional view of a transistor with a gate self-aligned structure is shown.

[0037] The transistor illustrated in FIG. 1A includes an oxide semiconductor film 55 and a an insulating film 57 on the insulating film 57; a buffer film 60 on the insulating film 57; 5 and a conductive film 61 overlapping therewith.

[0038] The oxide semiconductor film 55 is made up of a first region 55a and a second region 55b sandwiching the first region 55a. The first region 55a functions as a channel region. The second regions 55b and 55c function as a source region and a drain region. The regions 55b and 55c have a lower resistivity than the first region 55a and are therefore referred to as low resistance regions. It is also possible to say this.

[0039] In addition, the oxide semiconductor film 55 in the transistor is formed on the insulating film 53 on the substrate 51. In addition, hydrogen is absorbed in the second regions 55b and 55c of the oxide semiconductor film 55. An insulating film 65 having the insulating film 65 may be provided.

[0040] In addition, an insulating film 67 may be provided in contact with the insulating film 65 containing hydrogen. In the openings of the insulating film 65 and the insulating film 67, A pair of conductive films 68 and 69 may be provided in contact with the second region 55b and the second region 55c. An insulating film 79 may be provided on the insulating film 67 and the pair of conductive films 68 and 69 .

[0041] In the oxide semiconductor film 55, the first region 55a is thicker than the second regions 55b and 55c. It is characterized by having little oxygen deficiency.

[0042] When oxygen vacancies are formed in the channel region of a transistor, In the oxide semiconductor film 55, electrons serving as carriers are generated, and the semiconductor device is likely to have a normally-on characteristic. Since the first region 55a functions as a channel region, the oxide of the first region 55a is Reducing element defects is also important in obtaining stable transistor characteristics.

[0043] In the method for manufacturing a transistor according to this embodiment, an insulating film (the insulating film 57 shown in FIG. 1) is A buffer film (which will become the buffer film 60 shown in FIG. 1) is formed on the insulating film (which will become the insulating film 60 shown in FIG. 1). Excess oxygen is added to the buffer film. The buffer film acts to suppress the release of oxygen during the oxygen addition process. This also reduces damage to the insulating film. In addition, excess oxygen in the insulating film is oxidized to the oxide semiconductor film (see FIG. 1) by heat treatment. The oxide semiconductor film 55 is then transferred to the oxide semiconductor film 56. The oxygen deficiency can be reduced. As a method for introducing the excess oxygen, for example, An ion implantation method, an ion doping method, a plasma treatment, or the like can be used.

[0044] If a buffer film is not formed on the insulating film and excess oxygen is directly introduced into the insulating film, The surface is etched to a few nm. The surface of the insulating film contains added oxygen. Therefore, part of the added oxygen is released by the etching. However, the amount of oxygen added to the insulating film is not sufficient to reduce the oxygen vacancies in the semiconductor film. However, by providing a buffer film on the insulating film and adding oxygen to the insulating film, the buffer film As a result, oxygen vacancies in the oxide semiconductor film can be reduced. It is possible to add sufficient oxygen to the insulating film to reduce the

[0045] In addition, oxygen is added to the insulating film through the buffer film, reducing damage to the insulating film. Therefore, the insulating film can be formed by adding excess oxygen to the insulating film through the buffer film. By introducing excess oxygen into the buffer film, the buffer film functions as a buffer material for the insulating film.

[0046] The buffer film 60 may be made of indium, zinc, titanium, aluminum, tungsten, tantalum, and molybdenum. For example, metal oxides having the above-mentioned metal elements, is formed using a metal oxynitride or the like having the above-mentioned metal element.

[0047] Furthermore, the buffer film 60 has insulating or semiconducting properties depending on the type of metal element. When the buffer film 60 is made of an insulator, that is, when the buffer film 60 is an insulating film, the insulating film 57 and The buffer film 60 functions as a gate insulating film, and the conductive film 61 functions as a gate electrode. Alternatively, when the buffer film 60 is made of a semiconductor, that is, when the buffer film 60 is a semiconductor film, In this case, the insulating film 57 functions as a gate insulating film, and the buffer film 60 and the conductive film 61 function as a gate It functions as a gate electrode.

[0048] In the oxide semiconductor film 55, the second regions 55b and 55c are regions containing an impurity element. has.

[0049] In addition, when a source gas for the oxide semiconductor film contains an impurity element, The first and second regions 55b and 55c contain an impurity element. The second region 55c has a region having a different concentration of impurity elements from the first region 55a. The regions 55b and 55c have a higher concentration of impurity elements than the first region 55a. For example, oxide is deposited by sputtering using a rare gas as the sputtering gas. In the case where the semiconductor film 55 is formed, the oxide semiconductor film 55 contains a rare gas. In order to form the loss, a rare gas is intentionally added to the second regions 55b and 55c. In the regions 55b and 55c of FIG. 2, regions with high concentrations of rare gas are formed. The second regions 55b and 55c have a higher concentration of rare gas than the first region 55a. In the second regions 55b and 55c, a different structure from that of the first region 55a is formed. The impurity element may be added.

[0050] Representative examples of impurity elements include rare gases, hydrogen, boron, nitrogen, fluorine, aluminum, and phosphorus. Representative examples of rare gases are helium, neon, argon, chlorine, and fluorine. Lipton and Xenon.

[0051] As an impurity element, boron, nitrogen, fluorine, aluminum, or phosphorus is added to the second region 5. 5b, 55c, the second region 55b, 55c is larger than the first region 55a. The concentration of impurity elements is higher in the

[0052] In the oxide semiconductor film 55, the second regions 55b and 55c are doped with a rare gas, boron, The second cation has one or more of nitrogen, fluorine, aluminum, and phosphorus, and hydrogen. The regions 55b and 55c have a different hydrogen concentration from the first region 55a. The second regions 55b and 55c are regions having a higher concentration of hydrogen than the first region 55a. This is because when the oxide semiconductor film 55 is in contact with the insulating film 65 containing hydrogen, Hydrogen contained in the insulating film 65 is transferred to the oxide semiconductor film 55 through the insulating film 57 or the like. This is because the ions diffuse into the regions 55b and 55c of FIG.

[0053] Secondary ion mass spectrometry (SIMS) of the second regions 55b and 55c The hydrogen concentration obtained by ion mass spectrometry was 8×10 1 9 atoms / cm 3 More than 1×10 20 atoms / cm 3 More than that, more preferred Or 5×10 20 atoms / cm 3 The above is the case. In addition, the secondary ions in the first region 55a The hydrogen concentration obtained by mass spectrometry is 5×10 19 atoms / cm 3 The following is better Preferably 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 below, Preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 atom s / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 The following is the result.

[0054] By setting the hydrogen concentration in the first region 55a in the above range, the capacitance in the first region 55a is increased. The generation of electrons that are rearranged can be suppressed, and the transistor has a threshold voltage of 100 V. The device has a normally-off characteristic, which is a typical characteristic of the device.

[0055] When hydrogen is contained in the oxide semiconductor film in which oxygen vacancies are formed by the addition of an impurity element, the oxygen Hydrogen enters the electron vacancy site and a donor level is formed near the conduction band. As a result, an oxide semiconductor The oxide semiconductor film that has become conductive is called an oxide conductive film. That is, in the oxide semiconductor film 55, the first region 55a is an oxide It can be said that the first region 55b and the second region 55c are formed of an oxide semiconductor. In the oxide semiconductor film 55, the second regions 55b and 55c are thicker than the first region 55a. The hydrogen concentration is high and the amount of oxygen vacancy is large due to the addition of impurity elements. The resistivity of the regions 55b and 55c is 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm, Preferably, the resistivity is 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistance is less than Ωcm. I wish.

[0056] Generally, oxide semiconductors have a large energy gap and are therefore transparent to visible light. On the other hand, an oxide conductor is an oxide semiconductor that has a donor level near the conduction band. Therefore, the effect of absorption due to the donor level is small, and the oxide semiconductor is It has the same translucency as the body.

[0057] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. In this case, the channel length is the distance between the second region 55b and the second region 55c. It becomes.

[0058] Alternatively, when the buffer film 60 is formed of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c may have a region overlapping a part of the conductive film 61. This region can be called the overlap region Lov. The length of ov is less than 20% of the channel length L, or less than 10%, or less than 5%, or In this case, the channel length is preferably less than 2%. This is the distance between the area 55c.

[0059] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. In addition, the third regions 55d and 55c are disposed between the first region 55a and the second regions 55b and 55c. The third regions 55d and 55e may be larger than the second regions 55b and 55c. In this case, the impurity element concentration is low, the resistivity is high, and the region functions as an electric field relaxation region. The channel length is the distance between third region 55d and third region 55e.

[0060] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c may not overlap with the conductive film 61. The interface between the first region 55a and the second regions 55b and 55c is located outside the conductive film 61. In the first region 55a, a region that does not overlap with the conductive film 61 is referred to as an offset region Lo. In this case, the channel length is the first region 55a and the conductive region 55b. The length of the offset region Loff is the width of the region overlapping the conductive film 61. It is preferable that the ratio is less than 20%, or less than 10%, or less than 5%, or less than 2% of the total. stomach.

[0061] In the transistors shown in FIGS. 1A to 1D, the buffer film 60 is a semiconductor film. In this case, the buffer film 60 and the conductive film 61 function as the gate electrode.

[0062] Therefore, when the buffer film 60 is made of a semiconductor film, in FIG. The interface between 55a and the second regions 55b and 55c may be substantially aligned with the edge of the buffer film 60. .

[0063] In addition, when the buffer film 60 is formed of a semiconductor film, in FIG. The region Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. It is.

[0064] In addition, when the buffer film 60 is formed of a semiconductor film, in FIG. 1(D), the channel length is This width corresponds to the width of the first region 55a that overlaps with the buffer film 60.

[0065] The configuration shown in FIG. 1 will be described in detail below.

[0066] The substrate 51 can be any of a variety of substrates and is not limited to a specific one. Examples of the substrate include a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SOI Substrate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil A substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminoboron glass. Silicate glass, soda lime glass, etc. Flexible substrates, laminated films Examples of the base film include the following: Polyethylene naphthalate (PET), Polyethylene naphthalate (PEN), Polyether sulfo For example, there are plastics such as acrylic resins. Examples of suitable materials include polypropylene, polyester, and polyfluoride. Examples of such materials include polyvinyl chloride, polyamide, polyisocyanate, etc. In particular, semiconductor substrates are By manufacturing transistors using a silicon substrate, single crystal substrate, or SOI substrate, Small variations in characteristics, size, or shape, high current capability, and small size It is possible to manufacture transistors. When a circuit is constructed using such transistors, This makes it possible to reduce the power consumption of the circuit or to increase the degree of integration of the circuit.

[0067] In addition, a flexible substrate is used as the substrate 51, and a transistor is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 51 and the transistor. After a semiconductor device is partially or entirely completed thereon, it is separated from the substrate 51 and attached to another substrate. In this case, the transistors are mounted on substrates with poor heat resistance or flexible substrates. The above-mentioned peeling layer may be formed of, for example, a tungsten film and a silicon oxide film. A laminated structure of a film and an inorganic film, or a structure in which an organic resin film such as polyimide is formed on a substrate etc. can be used.

[0068] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Rubber substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, These substrates include recycled polyester, leather substrates, and rubber substrates. By using this, it is possible to form transistors with good characteristics and low power consumption. It is possible to form, manufacture devices that are less likely to break, are heat resistant, or are lighter or thinner. .

[0069] The insulating film 53 is a single layer or a stack of an insulating film containing oxygen or an insulating film containing nitrogen. A typical example of an insulating film containing oxygen is an oxide insulating film. A typical example of an insulating film containing nitrogen is a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor film 55, the insulating film 53 is The region in contact with the insulating film 53 is preferably formed of an insulating film containing oxygen. In addition, by using an oxide insulating film having a function of releasing oxygen by heat treatment, By the treatment, oxygen in the insulating film 53 can be transferred to the oxide semiconductor film 55. Therefore, it is preferable.

[0070] The insulating film 53 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide Any of the above may be used, and the insulating layer may be provided as a laminate or a single layer.

[0071] In this specification and the like, a silicon oxynitride film is a film having a composition containing more oxygen than nitrogen. It refers to a film with a high content of oxygen, preferably 55 atomic % to 65 atomic % and 1 % to 20 atomic %, silicon is 25 atomic % to 35 atomic %, hydrogen is 0.1 atomic % The silicon oxide film is a film containing silicon dioxide in an amount of 10 atomic % or more. The composition of the film is that it contains more nitrogen than oxygen, and preferably the nitrogen is 55 to 6 5 atomic %, oxygen is 1 to 20 atomic %, silicon is 25 to 35 atomic %, hydrogen is 0.1 to This refers to a substance contained in a concentration range of 10 atomic %.

[0072] The oxide semiconductor film 55 is typically made of In-Ga oxide, In-Zn oxide, In-Mn oxide, or In-Zn oxide. -Metal oxide such as Zn oxide (M is Al, Ga, Y, Zr, Sn, La, Ce, or Nd) It is formed from compounds.

[0073] When the oxide semiconductor film 55 is an In-M-Zn oxide, the atomic ratio of In to M is When the sum of In and M is 100 atomic %, In is 25 atomic % or less. M is less than 75 atomic %, and more preferably In is 34 atomic % or more. is less than 66 atomic%.

[0074] The oxide semiconductor film 55 has an energy gap of 2 eV or more, preferably 2.5 eV or more. , and more preferably 3 eV or more.

[0075] The thickness of the oxide semiconductor film 55 is 3 nm to 200 nm, preferably 3 nm to 10 0 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0076] The oxide semiconductor film 55 is an In-M-Zn oxide (wherein M is Al, Ga, Y, Zr, Sn, or La , Ce, or Nd), the sputtering method used to deposit the In-M-Zn oxide film The atomic ratio of the metal elements in the target is such that the number of In atoms is equal to or greater than the number of M atoms, and the number of Zn atoms is equal to or greater than the number of It is preferable that the number of atoms is equal to or greater than the number of atoms of M. The atomic ratio of the target metal elements is In:M:Zn=1:1:1, In:M:Zn= 1:1:1.2, In:M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, The preferred ranges are In:M:Zn=2:1:3, In:M:Zn=3:1:2, etc. The atomic ratio of the oxide semiconductor film 55 to be formed is determined by the above sputtering target as an error. This includes a variation of ±40% in the atomic ratio of the metal elements contained in the material.

[0077] In addition, the oxide semiconductor film 55 contains silicon or carbon, which is one of the Group 14 elements. If the oxide semiconductor film 55 is exposed to the oxygen, oxygen vacancies increase in the oxide semiconductor film 55, causing the oxide semiconductor film 55 to become n-type. The concentrations of silicon and carbon in the oxide semiconductor film 55 (obtained by secondary ion mass spectrometry) The concentration of 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 As a result, the transistor has electrical characteristics in which the threshold voltage is positive. (also called normally-off characteristic).

[0078] In addition, in the oxide semiconductor film 55, an alkali metal oxide was obtained by secondary ion mass spectrometry. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Hereinafter, preferably 2×1016 atoms / cm 3 The following are the alkali metals and alkaline earth metals: When a compound is bonded to an oxide semiconductor, carriers may be generated, increasing the off-state current of a transistor. For this reason, the alkali metal or alkali metal oxide of the oxide semiconductor film 55 may be increased. It is preferable to reduce the concentration of the earth metal. This results in a transistor with a threshold voltage of It has positive electrical characteristics (also called normally-off characteristics).

[0079] In addition, when nitrogen is contained in the oxide semiconductor film 55, electrons serving as carriers are generated. The rear density increases and it becomes easier to make it n-type. As a result, Therefore, the transistor having the oxide semiconductor film 55 tends to be normally on. In the first region 55a, it is preferable that the nitrogen is reduced as much as possible. For example, The nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 below It is preferable to set

[0080] By reducing impurities in the first region 55a of the oxide semiconductor film 55, Therefore, the carrier density in the first region 55a of the oxide semiconductor The first region 55a of the film 55 has a carrier density of 8×10 11 / cm 3 Less than Preferably 1×10 11 / cm 3 More preferably, less than 1×10 10 / cm 3 Less than 1×10 -9 / cm 3 More preferably, it is equal to or greater than this.

[0081] The first region 55a of the oxide semiconductor film 55 has a low impurity concentration and a low density of defect states. By using a thin oxide semiconductor film, a transistor with better electrical characteristics can be manufactured. Here, the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). ) is called high purity genuine or substantially high purity genuine. High purity genuine or substantially high purity Intrinsic oxide semiconductors have few carrier generation sources, so they can reduce the carrier density. Therefore, a channel region may be formed in the first region 55a of the oxide semiconductor film 55. The transistor in which the region is formed has electrical characteristics in which the threshold voltage is positive (normally off). Also, high purity intrinsic or substantially high purity intrinsic oxide is prone to oxidation. Since the defect level density of the semiconductor film is low, the trap level density may also be low. In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has an extremely small off-state current. The channel width is 1×10 6 Even if the semiconductor element has a channel length L of 10 μm, When the voltage between the source and drain electrodes (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 Below A Therefore, the first region 55a of the oxide semiconductor film 55 can be obtained. The transistor in which the channel region is formed has small fluctuations in electrical characteristics and is a highly reliable transistor. It may become a transistor.

[0082] The oxide semiconductor film 55 may have a non-single crystal structure, for example. , CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described below), or Among non-single crystal structures, the amorphous structure has the highest defect level density and CA AC-OS has the lowest defect state density.

[0083] Note that the oxide semiconductor film 55 may be divided into an amorphous region, a microcrystalline region, a polycrystalline region, and a polycrystalline region. The film may be a mixed film having two or more of the following regions: a region of a CAAC-OS structure, a region of a single crystal structure, and a region of a crystalline structure. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA The single-layer structure has two or more regions, either a C-OS region or a single crystal structure region. The mixed film may have an amorphous structure, a microcrystalline structure, a polycrystalline structure, a C In the case where the layer structure has two or more types of regions, either the AAC-OS region or the single crystal structure region, There is a match.

[0084] The insulating film 57 is a single layer or a stack of an insulating film containing oxygen or an insulating film containing nitrogen. Typically, an oxide insulating film is used as the insulating film containing oxygen. It is possible to use a nitride insulating film as the insulating film containing nitrogen. In order to improve the interface characteristics with the oxide semiconductor film 55, at least In particular, a region in contact with the oxide semiconductor film 55 is preferably formed using an insulating film containing oxygen. Generally, it is preferable to form the insulating film using an oxide insulating film.

[0085] The oxide insulating film may be, for example, silicon oxide, silicon oxynitride, aluminum oxide, or oxide. Hafnium oxide, gallium oxide, Ga-Zn oxide, etc. can be used. The nitride insulating film may be made of silicon oxynitride, silicon nitride, or the like.

[0086] In addition, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided as the insulating film 57. As a result, oxygen is diffused from the first region 55a of the oxide semiconductor film 55 to the outside, To prevent hydrogen, water, and the like from entering the first region 55a of the oxide semiconductor film 55 from the outside. As an insulating film that has a blocking effect against oxygen, hydrogen, water, etc., aluminum oxide is Aluminum, aluminum oxide nitride, gallium oxide, gallium oxide nitride, yttrium oxide, It can be formed using yttrium oxide nitride, hafnium oxide, hafnium oxynitride, etc. Cut.

[0087] The insulating film 57 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0088] The conductive film 61 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, or nickel. A metal element selected from the group consisting of iron, cobalt, and tungsten, or a metal element containing the above-mentioned metal elements. The metal elements may be alloys of the above metal elements or alloys of the above metal elements. In addition, one or more metal elements selected from manganese and zirconium may be used. The conductive film 61 may have a single layer structure or a laminated structure of two or more layers. For example, A single layer structure of aluminum film containing silicon, a single layer structure of copper film containing manganese, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film laminated on stainless film, copper film laminated on copper film containing manganese A two-layer structure is formed by laminating a titanium film and an aluminum film on the titanium film, and then laminating the titanium film on top of that. A three-layer structure that forms a manganese film. A copper film is laminated on a copper film containing manganese, and a manganese film is further laminated on top of that. There are three-layer structures that form a copper film containing gun. In addition, aluminum is coated with titanium and tantalum. tungsten, molybdenum, chromium, neodymium, and scandium. An alloy film or a nitride film having a combination of the above may also be used.

[0089] The conductive film 61 is made of indium tin oxide or indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide with titanium oxide, indium zinc oxide, indium with silicon oxide A light-transmitting conductive material such as zinc tin oxide can also be used. Alternatively, the conductive material may have a laminated structure containing the above-mentioned metal element and a conductive material having the above-mentioned properties.

[0090] As shown in FIG. 2, the conductive film 61 has a laminated structure. 61a, and a conductive film 61b in contact with the conductive film 61a. The end of the conductive film 61a may be located outside the end of the conductive film 61b. It may have a shape protruding from the film 61b.

[0091] The insulating film 65 containing hydrogen is preferably formed using a nitride insulating film. As the insulating film, silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride The hydrogen concentration in the insulating film 65 is 1×10 22 a toms / cm 3 In this case, hydrogen can be diffused into the oxide semiconductor film. Therefore, it is preferable.

[0092] The pair of conductive films 68 and 69 are made of aluminum, titanium, chromium, nickel, copper, yttrium, Aluminum, zirconium, molybdenum, iron, cobalt, silver, tantalum, or tungsten Any metal or alloy containing this metal as the main component is used in a single layer or multilayer structure. For example, a single layer structure of an aluminum film containing silicon, a single layer structure of a copper film containing manganese, a single layer structure of a titanium film, A two-layer structure in which an aluminum film is laminated on a tungsten film. A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film; Two-layer structure with copper film laminated on tungsten film, two-layer structure with copper film laminated on tungsten film, manganese film, A two-layer structure in which a copper film is laminated on a copper film containing titanium or titanium nitride, and the titanium A titanium nitride film is laminated with an aluminum film or a copper film, and a titanium nitride film is laminated with an aluminum film or a copper film. A three-layer structure in which a titanium film or titanium nitride film is formed, a molybdenum film or molybdenum nitride film and Then, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film. A three-layer structure in which a molybdenum film or molybdenum nitride film is formed on top of the manganese A three-layer structure in which a copper film containing manganese is formed on a copper film containing manganese. A transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used. stomach.

[0093] For the insulating films 67 and 79, the material of the insulating film 53 or the insulating film 57 can be used as appropriate.

[0094] In addition, when the pair of conductive films 68 and 69 contains copper, the insulating film 79 is an insulating film containing nitrogen. The formation of the insulating film using nitrogen is preferable because it is possible to prevent copper diffusion. A typical example is a nitride insulating film. The nitride insulating film is made of silicon nitride, silicon oxynitride, etc. The insulating film can be formed using aluminum nitride, aluminum oxide nitride, or the like.

[0095] <Method for manufacturing semiconductor device> Next, a manufacturing method of the transistor shown in FIG. 1A will be described with reference to FIGS. Reveal.

[0096] The films constituting the transistor (insulating film, oxide semiconductor film, metal oxide film, conductive film, etc.) are Sputtering method, Chemical Vapor Deposition (CVD) method, Vacuum evaporation method, Pulsed laser deposition (PL D) method. Alternatively, it can be formed by a coating method or a printing method. The film formation method is typically sputtering or plasma enhanced chemical vapor deposition (PECVD). Although it is typical, a thermal CVD method may also be used. An example of a thermal CVD method is MOCVD (metal organic chemical vapor deposition). Deposit:Metal Organic Chemical Vapor Depositi on) method and ALD (Atomic Layer Deposition) method Alternatively, a multi-chamber type film forming apparatus equipped with a load lock chamber may be used. By stacking each film in succession without exposing them to the air, impurities at the interface of each film are eliminated. This is preferable because the amount of the additive can be reduced.

[0097] In the thermal CVD method, the pressure in the chamber is set to atmospheric pressure or reduced pressure, and the source gas and the oxidizing agent are simultaneously The reaction is carried out in the chamber near or on the substrate, where it is deposited on the substrate to form a film. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that defects are not generated due to damage.

[0098] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases are introduced into the chamber in sequence, and the film is formed by repeating the gas introduction sequence. For example, By switching each switching valve (also called high-speed valve), two or more types of raw materials can be The source gases are sequentially supplied to the chamber, and the first source gas is supplied to the chamber so that multiple source gases do not mix. Simultaneously with or after the second gas, an inert gas (such as argon or nitrogen) is introduced. Introduce the raw material gas. If an inert gas is introduced at the same time, the inert gas is used as a carrier gas. In addition, an inert gas may be introduced at the same time as the second source gas is introduced. Also, instead of introducing an inert gas, the first source gas is discharged by evacuation, and then the second source gas is introduced. The first source gas may be adsorbed on the surface of the substrate to form a first monoatomic layer. The second monoatomic layer is formed by reacting with the second source gas introduced later. Layer upon layer is laminated to form a thin film.

[0099] This gas introduction sequence is controlled and repeated several times until the desired thickness is achieved. The thickness of the thin film increases depending on the number of times the gas introduction sequence is repeated. This allows precise film thickness control, making it possible to fabricate minute transistors. It is suitable for fabrication.

[0100] As shown in FIG. 3A, an insulating film 53 and an oxide semiconductor film 54 are formed on a substrate 51. Next, an insulating film 56 is formed on the oxide semiconductor film 54, and a buffer film 58 is formed on the insulating film 56. Next, oxygen 62 is added to the insulating film 56 via the buffer film 58.

[0101] The insulating film 53 is formed by a sputtering method, a CVD method, a vapor deposition method, a pulsed laser deposition (PLD) method, or the like. The insulating film can be formed by a suitable method such as a printing method or a coating method. After the formation, oxygen can be added to the insulating film to form the insulating film 53. The oxygen to be added may be an oxygen radical, an oxygen atom, an oxygen atomic ion, an oxygen molecular ion, etc. The doping method may be an ion doping method, an ion implantation method, a plasma treatment method, etc. There is.

[0102] A method for forming the oxide semiconductor film 54 will be described below. By using methods such as coating, painting, pulsed laser deposition, laser ablation, and thermal CVD, An oxide semiconductor film is formed. Next, a mask is formed on the oxide semiconductor film by a lithography process. After the formation of the mask, part of the oxide semiconductor film is etched using the mask. As shown in FIG. 1, the oxide semiconductor film 54 can be formed. After that, the mask is removed. do.

[0103] In addition, by using a printing method for the oxide semiconductor film 54, the oxide semiconductor The membrane 54 can be formed directly.

[0104] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like, as appropriate.

[0105] The sputtering gas is a rare gas (typically argon) atmosphere, an oxygen atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the rare gas is It is preferable to increase the gas ratio of oxygen.

[0106] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0107] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is set to 150° C. or higher and 750° C. or lower, preferably 150° C. or higher and 450° C. or lower, and more preferably The oxide semiconductor film is formed at a temperature of 200° C. or higher and 350° C. or lower. S film can be formed.

[0108] In order to form a CAAC-OS film, which will be described later, it is preferable to apply the following conditions: It is.

[0109] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the deposition chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of −80° C. or lower, preferably −100° C. or lower is used.

[0110] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. Expressed as volume percent.

[0111] In addition, after the oxide semiconductor film is formed, heat treatment is performed to dehydrogenate or The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point. Preferably, the temperature is 250° C. or higher and 450° C. or lower, and more preferably, 300° C. or higher and 450° C. or lower. .

[0112] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or The heating is performed in an inert gas atmosphere containing nitrogen, or after heating in an inert gas atmosphere, the heating is performed in an oxygen atmosphere. The inert atmosphere and oxygen atmosphere may contain hydrogen, water, etc. The treatment time is preferably from 3 minutes to 24 hours.

[0113] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0114] The oxide semiconductor film is formed while being heated, and after the oxide semiconductor film is formed, By performing heat treatment, the hydrogen concentration in the oxide semiconductor film is increased to 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 at oms / cm 3 Less than 1 x 10 18 atoms / cm 3 More preferably, 5×10 17atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 It can be as follows:

[0115] The deposition equipment using ALD can be used to form oxide semiconductor films, such as InGaZnO X (X>0) When forming a film, In(CH 3 ) 3 Gas and O 3 The gases were repeatedly introduced to produce InO 2 layer, and then Ga(CH 3 ) 3 Gas and O 3 Gas is introduced simultaneously to form a GaO layer. Then, Zn(CH 3 ) 2 and O 3 Gases are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, InGaO 2 layer and InZnO 2 Layers of mixed compounds such as GaInO, ZnInO, and GaZnO are formed. It is also possible to create 3 H bubbled with inert gas such as Ar instead of gas 2 O gas may be used, but O containing no H 3 It is preferable to use In(CH 3 ) 3 Instead of gas, In(C 2 H 5 ) 3 Gas may also be used. Ga(CH 3 ) 3 gas Instead, Ga(C 2 H 5 ) 3 Gas may also be used. Zn(CH 3 ) 2 Change to gas Zn(C 2 H 5 ) 2 A gas may also be used.

[0116] Here, a 35-nm-thick oxide semiconductor film is formed by a sputtering method. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. Next, after removing the mask, a heat treatment is performed in a mixed gas atmosphere containing nitrogen and oxygen. Thus, the oxide semiconductor film 54 is formed.

[0117] The heat treatment is carried out at a temperature of 350° C. or higher and 650° C. or lower, preferably 450° C. or higher and 600° C. or lower. By carrying out the following, the CAAC conversion rate described below is 60% or more and less than 100%, preferably 80%. % or more but less than 100%, more preferably 90% or more but less than 100%, and even more preferably 95% In addition, an oxide semiconductor film having a hydrogen content of 98% or less can be obtained. That is, it is possible to obtain an oxide semiconductor film having a low impurity concentration and a low defect density. An oxide semiconductor film with a low density of states can be formed.

[0118] The insulating film 56 is an insulating film that will become a gate insulating film in a later process. Sputtering method, CVD method, vacuum deposition method, pulsed laser deposition (PLD) method, thermal CVD method etc. are formed.

[0119] When a silicon oxide film or a silicon oxynitride film is formed as the insulating film 56, the source gas As the gas, it is preferable to use a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silane include silane, disilane, trisilane, and fluorosilane. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

[0120] In addition, when a gallium oxide film is formed as the insulating film 56, it is formed by using the MOCVD method. It is possible.

[0121] The insulating film 56 is formed by a thermal CVD method such as MOCVD or ALD. To form a hafnium film, a liquid containing a solvent and a hafnium precursor compound (hafnium Hafnium alkoxides and tetrakisdimethylamidohafnium (TDMAH) The raw material gas is made of vaporized amide and ozone (O 3 ) Two types of gas are used The chemical formula for tetrakisdimethylamidohafnium is Hf[N(CH 3 ) 2 ] 4 Yes Other liquid materials include tetrakis(ethylmethylamido)hafnium. do.

[0122] The insulating film 56 is formed by depositing an oxidized aluminum film using a thermal CVD method such as MOCVD or ALD. When forming an aluminum film, a liquid containing a solvent and an aluminum precursor compound (trimethylsilyl) is used. The raw material gas is vaporized tetrachloroethylene (TMA) and H as an oxidizer. 2 Two types of O The chemical formula for trimethylaluminum is Al(CH 3 ) 3 Also, Other liquid materials include tris(dimethylamido)aluminum and triisobutylaluminum. Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionato) In addition, by forming it using the ALD method, it is possible to obtain an insulating film with a high coverage and a thin film thickness. 56 can be formed.

[0123] The insulating film 56 is formed by a thermal CVD method such as MOCVD or ALD. When forming a silicon film, hexachlorodisilane is adsorbed onto the surface to be filmed, and the adsorbed material contains Removes chlorine and oxidizing gas (O 2 , nitrous oxide) radicals to adsorbate Make it react.

[0124] Here, a silicon oxynitride film is formed as the insulating film 56 by the plasma CVD method. .

[0125] The buffer film 58 may be made of indium, zinc, titanium, aluminum, tungsten, tantalum, or molybdenum. For example, an alloy having the above-mentioned metal element; a metal oxide having the above-mentioned metal element; The conductive material is a metal nitride oxide having the above-mentioned metal elements. and form.

[0126] The buffer film 58 may be, for example, a tantalum nitride film, a titanium film, or an indium tin oxide film (hereinafter ITO film, aluminum film, oxide semiconductor film (e.g., IGZO film (In:G a:Zn=1:4:5 (atomic ratio), etc. can be used.

[0127] The thickness of the buffer film 58 is set to 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less. By setting the thickness of the buffer film 58 within the above range, the buffer film 58 and the insulating film 5 More oxygen can be added to 6.

[0128] In addition, when the buffer film 58 has a semiconductor or a conductor, the buffer film 58 may be doped with ions. In the implantation method, plasma processing method, etc., ionized oxygen is easily attracted to the buffer film 58. Therefore, by using the buffer film 58 formed of a semiconductor or a conductor, It is possible and preferable to add more oxygen to the insulating film 56 via the impingement film 58 .

[0129] In this embodiment, the buffer film 58 is formed by sputtering a 5 nm thick film. A tantalum nitride film is formed.

[0130] The method of adding oxygen 62 to the insulating film 56 through the buffer film 58 is ion doping. The plasma treatment includes, for example, a dry etching method, an ion implantation method, and a plasma treatment method. Using an etching or ashing device, a substrate is placed on the cathode side of a parallel plate; RF power should be supplied so that a bias is applied to the substrate side. By adding oxygen 62, it is possible to efficiently introduce oxygen 62 into the insulating film 56, which is preferable. By providing the buffer film 58 on the insulating film 56, when oxygen 62 is added, the insulating film 56 In addition, the buffer film 58 can prevent oxygen from being transferred from the insulating film 56 to the Therefore, the insulating film 56 functions as a protective film that prevents the detachment of oxygen. Alternatively, oxygen may be added to the vicinity of the interface between the insulating film 56 and the buffer film 58. It can be added.

[0131] In addition, when oxygen is introduced in plasma processing, the oxygen is excited by microwaves to produce high-density oxygen. By generating the elemental plasma, the amount of oxygen introduced into the insulating film 56 can be increased.

[0132] The buffer film 59 formed by adding oxygen to the buffer film 58 is shown in FIG. The buffer film 58 shown in FIG. 3A is doped with oxygen 62, In this case, the buffer film 59 shown in FIG. , metallic elements (indium, zinc, titanium, aluminum, tungsten, tantalum, or molybdenum), or a metal oxide nitride having the above-mentioned metal element. The buffer film 59 has physical properties of an insulator or a semiconductor.

[0133] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher. Less than the strain point, preferably 200°C or more and 450°C or less, more preferably 300°C or more and 450°C or less. Through this process, oxygen contained in the insulating film 56 is transferred to the oxide semiconductor film 54. As a result, the amount of oxygen vacancies in the oxide semiconductor film 54 can be reduced. The heat treatment is not performed, and the oxygen contained in the insulating film 56 is converted to an oxide by a heat treatment to be performed later. It may be transferred to the semiconductor film 54 .

[0134] Next, a conductive film 61 is formed over the buffer film 59 (see FIG. 3C).

[0135] The conductive film 61 is formed by the following methods. First, the sputtering method, the vacuum deposition method, and the pulse deposition method are used. A conductive film is formed by a photolithographic laser deposition (PLD) method, thermal CVD method, etc., and then lithography is performed on the conductive film. A mask is formed by a etching process. Next, a part of the conductive film is etched using the mask. This forms the conductive film 61. After that, the mask is removed.

[0136] The conductive film 61 may be formed by electrolytic plating, printing, ink jet printing, or the like instead of the above-mentioned method. Alternatively, the insulating layer 14 may be formed by a method such as a dipping method.

[0137] In addition, a tungsten film can be formed as a conductive film using a deposition system that uses ALD. In this case, WF 6 Gas and B 2 H 6 The gas is introduced repeatedly to obtain the initial tungsten content. Then, WF 6 Gas and H 2 Gases are introduced simultaneously to form a tungsten film In addition, B 2 H 6 Instead of gas, SiH 4 A gas may also be used.

[0138] Next, as shown in FIG. 3(D), the insulating film 56 and the buffer film 59 are removed using the conductive film 61 as a mask. The insulating film 57 and the buffer film 60 are formed by etching.

[0139] Next, as shown in FIG. 4A, a conductive film 61 is used as a mask to apply a non-conductive layer to the oxide semiconductor film 54. As a result, the impurity element is added to the exposed portion of the oxide semiconductor film 54. The oxide semiconductor film 54 is damaged by the addition of the impurity element 63 and has defects, substitutions, and the like. Note that, depending on the impurity element, oxygen vacancies may be formed in the oxide semiconductor film 54. However, some of the impurity elements do not remain in the oxide semiconductor film 54 and are released. However, taking such a phenomenon into consideration, it is expressed here as "adding an impurity element to an oxide semiconductor film." The following describes the process.

[0140] The method of adding the impurity element 63 includes ion doping, ion implantation, plasma treatment, etc. In the case of plasma processing, the plasma is generated in a gas atmosphere containing the impurity element to be added. By generating a plasma and carrying out plasma treatment, the accelerated impurity element ions are oxidized. By colliding the oxygen with the oxide semiconductor film 54, oxygen vacancies can be formed in the oxide semiconductor film 54. The plasma generating devices include dry etching devices, plasma CVD devices, and A high-density plasma CVD apparatus using microwaves can be used. When performing the process, a substrate is placed on the cathode side of the parallel plate, and a bias is applied to the substrate 51 side. RF power may be supplied so that the power density is, for example, 0. 1W / cm 2 More than 2W / cm 2 As a result, impurities are not added to the oxide semiconductor film 54. The amount of the dopant element can be increased, and more oxygen vacancies can be formed in the oxide semiconductor film 54. Losses can be made.

[0141] The source gas for the impurity element 63 is B 2 H 6 , PH 3 , C.H. 4 , N 2 , N.H. 3 , AlH 3 , AlCl 3 , SiH 4 , Si 2 H 6 , F 2 , H.F., H. 2 and one or more of the noble gases Alternatively, B diluted with rare gas can be used. 2 H 6 , PH 3 , N 2 , N.H. 3 , AlH 3 , AlCl 3 , F 2 , HF and H 2 One or more of the following can be used: Diluted B 2 H 6 , PH 3 , N 2 , N.H. 3 , AlH 3 , AlCl 3 , F 2 , H.F. and H 2 The oxide semiconductor film 54 is doped with one or more of a rare gas, hydrogen, boron, or Simultaneously oxidize one or more of carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, and chlorine The semiconductor film 54 can be doped with the above-mentioned compound.

[0142] Alternatively, after a rare gas is added to the oxide semiconductor film 54, 2 H 6 , PH 3 , C.H. 4 , N 2 , N.H. 3 , AlH 3 , AlCl 3 , SiH 4 , Si 2 H 6 , F 2 , HF and H 2 One of The oxide semiconductor film 54 may be doped with the above.

[0143] Or B 2 H 6 , PH 3 , C.H. 4 , N 2 , N.H. 3 , AlH 3 , AlCl 3 , SiH 4 , Si 2 H 6 , F 2 , HF and H 2 After adding one or more of the following to the oxide semiconductor film 54, The oxide semiconductor film 54 may be doped with silicon.

[0144] When using ion doping or ion implantation, the acceleration voltage, dose amount, etc. The conditions can be appropriately set and controlled. For example, when adding argon by ion implantation, , acceleration voltage 10 kV, dose amount 1×10 13 ions / cm 2 More than 1×10 16ion s / cm 2 For example, 1×10 14 ions / cm 2 Then, In addition, when phosphorus ions are added by ion implantation, the acceleration voltage is 30 kV and the dose is 1 × 1 0 13 ions / cm 2 5×10 or more 16 ions / cm 2 For example, 1×10 15 ions / cm 2 This can be done as follows.

[0145] Note that, instead of the impurity element 63, the oxide semiconductor film 54 is irradiated with ultraviolet light or the like to form an oxide Alternatively, oxygen vacancies may be formed in the oxide semiconductor film 54. In this case, oxygen vacancies may be formed in the oxide semiconductor film 54 by irradiating the oxide semiconductor film 54 with oxygen.

[0146] When the impurity element 63 is added in a state where the conductive film 61 is exposed, a part of the conductive film 61 becomes The insulating film 57 may peel off and adhere to the side surface of the insulating film 57. As a result, the transistor lead Therefore, the upper surface of the conductive film 61 is covered with a mask, and the oxide By adding an impurity element 63 to the semiconductor film 54, a part of the conductive film 61 is formed on the side wall of the insulating film 57. It is possible to prevent adhesion to the

[0147] Next, as shown in FIG. 4B, the oxide semiconductor film 54, the insulating film 57, the buffer film 60, and An insulating film 64 containing hydrogen is formed on the conductive film 61. The methods include sputtering, CVD, vacuum deposition, and pulsed laser deposition (PLD). The hydrogen-containing insulating film 64 can be formed by an ALD (atomic layer deposition) method. By using this, the insulating film 64 containing hydrogen and having excellent step coverage can be formed.

[0148] The hydrogen-containing insulating film 64 contains hydrogen. The region to which the impurity element is added is in contact with the insulating film 64 containing hydrogen, whereby the insulating film Hydrogen contained in 64 moves to a region in the oxide semiconductor film 54 to which the impurity element is added. As a result, the first region 55a to which the impurity element is not added and the second region 55b to which the impurity element and hydrogen are added are separated. In addition, the first region 55a and the second region 55b and 55c having the same structure are formed. The oxide semiconductor film 55 having the regions 55b and 55c is formed. The hydrogen diffuses into part of the oxide semiconductor film 55 through part of the insulating film 57. In some cases, the second regions 55b and 55c may overlap with the insulating film 57. As a result, second regions 55b and 55c overlapping parts of the conductive film 61 can be formed.

[0149] In addition, the second regions 55b and 55c are formed by oxygen vacancies caused by the addition of impurity elements, and The second regions 55b and 55c have hydrogen. The interaction between the oxygen vacancies and the hydrogen makes the second regions 55b and 55c conductive. That is, the second regions 55b and 55c become low resistance regions.

[0150] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher. Less than the strain point, preferably 200°C or more and 450°C or less, more preferably 300°C or more and 450°C or less. This step further enhances the electrical conductivity of the second regions 55b and 55c. In addition, oxygen contained in the insulating film 57 can be transferred to the oxide semiconductor film 55 through this process. can be done.

[0151] Next, an insulating film that will later become an insulating film 67 having an opening is formed on the insulating film 64 having hydrogen. By forming the insulating film, a pair of conductive films 68 and 69 to be formed later can be formed. Therefore, the parasitic capacitance between the conductive film 61 and the insulating film 62 can be reduced.

[0152] Next, a part of the insulating film 64 containing hydrogen is etched to form an insulating film 65 having an opening. Then, a pair of conductive films 68 and 6 Next, an insulating film 79 is formed on the insulating film 67 and the pair of conductive films 68 and 69 ( See Figure 4(C).

[0153] The pair of conductive films 68 and 69 can be formed appropriately using a method similar to that for forming the conductive film 61 . The insulating film 79 can be formed in the same manner as the insulating films 53 and 56 .

[0154] Through the above steps, the transistor illustrated in FIG. 1A can be manufactured.

[0155] In this embodiment, oxygen is added to the insulating film through a buffer film, and the oxygen contained in the insulating film is By transferring the oxygen to the oxide semiconductor film, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. In addition, a conductive film having a function as a gate electrode is used as a mask to form a non-transparent oxide semiconductor film. A pure element is added to the oxide semiconductor film. The region overlapping with the semiconductor layer functions as a channel region, and the region to which the impurity element is added functions as a semiconductor layer. Therefore, the transistor shown in this embodiment has a function as a source region and a drain region. In the transistor, the channel region has a small amount of oxygen vacancies and is not doped with impurity elements. On the other hand, the source and drain regions have low resistivity because they are doped with impurity elements. From the above, in this embodiment, a transistor having a normally-off characteristic and a high on-current is It is possible to manufacture highly reliable transistors. can.

[0156] In addition, the transistor described in this embodiment can form a region in which the amount of change in resistivity is small. This improves the on-state current and reduces the variation in transistors compared to conventional techniques.

[0157] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0158] (Embodiment 2) In this embodiment mode, a structure and a manufacturing method of a semiconductor device different from those shown in Embodiment 1 will be described. This will be explained with reference to FIGS. 5 to 9.

[0159] In the transistor shown in this embodiment, the side surface of the buffer film 60 is located on the outer side than the side surface of the conductive film 61. This differs from the first embodiment in that it protrudes.

[0160] <Configuration 1 of Semiconductor Device> The structure of a transistor included in a semiconductor device will be described with reference to FIGS. do.

[0161] The transistor illustrated in FIG. 5A includes an oxide semiconductor film 55 and a an insulating film 57 on the insulating film 57; a buffer film 60 on the insulating film 57; The buffer film 60 is formed on the conductive film 61 and is disposed on the conductive film 61. That is, the area of ​​the upper surface shape of the buffer film 60 is larger than that of the conductive film 61. The side surface of the insulating film 57 is substantially aligned with the side surface of the buffer film 60 .

[0162] The other structures are the same as those of the transistor described in Embodiment 1; therefore, the details are not described here. A detailed explanation will be omitted.

[0163] In the manufacturing process of the transistor described in this embodiment, The oxide semiconductor film (shown in FIG. 5 ) is formed by interposing an island-shaped buffer film (which becomes the buffer film 60 shown in FIG. 5 ). 5) and an insulating film (an oxide semiconductor film that becomes the oxide semiconductor film 55 shown in FIG. 5). As a result, excess oxygen is added to the insulating film. Excess oxygen contained in the insulating film is moved to the oxide semiconductor film by the heat treatment. In this case, oxygen vacancies in at least the channel region can be reduced. Since it is preferable that the resistivity of the rain region is low, it is acceptable for the rain region to have many oxygen vacancies. At least, oxygen is added to the insulating film through an island-shaped buffer film covering the channel region, and the oxygen contained in the insulating film is By selectively adding oxygen to the oxide semiconductor film 55, the off-state current is small and the on-state current is large. In other words, it is possible to fabricate transistors with excellent electrical characteristics. It can be made.

[0164] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. Good too.

[0165] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c overlaps with a part of the conductive film 61 to form an overlap region. It may have Lov.

[0166] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. In addition, the third regions 55d and 55c are disposed between the first region 55a and the second regions 55b and 55c. e.

[0167] Alternatively, when the buffer film 60 is formed of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c does not overlap with the conductive film 61 and is an offset region Lof f.

[0168] In the transistors shown in FIGS. 5A to 5D, the buffer film 60 is a semiconductor film. In this case, the buffer film 60 and the conductive film 61 function as the gate electrode.

[0169] Therefore, when the buffer film 60 is made of a semiconductor film, in FIG. The interface between 55a and the second regions 55b and 55c may be substantially aligned with the edge of the buffer film 60. .

[0170] In addition, when the buffer film 60 is formed of a semiconductor film, in FIG. The region Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. It is.

[0171] When the buffer film 60 is made of a semiconductor film, the channel length in FIG. This width corresponds to the width of the first region 55a that overlaps with the buffer film 60.

[0172] <Configuration 2 of Semiconductor Device> The structure of a transistor included in a semiconductor device will be described with reference to FIGS. do.

[0173] The transistors shown in FIGS. 6A to 6D have a higher oxide content than the transistor shown in FIG. The difference is that the insulating film 56 provided between the compound semiconductor film 55 and the buffer film 60 is not separated. That is, the insulating film 56 covers the surface of the oxide semiconductor film 55 on the buffer film 60 side.

[0174] The other structures are the same as those of the transistor described in Embodiment 1; therefore, the details are not described here. A detailed explanation will be omitted.

[0175] Note that the thickness of the insulating film 56 is set so that the impurity element is not transferred to the oxide semiconductor film 55 through the insulating film 56. The insulating film 56 is preferably formed to a thickness that allows the insulating film 56 to move. 0 nm or less, preferably 10 nm or more and 30 nm or less.

[0176] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. Good too.

[0177] Alternatively, when the buffer film 60 is formed of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c overlaps with a part of the conductive film 61 to form an overlap region. It may have Lov.

[0178] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. Between the first region 55a and the second regions 55b and 55c, there are third regions 55d and 55e. may have the following structure:

[0179] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. In addition, a part of the second regions 55b and 55c does not overlap with the conductive film 61 and is an offset region Lof f.

[0180] In the transistors shown in FIGS. 6A to 6D, the buffer film 60 is a semiconductor film. In this case, the buffer film 60 and the conductive film 61 function as the gate electrode.

[0181] Therefore, when the buffer film 60 is made of a semiconductor film, in FIG. The interface between 55a and the second regions 55b and 55c may be substantially aligned with the edge of the buffer film 60. .

[0182] In addition, when the buffer film 60 is formed of a semiconductor film, in FIG. The region Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. It is.

[0183] Also, when the buffer film 60 is formed of a semiconductor film, in FIG. 6(D), the channel length is This width corresponds to the width of the first region 55a that overlaps with the buffer film 60.

[0184] <Method 1 for manufacturing semiconductor device> Next, a manufacturing method of the transistor shown in FIG. 5A will be described with reference to FIGS. 7 and 8. Reveal.

[0185] As in the first embodiment, as shown in FIG. 7A, an insulating film 53 on a substrate 51 and an insulating film An oxide semiconductor film 54 on the oxide semiconductor film 53, an insulating film 56 on the oxide semiconductor film 54, and The buffer film 58a is separated, and the side surface of the buffer film 58a is overlaps with the oxide semiconductor film 54.

[0186] In addition, in a region overlapping a region where a conductive film 61 having a function as a gate electrode is to be formed, A buffer film 58a is formed. That is, the buffer film 58a is formed in a region that will later become a channel region of the oxide semiconductor film 55. In the overlapping region, a buffer film 58a is formed. That is, the buffer film 58a functions as a gate insulating film for the insulating film 56. A buffer film 58a is formed in the insulating film 56 in a region overlapping the gate insulating film 56. The region functioning as a film includes at least a region between the oxide semiconductor film 54 and the conductive film 61. nothing.

[0187] Next, as shown in FIG. 7B, oxygen 62 is added to the buffer film 58a in the same manner as in the first embodiment. In the region of the insulating film 56 where the oxygen 62 is directly added, the addition of the oxygen 62 With the addition of oxygen, the surface of the insulating film 56 is etched by about several nm. As a result, a sufficient amount of oxygen may not be added to the insulating film 56. On the other hand, in the insulating film 56, in the region where oxygen 62 is added via the buffer film 58a, The buffer film 58a functions as a protective film that prevents the surface of the insulating film 56 from being etched by about several nanometers. This reduces oxygen vacancies in a region that will later become a channel region of the oxide semiconductor film 55. Therefore, sufficient oxygen can be added to the insulating film 56.

[0188] In addition, oxygen is added to the insulating film 56 through the buffer film 58a, so that the The present invention reduces damage to the region that functions as the gate insulating film while preventing excess oxygen from being deposited on the insulating film 56. can be added.

[0189] The oxide semiconductor film 55 is formed in an island shape in a region that will later become a channel region. Oxygen is added to the insulating film 56 through the buffer film 58a. The element can be selectively added to a region that will later become a channel region of the oxide semiconductor film 55. Cut.

[0190] In addition, the buffer film 58a is doped with oxygen 62, and thus the metal elements (indium, zinc) Metals containing lead, titanium, aluminum, tungsten, tantalum, or molybdenum The buffer film 60 is made of an oxide or a metal oxide nitride having the above-mentioned metal elements. (See FIG. 7(C)). The buffer film 60 has physical properties of an insulator or a semiconductor.

[0191] Next, a heat treatment may be performed in the same manner as in the first embodiment. The oxygen contained in the oxide semiconductor film 54 moves to the oxide semiconductor film 54, and oxygen vacancies are formed in the oxide semiconductor film 54. It is possible to reduce the amount of the oxidized material. Therefore, oxygen contained in the insulating film 56 may be moved to the oxide semiconductor film 54 .

[0192] Next, as shown in FIG. 7(D), a conductive film 61 is formed on the buffer film 60 in the same manner as in the first embodiment. Form.

[0193] Next, as shown in FIG. 8(A), the insulating film 5 is formed by using the buffer film 60 and the conductive film 61 as a mask. 6 is etched to form an insulating film 57.

[0194] Next, as shown in FIG. 8B, the buffer film 60 and the conductive film 61 are An impurity element 63 is added to the oxide semiconductor film 54 using the mask.

[0195] Next, in the same manner as in the first embodiment, a heat treatment is performed to form the regions that will become the second regions 55b and 55c. In addition, the oxygen contained in the insulating film 57 may be converted into an oxide by this process. It can be transferred to the semiconductor film 54 .

[0196] Next, as shown in FIG. 8C, similarly to the first embodiment, an oxide semiconductor film 54 and an insulating film 57, an insulating film 64 having hydrogen is formed on the buffer film 60 and the conductive film 61. As a result, A first region 55a to which no impurity element is added and a second region 55b to which the impurity element and hydrogen are added are provided. In addition, the first region 55a and the second region 55b and 55c are formed. An oxide semiconductor film 55 having the structure c is formed.

[0197] Next, as shown in the first embodiment, a film having an opening is formed on the insulating film 64 having hydrogen. Next, a part of the insulating film 64 containing hydrogen may be etched to form an insulating film that will become the insulating film 67. The insulating film 65 having openings is formed by etching the second regions 55b and 55c. After that, a pair of conductive films 68 and 69 may be formed. Next, the insulating film 67 and the An insulating film 79 may be formed on the pair of conductive films 68 and 69 (see FIG. 8(D)).

[0198] Through the above steps, the transistor illustrated in FIG. 5A can be manufactured.

[0199] <Method 2 for manufacturing semiconductor device> Next, a manufacturing method of the transistor shown in FIG. 6A will be described with reference to FIGS. do.

[0200] Through the steps of FIG. 7(A) to FIG. 7(D) shown in the above-mentioned <Method 1 for manufacturing a semiconductor device>, As shown in FIG. 9A, an insulating film 53 is formed on a substrate 51, and an oxide semiconductor film 5 4, an insulating film 56 on the oxide semiconductor film 54, a buffer film 60 on the insulating film 56, and An upper conductive film 61 is formed.

[0201] Next, as shown in FIG. 9(A), the buffer film 60 and the conductive film 61 are used as a mask to form the insulating film 5 An impurity element 63 is added to the oxide semiconductor film 54 through the contact 6 .

[0202] Next, as shown in FIG. 9B, hydrogen is introduced onto the insulating film 56, the buffer film 60 and the conductive film 61. As a result, a first region 55a to which no impurity element is added and In addition, second regions 55b and 55c having an impurity element and hydrogen are formed. An oxide semiconductor film 55 having a first region 55a and second regions 55b and 55c is formed.

[0203] Next, as shown in the first embodiment, a film having an opening is formed on the insulating film 64 having hydrogen. Next, a part of the insulating film 64 containing hydrogen may be etched to form an insulating film that will become the insulating film 67. The insulating film 65 having openings is formed by etching the second regions 55b and 55c. After that, a pair of conductive films 68 and 69 may be formed. Next, the insulating film 67 and the An insulating film 79 may be formed on the pair of conductive films 68 and 69 (see FIG. 9C).

[0204] Through the above steps, the transistor illustrated in FIG. 6A can be manufactured.

[0205] In this embodiment, oxygen is added to the insulating film through a buffer film, and the oxygen contained in the insulating film is By transferring the oxygen to the oxide semiconductor film, the amount of oxygen vacancies in the oxide semiconductor film can be reduced. In addition, a conductive film having a function as a gate electrode is used as a mask to form a non-transparent oxide semiconductor film. A pure element is added to the oxide semiconductor film. The region overlapping with the semiconductor layer functions as a channel region, and the region to which the impurity element is added functions as a semiconductor layer. Therefore, the transistor shown in this embodiment has a function as a source region and a drain region. In the transistor, the channel region has a small amount of oxygen vacancies and is not doped with impurity elements. On the other hand, the source and drain regions have low resistivity because they are doped with impurity elements. From the above, in this embodiment, a transistor having a normally-off characteristic and a high on-current is It is possible to manufacture highly reliable transistors. can.

[0206] In this embodiment, an oxide semiconductor film is selectively formed on an insulating film overlapping with a channel region of the oxide semiconductor film. Since it is possible to add oxygen, the amount of oxygen vacancies in the channel region can be selectively reduced. As a result, in this embodiment, a transistor having a normally-off characteristic and a high on-current is provided. In addition, a highly reliable transistor can be manufactured.

[0207] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0208] (Embodiment 3) In this embodiment mode, the structure and manufacturing method of the semiconductor device shown in Embodiments 1 and 2 will be described. A different embodiment from the above method will be described with reference to FIGS.

[0209] In the transistor described in this embodiment, a hydrogen atom is formed on the oxide semiconductor film 55 or the insulating film 57. This embodiment differs from the first and second embodiments in that an insulating film having a structure is not formed.

[0210] <Configuration 1 of Semiconductor Device> The structure of a transistor included in a semiconductor device will be described with reference to FIGS. Reveal.

[0211] The transistor illustrated in FIG. 10A includes an oxide semiconductor film 55 and a an insulating film 57 that is in contact with the buffer film 60; and a conductive film 61 overlapping with the insulating film 55 .

[0212] The oxide semiconductor film 55 included in the transistor is formed on the insulating film 53 on the substrate 51. In addition, the insulating film 55 is formed in contact with the second regions 55b and 55c. The insulating film 67 and the second region 55 included in the oxide semiconductor film 55 in the opening of the insulating film 67 A pair of conductive films 68 and 69 may be provided in contact with the insulating films 67 and 55b. An insulating film 79 may be provided on the pair of conductive films 68 and 69 .

[0213] The other structures are the same as those of the transistor described in Embodiment 1; therefore, the details are not described here. A detailed explanation will be omitted.

[0214] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. This is also fine.

[0215] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a part of the second regions 55b and 55c overlaps a part of the conductive film 61. It may have a region Lov.

[0216] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, the third region 55d and the third region 55c are disposed between the first region 55a and the second regions 55b and 55c. 5e.

[0217] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a portion of the second regions 55b and 55c does not overlap with the conductive film 61, and is defined as an offset region Lo ff.

[0218] In the transistors shown in FIGS. 10A to 10D, the buffer film 60 is a semiconductor. When the gate electrode is made of a conductive film, the buffer film 60 and the conductive film 61 function as the gate electrode.

[0219] Therefore, when the buffer film 60 is made of a semiconductor film, in FIG. The interface between the first region 55a and the second regions 55b and 55c may be substantially aligned with the edge of the buffer film 60. stomach.

[0220] In addition, when the buffer film 60 is made of a semiconductor film, in FIG. The region Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. It is an area.

[0221] In addition, when the buffer film 60 is formed of a semiconductor film, the channel length in FIG. , which is the width of the first region 55a and which overlaps with the buffer film 60.

[0222] <Configuration 2 of Semiconductor Device> The structure of a transistor included in a semiconductor device will be described with reference to FIGS. Reveal.

[0223] The transistor shown in FIG. 11A has a buffer film 6 The difference is that the upper surface of the buffer film 60 protrudes outward from the side surface of the conductive film 61. The area of ​​the shape is larger than that of the conductive film 61. Also, the side surface of the insulating film 57 is It almost coincides with the side.

[0224] The rest of the structure is the same as that of the transistor shown in Figure 10, so a detailed explanation will not be given here. The details are omitted.

[0225] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. This is also fine.

[0226] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a part of the second regions 55b and 55c overlaps a part of the conductive film 61. It may have a region Lov.

[0227] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, the third regions 55d and 55c are disposed between the first region 55a and the second regions 55b and 55c. e.

[0228] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a portion of the second regions 55b and 55c does not overlap with the conductive film 61, and is defined as an offset region Lo ff.

[0229] In the transistors shown in FIGS. 11A to 11D, the physical properties of the buffer film 60 When the semiconductor is used, the buffer film 60 and the conductive film 61 function as a gate electrode.

[0230] Therefore, when the physical property of the buffer film 60 is a semiconductor, in FIG. The interfaces between a and the second regions 55b and 55c may substantially coincide with the ends of the buffer film 60.

[0231] In addition, when the physical property of the buffer film 60 is a semiconductor, in FIG. Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. do.

[0232] In addition, when the physical property of the buffer film 60 is a semiconductor, in FIG. 11(D), the channel length is This width corresponds to the width of the region 55 a that overlaps with the buffer film 60 .

[0233] <Configuration 3 of Semiconductor Device> The structure of a transistor included in a semiconductor device will be described with reference to FIGS. Reveal.

[0234] The transistor shown in FIG. 12A has an oxide semiconductor The difference is that the insulating film 56 provided between the conductive film 55 and the buffer film 60 is not separated. That is, the insulating film 56 covers the surface of the oxide semiconductor film 55 on the buffer film 60 side.

[0235] The rest of the structure is the same as that of the transistor shown in Figure 11, so a detailed explanation will not be given here. The details are omitted.

[0236] When the buffer film 60 is made of an insulating film, the transistor shown in FIG. The interface between the first region 55a and the second regions 55b and 55c is substantially aligned with the edge of the conductive film 61. This is also fine.

[0237] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a part of the second regions 55b and 55c overlaps a part of the conductive film 61. It may have a region Lov.

[0238] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, the third regions 55d and 55c are disposed between the first region 55a and the second regions 55b and 55c. e.

[0239] Alternatively, when the buffer film 60 is made of an insulating film, the transistor shown in FIG. As shown in FIG. 1, a portion of the second regions 55b and 55c does not overlap with the conductive film 61, and is defined as an offset region Lo ff.

[0240] In the transistors shown in FIGS. 12A to 12D, the physical properties of the buffer film 60 When the semiconductor is used, the buffer film 60 and the conductive film 61 function as a gate electrode.

[0241] Therefore, when the physical property of the buffer film 60 is a semiconductor, in FIG. The interfaces between a and the second regions 55b and 55c may substantially coincide with the ends of the buffer film 60.

[0242] In addition, when the physical property of the buffer film 60 is a semiconductor, in FIG. Lov is a region that overlaps at least the buffer film 60 in the second regions 55b and 55c. do.

[0243] In addition, when the physical property of the buffer film 60 is a semiconductor, in FIG. 12(D), the channel length is This width corresponds to the width of the region 55 a that overlaps with the buffer film 60 .

[0244] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistor shown in FIG. 10A will be described with reference to FIGS. He explains.

[0245] As shown in the manufacturing method of a semiconductor device in the above-described embodiment 1, the steps of FIG. An insulating film 53 on a substrate 51, an oxide semiconductor film 54 on the insulating film 53, and An insulating film 57 is formed on the insulating film 57, a buffer film 60 is formed on the insulating film 57, and a conductive film 61 is formed on the buffer film 60. do.

[0246] Next, as shown in FIG. 13A, the buffer film 60 and the conductive film 61 are used as a mask to form an oxide film. An impurity element 63 is added to the semiconductor film 54. Here, the impurity element 63 is a rare gas, One or more of boron, nitrogen, fluorine, aluminum, and phosphorus are simultaneously or separately mixed with hydrogen. As shown in FIG. 13B, the first region 5 5a and second regions 55b and 55c having an impurity element and hydrogen. In addition, the oxide semiconductor film having the first region 55a and the second regions 55b and 55c can be formed. 55 can be formed.

[0247] Next, an opening is formed on the oxide semiconductor film 55, the insulating film 57, the buffer film 60, and the conductive film 61. Next, a pair of conductive films 68 and 69 may be formed. Next, an insulating film 79 may be formed on the insulating film 67 and the pair of conductive films 68 and 69 (FIG. 13( See C). ).

[0248] Through the above steps, the transistor illustrated in FIG. 10A can be manufactured.

[0249] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistor shown in FIG. This will be explained with reference to FIGS.

[0250] As shown in the above-described <Method 1 for manufacturing a semiconductor device> of the second embodiment, as shown in FIG. ) the insulating film 53 on the substrate 51, the oxide semiconductor film 54 on the insulating film 53, and the oxide semiconductor film 54 on the oxide semiconductor film 54 are formed. An insulating film 57 on the compound semiconductor film 54, a buffer film 60 on the insulating film 57, and a conductive film on the buffer film 60. A film 61 is formed.

[0251] Next, as shown in FIG. 8B, the buffer film 60 and the conductive film 61 are used as a mask to form an oxide semiconductor film. An impurity element 63 is added to the conductive film 54. Here, the impurity element 63 is a rare gas, One or more of uranyl, nitrogen, fluorine, aluminum, and phosphorus are mixed with hydrogen, either simultaneously or separately. As a result of the doping, as shown in FIG. 11(A), a first region 55 to which no impurity element is doped is formed. a and second regions 55b and 55c having an impurity element and hydrogen. In addition, the oxide semiconductor film 55 has a first region 55a and second regions 55b and 55c. 5 can be formed.

[0252] Next, an opening is formed on the oxide semiconductor film 55, the insulating film 57, the buffer film 60, and the conductive film 61. Next, a pair of conductive films 68 and 69 may be formed. Next, an insulating film 79 may be formed on the insulating film 67 and the pair of conductive films 68 and 69 .

[0253] Through the above steps, the transistor illustrated in FIG. 11A can be manufactured.

[0254] <Method 3 for manufacturing semiconductor device> Next, a method for manufacturing the transistor shown in FIG. This will be explained with reference to FIG.

[0255] As shown in the above-described <Method 1 for manufacturing a semiconductor device> of the second embodiment, the steps of FIG. , an insulating film 53 on a substrate 51, an oxide semiconductor film 54 on the insulating film 53, and an oxide semiconductor film 5 4, an insulating film 56, a buffer film 60 on the insulating film 56, and a conductive film 61 on the buffer film 60 are formed. do.

[0256] Next, as shown in FIG. 9A, an oxide semiconductor film is formed by using the buffer film 60 and the conductive film 61 as a mask. An impurity element 63 is added to the conductive film 54. Here, the impurity element 63 is a rare gas, One or more of uranyl, nitrogen, fluorine, aluminum, and phosphorus are mixed with hydrogen, either simultaneously or separately. As a result of the doping, as shown in FIG. 12(A), a first region 55 to which no impurity element is doped is formed. a and second regions 55b and 55c having an impurity element and hydrogen. In addition, the oxide semiconductor film 55 has a first region 55a and second regions 55b and 55c. 5 can be formed.

[0257] Next, an insulating film 67 having an opening is formed on the insulating film 56, the buffer film 60 and the conductive film 61. Alternatively, an opening may be formed in the insulating film 56, and the second oxide semiconductor film 55 may be formed in the insulating film 56. A part of the regions 55b and 55c may be exposed. Next, a pair of conductive films 68 and 69 are formed. Next, an insulating film 79 may be formed on the insulating film 67 and the pair of conductive films 68 and 69. .

[0258] Through the above steps, the transistor illustrated in FIG. 12A can be manufactured.

[0259] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0260] (Embodiment 4) In the first to third embodiments, the method of adding excess oxygen to the insulating film 53 is as follows: This will be explained using FIG.

[0261] As shown in FIG. 14A, an insulating film 53 is formed on a substrate 51. Next, Next, in the same manner as in the first embodiment, oxygen 82 is added to the buffer film 81. As a result, as shown in FIG. 14B, the insulating film 53a to which oxygen has been added and the insulating film 53b to which oxygen has been added are In this way, a buffer film 83 having an added thickness can be formed.

[0262] The buffer film 81 is formed by appropriately using the same material and the same method as the buffer film 58 shown in the first embodiment. The buffer film 83 is formed in the same manner as the buffer film 59 shown in the first embodiment. .

[0263] After that, the buffer film 83 may be removed as shown in FIG. An oxide semiconductor film may be formed on the insulating film 53a to which Zn is added. In the treatment step, oxygen contained in the insulating film 53a can be moved to the oxide semiconductor film. Thus, the amount of oxygen vacancies in the oxide semiconductor film can be reduced.

[0264] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0265] (Embodiment 5) In this embodiment, a transistor having a structure applicable to any of the first to fourth embodiments will be described. One embodiment of a method for manufacturing a photodiode and a transistor will be described with reference to FIGS. Here, the first embodiment will be used for explanation.

[0266] <Configuration of Semiconductor Device> FIG. 15 shows a top-gate self-aligned transistor as an example of a transistor included in a semiconductor device. 1 is a cross-sectional view of a transistor having a line structure. The transistor is different from the transistor shown in embodiment 1 in that the gate insulating film has a layered structure.

[0267] The transistor illustrated in FIG. 15A includes an oxide semiconductor film 55 and a a gate insulating film that is in contact with the gate insulating film and overlaps with the oxide semiconductor film 55; The gate insulating film includes an insulating film 57 and a buffer film 60. That is, the insulating film 57 is in contact with the oxide semiconductor film 55. The insulating film 57 and the conductive film 61 are provided between the insulating film 57 and the conductive film 61. Alternatively, a separate insulating film may be provided between the insulating film 57 and the buffer film 60. A separate insulating film may be provided between the conductive film 61 and the insulating film 62 .

[0268] As the insulating film 57, the insulating film 57 described in Embodiment 1 can be used as appropriate. The insulating film 57 is made of a material that is unlikely to form a defect level at the interface with the oxide semiconductor film 55. It is preferable to form the

[0269] The buffer film 60 may be the same as that shown in the first embodiment. The buffer film 60 is formed using a material that is etched isotropically. It is preferable to form the

[0270] The other structures are the same as those of the transistor described in Embodiment 1; therefore, the details are not described here. A detailed explanation will be omitted.

[0271] In the transistor according to the present embodiment, the buffer film 60 has a recess on the side surface. Specifically, the buffer film 60 has a narrower region than the conductive film 61. That is, the side surface of the buffer film 60 has an area that is inside a part of the side surface of the conductive film 61.

[0272] The insulating film 57 has a thickness that allows the second regions 55b and 55c to be doped with impurity elements. The thickness of the insulating film 57 is preferably 5 nm or more and 100 nm or less. Alternatively, it can be 10 nm or more and 30 nm or less.

[0273] The buffer film 60 is preferably thick enough to function as a gate insulating film together with the insulating film 57. I wish.

[0274] In the transistor described in this embodiment, the second region included in the oxide semiconductor film 55 The feature is that the electrodes 55b and 55c have an area overlapping a part of the conductive film 61.

[0275] Here, in FIG. 15B to FIG. 15D, 1 is an enlarged cross-sectional view of an oxide semiconductor film 55 and its surroundings.

[0276] As shown in FIG. 15B, a part or the whole of the side surface of the buffer film 60 is in contact with the side surface of the conductive film 61. The insulating film 57 is located on the inner side. Furthermore, the width of the insulating film 57 is narrower than that of the conductive film 61. The second regions 55b and 55c included in the oxide semiconductor film 55 overlap with a part of the conductive film 61. The region can be called an overlap region Lov.

[0277] Alternatively, as shown in FIG. 15C, a part or the whole of the side surface of the buffer film 60 is covered with the conductive film 6 The insulating film 57 is located inside the side surface of the conductive film 61. The second regions 55b and 55c included in the oxide semiconductor film 55 are formed by forming a part of the conductive film 61. and has an overlap region Lov that overlaps with.

[0278] Alternatively, as shown in FIG. 15(D), a part or the whole of the side surface of the buffer film 60 is covered with the conductive film 6 The width of the insulating film 57 is approximately the same as the width of the conductive film 61. The second regions 55b and 55c included in the oxide semiconductor film 55 are formed on one side of the conductive film 61. The portion has an overlap region Lov that overlaps with the portion.

[0279] The length of the overlap region Lov is less than 20% or less than 10% of the channel length L. Preferably, it is less than 5%, or less than 2%.

[0280] The insulating film 57 is made of a material that is unlikely to form a defect level at the interface with the oxide semiconductor film 55. Therefore, the insulating film 57 is in contact with the oxide semiconductor film 55, and thus the oxide The defect level density at the interface between the semiconductor film 55 and the insulating film 57 can be reduced. In addition, the buffer film 60 is made of a material that can be isotropically etched. Therefore, by etching using the conductive film 61 as a mask, a buffer film having a narrower width than the conductive film 61 is formed. The buffer film 60 can be formed by etching in the etching process. The rate may be different from that of the oxide semiconductor film. Thus, the buffer film 60 can be selectively and isotropically etched.

[0281] In addition, since the insulating film 57 is thin, the second regions 55b and 55c are not exposed to each other through the insulating film 57. Furthermore, hydrogen contained in the insulating film 65 can be added to the second insulating film 66. As a result, the second insulating film 57 is formed under the insulating film 57. It is possible to form the regions 55b and 55c.

[0282] In the transistor shown in FIG. 15, the buffer film 60 has a recess on the side surface. When an impurity element is added to the oxide semiconductor film 55 to form oxygen vacancies, Impurity elements also enter the recesses on the side surfaces of the insulating film. Therefore, the impurity element is added to the oxide semiconductor film 55 through the insulating film 57. The oxide semiconductor film 55 has an impurity element added to a region that overlaps with part of the conductive film 61. At the same time, oxygen vacancies are formed.

[0283] In addition, the insulating film 65 having hydrogen is in contact with the region to which the impurity element is added, or Hydrogen contained in the insulating film 65 is absorbed through the insulating film 57 into the oxide semiconductor film 55. The metal element diffuses into the doped region.

[0284] As a result, in the oxide semiconductor film 55, oxygen is introduced into a region that overlaps with part of the conductive film 61. Second regions 55b, 55c having defects and hydrogen are formed.

[0285] That is, in this embodiment, the shape of the buffer film 60 and the insulating film 57 is utilized to form a layer on the oxide semiconductor film. By selectively adding impurity elements or utilizing the shapes of the buffer film 60 and the insulating film 57, By selectively diffusing hydrogen into the oxide semiconductor film, oxygen vacancies are formed in the oxide semiconductor film. The second regions 55b and 55c having hydrogen are selectively formed. However, hydrogen is stable in oxygen vacancies and is not easily released from oxygen vacancies. Therefore, the hydrogen contained in the second regions 55b and 55c is absorbed into the first region 55, which is the channel region. It is difficult for the dopant to diffuse into a, which reduces degradation of the electrical characteristics of the transistor.

[0286] Furthermore, hydrogen enters the oxygen vacancies, forming a donor level near the conduction band, increasing the electrical conductivity. Therefore, the second regions 55b and 55c function as a source region and a drain region. The second regions 55b and 55c overlap with a portion of the conductive film 61. The transistor described in this embodiment has an overlap region Lov. Therefore, a high resistance region is formed between the channel region and the source and drain regions. As a result, the transistor described in this embodiment has a high on-state current. In the transistor, a high resistance region is provided between the channel region and the source region and between the drain region and the In this case, the electrical characteristics of the transistor are likely to deteriorate. The capacitor has an overlap region Lov, so the deterioration of electrical characteristics is small and the reliability is high. .

[0287] In the transistor described in this embodiment, the second regions 55b and 55c are not formed of impurities. The addition of an element forms oxygen vacancies and contains hydrogen. It is possible to reduce the resistivity of 55b and 55c and to separate the transistors It is possible to reduce the variation in resistivity of the second regions 55b and 55c. An impurity element is added to the oxide semiconductor film to form oxygen vacancies, whereby the second region 55b , 55c resistivity control is possible.

[0288] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistor shown in FIG. 15A will be described with reference to FIGS. I will explain this in more detail.

[0289] As in the first embodiment, as shown in FIG. 16(A), an insulating film 53 on a substrate 51 and an insulating An oxide semiconductor film 54 on the film 53, an insulating film 56 on the oxide semiconductor film 54, and Then, oxygen 62 is added to the buffer film 58. As a result, an insulating film More oxygen can be added to 56.

[0290] Here, a silicon oxide film is formed as the insulating film 56, and an ITO film is formed as the buffer film 58. Form.

[0291] In addition, a buffer film 59 formed by adding oxygen to the buffer film 58 is shown in FIG. Next, a conductive film 61 is formed on the buffer film 59.

[0292] Next, as shown in FIG. 16(C), the buffer film 59 is etched using the conductive film 61 as a mask. The buffer film 60 is formed by etching the buffer film 59 in comparison with the insulating film 56. A wet etching method using an etchant with a high etching rate can be used. The etching rate of the buffer film 59 is faster than that of the insulating film 56, and the buffer film 59 is etched isotropically. A dry etching method using an etching gas capable of As a result, it is possible to form the buffer film 60 having recesses on the side surfaces.

[0293] In this case, an aqueous solution containing oxalic acid is used as the etchant, so that the insulating film 56 is left. The buffer film 59 can be selectively etched while maintaining the buffer film 59 in place. As a result, the buffer film 60 having a concave side surface can be formed. It can be formed.

[0294] Next, as shown in FIG. 16(D), the insulating film 56 is etched using the conductive film 61 as a mask. Through the above steps, the insulating film 57 is formed and the oxidized film 58 is formed. In this case, a part of the semiconductor film 54 can be exposed. It is preferable to selectively etch the insulating film 56 without etching the oxide semiconductor film 54. It is preferable to use a dry etching method.

[0295] Next, as in the first embodiment, as shown in FIG. 17(A), The impurity element 63 is added to the oxide semiconductor film 54. As a result, the exposed oxide semiconductor film 54 The oxide semiconductor film 54 is doped with an impurity element through the insulating film 57. The oxide semiconductor is damaged by the addition of the impurity element 63. Defects, typically oxygen vacancies, are formed in the film 54 .

[0296] Next, as in the first embodiment, as shown in FIG. 17(B), the oxide semiconductor film 54 and the insulating A hydrogen-containing insulating film 64 is formed over the film 57 and the conductive film 61 .

[0297] The hydrogen-containing insulating film 64 contains hydrogen. The region to which the impurity element is added is in contact with the insulating film 64 containing hydrogen, whereby the insulating film Hydrogen contained in 64 moves to a region in the oxide semiconductor film 54 to which the impurity element is added. As a result, the first region 55a to which the impurity element is not added and the second region 55b to which the impurity element and hydrogen are added are separated. In this way, the oxide semiconductor film 55 is formed having the second regions 55b and 55c. Hydrogen contained in the insulating film 64 diffuses into part of the oxide semiconductor film 55 through the insulating film 57. As a result, a portion of the second regions 55b and 55c may overlap with the insulating film 57. By this process, the second regions 55b and 55c overlapping a part of the conductive film 61 can be formed. Cut.

[0298] A heat treatment may then be performed to increase the electrical conductivity of the second regions 55b, 55c.

[0299] Next, as shown in FIG. 17(C), a film having an opening is formed on the insulating film 64 having hydrogen. An insulating film that will become the insulating film 67 to be formed later may be formed. Therefore, the parasitic capacitance between the pair of conductive films 68 and 69 and the conductive film 61 can be reduced. Cut.

[0300] Next, similarly to the first embodiment, a part of the insulating film 64 containing hydrogen is etched to form an opening. An insulating film 65 having a portion is formed, and a portion of the second regions 55b and 55c is exposed. Then, the insulating film 67, the pair of conductive films 68, 69 may be formed. An insulating film 79 may be formed on the insulating film 79 .

[0301] Through the above steps, the transistor illustrated in FIG. 15A can be manufactured.

[0302] <Method 2 for manufacturing semiconductor device> A modified method for forming the insulating film 57 and the buffer film 60 will be described.

[0303] As in the first embodiment, as shown in FIG. 18(A), an insulating film 53 on a substrate 51 and an insulating An oxide semiconductor film 54 on the film 53, an insulating film 56 on the oxide semiconductor film 54, and A buffer film 59 and a conductive film 61 on the buffer film 59 are formed.

[0304] Next, as shown in FIG. 18(B), the insulating film 56 and the buffer film 61 are masked with the conductive film 61. The film 59 is etched to form the insulating film 57 and the buffer film 60a.

[0305] In order to increase the yield, the oxide semiconductor film 54 is not etched, and the insulating film 56 and the buffer layer 57 are etched. It is preferable to selectively etch the barrier film 59. For this reason, dry etching is used here. The filtering method is used.

[0306] Next, as shown in FIG. 18(C), the buffer film 60a is etched to form a conductor having a recess on the side surface. A buffer film 60 is formed.

[0307] After that, a transistor is manufactured through the same process as in the above-mentioned <Method 1 for manufacturing a semiconductor device>. It can be manufactured.

[0308] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0309] (Embodiment 6) In this embodiment, the second regions 55b and 55c included in the oxide semiconductor film 55 are formed of oxygen. The fact that the resistivity is reduced by the presence of defects and hydrogen will be explained. The V ions formed in the second regions 55b and 55c included in the compound semiconductor film 55 o Explaining H In this case, oxygen deficiency V o The state where there is a hydrogen atom H ino It is written as H.

[0310] <(1). V o Ease of formation and stability of H> When the oxide semiconductor film (hereinafter referred to as IGZO) is crystalline, H is preferentially During heat treatment at 450°C, H diffuses along the ab plane and the c axis. In this study, we consider the case where IGZO is oxygen-deficient. o If exists, H is oxygen deficiency V o We will explain whether it is easy to enter or not.

[0311] For the calculation, the InGaZnO 4 A crystal model was used, where V o H in H V o The activation barrier (E a ) to NEB (Nud The calculation conditions are shown in Table 1.

[0312] [Table 1]

[0313] In addition, InGaZnO 4 In the crystal model, the metal elements to which oxygen is bonded and the number of Due to the difference, there are oxygen sites 1 to 4 as shown in FIG. Loss V o The calculations were performed for oxygen site 1 and oxygen site 2, which are prone to form

[0314] First, oxygen deficiency V o As oxygen site 1, which is likely to form The calculations were performed for the oxygen sites bonded to the

[0315] The model of the initial state is shown in FIG. 20(A), and the model of the final state is shown in FIG. 20(B). In addition, the calculated activation barrier (E a ) is shown in Figure 21. The initial state here is oxygen vacancy V o There is an H inside (V o H) and the final state is oxygen deficiency V o and an oxygen atom bonded to one Ga atom and two Zn atoms and an H atom bonded to the oxygen atom. It is a structure that has a HO state.

[0316] As a result of the calculation, oxygen deficiency V o It takes about 1.52 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V o It takes about 0.46 eV to enter Energy was needed.

[0317] Here, the calculated activation barrier (E a ) and equation (1), the reaction frequency (Γ) is calculated. In addition, in equation (1), k B is the Boltzmann constant and T is the absolute temperature.

[0318]

number

[0319] Frequency factor ν=10 13 The reaction frequency at 350°C was calculated assuming a reaction rate of 100 / s. The frequency of H transfer from the model shown in A) to the model shown in Figure 20(B) is 5.52 × 10 0 / s. Also, H was transferred from the model shown in FIG. 20(B) to the model shown in FIG. 20(A). The frequency of movement is 1.82 × 10 9 / s. From this, the H diffusing in IGZO is , oxygen vacancy V nearby o There is V o It is easy to form H, and once V o When H is formed, oxygen vacancies occur. V o It is thought that it is difficult to release from

[0320] Next, oxygen deficiency V o The oxygen site 2, which is likely to form a bond with one Ga and two Zn, Calculations were performed for the combined oxygen sites.

[0321] The model of the initial state is shown in FIG. 22(A), and the model of the final state is shown in FIG. 22(B). In addition, the calculated activation barrier (E a ) is shown in Figure 23. The initial state here is oxygen vacancy V o There is an H inside (V o H) and the final state is oxygen deficiency V o and an oxygen atom bonded to one Ga atom and two Zn atoms and an H atom bonded to the oxygen atom. It is a structure that has a HO state.

[0322] As a result of the calculation, oxygen deficiency V o It takes about 1.75 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V o It takes about 0.35 eV to enter Energy was needed.

[0323] In addition, the calculated activation barrier (E a ) and the above equation (1), the reaction frequency (Γ) was calculated.

[0324] Frequency factor ν=10 13 The reaction frequency at 350°C was calculated assuming a reaction rate of 100 / s. The frequency of H transfer from the model shown in A) to the model shown in Figure 22(B) is 7.53 × 10 - 2 / s. Also, the model shown in FIG. 22(B) was changed to the model shown in FIG. 22(A). The movement frequency is 1.44×10 10 / s. From this, V o Form H and oxygen deficiency V o It is thought that H is unlikely to be released from

[0325] From the above, it can be seen that H in IGZO is easily diffused during heat treatment, and oxygen vacancies V o If there is is oxygen deficiency V o Enter V o It was found that it is likely to become H.

[0326] <(2). V o H transition level > Oxygen vacancy in IGZO V o If and H exists, then <(1). V o The formation of H From the calculation using the NEB method shown in the section on Difficulty and Stability, the oxygen vacancy V o and H is V o H Easy to form and V o H is considered stable. Therefore, V o H is a career tracker To investigate whether V o The transition levels of H were calculated.

[0327] InGaZnO was used for the calculation. 4 A crystal model (112 atoms) was used. V for oxygen site 1 and oxygen site 2 o The H model was created and the transition level was calculated. The calculation conditions are shown in Table 2.

[0328] [Table 2]

[0329] By adjusting the mixing ratio of the exchange terms to obtain a band gap close to the experimental value, InGaZnO 4 The band gap of the crystal model is 3.08 eV, which is 3.1 of the experimental value. The result was close to 5 eV.

[0330] The transition level (ε(q / q')) of the model with defect D is calculated by the following formula (2): In addition, ΔE(D q ) is the formation energy of defect D at charge q, and is given by equation (3) It is calculated as follows.

[0331]

number

[0332]

number

[0333] In formula (2) and formula (3), E tot (D q ) is the charge q of the model containing the defect D. The total energy in tot (bulk) is the total energy of the defect-free model, Δn i is the increase or decrease in the number of atoms i related to the defect, μ i is the chemical potential of atom i, ε VBM There is no defect The energy of the top of the valence band in the new model, ΔV q is the correction term for the electrostatic potential , E F is the Fermi energy.

[0334] Calculated V o The transition levels of H are shown in Fig. 24. The values ​​in Fig. 24 indicate the depth from the bottom of the conduction band. From Figure 24, V for oxygen site 1 oThe transition level of H is 0.0 below the conduction band edge. 5 eV, and V for oxygen site 2 o The transition level of H is 0.11e below the conduction band edge. V, so each V o H is thought to be involved in electron trapping. , V o It was revealed that H acts as a donor. o IGZO with H It was revealed that the resistivity is low and the material is conductive.

[0335] <(3) Temperature dependence of resistivity> Here, the resistance of a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film) The temperature dependency of resistivity will be explained with reference to FIG.

[0336] Here, a sample having an oxide conductor film was prepared. The oxide conductor film (OC_SiN x ) In the doping apparatus, argon is added to the oxide semiconductor film, and the silicon nitride film is The oxide conductor film (OC_Ar dope+SiN x ), and In the plasma processing apparatus, the oxide semiconductor film is exposed to argon plasma, and silicon nitride is The oxide conductive film formed by contacting with the film (OC_Ar plasma + SiN x )of The silicon nitride film contains hydrogen.

[0337] Oxide conductive film (OC_SiN x The method for preparing the sample containing the ZnO film is as follows. A silicon oxynitride film with a thickness of 400 nm was formed on the substrate by plasma CVD, and then oxygen was pumped. By exposing the silicon oxynitride film to plasma and adding oxygen ions to it, the film is heated to release oxygen. Next, a silicon oxynitride film that releases oxygen when heated was formed. A sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2 was placed on the silicon film. A 100 nm thick In-Ga-Zn oxide film was formed by the sputtering method used. After heat treatment in a nitrogen atmosphere at 450℃, it was cooled in a nitrogen and oxygen mixed gas atmosphere at 450℃. Next, a silicon nitride film with a thickness of 100 nm was formed by plasma CVD. Next, the sample was heat-treated at 350°C in a mixed gas atmosphere of nitrogen and oxygen.

[0338] Oxide conductor film (OC_Ar doped + SiN x The method for preparing the sample containing A 400 nm thick silicon oxynitride film is formed on a glass substrate by plasma CVD. After the formation of the silicon oxynitride film, it is exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film. A silicon oxynitride film that releases oxygen by heating was formed. On the silicon oxynitride film, a sputtering layer with an atomic ratio of In:Ga:Zn=1:1:1.2 was formed. A 100 nm thick In-Ga-Zn oxide was deposited by sputtering using a 100 nm thick target. The oxide film was then heat-treated in a nitrogen atmosphere at 450°C, and then heated in a nitrogen and oxygen atmosphere at 450°C. The substrate was then heat-treated in a mixed gas atmosphere. Next, the In-Ga-Zn oxide was doped using a doping device. The accelerating voltage was 10 kV and the dose was 5 × 10 14 / cm 2 of argon was added. Next, the In-Ga-Zn oxide film was grown to a thickness of 100 nm by plasma CVD. A silicon nitride film of 100 nm was formed. Next, the substrate was placed in a nitrogen and oxygen mixed gas atmosphere at 350°C. The mixture was heat treated at room temperature.

[0339] Oxide conductive film (OC_Ar plasma + SiN x The preparation method of the sample including A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by plasma CVD. After forming the silicon oxynitride film, it is exposed to oxygen plasma to produce a silicon oxynitride film that releases oxygen when heated. Next, a silicon oxynitride film with an atomic ratio of I was formed on the silicon oxynitride film, which releases oxygen when heated. Sputtering method using a sputtering target of n:Ga:Zn=1:1:1.2 A 100 nm thick In-Ga-Zn oxide film was formed by the above method, and then heated at 450°C in a nitrogen atmosphere. After the heat treatment, the plate was heated at 450°C in a mixed gas atmosphere of nitrogen and oxygen. In the plasma processing device, argon plasma is generated and accelerated argon ions are The oxygen vacancies were created by colliding with the n-Ga-Zn oxide film. A silicon nitride film with a thickness of 100 nm was formed by the CVD method. The heat treatment was carried out in a mixed gas atmosphere.

[0340] Next, the resistivity of each sample was measured and the results are shown in Figure 25. The resistivity was measured using a four-terminal In FIG. 25, the horizontal axis indicates the measurement temperature, and the vertical axis indicates indicates resistivity. Also, the oxide conductor film (OC_SiN x ) measurement results are indicated by square marks, Oxide conductor film (OC_Ar doped + SiN x The measurement results of oxide conductors are shown with circles. Electrical film (OC_Ar plasma+SiN x ) The measurement results are indicated by triangles.

[0341] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it is considered that the oxide conductor film has a higher resistivity than the oxide semiconductor film. It is clear that it is low.

[0342] As can be seen from FIG. 25, the oxide conductor film (OC_Ar doped+SiN x ) and Oxide conductive film (OC_Ar plasma + SiN x ) containing oxygen vacancies and hydrogen In this case, the resistivity fluctuation is small. Typically, the resistivity The fluctuation rate is less than plus or minus 20%. Or, between 150K and 250K. The variation in resistivity is less than ±10%. It is a semiconductor, and it is presumed that the conduction band edge and the Fermi level coincide or almost coincide. Therefore, the oxide conductor film is used as the source and drain regions of a transistor. As a result, the oxide conductor film is in contact with the conductive film that functions as the source electrode and the drain electrode. It forms an ohmic contact with the oxide conductor film and functions as a source electrode and a drain electrode. The contact resistance with the conductive film can be reduced. In addition, the resistivity of the oxide conductor has low temperature dependence. The contact resistance between the oxide conductor film and the conductive film functioning as the source electrode and the drain electrode is It is possible to manufacture a highly reliable transistor with little variation.

[0343] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0344] (Embodiment 7) The configuration of a gate electrode applicable to the first to sixth embodiments will be described with reference to FIG. He explains.

[0345] In this embodiment, similarly to the second regions 55b and 55c included in the oxide semiconductor film 55, Alternatively, the conductive film 61 may be formed using a conductive oxide semiconductor film (see FIG. 26). Since the conductive oxide semiconductor film has a light-transmitting property like the oxide semiconductor film 55, A light-transmitting transistor can be manufactured.

[0346] Note that a conductive oxide semiconductor film has a higher resistivity than a conductive film formed of a metal. Therefore, when a large-area substrate is used as the substrate 51, the conductive film 77 connected to the conductive film 61 It is preferable to provide the insulating film 67 on the insulating film 67 .

[0347] A manufacturing method of the transistor shown in FIG. 26 will be described with reference to FIGS.

[0348] In the step of FIG. 3C, an oxide semiconductor film is formed instead of the conductive film 61.

[0349] Next, as shown in FIG. 4A, after forming an insulating film 57, the oxide semiconductor film 54 and An impurity element 63 is added to the oxide semiconductor film over the insulating film 57 .

[0350] Next, as shown in FIG. 4B, an insulating film 64 containing hydrogen is formed, so that the oxide semiconductor Similar to the second regions 55b and 55c included in the conductive film 55, the conductive film 61 (see FIG. 26) can be formed.

[0351] Next, after forming an insulating film 67 having an opening, a pair of conductive films 68 and 69 are formed. Next, after forming an insulating film 79 having an opening, the pair of conductive films 68 and 69 are Using this, a conductive film 77 (see FIG. 26) connected to the conductive film 61 is produced.

[0352] Through the above steps, a transistor having a self-aligned structure can be manufactured.

[0353] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0354] (Embodiment 8) In this embodiment, a structure of an oxide semiconductor film that can be applied to the above-described embodiment will be described. Description will be given with reference to FIG. 27. Note that the description will be given here using the transistor described in Embodiment 1. It will be apparent that this embodiment mode can be applied to the transistors shown in the previous embodiment modes as appropriate. It is possible.

[0355] The transistor illustrated in FIG. 27A is the same as the transistor illustrated in FIG. 1A of Embodiment 1. The structure is the same, but the structure of the oxide semiconductor film 55 is different. An enlarged view of region 71 is shown in Figures 27(B) to 27(D).

[0356] As shown in FIG. 27B, the oxide semiconductor film 55 is a first oxide semiconductor film in contact with the insulating film 53. The semiconductor film 55_1 and the second oxide semiconductor film 55_1 are in contact with the insulating film 57. The semiconductor film 55_2 is a compound semiconductor film.

[0357] Alternatively, as shown in FIG. 27C, the oxide semiconductor film 55 is a second insulating film 53 in contact with the oxide semiconductor film 55. The first oxide semiconductor film 55_2 is in contact with the second oxide semiconductor film 55_2 and the insulating film 57. The third oxide semiconductor film 55_3 is included.

[0358] Alternatively, as shown in FIG. 27D, the oxide semiconductor film 55 is formed on the first insulating film 53. The first oxide semiconductor film 55_1 and the second oxide semiconductor film 55_2 in contact with each other. The third oxide semiconductor film 55_2 is in contact with the second oxide semiconductor film 55_2 and the insulating film 57. It has a semiconductor film 55_3.

[0359] The first oxide semiconductor film 55_1, the second oxide semiconductor film 55_2, and the third oxide semiconductor film 55_3 The semiconductor film 55_3 is an In-M-Zn oxide (wherein M is Al, Ti, Ga, Y, Zr, Sn, L a, Ce, Nd or Hf), the first oxide semiconductor film 55_1 and the third oxide The semiconductor film 55_3 is In:M:Zn=x 1 :y 1 :z 1 [Atomic ratio], second oxide semiconductor Membrane 55_2 is In:M:Zn=x 2 :y 2 :z 2 [Atomic ratio], y 1 / x 1 but y 2 / x 2 preferably greater than y 1 / x 1 y 2 / x 2 More than 1.5 times higher than More preferably, y 1 / x 1 y 2 / x 2 More preferably, it is at least twice as large as , y 1 / x 1 y 2 / x 2 At this time, the first oxide semiconductor film 55 In the third oxide semiconductor film 55_3, y 1 x 1 If that is the case, the second Since the oxide semiconductor film 55_2 can have stable electrical characteristics, it is preferable to use the oxide semiconductor film 55_2. On the other hand, y 1 x 1 When the second oxide semiconductor film 55_2 is used, This reduces the field effect mobility of the transistors that have been 1 x 1 is less than three times This is preferable.

[0360] The second oxide semiconductor film 55_2 is an In-M-Zn oxide (M is Ga, Y, Zr, La In the case of the second oxide semiconductor film 55_2, the second oxide semiconductor film 55_2 is formed using the first oxide semiconductor film 55_2. In the target, the atomic ratio of metal elements is In:M:Zn=x 1 :y 1 :z 1 So, 、 x 1 / y 1 is 1 / 3 or more and 6 or less, and further 1 or more and 6 or less, and z 1 / y 1 is 1 / It is preferably 3 or more and 6 or less, and more preferably 1 or more and 6 or less. 1 / y 1 1 or more 6 or less, a CAAC-OS film is formed as the second oxide semiconductor film 55_2. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1: 1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:1.5, In:M :Zn=2:1:2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, etc. There is.

[0361] The first oxide semiconductor film 55_1 and the third oxide semiconductor film 55_3 are In-M-Zn In the case of an oxide (M is Ga, Y, Zr, La, Ce, or Nd), a first oxide semiconductor In the target used for depositing the film 55_1 and the third oxide semiconductor film 55_3, The atomic ratio of metal elements is In:M:Zn=x 2 :y 2 :z 2 So, 、 x 2 / y 2 < x 1 / y 1 Where z 2 / y 2 is between 1 / 3 and 6, or between 1 and 6. It is preferable that z 2 / y 2 By setting the value of the first oxide semiconductor film 5 to 1 or more and 6 or less, The CAAC-OS film is easily formed as the oxide semiconductor film 5_1 and the third oxide semiconductor film 55_3. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1:3:2. In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3: 8, In:M:Zn=1:4:3, In:M:Zn=1:4:4, In:M:Zn=1: 4:5, In:M:Zn=1:4:6, In:M:Zn=1:6:3, In:M:Zn= 1:6:4, In:M:Zn=1:6:5, In:M:Zn=1:6:6, In:M:Z Examples include n=1:6:7, In:M:Zn=1:6:8, In:M:Zn=1:6:9, etc.

[0362] Note that the first oxide semiconductor film 55_1, the second oxide semiconductor film 55_2, and the third oxide semiconductor film The atomic ratio of the compound semiconductor film 55_3 is plus or minus the above atomic ratio as an error. Includes a 40% fluctuation.

[0363] The atomic ratio is not limited to these, and an appropriate atomic ratio may be selected according to the required semiconductor characteristics. Just use what you have.

[0364] In addition, the first oxide semiconductor film 55_1 and / or the third oxide semiconductor film 55_3 The first oxide semiconductor film 55_1 and the second oxide semiconductor film 55_2 can be formed using gallium oxide. When gallium oxide is used for the first and second oxide semiconductor films 55_3, It is possible to reduce the leakage current.

[0365] In FIG. 27D, the first oxide semiconductor film 55_1 and the third oxide semiconductor For example, the first oxide semiconductor film 55_1 and the third oxide semiconductor film 55_3 may have the same composition. The oxide semiconductor film 55_3 is formed of In:Ga:Zn=1:3:2, 1:3:4, or 1: An In-Ga-Zn oxide having an atomic ratio of 4:5 may be used.

[0366] Alternatively, in FIG. 27D, the first oxide semiconductor film 55_1 and the third oxide semiconductor film The conductive film 55_3 may have a different composition. For example, the first oxide semiconductor film 55_1 may have a different composition. The third oxide was prepared by using In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:3:2. The compound semiconductor film 55_3 is a semiconductor having an atomic ratio of In:Ga:Zn=1:3:4 or 1:4:5. In-Ga-Zn oxide may also be used.

[0367] The first oxide semiconductor film 55_1 and the third oxide semiconductor film 55_3 each have a thickness of 3 nm. The thickness of the second oxide semiconductor film is set to be greater than or equal to 100 nm, preferably greater than or equal to 3 nm and less than or equal to 50 nm. The thickness of 55_2 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, The thickness of the first oxide semiconductor film 55_1 is more preferably 3 nm or more and 50 nm or less. and the third oxide semiconductor film 55_3 are each thicker than the second oxide semiconductor film 55_2. By thinning the film, it is possible to reduce the amount of variation in the threshold voltage of the transistor. In addition, oxygen contained in the third oxide semiconductor film 55_3 diffuses into the pair of conductive films 68 and 69. In order to prevent the pair of conductive films 68 and 69 from being oxidized, the third oxide semiconductor film 55_3 is A thinner thickness is preferable.

[0368] The first oxide semiconductor film 55_1, the second oxide semiconductor film 55_2, and the third oxide semiconductor film 55_3 The interfaces of the semiconductor films 55_3 are It can be observed using ion electron microscopy.

[0369] The first oxide semiconductor film 55_1, the second oxide semiconductor film 55_2, and the third oxide semiconductor film 55_3 The semiconductor film 55_3 can have the crystal structure of the oxide semiconductor film 55 described in Embodiment 1 as appropriate. This can be done.

[0370] The second oxide semiconductor film is formed by forming an oxide semiconductor film which is less likely to have oxygen vacancies than the second oxide semiconductor film 55_2. By providing the second oxide semiconductor film 55_2 in contact with the upper and / or lower portions of the oxide semiconductor film 55_2, The oxygen vacancies in the conductive film 55_2 can be reduced. The second oxide semiconductor film 55_2 is a first oxide semiconductor film having one or more metal elements constituting the second oxide semiconductor film 55_2. In order to be in contact with the oxide semiconductor film 55_1 and / or the third oxide semiconductor film 55_3, The interface between the first oxide semiconductor film 55_1 and the second oxide semiconductor film 55_2, The interface state density at the interface between the conductive film 55_2 and the third oxide semiconductor film 55_3 is extremely Therefore, oxygen vacancies in the second oxide semiconductor film 55_2 can be reduced. It is Noh.

[0371] In addition, the second oxide semiconductor film 55_2 may be an insulating film having a different constituent element (e.g., silicon oxide). When the gate insulating film (including the silicon film) comes into contact with the silicon substrate, an interface state is formed, and the interface state In such a case, a second transistor with a different threshold voltage appears. This can cause the apparent threshold voltage of the transistor to fluctuate. The first oxide semiconductor film 52 includes one or more metal elements constituting the oxide semiconductor film 55_2. Since the oxide semiconductor film 5_1 is in contact with the second oxide semiconductor film 55_2, the first oxide semiconductor film 55_1 and An interface state is less likely to be formed at the interface of the second oxide semiconductor film 55_2. By providing the semiconductor film 55_1, the electrical characteristics such as the threshold voltage of the transistor can be controlled. The variation can be reduced.

[0372] In addition, when a channel is formed at the interface between the insulating film 57 and the second oxide semiconductor film 55_2, In this case, interface scattering occurs at the interface, and the field effect mobility of the transistor decreases. The second oxide semiconductor film 55_2 is formed of a third oxide semiconductor film containing one or more metal elements. Since the oxide semiconductor film 55_3 is provided in contact with the second oxide semiconductor film 55_2, At the interface between the conductive film 55_2 and the third oxide semiconductor film 55_3, scattering of carriers is unlikely to occur. In particular, the field effect mobility of the transistor can be increased.

[0373] The first oxide semiconductor film 55_1 and the third oxide semiconductor film 55_3 are insulating films. The constituent elements of the insulating film 53 and the insulating film 57 are mixed into the second oxide semiconductor film 55_2 and become impurities. It also functions as a barrier film for suppressing the formation of a level due to the above.

[0374] For example, when the insulating film 53 and the insulating film 57 contain silicon, the insulating film 53 and the insulating film 57 Silicon in the film 57 or carbon that may be mixed into the insulating film 53 and the insulating film 57 is from the interface into the first oxide semiconductor film 55_1 and / or the third oxide semiconductor film 55_3. Impurities such as silicon and carbon may be mixed into the second oxide semiconductor film to a thickness of several nm. When it enters 55_2, it forms an impurity level, which becomes a donor and generates an electron. This can sometimes result in n-type conversion.

[0375] However, the first oxide semiconductor film 55_1 and the third oxide semiconductor film 55_3 If the film thickness is more than a few nm, impurities such as silicon and carbon may be mixed into the second oxide semiconductor. Since the impurity does not reach the body film 55_2, the influence of the impurity level is reduced.

[0376] From the above, the transistor described in this embodiment has the following electrical characteristics, such as a threshold voltage: This is a transistor with reduced variation.

[0377] <Band structure> Next, as a typical example of the transistor described in this embodiment, a transistor shown in FIG. The band structure in an arbitrary cross section of the sta- tor will be described. An enlarged view of the enclosed area 71a is shown in FIG. 28(B), and an enlarged view of the enclosed area 71b is shown in FIG. is shown in FIG. 28(C), and an enlarged view of the area 71c surrounded by the dashed line is shown in FIG. 28(D). The transistor shown in FIG. 28A includes a first region 55a, second regions 55b and 55c. 28B, the first region 55 a indicates that the first region 55_2a and the first region 55_3a are in contact with the insulating film 53 and the insulating film 5 7. Also, as shown in FIG. 28(C), the second region 55b is The first region 55_2b and the second region 55_3b are the insulating film 53 and the insulating film 65 having hydrogen. As shown in FIG. 28(D), the second region 55c is 55_2c and the second region 55_3c are the insulating film 53 and the insulating film 65 having hydrogen. It is placed between.

[0378] FIG. 28(E) shows an OP cross section including the channel region of the transistor shown in FIG. 28(A). The band structure in the first region 55_3a is larger than that in the first region 55_2a. The energy gap is slightly larger than that of the first insulating film 53 and the second insulating film 57. The energy gap is sufficiently larger than that of the region 55_2a and the first region 55_3a. In addition, the first region 55_2a, the first region 55_3a, the insulating film 53, and the insulating film 5 The Fermi level of 7 (denoted as Ef) is the intrinsic Fermi level of each The work function of the conductive film 61 is set to the same position as the Fermi level. The energy at the bottom of the conduction band is denoted as Ec, and the energy at the top of the valence band is denoted as Ev. Please write down.

[0379] When the gate voltage is set to be equal to or higher than the threshold voltage of the transistor, the first region 55_2a and the Due to the difference in the energy of the conduction band minimum between the first region 55_3a and the second region 55_4a, the electrons are That is, it is assumed that the electrons are embedded in the first region 55_2a. It is possible.

[0380] Therefore, the transistor according to one embodiment of the present invention has an interface scattering caused by the embedding of electrons. Therefore, the transistor according to one embodiment of the present invention has a channel region The resistance in this region is small.

[0381] Next, in FIG. 28(F), the source region or drain region of the transistor shown in FIG. The band structure in the QR cross section including the second region 55_2b, 55_ 2c, the second regions 55_3b and 55_3c are in a degenerated state. In 2b, the energy of the conduction band minimum is approximately the same as the Fermi level of the first region 55_2a. In the second region 55_3b, the energy of the conduction band minimum is set to be The Fermi level of the second region 55_2c and the second region 55_ The same is true for 3c.

[0382] At this time, since the energy barrier between the conductive film 68 and the second region 55_3b is sufficiently small, Therefore, an ohmic contact is formed. Similarly, the conductive film 69 and the second region 55_3c are in ohmic contact. Since the ohmic contact is achieved because the ohmic barrier is sufficiently small, the second region 55_3c and the second Therefore, the conductive film 68 and the conductive film 6 9, and the first region 55_2a and the first region 55_3a, the exchange of electrons is smooth. It can be seen that this is done smoothly.

[0383] As described above, the transistor according to one embodiment of the present invention has a source electrode and a drain electrode. Since electrons are exchanged smoothly between the gate electrode and the channel region, In other words, it is a transistor with excellent switching characteristics. It turns out to be a Zysta.

[0384] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0385] (Embodiment 9) In this embodiment, a structure of a transistor applicable to the above-described embodiment will be described with reference to FIG. Note that the following description will be given using the transistor described in Embodiment 1. However, this embodiment mode can be applied to the transistors shown in the previous embodiment modes as appropriate. FIG. 29A is a cross-sectional view of a transistor in the channel length direction. 9(B) is a cross-sectional view in the channel width direction of the transistor.

[0386] In the transistor described in this embodiment, as shown in FIG. 29, an oxide It is characterized by having a gate electrode 73 overlapping the semiconductor film 55 .

[0387] By setting the potential of the gate electrode 73 to a potential different from that of the conductive film 61, the threshold voltage of the transistor is It is possible to control the voltage value and fabricate a normally-off transistor. Alternatively, as shown in FIG. 29(B), an opening formed in the insulating film 53 and the insulating film 57 may be formed. At the opening, the conductive film 61 and the gate electrode 73 are connected to each other, so that the gate electrode 73 The potential of the conductive film 61 can be set to the same potential as that of the conductive film 62, and the on-state current of the transistor can be increased. It is possible to do this.

[0388] The other structures are the same as those of the transistor described in Embodiment 1; therefore, the details are not described here. A detailed explanation will be omitted.

[0389] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0390] (Embodiment 10) In this embodiment, the details of an oxide semiconductor that can be used in the above-described embodiments will be described below. This is explained below.

[0391] <Structure of oxide semiconductor> The structure of an oxide semiconductor will be described below.

[0392] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous l Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, etc.

[0393] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductor, and nc-OS.

[0394] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. In other words, it is a structure that has discrete order but does not have long-range order.

[0395] On the other hand, in the case of an essentially stable oxide semiconductor, In addition, it cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor, which is not amorphous (for example, has a periodic structure in a microscopic region), is transformed into a completely amorphous oxide. However, a-like OS is a semiconductor that can be used in a small area. Although it has a periodic structure, it has voids and is an unstable structure. In terms of physical properties, it can be said that the semiconductor is close to an amorphous oxide semiconductor.

[0396] <caac-os> First, let me explain about CAAC-OS.

[0397] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0398] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0399] The following describes the CAAC-OS observed by TEM. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0400] An enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 30(A) is shown in Figure 30(B). From Figure 30(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0401] As shown in FIG. 30(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of a single pellet can be 1 nm or more, or 3 nm or more. It can be seen that the size of the gap caused by the inclination between the plate and the pellet is about 0.8 nm. Therefore, the pellets can also be called nanocrystals (nc). CAAC-OS is also used as a C-Axis Aligned Nanoclip The semiconductor may also be referred to as an oxide semiconductor having metal ions.

[0402] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 30(D)). Between the pellets observed in FIG. 30(C), The portion where the inclination occurs corresponds to the area 5161 shown in FIG.

[0403] FIG. 31(A) shows the C 31(A) shows the s-corrected high-resolution TEM images of regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 31(B), Fig. 31(C) and Fig. 31(D), respectively. As shown in Figure 31(D), Figure 31(B), Figure 31(C) and Figure 31(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0404] Next, C was analyzed by X-ray diffraction (XRD). AAC-OS will be explained. For example, InGaZnO 4 CAAC-O When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 32(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. ZnO 4 Since the crystal orientation of CAAC-OS is attributed to the (009) plane of the crystal, it is considered that the crystal orientation of CAAC-OS is c-axis oriented. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0405] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0406] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I nGaZnO 4 In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in FIG. In contrast, InGaZnO 4 In the case of a single crystal oxide semiconductor, 2θ is fixed to about 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 32(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0407] Next, we will explain the CAAC-OS analyzed by electron diffraction. ZnO 4 For CAAC-OS with a crystal of 300 nm, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO 4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in FIG. 3(B), a ring-shaped diffraction pattern is confirmed. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. The first ring in FIG. 33(B) is made of InGaZnO 4 The (010) face of the crystal This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0408] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0409] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0410] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps and In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0411] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than 100 Such an oxide semiconductor can be a high-purity intrinsic or The CAAC-OS is essentially a high-purity intrinsic oxide semiconductor. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0412] <nc-os> Next, we will explain nc-OS.

[0413] In the high-resolution TEM image, the nc-OS is divided into two regions: one where the crystals can be confirmed, and the other where the clear The crystalline parts in nc-OS are In most cases, the size is between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible in the pellets of CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0414] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, the nc-OS may be a pellet with a larger diameter than the pellet. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, the probe diameter is larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction was performed on nc-OS, high brightness regions were observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. There may be cases where this occurs.

[0415] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0416] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0417] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0418] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen, and areas where crystals can be seen. and areas where it is not possible to

[0419] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0420] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0421] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0422] The determination of which part is regarded as one crystal part can be made as follows. For example, , InGaZnO 4 The unit cell of the crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the InGaZnO 4 The crystal part of The lattice fringes can be seen as 4 This corresponds to the ab plane of the crystal.

[0423] Figure 34 shows an example of the average size of the crystal parts (22 to 45 places) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 34, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Fig. 34, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0424] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0425] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0426] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, Single-crystal InGaZnO with a rhombohedral crystal structure 4 The density of is 6.357g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0427] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be used in any ratio. By combining single crystals of the desired composition, the density equivalent to that of a single crystal of the desired composition can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0428] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0429] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0430] (Embodiment 11) In this embodiment, the configuration of the input / output device of one embodiment of the present invention will be described with reference to FIGS. The input / output device can also be called a touch panel.

[0431] 35(A) and (B) are projection views illustrating the structure of an input / output device of one embodiment of the present invention.

[0432] FIG. 35A is a projection diagram of an input / output device 500 according to one embodiment of the present invention, and FIG. 10 is a projection diagram illustrating a configuration of a detection unit 10U included in an output device 500. FIG.

[0433] 36A to 36C are cross-sectional views illustrating a structure of an input / output device 500 of one embodiment of the present invention. It is.

[0434] FIG. 36A illustrates a Z1-Z2 input / output device 500 according to one embodiment of the present invention illustrated in FIG. FIG.

[0435] <Example of I / O device configuration> The input / output device 500 described in this embodiment has a window portion 14 that transmits visible light, and A plurality of detection units 10U are arranged in a matrix, and in the row direction (indicated by arrow R in the figure), A scanning line G1 electrically connects the multiple detection units 10U arranged in the row direction (arrows in the figure) A signal line DL electrically connecting the multiple detection units 10U arranged in the In addition, a flexible base material 16 that supports the detection unit 10U, the scanning line G1, and the signal line DL is A flexible input device 100 having a plurality of input devices arranged in a matrix shape and overlapping the window portion 14. A display unit 50 includes pixels 502 and a flexible second substrate 510 supporting the pixels 502. 1 (see FIG. 35(A) to FIG. 35(C)).

[0436] The detection unit 10U is electrically connected to the detection element C that overlaps the window portion 14. The sensor includes a detection circuit 19 (see FIG. 35(B)).

[0437] The sensing element C includes an insulating film 13, a first electrode 11 and a second electrode 12 sandwiching the insulating film 13. 2 (see Figure 36(A)).

[0438] The detection circuit 19 is supplied with a selection signal and generates a detection signal based on the change in capacitance of the detection element C. Supply DATA.

[0439] The scanning line G1 can supply a selection signal, and the signal line DL can supply a detection signal DATA. The detection circuit 19 can be disposed so as to overlap the gaps between the windows 14.

[0440] The input / output device 500 described in this embodiment includes a detection unit 10U and a detection unit A colored film is provided between the pixels 502 that overlap the window portions 14 of the unit 10U.

[0441] The input / output device 500 described in this embodiment is a detector having a window 14 that transmits visible light. A flexible input device 100 having a plurality of sensing units 10U and a pixel 502 overlapping a window portion 14. and a flexible display unit 501 having a plurality of windows 14 and pixels 502. It is composed of:

[0442] In this way, the input / output device can detect a change in capacitance and provide a detection signal to the detection unit. and displaying image information associated with the position information of the detection unit. As a result, a novel device with excellent convenience and reliability can be obtained. It is possible to provide an input / output device.

[0443] The input / output device 500 is a flexible device that receives the signal provided by the input device 100. A substrate FPC1 or / and a flexible substrate for supplying a signal including image information to the display unit 501 The substrate FPC2 may be provided.

[0444] In addition, a protective film 17p and / or an input / output The power device 500 may be provided with an anti-reflection coating 567p that reduces the intensity of reflected external light.

[0445] The input / output device 500 also includes a scanning line drive circuit for supplying a selection signal to the operation line of the display unit 501. The line 503g is electrically connected to the wiring 511 that supplies signals and the flexible substrate FPC2. The input terminal 519 is connected to the input terminal 519.

[0446] The individual elements constituting the input / output device 500 will be described below. The components cannot be clearly separated, and one component may serve as another or may contain a part of another. There is.

[0447] For example, the input device 100 having a colored film at a position overlapping the multiple window portions 14 is 00 as well as a color filter.

[0448] In addition, for example, an input / output device 500 in which the input device 100 is superimposed on a display unit 501 is an input device. The device 100 also serves as a display unit 501.

[0449] <Overall composition> The input / output device 500 includes the input device 100 and a display unit 501 (see FIG. 35(A)). (see).

[0450] <Input device 100> The input device 100 includes a plurality of detection units 10U and a flexible base for supporting the detection units. For example, a plurality of detection units 10U can be arranged in a matrix of 40 rows and 15 columns. It is disposed on a flexible substrate 16 .

[0451] <Window 14, colored film and light-shielding film BM> The window 14 transmits visible light.

[0452] A colored film that transmits light of a predetermined color is provided at a position overlapping the window portion 14. For example, Transparent colored film CFB, green light transparent colored film CFG or red light transparent colored It is provided with a membrane CFR (see FIG. 35(B)).

[0453] In addition to blue, green and / or red, a colored film that transmits white light or a yellow The light source may be provided with a colored film that transmits light of various colors, such as a colored film that transmits light of various colors.

[0454] The colored film may be made of a metal material, a pigment, a dye, or the like.

[0455] A light-shielding film BM is provided so as to surround the window portion 14. The light-shielding film BM is less likely to transmit light than the window portion 14. stomach.

[0456] Light shielding for carbon black, metal oxides, and composite oxides including solid solutions of multiple metal oxides It can be used for membrane BM.

[0457] The scanning line G1, the signal line DL, the wiring VPI, the wiring RES, and the wiring A line VRES and a detection circuit 19 are provided.

[0458] In addition, a light-transmitting overcoat film that covers the colored film and the light-shielding film BM may be provided. .

[0459] <Detection element C> The sensing element C has a first electrode 11, a second electrode 12, and a pair of electrodes 2, an insulating film 13 is provided between the first and second electrodes (see FIG. 36(A)).

[0460] The first electrode 11 is formed, for example, in an island shape so as to be separated from other regions. The output device 500 may be configured to output a signal having the same characteristics as the first electrode 11 so that the first electrode 11 cannot be identified by a user of the output device 500. In this case, a configuration in which a layer that can be produced by the process of is disposed adjacent to the first electrode 11 is preferable. More preferably, the first electrode 11 and the layer adjacent to the first electrode 11 are disposed in the gap. It is preferable to minimize the number of windows 14 placed in the gap. A configuration without such a configuration is preferred.

[0461] A second electrode 12 is provided so as to overlap the first electrode 11. 2, an insulating film 13 is provided between the first and second electrodes.

[0462] For example, the first electrode 11 or the second electrode 12 of the sensing element C placed in the atmosphere is When an object with a different dielectric constant approaches, the capacitance of the sensing element C changes. When an object such as a smear approaches the sensing element C, the capacitance of the sensing element C changes. It can be used as a sensor.

[0463] For example, the capacitance of the sensing element C, which can be deformed, changes with deformation.

[0464] Specifically, when an object such as a finger touches the sensing element C, the first electrode 11 and the second electrode When the distance between the electrodes 12 becomes narrower, the capacitance of the sensing element C becomes larger. can be used.

[0465] Specifically, the detection element C is bent to separate the first electrode 11 and the second electrode 12. The spacing becomes narrower. This increases the capacitance of the sensing element C. This makes the bending detector can be used.

[0466] The first electrode 11 and the second electrode 12 include a conductive material.

[0467] For example, inorganic conductive materials, organic conductive materials, metals, conductive ceramics, etc. The first electrode 11 and the second electrode 12 can be used.

[0468] Specifically, aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten a metal element selected from the group consisting of tin, nickel, silver and manganese; An alloy or an alloy combining the above-mentioned metal elements can be used. It is preferable that the thickness is such that the light can be transmitted through the film.

[0469] Or indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, gallium Conductive oxides such as zinc oxide doped with sodium can be used.

[0470] Alternatively, graphene or graphite can be used. The graphene-containing film is For example, the graphene oxide film may be reduced. The reduction method may include a method of applying heat or a method of using a reducing agent.

[0471] Alternatively, a conductive polymer can be used.

[0472] <Detection circuit 19> The detection circuit 19 includes, for example, transistors M1 to M3. 19 includes wiring for supplying a power supply potential and a signal. For example, the signal line DL, the wiring VPI, The detection circuit 19 includes a line CS, a scanning line G1, a wiring RES, a wiring VRES, etc. The specific configuration will be described in detail in embodiment 12.

[0473] The detection circuit 19 may be disposed in an area that does not overlap the window portion 14. For example, By arranging the wiring in an area that does not overlap with the input device 100, This makes it easier to see what is inside.

[0474] For example, transistors M1 to M2 that can be formed in the same process are It can be used for transistor M3.

[0475] The transistor M1 has a semiconductor film. For example, a Group 4 element, a compound semiconductor, or an oxide Semiconductors containing silicon, gallium, etc. can be used for the semiconductor film. A semiconductor containing indium arsenic or an oxide semiconductor containing indium can be used. The transistor M1 can be any of the transistors described in the above embodiments.

[0476] A conductive material can be applied to the wiring.

[0477] For example, inorganic conductive materials, organic conductive materials, metals, conductive ceramics, etc. Specifically, it can be used for the first electrode 11 and the second electrode 12. The same materials can be applied as those that can be used for the

[0478] Aluminum, gold, platinum, silver, nickel, titanium, tungsten, chromium, molybdenum Metallic materials such as iron, cobalt, copper, or palladium, or alloy materials containing such metallic materials, It can be used for the inspection line G1, the signal line DL, the wiring VPI, the wiring RES and the wiring VRES. do.

[0479] The film formed on the substrate 16 may be processed to form a detection circuit 19 on the substrate 16 .

[0480] Alternatively, the detection circuit 19 formed on another substrate may be transferred to the substrate 16 .

[0481] <Base material 16> The flexible substrate 16 may be made of organic, inorganic, or a composite of organic and inorganic materials. It is possible.

[0482] 5 μm or more and 2500 μm or less, preferably 5 μm or more and 680 μm or less, more preferably 5 μm or more and 170 μm or less, more preferably 5 μm or more and 45 μm or less, more preferably 8 A material having a thickness of 25 μm or more can be used for the substrate 16 .

[0483] In addition, a material that is suppressed from permeating impurities can be suitably used for the substrate 16. For example, , water vapor transmission rate is 10 -5 g / (m 2 ·day) or less, preferably 10 -6 g / (m 2 .day) or less can be suitably used.

[0484] In addition, it is preferable to use materials having approximately the same linear expansion coefficient for the substrate 16 and the substrate 510. For example, if the linear expansion coefficient is 1×10 -3 / K or less, preferably 5×10 -5 / K or less, More preferably, 1×10 -5 A material having a viscosity of 0.1 to 1.0 μm may be preferably used.

[0485] For example, an organic material such as a resin, a resin film, or a plastic film is applied to the substrate 16. It can be used.

[0486] For example, inorganic materials such as metal plates or thin glass plates with a thickness of 10 μm to 50 μm can be used for the substrate 16.

[0487] For example, a metal plate, a thin glass plate, or a film of an inorganic material is covered with a resin film. A composite material formed by bonding a plastic or the like can be used for the substrate 16.

[0488] For example, fibrous or particulate metal, glass or inorganic material is mixed with resin or resin filler. A composite material dispersed in a rubber can be used for the substrate 16.

[0489] For example, a thermosetting resin or an ultraviolet curing resin can be used for the resin film.

[0490] Specifically, polyester, polyolefin, polyamide, polyimide, polycarbonate For example, a resin film or plate made of a resin such as polystyrene or acrylic resin can be used.

[0491] Specifically, non-alkali glass, soda-lime glass, potash glass or crystal glass Russ etc. can be used.

[0492] Specifically, a metal oxide film, a metal nitride film, a metal oxynitride film, or the like can be used. For example, silicon oxide, silicon nitride, silicon oxynitride, alumina film, etc. can be used. do.

[0493] Specifically, stainless steel or aluminum with an opening is used. This can be done.

[0494] Specifically, resins having acrylic, urethane, epoxy, or siloxane bonds, etc. The following resins can be used.

[0495] For example, a flexible substrate 16b, a barrier film 16a for preventing the diffusion of impurities, and a substrate 16b are The laminated body including the barrier film 16a and the resin film 16b is then laminated on the substrate 1. 6 (see FIG. 36(A)).

[0496] Specifically, a 600 nm silicon oxynitride film and a 200 nm silicon nitride film A film including a laminated material in which the above are laminated can be used as the barrier film 16a.

[0497] Specifically, a silicon oxynitride film having a thickness of 600 nm and a silicon nitride film having a thickness of 200 nm are , a silicon oxynitride film having a thickness of 200 nm, a silicon nitride oxide film having a thickness of 140 nm, and A film containing a laminated material in which a 100 nm thick silicon oxynitride film is laminated in this order is called a barrier film. Can be used for 16a.

[0498] Polyester, polyolefin, polyamide, polyimide, polycarbonate or A resin film such as an acrylic resin, a resin plate, a laminate, or the like can be used for the base material 16b. do.

[0499] For example, polyester, polyolefin, polyamide (nylon, aramid, etc.), poly Imide, polycarbonate or acrylic, urethane, epoxy or siloxane bonds A material containing a resin having the above structure can be used for the resin film 16c.

[0500] <Protective base material 17, protective film 17p> A flexible protective substrate 17 and / or a protective film 17p may be provided. The protective substrate 17 or the protective film 17p protects the input device 100 by preventing scratches.

[0501] For example, polyester, polyolefin, polyamide, polyimide, polycarbonate Alternatively, a resin film such as an acrylic resin, a resin plate, or a laminate is used as the protective substrate 17. It is possible.

[0502] For example, a hard coat layer or a ceramic coat layer can be used for the protective film 17p. Specifically, a layer containing an ultraviolet curing resin or aluminum oxide is laminated on the second electrode 12. Alternatively, the second insulating layer 14 may be formed at a position other than the first insulating layer 14 .

[0503] <Display section 501> The display unit 501 includes a plurality of pixels 502 arranged in a matrix (FIG. 35(C) reference).

[0504] For example, pixel 502 includes subpixel 502B, subpixel 502G, and subpixel 502R, Each sub-pixel comprises a display element and a pixel circuit for driving the display element.

[0505] The sub-pixel 502B of the pixel 502 is disposed at a position overlapping the colored film CFB, and the sub-pixel 5 The subpixel 502G is disposed at a position overlapping the colored film CFG, and the subpixel 502R is disposed at a position overlapping the colored film CFR. is placed in position.

[0506] In this embodiment, an organic electroluminescence element that emits white light is used as a display element. However, the display element is not limited to this.

[0507] For example, organic electroluminescent devices with different luminescent colors can be used so that the color of light emitted by each subpixel is different. A luminescent element may be applied to each sub-pixel.

[0508] In addition to organic electroluminescence elements, we also offer electrophoretic and electronic liquid powder (registered trademark A display element that displays images using a method such as a liquid crystal display (also known as electronic ink) or an electrowetting method. Shutter-type MEMS display element, optical interference-type MEMS display element, liquid crystal element Various display elements such as the above can be used as the display element.

[0509] Also, transmissive LCDs, semi-transmissive LCDs, and reflective LCDs It can also be applied to semi-transmissive LCDs and reflective LCDs. In order to realize a liquid crystal display, a part or all of the pixel electrodes are made to be reflective electrodes. For example, a part or the whole of the pixel electrode may be made of aluminum. In this case, the reflective electrode may have a thickness of 100 nm or 100 nm. It is also possible to provide a memory circuit such as RAM, which further reduces power consumption. In addition, a suitable configuration for the display element to be applied can be selected from various pixel circuits. It can be used.

[0510] In addition, the display unit may be an active matrix type having active elements in the pixels, or A passive matrix system in which the pixels do not have active elements can be used.

[0511] In the active matrix method, a transistor is used as an active element (active element, nonlinear element). By using not only transistors but also various active elements (active elements, nonlinear elements), For example, MIM (Metal Insulator Metal), or It is also possible to use TFD (Thin Film Diode) and other elements. Since the manufacturing process is fewer, it is possible to reduce manufacturing costs and improve yields. Alternatively, these elements can improve the aperture ratio due to their small size. This makes it possible to achieve low power consumption and high brightness.

[0512] As a non-active matrix type, active elements (active elements, nonlinear elements It is also possible to use a passive matrix type that does not use active elements. Since it does not use any nonlinear elements, there are fewer manufacturing steps, which reduces manufacturing costs and It is possible to improve the accuracy. Or, it is possible to use active elements (active elements, nonlinear elements) Since it does not use a liquid crystal display, the aperture ratio can be improved, resulting in lower power consumption and higher brightness. It is possible to do so.

[0513] <Base material 510> A flexible material can be used for the substrate 510. For example, A material capable of being applied to the substrate 510 can be used.

[0514] For example, a flexible substrate 510b, a barrier film 510a for preventing the diffusion of impurities, and a substrate A laminated film in which the material 510b and the resin film 510c that bonds the barrier film 510a are laminated. The body can be suitably used as the base material 510 (see FIG. 36(A)).

[0515] <Sealant 560> The encapsulant 560 bonds the substrate 16 and the substrate 510. The encapsulant 560 is larger than air. In addition, when light is extracted to the sealing material 560 side, the sealing material 560 is The refractive index difference between the layer 60 and the adjacent layer can be reduced.

[0516] The pixel circuit and the light emitting element (eg, light emitting element 550R) are disposed between substrate 510 and substrate 16. do.

[0517] <Pixel configuration> Subpixel 502R includes light emitting module 580R.

[0518] The subpixel 502R can supply power to the light-emitting element 550R and the light-emitting element 550R. The light emitting module 580R includes a pixel circuit including a transistor 502t. The light emitting element 550R and an optical element (for example, a colored film CFR) are included.

[0519] The light-emitting element 550R includes a lower electrode, an upper electrode, and a light-emitting organic compound between the lower electrode and the upper electrode. The layer includes a compound.

[0520] The light emitting module 580R has a colored film CFR in the direction in which light is extracted. Any material that transmits light having a wavelength of red, green, or blue may be used. It is possible to use a sub-pixel that selectively transmits light. The light emitted by the light-emitting element is emitted without passing through the colored film. It may be allowed.

[0521] In addition, when the sealing material 560 is provided on the side from which light is extracted, the sealing material 560 It contacts the child 550R and the colored film CFR.

[0522] The colored film CFR is located so as to overlap the light emitting element 550R. A part of the light emitted by the light emitting module 5 passes through the colored film CFR and travels in the direction of the arrow shown in the figure. It is ejected outside 80R.

[0523] A light-shielding film BM surrounds a colored film (for example, colored film CFR).

[0524] <Pixel circuit configuration> The pixel circuit includes an insulating film 521 that covers a transistor 502t. It can be used as a film for flattening unevenness caused by pixel circuits. A laminated film including a layer capable of suppressing diffusion of substances can be applied to the insulating film 521. This makes it possible to suppress a decrease in reliability of the transistors 502t and the like due to the diffusion of impurities.

[0525] A lower electrode is disposed on the insulating film 521, and a partition wall 528 is disposed so as to overlap an end of the lower electrode. It is disposed on the insulating film 521 .

[0526] A layer containing a light-emitting organic compound is sandwiched between the lower electrode and the upper electrode to form a light-emitting element (e.g. For example, a light emitting element 550R is configured. The pixel circuit supplies power to the light emitting element.

[0527] Furthermore, a spacer is provided on the partition wall 528 to control the distance between the substrate 16 and the substrate 510 .

[0528] <Configuration of the scanning line driving circuit> The scanning line driver circuit 503g(1) includes a transistor 503t and a capacitor 503c. In addition, a transistor that can be formed on the same substrate as the pixel circuit in the same process is used as the driving circuit. It can be used on roads.

[0529] <Converter CONV> The detection signal DATA supplied by the detection unit 10U is converted and sent to the flexible substrate FPC1 Various circuits that can be used for the converter CONV (FIG. 3) 5(A) and Figure 36(A).

[0530] For example, transistor M4 can be used for converter CONV.

[0531] <Other configurations> The display unit 501 includes an anti-reflection film 567p at a position where the anti-reflection film 567p overlaps the pixels. For example, a circular polarizing plate can be used as p.

[0532] The display unit 501 includes a wiring 511 capable of supplying a signal, and a terminal 519 is connected to the wiring 511. 11. In addition, signals such as image signals and synchronization signals can be supplied. The flexible substrate FPC2 is electrically connected to the terminal 519.

[0533] In addition, a printed wiring board (PWB) is attached to the flexible board FPC2. That's fine.

[0534] The display unit 501 has wiring such as scanning lines, signal lines, and power lines. can be used.

[0535] Specifically, aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten a metallic element selected from the group consisting of tungsten, nickel, yttrium, zirconium, silver and manganese; The alloy containing the above-mentioned metal elements or the alloy combining the above-mentioned metal elements is used. In particular, aluminum, chromium, copper, tantalum, titanium, molybdenum, It is preferable that the alloy contains one or more elements selected from the group consisting of copper, manganese, and tungsten. The alloy is suitable for microfabrication using wet etching techniques.

[0536] Alternatively, titanium, tantalum, tungsten, molybdenum, chromium, An alloy film made by combining one or more of neodymium, scandium, or nitride A laminated structure in which films are laminated can be used.

[0537] Specifically, a two-layer structure in which a titanium film is laminated on an aluminum film, a titanium nitride film on a titanium A two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a tungsten film or a tungsten nitride film, a titanium film and A three-layer structure is formed in which an aluminum film is laminated on the titanium film, and a titanium film is further formed on the aluminum film. The structure, etc. can be used.

[0538] In addition, a light-transmitting conductive material containing indium oxide, tin oxide, or zinc oxide is used. Good too.

[0539] <Modifications of the display section> Various transistors can be used for the display portion 501 .

[0540] A configuration in which a bottom gate type transistor is applied to the display portion 501 is shown in FIG. and is illustrated in FIG. 36(B).

[0541] For example, a semiconductor film containing an oxide semiconductor, amorphous silicon, etc. is shown in FIG. The present invention can be applied to a transistor 502t and a transistor 503t.

[0542] A configuration in which a top-gate type transistor is applied to the display portion 501 is shown in FIG. As illustrated in the figure.

[0543] For example, polycrystalline silicon film or single crystal silicon transferred from a single crystal silicon substrate, etc. The semiconductor film including the film and the like is formed into a transistor 502t and a transistor Alternatively, the transistor described in the above embodiment can be applied to the transistor 503t. This can be used for the transistor 502t and the transistor 503t.

[0544] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0545] (Embodiment 12) In this embodiment, the semiconductor device can be used as a detection unit of the input / output device of one embodiment of the present invention. The configuration and driving method of the detection circuit will be described with reference to FIG.

[0546] FIG. 37 shows the configuration and driving method of the detection circuit 19 and the converter CONV according to one embodiment of the present invention. FIG.

[0547] FIG. 37(A) illustrates the configuration of the detection circuit 19 and converter CONV according to one embodiment of the present invention. FIG. 37(B-1) and FIG. 37(B-2) are timing diagrams for explaining the driving method. It is a chart.

[0548] In one embodiment of the present invention, the detection circuit 19 has a gate electrically connected to the first electrode 11 of the detection element C. The first electrode is electrically connected to a wiring VPI that can supply, for example, a ground potential. The first transistor M1 is connected to the first transistor M2 (see FIG. 37(A)).

[0549] Also, the gate is electrically connected to a scanning line G1 that can supply a selection signal, and the first The electrode of the first transistor M1 is electrically connected to the second electrode of the first transistor M2, and the second electrode of the first transistor M1 is, for example, A second transistor electrically connected to the signal line DL capable of supplying the detection signal DATA. The configuration may include a resistor M2.

[0550] Also, the gate is electrically connected to a wiring RES capable of supplying a reset signal, The first electrode is electrically connected to the first electrode 11 of the sensing element C, and the second electrode is, for example, grounded. A third transistor M3 electrically connected to a wiring VRES capable of supplying a potential The configuration may include:

[0551] The capacitance of the sensing element C increases when, for example, the first electrode 11 or the second electrode 12 is in close proximity. or the distance between the first electrode 11 and the second electrode 12 changes. As a result, the detection circuit 19 provides a detection signal DATA based on the change in capacitance of the detection element C. can be provided.

[0552] The first electrode 11 of the detection element C, the gate of the first transistor M1, and the third transistor The node to which the first electrode of the transistor is electrically connected is called node A.

[0553] The lines VRES and VPI can supply, for example, a ground potential, and the lines VPO and The wiring BR can supply, for example, a high power supply potential.

[0554] In addition, the wiring RES can supply a reset signal, and the scanning line G1 can supply a selection signal. The wiring CS supplies a control signal for controlling the potential of the second electrode 12 of the sensing element. It is possible.

[0555] In addition, the signal line DL can supply the detection signal DATA, and the terminal OUT can supply the detection signal D It can provide a converted signal based on ATA.

[0556] In addition, various circuits that can convert the detection signal DATA and supply it to the terminal OUT are available. For example, the converter CONV can be connected to the detection circuit 19 and the power supply 14. By electrically connecting them, a source follower circuit or a current mirror circuit can be configured. It may be possible to do so.

[0557] Specifically, a converter CONV using a transistor M4 is used to form a source follower circuit. (See FIG. 37A). Note that the first to third transistors M1 to M2 can be configured as follows. A transistor that can be manufactured using the same process as that for M3 is used for M4. Good too.

[0558] The transistors M1 to M3 each include a semiconductor film. A semiconductor film can be made of a silicon, a compound semiconductor, or an oxide semiconductor. semiconductors containing silicon, semiconductors containing gallium arsenide, or oxide semiconductors containing indium In addition, the transistors M1 to M3 may be the same as those in the above embodiment. The transistor shown in FIG.

[0559] <Method of driving the detection circuit 19> A method for driving the detection circuit 19 will now be described.

[0560] <First step> In a first step, the third transistor is made conductive and then made non-conductive. A reset signal is supplied to the gate, and the potential of the first electrode of the detection element C is set to a predetermined potential (see FIG. 37(B-1) Period T1).

[0561] Specifically, the reset signal is supplied to the wiring RES. This transistor sets the potential of the node A to, for example, the ground potential (see FIG. 37A).

[0562] <Second step> In a second step, a selection signal is gated to make the second transistor M2 conductive. and electrically connects the second electrode of the first transistor to the signal line DL.

[0563] Specifically, the selection signal is supplied to the scanning line G1. The transistor M2 electrically connects the second electrode of the first transistor to the signal line DL (FIG. 3). 7(B-1) Period T2).

[0564] <Third step> In a third step, a control signal is provided to a second electrode of the sensing element, and the control signal and A potential that changes based on the capacitance of the detection element C is supplied to the gate of the first transistor M1. .

[0565] Specifically, a rectangular control signal is supplied to the wiring CS. When the voltage applied to the sensing element C is 2, the potential of the node A rises based on the capacitance of the sensing element C. (See the second half of period T2 in Figure 37(B-1)).

[0566] For example, if the sensing element is placed in the air, something with a higher dielectric constant than the air will When the second electrode 12 of the sensing element C is disposed adjacent to the first electrode 12 of the sensing element C, the capacitance of the sensing element C appears to be large. do.

[0567] As a result, the change in the potential of node A caused by the rectangular control signal is The distance between the object and the sensor is smaller than when the object is not placed close to each other (see the solid line in Figure 37(B-2)). ).

[0568] <Fourth step> In the fourth step, the signal generated by the change in the potential of the gate of the first transistor M1 is The signal is supplied to the signal line DL.

[0569] For example, the change in the current caused by the change in the potential of the gate of the first transistor M1 is Supply to DL.

[0570] The converter CONV converts a change in the current flowing through the signal line DL into a change in voltage and supplies it.

[0571] <The fifth step> In the fifth step, a selection signal that makes the second transistor non-conductive is applied to the gate. Supply.

[0572] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0573] (Embodiment 13) In this embodiment, an electronic device in which the semiconductor device of one embodiment of the present invention can be used will be described. This will be explained with reference to FIG.

[0574] 38(A) to 38(D) are diagrams showing electronic devices. These electronic devices are housed in a housing. Body 600, display unit 601, speaker 603, LED lamp 604, operation keys 605 (power switch or operation switch), connection terminal 606, sensor 607 (force, displacement, position Position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time , hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared 606, which may include a line measuring function, a microphone 608, etc.

[0575] FIG. 38(A) shows a mobile computer, which includes, in addition to the above, a switch 609, It may have an infrared port 620, etc. FIG. 38(B) shows a portable In addition to the above, the image reproducing device (for example, a DVD reproducing device) includes a second display unit 38C shows a television receiver. In addition to the above, the device may also include a tuner, an image processor, etc. (D) is a portable television receiver, which, in addition to the above, has a charging port capable of transmitting and receiving signals. It may have an electrical device 627, etc.

[0576] 38(E) to 38(G) show a foldable portable information terminal 610. FIG. 38(E) shows the portable information terminal 610 in an unfolded state. FIG. 38(F) shows the portable information terminal 610 in an unfolded state. 6 shows the portable information terminal 610 in the process of changing from one folded state to the other. FIG. 38G shows the portable information terminal 610 in a folded state. The portable information terminal 610 has the following features: When folded, it is highly portable, and when unfolded, it has a large, seamless display area. It has excellent visibility of the display.

[0577] The display unit 612 is supported by three housings 615 connected by hinges 613 . The two housings 615 are bent via the hinge 613, forming a portable information terminal 610. The present invention can be applied to a folding device by using a folding method. A display device manufactured by applying the above method can be used for the display portion 612. A display device that can be bent to a diameter of 1 mm or more and 150 mm or less can be applied.

[0578] The electronic devices shown in Figures 38(A) to 38(G) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software ( A function to control processing by a program, wireless communication function, and various functions using wireless communication function Functions for connecting to computer networks, transmitting various data using wireless communication functions, or receiving the program or data recorded on the recording medium, and displaying the program or data. The electronic device may have a function of displaying information on a display unit. In this case, one display unit is used mainly for displaying image information, and another display unit is used mainly for displaying text. A function that displays text information, or a function that displays images that take parallax into account on multiple displays The electronic device may have a function of displaying a physical image. The camera has the functions of taking still images, taking videos, and storing the images automatically or manually. function to automatically correct the image, and to store the captured image on a recording medium (external or built-in to the camera) The camera can have a function of displaying the captured image on the display unit. The functions that the electronic devices shown in FIG. 38(G) can have are not limited to those described above, and various It can have such functions.

[0579] The electronic device described in this embodiment has a display unit for displaying some information. Note that the semiconductor device of one embodiment of the present invention can be used in an electronic device that does not have a display portion. can also be applied to

[0580] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0581] In addition, with regard to the contents not specified in the drawings or text in the specification, Alternatively, it is possible to define an upper limit for a certain value. When a numerical range is listed, such as a lower limit and a lower value, the range may be arbitrarily narrowed. or by excluding one point in the scope, it defines an embodiment of the invention that excludes a part of the scope. These can be used to determine whether, for example, the prior art is within the technical scope of one aspect of the present invention. It may be stipulated that the

[0582] As a specific example, a circuit diagram in which first to fifth transistors are used in a circuit is shown. In that case, the circuit does not have a sixth transistor. Or, the circuit does not have a capacitance element. Furthermore, it is possible to specify that the circuit has a certain connection structure. The present invention can be stipulated as not having a sixth transistor as described above. Or, the circuit is specified as not having a capacitive element having a specific connection structure. For example, the gate of the first transistor may be connected to the gate of the second transistor. In accordance with the present invention, it is possible to provide for the invention not to have a sixth transistor connected to the first transistor. Alternatively, for example, a capacitor element having a first electrode connected to the gate of a third transistor is It is possible to define the invention as not having

[0583] As another concrete example, for a certain value, for example, "a certain voltage is between 3V and 10V, In that case, for example, if a certain voltage is -2 It is possible to specify one aspect of the invention as "excluding cases where the voltage is greater than or equal to V and less than or equal to 1 V." Or For example, it is possible to specify one aspect of the invention as excluding cases where a certain voltage is 13 V or more. It is possible. For example, the voltage may be specified as 5V or more and 8V or less. It is also possible to specify the invention so that the voltage is, for example, approximately 9V. For example, the voltage is 3V or more and 10V or less, except for the case where the voltage is 9V. It is also possible to define the invention as follows: "It is preferable that these conditions are met," etc. However, certain values ​​are not limited to those descriptions. However, even if the invention is described in any way, it is not necessarily limited to such descriptions.

[0584] As another specific example, for a certain value, for example, "a certain voltage is preferably 10V" In that case, for example, if a certain voltage is between -2V and 1V, It is possible to define an aspect of the invention as follows: It is possible to specify one aspect of the invention as excluding cases where the voltage applied is 13 V or higher.

[0585] As another specific example, regarding the properties of a certain substance, for example, "a certain film is an insulating film" In that case, for example, except for the case where the insulating film is an organic insulating film, Alternatively, for example, the insulating film may be made of inorganic It is possible to specify one aspect of the invention as excluding the case where the insulating film is an insulating film. It is possible to define one aspect of the invention as excluding cases where the film is a conductive film. Alternatively, for example, it is possible to specify one aspect of the invention as excluding cases where the film is a semiconductor film. It is possible.

[0586] As another specific example, regarding a certain laminated structure, for example, "between film A and film B, there is a film In that case, for example, if the membrane has four or more layers, It is possible to define the invention as excluding the case of a laminated film. Or, for example, A film and It is possible to define the invention as excluding the case where a conductive film is provided between the film and the conductive film. do.

[0587] It should be noted that one aspect of the invention described in this specification etc. may be practiced by various people. However, the implementation may involve multiple people. For example, in the case of a transmitting and receiving system, Company A manufactures and sells the transmitter, and Company B manufactures the receiver. Another example is a company that manufactures and sells devices that have transistors and light-emitting devices. In the case of a light-emitting device manufactured by Company A, the semiconductor device in which the transistor is formed is manufactured and sold by Company A. Company B then purchases the semiconductor device and manufactures light-emitting devices in the semiconductor device. In some cases, the light-emitting device is completed by coating the light-emitting element with a thin film.

[0588] In such a case, there is no invention that can be used to assert patent infringement against either Company A or Company B. In other words, it is possible to constitute an embodiment of the invention that is implemented only by Company A. It is possible to configure the invention as an embodiment of another invention, which is implemented only by Company B. In addition, it is possible to constitute one aspect of the above. It is possible to determine that one aspect of the invention is clear and described in the present specification, etc. For example, in the case of a transmission and reception system, the description can be made for the transmitter only, or for the receiver only. Even if the description of the transmitter alone is not included in this specification, the transmitter alone constitutes one aspect of the invention. The receiver alone can constitute one aspect of another invention, and the aspects of those inventions can be The manner is clear and can be judged to be described in the present specification. In the case of a light-emitting device having a transistor and a light-emitting element, The description of only the semiconductor device having the light emitting element or the description of only the light emitting device having the light emitting element are not included in this specification. Even if not stated in the specification, a semiconductor device having a transistor formed therein is an embodiment of the invention. One embodiment of the present invention can be constituted by a light-emitting device having a light-emitting element alone. It is possible to determine that one aspect of the invention is clear and described in the present specification, etc. It is possible to do this.

[0589] In this specification, the terms "active elements (transistors, diodes, etc.)" and "passive elements" are used interchangeably. For all terminals (capacitive elements, resistive elements, etc.), the connection destination must be specified. Even if the invention is not a single-particular invention, a person skilled in the art may be able to construct one aspect of the invention. Even if the connection destination is not specified, one aspect of the invention is clear. When the content is described in this specification, etc., one aspect of the invention that does not specify a connection destination is the present invention. In some cases, it may be possible to determine that the information is written in the detailed instructions. If the above case is considered, there is no need to limit the connection destination of the terminal to a specific location. Therefore, there are active elements (transistors, diodes, etc.) and passive elements (capacitive elements, resistive elements By specifying the connection destinations of only some of the terminals possessed by the device, etc., It may be possible to configure one aspect of the present invention.

[0590] In this specification, if at least the connection destination of a certain circuit is specified, the circuit is considered to be A person skilled in the art may be able to identify the invention. Or, a person skilled in the art may be able to identify the invention by a few words. In some cases, a person skilled in the art may be able to identify the invention by simply specifying the function. In other words, if a function is specified, it can be said that one aspect of the invention is clear. It may be possible to determine that one aspect of the invention is described in this specification, etc. Therefore, even if the function of a certain circuit is not specified, if the connection destination is specified, it can be regarded as an invention. The present invention is disclosed as an embodiment, and can be implemented as one embodiment of the present invention. For a certain circuit, even if the connection destination is not specified, specifying the function is considered as one aspect of the invention. and can be construed as one embodiment of the invention.

[0591] In this specification, etc., in a drawing or text described in a certain embodiment, It is possible to extract a part of the invention and use it as an embodiment of the invention. If a figure or text describing a certain part is included, the figure or text of that part may be omitted. The above-mentioned content is also disclosed as one aspect of the invention and constitutes one aspect of the invention. It is possible to make such a claim. And one aspect of the invention is clear. For example, active elements (transistors, diodes, etc.), wiring, passive elements (capacitive elements , resistor elements, etc.), conductive film, insulating film, semiconductor film, organic material, inorganic material, parts, equipment, operation In drawings or text that describe a method, manufacturing method, etc., in one or more parts It is possible to extract N pieces (N From a circuit diagram having circuit elements (such as transistors and capacitor elements) (where the number is an integer), M (where M is an integer and M < N) circuit elements (such as transistors and capacitor elements) can be extracted to form one aspect of the invention. As another example, from a cross-sectional view composed of N (where N is an integer) layers, M (where M is an integer and M < N) layers can be extracted to form one aspect of the invention. As yet another example, from a flowchart composed of N (where N is an integer) elements, M (where M is an integer and M < N) elements can be extracted to form one aspect of the invention. As yet another example, from a sentence described as "A has B, C, D, E, or F", some of the elements can be arbitrarily extracted to form inventions such as "A has B and E", "A has E and F", "A has C, E, and F", or "A has B, C, D, and E", etc., which can form one aspect of the invention. It is possible.

[0592] Note that in this specification, etc., in the figures or sentences described in a certain embodiment, when at least one specific example is described, those skilled in the art can easily derive the upper concept of that specific example. Therefore, when at least one specific example is described in the figures or sentences described in a certain embodiment, the upper concept of that specific example is also disclosed as one aspect of the invention and can form one aspect of the invention. And it can be said that that aspect of the invention is clear. Note that in this specification, etc., at least the content described in the figures (even a part of the figures)

[0593] is disclosed as one aspect of the invention and can form one aspect of the invention. It is possible. Therefore, if something is shown in a diagram, it can be explained in text. Even if there is no such disclosure, the contents are disclosed as one aspect of the invention, and one aspect of the invention is Similarly, even if a part of the figure is taken out, it is possible to construct it as one aspect of the invention. and can constitute one embodiment of the invention. One aspect of the invention is clear. [Explanation of symbols]

[0594] 10U Detection Unit 11 electrodes 12 electrodes 13. Insulating film 14 Window section 16 Base material 16a Barrier film 16b Base material 16c resin membrane 17 Protective base material 17p protective film 19 Detection circuit 51 Substrate 53 Insulating Film 53a Insulating film 54 Oxide Semiconductor Film 55 Oxide Semiconductor Film 55_1 Oxide semiconductor film 55_2 Oxide semiconductor film 55_2a area 55_2b area 55_2c area 55_3 Oxide semiconductor film 55_3a area 55_3b area 55_3c area 55a area 55b area 55c area 55d area 55e area 56 Insulating Film 57 Insulating Film 58 Buffer membrane 58a Buffer membrane 59 Buffer membrane 60 Buffer membrane 60a Buffer film 61 Conductive Film 61a Conductive film 61b Conductive film 62 Oxygen 63 Impurity elements 64 Insulating Film 65 Insulating Film 67 Insulating Film 68 Conductive Film 69 Conductive Film 71 areas 71a area 71b area 71c area 73 Gate electrode 77 Conductive Film 79 Insulating Film 81 Buffer membrane 82 Oxygen 83 Buffer membrane 100 Input Device 500 I / O devices 501 Display section 502 pixels 502B subpixel 502G subpixel 502R subpixel 502t transistor 503c capacity 503g Scanning line driver circuit 503t Transistor 510 Base material 510a Barrier film 510b base material 510c resin membrane 511 Wiring 519 Terminal 521 Insulating film 528 Bulkhead 550R Light emitting element 560 Encapsulating material 567p Anti-reflective coating 580R Light Emitting Module 600 Case 601 Display section 602 Display section 603 Speaker 604 LED Lamp 605 Operation Key 606 Connection terminal 607 Sensors 608 Microphone 609 Switch 610 Mobile Information Terminals 612 Display section 613 Hinge 615 Case 620 Infrared port 621 Recording medium reading unit 627 charger 5100 pellets 5120 PCB 5161 area

Claims

[Claim 1] forming an insulating film over the oxide semiconductor film; forming a buffer film on the insulating film; adding oxygen to the buffer film and the insulating film; forming a conductive film on the buffer film to which oxygen has been added; an impurity element is added to the oxide semiconductor film by using the conductive film as a mask;

Images