Image sensor and manufacturing method for the same

Abstract

To provide an image sensor that minimizes the signal difference between pixels sharing the same color filter, and a manufacturing method for the image sensor.SOLUTION: An image sensor includes a semiconductor substrate 100 including a central pixel region and a pixel array region having an edge pixel region surrounding the central pixel region in a plan view and including a first surface 100A and a second surface 100B that face each other. A color filter group including a plurality of color filters on the second surface includes a central color filter CFx on the central pixel region, an edge color filter on the edge pixel region, and a top flat layer TLxa in contact with the entire upper surface of a microlens layer MLLx disposed to cover the color filter group. The microlens layer includes a lens flat film PLxa in contact with the color filter group and a microlens MLxa on the lens flat film. The top flat layer includes an upper end concave part 57xa depressed toward the substrate.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to an image sensor and a manufacturing method thereof, and more particularly to a CMOS image sensor and a manufacturing method thereof. [Background technology]

[0002] An image sensor is a semiconductor device that converts optical images into electrical signals. Recently, with the development of the computer and communications industries, demand for improved image sensors has increased in various fields, including digital cameras, video cameras, personal communication systems (PCS), game consoles, security cameras, and medical microcameras. Image sensors can be classified into charge coupled device (CCD) and complementary metal oxide semiconductor (CMOS) types. CMOS image sensors are abbreviated as CIS (CMOS image sensor). The CIS has multiple pixels arranged two-dimensionally. Each pixel includes a photodiode (PD). The photodiode converts incident light into an electrical signal. The multiple pixels are defined by deep isolation patterns disposed between them. The multiple elements of one pixel are separated by the isolation pattern. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent No. 10,950,642 B2 Summary of the Invention [Problem to be solved by the invention]

[0004] A technical problem to be solved by the present invention is to provide an image sensor and a manufacturing method thereof that can minimize a signal difference between pixels that share the same color filter.

[0005] SUMMARY OF THE INVENTION It is an object of the present invention to provide an image sensor and a method for manufacturing the same that can increase light reflection efficiency and improve sensitivity.

[0006] Another technical problem to be solved by the present invention is to provide an image sensor that can be easily highly integrated and a method for manufacturing the same. [Means for solving the problem]

[0007] an uppermost planar layer in contact with the entire upper surface of the microlens layer; and a semiconductor substrate including a pixel array region having a central pixel region and edge pixel regions surrounding the central pixel region in a plan view. The semiconductor substrate has first and second surfaces facing each other. The semiconductor substrate includes a color filter group including a plurality of color filters. The color filter group includes a central color filter on the central pixel region and edge color filters on the edge pixel regions. The color filter group is disposed to cover the color filter group. The color filter group includes a central color filter on the central pixel region and an edge color filter on the edge pixel regions. The color filter group is disposed to cover the color filter group. The color filter group includes a microlens layer including a lens planar layer and microlenses on the lens planar layer. The top planar layer includes an upper end recessed portion recessed toward the substrate. In the central pixel region, a center point of the exposed planar upper surface of the lens planar layer is vertically overlapped with a center point of the recess defined at the bottom of the upper end recessed portion. In the edge pixel region, the center point of the planar upper surface may be on a line perpendicular to the center point of the recessed portion.

[0008] According to an embodiment of the present invention, there is provided an image sensor including a semiconductor substrate including a pixel array region having a central pixel region and edge pixel regions surrounding the central pixel region in a plan view; a color filter group including a plurality of color filters, the color filter group including a central color filter on the central pixel region and an edge color filter on the edge pixel regions; a microlens layer disposed to cover the color filter group; and a top planar layer on the microlens layer, the microlens layer including a lens planar film in contact with the color filter group and microlenses on the lens planar film, the top planar layer including an upper end recessed portion recessed toward the substrate and a recessed center point defined at a bottom of the upper end recessed portion, the microlenses including a lens center point defined at a top of the microlens, and a vertical distance of the recessed center point from the first surface being smaller than a vertical distance of the lens center point from the first surface.

[0009] an uppermost planar layer on the microlens layer; a top planar layer on the microlens layer; a top planar layer on the substrate ... [Effects of the Invention]

[0010] According to the concept of the present invention, an image sensor may include a center pixel region and an edge pixel region. The microlenses covering the center pixel region and the edge pixel region may include a recessed lens portion recessed toward the substrate. A top planar layer may be additionally provided on the microlenses covering the center pixel region and the edge pixel region, and the planar layer may include a top recessed portion recessed toward the substrate.

[0011] The recessed lens portion and the upper recessed portion refract light received by the image sensor, thereby suppressing crosstalk. The image sensor can effectively receive light into the photoelectric conversion region, thereby improving sensitivity and color reproducibility.

[0012] According to the concept of the present invention, each microlens and concave flat portion can be shifted further toward the edge pixel area, thereby increasing light reflection efficiency and improving sensitivity. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a block diagram illustrating an image sensor according to an embodiment of the present invention; [Figure 2] 2 is a circuit diagram of a unit pixel of an image sensor according to an embodiment of the present invention; [Figure 3A] 1 is a plan view illustrating an image sensor according to an embodiment of the present invention. [Figure 3B] 3B is an enlarged view of the light-receiving region of FIG. 3A. [Figure 4] FIG. 3C is a cross-sectional view taken along line AA' in FIG. 3B. [Figure 5] FIG. 3C is a cross-sectional view taken along line BB' in FIG. 3B. [Figure 6] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line AA' of FIG. 3B. [Figure 7] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line BB' of FIG. 3B. [Figure 8] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line AA' of FIG. 3B. [Figure 9] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line BB' of FIG. 3B. [Figure 10A] 3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 10B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 11A] 3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 11B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 12A] 3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 12B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 13A] 3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 13B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 14A]3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 14B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 15A] 3A-3C are cross-sectional views illustrating a method for manufacturing an image sensor according to some embodiments of the present invention, corresponding to AA' in FIG. 3B. [Figure 15B] 3B is a cross-sectional view corresponding to BB' in FIG. 3B, illustrating a method for manufacturing an image sensor according to some embodiments of the present invention. [Figure 16] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line AA' of FIG. 3B. [Figure 17] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line BB' of FIG. 3B. [Figure 18] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line AA' of FIG. 3B. [Figure 19] 3C is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line BB' of FIG. 3B. DETAILED DESCRIPTION OF THE INVENTION

[0014] The present invention will now be described in detail by describing exemplary embodiments of the present invention with reference to the accompanying drawings.

[0015] FIG. 1 is a block diagram illustrating an image sensor according to an embodiment of the present invention.

[0016] Referring to FIG. 1, the image sensor includes an active pixel sensor array 1001, a row decoder 1002, a row driver 1003, a column decoder 1004, a timing generator 1005, a correlated double sampler (CDS) 1006, an analog to digital converter (ADC) 1007, and an input / output buffer 1008.

[0017] The active pixel sensor array 1001 includes a plurality of unit pixels arranged two-dimensionally and converts optical signals into electrical signals. The active pixel sensor array 1001 can be driven by a plurality of driving signals, such as a pixel selection signal, a reset signal, and a charge transfer signal, from a row driver 1003. The converted electrical signals are provided to a correlated double sampler 1006.

[0018] The row driver 1003 provides a number of drive signals to the active pixel sensor array 1001 for driving a number of unit pixels according to the results of decoding by the row decoder 1002. If the unit pixels are arranged in a matrix, a drive signal may be provided for each row.

[0019] A timing generator 1005 provides timing and control signals to the row decoder 1002 and the column decoder 1004 .

[0020] The correlated double sampler 1006 receives, holds, and samples the electrical signal generated by the active pixel sensor array 1001. The correlated double sampler 1006 double samples a specific noise level and a signal level based on the electrical signal, and outputs a level corresponding to the difference between the noise level and the signal level.

[0021] The analog-to-digital converter 1007 converts the analog signal corresponding to the level output from the correlated double sampler 1006 into a digital signal and outputs it.

[0022] The input / output buffer 1008 latches the digital signals, and outputs the latched signals to an image signal processor (not shown) in sequence according to the decoding results of the column decoder 1004 .

[0023] FIG. 2 is a circuit diagram of an active pixel sensor array of an image sensor according to some embodiments of the present invention.

[0024] 1 and 2, the active pixel sensor array 1001 includes a plurality of pixel regions PX, which may be arranged in a matrix. Each pixel region PX may include a transfer transistor TX. Each pixel region PX may further include logic transistors RX, SX, and DX. The logic transistor may be a reset transistor RX, a selection transistor SX, or a source follower transistor DX. The transfer transistor TX may include a transfer gate TG. Each pixel region PX may further include a photoelectric conversion unit PD and a floating diffusion region FD. The logic transistors RX, SX, and DX may be shared among the plurality of pixel regions PX.

[0025] The photoelectric conversion unit PD can generate and accumulate photocharges in proportion to the amount of light incident from the outside. The photoelectric conversion unit PD can include a photodiode, a phototransistor, a photogate, a pinned photodiode, or a combination thereof. The transfer transistor TX can transfer the charges generated in the photoelectric conversion unit PD to the floating diffusion region FD. The floating diffusion region FD can transfer and cumulatively store the charges generated in the photoelectric conversion unit PD. The source follower transistor DX can be controlled according to the amount of photocharges accumulated in the floating diffusion region FD.

[0026] The reset transistor RX can periodically reset the charge accumulated in the floating diffusion region FD. The drain electrode of the reset transistor RX is connected to the floating diffusion region FD, and the source electrode of the reset transistor RX can be connected to a power supply voltage VDD. When the reset transistor RX is turned on, the power supply voltage VDD connected to the source electrode of the reset transistor RX can be applied to the floating diffusion region FD. Therefore, when the reset transistor RX is turned on, the charge accumulated in the floating diffusion region FD can be discharged, resetting the floating diffusion region FD.

[0027] The source follower transistor DX including the source follower gate electrode SF can act as a source follower buffer amplifier, amplifying the potential change at the floating diffusion region FD and outputting it to the output line Vout.

[0028] A selection transistor SX including a selection gate electrode SEL can select a pixel region PX to be read out row by row. When the selection transistor SX is turned on, a power supply voltage VDD can be applied to the drain electrode of the source follower transistor DX.

[0029] Figure 3A is a plan view of an image sensor according to an embodiment of the present invention. Figure 3B is an enlarged view of a light receiving area of Figure 3A. Figure 4 is a cross-sectional view taken along line A-A' in Figure 3B. Figure 5 is a cross-sectional view taken along line B-B' in Figure 3B.

[0030] An image sensor according to an embodiment of the present invention may include, from a vertical perspective, a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30. The photoelectric conversion layer 10 may be disposed between the pixel circuit layer 20 and the light-transmitting layer 30 from a vertical perspective. Light incident from the outside may be converted into an electrical signal by the photoelectric conversion layer 10.

[0031] The photoelectric conversion layer 10 may include an isolation film 105, a deep isolation pattern DTI, a photoelectric conversion region PD, and a floating diffusion region FD.

[0032] Referring to FIGS. 3A and 3B, the image sensor may include a pixel array region R1 and a pad region R2.

[0033] The pixel array region R1 may include a plurality of pixels P two-dimensionally arranged along a third direction D3 and a fourth direction D4 that intersect with each other. Each pixel P may include a photoelectric conversion element and a readout element. An electrical signal generated by incident light from each pixel P in the pixel array region R1 may be output.

[0034] The pixel array region R1 may include a light-receiving region AR and a light-shielding region OB. In a plan view, the light-shielding region OB may surround the light-receiving region AR. That is, in a plan view, the light-shielding region OB may be disposed above, below, left, and right of the light-receiving region AR. A reference pixel P, to which no light is incident, is provided in the light-shielding region OB. The amount of charge sensed by each unit pixel P in the light-receiving region AR can be compared with the amount of reference charge generated in the reference pixel P to calculate the magnitude of the electrical signal sensed by each unit pixel P.

[0035] The pixel array region R1 may include a central pixel region X in which a plurality of pixels are arranged in the light receiving area AR, and edge pixel regions Y surrounding the central pixel region X in a planar view. In other words, the edge pixel regions Y may be arranged above, below, left, and right of the central pixel region X in a planar view. In this case, the angles of incident light entering the edge pixel region Y and the central pixel region X may be different.

[0036] A color filter and a microlens may be disposed on the pixel array region R1.

[0037] The color filters may be arranged on the pixel array region R1, and each may be arranged to cover a reference pixel P. The color filters may be arranged in n rows and n columns to form a color filter group.

[0038] The color filter group may include a center color filter group on the center pixel area X and an edge color filter group on the edge pixel area Z. The center color filter group may include a center color filter CFx, and the edge color filter group may include an edge color filter CFy.

[0039] The color filters may include a red color filter, a green color filter, and a blue color filter, which can selectively transmit incident light.

[0040] The microlenses can condense light incident from the outside. The microlenses can be arranged two-dimensionally along third and fourth directions D3 and D4 that intersect with each other in a plan view.

[0041] Each microlens may cover one of the color filter groups. For example, one microlens may cover color filter groups arranged in two rows and two columns. Color filters and microlenses will be described in detail below with reference to FIGS. 4 to 9.

[0042] The image sensor may include a substrate 100. The substrate 100 may be, for example, a silicon single crystal wafer, a silicon epitaxial layer, or an SOI (silicon on insulator) substrate. For example, the substrate 100 may be doped with impurities having a first conductivity type (e.g., P-type). The substrate 100 may include a first surface 100A and a second surface 100B facing each other. The first surface 100A may face a first direction D1, and the second surface 100B may face a second direction D2. The first direction D1 and the second direction D2 may face each other.

[0043] An isolation layer 105 may be disposed adjacent to the first surface 100A of the semiconductor substrate 100 in each pixel region PR. The isolation layer 105 may be provided in an isolation trench formed by recessing the first surface 100A of the semiconductor substrate 100. The isolation layer 105 may include an insulating material. The isolation layer 105 may define active portions on the first surface 100A of the semiconductor substrate 100. For example, the isolation layer 105 may define first and second active portions in the semiconductor substrate 100. The first and second active portions may be spaced apart from each other in each pixel region PR and may have different sizes.

[0044] Deep isolation patterns DTI may be positioned in the substrate 100. The isolation patterns DTI may separate the pixel regions P. The deep isolation patterns DTI may penetrate the substrate 100 between the pixel regions P along the second direction D2.

[0045] The deep isolation pattern DTI may be disposed in a trench extending from the first surface 100A toward the second surface 100B. In plan view, the deep isolation pattern DTI may have a mesh shape in which lines extending in third and fourth directions D3 and D4 intersect.

[0046] The deep isolation patterns DTI may extend from the first surface 100A into the substrate 100 and be interposed between a plurality of pixel regions PR. The deep isolation patterns DTI may define a plurality of photoelectric conversion units. The deep isolation patterns DTI may penetrate the semiconductor substrate 100 from the first surface 100A to the second surface 100B of the semiconductor substrate 100. The deep isolation patterns DTI may penetrate a portion of the isolation film 105.

[0047] The deep isolation pattern DTI may have an upper width on the first surface 100A of the semiconductor substrate 100 and a lower width on the second surface 100B of the semiconductor substrate 100. The lower width may be smaller than the upper width. For example, the width of the deep isolation pattern DTI may gradually narrow from the first surface 100A of the semiconductor substrate 100 toward the second surface 100B. The deep isolation pattern DTI may have a length in a third direction D3. The length of the deep isolation pattern DTI may be substantially equal to the vertical thickness of the semiconductor substrate 100.

[0048] A line passing through the exact center of the deep isolation pattern DTI can be defined as a deep isolation centerline DTICL. In other words, a vertical line defined at the same distance from one end and another end of the deep isolation pattern DTI can be defined as a deep isolation centerline DTICL.

[0049] The deep isolation pattern DTI may include a liner insulating pattern 111 , a semiconductor pattern 113 , and a capping insulating pattern 115 .

[0050] The semiconductor pattern 113 may penetrate at least a portion of the semiconductor substrate 100 in the third direction D3. A liner insulating pattern 111 may be provided between the semiconductor pattern 113 and the semiconductor substrate 100. A capping insulating pattern 115 may be provided on the semiconductor pattern 113.

[0051] The lower surface of the semiconductor pattern 113 may be located at substantially the same level as the second surface 100b of the semiconductor substrate 100. The upper surface of the semiconductor pattern 113 may be in direct contact with the lower surface of the capping insulating pattern 115. Air gaps or voids may exist within the semiconductor pattern 113. The semiconductor pattern 113 may include, for example, polysilicon.

[0052] The lower surface of the capping insulation pattern 115 may be located at a lower level than or at the same level as the lower surface of the isolation layer 105. The lower surface of the capping insulation pattern 115 may have a rounded shape. The upper surface of the capping insulation pattern 115 may be located at substantially the same level as the upper surface of the isolation layer 105 (i.e., the first surface 100A of the semiconductor substrate 100). The liner insulation pattern 111 may conformally (i.e., with a substantially uniform thickness) cover the sidewalls of the semiconductor pattern 113 and the sidewalls of the capping insulation pattern 115. The liner insulation pattern 111 and the capping insulation pattern 115 may include at least one of silicon oxide, silicon oxynitride, and silicon nitride, for example.

[0053] A photoelectric conversion region PD may be provided in the semiconductor substrate 100 of each pixel region PR. The photoelectric conversion region PD generates photocharges in proportion to the intensity of incident light. The photoelectric conversion region PD may be formed by ion-implanting impurities having a second conductivity type opposite to that of the semiconductor substrate 100 into the semiconductor substrate 100. The photoelectric conversion region PD of the second conductivity type may form a photodiode by junction with the semiconductor substrate 100 of the first conductivity type. For example, the photoelectric conversion region PD may have a difference in impurity concentration between a region adjacent to the first surface 100A and a region adjacent to the second surface 100B of the semiconductor substrate 100 so as to have a potential gradient between the first surface 100A and the second surface 100B of the semiconductor substrate 100. For example, the photoelectric conversion region PD may include multiple impurity regions stacked vertically.

[0054] A pixel circuit layer 20 may be disposed on the first surface 100A of the semiconductor substrate 100. The pixel circuit layer 20 may include pixel circuits (e.g., MOS transistors) electrically connected to the photoelectric conversion region PD. In other words, the pixel circuit layer 20 may include the pixel transistors described in FIG. 2, such as a reset transistor RX, a selection transistor SEL, a dual conversion gain transistor DCX, and a source follower transistor SF.

[0055] A transmission gate TG may be provided on the first surface 100A of the substrate 100 in each pixel region PX. As an example, a portion of the transmission gate TG may be embedded inside the substrate 100. The transmission gate TG may be a vertical type. As another example, the transmission gate TG may be a planar type that is flat on the first surface 100A of the substrate 100.

[0056] A gate insulation pattern GI may be interposed between the transfer gate TG and the substrate 100. A floating diffusion region FD may be provided in the substrate 100 adjacent to one side of the transfer gate TG. The floating diffusion region FD may be provided in a first active portion on one side of the transfer gate electrode TG. The floating diffusion region FD may be formed by ion implanting impurities having a conductivity type opposite to that of the semiconductor substrate 100. For example, the floating diffusion region FD may be an impurity region having a second conductivity type.

[0057] According to some embodiments of the present invention, light may be incident into the substrate 100 through the second surface 100B of the substrate 100. Electron-hole pairs may be generated at the PN junction by the incident light. The generated electrons may be transferred to the photoelectric conversion unit PD. The electrons may be transferred to the floating diffusion region FD by applying a voltage to the transfer gate TG.

[0058] An interlayer dielectric film (ILD) may be provided on the first surface 100A of the substrate 100 and may cover the first surface 100A. The interlayer dielectric film (ILD) may be a composite film including at least one of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a porous low-k film, or a combination thereof. Wiring 60 may be provided in the interlayer dielectric film (ILD). A floating diffusion region (not shown) may be connected to the wiring 60. The wiring 60 and the interlayer dielectric film (ILD) may constitute a pixel circuit layer 20. The pixel circuit layer 20 may be provided on the first surface 100A of the substrate 100.

[0059] The light-transmitting layer 30 may be disposed on the second surface 100B of the semiconductor substrate 100. The light-transmitting layer 30 may include an anti-reflection film 42, grid structures GPx, GPy, color filters CFx, CFy, and microlens layers MLLx, MLLy. The light-transmitting layer 30 may collect and filter light incident from the outside and provide the collected light to the photoelectric conversion layer 10.

[0060] An antireflective coating 42 may be disposed on the deep isolation pattern DTI. A first antireflective coating 42 may be provided on the second surface 100B of the substrate 100 and may cover the second surface 100B. The antireflective coating 42 may include an oxide. The antireflective coating 42 may include, for example, Al2O3, HfO, SiO2, or PTEOS.

[0061] Grid structures GPx and GPy may be disposed on the anti-reflection film 42. The grid structures GPx and GPy may be interposed between color filters. The grid structures GPx and GPy may include light-shielding patterns 48x and 48y and low-refractive patterns 50x and 50y. The low-refractive patterns 50x and 50y may be disposed on the light-shielding patterns 48x and 48y.

[0062] The lines passing through the exact centers of the grid structures GPx and GPy can be defined as grid center lines GPxCL and GPyCL. In other words, the vertical lines defined at the same distance from one end and the other end of the grid structures GPx and GPy can be defined as grid center lines GPxCL and GPyCL.

[0063] For example, the light-shielding patterns 48x and 48y and the low-refractive-index patterns 50x and 50y may overlap the deep element isolation pattern DTI to have a grid shape in plan view.

[0064] For example, the light-shielding patterns 48x, 48y and the low-refractive index patterns 50x, 50y may not overlap the deep device isolation patterns DTI and may have a grid shape in plan view. The light-shielding patterns 48 may include, for example, titanium. The low-refractive index patterns 50 may have the same thickness and may include the same organic material. The low-refractive index patterns 50 may have a refractive index lower than that of the color filters. The light-shielding patterns 48 and the low-refractive index patterns 50 may prevent crosstalk between adjacent pixel regions PR.

[0065] Color filters CFx and CFy may be disposed on the anti-reflection film 42. The color filters CFx and CFy may form a color filter group, that is, the color filter group may include a center color filter CFx on the center pixel region and an edge color filter CFy on the edge pixel region.

[0066] Microlens layers MLLx and MLLy may be disposed on the color filters CFx and CFy and the grid structures GPx and GPy, and the microlens layers MLLx and MLLy may be disposed to cover the color filter groups.

[0067] The microlens layers MLLx and MLLy may include lens flat layers PLx and PLy in contact with the color filter groups and microlenses MLx and MLy on the lens flat layers PLx and PLy. The lens flat layers PLx and PLy may include recessed lens portions 47x and 47y recessed toward the substrate 100. The microlenses MLx and MLy may be spaced apart from each other.

[0068] For example, one microlens MLx, MLy may overlap one photoelectric conversion unit PD. For example, one microlens MLx, MLy may overlap multiple photoelectric conversion units PD. For example, one microlens MLx, MLy may overlap four photoelectric conversion units PD arranged clockwise.

[0069] 4 and 5, the image sensor at the center pixel area X and edge pixel area Y will be described in more detail.

[0070] Referring to FIG. 4, the image sensor will be described in more detail with respect to the central pixel region X. The central pixel region X may be defined as a pixel region at the center of a substrate, for example, in a plan view. The central pixel region X may include a central color filter group on the central pixel region X. The central color filter group may include a plurality of central color filters CFx. The central pixel region X may include a plurality of photoelectric conversion units PD corresponding to each of the central color filters CFx.

[0071] The photoelectric conversion unit PD and the center color filter CFx may not be shifted in the central pixel region X. The center color filter CFx may be provided to completely overlap with the photoelectric conversion unit PD. For example, the photoelectric conversion unit PD may be defined between adjacent deep device isolation patterns DTI in the central pixel region X, and the center color filter CFx may be provided between adjacent grid structures GPx overlapping the deep device isolation patterns DTI. In the central pixel region X, the grid structure GPx may include a light-shielding pattern 48x and a low-refractive pattern 50x.

[0072] In the central pixel area X, a microlens layer MLLx may be provided on the central color filter CFx.

[0073] A microlens MLx may be provided on the lens flat film PLx in the central pixel area X. There may be no interface between the lens flat film PLx and the microlens MLx. The lens flat film PLx and the microlens MLx may be physically integral.

[0074] The lens flat layer PLx of the microlens layer MLLx in the central pixel region x may include a depressed lens portion 47x. The depressed lens portion 47x may be defined as a recess (or hole) in the lens flat layer PLx recessed toward the substrate 100. The depressed lens portion 47x may be disposed between adjacent spaced apart microlenses MLx in a planar view.

[0075] For example, the depressed lens portion 47x may have a truncated elliptical shape. In this case, the inner wall of the depressed lens portion 47x may have a curved surface. The curvature of the microlens MLx may be different from that of the depressed lens portion 47x. For example, the curvature of the microlens MLx may be smaller than that of the depressed lens portion 47x.

[0076] Although not shown, for example, the recessed lens portion 47x may have a shape in which its width is uniformly narrowed as it approaches the substrate, and in this case, the inner wall of the recessed lens portion 47x may have a flat surface.

[0077] A depressed lens center point 47CPx may be defined at the bottom of the depressed portion of the depressed lens portion 47x. The vertical distance from the depressed lens center point 47CPx to the level of the upper surface of the lens flat layer PLx may be defined as a depressed lens height 47xH. The height PLxH of the lens flat layer PLx may be greater than the depressed lens height 47xH. The depressed lens portion 47x may be spaced apart from the grid structure GPx and the center color filter CFx. The lens flat layer PLx may contact the grid structure GPx and the center color filter CFx.

[0078] In the central pixel region X, the depressed lens portion 47x, the grid structure GPx, and the deep isolation pattern DTI may be overlapped.

[0079] In the central pixel region X, the grid center line GPxCL of the grid structure GPx, the depressed lens center point 47CPx, and the isolation center line DTICL of the deep isolation pattern DTI may be aligned vertically. In the central pixel region X, the grid center line GPxCL of the grid structure GPx, the depressed lens center point 47CPx, and the isolation center line DTICL of the deep isolation pattern DTI may overlap each other.

[0080] Referring to FIG. 5, the image sensor will be described in more detail with respect to the edge pixel region Y. The edge pixel region Y may be defined as a region surrounding the central pixel region X of the substrate in a plan view, for example. The edge pixel region Y may include an edge color filter group on the edge pixel region Y. The edge color filter group may include a plurality of edge color filters CFy. The edge pixel region Y may include a plurality of photoelectric conversion units PD corresponding to each of the edge color filters CFy.

[0081] The photoelectric conversion unit PD and the edge color filter CFy may be shifted in the edge pixel region Y. The edge color filter CFy may be provided to partially overlap with the photoelectric conversion unit PD. For example, the photoelectric conversion unit PD may be defined between adjacent deep device isolation patterns DTI in the edge pixel region Y, and the center color filter CFy may be provided between adjacent grid structures GPy that overlap with the deep device isolation patterns DTI. In the edge pixel region Y, the grid structure GPy may include a light-shielding pattern 48y and a low-refractive pattern 50y.

[0082] In the edge pixel region Y, the edge color filter CFy may overlap the deep element isolation pattern DTI and the photoelectric conversion unit PD. The photoelectric conversion unit PD may overlap the grid structure GPy.

[0083] In the edge pixel region Y, a microlens layer MLLy may be provided on the edge color filter CFy.

[0084] A microlens MLy may be provided on the lens flat film PLy in the edge pixel region Y. There may be no interface between the lens flat film PLy and the microlens MLy. The lens flat film PLy and the microlens MLy may be physically integral.

[0085] The lens flat layer PLy of the microlens layer MLLy in the edge pixel region Y may include a depressed lens portion 47y. The depressed lens portion 47y may be defined as a recess (or hole) where the lens flat layer PLy is depressed toward the substrate 100. The depressed lens portion 47y may be disposed between adjacent spaced apart microlenses MLy in a planar view.

[0086] For example, the depressed lens portion 47y may have an elliptical shape. In this case, the inner wall of the depressed lens portion 47y may have a curved surface. The curvature of the microlens MLy may be different from that of the depressed lens portion 47y. For example, the curvature of the microlens MLy may be smaller than that of the depressed lens portion 47y.

[0087] Although not shown, for example, the width of the depressed lens portion 47x may be gradually narrowed as it approaches the substrate, and the inner wall of the depressed lens portion 47y may have a flat surface.

[0088] A depressed lens center point 47yCP may be defined at the bottom of the depressed portion of the depressed lens portion 47y in the edge pixel region Y. The vertical distance from the depressed lens center point 47yCP to the level of the upper surface of the lens flat layer PLy may be defined as the depressed lens height 47yH. The height PLxH of the lens flat layer PLx may be greater than the depressed lens height 47xH. The depressed lens portion 47y may be spaced apart from the grid structure GPy and the edge color filter CFy. The lens flat layer PLy may be in contact with the grid structure GPy and the edge color filter CFy.

[0089] In the edge pixel region Y, the depressed lens portion 47y may not overlap the deep element isolation pattern DTI. The depressed lens portion 47y may overlap the edge color filter CFy. The depressed lens portion 47y may overlap the photoelectric conversion portion PD. The depressed lens portion 47y may not overlap the grid structure GPy.

[0090] In the edge pixel region Y, the grid structure GPy may overlap with the photoelectric conversion unit PD, the grid structure GPy may overlap with the microlens MLy, and the grid structure GPy may not overlap with the deep element isolation pattern DTI.

[0091] In the edge pixel region Y, the grid center line GPyCL of the grid structure GPy and the isolation center line DTICL of the deep isolation pattern DTI may not be aligned in a straight line from a vertical perspective. The grid center line GPyCL and the depressed lens center point 47yCP may not be aligned in a straight line from a vertical perspective. In the edge pixel region Y, the grid center line GPyCL of the grid structure GPy, the depressed lens center point 47yCP, and the isolation center line DTICL of the deep isolation pattern DTI may not overlap each other. The depressed lens center point 47yCP may overlap the edge color filter CFy and the photoelectric conversion unit PD. The isolation center line DTICL may overlap the edge color filter CFy. The grid center line GPyCL may overlap the microlens MLy and the photoelectric conversion unit PD.

[0092] Figure 6 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line A-A' in Figure 3B. Figure 7 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line B-B' in Figure 3B. For ease of explanation, differences from the above will be mainly described.

[0093] 6 and 7, an image sensor according to some embodiments of the present invention is provided.

[0094] The image sensor according to the embodiment of the present invention may include, from a vertical perspective, a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30.

[0095] The photoelectric conversion layer 10 may include an isolation film 105, a deep isolation pattern DTI, a photoelectric conversion region PD, and a floating diffusion region FD.

[0096] The pixel circuit layer 20 may include wiring 60 and an interlayer dielectric film ILD.

[0097] The light-transmitting layer 30 may include an anti-reflection film 42, grid structures GPxa, GPya, color filters CFx, CFy, microlens layers MLLxa, MLLya, and top planar layers TLxa, TLya on the microlens layers MLLxa, MLLya. The top planar layers TLxa, TLya may include top recesses 57xa, 57ya that are recessed toward the substrate.

[0098] The refractive index of the top flat layers TLxa and TLya can be smaller than the refractive index of the microlens layers MLLxa and MLLya and larger than the refractive index of air.

[0099] One microlens MLxa or MLya can correspond to one photoelectric conversion unit PD.

[0100] Referring to FIG. 6, the image sensor in the central pixel region X is illustrated in more detail. The microlens layer MLLxa may include a lens flat layer PLxa in contact with the color filter group and a microlens MLxa on the lens flat layer PLxa. The lens flat layer PLxa may have an exposed flat upper surface FSxa. The multiple microlenses MLxa may be spaced apart from one another. A flat upper surface FSxa of the lens flat layer PLxa may be provided between the spaced apart microlenses MLxa. The flat upper surface FSxa of the lens flat layer PLxa may have a flat surface.

[0101] The microlens MLxa may have a lens center point MLxaTP defined at the top of the microlens MLxa. In a plan view, the lens center point MLxaTP may be located at the center of the microlens MLxa.

[0102] The exact center point of the flat upper surface FSxa of the lens flat film PLxa can be defined as the flat upper surface center point FSxaCP. In other words, the center point defined at the same distance from one end and the other end of the flat upper surface FSxa can be defined as the flat upper surface center point FSxaCP.

[0103] A top planar layer TLxa may be provided on the microlens layer MLLxa. The top planar layer TLxa may be provided to be in full contact with the microlens layer MLLxa. The top planar layer TLxa may be in full contact with the top surface of the microlens layer MLLxa. The top surface of the microlens layer MLLxa may be in direct contact with the top planar layer TLxa.

[0104] The top flat layer TLxa may include an upper end depression 57xa, which may be defined as a recess (or hole) in which a portion of the top flat layer TLxa is depressed toward the substrate 100. The upper end depression 57xa may have a depression center point 57xaCP defined at the bottom of the upper end depression 57xa. The depression center point 57xaCP may be defined as the point of the top end depression 57xa that is closest to the substrate 100.

[0105] The upper recess 57xa may have a shape of a part of an ellipse. The upper recess 57xa may have a shape recessed in a curved line toward the substrate 100. The inner wall of the upper recess 57xa may have a curved surface. The inner wall of the upper recess 57xa may include a curved wall. The curvature of the microlens MLx may be different from the curvature of the upper recess 57xa. For example, the curvature of the microlens MLx may be smaller than the curvature of the upper recess 57xa.

[0106] The vertical distance from the first surface 100A of the substrate 100 to the depression center point 57xaCP of the upper depression 57xa may be defined as a first distance L1. The vertical distance from the first surface 100A of the substrate 100 to the lens center point MLxaTP of the microlens MLxa may be defined as a second distance L2. The first distance L1 may be smaller than the second distance L2. In other words, the vertical distance from the first surface 100A of the substrate 100 to the depression center point 57xaCP of the upper depression 57xa may be smaller than the vertical distance from the first surface 100A of the substrate 100 to the lens center point MLxaTP of the microlens MLxa. In a planar view, the lens center point MLxaTP of the microlens MLxa may be located between adjacent, spaced-apart depression centers 57xaCP. The distances from the lens center point MLxaTP to the spaced-apart depression centers 57xaCP may be the same.

[0107] In the central pixel region X, the upper recess 57xa, the flat top surface FSxa, and the deep isolation pattern DTI may overlap. The depression center point 57xaCP of the upper recess 57xa, the center point FSxaCP of the flat top surface, and the isolation center line DTICL of the deep isolation pattern DTI may be aligned vertically. In a plan view, a microlens MLxa may be disposed between a plurality of adjacently spaced depression center points 57xaCP. The grid structure GPx may overlap the flat top surface FSxa and the upper recess 57xa of the lens flat film PLxa. The lens center point MLxaTP may overlap the central color filter CFx.

[0108] 7, the image sensor is illustrated in more detail in the edge pixel region Y. For ease of explanation, differences from the center pixel region X will be mainly described.

[0109] In the edge pixel region Y, the photoelectric conversion unit PD and the edge color filter CFy can be shifted. The edge color filter CFy and the microlens layer MLLya can be shifted. The microlens layer MLLya and the top flat layer TLya can be shifted.

[0110] The upper recess 57ya, the flat top surface FSya, and the deep isolation pattern DTI may not overlap in the edge pixel region Y. The recess center point 57yaCP of the upper recess 57ya, the center point FSyaCP of the flat top surface FSxa, and the isolation center line DTICL of the deep isolation pattern DTI may be located on different lines in the vertical direction.

[0111] In the edge pixel region Y, the upper recess 57ya may overlap the microlens MLya, the edge color filter CFy, and the photoelectric conversion unit PD. The grid structure GPy may overlap the photoelectric conversion unit PD and the microlens MLya. The deep element isolation pattern DTI may overlap the edge color filter CFy and the microlens MLya.

[0112] The curvature of upper depression 57xa in central pixel region X may be different from the curvature of upper depression 57ya in edge pixel region Y. For example, the curvature of upper depression 57xa in central pixel region X may be greater than the curvature of upper depression 57ya in edge pixel region Y. The width of the top of upper depression 57xa in central pixel region X may be smaller than the width of the top of upper depression 57ya in edge pixel region Y.

[0113] In a plan view, the lens center point MLyaTP of the microlens MLya may be located between adjacently spaced recessed center points 57yaCP. The distances from the lens center point MLyaTP to the spaced recessed center points 57yaCP may vary. The lens center point MLyaTP may overlap with the edge color filter CFy.

[0114] The uppermost flat layers TLxa and TLya include the upper end recesses 57xa and 57ya, which refract light that passes through the light transmission layer 30 and reaches the photoelectric conversion layer 10, thereby suppressing crosstalk components.

[0115] 8 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line A-A' in FIG. 3B. FIG. 9 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line B-B' in FIG. For ease of explanation, differences from the above will be mainly described.

[0116] 8 and 9, an image sensor according to some embodiments of the present invention is provided. The image sensor may include, from a vertical perspective, a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30.

[0117] The light-transmitting layer 30 may include an anti-reflection film 42, grid structures GPxb, GPyb, color filters CFx, CFy, microlens layers MLLxb, MLLyb, and top planar layers TLxb, TLyb on the microlens layers MLLxb, MLLyb. The top planar layers TLxb, TLyb may include top recesses 57xb, 57yb recessed toward the substrate.

[0118] Referring to FIG. 8, the image sensor is shown in more detail at the central pixel area X.

[0119] In the central pixel area X, the color filter group, the microlens layer MLLxb, and the top flat layer TLxb do not need to be shifted.

[0120] The microlens layer MLLxb may include a lens flat film PLxb in contact with the color filter group and a microlens MLxb on the lens flat film PLxb. The lens flat film PLxb may have an exposed flat upper surface FSxb.

[0121] The microlens MLxb may have a lens center point MLxbTP. The exact center point of the flat upper surface FSxb of the lens flat film PLxb may be defined as the center point FSxbCP of the flat upper surface.

[0122] A top planar layer TLxb may be provided on the microlens layer MLLxb. The top planar layer TLxb may include a top recess 57xb. The top recess 57xb may have a recess center point 57xbCP defined at the bottom of the top recess 57xb. The recess center point 57xbCP may be defined as the point of the top recess 57xb closest to the substrate 100.

[0123] In the central pixel region X, a microlens MLxb may be disposed between adjacently spaced apart upper recesses 57xb. A lens center point MLxbTP may be disposed between adjacently spaced apart recess center points 57xbCP. The lens center point MLxbTP may overlap with a grid structure GPxb. The lens center point MLxbTP may overlap with a grid center line GPxCL of the grid structure GPxb.

[0124] The upper recess 57xb, the flat top surface FSxa, and the deep element isolation pattern DTI may overlap. The recess center point 57xaCP of the upper recess 57xa, the center point FSxaCP of the flat top surface, and the element isolation center line DTICL of the deep element isolation pattern DTI may be aligned vertically. One microlens MLxb may overlap multiple photoelectric conversion units PD. One microlens MLxb may overlap multiple central color filters CFx. As an example, one microlens MLxb may overlap at least four photoelectric conversion units PD.

[0125] Referring to FIG. 9, the image sensor at edge pixel region Y is shown in more detail.

[0126] In the edge pixel region Y, the color filter group, the microlens layer MLLyb, and the top flat layer TLyb can be shifted.

[0127] The lens center point MLybTP of the microlens MLyb may not overlap with the grid structure GPyb. The lens center point MLybTP may overlap with the edge color filter CFy. The grid structure GPyb may overlap with the microlens MLyb. As an example, one microlens MLyb may overlap with multiple grid structures GPyb.

[0128] The upper recessed portion 57yb, the flat top surface FSyb, and the deep element isolation pattern DTI may not overlap. The recess center point 57ybCP of the upper recessed portion 57yb, the center point FSybCP of the flat top surface, and the element isolation center line DTICL of the deep element isolation pattern DTI may be located on different lines in the vertical direction. One microlens MLyb may overlap multiple photoelectric conversion units PD. One microlens MLy may overlap multiple center color filters CFy. For example, one microlens MLyb may overlap at least four photoelectric conversion units PD. For example, one microlens MLyb may overlap at least four edge color filters CFy.

[0129] 10A and 11A are cross-sectional views corresponding to A-A' in FIG. 3B, illustrating a method of manufacturing an image sensor according to some embodiments of the present invention. 10B and 11B are cross-sectional views corresponding to B-B' in FIG. 3B, illustrating a method of manufacturing an image sensor according to some embodiments of the present invention.

[0130] 4 to 5 of the present invention will be described with reference to Figures 10A, 10B, 11A, and 11B. More specifically, a method for manufacturing an image sensor having a central pixel region X will be described with reference to Figures 10A and 11A, and a method for manufacturing an image sensor having an edge pixel region Y will be described with reference to Figures 10B and 11B.

[0131] 10A , a photoelectric conversion layer 10, a pixel circuit layer 20, an anti-reflection film 42 on the photoelectric conversion layer 10, a grid structure GPx on the anti-reflection film 42, and a central color filter CFx may be provided in a central pixel region X. A preliminary microlens layer pMLLx may be formed on the grid structure GPx and the central color filter CFx. The preliminary microlens layer pMLLx may be applied to completely cover the grid structure GPx and the central color filter CFx.

[0132] A mask pattern MSx and a barcode mask pattern BMSx may be formed on the preliminary microlens layer pMLLx. The mask pattern MSx and the barcode mask pattern BMSx may be spaced apart from each other. The mask pattern MSx and the barcode mask pattern BMSx may be alternately formed spaced apart from each other.

[0133] The mask pattern MSx may be formed of a single photoresist. The barcode mask pattern BMSx may include multiple separated photoresists. The width of one photoresist of the mask pattern MSx may be greater than the width of each of the multiple separated photoresists of the barcode mask pattern BMSx. For example, the width of the photoresists located near the outside of the barcode mask pattern BMSx may be greater than the width of the photoresists located inside.

[0134] The barcode mask pattern BMSx may be provided to overlap the grid structure GPx. The mask pattern MSx may be provided to overlap the center color filter CFx. The center of the barcode mask pattern BMSx may overlap the grid center point GPxCL of the grid structure GPx.

[0135] Referring to FIG. 10B, in the edge pixel region Y, a photoelectric conversion layer 10, a pixel circuit layer 20, an anti-reflection film 42 on the photoelectric conversion layer 10, a grid structure GPy on the anti-reflection film 42, and an edge color filter CFy may be provided.

[0136] A mask pattern MSy and a barcode mask pattern BMSy can be formed on the spare microlens layer pMLLy.

[0137] In the edge pixel region Y, the barcode mask pattern BMSy may be provided to overlap with the grid structure GPy. The mask pattern MSy may be provided to overlap with the edge color filter CFy. The center of the barcode mask pattern BMSy may not overlap with the grid center point GPyCL of the grid structure GPy. In other words, the barcode mask pattern BMSy, the mask pattern MSy, and the spare microlens layer pMLLy may be shifted.

[0138] 11A and 11B, the mask pattern and the barcode mask pattern may be reflowed. The photoresist of the mask pattern and the barcode mask pattern may be melted through the reflow process.

[0139] 11A, the mask pattern MSx and the barcode mask pattern BMSx may be reflowed in the central pixel region X. Through this, the lens mask pattern LMSx may be formed. The upper surface of the lens mask pattern LMSx may include a curved surface.

[0140] The reflowed portion of the barcode mask pattern BMSx may be recessed toward the substrate, i.e., in the first direction D1, to include a concave lens mask pattern LMSx.

[0141] The reflowed portion of the mask pattern MSx may include a lens mask pattern LMSx that bulges in the direction away from the substrate, i.e., in the second direction D2.

[0142] The convex lens mask pattern LMSx may be overlapped with the central color filter CFx, and the concave lens mask pattern LMSx may be overlapped with the grid structure GPx.

[0143] Thereafter, an etch-back process may be performed using the lens mask pattern LMSx as a mask, and the microlens layer MLLx of the central pixel region X of FIG.

[0144] 11B, the mask pattern MSy and the barcode mask pattern BMSy may be reflowed in the edge pixel region Y. As a result, a lens mask pattern LMSy may be formed. The upper surface of the lens mask pattern LMSy may include a curved surface. The reflowed portion of the barcode mask pattern BMSy may be recessed toward the substrate, i.e., in the first direction D1, to form a concave lens mask pattern LMSy.

[0145] The reflowed portion of the mask pattern MSy may include a lens mask pattern LMSy that bulges away from the substrate, i.e., in the second direction D2.

[0146] The convex lens mask pattern LMSy may be overlapped with the edge color filter CFy, and the concave lens mask pattern LMSy may be overlapped with the grid structure GPy.

[0147] Thereafter, an etch-back process may be performed using the lens mask pattern LMSy as a mask, and the microlens layer MLLy in the edge pixel region Y of FIG.

[0148] 12A to 15A are cross-sectional views corresponding to A-A' in FIG. 3B illustrating a method of manufacturing an image sensor according to some embodiments of the present invention. 12B to 15B are cross-sectional views corresponding to B-B' in FIG. 3B illustrating a method of manufacturing an image sensor according to some embodiments of the present invention. For ease of explanation, differences from the above description will be mainly described.

[0149] 12A to 15A and 12B to 15B, a method for manufacturing the image sensor of Figures 6 to 7 according to the present invention will be described. More specifically, a method for manufacturing the image sensor of the center pixel region X of Figure 6 according to the present invention will be described with reference to Figures 12A to 15A, and a method for manufacturing the image sensor of the edge pixel region Y according to the present invention will be described with reference to Figures 12B to 15B.

[0150] 12A , a photoelectric conversion layer 10, a pixel circuit layer 20, an anti-reflection film 42 on the photoelectric conversion layer 10, a grid structure GPx on the anti-reflection film 42, and a central color filter CFx may be provided in a central pixel region X. A preliminary microlens layer pMLLx may be formed on the grid structure GPx and the central color filter CFx. The preliminary microlens layer pMLLx may be applied to completely cover the grid structure GPx and the central color filter CFx.

[0151] A mask pattern MSxa may be provided spaced apart on the spare microlens layer pMLLx, and a portion of the top surface of the spare microlens layer pMLLx may be exposed by the mask pattern MSxa.

[0152] The mask pattern MSxa can be overlapped with the central color filter CFx, and the center of the mask pattern MSxa can be overlapped with the center of the central color filter CFx.

[0153] Referring to FIG. 12B, in the edge pixel region Y, a photoelectric conversion layer 10, a pixel circuit layer 20, an anti-reflection film 42 on the photoelectric conversion layer 10, a grid structure GPy on the anti-reflection film 42, and an edge color filter CFy may be provided.

[0154] A mask pattern MSya may be provided on the spare microlens layer pMLLya. The mask pattern MSya may be overlapped with the edge color filter CFy. The center of the mask pattern MSya may not overlap with the center of the edge color filter CFy.

[0155] 13A, the mask pattern MSxa may be reflowed in the central pixel region X. The reflowed mask pattern MSxa may form a lens mask pattern LMSxa. The upper surface of the lens mask pattern LMSxa may include a curved surface. The reflowed portion of the mask pattern MSxa may include the lens mask pattern LMSxa that bulges away from the substrate, i.e., in the second direction D2.

[0156] The lens mask patterns LMSxa may be spaced apart. The lens mask patterns LMSxa may overlap the central color filters CFx. The centers of the lens mask patterns LMSxa may overlap the centers of the central color filters CFx.

[0157] 13B, the mask pattern MSya may be reflowed in the edge pixel region Y. This may result in the formation of a lens mask pattern LMSya. The upper surface of the lens mask pattern LMSy may include a curved surface. The reflowed portion of the mask pattern MSya may include the lens mask pattern LMSya that bulges away from the substrate, i.e., in the second direction D2.

[0158] The convex lens mask pattern LMSya can be overlapped with the edge color filter CFy, and the center of the lens mask pattern LMSya can be non-overlapping with the center of the edge color filter CFy.

[0159] 14A, an etch-back process may be performed in the central pixel region X using the lens mask pattern LMSxa as a mask. Through this, a microlens layer MLLxa in the central pixel region X may be formed. The microlens layer MLLxa may include a lens planar layer PLxa and microlenses MLxa. The microlens layer MLLxa may be formed such that the flat top surface FSxa is exposed between the microlenses MLxa. The microlens layer MLLxa may be formed such that the center point FSxaCP of the flat top surface FSxa overlaps the grid center point GPxCL of the grid structure GPx.

[0160] 14B, an etch-back process may be performed in the edge pixel region Y using the lens mask pattern LMSya as a mask. Through this, a microlens layer MLLya may be formed in the edge pixel region Y. The microlens layer MLLya may include a lens flat layer PLya and microlenses MLya. The microlens layer MLLya may be formed such that the flat top surface FSya is exposed between the microlenses MLya. The microlens layer MLLya may be formed such that the center point FSyaCP of the flat top surface FSya does not overlap with the grid center point GPyCL of the grid structure GPy. The microlens layer MLLya may be formed so that it is shifted from the edge color filter CFy.

[0161] 15A, a preliminary top planar layer TPLxa may be formed on the microlens layer MLLxa in the central pixel region X. The preliminary top planar layer TPLxa may be formed to cover the entire microlens layer MLLxa. A top barcode mask TBMxa may be formed on the preliminary top planar layer TPLxa. A plurality of top barcode masks TBMxa may be formed spaced apart from each other. A portion of the preliminary top planar layer TPLxa may be exposed.

[0162] The top barcode mask TBMxa may include a plurality of spaced apart photoresists, and the width of the spaced apart photoresists of the top barcode mask TBMxa may be, for example, greater in width at the outermost photoresists than at the innermost photoresists.

[0163] The top barcode mask TBMxa may be provided to overlap the grid structure GPx. The top barcode mask TBMxa may be provided to overlap the center color filter CFx. The center of the top barcode mask TBMxa may be overlapped with the grid center point GPxCL of the grid structure GPx. The center of the top barcode mask TBMxa may be overlapped with the center point FSxaCP of the top plane FSxa.

[0164] 11A, the top barcode mask TBMxa may be reflowed to form a mask pattern (not shown) recessed in the second direction D2, and an etch-back process may be performed using the recessed mask pattern (not shown) as a mask, thereby forming the top recess 57xa of FIG. 6. An image sensor may be formed in the central pixel region X.

[0165] 15B, a preliminary top planar layer TPLya may be formed on the microlens layer MLLya in the edge pixel region Y. The preliminary top planar layer TPLya may be formed to cover the entire microlens layer MLLya. A top barcode mask TBMya may be formed on the preliminary top planar layer TPLya. A plurality of top barcode masks TBMya may be formed at intervals. A portion of the preliminary top planar layer TPLya may be exposed.

[0166] The top barcode mask TBMya may include a plurality of spaced apart photoresists, for example, the width of the photoresists located near the outside may be greater than the width of the photoresists located inside.

[0167] The top barcode mask TBMya may be formed so as not to overlap with the grid center point GPyCL of the grid structure GPy. The center of the top barcode mask TBMya may be formed so as not to overlap with the center point FSyaCP of the top plane FSya. The center of the top barcode mask TBMya may be formed so as not to overlap with the top edge of the microlens MLya. Here, "not overlapping" is considered to mean that the masks may be located on different vertical lines.

[0168] 11B, the top barcode mask TBMya may be reflowed to form a mask pattern (not shown) recessed in the second direction D2, and an etch-back process may be performed using the recessed mask pattern (not shown) as a mask, thereby forming the top recess 57ya of FIG. 7. An image sensor may be formed in the edge pixel region Y.

[0169] Figure 16 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line A-A' in Figure 3B. Figure 17 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line B-B' in Figure 3B. For ease of explanation, differences from the above will be mainly described.

[0170] 16 and 17, an image sensor according to some embodiments of the present invention is provided. The image sensor may include, from a vertical perspective, a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30.

[0171] The light-transmitting layer 30 may include an anti-reflection film 42, grid structures GPxc, GPyc, color filters CFx, CFy, microlens layers MLLxc, MLLyc, and top planar layers TLxc, TLyc on the microlens layers MLLxc, MLLyc. The top planar layers TLxc, TLyc may include top recesses 57xc, 57yc recessed toward the substrate.

[0172] Referring to FIG. 16, the image sensor is illustrated in more detail in the central pixel region X. A top planar layer TLxc is provided on the microlens layer MLLxc. The top planar layer TLxc includes a top recessed portion 57xc. The top recessed portion 57xc may have a recess center point 57xcCP defined at the bottom of the top recessed portion 57xc. The recess center point 57xcCP may be defined as the point of the top recessed portion 57xc closest to the substrate 100.

[0173] The width of the upper recess 57xc may decrease as it approaches the substrate 100. The width of the upper recess 57xc may decrease uniformly as it approaches the substrate 100. The sidewalls of the upper recess 57xc may have sloping sidewalls 57xcSS. The sloping sidewalls 57xcSS may have flat surfaces. The upper recess 57xc may have a depression angle θx. The depression angle θx may be, for example, 0° to 180°.

[0174] The width of the upper recess 57xc decreases steadily as it approaches the substrate 100, and since the inclined sidewall 57xcSS does not include a curved surface, it can have a recess angle θx.

[0175] The upper recess 57xc, the grid structure GPx, and the deep isolation pattern DTI may overlap. The recess center point 57xcCP, the center point of the flat upper surface FSxc of the lens flat layer PLxc, the grid center line GPxCL of the grid structure GPx, and the isolation center line DTICL of the deep isolation pattern DTI may be aligned vertically.

[0176] 17, the image sensor in the edge pixel region Y is illustrated in more detail. A top planar layer TLyc is provided on the microlens layer MLLyc. The top planar layer TLyc includes a top recessed portion 57yc. The top recessed portion 57yc may have a recessed center point 57ycCP defined at the bottom of the top recessed portion 57yc. The recessed center point 57ycCP may be defined as the point of the top recessed portion 57yc closest to the substrate 100.

[0177] The width of the upper recess 57yc may decrease as it approaches the substrate 100. The width of the upper recess 57yc may decrease uniformly as it approaches the substrate 100. The sidewalls of the upper recess 57yc may have inclined sidewalls 57ycSS. The inclined sidewalls 57ycSS may have flat surfaces. The upper recess 57yc may have a depression angle θy. The depression angle θy may be, for example, 0° to 180°.

[0178] The width of the upper recess 57yc decreases steadily toward the substrate 100, and since the inclined sidewall 57ycSS does not include a curved surface, it can have a recess angle θy.

[0179] In the edge pixel region Y, the microlens layer MLLyc and the top flat layer TLyc can be shifted.

[0180] The upper recess 57yc, the flat top surface FSyc, and the deep isolation pattern DTI may not overlap in the edge pixel region Y. The recess center point 57ycCP of the upper recess 57yc, the center point FSycCP of the flat top surface FSyc, and the isolation center line DTICL of the deep isolation pattern DTI may be located on different lines in the vertical direction.

[0181] The width of the top of the upper recess 57xc in the central pixel region X may be different from the width of the top of the upper recess 57yc in the edge pixel region Y. For example, the width of the top of the upper recess 57xc in the central pixel region X may be smaller than the width of the top of the upper recess 57yc in the edge pixel region Y. The depression angle θx in the central pixel region X may be smaller than the depression angle θy in the edge pixel region Y.

[0182] Figure 18 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line A-A' in Figure 3B. Figure 19 is a cross-sectional view of an image sensor according to some embodiments of the present invention, which corresponds to the cross-sectional view taken along line B-B' in Figure 3B. For ease of explanation, differences from the above will be mainly described.

[0183] 18 and 19, an image sensor according to some embodiments of the present invention is provided. The image sensor may include, from a vertical perspective, a photoelectric conversion layer 10, a pixel circuit layer 20, and a light-transmitting layer 30.

[0184] The light-transmitting layer 30 may include an anti-reflection film 42, grid structures GPxd, GPyd, color filters CFx, CFy, microlens layers MLLxd, MLLyd, and top planar layers TLxd, TLyd on the microlens layers MLLxd, MLLyd. The top planar layers TLxd, TLyd may include top recesses 57xd, 57yd that are recessed toward the substrate.

[0185] Referring to Figure 18, the image sensor is illustrated in more detail in the central pixel region X. A top planar layer TLxd is provided on the microlens layer MLLxd. The top planar layer TLxd includes a top recessed portion 57xd. The top recessed portion 57xd may have a recessed center point 57xdCP defined at the center of the bottom surface of the top recessed portion 57xd. The recessed center point 57xdCP may be defined as the point located at the center of the surface of the top recessed portion 57xd that is closest to the substrate 100.

[0186] The width 57xWd of the upper recess 57xd may be constant regardless of the distance from the substrate 100. The sidewalls of the upper recess 57xd may be perpendicular to the substrate 100.

[0187] The upper recess 57xd, the grid structure GPx, and the deep isolation pattern DTI may overlap. The recess center point 57xdCP, the center point of the flat upper surface FSxd of the lens flat layer PLxd, the grid center line GPxCL of the grid structure GPx, and the isolation center line DTICL of the deep isolation pattern DTI may be aligned vertically.

[0188] 19, the image sensor is illustrated in more detail in the edge pixel region Y. A top planar layer TLyd is provided on the microlens layer MLLyd. The top planar layer TLyd includes a top recessed portion 57yd. The top recessed portion 57yd may have a recess center point 57ydCP defined at the center of the bottom surface of the top recessed portion 57yd. The recess center point 57ydCP may be defined as the point located at the center of the surface of the top recessed portion 57yd that is closest to the substrate 100.

[0189] The width 57yWd of the upper recess 57yd may be constant regardless of the distance from the substrate 100. The sidewalls of the upper recess 57yd may be perpendicular to the substrate 100.

[0190] In the edge pixel region Y, the microlens layer MLLyd and the top flat layer TLyd can be shifted.

[0191] The upper recess 57yd, the flat top surface FSyd, and the deep isolation pattern DTI may not overlap in the edge pixel region Y. The recess center point 57ydCP of the upper recess 57yd, the center point FSydCP of the flat top surface FSyd, and the isolation center line DTICL of the deep isolation pattern DTI may be located on different lines in the vertical direction.

[0192] The width 57xWd of the upper recess 57xd in the central pixel region X may be different from the width 57yWd of the upper recess 57yd in the edge pixel region Y. For example, the width 57xWd of the upper recess 57xd in the central pixel region X may be smaller than the width 57yWd of the upper recess 57yd in the edge pixel region Y.

[0193] The above description of the embodiments of the present invention provides examples to explain the present invention. Therefore, the present invention is not limited to the above embodiments, and it is clear that various modifications and variations, such as combining and implementing the above embodiments, can be made by those skilled in the art within the technical concept of the present invention. [Explanation of symbols]

[0194] 10 Photoelectric conversion layer 20 pixel circuit layers 30 Light transmission layer 42 Anti-reflection coating 57xa, 57ya Upper end depression 60 Wiring 100 boards 105 Element isolation membrane AR light receiving area CFx central color filter CFy Edge Color Filter DTI isolation pattern FD Floating diffusion region GPx, GPy grid structures ILD Interlayer insulating film MLLx, MLLy microlens layer PD photoelectric conversion unit PR pixel area R1 pixel array area R2 pad area OB shading area TG Transmission Gate TLxa, TLya: top flat layer X center pixel area Y Edge Pixel Area

Claims

1. a semiconductor substrate including a pixel array region having a central pixel region and edge pixel regions surrounding the central pixel region in a plan view, the semiconductor substrate having a first surface and a second surface opposing each other; a color filter group including a plurality of color filters, the color filter group including a center color filter on the center pixel region and an edge color filter on the edge pixel region; a microlens layer disposed to cover the color filter group; a top planar layer in contact with the entire top surface of the microlens layer; the microlens layer includes a lens flat film in contact with the color filter group and a microlens on the lens flat film; the uppermost planar layer includes an upper end recess that is recessed toward the semiconductor substrate; In the central pixel region, a center point of the exposed flat upper surface of the lens flat layer is vertically overlapped with a center point of the depression defined at the bottom of the upper end depression, In the edge pixel region, the center point of the flat upper surface is on a different vertical line from the center point of the depression.

2. the inner wall of the upper end recessed portion includes a curved wall; The image sensor of claim 1 , wherein a curvature of the top recess in the center pixel region is different from a curvature of the top recess in the edge pixel region.

3. The upper recess has an inclined sidewall, The image sensor of claim 1 , wherein the width of the upper recessed portion decreases as it approaches the semiconductor substrate.

4. The width of the upper end recess is constant, The image sensor of claim 1 , wherein a width of an uppermost end of the upper recess in the center pixel region is smaller than a width of the upper recess in the edge pixel region.

5. further including a plurality of photoelectric conversion units corresponding to the plurality of color filters, The image sensor according to claim 1 , wherein the microlens overlaps at least four photoelectric conversion units.

6. the microlens includes a lens center point defined at a top of the microlens; The image sensor of claim 1 , wherein a vertical distance from the first surface of the semiconductor substrate to the center point of the depression is smaller than a vertical distance from the first surface of the semiconductor substrate to the center point of the lens.

7. the microlenses of the microlens layer include a plurality of microlenses; The plurality of microlenses are spaced apart from one another, The image sensor of claim 1 , wherein a top surface of the microlens is in direct contact with the top planar layer.

8. a plurality of photoelectric conversion units corresponding to the plurality of color filters; a deep element isolation pattern that defines the plurality of photoelectric conversion units, In the central pixel region, the depression center point of the upper depression portion overlaps with the deep device isolation pattern, The image sensor of claim 1 , wherein the recessed center point of the upper recessed portion does not overlap the deep isolation pattern in the edge pixel region.

9. The image sensor of claim 1 , wherein the refractive index of the top planar layer is less than that of the microlens layer and greater than that of air.

10. a semiconductor substrate including a pixel array region having a central pixel region and edge pixel regions surrounding the central pixel region in a plan view, the semiconductor substrate having a first surface and a second surface opposing each other; a color filter group including a plurality of color filters, the color filter group including a center color filter on the center pixel region and an edge color filter on the edge pixel region; a microlens layer disposed to cover the color filter group; a top planar layer on the microlens layer; the microlens layer includes a lens flat film in contact with the color filter group and a microlens on the lens flat film; the uppermost flat layer includes an upper end recess that is recessed toward the semiconductor substrate and a recess center point defined at the bottom of the upper end recess; the microlens includes a lens center point defined at a top of the microlens; An image sensor, wherein a vertical distance from the first surface to the depression center point is smaller than a vertical distance from the first surface to the lens center point.

11. In the central pixel region, the center point of the exposed flat upper surface of the lens flat film is vertically overlapped with the center point of the depression; The image sensor of claim 10 , wherein in the edge pixel region, the center point of the flat upper surface is on a different vertical line from the center point of the depression.

12. Further comprising a grid structure interposed between the plurality of color filters, In the central pixel region, the grid structure overlaps the flat upper surface of the lens flat layer and the upper recessed portion; In the edge pixel region, the grid structure overlaps with the microlens; The image sensor of claim 10 , wherein the planar top surface is defined on the exposed top surface of the lens planar film.

13. a plurality of photoelectric conversion units corresponding to the plurality of color filters; a deep element isolation pattern that defines the plurality of photoelectric conversion units, In the central pixel region, the deep isolation pattern overlaps the exposed flat upper surface of the lens planar layer and the upper recess; The image sensor of claim 10 , wherein in the edge pixel region, the deep isolation pattern overlaps with the edge color filter and the microlens.

14. The upper recess has an inclined sidewall, The image sensor of claim 10 , wherein the width of the upper recessed portion decreases as it approaches the semiconductor substrate.

15. The image sensor of claim 14 , wherein a width of a top of the upper recess in the center pixel region is smaller than a width of a top of the upper recess in the edge pixel region.

16. the inner wall of the upper end recessed portion includes a curved wall; The image sensor of claim 10 , wherein a curvature of the top recess in the center pixel region is different from a curvature of the top recess in the edge pixel region.

17. The image sensor of claim 10 , wherein the refractive index of the top planar layer is less than the refractive index of the microlens layer and greater than the refractive index of air.

18. a semiconductor substrate including a light-receiving region, a light-shielding region, and a pad region, the semiconductor substrate having a first surface and a second surface facing each other; a deep isolation pattern disposed in the semiconductor substrate in the light receiving region and the light blocking region, the deep isolation pattern defining a pixel region; a photoelectric conversion region in the semiconductor substrate that is disposed in the light receiving region and the light blocking region; a color filter group disposed on the second surface; a transmission gate on the first surface; a microlens layer disposed to cover the color filter group; a top planar layer on the microlens layer; The light receiving region is a central pixel region; an edge pixel region surrounding the central pixel region in a plan view; the microlens layer includes a lens flat film in contact with the color filter group and a microlens on the lens flat film; the uppermost flat layer includes an upper end recess that is recessed toward the semiconductor substrate and a recess center point defined at the bottom of the upper end recess; the microlens includes a lens center point defined at a top of the microlens; An image sensor, wherein a vertical distance from the first surface to the depression center point is smaller than a vertical distance from the first surface to the lens center point.

19. In the central pixel region, the deep isolation pattern overlaps the exposed flat upper surface of the lens planar layer and the upper recess; The image sensor of claim 18 , wherein the deep isolation pattern overlaps the microlens in the edge pixel region.

20. The upper recess has an inclined sidewall, The image sensor of claim 18 , wherein the width of the upper recessed portion decreases as it approaches the semiconductor substrate.

Images