Image sensor

The image sensor's innovative conductive layer structure reduces size and enhances electrical characteristics by eliminating a penetrating substrate hole, addressing structural challenges in existing sensors.

JP2025115967APending Publication Date: 2025-08-07SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
JP2025009583
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-19
Filing Date
2025-01-23
Publication Date
2025-08-07

AI Technical Summary

Technical Problem

Existing image sensors face challenges in optimizing electrical characteristics and minimizing size due to complex structural configurations.

Method used

The image sensor incorporates a conductive layer with a first and second conductive portion, where the second portion protrudes towards the substrate, minimizing space and eliminating the need for a penetrating substrate hole in the manufacturing process.

Benefits of technology

This design minimizes the sensor's overall size and improves process margins by simplifying the manufacturing process.

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Abstract

To provide an image sensor whose electric characteristics are improved.SOLUTION: An image sensor according to an embodiment of the present invention includes a substrate including a pixel array region and a pad region, a microlens overlapping the pixel array region, a pad overlapping the pad region, and a conductive film surrounding the pad. The conductive film includes a first conductive part in contact with a lower surface of the pad, and a second conductive part projecting toward a lower surface of the substrate at a lower surface of the first conductive part. The second conductive part is apart from the pad. The lower surface of the pad and the lower surface of the first conductive part are disposed between the lower surface and an upper surface of the substrate.SELECTED DRAWING: Figure 3C
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Description

[Technical Field]

[0001] The present invention relates to an image sensor, and more particularly to an image sensor including a conductive film. [Background technology]

[0002] An image sensor is a device that converts an optical image into an electrical signal. Image sensors can be classified into CCD (Charge Coupled Device) and CMOS (Complementary Metal Oxide Semiconductor) types. CMOS image sensors are abbreviated as CIS (CMOS image sensor). The CIS has a number of pixels arranged two-dimensionally. Each pixel includes a photodiode (PD). The photodiode converts incident light into an electrical signal. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent No. 10,734,429 B2 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of an embodiment of the present invention is to provide an image sensor with improved electrical characteristics. [Means for solving the problem]

[0005] According to some embodiments, an image sensor may include a substrate including a pixel array region and a pad region, a microlens overlapping the pixel array region, a pad overlapping the pad region, and a conductive film surrounding the pad, wherein the conductive film includes a first conductive portion in contact with a lower surface of the pad and a second conductive portion protruding from a lower surface of the first conductive portion toward a lower surface of the substrate, the second conductive portion being spaced apart from the pad, a distance between the lower surface of the substrate and a lower surface of the second conductive portion being smaller than a distance between the lower surface of the substrate and the lower surface of the first conductive portion, a distance between the lower surface of the substrate and the lower surface of the first conductive portion being smaller than a distance between the lower surface of the substrate and the lower surface of the pad, and the lower surface of the pad and the lower surface of the first conductive portion being disposed between the lower surface and the upper surface of the substrate.

[0006] According to some embodiments, the image sensor may include a substrate including a pixel array region and a pad region, a microlens overlapping the pixel array region, a pad overlapping the pad region, a conductive layer surrounding the pad, and a first connecting conductive structure electrically connected to the conductive layer, wherein the conductive layer includes a first conductive portion in contact with a lower surface of the pad and a second conductive portion protruding from a lower surface of the first conductive portion toward a lower surface of the substrate, a lower surface of the second conductive portion in contact with an upper surface of the first connecting conductive structure, and a sidewall of the second conductive portion in contact with the substrate.

[0007] According to some embodiments, the image sensor may include a first substrate including a pixel array region and a pad region, the pixel array region including a photoelectric conversion region, a color filter overlapping the photoelectric conversion region, a lens film on the color filter, a pad overlapping the pad region, a conductive layer surrounding the pad, a second substrate spaced apart from the first substrate, a first insulating structure and a second insulating structure contacting each other between the first substrate and the second substrate, a first bonding pad within the first insulating structure, a second bonding pad disposed within the second insulating structure and contacting the first bonding pad, and a first connecting conductive structure and a second connecting conductive structure electrically connecting the conductive layer to the first bonding pad, the conductive layer including a first conductive portion contacting a lower surface of the pad and a second conductive portion between the first conductive portion and the first connecting conductive structure, the second connecting conductive structure being surrounded by the first insulating structure, and the first connecting conductive structure including a first portion surrounded by the substrate and a second portion surrounded by the first insulating structure. [Effects of the Invention]

[0008] In the image sensor according to the embodiment of the present invention, the space for the structure electrically connected to the pad may be minimized, and the size of the image sensor may be minimized.

[0009] The method for manufacturing an image sensor according to an embodiment of the present invention may improve process margins by eliminating the process of forming a hole that completely penetrates a substrate. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram illustrating an image sensor according to some embodiments. [Figure 2] FIG. 1 is a circuit diagram of an active pixel sensor array of an image sensor according to some embodiments. [Figure 3A] FIG. 1 is a plan view of an image sensor according to some embodiments. [Figure 3B]FIG. 3B is a cross-sectional view taken along line AA' in FIG. 3A. [Figure 3C] FIG. 3B is a cross-sectional view taken along line BB' in FIG. 3A. [Figure 3D] FIG. 3D is an enlarged view of region E in FIG. 3C. [Figure 4A] 3C is a diagram illustrating a method for manufacturing the image sensor according to FIG. 3B. [Figure 4B] 3D is a diagram illustrating a method for manufacturing the image sensor according to FIG. 3C. [Figure 4C] 3D is a diagram illustrating a method for manufacturing the image sensor according to FIG. 3D. [Figure 5] 3D is a diagram illustrating a method for manufacturing the image sensor according to FIG. 3D. [Figure 6] 3D is a diagram illustrating a method for manufacturing the image sensor according to FIG. 3D. [Figure 7] 1 is an enlarged cross-sectional view of an image sensor according to some embodiments. [Figure 8] 1 is an enlarged cross-sectional view of an image sensor according to some embodiments. [Figure 9] 1 is an enlarged cross-sectional view of an image sensor according to some embodiments. [Figure 10] 1 is an enlarged cross-sectional view of an image sensor according to some embodiments. [Figure 11] 1 is a plan view illustrating a conductive layer and a conductive connecting structure of an image sensor according to some embodiments; [Figure 12A] 1 is a cross-sectional view of an image sensor according to some embodiments. [Figure 12B] 1 is a cross-sectional view of an image sensor according to some embodiments. [Figure 13] 1 is an enlarged cross-sectional view of an image sensor according to some embodiments. [Figure 14A] 1 is a cross-sectional view of an image sensor according to some embodiments. [Figure 14B] 1 is a cross-sectional view of an image sensor according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0011] 1 is a block diagram illustrating an image sensor according to some embodiments, and FIG 2 is a circuit diagram of an active pixel sensor array of the image sensor according to some embodiments.

[0012] Referring to FIG. 1, the image sensor may include an active pixel sensor array 1001, a row decoder 1002, a row driver 1003, a column decoder 1004, a timing generator 1005, a correlated double sampler (CDS) 1006, an analog to digital converter (ADC) 1007, and an input / output buffer 1008.

[0013] The active pixel sensor array 1001 includes a plurality of unit pixels arranged two-dimensionally and can convert optical signals into electrical signals. The active pixel sensor array 1001 can be driven by a plurality of driving signals, such as a pixel selection signal, a reset signal, and a charge transfer signal, from a row driver 1003. The converted electrical signals can be provided to a correlated double sampler 1006.

[0014] The row driver 1003 can provide a number of drive signals to the active pixel sensor array 1001 for driving a number of unit pixels according to the results decoded by the row decoder 1002. If the unit pixels are arranged in a matrix, a drive signal can be provided for each row.

[0015] A timing generator 1005 may provide timing and control signals to the row decoder 1002 and the column decoder 1004 .

[0016] The correlated double sampler (CDS) 1006 can receive, hold, and sample the electrical signal generated by the active pixel sensor array 1001. The correlated double sampler 1006 can double sample a specific noise level and a signal level based on the electrical signal, and output a differential level corresponding to the difference between the noise level and the signal level.

[0017] An analog-to-digital converter (ADC) 1007 can convert an analog signal corresponding to the differential level output from the correlated double sampler 1006 into a digital signal and output the digital signal.

[0018] The input / output buffer 1008 latches the digital signals, and the latched signals can be sequentially output to a video signal processor (not shown) according to the decoding results of the column decoder 1004 .

[0019] 1 and 2, the active pixel sensor array 1001 includes a plurality of unit pixels UP, which may be arranged in a matrix. Each unit pixel UP may include a transfer transistor TX. Each unit pixel UP may further include logic transistors RX, SX, and DX. The logic transistor may be a reset transistor RX, a selection transistor SX, or a source follower transistor DX. The transfer transistor TX may include a transfer gate TG. Each unit pixel UP may further include a photoelectric conversion region PD and a floating diffusion region FD. The logic transistors RX, SX, and DX may be shared among a plurality of unit pixels UP.

[0020] The photoelectric conversion region PD can generate and accumulate photocharges in proportion to the amount of light incident from the outside. The photoelectric conversion region PD can include a photodiode, a phototransistor, a photogate, a pinned photodiode, or a combination thereof. The transfer transistor TX can transfer the charges generated in the photoelectric conversion region PD to the floating diffusion region FD. The floating diffusion region FD can transfer and cumulatively store the charges generated in the photoelectric conversion region PD. The source follower transistor DX can be controlled according to the amount of photocharges accumulated in the floating diffusion region FD.

[0021] The reset transistor RX can periodically reset the charge accumulated in the floating diffusion region FD. The drain electrode of the reset transistor RX is connected to the floating diffusion region FD, and the source electrode of the reset transistor RX can be connected to a power supply voltage VDD. When the reset transistor RX is turned on, the power supply voltage VDD connected to the source electrode of the reset transistor RX can be applied to the floating diffusion region FD. Therefore, when the reset transistor RX is turned on, the charge accumulated in the floating diffusion region FD can be discharged, resetting the floating diffusion region FD.

[0022] The source follower transistor DX including the source follower gate electrode SF can act as a source follower buffer amplifier, amplifying the potential change at the floating diffusion region FD and outputting it to the output line Vout.

[0023] A selection transistor SX including a selection gate electrode SEL can select a unit pixel UP to be read out row by row. When the selection transistor SX is turned on, a power supply voltage VDD can be applied to the drain electrode of the source follower transistor DX.

[0024] Figure 3A is a plan view of an image sensor according to some embodiments, Figure 3B is a cross-sectional view taken along line A-A' in Figure 3A, Figure 3C is a cross-sectional view taken along line B-B' in Figure 3A, and Figure 3D is an enlarged view of area E in Figure 3C.

[0025] 3A to 3C, the image sensor may include a sensor chip 10. The sensor chip 10 may include a first substrate 100. The first substrate 100 may have a plate shape extending along a plane defined by a first direction D1 and a second direction D2. The first direction D1 and the second direction D2 may intersect with each other. For example, the first direction D1 and the second direction D2 may be horizontal directions perpendicular to each other.

[0026] The first substrate 100 may be a semiconductor substrate. For example, the first substrate 100 may be a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The first substrate 100 may contain impurities of a first conductivity type. For example, the first substrate 100 may contain aluminum (Al), boron (B), indium (In), or gallium (Ga) as the impurities of the first conductivity type. In some embodiments, the first substrate 100 may be a silicon-on-insulator (SOI) substrate.

[0027] The first substrate 100 may include a pixel array region APS, an optical black region OBR, and a pad region PDR. The pixel array region APS, the optical black region OBR, and the pad region PDR may be planarly separated regions defined by a first direction D1 and a second direction D2. The optical black region OBR may surround the pixel array region APS, and the pad region PDR may surround the optical black region OBR and the pixel array region APS.

[0028] The first substrate 100 may include a bottom surface 102 and a top surface 101 that are opposite to each other. Incident light may be incident on the top surface 101 of the first substrate 100.

[0029] The pixel array region APS of the first substrate 100 may include a plurality of pixel regions PX. The pixel regions PX of the pixel array region APS may output photoelectric signals from incident light. The pixel regions PX may be arranged in a plane within the pixel array region APS.

[0030] The pixel array region APS of the first substrate 100 may include a plurality of photoelectric conversion regions PD. The photoelectric conversion regions PD may be disposed between the upper surface 101 and the lower surface 102 of the first substrate 100. The photoelectric conversion regions PD may be provided within the pixel regions PX of the first substrate 100.

[0031] The photoelectric conversion region PD may contain impurities of a second conductivity type. The second conductivity type may be different from the first conductivity type. For example, the photoelectric conversion region PD may contain phosphorus, arsenic, bismuth, or antimony as the impurity of the second conductivity type. The photoelectric conversion region PD may be adjacent to the upper surface 101 of the first substrate 100.

[0032] The first substrate 100 may include a plurality of floating diffusion regions FD. The floating diffusion regions FD may be provided in the pixel regions PX of the first substrate 100. The floating diffusion regions FD may include impurities of the second conductivity type. The floating diffusion regions FD may be adjacent to the bottom surface 102 of the first substrate 100.

[0033] The sensor chip 10 may include a pixel separating pattern 110. The pixel separating pattern 110 may be provided in the first substrate 100. The pixel separating pattern 110 may extend in a third direction D3 and penetrate the first substrate 100. The third direction D3 may intersect with the first direction D1 and the second direction D2. For example, the third direction D3 may be a vertical direction perpendicular to the first direction D1 and the second direction D2. A pixel region PX may be defined by the pixel separating pattern 110. The pixel separating pattern 110 may have, for example, a grid shape.

[0034] The pixel separating pattern 110 may include a separating conductive layer 111 and a separating insulating layer 112. The separating conductive layer 111 may penetrate the first substrate 100. The separating insulating layer 112 may be interposed between the separating conductive layer 111 and the first substrate 100. The separating conductive layer 111 may include a conductive material. The separating insulating layer 112 may include an insulating material.

[0035] The sensor chip 10 may include an isolation pattern 120. The isolation pattern 120 may be provided in the first substrate 100. The isolation pattern 120 may be disposed adjacent to the lower surface 102 of the first substrate 100. The isolation pattern 120 may define an active region of the first substrate 100. The isolation pattern 120 may include an insulating material.

[0036] The sensor chip 10 may include a first insulating structure 150 covering the lower surface 102 of the first substrate 100. The first insulating structure 150 may cover the active region of the first substrate 100. The first insulating structure 150 may include an insulating material. In some embodiments, the first insulating structure 150 may be a multi-insulating structure including multiple insulating films.

[0037] The sensor chip 10 may include a transfer gate TG and a gate insulating film GI. The transfer gate TG may be provided between the first substrate 100 and the first insulating structure 150. The transfer gate TG and the gate insulating film GI may penetrate the lower surface 102 of the first substrate 100. The transfer gate TG may include a conductive material. For example, the transfer gate TG may include polysilicon doped with boron (B), arsenic (As), or phosphorus (P). The gate insulating film GI may be provided between the transfer gate electrode TG and the first substrate 100. The gate insulating film GI may include an insulating material.

[0038] A first contact 130, a first conductive line 140, and a first bonding pad BP1 may be provided within the first insulating structure 150. At least one of the first contacts 130 may be coupled to the floating diffusion region FD. The first conductive line 140 may be coupled to the first contact 130. The first bonding pad BP1 may be coupled to the first contact 130. The first contact 130, the first conductive line 140, and the first bonding pad BP1 may include a conductive material.

[0039] The sensor chip 10 may include a first protective film 161 on the upper surface 101 of the first substrate 100, a fixed charge film 162 on the first protective film 161, and a second protective film 163 on the fixed charge film 162. The first protective film 161 and the fixed charge film 162 may extend to the optical black region OBR in the pixel array region APS. A third protective film 163 may be disposed on the pixel array region APS.

[0040] The first protective film 161 and the second protective film 163 may include an insulating material. For example, the first protective film 161 and the second protective film 163 may include aluminum oxide.

[0041] The fixed charge layer 162 may have negative fixed charges and may cause hole accumulation. The fixed charge layer 162 may effectively reduce dark current and white spots on the first substrate 100. In some embodiments, the fixed charge layer 162 may be a multi-layer structure including multiple layers. For example, the fixed charge layer 162 may include a first layer including hafnium oxide, a second layer including silicon oxide, a third layer including silicon nitride, and a fourth layer including hafnium oxide.

[0042] The sensor chip 10 may include a fence pattern 164 on the fixed charge film 162. The fence pattern 164 may be disposed on the pixel array region APS. The fence pattern 164 may separate color filters CF (described later) from one another. For example, the fence pattern 164 may have a grid shape. In some embodiments, the fence pattern 164 may be a single metal film, a single insulating film, or a multi-film including a metal film and an insulating film. The metal film may include, for example, tungsten. The insulating film may include, for example, an oxide. In some embodiments, the fence pattern 164 may further include an empty space. The empty space may be filled with, for example, air.

[0043] The sensor chip 10 may include a light-shielding film 265 on the fixed charge film 162. The light-shielding film 265 may be disposed on the optical black area OBR. The light-shielding film 265 may include a conductive material. In some embodiments, the light-shielding film 265 may include the same material as the fence pattern 164. For example, the light-shielding film 265 may include tungsten.

[0044] The sensor chip 10 may include a connection contact 266. The connection contact 266 may be disposed on the optical black area OBR. The connection contact 266 may overlap the pixel separating pattern 110 in the third direction D3. The connection contact 266 may include a conductive material. For example, the connection contact 266 may include aluminum.

[0045] The sensor chip 10 may include a pad 290. The pad 290 may be disposed on the pad region PDR. The pad 290 may overlap the pad region PDR in the third direction D3. The pad 290 may include a conductive material. For example, the pad 290 may include aluminum.

[0046] A conductive film 280, a first material film 271, and a second material film 272 may be provided to separate the pad 290 from the first substrate 100. At least a portion of each of the conductive film 280, the first material film 271, and the second material film 272 may be provided between the first substrate 100 and the pad 290. The first material film 271 and the second material film 272 may extend from the pad region PDR to the optical black region OBR. The conductive film 280 may be provided on the pad region PDR.

[0047] In some embodiments, the conductive film 280 may include the same conductive material as the light-shielding film 265. The first material film 271 and the second material film 272 may include different insulating materials. In some embodiments, the first material film 271 may include the same insulating material as the first passivation film 161. In some embodiments, the second material film 272 may include the same material as the fixed charge film 162. For example, the second material film 272 may include a first film including hafnium oxide, a second film including silicon oxide, a third film including silicon nitride, and a fourth film including hafnium oxide.

[0048] The sensor chip 10 may include color filters CF. The color filters CF may be disposed on the pixel array region APS. The color filters CF may overlap the photoelectric conversion region PD of the pixel array region APS in the third direction D3. The color filters CF may be disposed on the pixel region PX. Each of the color filters CF may be one of a red filter, a blue filter, and a green filter. The color filters CF may form a color filter array. For example, the color filters CF may be two-dimensionally arranged in a Bayer pattern.

[0049] The sensor chip 10 may include a third protective layer 261. The third protective layer 261 may extend from the optical black region OBR to the pad region PDR. The third protective layer 261 may be provided on the light-shielding layer 265, the connection contact 266, and the conductive layer 280. The light-shielding layer 265 and the conductive layer 280 may be separated by the third protective layer 261. In some embodiments, the third protective layer 261 may include the same insulating material as the second protective layer 163. For example, the third protective layer 261 may include aluminum oxide.

[0050] The sensor chip 10 may include a filtering film 262 on the third protective film 261. The filtering film 262 may be disposed on the optical black area OBR. The filtering film 262 may block light of a different wavelength than the color filter CF.

[0051] The sensor chip 10 may include a lens film 170. The lens film 170 may be disposed on the pixel array region APS. The lens film 170 may be disposed on the color filter CF. The lens film 170 may be transparent. The lens film 170 can transmit light. The lens film 170 may include an organic material. For example, the lens film 170 may include a photoresist material or a thermosetting resin.

[0052] The lens film 170 may include a base portion 173 on the color filter CF and microlenses 172 on the base portion 173. The microlenses 172 may be portions that protrude from the base portion 173 in the third direction D3. The microlenses 172 may be connected to the base portion 173 without a boundary. The microlenses 172 and the base portion 173 may form an integrated structure.

[0053] The microlenses 172 may overlap the pixel array region APS in the third direction D3. The microlenses 172 may be disposed on the pixel regions PX. The microlenses 172 may be provided at positions corresponding to the photoelectric conversion regions PD.

[0054] The sensor chip 10 may include a coating film 171 on the lens film 170. The coating film 171 may be transparent. The coating film 171 may conformally cover the upper surface of the lens film 170.

[0055] The sensor chip 10 may include a first cover film 263 and a second cover film 264. The first cover film 263 and the second cover film 264 may be provided on the optical black area OBR and the pad area PDR. The first cover film 263 may be provided on the filtering film 262 and the third protective film 261. The first cover film 263 may include the same material as the lens film 170.

[0056] A second cover film 264 may be provided on the first cover film 263. The second cover film 264 may include the same material as the coating film 171.

[0057] The sensor chip 10 may include a first connecting conductive structure 220 in contact with the conductive film 280, a second connecting conductive structure 230 in contact with each of the first connecting conductive structures 220, a third connecting conductive structure 240 in contact with the second connecting conductive structure 230, and a fourth connecting conductive structure 250 in contact with the third connecting conductive structure 240. The first to fourth connecting conductive structures 220, 230, 240, and 250 may be sequentially arranged in the opposite direction of the third direction D3. The first to fourth connecting conductive structures 220, 230, 240, and 250 may include a conductive material. The first to fourth connecting conductive structures 220, 230, 240, and 250 may be surrounded by a first insulating structure 150.

[0058] The sensor chip 10 may include a first insulating film 210 between the first insulating structure 150 and the first substrate 100. The first insulating film 210 may surround the first connecting conductive structure 220. The first insulating film 210 may include an insulating material. For example, the first insulating film 210 may include an oxide.

[0059] The image sensor may include a sub-chip 30. The sub-chip 30 may include a second substrate 300. The second substrate 300 may be a semiconductor substrate. In some embodiments, the second substrate 300 may be an SOI substrate. The second substrate 300 may be spaced apart from the first substrate 100 in a third direction D3.

[0060] The sub-chip 30 may include a second insulating structure 310 on the second substrate 300. The second insulating structure 310 may cover the active region of the second substrate 300. The second insulating structure 310 may include an insulating material. In some embodiments, the second insulating structure 310 may be a multi-insulating structure including multiple insulating films.

[0061] The sub-chip 30 may include a first electronic element 320 between the second substrate 300 and the second insulating structure 310. The first electronic element 320 may include at least one of a selection transistor, a reset gate, or a source follower gate.

[0062] The sub-chip 30 may include second contacts 330, second conductive lines 340, and second bonding pads BP2 within the second insulating structure 310. At least one of the second contacts 330 may be coupled to the first electronic component 320. The second conductive lines 340 may be coupled to the second contacts 330. The second bonding pads BP2 may be coupled to the second contacts 330. The second contacts 330, the second conductive lines 340, and the second bonding pads BP2 may include a conductive material.

[0063] The sensor chip 10 may be hybrid-bonded to the subchip 30. The lower surface of the first insulating structure 150 may be in contact with the upper surface of the second insulating structure 310. The first insulating structure 150 and the second insulating structure 310 may be disposed between the first substrate 100 and the second substrate 300. The lower surface of the first bonding pad BP1 may be in contact with the upper surface of the second bonding pad BP2.

[0064] The sub-chip 30 may further include a spacer 360 and a through via 350. The spacer 360 may be provided in the second substrate 300. The spacer 360 may penetrate the second substrate 300 in the third direction D3. The spacer 360 may include an insulating material. For example, the spacer 360 may include silicon oxide or silicon nitride.

[0065] The through via 350 may be provided within the spacer 360. The through via 350 may penetrate the second substrate 300 and the spacer 360 in the third direction D3. The spacer 360 may surround the through via 350. The through via 350 may be spaced apart from the second substrate 300 by the spacer 360. The through via 350 may include a conductive material. For example, the through via 350 may include copper. The through via 350 may be connected to the second contact 330.

[0066] The image sensor may include a circuit chip 50. The circuit chip 50 may include a third substrate 500. The third substrate 500 may be a semiconductor substrate. In some embodiments, the third substrate 500 may be an SOI substrate. The third substrate 500 may be spaced apart from the second substrate 300 in a third direction D3.

[0067] The circuit chip 50 may include a third insulating structure 510 on the third substrate 500. The third insulating structure 510 may cover the active region of the third substrate 500. The third insulating structure 510 may include an insulating material. In some embodiments, the third insulating structure 510 may be a multi-insulating structure including multiple insulating films.

[0068] The circuit chip 50 may include a second electronic component 520 between the third substrate 500 and the third insulating structure 510. The second electronic component 520 may include at least one of an analog-to-digital converter or a logic circuit.

[0069] The circuit chip 50 may include a third bonding pad BP3, a third contact 530, and a third conductive line 540 within the third insulating structure 510. At least one of the third contacts 530 may be coupled to the second electronic component 520. The third conductive line 540 may be coupled to the third contact 530. The third bonding pad BP3 may be coupled to the through via 350 and the third contact 530. An upper surface of the third bonding pad BP3 may contact a lower surface of the through via 350. The third contact 530 and the third conductive line 540 may include a conductive material.

[0070] An upper surface of the third insulating structure 510 may contact a lower surface of the second substrate 300. The conductive layer 280 may be electrically connected to the second electronic component 520 through the first to fourth connecting conductive structures 220, 230, 240, and 250, the first contact 130, the first bonding pad BP1, the second bonding pad BP2, the second contact 330, the second conductive line 340, the through via 350, the third bonding pad BP3, the third conductive contact 530, and the third conductive line 540.

[0071] 3D, the first insulating structure 150 may include a first interlayer insulating film 151, a second interlayer insulating film 152 on the first interlayer insulating film 151, a third interlayer insulating film 153 on the second interlayer insulating film 152, a fourth interlayer insulating film 154 on the third interlayer insulating film 153, a fifth interlayer insulating film 155 on the fourth interlayer insulating film 154, a sixth interlayer insulating film 156 on the fifth interlayer insulating film 155, and a second insulating film 157 on the sixth interlayer insulating film 156. The first to sixth interlayer insulating films 151, 152, 153, 154, 155, 156 and the second insulating film 157 may include an insulating material. The second insulating film 157 may include, for example, an oxide or a nitride.

[0072] The fourth connecting conductive structure 250 may penetrate the third interlayer insulating film 153 and the fourth interlayer insulating film 154. The fourth connecting conductive structure 250 may include a barrier film 251 and a metal film 252. The barrier film 251 of the fourth connecting conductive structure 250 may be in contact with the third connecting conductive structure 240. The metal film 252 of the fourth connecting conductive structure 250 may be in contact with the first contact 130. The barrier film 251 of the fourth connecting conductive structure 250 may surround the metal film 252 of the fourth connecting conductive structure 250. The barrier film 251 and the metal film 252 of the fourth connecting conductive structure 250 may include different conductive materials. The metal film 252 of the fourth connecting conductive structure 250 may include, for example, copper, and the barrier film 251 of the fourth connecting conductive structure 250 may include, for example, titanium.

[0073] The fourth connecting conductive structure 250 may include one lower portion and multiple upper portions. The upper portion of the fourth connecting conductive structure 250 may be connected to the lower portion. The upper portion of the fourth connecting conductive structure 250 may contact the third connecting conductive structure 240. A portion of the third interlayer insulating film 153 may be interposed between the upper portions of the fourth connecting conductive structures 250. A portion of the fourth interlayer insulating film 154 may be interposed between the upper portions of the fourth connecting conductive structures 250. The width of the lower portion of the fourth connecting conductive structure 250 in the first direction D1 may become smaller as the lower portion is closer to the lower surface 102 of the first substrate 100.

[0074] The third connecting conductive structure 240 may penetrate the fifth interlayer insulating film 155. The third connecting conductive structure 240 may include a barrier film 241 and a metal film 242. The barrier film 241 of the third connecting conductive structure 240 may be in contact with the second connecting conductive structure 230. The metal film 242 of the third connecting conductive structure 240 may be in contact with the barrier film 251 of the fourth connecting conductive structure 250. The barrier film 241 of the third connecting conductive structure 240 may surround the metal film 242 of the third connecting conductive structure 240. The barrier film 241 and the metal film 242 of the third connecting conductive structure 240 may include different conductive materials. The metal film 242 of the third connecting conductive structure 240 may include, for example, copper, and the barrier film 241 of the third connecting conductive structure 240 may include, for example, titanium. The closer the third connecting conductive structure 240 is to the lower surface 102 of the first substrate 100, the smaller its width in the first direction D1 may be.

[0075] The second connecting conductive structures 230 may penetrate the sixth interlayer insulating film 156 and the second insulating film 157. The second connecting conductive structures 230 may be arranged spaced apart from each other in the first direction D1. The lower surfaces of the second connecting conductive structures 230 may contact the upper surfaces of the third connecting conductive structures 240. The second connecting conductive structures 230 may include a different conductive material from that of the third connecting conductive structure 240. For example, the second connecting conductive structures 230 may include tungsten.

[0076] The width of the second connecting conductive structure 230 in the first direction D1 may be smaller as it approaches the bottom surface 102 of the first substrate 100. The width of the second connecting conductive structure 230 in the first direction D1 may be smaller than the width of the third connecting conductive structure 240 in the first direction D1.

[0077] The first connecting conductive structures 220 may be arranged spaced apart from each other in the first direction D1. The first connecting conductive structures 220 may penetrate the lower surface 102 of the first substrate 100. The first connecting conductive structures 220 may include a portion disposed at a lower level than the lower surface 102 of the first substrate 100 and a portion disposed at a higher level than the lower surface 102 of the first substrate 100. The first connecting conductive structures 220 may overlap the second connecting conductive structures 230 in the third direction D3. The width of the first connecting conductive structures 220 in the first direction D1 may be smaller than the width of the third connecting conductive structures 240 in the first direction D1. In some embodiments, the first connecting conductive structures 220 may include the same conductive material as the second connecting conductive structures 230. For example, the first and second connecting conductive structures 220, 230 may include tungsten. In some embodiments, the first connecting conductive structures 220 may include a different conductive material than the second connecting conductive structures 230. As an example, the first connection conductive structure 220 may include polysilicon doped with boron (B), arsenic (As), or phosphorus (P), and the second connection conductive structure 230 may include tungsten. In some embodiments, the first connection conductive structure 220 may include the same conductive material as the transmission gate TG.

[0078] The first connecting conductive structure 220 may include a first portion 222 and a second portion 221 on the first portion 222. The width of the first portion 222 of the first connecting conductive structure 220 in the first direction D1 may be greater than the width of the second portion 221 of the first connecting conductive structure 220 in the first direction D1. The width of the second portion 221 of the first connecting conductive structure 220 in the first direction D1 may become smaller as it approaches a lower surface 283_B of a third conductive part 283, which will be described later.

[0079] The second insulating film 157 may contact the lower surface 222_B and the sidewall 222_S of the first portion 222 of the first connecting conductive structure 220. The first insulating film 210 may contact the sidewall 221_S of the second portion 221 of the first connecting conductive structure 220 and the upper surface 222_T of the first portion 222 of the first connecting conductive structure 220. The first insulating film 210 may contact the lower surface 102 of the first substrate 100. The upper surface 210_T of the first insulating film 210 may contact the lower surface 283_B of the third conductive portion 283, which will be described later. In some embodiments, the first insulating film 210 may be spaced apart from the lower surface 283_B of the third conductive portion 283, and at least a portion of the sidewall 221_S of the second portion 221 of the first connecting conductive structure 220 may contact the first substrate 100. An upper surface 221_T of the second portion 221 of the first connecting conductive structure 220 may contact a lower surface 283_B of the third conductive portion 283. A width of the upper surface 221_T of the second portion 221 of the first connecting conductive structure 220 in the first direction D1 may be smaller than a width of the lower surface 283_B of the third conductive portion 283 in the first direction D1. The first portion 222 of the first connecting conductive structure 220 may be surrounded by the second insulating film 157 of the first insulating structure 150. The second portion 221 of the first connecting conductive structure 220 may be surrounded by the first substrate 100 and the first insulating film 210.

[0080] The level of the first connecting conductive structure 220 may be the same as the level of the transmission gate TG. The level of the bottom surface 222_B of the first portion 222 of the first connecting conductive structure 220 may be the same as the level of the bottom surface of the transmission gate TG. The level of the top surface 221_T of the second portion 221 of the first connecting conductive structure 220 may be the same as the level of the top surface of the transmission gate TG. The width of the first portion 222 of the first connecting conductive structure 220 in the first direction D1 may be greater than the width of the second connecting conductive structure 230 in the first direction D1.

[0081] The second insulating layer 157 may include a portion interposed between the first portions 222 of the first connecting conductive structures 220. The sixth interlayer insulating layer 156 may include a portion interposed between the first portions 222 of the first connecting conductive structures 220.

[0082] A recess RS may be defined by the pad region PDR of the first substrate 100. The recess RS may be defined by recessing the upper surface 101 of the first substrate 100. The recess RS may be connected to the upper surface 101 of the first substrate 100. The recess RS may be provided at a level lower than the upper surface 101 of the first substrate 100. The lower surface and sidewalls of the recess RS may be defined by the surface of the first substrate 100.

[0083] A hole HO may be defined by the pad region PDR of the first substrate 100. The hole HO may be connected to the recess RS. The hole HO may be provided at a lower level than the recess RS. A sidewall of the hole HO may be defined by the surface of the first substrate 100. A lower surface of the hole HO may be defined by the surface of the first substrate 100, the upper surface 221_T of the second portion 221 of the first connecting conductive structure 220, and the upper surface 210_T of the first insulating film 210. The width of the hole HO in the first direction D1 may be smaller than the width of the recess RS in the first direction D1.

[0084] The conductive film 280 may include a first conductive portion 281, a second conductive portion 282, and a third conductive portion 283. The second conductive portion 282 may be provided in a recess RS. The second conductive portion 282 may be disposed at a level lower than the upper surface 101 of the first substrate 100. The first conductive portion 281 may be disposed at a level higher than the upper surface 101 of the first substrate 100. The third conductive portion 283 may completely fill the holes HO. The third conductive portion 283 may be connected to the second conductive portion 282. For ease of explanation, the first to third conductive portions 281, 282, and 283 will be described separately, but the first to third conductive portions 281, 282, and 283 may have an integral structure connected to each other without a boundary.

[0085] The first material film 271 may be provided between the first substrate 100 and the second material film 272. The first material film 271 may include a first portion P1 in contact with the top surface 101 of the first substrate 100 and a second portion P2 in the recess RS. The second material film 272 may include a first portion P3 on the first portion P1 of the first material film 271 and a second portion P4 in the recess RS.

[0086] A first conductive portion 281 may be provided on a first portion P3 of the second material film 272. A second conductive portion 282 may be provided on a second portion P4 of the second material film 272. A sidewall and a bottom surface 282_B of the second conductive portion 282 may be in contact with the second portion P4 of the second material film 272. A third conductive portion 283 may penetrate the second portion P2 of the first material film 271 and the second portion P4 of the second material film 272. A sidewall 283_S of the third conductive portion 283 may be in contact with the second portion P4 of the second material film 272 and the second portion P2 of the first material film 271. The first conductive portion 281 and the second conductive portion 282 may be separated from the first substrate 100 by the first material film 271 and the second material film 272. A sidewall 283_S of the third conductive portion 283 may be in contact with the pad region PDR of the first substrate 100.

[0087] The conductive film 280 may surround the pad 290. The first conductive portion 281 may contact a sidewall of the pad 290. The second conductive portion 282 may contact a sidewall and a bottom surface 290_B of the pad 290. The third conductive portion 283 may protrude from the bottom surface 282_B of the second conductive portion 282 toward the bottom surface 102 of the first substrate 100. The third conductive portion 283 may be spaced apart from the pad 290.

[0088] The third conductive portions 283 may be arranged spaced apart from each other in the first direction D1. The second portion P2 of the first material film 271 and the second portion P4 of the second material film 272 may each include a portion interposed between the third conductive portions 283. The third conductive portion 283 may overlap the first connecting conductive structure 220, the second connecting conductive structure 230, and the pad 290 in the third direction D3. The width of the third conductive portion 283 in the first direction D1 may decrease as it approaches the bottom surface 102 of the first substrate 100. The width of the third conductive portion 283 in the first direction D1 may decrease as it approaches the top surface 221_T of the second portion 221 of the first connecting conductive structure 220.

[0089] The length of the third conductive part 283 in the third direction D3 may be greater than the length of the first connecting conductive structure 220 in the third direction D3 and the length of the second connecting conductive structure 230 in the third direction D3. The third conductive part 283 may be disposed between the second connecting conductive part 282 and the first connecting conductive structure 220. The width of the third conductive part 283 in the first direction D1 may be smaller than the width of the third connecting conductive structure 240 in the first direction D1.

[0090] The pad 290 may overlap the pad region PDR in the third direction D3. The distance in the third direction D3 between the lower surface 282_B of the second conductive portion 282 and the lower surface 102 of the first substrate 100 may be smaller than the distance in the third direction D3 between the lower surface 290_B of the pad 290 and the lower surface 102 of the first substrate 100. The distance in the third direction D3 between the lower surface 283_B of the third conductive portion 283 and the lower surface 102 of the first substrate 100 may be smaller than the distance in the third direction D3 between the lower surface 282_B of the second conductive portion 282 and the lower surface 102 of the first substrate 100.

[0091] The lower surface 290_B of the pad 290, the lower surface 282_B of the second conductive portion 282, and the lower surface 283_B of the third conductive portion 283 may be disposed between the upper surface 101 and the lower surface 102 of the first substrate 100.

[0092] In some embodiments of the image sensor, the pad 290 and the third connecting conductive structure 240 may be connected through the conductive film 280, the first connecting conductive structure 220, and the second connecting conductive structure 230. Therefore, the lengths of the third conductive portion 283, the first connecting conductive structure 220, and the second connecting conductive structure 230 may be relatively short, and the reliability of the third conductive portion 283, the first connecting conductive structure 220, and the second connecting conductive structure 230 may be improved.

[0093] In some embodiments, the image sensor may have the third conductive portion 283, the first connecting conductive structure 220, and the second connecting conductive structure 230 overlapping with the pad 290 in the third direction D3, thereby minimizing the space required for the structure electrically connecting the third connecting conductive structure 240 and the pad 290, and thereby minimizing the size of the image sensor.

[0094] Figures 4A, 4B, 4C, 5, and 6 are views for explaining a method of manufacturing an image sensor according to Figures 3A to 3D. Figure 4A may correspond to Figure 3B. Figure 4B may correspond to Figure 3C. Figures 4C, 5, and 6 may correspond to Figure 3D.

[0095] 4A, 4B, and 4C, the sub-chip 30 can be formed on the circuit chip 50. As shown in FIG.

[0096] The sensor chip 10 may be formed. Forming the sensor chip 10 may include forming a pixel isolation pattern 110 penetrating the first substrate 100, forming a photoelectric conversion region PD in the pixel array region APS of the first substrate 100, and forming a first insulating film 210, a floating diffusion region FD, a gate insulating film GI, a transfer gate TG, a first connecting conductive structure 220, a second connecting conductive structure 230, a third connecting conductive structure 240, a fourth connecting conductive structure 250, a first contact 130, a first conductive line 140, a first bonding pad BP1, and a first insulating structure 150 on the lower surface 102 of the first substrate 100.

[0097] The sensor chip 10 may be hybrid-bonded to the sub-chip 30. The upper surface 101 of the first substrate 100 may be etched to form a recess RS. A first preliminary film LA1 may be formed on the first substrate 100. A second preliminary film LA2 may be formed on the first preliminary film LA1. A portion of the first preliminary film LA1 and a portion of the second preliminary film LA2 may be provided within the recess RS.

[0098] The first preliminary film LA1 may include an insulating material. For example, the first preliminary film LA1 may include aluminum oxide. In some embodiments, the second preliminary film LA2 may be a multi-layer film including multiple layers. For example, the second preliminary film LA2 may include a first layer including hafnium oxide, a second layer including silicon oxide, a third layer including silicon nitride, and a fourth layer including hafnium oxide.

[0099] 5, holes HO may be formed by etching the first preliminary layer LA1, the second preliminary layer LA2, and the first substrate 100 through the recesses RS. The holes HO may expose the top surface 221_T of the first connecting conductive structure 220 and the top surface 210_T of the first insulating film 210.

[0100] The length of the hole HO in the third direction D3 may be smaller than the length of the first substrate 100 in the third direction D3.

[0101] 6, the conductive layer 280 may be formed. The conductive layer 280 may be formed, for example, through a deposition process. The third conductive portion 283 of the conductive layer 280 may be completely filled with the holes HO. In some embodiments, the third conductive portion 283 of the conductive layer 280 may be only partially filled with the holes HO.

[0102] 3A to 3D, the first preliminary layer LA1 may be separated into a first passivation layer 161 and a first material layer 271. The second preliminary layer LA2 may be separated into a fixed charge layer 162 and a second material layer 272. A fence pattern 164 and a light-shielding layer 265 may be formed. In some embodiments, forming the fence pattern 164, the light-shielding layer 265, and the conductive layer 280 may include forming a preliminary conductive layer and separating the preliminary conductive layer into the fence pattern 164, the light-shielding layer 265, and the conductive layer 280. A connection contact 266 may be formed on the light-shielding layer 265.

[0103] The second protective film 163 and the third protective film 261 may be formed. The color filter CF and the filtering film 262 may be formed. The lens film 170, the coating film 171, the first cover film 263, and the second cover film 264 may be formed. In some embodiments, the lens film 170 and the first cover film 263 may be formed simultaneously. In some embodiments, the coating film 171 and the second cover film 264 may be formed simultaneously.

[0104] In some embodiments of the method for manufacturing an image sensor, the copper-free first connection conductive structure 220 is exposed by holes HO, which may relatively reduce the oxidation of the conductive structure electrically connected to the pad 290.

[0105] In the method for manufacturing an image sensor according to some embodiments, the holes HO are completely filled with the third conductive parts 283, which may prevent the holes HO from being filled with a process material for forming the color filters CF.

[0106] In the method for manufacturing an image sensor according to some embodiments, the hole HO has a length shorter than that of the first substrate 100, so that the process margin of the process for forming the hole HO may be improved.

[0107] In the method for manufacturing an image sensor according to some embodiments, the holes HO can be formed by etching only the first preliminary layer LA1, the second preliminary layer LA2, and the first substrate 100, so the manufacturing process can be simplified.

[0108] Figure 7 is an enlarged cross-sectional view of an image sensor according to some embodiments. The image sensor according to Figure 7 may be similar to the image sensors according to Figures 3A-3D, except as described below.

[0109] 7, the first connecting conductive structure 220a may be surrounded by a first insulating layer 210. A lower surface 220a_B of the first connecting conductive structure 220a may contact an upper surface 157a_T of the second insulating layer 157a of the first insulating structure 150a. The upper surface 157a_T and the lower surface of the second insulating layer 157a may be flat.

[0110] Each of the first conductive portion 281a, the second conductive portion 282a, and the third conductive portion 283a of the conductive film 280a may include a barrier film BL and a metal film CL. The barrier film BL and the metal film CL may include different conductive materials. For example, the metal film CL may include tungsten, and the barrier film BL may include titanium.

[0111] The barrier films BL of the first conductive portion 281a, the second conductive portion 282a, and the third conductive portion 283a may have an integral structure in which they are connected to each other without any boundaries, and the metal films CL of the first conductive portion 281a, the second conductive portion 282a, and the third conductive portion 283a may have an integral structure in which they are connected to each other without any boundaries.

[0112] The metal layers CL of the third conductive portions 283a may be spaced apart from each other in the first direction D1 and may overlap with the pad 290 in the third direction D3.

[0113] Figure 8 is an enlarged cross-sectional view of an image sensor according to some embodiments. The image sensor according to Figure 8 may be similar to the image sensors according to Figures 3A-3D, except as described below.

[0114] Referring to FIG. 8, the first insulating film 210b may include a first portion 211b, a second portion 212b on the first portion 211b, and a third portion 213b on the second portion 212b.

[0115] The first portion 211b of the first insulating film 210b may be in contact with the second insulating film 157. The second portion 212b of the first insulating film 210b may surround the plurality of first connecting conductive structures 220. Each of the third portions 213b of the first insulating film 210b may surround each of the first connecting conductive structures 220.

[0116] The width of the second portion 212b of the first insulating film 210b in the first direction D1 may be greater than the sum of the widths of the first connecting conductive structure 220 in the first direction D1. The width of the second portion 212b of the first insulating film 210b in the first direction D1 may be greater than the sum of the widths of the third portion 213b of the first insulating film 210b in the first direction D1.

[0117] Figure 9 is an enlarged cross-sectional view of an image sensor according to some embodiments. The image sensor according to Figure 9 may be similar to the image sensors according to Figures 3A-3D, except as described below.

[0118] 9, a sidewall 290c_S of the pad 290c may be spaced apart from the conductive layer 280c, and the sidewall 290c_S of the pad 290c may be spaced apart from the first conductive portion 281c and the second conductive portion 282c of the conductive layer 280c.

[0119] The pad 290c may be disposed between the third conductive portions 283c. The third conductive portions 283c may be disposed on both sides of the pad 290c. The pad 290c may be disposed between the third conductive portions 283c disposed on one side of the pad 290c and the third conductive portions 283c disposed on the other side of the pad 290c.

[0120] The pad 290c may be disposed between the first connecting conductive structures 220c. The first connecting conductive structures 220c may be disposed on both sides of the pad 290c. The pad 290c may be disposed between the first connecting conductive structures 220c disposed on one side of the pad 290c and the first connecting conductive structures 220c disposed on the other side of the pad 290c.

[0121] The pad 290c may be disposed between the second connecting conductive structures 230c. The second connecting conductive structures 230c may be disposed on both sides of the pad 290c. The pad 290c may be disposed between the second connecting conductive structures 230c disposed on one side of the pad 290c and the second connecting conductive structures 230c disposed on the other side of the pad 290c.

[0122] The third conductive portion 283c, the first connecting conductive structure 220c, and the second connecting conductive structure 230c may not overlap with the pad 290c in the third direction D3, and the third conductive portion 283c, the first connecting conductive structure 220c, and the second connecting conductive structure 230c may be spaced apart from the pad 290c in the first direction D1.

[0123] Figure 10 is an enlarged cross-sectional view of an image sensor according to some embodiments. The image sensor according to Figure 10 may be similar to the image sensors according to Figures 3A-3D, except as described below.

[0124] 10, one first connecting conductive structure 220d may be provided between the plurality of third conductive parts 283 and the plurality of second connecting conductive structures 230. The plurality of third conductive parts 283 may be in contact with one first connecting conductive structure 220d. The plurality of second connecting conductive structures 230 may be in contact with one first connecting conductive structure 220d.

[0125] In some embodiments, the conductive film 280 may include one third conductive portion 283. In some embodiments, the third connecting conductive structure 240 may be connected to one second connecting conductive structure 230.

[0126] 11 is a plan view illustrating a conductive layer and a conductive interconnect structure of an image sensor according to some embodiments. The image sensor according to FIG. 11 may be similar to the image sensors according to FIGS. 3A to 3D, except as described below.

[0127] 11, the third conductive portion 283e of the conductive film 280e may have a bar shape extending in the second direction D2. The first connecting conductive structure 220e may have a cylindrical shape. The second connecting conductive structure 230e may include a first portion 231e extending in the first direction D1 and a second portion 232e extending in the second direction D2. The second connecting conductive structure 230e may have a mesh shape in which the first portion 231e and the second portion 232e intersect.

[0128] In some embodiments, the third conductive portion 283e may have a cylindrical shape or a mesh shape. In some embodiments, the first connecting conductive structure 220e may have a bar shape or a mesh shape. In some embodiments, the second connecting conductive structure 230e may have a cylindrical shape or a bar shape.

[0129] 12A and 12B are cross-sectional views of image sensors according to some embodiments. The image sensors according to Figures 12A and 12B may be similar to the image sensors according to Figures 3A to 3D, except as described below.

[0130] 12A and 12B, the sensor chip 10 may be hybrid-bonded to a circuit chip 30f. The circuit chip 30f may include a second substrate 300f, an electronic element 320f, a second contact 330f, a second conductive line 340f, a second bonding pad BP2f, and a second insulating structure 310f. The electronic element 320f may include at least one of an analog-to-digital converter, a memory circuit, or a logic circuit. The second bonding pad BP2f may be in contact with the first bonding pad BP1. The second insulating structure 310f may be in contact with the first insulating structure 150.

[0131] Figure 13 is an enlarged cross-sectional view of an image sensor according to some embodiments. The image sensor according to Figure 13 may be similar to the image sensors according to Figures 3A-3D, except as described below.

[0132] 13, the third conductive portion 283g of the conductive layer 280g may penetrate the lower surface 102 of the first substrate 100. A lower surface 283g_B of the third conductive portion 283g of the conductive layer 280g may be in contact with the upper surface 220g_T of the first connecting conductive structure 220g. The first insulating layer 210g may be in contact with the lower surface 102 of the first substrate 100, a sidewall 283g_S of the third conductive portion 283g, and the upper surface 220g_T of the first connecting conductive structure 220g. The lower surface 210g_B of the first insulating layer 210g may be in contact with the upper surface 220g_T of the first connecting conductive structure 220g.

[0133] The lower surface 210g_B and the upper surface of the first insulating film 210g may be flat. The third conductive portion 283g may penetrate the first insulating film 210g.

[0134] 14A and 14B are cross-sectional views of image sensors according to some embodiments. The image sensors according to Figures 14A and 14B may be similar to the image sensors according to Figures 3A to 3D, except as described below.

[0135] Referring to Figures 14A and 14B, the sub-chip 30h may include a second substrate 300h, a second insulating structure 310h, a third insulating structure 311h, a first electronic element 320h, a second contact 330h, a second conductive line 340h, a through via 350h, a spacer 360h, a second bonding pad BP2h, and a third bonding pad BP3h.

[0136] The first electronic component 320h may be provided on the lower surface of the second substrate 300h. The second insulating structure 310h may cover the first electronic component 320h. The second insulating structure 310h may contact the lower surface of the second substrate 300h.

[0137] The third insulating structure 311h may be in contact with an upper surface of the second substrate 300h. The second substrate 300h may be provided between the second and third insulating structures 310h, 311h. The third insulating structure 311h may include an insulating material. In some embodiments, the third insulating structure 311h may be a multi-insulating structure including multiple insulating films.

[0138] A second bonding pad BP2h may be provided in the third insulating structure 311h. An upper surface of the third insulating structure 311h may contact a lower surface of the first insulating structure 150. An upper surface of the second bonding pad BP2h may contact a lower surface of the first bonding pad BP1.

[0139] The spacer 360h may penetrate the second substrate 300h in the third direction D3. The spacer 360h may include an insulating material. The through via 350h may penetrate the second substrate 300h and the spacer 360h in the third direction D3. The through via 350h may be connected to the second bonding pad BP2h and the second conductive line 340h. The through via 350h may include a different conductive material from that of the second bonding pad BP2h. For example, the through via 350h may include tungsten.

[0140] A third bonding pad BP3h may be provided in the second insulating structure 310h and may be coupled to a second contact 330h.

[0141] The circuit chip 50h may include a third substrate 500h, a fourth insulating structure 510h, a second electronic component 520h, a third contact 530h, a third conductive line 540h, and a fourth bonding pad BP4h.

[0142] The fourth bonding pad BP4h may be connected to the third bonding pad BP3h and the third contact 530h. The top surface of the fourth bonding pad BP4h may contact the bottom surface of the third bonding pad BP3h. The bottom surface of the second insulating structure 310h may contact the top surface of the fourth insulating structure 510h.

[0143] Those skilled in the art will understand that the present invention can be embodied in other specific forms without changing the technical spirit or essential characteristics thereof. Therefore, it should be understood that the above-described embodiments are illustrative in all respects and are not limiting. Furthermore, the above-described embodiments can be combined with each other. [Explanation of symbols]

[0144] 10 Sensor Chip 100 boards 170 Lens membrane 171 Coating film 172 Microlens 173 Base 220, 230, 240 Connected conductive structure 280 Conductive Film 281, 282, 283 Conductive parts 282 Second conductive part 290 pads APS pixel array area OBR Optical Black Area PD photoelectric conversion region PDR Pad Area PX pixel area

Claims

1. a substrate including a pixel array region and a pad region; a microlens overlapping the pixel array region; a pad overlapping the pad area; a conductive film surrounding the pad; the conductive film includes a first conductive portion in contact with a lower surface of the pad and a second conductive portion protruding from a lower surface of the first conductive portion toward a lower surface of the substrate; the second conductive portion is spaced apart from the pad; a distance between the lower surface of the substrate and a lower surface of the second conductive portion is smaller than a distance between the lower surface of the substrate and the lower surface of the first conductive portion; a distance between the lower surface of the substrate and the lower surface of the first conductive portion is smaller than a distance between the lower surface of the substrate and the lower surface of the pad; The lower surface of the pad and the lower surface of the first conductive portion are disposed between the lower surface and the upper surface of the substrate.

2. further comprising a connecting conductive structure passing through the lower surface of the substrate; The image sensor of claim 1 , wherein the lower surface of the second conductive portion contacts an upper surface of the connecting conductive structure.

3. The image sensor of claim 2 , further comprising a first insulating layer contacting a sidewall of the connecting conductive structure, the lower surface of the substrate, and the lower surface of the second conductive portion.

4. the connecting conductive structure includes a first portion and a second portion on the first portion; a width of the second portion of the connecting conductive structure that is smaller than a width of the first portion of the connecting conductive structure; The image sensor of claim 2 , wherein the width of the second portion of the connecting conductive structure decreases toward the bottom surface of the second conductive portion.

5. The image sensor of claim 2 , wherein the interconnecting conductive structure comprises polysilicon.

6. a recess and a hole are defined by the pad region of the substrate; the recess is coupled to the top surface of the substrate; the hole is connected to the recess; the width of the hole is smaller than the width of the recess; the first conductive portion is provided within the recess; The image sensor of claim 1 , wherein the second conductive portion completely fills the hole.

7. the first conductive portion is spaced apart from the substrate; The image sensor of claim 1 , wherein a sidewall of the second conductive portion contacts the substrate.

8. a substrate including a pixel array region and a pad region; a microlens overlapping the pixel array region; a pad overlapping the pad area; a conductive film surrounding the pad; a first connecting conductive structure electrically connected to the conductive film, the conductive film includes a first conductive portion in contact with a lower surface of the pad and a second conductive portion protruding from a lower surface of the first conductive portion toward a lower surface of the substrate; a lower surface of the second conductive portion contacting an upper surface of the first connecting conductive structure; The sidewall of the second conductive portion contacts the substrate.

9. The image sensor of claim 8 , wherein the width of the second conductive portion decreases toward the top surface of the first connecting conductive structure.

10. The image sensor of claim 8 , wherein a width of the bottom surface of the second conductive portion is greater than a width of the top surface of the first connecting conductive structure.

Citation Information

Patent Citations

  • US10,734,429B2