Metal oxide film

Abstract

To provide a semiconductor device having a metal oxide film including a crystal part, a semiconductor device including a metal oxide film and having a high field effect mobility, and a semiconductor device including a metal oxide film and having high reliability.SOLUTION: In a semiconductor device, a transistor 200 has: a first insulator 214; a first conductor 205 formed on the first insulator; second insulators 220, 222, and 224 formed on the first conductor; an oxide 230 formed on the second insulators; a third insulator 250 formed on the oxide; a second conductor 260 formed on the third insulator; a fourth insulator 280 formed on the third insulator and the second conductor; and a fifth insulator 282 formed on the fourth insulator. The oxide contains In, M (M is Al, Ga, Y, or Sn), and Zn. The oxide has a first crystal part and a second crystal part. The first crystal part has c-axis orientation and the second crystal part does not have c-axis orientation.SELECTED DRAWING: Figure 30

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a metal oxide film and a manufacturing method thereof. The present invention also relates to a semiconductor device having the metal oxide film and a manufacturing method thereof.

[0002] Alternatively, the present invention relates to, for example, oxides, transistors and semiconductor devices, and The present invention also relates to a method for manufacturing an oxide, a display device, a light-emitting device, a lighting device, or the like. The present invention relates to a device, a power storage device, a memory device, an imaging device, a processor, and an electronic device. The present invention relates to a method for manufacturing a display device, a liquid crystal display device, a light-emitting device, a memory device, or an electronic device. The present invention relates to a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a storage device, and a driving method for electronic equipment. do.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to an object, a method, or a manufacturing method. One aspect of the invention is a process, machine, manufacture, or composition of matter. It concerns the matter of matter.

[0004] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general, including display devices, light-emitting devices, lighting devices, imaging devices, electro-optical devices, semiconductor circuits, and The electronic equipment may include semiconductor devices. [Background technology]

[0005] Oxide semiconductors have been attracting attention as semiconductor materials that can be used in transistors. In Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, The oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium By making the ratio of gallium larger than the ratio of gallium, the field-effect mobility (simply mobility, or μ FE A semiconductor device is disclosed in which the resistance (sometimes referred to as "resistance") is improved.

[0006] In addition, Non-Patent Document 1 states that an oxide semiconductor containing indium, gallium, and zinc is , In 1-x Ga 1+x O3(ZnO) m (x is a number that satisfies -1≦x≦1, and m is a natural number) Furthermore, Non-Patent Document 1 discloses that the compound has a homologous phase represented by the formula: The solid solution range of the homologous phase is disclosed. For example, when m = 1, the solid solution region of the homologous phase is from -0.33 to 0.0 8, and the solid solution region of the homologous phase when m = 2 is in the range of x from -0.68 to 0.32. The range is. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-7399 [Non-patent literature]

[0008] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0009] One embodiment of the present invention aims to provide a semiconductor device having a metal oxide film including a crystalline portion. Alternatively, a semiconductor device including a metal oxide film and having high field-effect mobility is provided. Another object of the present invention is to provide a highly reliable semiconductor device including a metal oxide film. One of the goals is to

[0010] Another object is to provide a semiconductor device using an oxide as a semiconductor. One of the objects of the present invention is to provide a module having a semiconductor device using an oxide as a semiconductor. Alternatively, a semiconductor device using an oxide as a semiconductor, or a semiconductor using an oxide as a semiconductor It is an object of the present invention to provide an electronic device having a module including a device.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. It is possible to extract such information from descriptions such as drawings and claims. [Means for solving the problem]

[0012] One aspect of the present invention is a semiconductor device including a first insulator, a first conductor formed on the first insulator, a second insulator formed on the first conductor; and an oxide formed on the second insulator. a third insulator formed on the oxide; and a second conductor formed on the third insulator. a fourth insulator formed on the third insulator and the second conductor; and a fifth insulator formed thereon, the oxide being composed of In and M (wherein M is Al, Ga, Y, or Sn) and Zn, and the atomic ratio of In, M, and Zn is In:M:Zn=4 :2:3 and its vicinity, and when In is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less, the oxide has a first crystal portion and a second crystal portion, and the first the first crystalline portion has a c-axis orientation, and the second crystalline portion does not have a c-axis orientation; The third insulator and the fourth insulator contain oxygen and silicon, and the first insulator and the fifth insulator contain oxygen and silicon. The insulator is a semiconductor device containing oxygen and aluminum.

[0013] In the above, the oxide is subjected to electron diffraction measurement of a cross section, and the electron diffraction pattern of the oxide is When a turn is observed, the electron diffraction pattern shows a diffraction spot caused by the first crystal part. and a second region having a diffraction spot caused by a second crystal portion. However, the integrated intensity of the luminance in the first region is greater than the integrated intensity of the luminance in the second region. It is preferable that it is large.

[0014] In the above, the integrated intensity of the luminance in the first region is the integrated intensity of the luminance in the second region. It is preferable that the strength is more than 1 time and not more than 3 times.

[0015] In the above, the oxide has a peak value of shallow defect level density of 2.5 × 10 12 cm -2 eV -1 It is preferred to have an area that is less than 1000 .mu.m.

[0016] In the above, a second oxide is provided between the oxide and the third insulator, and the second oxide is The oxide contains In, M (M is Al, Ga, Y, or Sn), and Zn. The first crystal portion has a c-axis orientation, and the second crystal portion has The cross section of the oxide was subjected to electron diffraction measurement, and the electron diffraction pattern of the oxide was obtained. When the electron beam diffraction pattern was observed, it was found that the diffraction spots were due to the first crystal portion. and a second region having a diffraction spot caused by a second crystal portion. , the integral intensity of the luminance in the first region relative to the integral intensity of the luminance in the second region is It is preferably more than 1 time and not more than 10 times.

[0017] Another aspect of the present invention is a method for manufacturing a semiconductor device comprising: forming a first conductor containing oxygen and aluminum on a first insulator; forming a second insulator containing oxygen and silicon on the first conductor; On the insulating substrate, the flow rate of oxygen is set to 20% or less, and the substrate temperature is set to room temperature or higher and 150°C or lower. The oxide is formed by sputtering, and then heat-treated at a temperature of 450°C or less. a third insulator containing oxygen and silicon is formed on the first insulator; and a second conductive layer is formed on the third insulator. a fourth insulating layer containing oxygen and silicon on the third insulator and the second conductor; A fourth insulator is formed on the substrate by sputtering while heating the substrate at a temperature of 450°C or less. The fifth insulator containing oxygen and aluminum is formed using the ring method. A method for manufacturing a semiconductor device. [Effects of the Invention]

[0018] According to one aspect of the present invention, there is provided a semiconductor device having a metal oxide film including a crystalline portion. Alternatively, a semiconductor device including a metal oxide film and having high field-effect mobility can be provided. Alternatively, a highly reliable semiconductor device including a metal oxide film can be provided. can.

[0019] Alternatively, a semiconductor device using an oxide as a semiconductor can be provided. It is possible to provide a module having a semiconductor device using the oxide semiconductor. a module having a semiconductor device using a material as a semiconductor or a semiconductor device using an oxide as a semiconductor It is possible to provide an electronic device having such a module. [Brief explanation of the drawings]

[0020] [Figure 1] 1A and 1B are diagrams illustrating a cross-sectional TEM image and a cross-sectional HR-TEM image of a metal oxide film. [Figure 2] 1A and 1B are diagrams illustrating a cross-sectional TEM image and a cross-sectional HR-TEM image of a metal oxide film. [Figure 3] 1A and 1B are diagrams illustrating a cross-sectional TEM image and a cross-sectional HR-TEM image of a metal oxide film. [Figure 4] 1A to 1C are diagrams illustrating the XRD measurement results and electron beam diffraction patterns of a metal oxide film. [Figure 5] 1A to 1C are diagrams illustrating the XRD measurement results and electron beam diffraction patterns of a metal oxide film. [Figure 6] 1A to 1C are diagrams illustrating the XRD measurement results and electron beam diffraction patterns of a metal oxide film. [Figure 7] FIG. 2 is a diagram illustrating an electron beam diffraction pattern. [Figure 8] FIG. 2 is a diagram illustrating a line profile of an electron beam diffraction pattern. [Figure 9] 1 is a conceptual diagram illustrating the line profile of an electron diffraction pattern, the relative brightness R of the line profile, and the half-width of the spectrum. [Figure 10] 3A and 3B are diagrams illustrating electron beam diffraction patterns and brightness profiles. [Figure 11] 3A and 3B are diagrams illustrating electron beam diffraction patterns and brightness profiles. [Figure 12] FIG. 1 is a diagram illustrating relative brightness estimated from the electron diffraction pattern of a metal oxide film. [Figure 13]1A to 1C are diagrams illustrating a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 14] 1A to 1C are diagrams illustrating a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 15] 1A to 1C are diagrams illustrating a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 16] 1A and 1B are diagrams illustrating SIMS measurement results of a metal oxide film. [Figure 17] FIG. 2 is a diagram illustrating Id-Vg characteristics. [Figure 18] FIG. 2 is a diagram illustrating Id-Vg characteristics. [Figure 19] FIG. 10 is a diagram illustrating the calculation results of interface state density. [Figure 20] FIG. 2 is a diagram illustrating Id-Vg characteristics. [Figure 21] FIG. 10 is a diagram illustrating the calculation results of defect state density. [Figure 22] FIG. 10 is a diagram illustrating the measurement results of CPM. [Figure 23] FIG. 10 is a diagram illustrating the measurement results of CPM. [Figure 24] FIG. 10 is a diagram illustrating the measurement results of CPM. [Figure 25] 1A to 1C illustrate a mechanism for forming an oxide semiconductor film. [Figure 26] 10A and 10B are diagrams illustrating the range of atomic ratios of oxide semiconductor films. [Figure 27] A diagram explaining the InMZnO4 crystal. [Figure 28] 1A and 1B are diagrams illustrating energy bands of a transistor in which an oxide semiconductor film is used for a channel region. [Figure 29] A diagram explaining the structure of a nanocluster. [Figure 30] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 31] FIG. 1 is a diagram illustrating a band structure. [Figure 32] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 33] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 34] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 35] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 36] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 37] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 38] 1A and 1B illustrate a top view and a cross-sectional structure of a transistor according to an embodiment. [Figure 39] 1A to 1C illustrate an example of a method for manufacturing a transistor according to an embodiment. [Figure 40] 1A to 1C illustrate an example of a method for manufacturing a transistor according to an embodiment. [Figure 41] 1A to 1C illustrate an example of a method for manufacturing a transistor according to an embodiment. [Figure 42] 1A to 1C illustrate an example of a method for manufacturing a transistor according to an embodiment. [Figure 43] 1 is a circuit diagram of a semiconductor device according to an embodiment. [Figure 44] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 45] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 46] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 47] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 48] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 49] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 50] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 51] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 52]1A to 1C are circuit diagrams and a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 53] 1A to 1C illustrate a cross-sectional structure of a semiconductor device according to an embodiment. [Figure 54] FIG. 1 is a circuit diagram illustrating a memory device according to one embodiment of the present invention. [Figure 55] FIG. 1 is a circuit diagram illustrating a memory device according to one embodiment of the present invention. [Figure 56] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 57] 1A and 1B are graphs and circuit diagrams illustrating one embodiment of the present invention. [Figure 58] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 59] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 60] 1A to 1C are a block diagram, a circuit diagram, and waveform diagrams illustrating one embodiment of the present invention. [Figure 61] 1A and 1B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 62] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 63] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 64] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 65] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 66] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 67] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 68] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 69] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 70] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 71] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 72] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 73] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 74] 1A to 1C are a flowchart illustrating one embodiment of the present invention and a perspective view illustrating a semiconductor device. [Figure 75] FIG. 10 is a perspective view illustrating an electronic device according to one embodiment of the present invention. [Figure 76] FIG. 10 is a diagram illustrating the measurement results of the XRD spectrum of a sample. [Figure 77] TEM image of the sample and a diagram explaining the electron beam diffraction pattern. [Figure 78] FIG. 1 is a diagram illustrating EDX mapping of a sample. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0022] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The drawings are merely schematic illustrations and are not limited to the shapes or values shown in the drawings.

[0023] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0024] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the configuration with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The phrases are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0025] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The semiconductor device has a channel region therein, and a current flows through the drain, the channel region, and the source. In this specification and the like, the channel region is a region where a current mainly flows. The flow area.

[0026] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0027] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0028] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0029] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0030] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also known as a cut-off state). Unless otherwise specified, for an n-channel transistor, the voltage V between the gate and source When gs is lower than the threshold voltage Vth, the gate and This refers to the state in which the voltage Vgs between the n-channel and n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt It may refer to the drain current when it is lower than h.

[0031] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there is a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off state at a given Vgs. , an off-state at Vgs within a predetermined range or a sufficiently reduced off-current is obtained. It may refer to the off-state current at Vgs.

[0032] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The on-current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs = -0.5 V is 1 × 10 -19 A and Vg The drain current at s = -0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of -0.5V to -0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 A or less Vgs exists. Therefore, the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0033] In this specification and the like, the off-state current of a transistor having a channel width W is calculated based on the It is sometimes expressed as the current value that flows per watt. In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0034] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the values are measured at room temperature, 60°C, 85°C, 95°C, or 125°C. It may also represent the current that is generated when the reliability of a semiconductor device that includes the transistor is guaranteed. or the temperature at which a semiconductor device containing the transistor is used (e.g. For example, the off-state current at a temperature in the range of 5°C to 35°C. The off-state current of the transistor is I or less when the transistor is operated at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of a semiconductor device including a transistor is guaranteed, or the temperature at which the transistor the temperature at which the semiconductor device containing the compound is used (for example, a temperature in the range of 5°C to 35°C); This may refer to the existence of a Vgs value at which the off-state current of a transistor is equal to or less than I. do.

[0035] The off-state current of a transistor can depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or In some cases, the value represents the off-state current at 20 V. Alternatively, the value represents the off-state current of the semiconductor containing the transistor. Vds that guarantees the reliability of semiconductor devices, or semiconductor devices that include the transistor The off-state current of a transistor at Vds is sometimes used in The current is less than I when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, transistors included Vds that guarantees the reliability of the semiconductor device in which the transistor is used, or the semiconductor Vds used in semiconductor devices, etc., where the off-state current of the transistor is I or less It may refer to the existence of a gs value.

[0036] In the above description of the off-state current, the drain may be read as the source. Current may also refer to the current through the source when the transistor is in the off state.

[0037] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification, the off-state current is, for example, the current when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0038] In this specification, the threshold voltage of a transistor is the voltage at which a channel is formed in the transistor. This refers to the gate voltage (Vg) when a gate electrode is formed. Specifically, it refers to the threshold voltage of a transistor. The voltage is plotted by plotting the gate voltage (Vg) on the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the simulated curve (Vg-√Id characteristics), the tangent line with the maximum slope is extrapolated to form a straight line. , the gate voltage (Vg Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The channel width is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] and It may also refer to the gate voltage (Vg) applied to the device.

[0039] Also, a voltage is a voltage between a certain potential and a reference potential (for example, ground potential (GND) or source potential). Therefore, voltage can be replaced with potential. Generally, potential (voltage) is relative, and the magnitude is relative to a reference potential. Therefore, even if it is described as "ground potential", The potential is not necessarily 0V. For example, the lowest potential in a circuit may be the "ground potential." Or, the intermediate potential in the circuit may be the "ground potential." In this case, the positive potential and the negative potential are defined based on that potential.

[0040] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source The distance between the drain electrode and the drain region is called the distance between the In the transistor, the channel length does not necessarily have the same value in all regions. The channel length of a transistor may not be determined to a single value. In the detailed description, the channel length is any one value, the maximum value, in the region where the channel is formed. , the minimum or average value.

[0041] The channel width is the width of the semiconductor (or transistor) when it is in the on state. The region where the gate electrode overlaps with the electrode (the area where current flows) forms a channel. The length of the region where the source and drain face each other. In a transistor, the channel width does not necessarily have the same value in all regions. The channel width of a transistor may not be determined to a single value. In the detailed description, the channel width is any one value, the maximum value in the region where the channel is formed. , the minimum or average value.

[0042] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width is shown in the top view of the transistor. The channel width that is actually used (hereinafter referred to as the apparent channel width) may differ from the actual channel width. For example, In a transistor having a three-dimensional structure, the effective channel width is The apparent channel width shown in the figure becomes larger, and the effect becomes non-negligible. For example, in transistors with a fine, three-dimensional structure, the side surface of the semiconductor In this case, the ratio of the channel region formed in the top view may be increased. The effective channel width of the channel is actually formed rather than the apparent channel width shown. will be larger.

[0043] In a transistor having a three-dimensional structure, the effective channel width is For example, it may be difficult to estimate the effective channel width from the design value. In order for deposition to occur, it is necessary to assume that the shape of the semiconductor is known. It is difficult to accurately measure the effective channel width if the channel conditions are not precisely known. .

[0044] Therefore, in this specification, in a top view of a transistor, a semiconductor and a gate electrode are not mutually connected. The apparent length is the length of the part where the source and drain face each other in the overlapping region. The above channel width is called "Surrounded Channel Width (SCW)". In this specification, it is simply referred to as the channel width. In some cases, it may refer to enclosed channel width or apparent channel width. In this specification, when simply referring to a channel width, it may refer to an effective channel width. The channel length, channel width, effective channel width, apparent channel width, and The width of the interstitial channel can be determined by taking a cross-sectional TEM image and analyzing it. Thus, the value can be determined.

[0045] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0046] In addition, even when the term "semiconductor" is used in this specification, for example, If the dielectric constant is low enough, it may have the properties of an "insulator." The boundary between "insulator" and "insulator" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "insulator." The term "insulator" in the specification etc. may be replaced with "semiconductor." In some cases, the term "insulator" used in this specification can be rephrased as "semi-insulator." .

[0047] In addition, even when the term "semiconductor" is used in this specification, for example, a material having electrical conductivity is also included. If the electrical conductivity is high enough, it may have the properties of a "conductor." The boundary between "conductor" and "electroconductor" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0048] In this specification and the like, the impurities of a semiconductor are elements other than the main components that constitute the semiconductor film. For example, an element with a concentration of less than 0.1 atomic percent is an impurity. This causes the formation of DOS (Density of State) in the semiconductor, This can cause a decrease in carrier mobility and a decrease in crystallinity. When the body has an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition elements other than the main components Metals, especially hydrogen (which is also contained in water), lithium, sodium, silicon, and phosphatase. These include uran, phosphorus, carbon, and nitrogen. In the case of oxide semiconductors, for example, impurities such as hydrogen are mixed in. In addition, if the semiconductor contains silicon, the semiconductor may Impurities that change the properties of the body include, for example, oxygen, group 1 elements excluding hydrogen, and group 2 elements. These include the elements of Group 13, Group 15, etc.

[0049] In this specification and the like, when simply referring to an oxide, it includes a metal oxide, an oxide semiconductor, This can be read as oxide insulator or oxide conductor.

[0050] (Embodiment 1) <1-1. Composition of metal oxide film> One aspect of the present invention is a metal oxide film containing two types of crystal parts. The direction of the film thickness (also called the crystal part) is perpendicular to the film surface, the film surface, or the film surface. In other words, it is a crystalline part that has a c-axis orientation. The first crystal part (also called the second crystal part) is a crystal part that does not have a c-axis orientation and is oriented in various directions. In the metal oxide film of one embodiment of the present invention, these two types of crystal parts are mixed.

[0051] In the following, for ease of explanation, the crystal portion having the c-axis orientation will be referred to as the first crystal portion. The crystal part without c-axis orientation is explained separately from the second crystal part. In some cases, there is no difference in the size of the crystals and they cannot be distinguished. Metal oxide films can also be expressed without distinguishing between these.

[0052] For example, the metal oxide film of one embodiment of the present invention has a plurality of crystal parts. It is sufficient that at least one of the crystal parts in the film has a c-axis orientation. The proportion of crystal parts not having c-axis orientation among the crystal parts is For example, the metal oxide film of one embodiment of the present invention may have a content of In the cross section in the film thickness direction observed by a transmission electron microscope, multiple crystals were observed. and a second crystal portion having no c-axis orientation among the plurality of crystal portions has a c-axis orientation. In other words, the metal oxide of one embodiment of the present invention may be observed to have a larger number of crystals than the first crystal portion. The film contains a large proportion of second crystal portions that do not have c-axis orientation.

[0053] By increasing the proportion of the second crystal parts that do not have c-axis orientation in the metal oxide film, It has the following excellent effects:

[0054] When there is a sufficient oxygen source near the metal oxide film, the first layer without c-axis orientation The crystal part of 2 can be a diffusion path for oxygen. Therefore, it is necessary to provide sufficient oxygen near the metal oxide film. When a source is present, the first crystalline portion having a c-axis orientation is formed through the second crystalline portion not having a c-axis orientation. Oxygen can be supplied to the crystal part of 1. Therefore, the amount of oxygen vacancy in the metal oxide film is reduced. By applying such a metal oxide film to the semiconductor film of a transistor, Thus, it is possible to obtain high reliability and high field effect mobility. The second crystal portion, which does not have the c-axis orientation, becomes a diffusion path for oxygen, and the second crystal portion becomes a diffusion path for oxygen, which diffuses into the first crystal portion having the c-axis orientation. Since oxygen can be supplied, the first crystal portion having the c-axis orientation and the second crystal portion having the c-axis orientation are formed. The metal oxide film containing the second crystal portion that does not undergo oxidation is called an oxygen-deficient metal oxide film or an oxygen-deficient The oxide semiconductor film may be called a type oxide semiconductor film.

[0055] In addition, the first crystal portion has a specific crystal plane oriented in the thickness direction of the film. Therefore, the metal oxide film including the first crystal portion is subjected to X-ray irradiation in a direction approximately perpendicular to the upper surface of the film. When X-ray diffraction (XRD) measurements are performed, the diffraction angle (2 θ), a diffraction peak originating from the first crystal portion is confirmed. Even if the crystal part is present, the scattering of X-rays by the support substrate or the increase in background Therefore, the diffraction peaks may not be clearly visible. , which increases in proportion to the presence ratio of the first crystal portions contained in the metal oxide film, It can also be used as an indicator to estimate the crystallinity of the material.

[0056] Furthermore, electron beam diffraction can be used as a method for evaluating the crystallinity of a metal oxide film. For example, electron diffraction measurement is performed on a cross section, and the electron diffraction pattern of the metal oxide film according to one embodiment of the present invention is obtained. When the turn is observed, a first region having a diffraction spot due to the first crystal portion and a second region having a diffraction spot due to the second crystal portion are observed. A second region having diffraction spots due to the second crystalline portion is observed.

[0057] The first region having the diffraction spots due to the first crystal portion is a crystal having a c-axis orientation. On the other hand, the second region having diffraction spots due to the second crystalline region is due to the orientation It is derived from crystals that have no orientation or crystals that are randomly oriented in all directions. Therefore, the beam diameter of the electron beam used for electron diffraction, i.e., the area of the region to be observed, determines the In this specification, the beam diameter of the electron beam is set to 1. Electron diffraction measured at a diameter of 100 nm or more is called nanobeam electron diffraction (NBED). This is called Nano Beam Electron Diffraction (Nano Beam Electron Diffraction).

[0058] However, the crystallinity of the metal oxide film of one embodiment of the present invention was evaluated by a method different from NBED. Examples of methods for evaluating the crystallinity of metal oxide films include electron diffraction, X-ray diffraction, and neutron diffraction. In addition to the NBED mentioned above, there are also other electron diffraction methods such as transmission electron microscope ( TEM (Transmission Electron Microscopy), scanning Scanning Electron Microscopy (SEM) , Convergent Beam Electron Diffraction (CBED) ffraction), Selected Area Electron Diffraction (SAED) Electron Diffraction) can be suitably used.

[0059] In addition, in NBED, the electron beam diameter is increased (for example, 25 nm or less). Nanobeam electron diffraction (up to 100 nmΦ, or 50 nmΦ to 100 nmΦ) A ring-shaped pattern is observed in the pattern. On the other hand, in NBED, the beam diameter of the electron beam is sufficiently In the electron diffraction pattern under conditions where the diameter is reduced to a small value (for example, 1 nm or more and 10 nm or less), At the position of the ring-shaped pattern, a plurality of spots are distributed in the circumferential direction (also called the θ direction). In other words, the ripples that are observed under conditions where the electron beam diameter is increased may be observed. The ring-like pattern is formed by a collection of the above-mentioned multiple spots.

[0060] <1-2. Evaluation of the crystallinity of metal oxide films> Below, we will introduce three samples (samples A1 to A3) on which metal oxide films were formed under different conditions. First, the method for producing Samples A1 to A3 will be described.

[0061] [Sample A1] Sample A1 is a sample in which a metal oxide film with a thickness of approximately 100 nm is formed on a glass substrate. The metal oxide film contains indium, gallium, and zinc. The conditions for forming the oxide film were as follows: the substrate was heated to 170°C, and argon gas was introduced at a flow rate of 140 sccm. The gas and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device, and the pressure The pressure was set to 0.6 Pa, and a metal oxide target ( A 2.5 kW AC power was applied to the In:Ga:Zn (atomic ratio: 4:2:4.1). The ratio of the oxygen flow rate to the total gas flow rate may be referred to as the oxygen flow rate ratio. The oxygen flow rate ratio in the manufacturing conditions for sample A1 was 30%.

[0062] [Sample A2] Sample A2 is a sample in which a metal oxide film with a thickness of approximately 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A2 were as follows: the substrate was heated to 130°C, and the flow rate was 180 s Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were supplied to the chamber of the sputtering equipment. The oxygen flow rate ratio in the preparation conditions for sample A2 was 10%. The conditions other than the temperature and oxygen flow rate ratio were the same as those for the sample A1 described above.

[0063] [Sample A3] Sample A3 is a sample in which a metal oxide film with a thickness of approximately 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A3 were as follows: the substrate was heated at room temperature (for example, 20°C or higher and 30°C or lower). Room temperature is referred to as RT in Table 1 below.) A nitrogen gas and an oxygen gas with a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The oxygen flow rate ratio in the preparation conditions for sample A3 was 10%. The conditions other than the flow rate ratio were the same as those for the sample A1 described above.

[0064] Table 1 shows the conditions for producing samples A1 to A3.

[0065] [Table 1]

[0066] Next, the crystallinity of the prepared samples A1 to A3 was evaluated. To evaluate the crystallinity, cross-sectional TEM observation, XRD measurement, and electron diffraction were performed.

[0067] [Cross-sectional TEM observation] 1A to 3C show the cross-sectional TEM observation results of samples A1 to A3. 1B are cross-sectional TEM images of sample A1, and 2A and 2B are cross-sectional TEM images of sample A2. 3A and 3B are cross-sectional TEM images of sample A3.

[0068] Figure 1C shows a cross-section of sample A1 observed by a high-resolution transmission electron microscope (HR-TEM). Figure 2C is a cross-sectional HR-TEM image of sample A2. Figure 3C is a cross-sectional HR-TEM image of sample A3. Spherical Aberration Corrector ) function may be used. High-resolution TEM images using the spherical aberration correction function are particularly useful for Cs-corrected high-resolution TEM images. Cs-corrected high-resolution TEM images are obtained using, for example, the atomic It can be observed using a high-resolution analytical electron microscope such as the JEM-ARM200F.

[0069] As shown in FIGS. 1A to 2C, in samples A1 and A2, atoms are arranged in layers in the film thickness direction. In particular, the HR-TEM image shows that the atoms are arranged in layers. As shown in Figures 3A to 3C, in sample A3, atoms are easily observed in the film. It is difficult to confirm that the layers are arranged in the thickness direction. It appears that there is a large proportion of regions in which the molecules are oriented in layers in the film thickness direction.

[0070] [XRD measurement] Next, the XRD measurement results of each sample will be explained.

[0071] Figure 4A shows the XRD measurement results for sample A1, Figure 5A shows the XRD measurement results for sample A2, and Figure 6A The XRD measurement results of sample A3 are shown in .

[0072] In XRD measurement, the powder method (also known as the θ-2θ method), which is a type of out-of-plane method, is used. The θ-2θ method involves changing the incident angle of the X-rays and This is a method for measuring X-ray diffraction intensity by setting the angle of the detector to the same as the angle of incidence. The X-rays were incident from an angle of approximately 0.40° from the film surface, and the angle of the detector was changed to measure the X-ray diffraction. Grazing-Induced XRD (GIXRD), a type of out-of-plane method for measuring strength, Incidence XRD) method (also known as the thin film method or Seemann-Bohlin method) 4A, 5A, and 6A, the vertical axis represents the diffraction intensity in arbitrary units. The horizontal axis represents the angle 2θ.

[0073] As shown in FIGS. 4A and 5A, in samples A1 and A2, the rotation was observed around 2θ=31°. On the other hand, as shown in FIG. 6A, in sample A3, the 2θ The peak of the diffraction intensity around 2θ=31° is difficult to observe, or the peak of the diffraction intensity around 2θ=31° is The peak is extremely small, or there is no peak in the diffraction intensity around 2θ=31°.

[0074] The diffraction angle at which the peak of the diffraction intensity was observed (around 2θ=31°) was the same as that of single-crystal InGaZ This coincides with the diffraction angle of the (009) plane in the structure model of nO4. The above peaks are observed in A1 and A2, which indicates that the c-axis is oriented in the film thickness direction. Hereinafter, the crystal portion having the c-axis orientation or the first crystal portion may be included. In addition, a comparison of the intensities shows that the proportion of crystals with c-axis orientation is higher in sample A1 than in sample A2. It can be seen that the value of sample A3 is higher than that of sample A2. It is difficult to determine whether or not the crystal contains a c-axis oriented crystal portion.

[0075] From this result, the higher the substrate temperature during film formation and the larger the oxygen flow rate during film formation, This suggests a tendency for the proportion of crystal parts with c-axis orientation to increase.

[0076] [Electron Diffraction] Next, the results of electron diffraction measurements on samples A1 to A3 will be described. In the sagittal beam diffraction measurement, the electron beam diffraction pattern is measured when the electron beam is incident perpendicularly on the cross section of each sample. The electron beam diameter was set to two values: 1 nmΦ and 100 nmΦ.

[0077] In electron diffraction, not only the diameter of the incident electron beam but also the thickness of the sample is important. The thicker the thickness, the more information in the depth direction will appear in the electron diffraction pattern. Therefore, it is necessary to not only reduce the electron beam diameter but also the thickness of the sample in the depth direction. This allows us to obtain information on a more localized area. If the sample is too thin (for example, if the thickness in the depth direction of the sample is 5 nm or less), Therefore, if crystals exist in a very small area, only information can be obtained. The electron diffraction pattern may be similar to that of a single crystal. If the purpose is not to analyze the It is preferable that the thickness is 10 nm or less and typically 50 nm or less.

[0078] 4B and 4C show the electron diffraction patterns of sample A1, and Figs. 5B and 5C show the electron diffraction patterns of sample A2. 6B and 6C show the X-ray diffraction pattern of sample A1, and the electron beam diffraction pattern of sample A2, respectively.

[0079] The electron diffraction patterns shown in FIGS. 4B and 4C, 5B and 5C, and 6B and 6C The image data has been adjusted for contrast to make the electron diffraction pattern clear. 4B and 4C, 5B and 5C, and 6B and 6C, the most central The bright spot is due to the incident electron beam, and is the center of the electron diffraction pattern (diagram (also called direct spot or transmitted wave).

[0080] Furthermore, as shown in Figure 4B, when the beam diameter of the incident electron beam is set to 1 nmΦ, As multiple spots distributed in a flat pattern are observed, the metal oxide film is extremely small and planar. It can be seen that multiple crystal parts with orientations in various directions are mixed together. As shown in Fig. 1, when the diameter of the incident electron beam is set to 100 nm, the multiple crystals The diffraction spots from the area are connected and the brightness is averaged to form a ring-shaped diffraction pattern. In addition, two ring-shaped diffraction patterns with different radii can be observed in Figure 4C. Here, the diffraction patterns with smaller diameters are called the first ring, the second ring, etc. It can be seen that the first ring is brighter than the second ring. Two bright spots (first region) are observed where they overlap with ring 1.

[0081] The radial distance from the center of the first ring is This is almost the same as the radial distance from the center of the diffraction spot on the (009) plane. The first region is a diffraction spot due to the c-axis orientation.

[0082] In addition, as shown in Figure 4C, a ring-shaped diffraction pattern is observed, which indicates that the metal oxide In the oxide film, there are crystal parts oriented in all directions (hereinafter referred to as crystal parts without c-axis orientation). In other words, there exists a second crystal portion.

[0083] The two first regions are arranged symmetrically with respect to the center point of the electron diffraction pattern. Since the degrees are about the same, it is inferred that they have two-fold symmetry. The two first regions are diffraction spots due to the c-axis orientation. The direction of the line connecting the region and the center coincides with the direction of the c-axis of the crystal part. Since the c-axis is oriented in the film thickness direction, the metal oxide film contains crystalline parts whose c-axis is oriented in the film thickness direction. It is known that it exists.

[0084] Thus, the metal oxide film of sample A1 has a crystalline portion with c-axis orientation and a crystalline portion with c-axis orientation. It can be seen that the film contains a mixture of crystalline parts with and without crystalline parts.

[0085] The electron diffraction patterns shown in FIGS. 5B and 5C and 6B and 6C also show the same patterns as those shown in FIGS. The results are roughly the same as the electron diffraction pattern shown in 4C. However, the 2 The brightness of the two spots (first region) was the brightest in sample A1, followed by sample A2 and sample A3. The proportion of crystals with c-axis orientation was highest in sample A1, followed by sample A2. It is suggested that the sample A1 becomes lower in the order of A2.

[0086] [Method for quantifying the crystallinity of metal oxide films] Next, an example of a method for quantifying the crystallinity of a metal oxide film will be described with reference to FIGS. 7A to 9. Reveal.

[0087] First, an electron diffraction pattern is prepared (see FIG. 7A).

[0088] Note that Figure 7A shows measurements of a metal oxide film with a thickness of 100 nm, using a beam diameter of 100 nm. 7B is a contrast of the electron diffraction pattern shown in FIG. 7A. The electron diffraction pattern was obtained by adjusting the sample.

[0089] In Figure 7B, two clear spots (first regions) are located above and below the direct spot. These two spots (first region) are in the structural model of InGaZnO4. The diffraction spot corresponding to the (001) plane in the figure is due to the crystal part with c-axis orientation. On the other hand, apart from the first region, a low-luminance region is provided approximately concentrically with the first region. This is because the electron beam diameter is set to 100 nm. As a result, the defects caused by the structure of the crystal part (second crystal part) that does not have the c-axis orientation were eliminated. The dots are averaged and formed into a ring shape.

[0090] Here, the electron diffraction pattern shows diffraction spots resulting from crystal parts having c-axis orientation. The first region having a diffraction spot due to the second crystal portion and the second region having a diffraction spot due to the second crystal portion are overlapped. Therefore, a line profile including the first region and a line profile including the second region are observed. By acquiring and comparing the line profile, it is possible to quantify the crystallinity of the metal oxide film. become.

[0091] First, a line profile including a first region and a line profile including a second region This will be explained with reference to FIG.

[0092] Figure 8 shows the electron beam irradiation results obtained on the (100) surface of the InGaZnO4 structural model. The simulated electron diffraction pattern shown in Fig. 1 is divided into areas A-A', B-B', and This is a diagram with auxiliary lines for the area CC'.

[0093] The region A-A' shown in FIG. 8 shows two diffraction beams originating from the first crystal part having the c-axis orientation. The area B-B' and the area B-B' shown in FIG. In the region C-C', no diffraction spots due to the first crystal part having c-axis orientation are observed. The area A-A' and the area B-A' include a straight line passing through the direct spot. The angle at which the area B-B' or the area C-C' intersects is approximately 34°, specifically, 30° or more and 3 8° or less, preferably 32° to 36°, and more preferably 33° to 35°. Just do that.

[0094] The line profile shows the tendency shown in Figure 9 depending on the structure of the metal oxide film. Figure 9 shows the image of the line profile for each structure, the relative brightness R, and the potential The half-width (FWHM) of the spectrum due to the c-axis orientation obtained from the sagittal diffraction pattern A diagram explaining the full width at half maximum is shown below.

[0095] The relative luminance R shown in FIG. 9 is the integral intensity of the luminance in the area A-A' relative to the area B- B' or the integrated intensity of brightness in the region C-C'. The integrated intensity of the luminance in the areas A-A', B-B', and C-C' is In this case, the direct spot that appears at the center and the blur caused by the direct spot are The background is removed.

[0096] By calculating the relative brightness R, the strength of the c-axis orientation can be quantitatively determined. For example, as shown in FIG. 9, in a single-crystal metal oxide film, the c-axis orientation of the region A-A' The peak intensity of the diffraction spot due to the first crystal portion having the In the region C-C', no diffraction spots due to the first crystal part with c-axis orientation were observed. Therefore, the relative brightness R exceeds 1 and becomes extremely large. The oxide film was the highest, followed by CAAC only (details of CAAC will be described later), CAAC+n Anocrystal, nanocrystal, and amorphous metal oxide films In particular, nanocrystals that do not have a specific orientation and amorph For a metal oxide film of this type, the relative luminance R is 1.

[0097] In addition, the higher the periodicity of the crystal structure, the more the space caused by the first crystal part having the c-axis orientation is. The spectrum intensity becomes higher and the half-width of the spectrum becomes smaller. The metal oxide film had the smallest half-width, and CAAC alone, CAAC + nanocrystal, The half width increases in the order of nanocrystal, metal oxide film, and amorphous In the case of a metal oxide film, the half-width is very large, resulting in a profile called a halo.

[0098] [Analysis using line profiles] As mentioned above, the integral intensity of the luminance in the first region is multiplied by the integral intensity of the luminance in the second region. The intensity ratio of the crystalline portion to the crystalline portion is important information in that it allows us to estimate the proportion of crystalline portions with orientation. be.

[0099] Therefore, the electron diffraction patterns of the samples A1 to A3 shown above were analyzed using line profiles. The analysis was carried out using the above data.

[0100] The analysis results using the line profile of sample A1 are shown in Figures 10A1 and 10A2. The analysis results using the line profile of sample A2 are shown in Figures 10B1 and 10B2. The analysis results using the ion profile are shown in FIGS. 11A1 and 11A2, respectively.

[0101] 10A1 shows the electron diffraction pattern of the region A-A' and the region B-B' in the electron diffraction pattern shown in FIG. 4C. , and the electron diffraction pattern showing the region C-C'. FIG. 10B1 is the electron diffraction pattern shown in FIG. 5C. Electron beam diffraction pattern showing areas A-A', B-B', and C-C' 11A1 shows the electron diffraction pattern of the region A-A' in the electron diffraction pattern shown in FIG. 6C. Electron diffraction patterns showing regions B-B' and C-C'.

[0102] In addition, the regions A-A', B-B', and C-C' are electron diffraction patterns This can be calculated by normalizing the brightness of the direct spot that appears at the center of the This also allows for relative comparison between samples.

[0103] In addition, when calculating the brightness profile, the brightness caused by inelastic scattering from the sample is Subtracting the components as background allows for more accurate comparisons. Here, the brightness component due to inelastic scattering has a very broad profile in the radial direction. To obtain the image, the background brightness may be calculated by linear approximation. The area located on the lower brightness side of the straight line drawn along both sides of the peak is called the background. can be deducted as a bond.

[0104] Here, the area A-A' is calculated from the data after background subtraction using the method described above. The integrated intensity of brightness in the area A, area B-B', and area C-C' was calculated. The integrated intensity of the luminance in the region B-B' is calculated by subtracting the integrated intensity of the luminance in the region C The value obtained by dividing the luminance at -C' by the integrated intensity was calculated as the relative luminance R.

[0105] The relative luminance R of the samples A1 to A3 is shown in FIG. 12. and 10B2, and the left and right of the direct spot in the luminance profile shown in Fig. 11A2. At the peak located at , the integrated intensity of brightness in the region A-A' is calculated by multiplying the integrated intensity of brightness in the region B-B' The integral intensity of the luminance in the region A-A' divided by the integral intensity of the luminance in the region C-C' The values were calculated by dividing the luminance at each point by the integrated intensity.

[0106] As shown in FIG. 12, the relative luminances R of the samples A1 to A3 are as follows: Relative luminance of sample A1 R=25.00 Relative luminance of sample A2: R=3.04 Relative luminance of sample A3: R=1.05 The relative luminance R mentioned above was the average value at each of the four positions. The degree R is highest for sample A1, and decreases in the order of sample A2 and sample A3.

[0107] A metal oxide film according to one embodiment of the present invention is used as a semiconductor film in which a channel of a transistor is formed. In this case, the relative luminance R is more than 1 and not more than 40, preferably more than 1 and not more than 10, It is preferable to use a metal oxide film having a ratio of more than 1 to 3. By using an oxide film as the semiconductor film, high stability of electrical characteristics and low gate voltage region are achieved. and high field-effect mobility.

[0108] <1-3. Crystalline portion ratio> The proportion of crystalline parts in a metal oxide film can be estimated by analyzing cross-sectional TEM images. can.

[0109] First, the image analysis method will be explained. Two-dimensional fast Fourier transform (FFT) was performed on the TEM image. The FFT image is then processed to obtain a periodic FFT image. The masked FFT image is then processed by masking, which removes the rest of the image. 2D inverse Fourier transform (IFFT: Inverse Fast Fourier Transform) transform) to obtain an FFT filtered image.

[0110] This allows us to obtain a real space image in which only the crystal part is extracted. The proportion of crystalline parts can be estimated from the area ratio of the area. The area of the crystal is calculated by subtracting the area of the remaining image from the area of the original image (also called the area of the original image). The proportion of the other parts can be estimated.

[0111] Figure 13A shows a cross-sectional TEM image of sample A1, and Figure 13B shows the image analysis of the cross-sectional TEM image of sample A1. The cross-sectional TEM image of sample A2 is shown in Fig. 14A, and the cross-sectional TEM image of sample A3 is shown in Fig. 14B. 14B shows the images obtained after image analysis of the cross-sectional TEM image of sample A2. 15A shows a cross-sectional TEM image of sample A3, and FIG. 15B shows a cross-sectional TEM image of sample A3. The images obtained after the above are shown respectively.

[0112] In the image obtained after image analysis, the white areas in the metal oxide film are the oriented regions. The black areas correspond to areas containing crystalline parts with orientation, and the black areas correspond to areas containing crystal parts without orientation. The crystals correspond to regions containing crystalline parts or crystalline parts oriented in various directions.

[0113] From the results shown in FIG. 13B, the surface of sample A1 excluding the region including the oriented crystal part The ratio of the area was about 43.1%. The proportion of the area excluding the area containing the crystal part with orientation was approximately 61.7%. From the results shown in B, the ratio of the area excluding the area containing the oriented crystal part in sample A3 was approximately 89.5%.

[0114] The ratio of the portion excluding the oriented crystalline portion in the metal oxide film estimated in this way is If the content is 5% or more and less than 40%, the metal oxide film is a film with extremely high crystallinity and is acidic. It is preferable because it is difficult to create electron vacancies and the electrical properties are very stable. The proportion of the portion excluding the crystal portion having the orientation is 40% or more and less than 100%, preferably 60 % or more and 90% or less, the metal oxide film has oriented crystalline parts and oriented The mixture of amorphous and non-crystalline portions allows for both stable electrical properties and high mobility. Cut.

[0115] Here, it can be clearly confirmed in the cross-sectional TEM image or by image analysis of the cross-sectional TEM image. The area excluding the crystal part where the crystal can be grown is called the Lateral Growth Buffer Region. It can also be called ion (LGBR).

[0116] <1-4. Oxygen diffusion into metal oxide films> The following describes the results of evaluating the ease of oxygen diffusion into metal oxide films.

[0117] Here, the following three samples (samples B1 to B3) were prepared.

[0118] [Sample B1] First, a metal film with a thickness of about 50 nm was deposited on a glass substrate using the same method as for sample A1. An oxide film was formed. Then, a silicon oxynitride film with a thickness of about 30 nm was formed on the metal oxide film. , a silicon oxynitride film having a thickness of about 100 nm, and a silicon oxynitride film having a thickness of about 20 nm were formed by prototyping. In the following description, the metal oxide film is referred to as O The silicon oxynitride film may be referred to as S and the silicon oxynitride film may be referred to as GI.

[0119] Next, heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0120] Subsequently, a 5 nm thick In-Sn-Si oxide film was formed by sputtering.

[0121] Subsequently, oxygen addition treatment was performed on the silicon oxynitride film. The substrate temperature was set to 40°C using a welding device, and oxygen gas ( 16 O) and oxygen gas ( 18 O) was introduced into the chamber, and the pressure was increased to 15 P a) and a parallel plate was installed in the ashing device so that a bias was applied to the substrate side. An RF power of 4500 W was supplied between the electrodes for 600 seconds. Oxygen gas ( 16 O) is contained at the main component level, so the oxygen addition process To accurately measure the oxygen added, oxygen gas ( 18 O) was used.

[0122] Subsequently, a silicon nitride film having a thickness of approximately 100 nm was formed by plasma CVD.

[0123] [Sample B2] Sample B2 is a sample prepared under different film formation conditions for the metal oxide film from those for Sample B1. For sample B2, a metal oxide film with a thickness of approximately 50 nm was formed by the same method as for sample A2. It was filmed.

[0124] [Sample B3] Sample B3 is a sample prepared under different film formation conditions for the metal oxide film from those for Sample B1. For sample B3, a metal oxide film with a thickness of approximately 50 nm was formed by the same method as for sample A3. It was filmed.

[0125] Samples B1 to B3 were fabricated by the above steps.

[0126] [SIMS analysis] For samples B1 to B3, SIMS (Secondary Ion Mass Spectroscopy) was performed. ectrometry analysis 18 The concentration of O was measured. Regarding the sample B1 to B3, the samples B1 to B3 were not subjected to the heat treatment, and the samples B1 to B3 were subjected to the heat treatment. The conditions for heat treatment were as follows: 1 hour at 350°C in a nitrogen atmosphere; 2 hours at 350°C in a nitrogen atmosphere; and heat treatment at 450°C for 1 hour in air.

[0127] SIMS measurement results are shown in Figures 16A to 16C. 16A to 16C show the analysis results of the region containing I and OS. (SSDP (Substrate Side Depth Profile)-SIM The results of the analysis are shown below.

[0128] 16A to 16C, the gray dashed lines represent the profiles under the condition that no heat treatment was performed. The black dashed line is the profile under the condition of heat treatment at 350°C. The solid line indicates the profile under the condition of heat treatment at 450°C.

[0129] In each of samples B1 to B3, during GI 18 O is spreading, and OS During 18 It can be seen that O has diffused to the deepest position in sample B3. 18 O is diffused, and in the order of sample B2 and sample B1, 18 O diffusion is shallow Furthermore, by performing heat treatment at 350℃ and 450℃, the 18 It can be seen that O is diffusing.

[0130] From the above results, it is clear that oriented and non-oriented crystal parts are mixed and that the crystal parts are not oriented. A metal oxide film with a low proportion of crystalline portions having oxygen permeability is a film that is easily permeable to oxygen. It can be seen that the film is easy for oxygen to diffuse. It can be confirmed that oxygen in the GI film diffuses into the OS by performing this treatment.

[0131] The above results indicate that the higher the proportion (density) of oriented crystals, the greater the amount of oxygen in the thickness direction. This indicates that oxygen is less likely to diffuse in the thickness direction, and the lower the density, the more easily oxygen diffuses in the thickness direction. The ease of oxygen diffusion in metal oxide films can be considered as follows. do.

[0132] A metal oxide that contains a mixture of oriented crystalline parts and extremely fine non-oriented crystalline parts. In the film, the area other than the crystalline part (LGBR), which can be clearly observed in the cross-sectional observation image, is where oxygen diffuses. Therefore, the area near the metal oxide film is a region where oxygen is easily diffused, i.e., a diffusion path for oxygen. When there is a sufficient oxygen supply source in the crystalline part with orientation through the LGBR, It is believed that oxygen vacancies in the film can be reduced because oxygen is more easily supplied. .

[0133] For example, an oxide film that easily releases oxygen is provided in contact with the metal oxide film, and then heat treatment is performed. As a result, the oxygen released from the oxide film is diffused in the thickness direction of the metal oxide film by the LGBR. Then, oxygen is supplied laterally to the oriented crystals via the LGBR. This allows the metal oxide film to be sufficiently oriented in the crystalline portion and other regions. Oxygen is distributed throughout the film, and oxygen vacancies in the film can be effectively reduced.

[0134] Also, for example, as a metal oxide film, a film of In and M (M is Al, Ga, Y, or Sn) When an oxide film containing Zn is used, active oxygen is generated on the side surface of the oriented crystal part. (atomic oxygen) binds to the bound active oxygen. In addition, metals such as In, M, or Zn bind to the bound active oxygen. In this way, active oxygen and metals such as In, M, or Zn are repeatedly bonded. By doing so, it is thought that solid phase growth occurs laterally from the side of the oriented crystal part. This lateral growth of oriented crystals can be called self-organization. do.

[0135] Furthermore, for example, if there are hydrogen atoms that are not bonded to metal atoms in a metal oxide film, This may bond with oxygen atoms, forming OH, which may then be fixed. By forming a film, oxygen vacancies (V O ) with a hydrogen atom trapped in it (V O H) into a certain amount (for example, 1 × 10 17 cm -3 By forming OH, Also, V O H generates carriers, so they are trapped in the metal oxide film. This results in a state in which a certain amount of ria exists. This increases the carrier density of the metal oxide film. In addition, oxygen vacancies are also formed at the same time during film formation, but the oxygen vacancies are formed by the above-mentioned This can be reduced by introducing oxygen through the LGBR as shown in the figure. By this method, a metal oxide film having a relatively high carrier density and a sufficiently reduced oxygen vacancy can be obtained. can be formed.

[0136] In addition, the area other than the crystalline portion having orientation is made up of extremely fine crystals that do not have orientation during film formation. Since the metal oxide film is composed of crystalline regions, no clear crystal grain boundaries are observed. The fine crystal parts are located between a plurality of oriented crystal parts. The heat generated during film formation causes the crystals to grow laterally, bonding with adjacent crystalline parts that have the same orientation. In addition, the fine crystals also function as regions that generate carriers. Metal oxide films with such a structure can be applied to transistors to significantly improve their field-effect mobility. It is believed that this can be significantly improved.

[0137] In addition, the metal oxide film formed under low temperature and low oxygen flow conditions improves oxygen permeability. Therefore, for example, during the manufacturing process of a transistor, As the amount of oxygen increases, the amount of oxygen in the metal oxide film and at the interface between the metal oxide film and the insulating film increases. It is assumed that defects such as electron vacancies are reduced. This suggests that the reduction in ΔT leads to a significant increase in the on-state current of the transistor.

[0138] In this way, a transistor with improved on-state current can charge and discharge capacitance at high speed. It can be suitably used for switches, such as demultiplexer circuits. It can be used for.

[0139] In addition, after forming a metal oxide film and forming an oxide insulating film such as a silicon oxide film on it, In addition, it is preferable to perform plasma treatment in an oxygen atmosphere. Besides supplying oxygen, the hydrogen concentration can be reduced. For example, during plasma processing At the same time, fluorine remaining in the chamber may also be doped into the metal oxide film. Fluorine exists as negatively charged fluorine atoms and positively charged hydrogen atoms. The HF reacts with the metal oxide during the plasma treatment by bonding with the fluorine atom through Coulomb force to generate HF. As a result, the hydrogen concentration in the metal oxide film can be reduced. In addition, during plasma treatment, oxygen atoms and hydrogen are bonded together and released outside the film as H2O. In some cases, this may be the case.

[0140] Also, a structure in which a silicon oxide film (or a silicon oxynitride film) is laminated on a metal oxide film The fluorine in the silicon oxide film bonds with the hydrogen in the film, forming an electrically neutral HF Since the Si-F bond can exist as However, this also becomes electrically neutral. Also, HF in the silicon oxide film is It is thought that this will have no effect on the diffusion of

[0141] Due to the above-mentioned mechanism, oxygen vacancies in the metal oxide film are reduced and the metal in the film is It is believed that the reliability can be improved by reducing hydrogen atoms that are not bonded to metal atoms. In addition, when the carrier concentration of the metal oxide film is above a certain level, the electrical properties are improved. It is thought that this is the case.

[0142] <1-5. Evaluation of shallow defect levels using transistor characteristics> In the following, transistors having the metal oxide films of the samples A1 to A3 described above are fabricated. The results of measuring the defect level density will be explained below.

[0143] Here, two sets of samples C1 to C3 were fabricated, each with different semiconductor film formation conditions. Samples C1 to C3 are transistors with a channel length L of 6 μm and a channel width W of 50 μm. It is Ta.

[0144] [Transistor fabrication] First, a titanium film having a thickness of 10 nm and a copper film having a thickness of 100 nm were sputtered on a glass substrate. The conductive film was then processed by photolithography. Ta.

[0145] Next, four insulating layers were formed on the substrate and the conductive film. The insulating film was formed in a vacuum using a phase-enhanced chemical vapor deposition (PECVD) system. 50nm thick silicon nitride film, 300nm thick silicon nitride film, 50nm thick silicon nitride film A silicon nitride film with a thickness of 50 nm and a silicon oxynitride film with a thickness of 50 nm were used.

[0146] Next, an oxide semiconductor film is formed over the insulating film and processed into an island shape. The semiconductor layer was formed by the above method. The oxide semiconductor film was formed to a thickness of 40 nm. Successful.

[0147] In Sample C1, the metal oxide film used for the oxide semiconductor film was formed under the same conditions as in Sample A1. That is, the substrate temperature was set to 170°C, and the flow rate of argon gas was 140 sccm. and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device, and the pressure was At 0.6 Pa, a metal oxide target (I An AC power of 2.5 kW was applied to the alloy (n:Ga:Zn=4:2:4.1 [atomic ratio]). The oxygen flow rate was 30% and the thickness was approximately 40 nm.

[0148] In Sample C2, the metal oxide film used for the oxide semiconductor film was formed under the same conditions as in Sample A2. That is, the substrate temperature was set to 130°C, and the flow rate of argon gas was 180 sccm. and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device, and the pressure was At 0.6 Pa, a metal oxide target (I An AC power of 2.5 kW was applied to the alloy (n:Ga:Zn=4:2:4.1 [atomic ratio]). The oxygen flow rate was 10% and the thickness was approximately 40 nm.

[0149] In Sample C3, the metal oxide film used for the oxide semiconductor film was formed under the same conditions as in Sample A3. That is, the substrate temperature is set to room temperature (RT), and the argon flow rate is set to 180 sccm. A nitrogen gas and an oxygen gas with a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc was used. A 2.5 kW AC power was applied to the ZnO solution (In:Ga:Zn=4:2:4.1 [atomic ratio]). The oxygen flow rate was 10%. The thickness was approximately 40 nm.

[0150] Next, an insulating film having a thickness of 150 nm was formed on the insulating film and the semiconductor layer. The silicon oxynitride film was formed using a PECVD apparatus.

[0151] Next, a heat treatment was carried out. The heat treatment was carried out in a mixed gas atmosphere of nitrogen and oxygen for 3 hours. The heat treatment was carried out at 50°C for 1 hour.

[0152] Next, openings were formed in desired areas of the insulating film. The etching method was used.

[0153] Next, a conductive film is formed on the insulating film so as to cover the opening, and the conductive film is processed to form island-shaped conductive layers. After forming the island-shaped conductive film, an insulating film was formed on the bottom of the conductive film. By processing, island-shaped insulating films were formed.

[0154] The conductive film is a 10-nm-thick oxide semiconductor film, a 50-nm-thick titanium nitride film, and A copper film having a thickness of 100 nm was then formed. The plate temperature was set to 170°C, and oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering equipment. The pressure was 0.6 Pa, and a gold alloy containing indium, gallium, and zinc was introduced into the bar. Metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) with 2.5kW The titanium nitride film and the copper film were formed using a sputtering device. Successful.

[0155] Next, plasma treatment was performed on the oxide semiconductor film, the insulating film, and the conductive film. For the PECVD treatment, a substrate temperature was set at 220°C, and argon gas and nitrogen gas were used. The reaction was carried out under a mixed gas atmosphere.

[0156] Next, an insulating film was formed over the oxide semiconductor film, the insulating film, and the conductive film. A 100 nm thick silicon nitride film and a 300 nm thick silicon oxynitride film were deposited by PECVD. The film was formed by lamination using a device.

[0157] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. did.

[0158] Next, a conductive film is formed so as to fill the opening, and the conductive film is processed into an island shape. A conductive film having a thickness of 100 μm was formed on the surface of the semiconductor substrate to become the source electrode and the drain electrode. A titanium film with a thickness of 100 nm and a copper film with a thickness of 100 nm were deposited using a sputtering device. Formed.

[0159] Next, an insulating film was formed on the insulating film and the conductive film. An acrylic photosensitive resin film was used.

[0160] In this manner, samples C1 to C3 were prepared.

[0161] [Method for evaluating the density of shallow defect states] The shallow defect states (hereinafter referred to as sDOS) of metal oxides are the It can also be estimated from the electrical characteristics of the transistor used as a The density of the interface states is evaluated, and in addition to the density of the interface states, the electrons trapped in the interface states are also measured. Number N trap When considering the above, the method for predicting the subthreshold leakage current is We will explain about this.

[0162] Number of electrons trapped in the interface state N trap is, for example, the drain current of a transistor -Measured values of gate voltage (Id-Vg) characteristics and drain current-gate voltage (Id-Vg) The evaluation can be carried out by comparing the calculated values of the properties.

[0163] Figure 17 shows the calculated results for the source voltage Vs = 0V and the drain voltage Vd = 0.1V. The ideal Id-Vg characteristics obtained by the test and the actually measured Id-Vg characteristics of the transistor are compared. Among the measurement results of the transistor, the 1 × 1 0 -13 Only values above A are plotted.

[0164] Compared to the ideal Id-Vg characteristics calculated by calculation, the actual Id-Vg characteristics are The change in drain current Id with respect to g becomes gradual. This is because the energy at the bottom of the conduction band ( This is thought to be due to electrons being trapped in shallow interface states located near the interface. Here, the Fermi distribution function is used to estimate the trapping in shallow interface states (per unit area) , number of electrons per unit energy) N trap By taking into account Density N it can be estimated.

[0165] First, the electrons trapped in the interface trap states were measured using the schematic Id-Vg characteristics shown in Figure 18. Number of electrons N trap The dashed line indicates the trap density obtained by calculation. The dashed line shows the ideal Id-Vg characteristics without any level. The change in gate voltage Vg when changing from Id2 to Id3 is ΔV id The solid line indicates the actual The solid line shows the Id-Vg characteristics measured when the drain current changes from Id1 to Id2. The change in gate voltage Vg when ex When the drain current is Id1 and Id2, The potential at the interface of interest is φ it1 , φ it2 The change amount is Δφ it and do.

[0166] In Figure 18, the measured value has a smaller slope than the calculated value, so ΔV ex is always ΔV id Yo At this time, ΔV ex and ΔV id The difference in Therefore, the charge of the trapped electrons is Change ΔQ trap can be expressed by the following equation (1).

[0167]

number

[0168] C tg is the combined capacitance of the insulator and semiconductor per area. Also, ΔQ trap is a tiger Number of electrons (per unit area, per unit energy) N trap Using equation (2), It can also be expressed as, where q is the elementary charge.

[0169]

number

[0170] Equation (3) can be obtained by solving equations (1) and (2) simultaneously.

[0171]

number

[0172] Next, the limit Δφ of Eq. (3) it By taking 0, we can obtain equation (4).

[0173]

number

[0174] That is, using the ideal Id-Vg characteristics, the measured Id-Vg characteristics, and Equation (4), Number of trapped electrons in N trap It is possible to estimate the drain current The relationship between the potential at the interface and the potential at the interface can be determined by the above calculation.

[0175] Also, the number of electrons per unit area and unit energy, N trap and the density of interface states N it teeth The relationship is as shown in equation (5).

[0176]

number

[0177] where f(E) is the Fermi distribution function. N obtained from Eq. (4) trap to the formula ( 5) By fitting, Nit is determined. it Devices that have been configured Transfer characteristics including Id<0.1pA can be obtained by calculation using a simulator. .

[0178] Next, equation (4) is applied to the measured Id-Vg characteristics shown in Figure 17, and N trap was extracted The results are shown by white circles in Figure 19. Here, the vertical axis of Figure 19 is the fraction of the conduction band from the minimum Ec of the semiconductor. The Elmi energy Ef is shown by the dashed line, which indicates that the maximum value is just below Ec. N in equation (5) it Assuming the tail distribution of Equation (6), the following is shown by the dashed line in Figure 19: Good for N trap can be fitted, and the fitting parameters are Trap density N ta =1.67×10 13 cm -2 / eV, characteristic decay energy W ta = A value of 0.105 eV was obtained.

[0179]

number

[0180] Next, the obtained fitting curve of the interface state was calculated using a device simulator. The results of back-calculating the Id-Vg characteristics by feedback are shown in Figures 20A and 20B. Figure 20A shows the calculated results for drain voltages Vd of 0.1 V and 1.8 V. The Id-Vg characteristics of the transistor when the drain voltage Vd is 0.1V and 1.8V are shown. 20A and 20B show the Id-Vg characteristics of the capacitor. This is a graph showing Id as a logarithm.

[0181] The calculated curve and the plot of the measured values are almost identical. Therefore, it is possible to use the method for calculating the density of shallow defect states. It can be seen that the above method is quite valid.

[0182] [Evaluation results of shallow defect level density] Next, by comparing the measured electrical characteristics with the ideal calculated values based on the above method, Therefore, the shallow defect level densities of the two sets of samples C1 to C3 were measured.

[0183] FIG. 21 shows the results of calculating the average value of the shallow defect level density for two sets of samples C1 to C3. In any of the samples C1 to C3, the peak value of the shallow defect density was 2.5× 10 12 cm -2 eV -1 This indicates that the sample has an extremely low density of shallow defect states. The peak value of the density of shallow defect states in the metal oxide film is 2.5 × 10 1 2 cm -2 eV -1 Less than 1.75 x 10 12 cm -2 eV -1 Less than, better Preferably 1.5 x 10 12 cm -2 eV -1 less than 7.5 × 10 11 c m -2 eV -1 is less than.

[0184] In this way, in the samples C1 to C3, metal oxide films with low defect level densities were formed. This shows that the transistor is made of a metal film formed under low temperature and low oxygen flow conditions. The oxide film improves oxygen permeability, reducing the amount of oxygen that diffuses during the transistor manufacturing process. As a result, oxygen vacancies in the metal oxide film and at the interface between the metal oxide film and the insulating film increase. It is suggested that this is due to the reduction of defects such as

[0185] <1-6. Evaluation of deep defect levels in metal oxide films by CPM> In the following, we will use the constant photocurrent measurement method (CPM). The deep defect states (hereinafter referred to as dDOS) in metal oxide films were investigated using the ion beam diffraction method. The evaluation was carried out.

[0186] CPM measurement is performed when a voltage is applied between two electrodes on the sample and the photocurrent value becomes constant. The amount of light irradiated onto the sample surface between the terminals is adjusted so that the absorption coefficient is derived from the amount of light irradiated. In CPM measurement, if there is a defect in the sample, the defect The absorption coefficient increases at the energy (converted from wavelength) corresponding to the level present. By multiplying the increase in the absorption coefficient by a constant, the dDOS of the sample can be derived.

[0187] The absorption coefficient curve obtained by CPM measurement shows that the urbach effect is due to the band tail. By removing the absorption coefficient component called the defect level, the absorption coefficient due to the defect level can be calculated from the following equation: where α(E) represents the absorption coefficient at each energy level, and α u represents the absorption coefficient due to the Urbach tail.

[0188]

number

[0189] [Preparation of samples for CPM evaluation] Below, three samples (samples D1 to D3) were prepared and subjected to CPM evaluation.

[0190] First, a metal oxide film was formed on a glass substrate. A metal oxide film with a thickness of approximately 100 nm was formed by this method. A metal oxide film with a thickness of approximately 100 nm was formed in the same manner. A metal oxide film with a thickness of about 100 nm was formed in the same manner as in Sample A3.

[0191] Next, a silicon oxynitride film with a thickness of about 30 nm and a silicon nitride film with a thickness of about 100 nm were deposited on the metal oxide film. A silicon oxynitride film with a thickness of about 20 nm was formed by plasma CVD. The film was formed by laminating the layers.

[0192] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 350° C. for 1 hour.

[0193] Next, an oxide semiconductor film having a thickness of 100 nm was formed. The first oxide semiconductor film was formed at a substrate temperature of 170° C. Oxygen gas at a flow rate of 200 sccm was introduced into the chamber of the sputtering device, and the pressure was set to 0 0.6 Pa, and a metal oxide target (In :Ga:Zn=4:2:4.1 [atomic ratio]) and apply 2.5 kW AC power. The second oxide semiconductor film was formed at a temperature of 1000 K. At 70°C, argon gas at a flow rate of 180 sccm and oxygen gas at a flow rate of 20 sccm were added. The gas was introduced into the chamber of the sputtering device, and the pressure was set to 0.6 Pa. A metal oxide target containing In and Zn (In:Ga:Zn=4:2:4.1[ The film thickness was adjusted to 90 nm under the condition of applying an AC power of 2.5 kW. was formed.

[0194] Thereafter, heat treatment was carried out at 350° C. for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0195] Then, the oxide semiconductor film was removed by wet etching.

[0196] Subsequently, a silicon oxynitride film was formed. The silicon oxynitride film was formed using a gas having a flow rate of 1000 MPa. A mixture of SiH4 at 160 sccm and N2O at a flow rate of 4000 sccm was used at a pressure of 2 The film was formed by plasma CVD under the conditions of 0.0 Pa, power 1500 W, and substrate temperature 220°C. The thickness of the silicon oxynitride film was approximately 400 nm.

[0197] Subsequently, an opening was formed in the silicon oxynitride film by photolithography.

[0198] Next, a Ti film with a thickness of approximately 50 nm and an Al film with a thickness of approximately 400 nm were deposited by sputtering. Then, a laminated film of a Ti film with a thickness of about 100 nm was formed. The electrode was formed by processing using the Pfing method.

[0199] Thereafter, a heat treatment was carried out in a nitrogen atmosphere at 250° C. for 1 hour.

[0200] Samples D1 to D3 were fabricated by the above steps.

[0201] [CPM evaluation results] Figure 22 shows the CPM measurement results for sample D1, Figure 23 shows the CPM measurement results for sample D2, and Figure 24 The CPM measurement results of sample D3 are shown in Figures 22, 23, and 24. The vertical axis represents the absorption coefficient, and the horizontal axis represents the light energy. In the figure, the black solid line indicates the absorption coefficient curve of each sample, the dotted line indicates the tangent line, and the gray solid line indicates the denotes the optically measured absorption coefficient.

[0202] The value of the Urbach tail of sample D1 estimated from Figure 22 is 68.70 meV. The absorption coefficient obtained by subtracting the absorption coefficient due to the Urbach tail from the absorption coefficient curve, i.e., the deep The absorption coefficient due to the defect level is 1.21×10 -3 cm -1 Also, Figure 2 The Urbach tail value of sample D2 estimated from 3 is 64.46 meV, which is a deep defect. The value of the absorption coefficient due to the depression level is 1.36×10 -3 cm -1 Also, Figure 24 The Urbach tail value of sample D3 estimated from the The value of the absorption coefficient due to the level is 1.04 × 10 -3 cm -1 It was.

[0203] From the above results, it can be seen that the metal oxide films used in samples D1 to D3 have clear differences in deep defect levels. It can be seen that no difference is observed in the deep defect levels of samples D1 to D3. The reason is that an oxide insulating film is formed in contact with a metal oxide film, and the metal The oxygen vacancies in the metal oxide film were filled by the sufficient supply of oxygen to the oxide film. It is suggested that this is the case.

[0204] <1-7.Metal oxide film formation method> A method for forming a metal oxide film according to one embodiment of the present invention will be described below.

[0205] A metal oxide film according to one embodiment of the present invention can be formed by sputtering in an oxygen-containing atmosphere. A film can be formed.

[0206] The substrate temperature during film formation is from room temperature to 150°C, preferably from 50°C to 150°C, more preferably More preferably, the temperature is 100°C or higher and 150°C or lower, typically 130°C. By setting the substrate temperature within the above range, it is possible to separate the crystalline portion having orientation and the crystalline portion not having orientation. The ratio of the crystal part to the crystal part can be controlled.

[0207] The flow rate ratio of oxygen (oxygen partial pressure) during film formation is set to 0% or more and less than 50%, preferably 0% or more. more preferably 0% to 20% and even more preferably 0% to 15% It is preferable to set the oxygen flow rate to 10%. This allows the film to contain more crystal parts that do not have such a structure.

[0208] Therefore, by setting the substrate temperature during film formation and the oxygen flow rate during film formation within the above ranges, the orientation It is possible to obtain a metal oxide film in which crystalline parts having orientation and crystalline parts not having orientation are mixed. Furthermore, by setting the substrate temperature and oxygen flow rate within the above ranges, it is possible to obtain crystals with orientation. It is possible to control the ratio of the crystalline portions and the non-oriented crystalline portions.

[0209] The oxide targets that can be used for forming metal oxide films include In-Ga-Z The present invention is not limited to n-based oxides, but also includes, for example, In-M-Zn-based oxides (where M is Al, Ga, Y, or can be applied.

[0210] In addition, a sputtering target containing a polycrystalline oxide having a plurality of crystal grains is used, When a metal oxide film containing crystalline parts is formed, the sputtering target containing no polycrystalline oxide is Compared to the case where a crystalline metal oxide film is used, it is easier to obtain a crystalline metal oxide film.

[0211] The following is a consideration of the film formation mechanism of a metal oxide film, with reference to FIGS. 25A to 25D. The sputtering target has a plurality of crystal grains, and the crystals When the grains have a layered structure and the grains have an interface that is easy to cleave, the sputtering The sputtering target is bombarded with ions, which cleaves the crystal grains. The target for deposition is, for example, In and M (M is Al, G) as shown in FIG. 27 described later. a, Y, or Sn) and Zn, and having a layered structure oriented in the c-axis direction The crystal grains are clusters in the form of plates or pellets, and are nanoclusters. They can also be called pellets.

[0212] Here, as shown in FIG. 25A, the nanoclusters 20 cleaved from the target are flat. 27, which will be described later, it is easy to deposit the film with the flat surface facing the surface of the substrate 32. In the c-axis direction, the alloy contains In, M (M is Al, Ga, Y, or Sn), and Zn. In the case of a layered structure oriented in the direction perpendicular to the plane of the plane, the boundary between the (M, Zn) layer and the (M, Zn) layer shown in FIG. It easily cleaves on the surface.

[0213] Next, the particles 23 ejected from the target reach the surface of the substrate 32. Therefore, the particle 23 is called an atomic particle (atom). Nanoclusters can also be called nanoparticles (microparticles). As shown in FIG. 27, containing In, M (M is Al, Ga, Y, or Sn), and Zn, When the nanocluster 20 has a layered structure oriented in the c-axis direction, the particles 23 are Therefore, the particles 23 are easily bonded to the side surfaces of the nanoclusters 20. The particles 23 preferentially adhere to the side surfaces of the nanoclusters 20, filling the area. When activated, the nanoclusters 20 are chemically bonded to each other to form lateral growth portions 22. (See FIG. 25A.) The particles 23 are in the region between the nanoclusters 20. It can also be said to enter the area.

[0214] The lateral growth portion 22 is formed in a region 26 between the nanoclusters 20 (region 26 This is called the Lateral Growth Buffer Region (LGBR). It grows horizontally (also called lateral growth) to fill the gap. Here, the lateral direction refers to the direction perpendicular to the c-axis in the nanocluster 20, for example.

[0215] Here, nanoclusters are formed by heating the substrate to 450° C. or less, preferably 400° C. or less. Particles 23 adhere to the lateral growth portion 22 of the LB-20, and oxygen diffused to the particles 23 through the LGBR The reaction of particles 23 adhering to the surface of the substrate and then particles 23 adhering to the surface of the substrate again in the same way is likely to occur. It is presumed that the solid phase growth in the lateral direction of such nanoclusters is occurring. Growth can also be called self-organization.

[0216] Furthermore, as the lateral growth portions 22 grow laterally, the lateral growth portions 22 collide with each other. The part where the long part 22 collides is the connecting part 27, and the adjacent nanoclusters 20 are connected ( (See FIG. 25B.) In other words, a connection 27 is formed in the region 26. This is because the particles 23 Lateral growth portions 22 are formed on the side surfaces of the nanoclusters 20, and the lateral growth portions 22 grow in the lateral direction. In this way, it can be said that the regions 26 between the nanoclusters 20 are filled. Lateral growth portions 22 are formed until they fill the areas where no nanoclusters 20 are formed. .

[0217] Therefore, even if the nanoclusters 20 are formed facing different directions, Particles 23 grow laterally and fill the gaps between the nanoclusters 20. Therefore, no clear grain boundaries are formed.

[0218] Here, the particles 23 smoothly connect (anchore) the nanoclusters 20. In other words, a crystal structure different from either a single crystal or a polycrystal is formed in the connecting portion 27. As a result, a crystal structure having strain is formed at the connection 27 between the nanoclusters 20. For example, in the connecting portion 27, the crystal structure whose top surface is hexagonal is transformed into a pentagonal shape. Or it may be a heptagon.

[0219] Next, new nanoclusters 20 are formed with their flat sides facing the surface of the substrate 32. Then, particles 23 are deposited to fill the areas where nanoclusters 20 are not formed. This forms a lateral growth portion 22 (see FIG. 25C). In this way, the particles 23 form nanoclusters. The nanocluster layer 20 adheres to the side of the nanocluster layer 20, and the lateral growth portion 22 grows laterally. -20 are connected (see Figure 25D). The mth layer (m is an integer of 2 or more) is formed. The deposition continues until a metal oxide film having a stacked structure is formed.

[0220] Furthermore, by heating the substrate 32, the nanoclusters 20 bond together on the substrate surface. In this case, or as the rearrangement progresses, a metal oxide film containing oriented crystal parts is formed. It is thought that this will make it easier to

[0221] As described in this embodiment, a metal oxide film is formed by sputtering. However, the metal oxide of one embodiment of the present invention is preferably formed by the above method because the crystallinity can be easily controlled. The method for forming the film is not limited to this, but may be, for example, a pulsed laser deposition (PLD) method, Plasma-enhanced chemical vapor deposition (PECVD), thermal CVD (Chemical Vapor Deposition) eposition) method, ALD (Atomic Layer Deposition) A thermal CVD method, a vacuum deposition method, etc. may also be used. Examples of thermal CVD methods include MOCVD (Metal Oxide Chemical Vapor Deposition) and Organic Chemical Vapor Deposition (OCCVD) is one example. can be.

[0222] <1-8. Composition and structure of metal oxide films> The metal oxide film of one embodiment of the present invention can be applied to a semiconductor device such as a transistor. Hereinafter, a metal oxide film having semiconductor properties (hereinafter referred to as an oxide semiconductor film) will be specifically described. This article explains:

[0223] First, the composition of the oxide semiconductor film will be described.

[0224] As described above, the oxide semiconductor film is made of indium (In) and M (M is Al, Ga, It has Y (Y), Sn (Sn), and Zn (zinc).

[0225] The element M is aluminum, gallium, yttrium, or tin. In addition to the above, other elements that can be applied to the Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium tantalum, tungsten, magnesium, etc. may also be used. A combination of two or more of the above elements may also be used.

[0226] Next, elements of indium, the element M, and zinc contained in the oxide semiconductor film of one embodiment of the present invention will be described. A preferred range of the electron number ratio will be described with reference to Figures 26A to 26C. The atomic ratio of oxygen is not described in Sections 26C to 26C. The atomic ratios of indium, element M, and zinc are [In], [M], and [Z n].

[0227] In Figures 26A to 26C, the dashed lines indicate [In]:[M]:[Zn]=(1+α):( The line where the atomic ratio is 1-α):1 (-1≦α≦1), [In]:[M]:[Zn]= The line where the atomic ratio is (1+α):(1-α):2, [In]:[M]:[Zn]=( The line where the atomic ratio is 1+α):(1-α):3, [In]:[M]:[Zn]=(1 +α):(1-α):4 atomic ratio line, and [In]:[M]:[Zn]=( This represents the line where the atomic ratio is 1+α):(1-α):5.

[0228] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β, the line where [In ]:[M]:[Zn]=1:3:β, the atomic ratio is [In]:[M]:[Zn ]=1:4:β, and the atomic ratio of [In]:[M]:[Zn]=2:1:β. The line where the atomic ratio is [In]:[M]:[Zn]=5:1:β Represents in.

[0229] Also, the atomic number of [In]:[M]:[Zn]=0:2:1 shown in FIGS. 26A to 26C An oxide semiconductor film having this ratio or a value close to it tends to have a spinel-type crystal structure.

[0230] 26A and 26B show the structure of the oxide semiconductor film of one embodiment of the present invention, in which indium, An example of a preferred range of the atomic ratio of element M and zinc is shown.

[0231] As an example, FIG. 27 shows InMZn where [In]:[M]:[Zn]=1:1:1. Figure 27 shows the crystal structure of InMZ when observed from a direction parallel to the b axis. The crystal structure of nO4 is shown in FIG. 27. The metal element in the (Zn) layer represents element M or zinc. The ratio of lead is equal. The element M and zinc are interchangeable and the arrangement is random. do.

[0232] In addition, indium and element M can be substituted for each other. Therefore, the element of the (M, Zn) layer The element M can be replaced with indium, and the layer can be expressed as (In,M,Zn). In this case, In It has a layered structure with one layer and two (In, M, Zn) layers.

[0233] In addition, indium and the element M can be substituted for each other. Therefore, the element MZnO2 layer M replaces indium, In α M 1-α It can also be expressed as ZnO2 layer (0<α≦1) In this case, the InO2 layer is 1, and the In α M1-α The layered structure has two ZnO layers. In addition, indium in the InO2 layer is substituted for element M, and In 1-α M α O2 layer (0<α≦ 1) In this case, In 1-α M α O2 layer is 1, MZnO2 layer is It has a layered structure of 2.

[0234] In the oxide with the atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1 , (M, Zn) layer has 3 layers. That is, [Z When the oxide crystallizes, the ratio of the (M, Zn) layer to the In layer increases. Increase.

[0235] However, in the oxide, when the number of In layers is 1 and the number of (M, Zn) layers is not an integer, There may be multiple types of layered structures where the number of In layers is 1 and the number of (M, Zn) layers is an integer. For example, when [In]:[M]:[Zn]=1:1:1.5, the In layer is 1, and ( A layer structure in which the number of (M,Zn) layers is 2 and a layer structure in which the number of (M,Zn) layers is 3 are mixed. It may have a granular structure.

[0236] For example, when an oxide semiconductor film is formed using a sputtering apparatus, the number of atoms of the target In particular, depending on the substrate temperature during film formation, the target In some cases, the [Zn] of the film may be smaller than the [Zn] of the base.

[0237] In addition, multiple phases may coexist in the oxide semiconductor film (for example, two-phase coexistence or three-phase coexistence). For example, the atomic ratio of [In]:[M]:[Zn]=0:2:1 and its neighboring values In terms of atomic ratio, two phases, a spinel-type crystal structure and a layered crystal structure, tend to coexist. The atomic ratio [In]:[M]:[Zn]=1:0:0 and the atomic number values around it In this ratio, two phases, a bixbyite-type crystal structure and a layered crystal structure, tend to coexist. When multiple phases coexist in a semiconductor film, grain boundaries (grain boundaries) occur between different crystal structures. (also called undaries) may be formed.

[0238] In addition, by increasing the indium content, the carrier mobility (electron This is because the oxide containing indium, element M, and zinc can be In semiconductor films, the s orbitals of heavy metals mainly contribute to carrier conduction, and the inclusion of indium By increasing the concentration, the overlapping area of s orbitals becomes larger, and the indium content The oxide semiconductor film with a high indium content has a higher carrier content than the oxide semiconductor film with a low indium content. This is because the electron mobility is increased.

[0239] On the other hand, when the contents of indium and zinc in the oxide semiconductor film are low, the carrier mobility Therefore, the atomic ratio [In]:[M]:[Zn]=0:1:0 and its In the atomic ratio having a value close to this (for example, region C shown in FIG. 26C), the insulating property becomes high.

[0240] Therefore, the oxide semiconductor film of one embodiment of the present invention has high carrier mobility and few grain boundaries. It is preferable that the atomic ratio be that shown in region A in FIG. 26A, which tends to form a layered structure without any problem. stomach.

[0241] In addition, in the region B shown in FIG. 26B, [In]:[M]:[Zn]=4:2:3 to 4.1 , and its neighboring values. The neighboring values include, for example, the atomic ratio [In]:[M]:[ Zn]=5:3:4. The oxide semiconductor film having the atomic ratio shown in region B includes In particular, the oxide semiconductor film has excellent crystallinity and high carrier mobility.

[0242] Note that the condition for forming the oxide semiconductor film into a layered structure is uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the atomic ratio. Even if the ratio is the same, a layered structure may or may not be formed depending on the formation conditions. Therefore, the illustrated region is a region showing the atomic ratio in which the oxide semiconductor film has a layered structure. , the boundaries between regions A to C are not strict.

[0243] <1-9. Structure of metal oxide films> Next, the structure of a metal oxide film (hereinafter referred to as an oxide semiconductor) will be described.

[0244] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- amorphous oxide semiconductors and amorphous oxide semiconductors. do.

[0245] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductor, and nc-OS.

[0246] Amorphous structures are generally isotropic and have no heterogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The positions are not fixed, the bond angles are flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0247] That is, a stable oxide semiconductor is transformed into a completely amorphous In addition, it is not isotropic (for example, in a microscopic region, An oxide semiconductor having a periodic structure cannot be called a completely amorphous oxide semiconductor. -like OS is not isotropic but has an unstable structure with voids. In terms of instability, a-like OS is physically an amorphous oxide semiconductor. Close to.

[0248] [CAAC-OS] First, let me explain about CAAC-OS.

[0249] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0250] CAAC-OS is an oxide semiconductor with high crystallinity. CAAC-OS is designed to be free from impurities and defects. It can also be said to be an oxide semiconductor with few defects (such as oxygen vacancies).

[0251] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0252] [nc-OS] Next, we will explain nc-OS.

[0253] We will explain the analysis of nc-OS by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0254] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS may have a higher density of defect states than the CAAC-OS.

[0255] [a-like OS] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0256] A-like OS has porosity or low density areas. Therefore, it is an unstable structure.

[0257] In addition, a-like OS has porosity, so compared to nc-OS and CAAC-OS, Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of nc-OS and CAAC- The density of OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a density of less than 78%.

[0258] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It is less than For example, in an oxide semiconductor satisfying the atomic ratio of In:Ga:Zn=1:1:1, The densities of nc-OS and CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 is less than.

[0259] If single crystals of the same composition do not exist, single crystals of different compositions can be combined in any ratio. By combining these, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density corresponding to a single crystal of a desired composition is calculated based on the ratio of the single crystals of different compositions combined. However, the density can be estimated by using as few types of single crystals as possible. It is preferable to estimate them together.

[0260] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the above-mentioned compounds.

[0261] <1-10. Structure using metal oxide film in transistor> Next, a structure in which a metal oxide film (hereinafter referred to as an oxide semiconductor film) is used for a transistor will be described. This article explains:

[0262] Note that by using an oxide semiconductor film for a transistor, for example, polycrystalline silicon can be used as a Compared to transistors using a silicon-based gate electrode, it reduces carrier scattering at grain boundaries. Therefore, a transistor with high field effect mobility can be realized. A highly reliable transistor can be realized.

[0263] The oxide semiconductor film of one embodiment of the present invention includes oriented crystal parts and non-oriented crystal parts. The oxide semiconductor film having such crystallinity is a film in which the oxide semiconductor film has a mixed structure. This makes it possible to realize a transistor that combines high field-effect mobility with high reliability.

[0264] <1-11. Carrier density of metal oxide films> The carrier density of a metal oxide film (hereinafter referred to as an oxide semiconductor film) will be described below. .

[0265] The factors that affect the carrier density of an oxide semiconductor film include oxygen in the oxide semiconductor film and Examples of the causes include vacancies (Vo) and impurities in the oxide semiconductor film.

[0266] When the number of oxygen vacancies in the oxide semiconductor film increases, hydrogen bonds to the oxygen vacancies (this state is called Vo When the oxide semiconductor film is heated to a temperature higher than that of the oxide semiconductor film, the density of defect states increases. When the amount of impurities increases, the density of defect states increases due to the impurities. By controlling the defect state density of the oxide semiconductor film, the carrier density of the oxide semiconductor film can be controlled. do.

[0267] Here, a transistor using an oxide semiconductor film for a channel region will be considered.

[0268] Suppression of a negative shift in the threshold voltage of a transistor or suppression of the off-current of a transistor In order to reduce the carrier density of the oxide semiconductor film, it is preferable to reduce the carrier density of the oxide semiconductor film. When the carrier density of the oxide semiconductor film is reduced, impurities in the oxide semiconductor film It is sufficient to lower the impurity concentration and reduce the defect level density. The low density of defect states is called high purity intrinsic or substantially high purity intrinsic. The carrier density of the conductive oxide semiconductor film is 8×10 15 cm -3 Less than 1 x10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 -9 cm -3 That's all there is to it.

[0269] On the other hand, improving the on-state current of a transistor or improving the field-effect mobility of a transistor In this case, it is preferable to increase the carrier density of the oxide semiconductor film. In order to increase the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film is The density of defect states in the oxide semiconductor film may be increased slightly. Alternatively, it is preferable to make the band gap of the oxide semiconductor film smaller. In the range where the on / off ratio of the Id-Vg characteristics is obtained, the impurity concentration is slightly high, or An oxide semiconductor film having a high or slightly high density of defect states can be considered to be substantially intrinsic. The electron affinity is large, and the band gap is accordingly small, resulting in thermal excitation. The oxide semiconductor film in which the density of trapped electrons (carriers) is increased can be considered to be substantially intrinsic. In addition, when an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor is The voltage becomes lower.

[0270] The oxide semiconductor film with the increased carrier density described above is slightly n-type. Therefore, an oxide semiconductor film with an increased carrier density is called a "slightly-n" film. That's fine.

[0271] The carrier density of a substantially intrinsic oxide semiconductor film is 1×10 5 cm -3 More than 1×10 1 8 cm -3 Less than 1 x 10 is preferable. 7 cm -3 More than 1×10 17 cm -3 The following is preferred: 1×10 9 cm -3 5x10 or more 16 cm -3 Even better: 1 x 10 10 cm -3 More than 1×10 16 cm -3 Even better: 1 x 10 11 cm -3 Below top 1×10 15 cm -3 The following is even more preferred:

[0272] Furthermore, by using the above-described substantially intrinsic oxide semiconductor film, the reliability of the transistor can be improved. Here, referring to FIG. 28, when an oxide semiconductor film is used for a channel region, The reason why the reliability of a transistor is improved will be described. 1 is a diagram illustrating an energy band in a transistor used in a channel region.

[0273] In FIG. 28, GE denotes a gate electrode, GI denotes a gate insulating film, and OS denotes an oxide semiconductor film. and SD represent the source electrode or the drain electrode, respectively. a gate electrode, a gate insulating film, an oxide semiconductor film, and a source electrode or is an example of the energy band of the drain electrode.

[0274] In FIG. 28, a silicon oxide film is used as the gate insulating film, and an oxide semiconductor The film is made of In-Ga-Zn oxide. The transition level (εf) of the defect is formed at a position 3.1 eV away from the conduction band of the gate insulating film. The gate voltage (Vg) is 30 V. The Fermi level (Ef) of the silicon oxide film at the interface is calculated from the conduction band of the gate insulating film to 3. The Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, a gate electrode is formed at the interface between the oxide semiconductor film and the silicon oxide film. The Fermi level (Ef) of the silicon oxide film is lowered. (carriers), and X in FIG. 28 represents a defect level in the silicon oxide film.

[0275] As shown in FIG. 28, when a gate voltage is applied, for example, carriers are thermally excited. When this happens, carriers are trapped in the defect level (X in the figure), and the charge changes from positive ("+") to neutral. The charge state of the defect level changes to "0". That is, the Fermi level of the silicon oxide film The sum of the energy of the thermal excitation and the energy of the (Ef) is higher than the defect transition level (εf). When this occurs, the charge state of the defect level in the silicon oxide film changes from a positive state to a neutral state, and a transition occurs. The threshold voltage of the transistor will shift in the positive direction.

[0276] In addition, when oxide semiconductor films having different electron affinities are used, the gate insulating film and the oxide semiconductor film The depth at which the Fermi level is formed at the interface with the oxide with a large electron affinity may differ. When an oxide semiconductor film is used, the following occurs at the interface between the gate insulating film and the oxide semiconductor film and in the vicinity thereof: The conduction band of the gate insulating film shifts upward. In this case, defects that can form in the gate insulating film The level (X in FIG. 28) also moves upward, so that the free energy at the interface between the gate insulating film and the oxide semiconductor film The energy difference between the electrons at the electron level and the electrons at the electron level becomes large. The amount of charge trapped in the gate insulating film is reduced. For example, the amount of charge trapped in the silicon oxide film is reduced. The change in the charge state of the defect level that can be generated is reduced, and the gate bias heat Transistor behavior under GBT (Gap Temperature) stress The fluctuation of the threshold voltage can be reduced.

[0277] In addition, it takes a long time for charges trapped in defect states in the oxide semiconductor film to disappear. Therefore, oxides with high defect level density are Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. be.

[0278] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In addition, in order to reduce the impurity concentration in the oxide semiconductor film, It is preferable that the impurity concentration in the adjacent film is also reduced. , alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0279] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0280] When silicon or carbon, which is one of the group 14 elements, is contained in an oxide semiconductor film, Therefore, the defect level is formed in the silicon oxide semiconductor film. The concentration of silicon and carbon at the interface of the oxide semiconductor film and its vicinity (secondary in Secondary Ion Mass Spectrometry (SIMS) The concentration obtained by the experiment was 2 × 10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 The following applies.

[0281] Furthermore, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, a defect level Therefore, alkali metal or alkaline earth metal A transistor using an oxide semiconductor film containing metals tends to be normally on. Therefore, it is possible to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film. Specifically, it is preferable to use an alkali metal or an oxide semiconductor film obtained by SIMS. or alkaline earth metal concentration is 1×10 18 atoms / cm 3 Below, preferably 2x 10 16 atoms / cm 3 Do the following:

[0282] Furthermore, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated, and As a result, the oxide semiconductor film containing nitrogen tends to become n-type. A transistor using an oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, The nitrogen concentration in the oxide semiconductor film is 5×10 19 atoms / cm 3 Less than, preferably is 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0283] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that bonds to metal atoms to form water. Therefore, oxygen vacancies may be formed. When hydrogen enters the oxygen vacancies, Electrons may be generated. Also, some of the hydrogen may combine with oxygen, which combines with the metal atom. Therefore, the oxide semiconductor film containing hydrogen may generate electrons, which are carriers. Therefore, a transistor using the water in the oxide semiconductor film tends to be normally on. Specifically, in the oxide semiconductor film, The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm 3 Less than, preferably 1×10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0284] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This allows the transistor to have stable electrical characteristics.

[0285] In addition, the oxide semiconductor film has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferable to have one.

[0286] The thickness of the oxide semiconductor film is 3 nm to 200 nm, preferably 3 nm to 100 nm. 00 nm or less, and more preferably 3 nm or more and 60 nm or less.

[0287] In addition, when the oxide semiconductor film is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose is In:M:Zn. =1:1:0.5, In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, I n:M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2 :1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4.1, In:M: Zn=5:1:7, etc. is preferred.

[0288] <1-12. Oxygen diffusion in metal oxide membranes> The diffusion of oxygen into a metal oxide film (hereinafter referred to as an oxide semiconductor film) will be described below.

[0289] The structure of the nanoclusters contained in the oxide semiconductor film described above is shown in FIGS. 29A and 29B. The nanocluster (also called a pellet) shown in FIG. 29A is composed of two (In, M , Zn) layer (layer having In, M (M is Al, Ga, Y, or Sn), Zn, oxygen) An In layer (a layer containing In and oxygen) is formed between the layers. Instead of the (In,M,Zn) layer, a (M,Zn) layer (a layer having M, Zn, and oxygen) is formed. In some cases, this may be the case.

[0290] For example, when [In]:[M]:[Zn]=1:1:1, the crystal structure shown in FIG. In many cases, an In layer is formed between two (M, Zn) layers, as shown in the figure. [In]:[M]:[Zn]=4:2:3 to 4.1 and its neighboring values. In addition, when the amount of In is greater than [In]:[M]:[Zn]=1:1:1, the results shown in FIG. In the (M,Zn) layer of the crystal structure, some of the elements M or Zn are replaced by In, forming (In,M,Z n) layer is often formed.

[0291] In addition, the crystal part in which multiple nanoclusters are arranged so as to have an orientation in the thickness direction of the film is The c-axis oriented crystalline portion is formed in the thickness direction of the film. The crystal parts that do not have a c-axis orientation and are oriented in various directions are called the crystal parts that do not have a c-axis orientation. is.

[0292] In addition, when [In]:[M]:[Zn]=4:2:3 to 4.1 or its neighboring values, In this case, the content of zinc oxide is relatively high, so that the oxide semiconductor film contains crystalline parts with c-axis orientation. The proportion of presence increases.

[0293] By forming an oxide semiconductor film using the above-described film formation method, nanoclusters are formed during film formation. In addition, oxygen vacancies are easily formed in the oxide semiconductor film. Conditions that increase the proportion of crystalline parts (for example, film formation temperature is room temperature, oxygen flow rate is 10%) ) and oxygen vacancies are formed in the nanoclusters during film formation. Oxygen vacancies are formed in the (In,M,Zn) layer and the In layer. In the (In,M,Zn) layer, where M or Zn in the (In,M,Zn) layer is replaced by In, there is an oxide layer near the In. Here, the formation of oxygen vacancies means that In, M or The oxygen that was present between the Zn atoms disappears. Therefore, oxygen vacancies are formed. This causes distortion in the crystal structure of the (In, M, Zn) layer and the In layer that form the nanoclusters. arise.

[0294] Here, the oxide semiconductor film in contact with the oxide semiconductor film in which oxygen vacancies are formed functions as a sufficient oxygen supply source. By forming an oxide film having such a property, oxygen can be supplied from the oxide film. As such an oxide film, an oxide semiconductor film or an oxide insulating film containing excess oxygen is used. As the oxide semiconductor film, for example, the above-described metal oxide film can be used. The oxide insulating film may be, for example, silicon oxide or silicon oxynitride. Note that the oxide film that functions as an oxygen source is not necessarily an oxide semiconductor film. For example, the oxide film that functions as an oxygen supply source and the oxide semiconductor An oxygen-permeable membrane may be formed between the membranes.

[0295] To form an oxide semiconductor film or an oxide insulating film containing excess oxygen, for example, If the atmosphere is an oxygen-rich atmosphere (for example, the film-forming gas is set to 100% oxygen), the film can be formed. For example, the oxide semiconductor film or the oxide insulating film may be subjected to ion implantation or ion doping. Oxygen can be added by a doping method or plasma treatment. A film is formed on a conductive film or an oxide insulating film by a sputtering method in an atmosphere containing oxygen. Oxygen can be added by

[0296] When oxygen is supplied from the oxide film functioning as an oxygen supply source to the oxide semiconductor film, When the oxide semiconductor film contains impurities such as excess water or hydrogen, the oxide semiconductor This can hinder the diffusion of oxygen through the membrane, which can lead to the oxidation of the membrane, which acts as an oxygen source. Before forming the oxide semiconductor film, the oxide semiconductor film is subjected to heat treatment to be dehydrated and dehydrogenated. is preferred.

[0297] An oxide semiconductor film is formed in contact with the oxide film functioning as an oxygen supply source, and heat treatment is performed. By this, excess oxygen (active oxygen) can be supplied from the oxide film to the oxide semiconductor film. Here, the nanoclusters are distorted by oxygen vacancies, so the active oxygen The oxygen diffuses into the oxide semiconductor film through strain caused by oxygen vacancies.

[0298] The diffused active oxygen is deposited on the surface or side of the nanocluster, e.g., (In,M,Zn) This fills the oxygen vacancies formed in the layer, and the nanoclusters are formed on the surface or side of the nanoclusters. This reduces oxygen vacancies and reduces sDOS caused by oxygen vacancies formed in the (In,M,Zn) layer. can be made smaller.

[0299] Here, by filling the oxygen deficiency on the surface or side surface of the nanocluster, active oxygen becomes less likely to penetrate into the nanocluster. Further, hydrogen in the oxide semiconductor film also diffuses by heat treatment. Therefore, hydrogen is trapped in the oxygen deficiency formed in the nanocluster, for example, in the In layer, and VoH is likely to be formed inside the nanocluster. Vo H generates carriers, increasing the carrier density inside the nanocluster.

[0300] By forming a transistor using such an oxide semiconductor film, the increase in the carrier density inside the nanocluster can significantly increase the on-current of the transistor. Furthermore, by reducing the sDOS on the surface and side surfaces of the nanocluster, the subthreshold swing value of the transistor can be reduced.

[0301] In addition, in a transistor using an oxide semiconductor film, carriers mainly generated in the In layer are considered to mainly flow through the lower end of the conduction band formed in the (In, M, Zn) layer or (M, Zn) layer. At this time, the lower end of the conduction band is mainly InO x (x > 0), ZnO x (x > 0) and is presumed to be formed.

[0302] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification.

[0303] (Embodiment 2) <Configuration of CAC> Hereinafter, a metal oxide film (hereinafter referred to as an oxide semiconductor film CAC (Cloud Aligned Complementary) -Explain the OS configuration.

[0304] CAC is, for example, a semiconductor in which elements constituting an oxide semiconductor are 0.5 nm or more and 10 nm or less, Preferably, the material is unevenly distributed in a size of 1 nm or more and 2 nm or less, or in the vicinity thereof. In the following, we will discuss the case where one or more metal elements are unevenly distributed in an oxide semiconductor. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 2 The mixed state of particles with sizes of less than 1 nm or close to that size is called a mosaic or patch state. cormorant.

[0305] For example, CAC-IGZ in In-Ga-Zn oxide (hereinafter also referred to as IGZO) O is indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0.) , or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2, and Z 2 is a real number greater than 0) and gallium oxide (GaO X3 (X3 is 0 ), or gallium zinc oxide (Ga X4 Zn Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0.) This results in a mosaic pattern, and the mosaic InO X1 , or In X2 Zn Y2 O Z2 However, the structure is such that the particles are uniformly distributed in the film (hereinafter also referred to as a cloud-like structure).

[0306] In other words, CAC-IGZO is GaO X3 The region where In is the main component and X2 Zn Y2 O Z 2, or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the ratio of an In atom to the element M in the first region is The atomic ratio of In to element M in the first region is greater than the atomic ratio of In to element M in the second region. , the concentration of In is higher than that of the first region.

[0307] IGZO is a common name and refers to a compound of In, Ga, Zn, and O. A typical example is InGaO3(ZnO) m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include:

[0308] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and, in the ab plane, It is a non-oriented, connected crystal structure.

[0309] On the other hand, CAC is related to the material composition. CAC is a material containing In, Ga, Zn, and O. In terms of material composition, there are areas where nanoparticles with Ga as the main component are observed, and areas where In is observed. The nanoparticle-like regions, which are mainly composed of , and the regions observed are randomly dispersed in a mosaic pattern. Therefore, the crystal structure is a secondary element in CAC.

[0310] Note that the CAC does not include a laminated structure of two or more types of films with different compositions. For example a structure composed of two layers, namely a film mainly composed of In and a film mainly composed of Ga, is not included.

[0311] Note that in some cases, it may not be possible to observe a clear boundary between the region where GaO X3 is the main component and the region where In X2 Zn Y2 O Z2 or InO X1 is the main component.

[0312] <Analysis of CAC-IGZO> Subsequently, the results of measurements of the oxide semiconductor film formed on the substrate using various measurement methods will be described.

[0313] ≪Configuration and Fabrication Method of Samples≫ Hereinafter, nine samples according to one aspect of the present invention will be described. Each sample is fabricated under different conditions of the substrate temperature and the oxygen gas flow ratio when forming the oxide semiconductor film. Note that each sample has a structure including a substrate and an oxide semiconductor film on the substrate.

[0314] The fabrication method of each sample will be described.

[0315] First, a glass substrate is used as the substrate. Subsequently, using a sputtering apparatus, an In-Ga-Zn oxide with a thickness of 100 nm is formed as an oxide semiconductor film on the glass substrate. The film formation conditions are as follows: the pressure in the chamber is 0.6 Pa, and an oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]) is used. Also, 2500 W of AC power is supplied to the oxide target installed in the sputtering apparatus.

[0316] As a condition for forming an oxide film, the substrate temperature is set to a temperature at which the substrate is not intentionally heated (hereinafter, RT, 130°C, or 170°C. Also, a mixture of Ar and oxygen gas The flow rate ratio of oxygen gas to the air (hereinafter referred to as oxygen gas flow rate ratio) is set to 10%, 30%, or 9 samples are prepared by setting the ratio at 100% or 100%.

[0317] <X-ray diffraction analysis> In this section, we will explain the results of X-ray diffraction measurements on nine samples. The RD device used was a Bruker D8 ADVANCE. The scanning range was 15° to 50° using the θ / 2θ scan method using the t-of-plane method. The scanning speed was 3.0 deg. / min, the step width was 0.02 deg.

[0318] Figure 76 shows the results of measuring the XRD spectrum using the out-of-plane method. In addition, in Figure 76, the upper part shows the measurement results for a sample where the substrate temperature during film formation was 170°C. As a result, the middle row shows the measurement results for a sample with a substrate temperature of 130°C during film formation, and the bottom row shows the measurement results for a sample with a substrate temperature of 130°C during film formation. The left column shows the measurement results for samples with a substrate temperature of RT. The center column shows the measurement results for the sample with a flow rate ratio of 10%. The center column shows the measurement results for the sample with a flow rate ratio of 3%. The right column shows the measurement results for the sample with a 0% oxygen gas flow rate, and the right column shows the measurement results for the sample with a 100% oxygen gas flow rate. The measurement results are shown below.

[0319] The XRD spectrum shown in Figure 76 shows that the film thickness increases when the substrate temperature is increased or when the amount of oxygen used during film formation is increased. Increasing the gas flow rate ratio increases the peak intensity around 2θ=31°. The peak at 2θ=31° indicates that the c-axis is oriented in the direction approximately perpendicular to the surface on which the film is formed or the upper surface. This is due to the fact that it is a crystalline IGZO compound (also known as CAAC-IGZO). I know.

[0320] In addition, the XRD spectrum shown in Figure 76 shows that the substrate temperature during film formation was low or the oxygen gas flow The smaller the ratio of the amount of SiO2, the less clear the peak. Alternatively, the sample with a small oxygen gas flow rate may have ab-plane and c-axis orientations in the measurement area. It turns out that it cannot be seen.

[0321] <Analysis by electron microscope> In this section, the samples were prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. ,HAADF(High-Angle Annular Dark Field)-ST EM(Scanning Transmission Electron Micros) The results of the observation and analysis using HAADF-S are described below (hereafter referred to as HAADF-S). Images obtained by TEM are also called TEM images.

[0322] Planar images obtained by HAADF-STEM (hereinafter also referred to as planar TEM images), and The results of image analysis of the cross-sectional images (hereinafter also referred to as cross-sectional TEM images) will be described below. The TEM images were observed using a spherical aberration correction function. The atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. was used for the photographs. The electron beam was irradiated at an acceleration voltage of 200 kV with a beam diameter of approximately 0.1 nmφ.

[0323] Figure 77A shows the results of a sample fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. FIG. 77B shows a planar TEM image of the film formed at the substrate temperature RT and the oxygen gas flow rate ratio 1. This is a cross-sectional TEM image of a sample prepared at 0%.

[0324] <Electron diffraction pattern analysis> In this section, the sample was prepared at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. By irradiating an electron beam with a probe diameter of 1 nm (also called a nano-beam electron beam), The results of the X-ray diffraction pattern obtained will be explained below.

[0325] The sample shown in Figure 77A was fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. In the planar TEM image of the sample, dark spots a1, a2, a3, a4, and a5 The electron beam diffraction pattern shown in the figure is observed. The sunspot a1 is moved from the 0-second position to the 35-second position at a constant speed while shooting. The results of black point a1 are shown in Figure 77C, the results of black point a2 are shown in Figure 77D, the results of black point a3 are shown in Figure 77E, and the results of black point a4 are shown in Figure 77F. The results are shown in Figure 77F, and the results for black point a5 are shown in Figure 77G.

[0326] From Figures 77C, 77D, 77E, 77F, and 77G, it is possible to draw a circle ( A bright area (ring-shaped) can be observed. Also, multiple spots can be observed in the ring-shaped area. Cut.

[0327] Also, as shown in FIG. 77B, the substrate temperature during film formation was RT and the oxygen gas flow rate ratio was 10%. In the cross-sectional TEM image of the sample, black spots b1, b2, b3, b4, and Observe the electron diffraction pattern indicated by point b5. The results of point b1 are shown in Figure 77H, and the results of point b2 are shown in Figure 77H. The results are shown in Figure 77I, the results for black point b3 in Figure 77J, the results for black point b4 in Figure 77K, and the results for black point b5 in Figure 77J. The results are shown in Figure 77L.

[0328] Figures 77H, 77I, 77J, 77K, and 77L show ring-shaped bright spots. In addition, multiple spots can be observed in a ring-shaped area.

[0329] Here, for example, for a CAAC-OS having InGaZnO4 crystals, When an electron beam with a probe diameter of 300 nm is incident on the InGaZnO4 crystal, ) planes. It is clear that the film has a c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface. On the other hand, an electron beam with a probe diameter of 300 nm is incident perpendicularly to the sample surface. When the diffraction pattern is measured, a ring-shaped diffraction pattern is observed. It can be seen that the axes have no orientation.

[0330] In addition, a large protrusion was formed on an oxide semiconductor having a microcrystal structure (hereinafter referred to as an nc-OS). When electron diffraction is performed using an electron beam with a diameter (for example, 50 nm or more), a halo pattern is observed. In addition, a small probe diameter electron beam ( For example, when nanobeam electron diffraction is performed using a particle size of less than 50 nm, bright spots are observed. Furthermore, when nanobeam electron diffraction is performed on nc-OS, a circular pattern (phosphorus) is observed. In some cases, a bright area (ring-shaped) may be observed. may be observed.

[0331] The electron diffraction pattern of the sample prepared at the substrate temperature RT during film formation and with an oxygen gas flow rate of 10% The turn has a ring-shaped area of high brightness and multiple bright spots in the ring area. The sample fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation was analyzed by electron beam diffraction. The pattern becomes nc-OS and has no orientation in the planar direction or cross-sectional direction. .

[0332] From the above, an oxide semiconductor film formed at a low substrate temperature or a low oxygen gas flow rate is The oxide semiconductor film is clearly different from both an amorphous oxide semiconductor film and a single-crystal oxide semiconductor film. It can be assumed that it has the following properties.

[0333] ≪Elemental analysis≫ In this article, we will discuss energy dispersive X-ray spectroscopy (EDX). EDX mapping was obtained and evaluated using X-ray spectroscopy. By this, the film was produced at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. The results of the elemental analysis of the sample are explained below. The EDX measurement was carried out using an elemental analyzer and The energy dispersive X-ray analyzer JED-2300T manufactured by JEOL Ltd. is used. A Si drift detector is used to detect the X-rays emitted from the sample.

[0334] In EDX measurement, each point in the analysis area of the sample is irradiated with an electron beam, and the resulting The energy and frequency of characteristic X-rays of the material are measured, and an EDX spectrum corresponding to each point is obtained. In this embodiment, the peaks in the EDX spectrum at each point are determined as electron transitions to the L shell of the In atom. , electron transition to the K shell of Ga atom, electron transition to the K shell of Zn atom, and electron transition to the K shell of O atom The ratio of each atom at each point is calculated. By performing EDX analysis on a region, it is possible to obtain EDX mapping that shows the distribution of the ratio of each atom. This can be done.

[0335] 78A, 78B, and 78C show the substrate temperature RT and the oxygen gas Figure 78A shows EDX mapping of a cross section of a sample prepared at a flow rate of 10%. EDX mapping of atoms (ratio of Ga atoms to total atoms is 1.18 to 18.64 [a Figure 78B shows the EDX mapping of In atoms (total %). The ratio of In atoms to atoms is in the range of 9.28 to 33.74 [atomic%]. ) Figure 78C shows EDX mapping of Zn atoms (ratio of Zn atoms to total atoms) The range is 6.69 to 24.99 [atomic%]. 78B and 78C are graphs showing the relationship between the substrate temperature RT and the oxygen gas flow rate ratio during film formation. %. The more elements measured in the range, the brighter it becomes, and the fewer elements measured, the darker it becomes. As shown in Figures 78A, 78B, and 78C, the ratio of elements is shown by light and dark. The magnification of the EDX mapping is 7.2 million times.

[0336] The EDX mapping shown in Figures 78A, 78B, and 78C shows relative brightness and darkness in the images. The distribution of the oxygen gas flow rate was 10% and the substrate temperature was RT during film formation. In the material, it can be seen that each atom exists with a distribution. Pay attention to the areas surrounded by solid lines and dashed lines shown in Figures 78B and 78C.

[0337] In Figure 78A, the area enclosed by the solid line contains many relatively dark areas, and the area enclosed by the dashed line contains many relatively dark areas. In Figure 78B, the area enclosed by the solid line is a relatively bright area. The area surrounded by the dashed line contains many relatively dark areas.

[0338] In other words, the area surrounded by the solid line is the area where the In atoms are relatively abundant, and the area surrounded by the dashed line is the area where the In atoms are relatively abundant. In Figure 78C, in the area surrounded by the solid line, The area on the right is a relatively bright area, and the area on the left is a relatively dark area. In X2 Zn Y2 O Z2 , or InO X1 This is the area where the main components are:

[0339] The area surrounded by the solid line is the area where the number of Ga atoms is relatively small, and the area surrounded by the dashed line is the area where the number of Ga atoms is relatively small. In Figure 78C, the area surrounded by the dashed line is the upper left area. The area is relatively bright, and the area on the lower right is dark. is GaO X3 , or Ga X4 Zn Y4 O Z4 This is the area where the main components are:

[0340] Also, from Figures 78A, 78B, and 78C, the distribution of In atoms is higher than that of Ga atoms. It is relatively uniformly distributed, and InO X1 The region where is the main component is In X2 Zn Y2 O Z It appears that they are connected to each other through the area where 2 is the main component. In X2 Zn Y2 O Z2 , or InO X1The area where is the main component spreads like a cloud. It is formed as follows.

[0341] Thus, GaO X3 The region where In is the main component and X2 Zn Y2 O Z2 , or InO X1 In-Ga-Zn oxide with a structure in which the regions in which The material can be called CAC-IGZO.

[0342] The crystal structure of CAC is an nc structure. The nc structure of CAC is In the X-ray diffraction pattern, bright spots originating from IGZO including single crystal, polycrystalline, and CAAC structures In addition to the spot, there are several bright spots. In addition to the bright spots, the crystal structure is defined as a ring-shaped area of high brightness. do.

[0343] Also, from Figures 78A, 78B, and 78C, GaO X3 The region where is the principal component, and In X2 Zn Y2 O Z2 , or InO X1 The size of the region where is the main component is 0.5 nm The observed size is between 1 nm and 10 nm, or between 1 nm and 3 nm. In the X-ray mapping, the diameter of the area where each metal element is the main component is between 1 nm and 2 nm. do.

[0344] From the above, CAC-IGZO has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. CAC-IGZO has a structure different from that of IGZO compounds. X3 The region where In is the main component.X2 Zn Y2 O Z2 , or InO X1 is the main component The structure is such that the regions with each element as the main component are separated into phases, forming a mosaic. Therefore, when CAC-IGZO is used in a semiconductor device, GaO X3 Due to factors such as Properties and In X2 Zn Y2 O Z2 , or InO X1 The properties resulting from this act in a complementary manner. By doing so, high on-current (Ion) and high field-effect mobility (μ) are achieved. It is possible.

[0345] In addition, semiconductor devices using CAC-IGZO are highly reliable. O is ideal for a variety of semiconductor devices, including displays.

[0346] This embodiment may be any of the other embodiments, at least some of which are described herein, or any other embodiment. The present invention can be implemented in combination with the above embodiment.

[0347] (Embodiment 3) In this embodiment, a semiconductor device using the metal oxide film shown in the previous embodiment as a semiconductor layer is used. One embodiment of the device will be described with reference to FIGS. 30A to 53.

[0348] <Transistor structure 1> An example of a transistor according to one embodiment of the present invention will be described below. 30A and 30C are a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. 30B is a top view, and FIG. 30C is a top view, and FIG. ... It should be noted that in the top view of FIG. 30A, for clarity of the drawing, Some elements are omitted in the illustration.

[0349] The transistor 200 includes a conductor 205 (conductor 205a, and conductor 205b), and conductor 260 (conductor 260a and conductor 260b) and an insulator 220, an insulator 222, an insulator 224, and an insulator 226, which function as a gate insulating layer. The insulating layer 250, the oxide 230 having the region where the channel will be formed, and the source or drain Conductor 240a functions as one of the gates, and conductive material 240b functions as the other of the source or drain. A conductor 240b, an insulator 280 having excess oxygen, and an insulator 282 having barrier properties. , has.

[0350] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide and an oxide 230c on the oxide 230b. When the oxide 230b is thin, the current flows mainly through the oxide 230b (a channel is formed). The oxide 230a and the oxide 230c are in the vicinity of the interface with the oxide 230b (in the case of a mixed region). In some cases, current flows through the thin film (sometimes called a thin film), while other areas act as insulators. There is a match.

[0351] 30A to 30C, oxide 230c is formed on oxide 230a and It is preferable that the insulator 280 is provided so as to cover the side surface of the oxide 230b. The oxide 230c is interposed between the oxide 230b and the oxide 230c. Impurities such as hydrogen, water, and halogens diffuse from the insulator 280 into the oxide 230b. This can prevent this from happening.

[0352] The conductor 205 may be made of molybdenum, titanium, tantalum, tungsten, aluminum, or copper. a metal film containing an element selected from the group consisting of chromium, neodymium, and scandium, or Metal nitride films containing tantalum nitride (tantalum nitride film, titanium nitride film, molybdenum nitride film, titanium nitride film) In particular, metal nitride films such as tantalum nitride are highly resistant to hydrogen and oxygen. It is preferable because it has a barrier property against oxidation and is resistant to oxidation (high oxidation resistance). Indium tin oxide, including tungsten oxide Indium oxide, including tungsten oxide Indium zinc oxide containing titanium oxide, indium oxide containing titanium oxide Indium tin oxide, indium zinc oxide, indium tin oxide with silicon oxide added, etc. Conductive materials may also be applied.

[0353] For example, the conductor 205a may be a nitride conductor having a barrier property against hydrogen. It is preferable to use tantalum or the like, and to stack tungsten, which has high conductivity, as the conductor 205b. By using this combination, the conductivity of the wiring is maintained while the oxide 230 is 30A to 30C, the conductor 205a, Although a two-layer structure of the conductive material 205b and the conductive material 205c is shown, the present invention is not limited to this configuration and may be a single layer or three or more layers. For example, a laminated structure of the following may be used: Forms a conductor with barrier properties and high adhesion to highly conductive conductors You may do so.

[0354] The insulators 220 and 224 are made of a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator contains oxygen. In particular, the insulator 224 contains excess oxygen (chemical It is preferable to use an insulator containing oxygen in excess of the stoichiometric composition. By providing an insulator containing oxygen in contact with the oxide that constitutes the transistor 200, The insulators 222 and 224 can compensate for the oxygen vacancies in the oxide. The same materials do not necessarily have to be used.

[0355] The insulator 222 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations In particular, aluminum oxide and hafnium oxide, which are resistant to oxygen and hydrogen, are preferred. It is preferable to use an insulating film having a barrier property as the insulating film. In this case, the insulator 222 prevents oxygen from being released from the oxide 230 and impurities such as hydrogen from the outside. It acts as a barrier against intrusion.

[0356] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, or the like may be added to these insulators. um, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator.

[0357] The insulators 220, 222, and 224 each have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, but may be made of different materials. It may have a laminated structure.

[0358] Between the insulator 220 and the insulator 224, there is an insulator 222 including a high-k material. This allows the insulator 222 to capture electrons under certain conditions, increasing the threshold voltage. That is, the insulator 222 may become negatively charged.

[0359] For example, silicon oxide is used for the insulators 220 and 224, and silicon dioxide is used for the insulator 222. , materials with many electron trapping levels such as hafnium oxide, aluminum oxide, and tantalum oxide When used in a semiconductor device, temperatures higher than the operating temperature or storage temperature (e.g., 125 The electric current of the conductor 205 is applied under a temperature of from 150°C to 450°C, typically from 150°C to 300°C. The potential of the source electrode and drain electrode is kept higher than that of the source electrode for 10 milliseconds or more, typically 1 minute. By maintaining the above, the oxide constituting the transistor 200 is At this time, some of the moving electrons are captured by the electron capture level of the insulator 222. will be done.

[0360] The transistor in which the necessary number of electrons are captured in the electron capture level of the insulator 222 reaches the threshold The voltage shifts to the positive side. The amount can be controlled, and the threshold voltage can be controlled accordingly. By having this, the transistor 200 is in a non-conducting state (off) even when the gate voltage is 0V. The transistor is a normally-off transistor (also called a "normally-off" state).

[0361] The electron capture process may be performed during the manufacturing process of a transistor. After forming the conductor connected to the source or drain of the transistor, or in the previous process ( After wafer processing, after wafer dicing, after packaging, etc., This should be done at some stage before loading.

[0362] In addition, by appropriately adjusting the film thicknesses of the insulators 220, 222, and 224, , the threshold voltage can be controlled. For example, the insulator 220, the insulator 222, and By reducing the total thickness of the insulator 220, the voltage from the conductor 205 is applied efficiently. A transistor with low power consumption can be provided. The total thickness of the insulating layer 224 is preferably 65 nm or less, more preferably 20 nm or less. Desirable.

[0363] Therefore, a transistor having stable electrical characteristics can be provided. It is possible to provide a transistor with a large on-state current. It is possible to provide a transistor with a small switching value. Alternatively, a transistor with a small leakage current when not conducting can be provided. It is possible.

[0364] The oxide 230a, the oxide 230b, and the oxide 230c are In-M-Zn oxide ( M is formed of a metal oxide such as Al, Ga, Y, or Sn. The oxide 230a, the oxide 230b, and the oxide 230c are the metal oxide films described in the above embodiment. In addition, the oxide 230 may be an In-Ga oxide or an In-Zn oxide. etc. may also be used.

[0365] Next, the band structures when the oxide is made into a three-layer structure or a two-layer structure are shown in Figure 31A. 31A to 31C. In addition, the insulator I1 and the oxide S The oxide S2, oxide S3, and insulator I2 are the insulator 224 of the transistor 200, the oxide S3, and the insulator I2. The oxide 230a, oxide 230b, oxide 230c correspond to the insulator 250.

[0366] FIG. 31A shows a structure having an insulator I1, an oxide S1, an oxide S2, an oxide S3, and an insulator I2. FIG. 31B shows an example of a band diagram in the film thickness direction of a laminated structure. 1 is an example of a band diagram in the thickness direction of a layered structure having a material S2, an oxide S3, and an insulator I2. FIG. 31C shows a structure having an insulator I1, an oxide S1, an oxide S2, and an insulator I2. 1 is an example of a band diagram in the film thickness direction of a laminated structure. The energy at the bottom of the conduction band of the insulator I1, oxide S1, oxide S2, oxide S3, and insulator I2 The energy level (Ec) is shown.

[0367] FIG. 31A shows a case where silicon oxide films are used as the insulators I1 and I2, and the oxide S1 A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 was used. The oxide S2 is an oxide semiconductor film formed by the atomic ratio of metal elements of In:G. The oxide semiconductor film formed using a metal oxide target with a:Zn=4:2:4.1 The oxide S3 was prepared by using a metal oxide with an atomic ratio of In:Ga:Zn=1:3:2. FIG. 10 is a band diagram of a structure using an oxide semiconductor film formed using an oxide target.

[0368] FIG. 31B shows a case where silicon oxide films are used as the insulators I1 and I2, and oxide S2 The atomic ratio of the metal elements was In:Ga:Zn=4:2:4.1. The oxide S3 is an oxide semiconductor film formed by using an oxide semiconductor film having an atomic ratio of metal elements of In An oxide semiconductor film formed using a metal oxide target of Ga:Zn=1:3:2 FIG. 1 is a band diagram of the configuration used.

[0369] In addition, in FIG. 31C, silicon oxide films are used as the insulators I1 and I2, and the oxide S1 A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 was used. The oxide S2 is an oxide semiconductor film formed by the atomic ratio of metal elements of In:G. The oxide semiconductor film formed using a metal oxide target with a:Zn=4:2:4.1 FIG. 1 is a band diagram of the configuration used.

[0370] The oxides S1 and S3 have a lower energy level at the bottom of the conduction band closer to the vacuum level than the oxide S2. The energy level of the conduction band minimum of oxide S2 is close to that of oxide S1. The difference in energy level from the bottom of the conduction band of S3 is 0.15 eV or more, or 0.5 eV or more and preferably 2 eV or less, or 1 eV or less. The difference between the electron affinity of the oxide S3 and the electron affinity of the oxide S2 is 0.15 eV or more, or It is preferably 0.5 eV or more and 2 eV or less, or 1 eV or less.

[0371] As shown in FIGS. 31A to 31C, the oxides S1, S2, and S3 are conductive. The energy level at the bottom of the conductive band changes gradually. In other words, it changes or changes continuously. In order to have such a band diagram, the oxide S1 and the oxide S2 must be bonded. The mixed layer formed at the interface with oxide S2 or at the interface between oxide S2 and oxide S3 It is advisable to reduce the defect level density.

[0372] Specifically, oxides S1 and S2, and oxides S2 and S3 have common elements other than oxygen. By containing the element (as the main component), it is possible to form a mixed layer with a low defect level density. For example, when oxide S2 is an In-Ga-Zn oxide, oxides S1 and S3 are For this purpose, it is preferable to use In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, or the like.

[0373] At this time, the main path of the carriers is the oxide S2. The defect level density at the interface between the oxide S2 and the oxide S3 can be reduced. Therefore, the influence of interface scattering on carrier conduction is small, and a high on-current can be obtained. As shown in the above embodiment, the oxide S2 is c-axis oriented rather than the first crystal portion. By configuring the second crystal portion having no axial orientation to have a higher proportion, An on-current can be obtained.

[0374] When electrons are captured in the trap level, the captured electrons behave like fixed charges. Therefore, the threshold voltage of the transistor shifts in the positive direction. By providing the oxide S3, the trap level can be kept away from the oxide S2. This structure prevents the threshold voltage of the transistor from shifting in the positive direction. It is possible.

[0375] In addition, the defect level is at the energy level of the bottom of the conduction band of oxide S2, which functions as a channel region. The electrons can easily accumulate in the defect level. The accumulation of electrons in the defect level creates a negative fixed charge, which causes the transistor Therefore, the threshold voltage of the oxide S2 is shifted in the positive direction. It is preferable to configure the structure so that the energy level (Ec) is closer to the vacuum level than the energy level at the bottom of the conduction band. By doing so, electrons are less likely to accumulate in the defect level, and the on-state voltage of the transistor is reduced. The current can be increased and the field effect mobility can be increased.

[0376] The oxides S1 and S3 are made of materials with sufficiently low electrical conductivity compared to the oxide S2. At this time, the oxide S2, the interface between the oxide S2 and the oxide S1, and the oxide S2 and the oxide S1 The interface with S3 mainly functions as the channel region. In FIG. 26C, an oxide having an atomic ratio shown in region C where the insulating property is high may be used. In addition, in the region C shown in FIG. 26C, [In]:[M]:[Zn]=0:1:0 or The atomic ratios shown are values close to .

[0377] In particular, when oxide S2 is an oxide having an atomic ratio shown in region A, oxide S1 and For the oxide S3, an oxide having [M] / [In] of 1 or more, preferably 2 or more is used. In addition, it is preferable that the oxide S3 has a sufficiently high insulating property [M]. It is preferable to use an oxide in which / ([Zn]+[In]) is 1 or more.

[0378] In this embodiment, the oxides S1 and S3 have an atomic ratio of metal elements of In A structure using an oxide formed using a metal oxide target of Ga:Zn=1:3:2 However, the oxides S1 and S3 are not limited to these. Ga:Zn=1:1:1 [atomic ratio], In:Ga:Zn=1:1:1.2 [atomic ratio] , In:Ga:Zn=1:3:4 [atomic ratio], In:Ga:Zn=1:3:6 [atomic ratio] ratio], In:Ga:Zn=1:4:5 [atomic ratio], In:Ga:Zn=1:5:6 [atomic ratio] or metal oxide target with In:Ga:Zn=1:10:1 [atomic ratio] Alternatively, oxides S1 and S3 may be formed using a metal element. Oxide formed using a metal oxide target with an atomic ratio of Ga:Zn=10:1 In this case, the atomic ratio of the metal elements in the oxide S2 may be In:Ga:Zn= The oxides S1 and S3 were formed using a 1:1:1 metal oxide target. The atomic ratio of the metal elements was Ga:Zn=10:1, and the metal oxide target was used. When oxides are used, the energy level of the conduction band minimum of oxide S2 and oxides S1 and S This is preferable because the difference in energy level between the conduction band minimum of be.

[0379] The oxides S1 and S3 are metal oxides with an atomic ratio of In:Ga:Zn=1:1:1. When an oxide target is used, the oxides S1 and S3 are In:Ga:Zn=1:β1(0< β1≦2): β2 (0<β2≦2). In addition, the oxides S1 and S3 are When using a metal oxide target with an atomic ratio of In:Ga:Zn=1:3:4, oxidation The materials S1 and S3 are In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) In addition, oxides S1 and S3 may be In:Ga:Zn=1:3:6 [atomic When a metal oxide target with a molecular ratio of In:Ga:Zn is used, the oxides S1 and S3 are =1:β5(1≦β5≦5):β6(4≦β6≦8).

[0380] In addition, since oxygen diffusion occurs mainly from the insulator 280, the oxide S3 has high oxygen permeability. For example, the oxide S3 is preferably the same as that of Sample A1 or Sample A2 shown in the above embodiment. It is preferable to use a metal oxide film such as the following.

[0381] In addition, the oxide S3 is formed in an oxygen-excess atmosphere (for example, the film forming gas is set to 100% oxygen). A film may be formed to supply oxygen from oxide S3 to oxide S2.

[0382] The insulator 250 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations Alternatively, these insulators can be coated with, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator.

[0383] The insulator 250 is made of a material containing oxygen in excess of the stoichiometric composition, similar to the insulator 224. It is preferable to use an oxide insulator containing such excess oxygen. By providing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced.

[0384] The insulator 250 may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxide. Gallium oxide nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, yttrium oxynitride Using insulating films such as hafnium and silicon nitride that have barrier properties against oxygen and hydrogen When the insulator 250 is formed using such a material, it can be formed from the oxide 230. This layer functions as a layer that prevents oxygen from being released from the substrate and prevents impurities such as hydrogen from entering from the outside.

[0385] The insulator 250 has the same product as the insulators 220, 222, and 224. The insulator 250 may have a layer structure. By having the insulator, the transistor 200 shifts the threshold voltage to the positive side. With this configuration, the transistor 200 can be Even if the transistor is turned on, it is a normally-off transistor, which is in a non-conducting state (also called an off state). do.

[0386] In the semiconductor device shown in FIGS. 30A to 30C, the oxide 230 and the conductor 260 A barrier film may be provided between the insulating layer 250 and the oxide layer 230c. It is also possible to use materials with this property.

[0387] For example, an insulating film containing excess oxygen is provided in contact with the oxide 230, and then the insulating film is further wrapped with a barrier film. By adding the oxide, the oxide is brought into a state where the composition is almost the same as the stoichiometric composition, or is in a state where the composition is smaller than the stoichiometric composition. This allows the oxide 230 to be in a supersaturated state with a high oxygen content. can prevent the intrusion of

[0388] One of the conductors 240a and 240b functions as a source electrode, and the other It functions as a drain electrode.

[0389] The conductor 240a and the conductor 240b are made of aluminum, titanium, chromium, nickel, or copper. , yttrium, zirconium, molybdenum, silver, tantalum, or tungsten Metals or alloys containing metals as the main component can be used. In particular, tantalum nitride, etc. Metal nitride films have barrier properties against hydrogen and oxygen, and also have high oxidation resistance. preferable.

[0390] Although the figure shows a single layer structure, it may be a laminated structure of two or more layers. It is preferable to stack a titanium film and a tungsten film. In addition, a two-layer structure in which an aluminum film is laminated on a tungsten film, a copper-magnesium film, and Two-layer structure in which a copper film is laminated on a titanium-aluminum alloy film, and two-layer structure in which a copper film is laminated on a titanium film. A layer structure or a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0391] In addition, an aluminum film or a copper film is formed on a titanium film or a titanium nitride film, and a titanium film is formed on the aluminum film or a copper film. Three-layer structure of titanium film or titanium nitride film laminated on molybdenum film or molybdenum nitride film An aluminum film or copper film is then laminated on top of that, followed by a molybdenum film or molybdenum nitride film. There are transparent conductive films containing indium oxide, tin oxide, or zinc oxide. Materials may also be used.

[0392] The conductor 260 having the function of a gate electrode is made of, for example, aluminum or chromium. , copper, tantalum, titanium, molybdenum, tungsten, or a metal selected from the group consisting of those mentioned above. It can be formed using an alloy containing metals or an alloy combining the above-mentioned metals. In particular, metal nitride films such as tantalum nitride have barrier properties against hydrogen and oxygen. In addition, it is preferable that the alloy contains manganese or zirconium because it has high oxidation resistance. Alternatively, a metal selected from a plurality of metals may be used. Even if semiconductors such as polycrystalline silicon or silicides such as nickel silicide are used, Although the figure shows a two-layer structure, it may also be a single layer or a laminated structure of three or more layers. .

[0393] The two-layer structure may be formed by laminating the same material. The film is formed by using a CVD method, an MOCVD method, or an ALD method. In particular, the film is formed by atomic layer deposition (ALD). It is preferable to form it by using the atomic layer deposition method. By forming the insulating layer 250 by the ALD method or the like, damage to the insulating layer 250 during film formation can be reduced. This is also preferable because it can improve the covering property. Therefore, the reliability is high. Therefore, a low-temperature transistor 200 can be provided.

[0394] Subsequently, the conductor 260b is formed by sputtering. By providing the conductor 260a on the insulating layer 2, damage to the conductor 260a during film formation is minimized. 50. In addition, compared to the ALD method, the sputtering The deposition rate of the CVD method is high, resulting in high yield and improved productivity.

[0395] Alternatively, for example, a two-layer structure in which a titanium film is laminated on an aluminum film may be used. , a two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film. A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. A two-layer structure may also be used.

[0396] In addition, a three-layer structure in which an aluminum film is laminated on a titanium film and another titanium film is laminated on top of that may be used. In addition, titanium, tantalum, tungsten, molybdenum, An alloy film made by combining one or more metals selected from chromium, neodymium, and scandium Alternatively, a nitride film may be used.

[0397] The conductor 260 is selected from indium, tin, zinc, gallium, silicon, etc. Conductive materials containing the elements mentioned above can be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide, indium zinc oxide materials, such as silicon oxide-added indium tin oxide and In-Ga-Zn oxide, In addition, a conductive material having a light-transmitting property and a conductive material having a light-transmitting property may be used. A laminated structure of the above metals may also be used.

[0398] Next, an insulator 280 and an insulator 282 are provided above the transistor 200. .

[0399] The insulator 280 is preferably made of an oxide containing excess oxygen compared to the stoichiometric composition. That is, the insulator 280 has a region where oxygen is present in excess of the stoichiometric composition (hereinafter referred to as It is preferable that a region (also called an excess oxygen region) is formed under the transistor 20. When an oxide semiconductor is used for the transistor 200, an interlayer film or the like near the transistor 200 may be formed using an oxide semiconductor. By providing an insulator having a region and reducing oxygen vacancies in the transistor 200, reliability can be improved. It can be improved.

[0400] As an insulator having an excess oxygen region, specifically, an oxide in which a part of oxygen is released by heating is used. It is preferable to use an oxide material that releases oxygen when heated. Analysis method (TDS: Thermal Desorption Spectroscopy) The amount of oxygen released is 1.0 x 10 18 atoms / cm 3 That's all, Preferably 3.0 x 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film during TDS analysis is 100°C or higher and 700°C or lower, or 100°C The temperature is preferably in the range of 500°C or more and 500°C or less.

[0401] For example, such a material may include silicon oxide or silicon oxynitride. Alternatively, a metal oxide can also be used. Silicon oxynitride refers to a material that contains more oxygen than nitrogen, and silicon nitride oxide Nitrogen refers to a material that contains more nitrogen than oxygen.

[0402] The insulator 280 covering the transistor 200 is a flat surface that covers the uneven shape underneath. The film may also function as a protective film.

[0403] The insulator 282 may be an oxide or oxides containing oxygen, such as aluminum oxide and hafnium oxide. It is preferable to use an insulating film that has a barrier property against hydrogen. The insulator 282 may be made of any suitable material. When the oxide 230 is formed using the above, oxygen is released from the oxide 230 and impurities such as hydrogen are introduced from the outside. It acts as a layer to prevent contamination.

[0404] By having the above structure, a transistor including an oxide semiconductor with a large on-state current can be provided. Alternatively, a transistor including an oxide semiconductor and having a low off-state current can be provided. Alternatively, by using a transistor having the above structure in a semiconductor device, This makes it possible to suppress fluctuations in the electrical characteristics of the semiconductor device and improve its reliability. Alternatively, a semiconductor device with reduced power consumption can be provided.

[0405] <Transistor structure 2> 32A to 32C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. Note that for clarity of the drawing, some parts are not shown in FIG. 32B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 32C is a cross-sectional view taken along the line Y1-Y2.

[0406] In the transistor 200 shown in FIGS. 32A to 32C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0407] The structure shown in FIGS. 32A to 32C includes an insulator 270 that covers the conductor 260. When the insulator 280 is made of an oxide material from which oxygen is released, the conductor 260 is To prevent oxidation by oxygen, the insulator 270 has a barrier property against oxygen. The insulator 270 may be made of the same material as the insulator 282. good.

[0408] For example, the insulator 270 can be a metal oxide such as aluminum oxide. The insulator 270 may be provided to a thickness sufficient to prevent oxidation of the conductor 260. For example, the thickness of the insulator 270 is 1 nm or more and 10 nm or less, preferably 3 nm or more and 7 nm or less. It is set to nm or less.

[0409] This configuration allows for a wider range of material choices for the conductor 260. For example, Materials such as aluminum that have low oxidation resistance but high conductivity can be used. For example, a conductive material that is easy to form a film or process can be used.

[0410] Therefore, oxidation of the conductor 260 is suppressed, and the oxygen desorbed from the insulator 280 is efficiently oxidized. In addition, the conductor 260 can be made of a highly conductive material. This makes it possible to provide a transistor 200 with low power consumption.

[0411] <Transistor structure 3> 33A to 33C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. For clarity of the drawing, some parts are shown in FIG. 33B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 33C is a cross-sectional view taken along the line Y1-Y2.

[0412] In the transistor 200 shown in FIGS. 33A to 33C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0413] The structure shown in FIGS. 33A to 33C includes an insulator 243a laminated on a conductor 240a. An insulator 243b is provided by laminating it on the conductor 240b. When a metal material is used, the conductors 240a and 240b are oxidized by the desorbed oxygen. To prevent this, the insulators 243a and 243b have a barrier property against oxygen. A substance having this property is used.

[0414] For example, the insulators 243a and 243b may be made of aluminum oxide, gallium oxide, or the like. Any metal oxide can be used. , silicon nitride, etc. may also be used.

[0415] This configuration broadens the range of material choices for the conductors 240a and 240b. For example, it is possible to use a material such as aluminum that has low oxidation resistance but high conductivity. In addition, for example, a conductive material that is easy to form a film or process can be used. do.

[0416] Therefore, oxidation of the conductors 240a and 240b is suppressed, and the conductors 240a and 240b are desorbed from the insulator 280. The oxygen thus obtained can be efficiently supplied to the oxide 230. By using a conductor with high conductivity for the conductor 240b, the transistor 2 00 can be provided.

[0417] In addition, in the transistor 200 shown in FIGS. 30A to 30C, the insulator 220, the insulator 222 and the insulator 224 are laminated to function as a gate insulating film. The transistors shown in are not limited to this. For example, the transistors shown in FIGS. As shown in the figure, a structure in which only the insulator 224 is provided may be used.

[0418] In the structure shown in FIGS. 33A to 33C, the upper surfaces of the conductors 205a and 205b are covered with It is preferable to provide the conductor 205c so that the conductors 205a to 205c are 5c may be referred to as the conductor 205. The oxide material from which oxygen is released is the insulator 224. When using the conductive material 205b, in order to prevent oxidation of the conductive material 205b by the desorbed oxygen, The conductor 205c can be made of the same conductor as the conductor 205a. The above-mentioned light-transmitting conductive materials may also be used.

[0419] This configuration allows for a wider range of material choices for the conductor 205b. For example, a conductor that is easy to form a film or process can be used.

[0420] Therefore, oxidation of the conductor 205b is suppressed, and oxygen desorbed from the insulator 224 is efficiently removed. The oxide 230 can be supplied to the conductor 205b. By using this, it is possible to provide a transistor 200 with low power consumption.

[0421] <Transistor structure 4> 34A to 34C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. Note that for clarity of the drawing, some parts are not shown in FIG. 34B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 34C is a cross-sectional view taken along the line Y1-Y2.

[0422] In the transistor 200 shown in FIGS. 34A to 34C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0423] The structure shown in Figures 34A to 34C is such that the conductor 260, which functions as the gate electrode, The oxide 230c has an oxide 260a, a conductor 260b, and a conductor 260c. It is sufficient that the cut is made on the insulator 224, as long as it covers the side of 230b.

[0424] The conductor 260a is formed by using a thermal CVD method, an MOCVD method, or an ALD method. It is preferable to form the insulating layer by using the ALD method. It is possible to reduce plasma damage to the conductor 260a. This is preferable because it can improve coverage. Therefore, a highly reliable transistor 20 can be obtained. 0 can be provided.

[0425] The conductor 260b is made of conductive material such as tantalum, tungsten, copper, or aluminum. Furthermore, the conductor 260c formed on the conductor 260b is made of a material with high conductivity. It is preferable to form the insulating film using a conductor having high oxidation resistance, such as tungsten oxide.

[0426] For example, when an oxide material from which oxygen is released is used for the insulator 280, a region having an excess oxygen is formed. The conductor 260c having a large contact area with the insulator 280 is made of a highly oxidation-resistant conductor. This makes it possible to prevent oxygen released from the excess oxygen from being absorbed into the conductor 260. In addition, oxidation of the conductor 260 can be suppressed, and the oxygen desorbed from the insulator 280 can be efficiently removed. The oxide 230 can be supplied with a highly conductive conductor. By using this, it is possible to provide a transistor 200 with low power consumption.

[0427] As shown in FIG. 34C, the transistor 200 has an oxidized layer in the channel width direction. The object 230b is covered with the conductor 205 and the conductor 260. Also, the insulator 224 By providing the protrusion, the side surface of the oxide 230b can also be covered with the conductor 260. For example, by adjusting the shape of the protrusion of the insulator 224, the side surface of the oxide 230b can be It is preferable that the bottom surface of the conductor 260 is closer to the substrate than the bottom surface of the oxide 230b. That is, the transistor 200 is driven by the electric field of the conductor 205 and the conductor 260. Thus, the oxide 230b is electrically surrounded by the conductive material. The electric field of the surro This is called the unded channel (s-channel) structure. The transistor 200 may have a channel formed in the bulk of the oxide 230b. The s-channel structure allows for a large drain current for the transistor. This allows for a larger on-state current (the voltage between the source and drain when the transistor is on). In addition, the electric field of the conductor 205 and the conductor 260 can be used to obtain a current. As a result, the entire channel formation region formed in the oxide 230b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. By reducing the channel width, the s-channel structure can be This can enhance the effects of increasing the on-current and reducing the off-current.

[0428] The structure shown in Figures 34A to 34C has a conductor layer that functions as a source or drain. The conductor 240a and the conductor 240b have high adhesion to the oxide 230b. A low-conductivity conductor is used, and a high-conductivity material is used for the conductors 241a and 241b. The conductor 240a and the conductor 240b are preferably formed by atomic layer deposition (ALD). It is preferable to form the film by using a comomic layer deposition method. By forming the layer by the LD method or the like, the coverage can be improved.

[0429] For example, when a metal oxide containing indium is used for the oxide 230b, the conductor 24 Titanium nitride or the like may be used for the conductor 240a and the conductor 240b. a, and the conductor 241b is made of a conductive material such as tantalum, tungsten, copper, or aluminum. By using a material with high thermal conductivity, a highly reliable and low-power-consumption transistor 200 is provided. In addition, the conductor 241a and the conductor 241b can be used for the conductor 260. For example, a conductive material having light-transmitting properties may be used. .

[0430] <Transistor structure 5> 35A to 35C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. For clarity of the drawing, some parts are shown in FIG. 35B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 35C is a cross-sectional view taken along the line Y1-Y2.

[0431] In the transistor 200 shown in FIGS. 35A to 35C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0432] As shown in FIG. 35C, the transistor 200 has an oxide 23 0b is surrounded by the conductor 205 and the conductor 260. In addition, the insulator 222 By having the conductor 260, the side surface of the oxide 230b can also be covered with the conductor 260.

[0433] Here, when a high-k material such as hafnium oxide is used for the insulator 222, the insulating Since the dielectric constant of the body 222 is large, the equivalent oxide thickness (EOT) Therefore, the oxide thickness can be reduced. the physical thickness of the insulator 222 without weakening the effect of the electric field from the conductor 205 on the This allows the distance between the conductor 205 and the oxide 230 to be increased. The distance between the conductor 205 and the oxide 230 can be adjusted by adjusting the film thickness of the insulator 222. can.

[0434] For example, by adjusting the shape of the protrusion of the insulator 224, the oxide 230b on the side surface The bottom surface of the conductor 260 is closer to the substrate than the bottom surface of the oxide 230b. That is, transistor 200 is preferably Thus, the oxide 230b is electrically surrounded. The structure of the transistor that electrically surrounds the oxide 230b by the electric field of the body is called s-ch The transistor 200 with the s-channel structure is called an oxide 230 In the s-channel structure, the channel can be formed in the entire bulk. The drain current of the transistor can be increased, and the on-current ( When the transistor is in the on state, the current that flows between the source and drain can be obtained. A channel formed in oxide 230b by the electric field of conductor 205 and conductor 260 The entire formation region can be depleted. Therefore, in the s-channel structure, By reducing the channel width, the off-state current of the transistor can be further reduced. By doing so, the s-channel structure has the effect of increasing the on-current and reducing the off-current. This can improve your skills.

[0435] Also, as shown in FIGS. 35B and 35C, the side of the oxide 230c is insulator 250 and conductive material. The oxide 230c may be formed so as to be substantially flush with the side surface of the conductive body 260. The oxide 230c, the insulator 250, and the conductor 260 can be patterned in one step. Therefore, the process can be simplified. It has barrier properties against hydrogen or oxygen, is resistant to oxidation (high oxidation resistance), and has nitrided By using a metal nitride such as tantalum, the conductors 240a and 240b can be made oxidized. In addition, excess oxygen can be prevented from being transferred from the insulator 280 to the oxide 230b. It can be easily supplied.

[0436] <Transistor structure 6> 36A to 36C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. Note that for clarity of the drawing, some parts are not shown in FIG. 36B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 36C is a cross-sectional view taken along the line Y1-Y2.

[0437] In the transistor 200 shown in FIGS. 36A to 36C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0438] Transistor 200 shown in FIGS. 36A-36C includes an opening formed in insulator 280. , oxide 230c, insulator 250, and conductor 260 are formed. a and one end of the conductor 240b are aligned with the edge of the opening formed in the insulator 280. Furthermore, the three ends of the conductor 240a and the conductor 240b are covered with oxide 230. Therefore, the conductors 240a and 240b are aligned with the oxide The openings in the mask 230 or the insulator 280 can be formed simultaneously. It is possible to reduce the number of processes and improve yield and productivity. .

[0439] In addition, the conductor 240a, the conductor 240b, and the oxide 230b have an excess oxygen region. The insulator 280 is in contact with the oxide 230d. The oxide 230d is interposed between the oxide 230b having the region where the panel is to be formed. As a result, impurities such as hydrogen, water, and halogens are transported from the insulator 280 to the oxide 230b. This can prevent the particles from spreading.

[0440] Furthermore, the transistor 200 shown in FIGS. 36A-36C includes a conductor 240a and a conductor Since the structure is such that the body 240b and the conductor 260 hardly overlap each other, the conductor 260 That is, the parasitic capacitance applied to the transistor 20 having a high operating frequency can be reduced. 0 can be provided.

[0441] <Transistor structure 7> 37A to 37C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. Note that for clarity of the drawing, some parts are shown in FIG. 37B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 37C is a cross-sectional view taken along the line Y1-Y2.

[0442] In the transistor 200 shown in FIGS. 37A to 37C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0443] The transistor 200 shown in Figures 37A to 37C is structured without oxide 230d. For example, when a conductor having high oxidation resistance is used for the conductor 240a and the conductor 240b, In this case, the oxide 230d is not necessarily provided. Therefore, the number of masks and processes can be reduced. Furthermore, the yield and productivity can be improved.

[0444] The insulator 224 is formed only in the region overlapping the oxide 230a and the oxide 230b. In this case, the insulator 222 may be used as an etching stopper, and the oxide 230a , oxide 230b, and insulator 224 can be processed. Productivity can be increased.

[0445] Additionally, transistor 200 shown in FIGS. 37A-37C includes conductor 240a and conductor Since the conductor 240b and the conductor 260 have a structure in which they hardly overlap, the conductor 26 This reduces the parasitic capacitance of transistor 20. 00 can be provided.

[0446] <Transistor structure 8> 38A to 38C show an example of a structure that can be applied to the transistor 200. A indicates the top surface of the transistor 200. Note that for clarity of the drawing, some parts are shown in FIG. 38B is a diagram showing the structure of the film corresponding to the dashed line X1-X2 shown in FIG. 38C is a cross-sectional view taken along the line Y1-Y2.

[0447] In the transistor 200 shown in FIGS. 38A to 38C, The structures that have the same functions as the structures that constitute the transistor 200 shown in FIG. 1 are denoted by the same reference numerals. .

[0448] On insulator 282, insulator 285 and insulator 286 are formed.

[0449] The oxide 23 is deposited in the openings formed in the insulators 280, 282, and 285. 0c, an insulator 250, and a conductor 260 are formed. One end of the body 240b and the end of the opening formed in the insulator 280 are aligned. Furthermore, the three ends of the conductor 240a and the conductor 240b are covered with the oxide 230a and the oxide 230b. The conductor 240a and the conductor 240b are aligned with each other. b is the oxide 230a and the oxide 230b, or the opening of the insulator 280, and Therefore, the number of masks and processes can be reduced. This can improve retention and productivity.

[0450] In addition, the conductor 240a, the conductor 240b, and the oxide 230b have an excess oxygen region. The insulator 280 is in contact with the oxide 230d. The oxide 230d is interposed between the oxide 230b having the region where the panel is to be formed. As a result, impurities such as hydrogen, water, and halogens are transported from the insulator 280 to the oxide 230b. This can prevent the particles from spreading.

[0451] Also, the transistor 200 shown in Figures 38A to 38C has a high resistance offset region. Since the on-state current of the transistor 200 is not generated, the on-state current of the transistor 200 can be increased.

[0452] <Method for manufacturing semiconductor device> An example of a method for manufacturing the semiconductor device shown in FIGS. 30A to 30C will be described below with reference to FIGS. 39A to 4 2B.

[0453] First, a substrate is prepared (not shown). There are no major limitations, but it is important that the material has at least sufficient heat resistance to withstand subsequent heat treatment. For example, glass such as barium borosilicate glass or aluminoborosilicate glass is preferred. A substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. can be used. Single crystal semiconductor substrates made of silicon or silicon carbide, polycrystalline semiconductor substrates, silicon germanium Compound semiconductor base consisting of indium, gallium arsenide, indium arsenide, and indium gallium arsenide Board, SOI (Silicon On Insulator) substrate, GOI (German It is also possible to apply a silicon-on-insulator substrate, and on these substrates A substrate provided with a semiconductor element may be used as the substrate.

[0454] A semiconductor device may be manufactured using a flexible substrate as the substrate. To manufacture a semiconductor device, a transistor may be directly manufactured on a flexible substrate. A transistor may be formed on a formation substrate, and then peeled off and transferred to a flexible substrate. In order to separate and transfer the transistor from the manufacturing substrate to a flexible substrate, It is advisable to provide a release layer between the stamper and the substrate.

[0455] Next, an insulator 214 and an insulator 216 are formed. Then, lithography is performed on the insulator 216. A resist mask 290 is formed by a photolithography method or the like, and the insulators 214 and 216 are removed. Then, the resist mask 290 is removed. , an opening can be formed.

[0456] Here, a method for processing a film to be processed will be described. When processing a film to be processed finely, Various microfabrication techniques can be used. For example, a resist formed by lithography or the like can be used. A method of slimming the mask may be used. A dummy pattern is formed, a sidewall is formed on the dummy pattern, and then the dummy pattern is The turn is removed, and the remaining sidewall is used as a resist mask to etch the processed film. Also, etching of the film to be processed can be performed to achieve a high aspect ratio. For this reason, it is preferable to use anisotropic dry etching. A hard mask made of may also be used.

[0457] The light used to form the resist mask is, for example, i-line (wavelength 365 nm) or g-line (wavelength 43 6nm), H-line (wavelength 405nm), or a mixture of these can be used. In addition, ultraviolet light, KrF laser light, ArF laser light, or the like can also be used. The exposure may also be performed by immersion lithography. Light (EUV: Extreme Ultraviolet) or X-rays may also be used. Instead of light used for exposure, electron beams can also be used. The use of an electron beam is preferable because it allows for extremely fine processing. When exposure is performed by scanning a beam such as a photomask, no photomask is required.

[0458] In addition, before forming the resist film that will become the resist mask, the film to be processed and the resist film are closely An organic resin film having a function of improving adhesion may be formed. The surface is formed so as to flatten by covering the step below it using a pin coating method or the like. This makes it possible to reduce variations in the thickness of the resist mask provided above the organic resin film. In particular, when fine processing is performed, the organic resin film is preferably resistant to the light used for exposure. It is preferable to use a material that functions as an anti-reflection film against the reflection of light. As the organic resin film, for example, BARC (Bottom Anti-Reflection The organic resin film is removed at the same time as the resist mask is removed. It may be removed after removing the resist mask.

[0459] Subsequently, the conductor 205A and the conductor 205B are placed on the insulator 214 and the insulator 216. The conductor 205A and the conductor 205B are formed by sputtering or vapor deposition. The film can be formed by a CVD method (including thermal CVD, MOCVD, PECVD, etc.). In addition, to reduce damage caused by plasma, thermal CVD, MOCVD, or other methods can be used. ALD or ALD methods are preferred (Figure 39B).

[0460] Next, unnecessary portions of the conductor 205A and the conductor 205B are removed. Back-etching or Chemical Mechanical Polishing (CMP) The conductive layer is then removed by, for example, a polishing process until the insulator 216 is exposed. The conductive material 205 is formed by removing a portion of the conductive material 205A and a portion of the conductive material 205B. In this case, the insulator 216 can be used as a stopper layer, and the insulator 21 6 may become thin.

[0461] Here, CMP processing is a process for flattening the surface of a workpiece by a combined chemical and mechanical action. More specifically, a polishing cloth is attached to the polishing stage, and the workpiece and the polishing The polishing stage and the workpiece are rotated or rotated while supplying slurry (abrasive) between the cloth and the workpiece. The abrasive cloth is oscillated to induce a chemical reaction between the slurry and the surface of the workpiece, and to stimulate the interaction between the abrasive cloth and the workpiece. This is a method of polishing the surface of a workpiece by mechanical polishing.

[0462] The CMP process may be performed only once or multiple times. When performing CMP, first polishing with a high polishing rate is performed, followed by finishing with a low polishing rate. In this way, polishing with different polishing rates may be combined.

[0463] Next, insulators 220, 222, and 224 are formed (FIG. 39D).

[0464] The insulators 220, 222, and 224 may be made of the materials described above or the insulating materials described below. The insulator 22 can be made of a material that can be used for the insulator 320. For 2, it is preferable to use a high-k material such as hafnium oxide.

[0465] The insulators 220, 222, and 224 are formed by, for example, a sputtering method, a chemical Chemical Vapor Deposition (CVD) method (thermal C VD method, metal organic chemical vapor deposition (MOCVD) Vapor Deposition, Plasma Enhanced CVD (PECVD) ma Enhanced Chemical Vapor Deposition) method, etc. including MBE (Molecular Beam Epitaxy) ) method, atomic layer deposition (ALD) method or is the pulsed laser deposition (PLD) method In particular, the insulator can be formed by a CVD method, preferably an ALD method. It is preferable to form the film by plasma or the like, since this can improve the coating property. To reduce damage caused by the thermal CVD method, MOCVD method, or ALD method is preferred. TEOS (Tetra-Ethyl-Ortho-Silicate) or silica Silicon oxide with good step coverage is formed by reacting silicon dioxide with oxygen or nitrous oxide. A polyimide film can also be used.

[0466] It is preferable that the insulators 220, 222, and 224 be successively formed. By successively forming the films, the interface between the insulator 220 and the insulator 222 and the insulator 2 22 and the insulator 224 without impurities adhering to the interface. It is possible.

[0467] Subsequently, oxide 230A which becomes oxide 230a and oxide 230b which becomes oxide 230b are formed. The oxide 230A and oxide 230B are formed in this order. In addition, the oxides in question are not subject to the influence of air. It is preferable to form the films continuously without causing any cracks.

[0468] In addition, when the oxide 230A and the oxide 230B are formed by a sputtering method, the film density is increased. The oxide 230A and the oxide 230B are preferably deposited by sputtering. In this case, the sputtering gas may contain a rare gas (typically argon), oxygen, or A mixture of rare gas and oxygen is used as appropriate. The sputtering gas is highly purified. For example, the sputtering gas preferably has a dew point of -60°C or less. By using oxygen gas or argon gas highly purified to below -100°C, oxides can be This can prevent moisture and the like from being taken into the semiconductor film 108 as much as possible.

[0469] In addition, when the oxide 230A and the oxide 230B are formed by a sputtering method, the sputtering The chamber in the tarring device is made to be impurity-free for the oxide 230A and the oxide 230B. In order to remove as much water as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum (5×10 -7Pa to 1 x 10 -4 It is preferable to exhaust the air to a pressure of about 100 Pa. In particular, when the sputtering equipment is on standby, the amount of gas equivalent to H2O in the chamber is The partial pressure of gas molecules (gas molecules corresponding to m / z = 18) is 1 × 10 -4 Pa or less, preferably 5 x10 -5 It is preferable to set it to Pa or less.

[0470] Then, a conductive film 2202 which will become a conductor 240a and a conductor 240b is formed on the oxide 230A. The conductive film 240A has a barrier property against hydrogen or oxygen, and It is preferable to use a material with high oxidation resistance. The above laminated structure may be used. Next, a resist mask 292 is formed by the same method as above. Formation (Figure 39E).

[0471] Using the resist mask 292, unnecessary portions of the conductive film 240A are removed by etching. Then, the conductive layer 240B is used as a mask to form an island-shaped conductive layer 240B (FIG. 40A). Then, the oxide 230a and the unwanted portions of the oxide 230b are removed by etching.

[0472] At this time, the insulator 224 may also be processed into an island shape. By using the insulator 222 as an etching stopper film, the insulator 220 and the insulator 22 Even in a structure in which the total thickness of the insulating layer 224 is small, the insulating layer 224 is thin enough to penetrate the underlying wiring layer. In addition, the insulators 220 and 222 can be prevented from being bar-etched. By reducing the total thickness of the insulator 224, the voltage from the conductor 205 is efficiently applied. As a result, a transistor with low power consumption can be provided.

[0473] Thereafter, the resist mask is removed to form the island-shaped oxide 230a and the island-shaped oxide 2 30b, and an island-shaped conductive layer 240B can be formed (FIG. 40B).

[0474] Subsequently, it is preferable to carry out a heat treatment (FIG. 40C, the arrow in the figure indicates the heat treatment). The heat treatment is carried out at a temperature of 250°C to 400°C, preferably 320°C to 380°C. If the process is carried out in an inert gas atmosphere, an atmosphere containing 10 ppm or more of oxidizing gas, or under reduced pressure, In addition, the heat treatment is preferably carried out in an inert gas atmosphere, followed by heating to replenish the desorbed oxygen. For this reason, the heat treatment may be carried out in an atmosphere containing 10 ppm or more of an oxidizing gas. 30a and hydrogen or water impurities in the oxide 230b can be removed. In addition, the oxide 230a and the oxide 230b are removed from the insulator formed below the oxide 230a. Oxygen is supplied to 0b, and oxygen vacancies in the oxide can be reduced.

[0475] Next, a resist mask 294 is formed on the island-shaped conductive layer 240B by the same method as above. (Fig. 40D). Next, unnecessary portions of the conductive film are removed by etching, and then a resist is applied. The mask 294 is removed to form the conductor 240a and the conductor 240b. At this time, the insulator 224 or the insulator 222 is over-etched. By performing this process, an s-channel structure may be obtained.

[0476] Subsequently, it is preferable to carry out a heat treatment (FIG. 41B, the arrow in the figure indicates the heat treatment). The heat treatment is carried out at a temperature of 250°C to 400°C, preferably 320°C to 380°C. If the process is carried out in an inert gas atmosphere, an atmosphere containing 10 ppm or more of oxidizing gas, or under reduced pressure, In addition, the heat treatment is preferably carried out in an inert gas atmosphere, followed by heating to replenish the desorbed oxygen. For this reason, the heat treatment may be carried out in an atmosphere containing 10 ppm or more of an oxidizing gas. 30a and hydrogen or water impurities in the oxide 230b can be removed. In addition, the oxide 230a and the oxide 230b are removed from the insulator formed below the oxide 230a. Oxygen is supplied to the oxide, and oxygen vacancies in the oxide can be reduced. When heat treatment is performed in a gas atmosphere, the oxidizing gas comes into direct contact with the area where the channel is to be formed. This can efficiently reduce oxygen vacancies in the region where the channel is to be formed.

[0477] Next, the oxide 230c, the insulator 250, and the conductive film 260A that will become the conductor 260 are The oxide 230c is formed by the same method as in the metal oxide film forming method of the previous embodiment. The conductive film 260A may be provided with a material that is resistant to hydrogen or oxygen. It is preferable to use a material that has a barrier property and high oxidation resistance. Although it is shown as a single layer, it may have a laminated structure of two or more layers.

[0478] For example, the two-layer structure may be formed by laminating the same material. The first conductive film may be formed by thermal CVD. The film is formed by MOCVD or ALD. In particular, the film is formed by ALD. By forming the insulator 250 by the ALD method or the like, damage to the insulator 250 during film formation can be prevented. This is also preferable because it can improve the covering property. A highly reliable transistor 200 can be provided.

[0479] Subsequently, the second conductive film is formed by sputtering. By having the first conductive film on the insulating film 250, damage during the formation of the second conductive film is reduced. In addition, compared to the ALD method, the sputtering method Since the film formation speed is fast, the yield is high and productivity can be improved. When forming the film 260A, it is preferable to form it using a film forming gas that does not contain chlorine. .

[0480] Next, a resist mask 296 is formed on the conductive film 260A by the same method as described above. (FIG. 41C). Next, unnecessary portions of the conductive film 260A are removed by etching. After the conductor 260 is formed, the resist mask 296 is removed (FIG. 41D).

[0481] Next, an insulator 280 is formed on the conductor 260. The insulator 280 is made of silicon oxide. The insulators containing oxygen are silicon oxynitride films and silicon dioxide films. The film deposition conditions in the CVD method or sputtering method are appropriately set to make the film contain a large amount of oxygen. A silicon oxide film or a silicon oxynitride film can be formed. After forming the silicon oxide nitride film, ion implantation, ion doping, or plasma treatment is performed. Oxygen may be added by the method.

[0482] In particular, it is preferable to perform oxygen plasma treatment (FIG. 42A, the arrows in the figure indicate the plasma treatment). A typical oxygen plasma treatment is a laser generated by glow discharge plasma of oxygen gas. The purpose of this project is to treat the surface of an oxide semiconductor with a silicon dioxide gas. Not only oxygen but also a mixture of oxygen gas and rare gas may be used. 00 ° C or less, preferably 300 ° C or more and 400 ° C or less, in an atmosphere containing an oxidizing gas, Alternatively, the heating may be carried out under reduced pressure.

[0483] The oxygen plasma treatment dehydrates or dehydrates the insulator 280 and oxide 230. The insulator 280 is oxidized and excess oxygen is introduced into the insulator 280 to form an excess oxygen region. In addition, the dehydrated or dehydrogenated oxide 230 has oxygen vacancies. On the other hand, the excess oxygen in the insulator 280 causes oxygen deficiency in the oxide 230. Therefore, the oxygen plasma treatment reduces the thickness of the insulator 280 and the oxide 230. It can remove impurities such as hydrogen and water while filling oxygen vacancies. Therefore, the electrical characteristics of the transistor 200 are improved and the variations in the electrical characteristics are reduced. It is possible.

[0484] Subsequently, an insulator 282 is formed on the insulator 280. The insulator 282 is formed by sputtering. It is preferable to form the film by using a sputtering device. An excess oxygen region can be formed in the insulator 280 underlying 282 .

[0485] When forming a film by sputtering, ions and sputtering gases are generated between the target and the substrate. For example, the target is connected to a power source and is given a potential E0. In addition, the substrate is given a potential E1 such as a ground potential. In addition, there is a region between the target and the substrate that has a potential E2. The magnitude relationship between the potentials is E2>E1>E0.

[0486] Ions in the plasma are accelerated by the potential difference E2-E0 and collide with the target. This causes the sputtered particles to be ejected from the target. The film is formed by the deposition of ions on the surface. The ions recoil from the target and reach the bottom of the formed film through the formed film. Ions in the plasma may be trapped in an insulator 280. -E1 and bombard the film surface. At this time, some of the ions are absorbed by the insulator 280 The ions are trapped in the insulator 280, and the ions are trapped inside the insulator 280. A region containing oxygen is formed in the insulator 280. In this case, an excess oxygen region is formed in the insulator 280.

[0487] Excess oxygen can be introduced into the insulator 280 to form an excess oxygen region. The excess oxygen in the insulator 280 is, for example, at a temperature of 200° C. or higher and 450° C. or lower, preferably 320° C. By performing heat treatment at a temperature of about 380° C. or more, the oxide 230 is supplied with 230. For example, the sputtering method can be used to When forming the film 282, the substrate is heated at the above temperature while the film is being formed, so that the film can be separated after the film formation. Oxygen can be supplied to the oxide 230 without superheating during the process.

[0488] Here, as described above, by using an oxide 230c having high oxygen permeability, Oxygen can easily diffuse from the insulator 280 to the oxide 230b.

[0489] At this time, in the oxide 230, excess oxygen (active oxygen) is formed on the side surface of the crystalline portion having orientation. Furthermore, metals such as In, M, or Zn bind to the bound reactive oxygen species. In this way, reactive oxygen species and metals such as In, M, or Zn repeatedly combine to form Therefore, it can be considered that solid phase growth occurs laterally from the side of the oriented crystal part. As shown in FIGS. 40C and 41B, the oxide 230a and the oxide 230b are preliminarily treated. By carrying out heat treatment to dehydrate and dehydrogenate, the water or water contained in the oxide 230 is removed. This allows impurities such as hydrogen to be reduced. This reduces the impediment to oxygen diffusion caused by impurities such as hydrogen or oxygen, resulting in more efficient Oxygen can be efficiently supplied to the oxide 230.

[0490] Here, the conductor 260, the conductor 240a, and the conductor 240b in contact with the insulator 280 In addition, when a highly oxidation-resistant conductor is used, excess oxygen in the insulator 280 can be absorbed by the conductor 260, The oxide 230 is efficiently absorbed into the conductor 240a and the conductor 240b without being absorbed. Therefore, the electrical characteristics of the transistor 200 can be improved, and the on-current Improved performance, lower subthreshold swing, improved reliability, and reduced variations in electrical characteristics This can reduce the stress.

[0491] Through the above steps, the transistor 200 of one embodiment of the present invention can be manufactured.

[0492] <Configuration example of semiconductor device> FIG. 43A shows an example of a semiconductor device (memory device) using a capacitor according to one embodiment of the present invention. 43A is shown in FIGS. 44 to 47 and 49A to 51. 48A and 48B, and 49A and 49B are circuit diagrams of the 4 to 47 and 49A to 51 are formed. vinegar.

[0493] <Circuit configuration of semiconductor device> The semiconductor device shown in FIG. 43A and FIGS. 44 to 47 includes a transistor 300 and a transistor The semiconductor device includes a transistor 200 and a capacitance element 100 .

[0494] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. Since the off-state current of the transistor 200 is small, it is used as a semiconductor device (memory By using it in a device, it is possible to retain the memory contents for a long period of time. Semiconductors that do not require refresh operations or require refresh operations very infrequently Since it is possible to use it as a semiconductor device (memory device), power consumption can be reduced sufficiently. Cut.

[0495] In FIG. 43A, the wiring 3001 is electrically connected to the source of the transistor 300. The wiring 3002 is electrically connected to the drain of the transistor 300. 003 is electrically connected to one of the source and drain of the transistor 200, and wiring 3 004 is electrically connected to the gate of the transistor 200. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are connected to a capacitance element The wiring 3005 is electrically connected to one of the electrodes of the capacitor 100. are electrically connected.

[0496] The semiconductor device shown in FIG. 43A has a feature that the potential of the gate of the transistor 300 can be maintained. By having this property, it is possible to write, hold, and read information, as shown below.

[0497] Writing and holding of information will be described. First, the potential of the fourth wiring 3004 is set to The transistor 200 is set to a potential that makes it conductive, thereby making the transistor 200 conductive. As a result, the potential of the third wiring 3003 is applied to the gate of the transistor 300 and the capacitor The voltage is applied to a node FG electrically connected to one of the electrodes of the transistor 100. A predetermined charge is applied to the gate of 300 (write). The charge that gives the low level and the high level (hereinafter referred to as the low level charge and the high level charge) After that, the potential of the fourth wiring 3004 is applied to the transistor 200 By setting the potential at which the transistor 200 is turned off, the The charge is held in the FG (retention).

[0498] When the off-state current of the transistor 200 is small, the charge of the node FG is retained for a long period of time. It will be held.

[0499] Next, reading of information will be described. In this state, when an appropriate potential (read potential) is applied to the fifth wiring 3005, the second wiring The line 3002 takes on a potential corresponding to the amount of charge held in the node FG. If the transistor 300 is an n-channel type, a high level charge is applied to the gate of the transistor 300. The apparent threshold voltage V for a given th_H is the gate of transistor 300 The apparent threshold voltage V when a low-level charge is applied to the th_L Lower Here, the apparent threshold voltage is the voltage at which the transistor 300 is turned on. The potential of the fifth wiring 3005 required to achieve the "first state" is referred to as the potential of the fifth wiring 3005. The potential of the wire 3005 of 5 is V th_H and V th_L By setting the potential between For example, in a write operation, a Hi charge is applied to node FG. When the gh level charge is applied, the potential of the fifth wiring 3005 becomes V0 (>V th _H ), the transistor 300 is in a "conducting state." When a level charge is applied, the potential of the fifth wiring 3005 becomes V0 ( <V th_L ), the transistor 300 remains in a "non-conducting state." By determining the potential of the line 3002, the information stored in the node FG can be read. can.

[0500] Furthermore, by arranging the semiconductor device shown in FIG. 43A in a matrix, a memory device (memory A cell array can be configured.

[0501] When memory cells are arranged in an array, the information of a desired memory cell is read out. In the memory cell from which information is not read, the node FG The potential at which transistor 300 is in a "non-conducting state" regardless of the charge applied to it, i.e., Ri, V th_H By applying a lower potential to the fifth wiring 3005, the information of the desired memory cell is Alternatively, in a memory cell from which information is not read, This allows transistor 300 to be "conductive" regardless of the charge applied to node FG. potential, that is, V th_L By applying a higher potential to the fifth wiring 3005, a desired It is only necessary to have a configuration in which only the information in the memory cells can be read out.

[0502] <Circuit configuration of semiconductor device 2> The semiconductor device shown in FIG. 43B is different from the semiconductor device shown in FIG. 43A in that it does not have the transistor 300. In this case, information is written by the same operation as in the semiconductor device shown in FIG. It is possible to perform writing and holding operations.

[0503] The following describes how to read information from the semiconductor device shown in Figure 43B. When the third wiring 3003 is brought into a conductive state, the third wiring 3003 and the capacitor element 100 are brought into a conductive state. As a result, the charge is redistributed between the third wiring 3003 and the capacitor element 100. The potential of the third wiring 3003 changes. Depending on the potential of one of the electrodes (or the charge stored in the capacitor element 100), Take.

[0504] For example, the potential of one of the electrodes of the capacitor 100 is V, the capacitance of the capacitor 100 is C, and the third The capacitance component of the wiring 3003 is CB, and the charge of the third wiring 3003 before the charge is redistributed is . If the potential is VB0, the potential of the third wiring 3003 after the charge is redistributed is (CB×V Therefore, the state of the memory cell is If the potential of one of the electrodes 100 takes two states, V1 and V0 (V1>V0), The potential of the third wiring 3003 when the potential V1 is held (=(CB×VB0+C×V1) / (CB+C)) is the potential (=(C It can be seen that this is higher than B×VB0+C×V0) / (CB+C)).

[0505] Then, the potential of the third wiring 3003 is compared with a predetermined potential, thereby reading out information. This can be done.

[0506] In this case, the first semiconductor is applied to a driving circuit for driving the memory cell. A transistor using a second semiconductor is used as the transistor 200. The structure may be such that the electrodes are stacked on the drive circuit.

[0507] The above-described semiconductor device appropriately uses a transistor including an oxide semiconductor and having low off-state current. By using this function, it is possible to retain the memory contents for a long period of time. This eliminates the need for refresh operations or makes it possible to reduce the frequency of refresh operations to an extremely low level. Therefore, a semiconductor device with low power consumption can be realized. Even if the potential is fixed, it is possible to store it for a long period of time. The content can be preserved.

[0508] Furthermore, since the semiconductor device does not require a high voltage to write information, deterioration of the elements does not occur. For example, unlike conventional non-volatile memory, the flow of electrons to the floating gate Since there is no injection or extraction of electrons from the floating gate, there is no degradation of the insulator. That is, the semiconductor device according to one embodiment of the present invention does not have the same problem as the conventional nonvolatile memory. Unlike the conventional semiconductor memory device, there is no limit to the number of times it can be rewritten, and it is a semiconductor device with dramatically improved reliability. Furthermore, information is written depending on whether the transistor is conductive or non-conductive. This allows for high-speed operation.

[0509] <Semiconductor device structure 1> The semiconductor device of one embodiment of the present invention includes a transistor 300, a transistor The transistor 200 is located above the transistor 300. The capacitor element 100 is provided above the transistor 300 and the transistor 200. It is being used.

[0510] The transistor 300 is disposed on a substrate 311, and includes a conductor 316, an insulator 314, and a substrate A semiconductor region 312 consisting of a part of 311 and functioning as a source region or a drain region. The semiconductor device has a low resistance region 318a that functions as a dielectric film, and a low resistance region 318b.

[0511] Transistor 300 can be either p-channel or n-channel.

[0512] The region where the channel of the semiconductor region 312 is formed, the region in the vicinity thereof, the source region, or In the low resistance region 318a which becomes the drain region and the low resistance region 318b, silicon It preferably contains a semiconductor such as a silicon-based semiconductor, and it preferably contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium It may be made of materials containing gallium aluminum arsenide (GaAlAs) or GaAlAs (Gallium Aluminum Arsenide). Silicon with effective mass controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, GaAs and GaAlAs may be used to form a transistor. The Star 300 is a HEMT (High Electron Mobility Transistor) stor) can also be used.

[0513] The low resistance region 318a and the low resistance region 318b are formed by the semiconductor layer applied to the semiconductor region 312. In addition to the conductive material, elements that impart n-type conductivity, such as arsenic and phosphorus, or p-type conductivity, such as boron, are added. It contains elements that impart electrical conductivity to the material.

[0514] The conductor 316, which functions as a gate electrode, is made of arsenic, phosphorus, or the like, which provides n-type conductivity. Semiconductor materials such as silicon that contain elements or elements that give them p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0515] The threshold voltage can be adjusted by determining the work function depending on the conductor material. Specifically, it is preferable to use materials such as titanium nitride and tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, tungsten or aluminum is used as the conductor. It is preferable to use metal materials such as tungsten as lamination materials, and tungsten is particularly suitable for this purpose. This is preferable in terms of thermal stability.

[0516] The transistor 300 shown in FIG. 44 has a semiconductor region 312 (substrate) where a channel is formed. The side and top surfaces of the semiconductor region 312 are insulated. The conductor 316 is provided so as to cover the conductor 314. Such a transistor 300 may be formed by forming a protrusion on a semiconductor substrate. It is also called a FIN type transistor because it uses the upper part of the protrusion. In addition, the insulating layer may have an insulating material that functions as a mask for forming the protrusions. In the previous section, we showed how to form a protrusion by processing a part of the semiconductor substrate. A semiconductor film having a convex shape may be formed.

[0517] The transistor 300 shown in FIG. 44 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method. The transistor 300 may be configured as a planar type, as shown in FIG. In the case of the circuit configuration shown in FIG. 3B, the transistor 300 does not need to be provided.

[0518] Over the transistor 300 are insulators 320, 322, 324, and The edge members 326 are stacked in order.

[0519] The insulators 320, 322, 324, and 326 may be, for example, an acid. silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like may be used.

[0520] The insulator 322 serves to eliminate a step caused by the transistor 300 and other components disposed below it. The top surface of the insulator 322 is covered with CM to improve the flatness. The surface may be planarized by a planarization process using a P process or the like.

[0521] The insulator 324 may include, for example, a substrate 311 or a transistor 300, which may be connected to the transistor. A film having a barrier property to prevent hydrogen and impurities from diffusing into the region where the resistor 200 is provided. It is preferable to use

[0522] For example, silicon nitride formed by CVD is an example of a film that has a barrier property against hydrogen. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. The diffusion of hydrogen into the semiconductor element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 300. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0523] The amount of desorbed hydrogen can be analyzed by, for example, TDS analysis. The amount of hydrogen desorption from the insulator 324 was measured by TDS analysis in the range of 50°C to 500°C. The amount of desorption converted into hydrogen atoms per area of the insulator 324 is 10 × 10 15 atoms / cm 2 Less than or equal to 5 x 10 15 atoms / cm 2 The following is acceptable: .

[0524] It is preferable that the insulator 326 has a lower dielectric constant than the insulator 324. For example, The dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulator 324 is preferably 0.7 times or less than the relative dielectric constant of the insulator 326, and more preferably 0.6 times or less. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. can be reduced.

[0525] In addition, the insulators 320, 322, 324, and 326 are provided with capacitive elements. 100, or a conductor 328, a conductor 330, etc. electrically connected to the transistor 200. The conductors 328 and 330 are embedded as plugs or wiring. As will be described later, the conductor that functions as a plug or wiring is In some cases, multiple structures may be collectively assigned the same symbol. The wiring and the plug electrically connected to the wiring may be integrated. Some of the conductors may function as wiring, and some of the conductors may function as plugs. .

[0526] The materials for each plug and wiring (conductor 328, conductor 330, etc.) are metal. Conductive materials such as metals, alloy materials, metal nitride materials, or metal oxide materials are applied as single layers or Materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use any high melting point material, and it is preferable to use tungsten. It is preferable to form the conductive layer from a low-resistance conductive material such as aluminum or copper. By using this material, the wiring resistance can be reduced.

[0527] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring. The conductors 328 and 330 can be formed using the same materials.

[0528] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen. It is preferable that the insulating material 350 has a barrier property against hydrogen. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 200 can be separated by a barrier layer. This makes it possible to suppress the diffusion of hydrogen from the transistor 300 to the transistor 200.

[0529] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the overall conductivity. In this case, the tantalum nitride layer having a barrier property against hydrogen is It is preferable that the insulating body 350 has a structure in which the insulating body 350 is in contact with the insulating body 350.

[0530] On the insulator 354, an insulator 358, an insulator 210, an insulator 212, an insulator 213, an insulator The edge member 214 and the insulator 216 are stacked in this order. any of the body 210, the insulator 212, the insulator 213, the insulator 214, and the insulator 216; Alternatively, it is preferable to use a material that has barrier properties against oxygen and hydrogen for the entire material.

[0531] For example, the insulator 358 and the insulator 212 may be, for example, a substrate 311 or a transformer. The region where the transistor 300 is provided is filled with hydrogen and impurities. It is preferable to use a film having a barrier property that prevents the diffusion of the insulator 324. The same materials as those mentioned above can be used.

[0532] As an example of a film with barrier properties against hydrogen, silicon nitride formed by CVD is used. Here, a semiconductor element including an oxide semiconductor, such as the transistor 200, However, the diffusion of hydrogen may deteriorate the characteristics of the semiconductor element. It is preferable to use a film that suppresses hydrogen diffusion between the gate electrode 200 and the transistor 300. A film that suppresses hydrogen diffusion is preferably a film that desorbs a small amount of hydrogen.

[0533] For example, the insulators 213 and 214 may be made of aluminum oxide or hafnium oxide. It is preferable to use metal oxides such as tungsten oxide and tantalum oxide.

[0534] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 200. This can suppress the release of oxygen from the oxide that makes up the transistor. It is suitable for use as a protective film for the capacitor 200.

[0535] For example, the insulators 210 and 216 may be made of the same material as the insulator 320. For example, a silicon oxide film or a silicon oxynitride film can be used as the insulator 216. A membrane or the like can be used.

[0536] Also, the insulator 358, the insulator 210, the insulator 212, the insulator 213, the insulator 214, and The insulator 216 includes a conductor 218 and a conductor (conductive element) that constitutes the transistor 200. The conductor 218 is embedded in the capacitor element 100 or the transistor. The conductor 2 functions as a plug or wiring that electrically connects to the transistor 300. 18 can be formed using the same material as the conductors 328 and 330.

[0537] In particular, the area in contact with insulator 358, insulator 212, insulator 213, and insulator 214 The conductor 218 is a conductor having barrier properties against oxygen, hydrogen, and water. With this configuration, the transistor 300 and the transistor 200 can be and a layer having a water barrier property, which can completely separate the transistor 3 Diffusion of hydrogen from the 00 to the transistor 200 can be suppressed.

[0538] The transistor 200 is provided above the insulator 216. The structure of 200 may be the same as that of the transistor shown in FIG. 200 is an example, and is not limited to this structure. A register can be used.

[0539] An insulator 280 is provided on the transistor 200. The insulator 280 has a stoichiometric composition. It is preferable to use an insulator containing excess oxygen compared to the composition of the insulator 280. A region where oxygen exists in excess of the stoichiometric composition (hereinafter referred to as an excess oxygen region) is formed. In particular, when an oxide semiconductor is used for the transistor 200, By providing an insulator having an excess oxygen region as an interlayer film near the transistor 200, By reducing oxygen vacancies in the transistor 200, reliability can be improved.

[0540] As an insulator having an excess oxygen region, specifically, an oxide in which a part of oxygen is released by heating is used. It is preferable to use oxide materials. Oxides that release oxygen when heated are those that are found in TDS analysis. The amount of oxygen released in terms of oxygen atoms is 1.0 × 10 18 atoms / cm 3 That's all good Preferably 3.0 x 10 20 atoms / cm 3 The oxide film is the above T The surface temperature of the film during DS analysis is 100°C or higher and 700°C or lower, or 100°C or lower. The temperature is preferably in the range of 500°C or higher.

[0541] For example, such a material may include silicon oxide or silicon oxynitride. Alternatively, a metal oxide can also be used. Silicon oxynitride refers to a material that contains more oxygen than nitrogen, and silicon nitride oxide Nitrogen refers to a material that contains more nitrogen than oxygen.

[0542] The insulator 280 covering the transistor 200 is a flat surface that covers the uneven shape underneath. The insulator 280 may function as a conductive film. do.

[0543] The conductor 244 is connected to the capacitor 100, the transistor 200, or the transistor 300. The conductor 244 functions as an electrical connection plug or wiring. 28 and the conductor 330 can be formed using the same material.

[0544] For example, when the conductor 244 is provided as a laminated structure, it is preferable that the conductor 244 includes a conductor having high oxidation resistance. In particular, it is preferable to provide a region having high oxidation resistance in contact with the insulator 280 having an excess oxygen region. It is preferable to provide a conductor. This configuration allows excess oxygen to be transported from the insulator 280 to the conductor. The conductor 244 can suppress absorption of hydrogen. It is preferable to include a conductor having a barrier property. In particular, an insulator 28 having an excess oxygen region is preferable. By providing a conductor with barrier properties against impurities such as hydrogen in the area in contact with 0, Impurities in the conductor 244, diffusion of a part of the conductor 244, and diffusion of impurities from the outside It is possible to prevent the ion beam from becoming a path.

[0545] A barrier layer 245 may be provided on the conductor 244. This can suppress the diffusion of impurities contained in the conductor 244 and some of the elements of the conductor 244. This can be done.

[0546] The barrier layer 245 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, etc. It is particularly preferable to use a metal oxide such as tantalum nitride or a metal nitride such as tantalum nitride. Aluminum oxide is a material that can absorb oxygen, hydrogen, and water, which are factors that affect the electrical characteristics of transistors. Therefore, the membrane has a high blocking effect against impurities such as oxidized acid and Aluminum is used to protect against impurities such as hydrogen and moisture during and after the transistor manufacturing process. This can prevent the inclusion of impurities in the transistor 200 .

[0547] On the barrier layer 245 and the insulator 280, an insulator 282, an insulator 283, an insulator 284, an insulator 285, an insulator 286, an insulator 287, an insulator 288, an insulator 289, an insulator 290, an insulator 300, an insulator 301, an insulator 302, an 84 and an insulator 110 are laminated in this order. 283, insulator 284, and insulator 110 have conductors 124 and the like embedded therein. Note that the conductor 124 is a capacitor 100, a transistor 200, or a transistor 30. The conductor 124 functions as a plug or wiring that electrically connects to the conductor 124. It can be provided using the same material as 356.

[0548] any of insulator 282, insulator 283, insulator 284, and insulator 110; or It is preferable to use materials that have barrier properties against oxygen and hydrogen for all of the components. The insulator 282 can be made of the same material as the insulator 214. The insulator 284 can be made of the same material as the insulator 213. The insulator 110 may be the same as the insulator 212. Similar materials can be used.

[0549] For example, the insulators 282 and 283 may be made of aluminum oxide or hafnium oxide. It is preferable to use a metal oxide such as tantalum oxide.

[0550] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 200. It is possible to suppress the release of oxygen from the oxides that make up aluminum oxide. Sium is suitable for use as a passivation layer for transistor 200.

[0551] The insulator 284 has a region from the region where the capacitor element 100 is provided to the region where the transistor 200 is provided. It is preferable to use a film having a barrier property that prevents hydrogen and impurities from diffusing into the region. Therefore, the same material as the insulator 324 can be used.

[0552] For example, silicon nitride formed by CVD is an example of a film that has a barrier property against hydrogen. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. The diffusion of hydrogen into the semiconductor element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 300. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0553] Therefore, the transistor 200 and the insulator 280 containing the excess oxygen region are 2, the laminated structure of the insulator 213 and the insulator 214, and the insulator 282, the insulator 283, and The insulating film 212 and the insulating film 284 may be sandwiched between them. The insulators 213, 214, 282, 283, and 284 are made of an acid. It has barrier properties that suppress the diffusion of impurities such as silicon, hydrogen, and water.

[0554] This configuration prevents the insulator 280 and the transistor 200 from discharging. The oxygen diffuses into the layer in which the capacitor element 100 or the transistor 300 is formed. Alternatively, the layers above the insulator 282 and the insulator 283 can be prevented from being broken. Impurities such as hydrogen and water diffuse into the transistor 200 from layers below 14. This can prevent this from happening.

[0555] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0556] Here, cross-sectional views of the vicinity of the scribe line are shown in FIGS. 48A and 48B.

[0557] For example, as shown in FIG. 48A, a transistor 200 is provided at the outer edge of the memory cell. Insulator 21 is formed in the vicinity of the area overlapping with the scribe line (shown by the dashed line in the drawing). 2, insulator 213, insulator 214, insulator 216, insulator 220, insulator 222, insulator 224 and the insulator 280. Also, the insulators 212, 213, and 214, insulator 216, insulator 220, insulator 222, insulator 224, and insulator 280 Insulators 282, 283, and 284 are provided to cover the side surfaces of the substrate.

[0558] Therefore, in the opening, the insulators 212, 213, and 214 are 282 contacts with the insulating material 283. In addition, the insulating material 283 and the insulating material 284 are laminated on the insulating material 282. At this time, at least one of the insulators 212, 213, and 214, By forming the insulator 282 using the same material and method, adhesion can be improved. do.

[0559] This structure includes the insulators 212, 213, 214, 282, and 283 and insulator 284 encapsulating insulator 280 and transistor 200. The insulator 212, the insulator 213, the insulator 214, the insulator 282, the insulator 283, The insulator 284 has a function of suppressing the diffusion of oxygen, hydrogen, and water. Even when the semiconductor device shown in the embodiment is scribed, the insulator 220, the insulator 222, the insulator Hydrogen or water penetrates from the sides of the insulator 224 and the insulator 280 and spreads to the transistor 200. It can prevent scattering.

[0560] In addition, this structure allows excess oxygen in the insulator 280 to pass through the insulators 282 and 214. Therefore, the excess oxygen in the insulator 280 can be prevented from diffusing to the outside. The oxide on which the channel of the transistor 200 is formed is supplied. This reduces oxygen vacancies in the oxide in which the channel of the transistor 200 is formed. This allows the oxide on which the channel of the transistor 200 is formed to be free of defects. The oxide semiconductor can have a low level density and stable characteristics. This can suppress fluctuations in the electrical characteristics of the resistor 200 and improve reliability.

[0561] Also, for example, as shown in FIG. 48B, both sides of the scribe line (shown by the dashed line in the figure) In the region on the side of the insulating layer 212, the insulating layer 213, the insulating layer 214, the insulating layer 216, the insulating layer 217, the insulating layer 218, the insulating layer 219, the insulating layer 220, the insulating layer 221 Openings may be provided in the edge 220, the insulator 222, the insulator 224, and the insulator 280. Although the figure shows two openings, multiple openings may be provided as needed.

[0562] Therefore, in the openings provided on both sides of the scribe line, the insulator 212 and the insulator 2 13, and the insulator 214 and the insulator 282 contact each other at at least two places, so that the insulator 214 and the insulator 282 are tightly packed together. In this case, the insulators 212, 213, and At least one of the insulating body 214 and the insulating body 282 is formed using the same material and the same method. This can improve adhesion.

[0563] In addition, by providing a plurality of openings, the insulator 282, the insulator 212, the insulator 213, and The scriber 214 can be configured to contact with the insulator 214 in multiple areas. The impurities entering from the insulator 214 are most likely to penetrate into the region where the insulator 282 contacts the insulator 214. When the impurity diffuses to a region close to the transistor 200, the diffusion distance of the impurity is increased. can be done.

[0564] This structure allows the transistor 200 and the insulator 280 to be tightly sealed. Therefore, the oxide in which the channel of the transistor 200 is formed is The transistor 20 can be an oxide semiconductor having low and stable characteristics. This can suppress fluctuations in the electrical characteristics of the semiconductor device 10 and improve reliability.

[0565] Next, above the insulator 284, the insulator 110, the capacitance element 100, and the conductor 12 are arranged. The capacitance element 100 is provided on an insulator 110 and includes a conductor 112 ( Conductor 112a and conductor 112b) and insulator 130, insulator 132 and insulator The conductor 124 includes the capacitor element 100, the transistor, and the The function is as a plug or wiring electrically connecting to the stator 200 or the transistor 300. Possess the ability.

[0566] The conductor 124 can be formed using a material similar to that of the conductor 356 .

[0567] The conductor 112 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High-melting materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use a conductive material, and it is particularly preferable to use tungsten. When the body 112 is formed simultaneously with other structures such as a conductor, it is made of a low-resistance metal material such as Cu. (copper) or Al (aluminum), etc. may be used.

[0568] On the conductor 112, an insulator 130, an insulator 132, and an insulator 134 are provided. The body 130, the insulator 132, and the insulator 134 may be made of, for example, silicon oxide, silicon oxynitride, or the like. Silicon, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, Aluminum oxide nitride, aluminum nitride, hafnium oxide, hafnium oxynitride, nitride Hafnium oxide, hafnium nitride, etc. can be used. Although the figure shows a three-layer structure, a single layer It may have a layered structure of one, two, or four or more layers.

[0569] For example, the insulators 130 and 134 may be made of a material having high dielectric strength, such as silicon oxynitride. The insulator 132 is made of a material with a high dielectric constant (high-k) such as aluminum oxide. With this configuration, the capacitor element 100 has a high dielectric constant (high hk) ensures sufficient capacity and has an insulator with high dielectric strength. This improves the dielectric strength and makes it possible to prevent electrostatic breakdown of the capacitor element 100.

[0570] The conductor 116 is provided on the conductor 112 with the insulator 134 interposed therebetween. 6 can be made of a conductive material such as a metal material, an alloy material, or a metal oxide material. Use high-melting-point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity. It is preferable to use tungsten, and it is particularly preferable to use tungsten. When forming the structure at the same time as other structures such as the above, low-resistance metal materials such as Cu (copper) and Al (aluminum) are used. Minium) or the like can be used.

[0571] For example, as shown in FIG. 44, in the conductor 112 that functions as one of the electrodes, By forming a structure having a convex shape like the body 112b, the capacitance per projected area of the capacitive element can be increased. Therefore, it is possible to reduce the area of semiconductor devices, to increase the integration density, and to miniaturize the devices. become.

[0572] An insulator 150 is provided on the conductor 116 and the insulator 134. 10 and insulator 150 may be provided using materials similar to insulator 320. In addition, an insulator 110 that is the lower part of the capacitor element 100 and an insulator 112 that covers the capacitor element 100 are provided. 50 may function as a planarizing film that covers the underlying irregularities.

[0573] The above is a description of the configuration example. By using this configuration, In semiconductor devices using transistors, the fluctuation of electrical characteristics is suppressed and reliability is improved. Alternatively, a transistor including an oxide semiconductor with a large on-state current can be provided. Alternatively, a transistor including an oxide semiconductor and having a low off-state current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. do.

[0574] <Variation 1> As a modification of this embodiment, a conductor 244 may be formed as shown in FIG. That is, a plug is embedded in the insulator 282, and a conductor to be used as a wiring and a The conductive layer 244 and the barrier layer 245 may be provided in a laminated structure. In the above, it is preferable to use a conductor having high oxidation resistance as the conductor functioning as the wiring. .

[0575] <Variation 2> As a modification of this embodiment, the capacitor element 100 does not necessarily need to include the conductor 122. It is not necessary to have

[0576] For example, the structure shown in FIG. 46 includes an insulator 280, an insulator 282, an insulator 284, and an insulator 286. After forming the insulator 110, the conductor 244 is formed. The conductor 112 that will become one electrode of the capacitor 100 can be formed at the same time. Since it can be produced with fewer processes, it is possible to reduce production costs and increase productivity. Cut.

[0577] Also, on the conductor 112, an insulator 130, an insulator 132, and an insulator 134 are provided. The conductor 116 is formed of a metal material, an alloy material, or a metal oxide. Conductive materials such as tungsten can be used. It is preferable to use a high melting point material such as molybdenum, and in particular tungsten. In addition, when the insulating layer is formed simultaneously with other structures such as a conductor, it is preferable to use a low-resistance metal material. For example, Cu (copper) or Al (aluminum) may be used.

[0578] As shown in FIG. 46, the conductor 116 is surrounded by an insulator 130, an insulator 132, and an insulator 133. The conductor 112 is provided so as to cover the upper and side surfaces thereof via the edge 134. The side surface of the body 112 also functions as a capacitor, so that the capacitance per projected area of the capacitive element is Therefore, it is possible to reduce the area of semiconductor devices, to increase the integration density, and to miniaturize the devices. become.

[0579] In this configuration, when the conductor 112 is formed, the upper surface of the insulator 110 is It is preferable to remove a thickness greater than the total thickness of the insulating layer 30, the insulating layer 132, and the insulating layer 134. For example, by performing an over-etching process, a part of the insulator 110 is also removed at the same time. Moreover, the conductor 112 and the like can be formed by over-etching. This allows etching to be performed without leaving any etching residue.

[0580] In addition, by switching the type of etching gas during the etching process, A part of the insulator 110 can be removed efficiently.

[0581] Also, for example, after the conductor 112 and the conductor 124 are formed, the conductor 112 is As a mask, a portion of the insulator 110 may be removed.

[0582] After the conductor 112 is formed, the surface of the conductor 112 may be subjected to cleaning treatment. By performing the cleaning process, etching residues and the like can be removed.

[0583] As shown in FIG. 46, the insulator 213 and the insulator 283 do not have to be provided. In this configuration, the transistor 200 and the insulator 280 including the excess oxygen region are also The laminated structure of the insulating body 212 and the insulating body 214 and the laminated structure of the insulating body 282 and the insulating body 284 The insulating layer 212, the insulating layer 214, and the insulating layer 216 may be sandwiched between layers. 282 and insulator 284 prevent the diffusion of impurities such as oxygen, hydrogen, and water. It has barrier properties that control

[0584] Therefore, oxygen released from the insulator 280 and the transistor 200 is released from the capacitor element 1 00 or the layer in which the transistor 300 is formed. Alternatively, from the layer above the insulator 282 and the layer below the insulator 214, Impurities such as hydrogen and water can be prevented from diffusing into the transistor 200. Cut.

[0585] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0586] 49A and 49B are cross-sectional views of the vicinity of the scribe line in this modified example. show.

[0587] For example, as shown in FIG. 49A, the area overlapping the scribe line (shown by the dashed line in the drawing) In the vicinity of the region, the insulator 214 and the insulator 282 are in contact with each other, and the insulators 212, 214, The insulator 282 and the insulator 284 are laminated together. 282 are formed using the same material and method, resulting in a highly adhesive laminated structure.

[0588] This structure allows the insulators 212, 214, 282, and 284 to , insulator 216, insulator 220, insulator 222, insulator 224, and insulator 280. The insulators 212, 214, 282, and 284 can be , oxygen, hydrogen, and water diffusion is suppressed. Even if the body device is scribed, the insulators 216, 220, 222, and 224 , and hydrogen or water penetrates from the side of the insulator 280 and diffuses into the transistor 200. This can prevent this.

[0589] In addition, this structure allows excess oxygen in the insulator 280 to pass through the insulators 282 and 214. Therefore, the excess oxygen in the insulator 280 can be prevented from diffusing to the outside. The oxide on which the channel of the transistor 200 is formed is supplied. This reduces oxygen vacancies in the oxide in which the channel of the transistor 200 is formed. This allows the oxide on which the channel of the transistor 200 is formed to be free of defects. The oxide semiconductor can have a low level density and stable characteristics. This can suppress fluctuations in the electrical characteristics of the resistor 200 and improve reliability.

[0590] Also, for example, as shown in FIG. 49B, the scribe line (shown by the dashed line in the drawing) overlaps with the In the vicinity of the region, the insulator 214, the insulator 216, the insulator 220, the insulator 222, the insulator An opening is provided in the insulator 224 and the insulator 280. In addition, the insulators 214, 216, and An insulating layer is formed on the side of the edge 220, the insulator 222, the insulator 224, and the insulator 280. Further, openings are provided in the insulator 212 and the insulator 282, and the insulator 2 12, and the side surfaces of the insulator 282 and the exposed top surface of the insulator 210. An edge 284 is provided.

[0591] That is, the insulator 214 and the insulator 282 contact each other at the opening. At this time, the insulator 214 and the insulator 282 are in contact with each other. By using the same material and method, a highly adhesive layer structure can be obtained. By forming the insulating layer 212 and the insulating layer 284 using the same material and method, a highly adhesive laminate can be obtained. It becomes a structure.

[0592] This structure allows the transistor 200 and the insulator 280 to be tightly sealed. Therefore, the oxide in which the channel of the transistor 200 is formed is The transistor 20 can be an oxide semiconductor having low and stable characteristics. This can suppress fluctuations in the electrical characteristics of the semiconductor device 10 and improve reliability.

[0593] <Variation 3> An example of a modification of this embodiment is shown in FIG. 47. FIG. 47 shows a modification of FIG. 46. The configurations of the transistor 300 and the transistor 200 are different.

[0594] The transistor 300 shown in FIG. 47 has a semiconductor region 312 (substrate 31) where a channel is formed. The side and top surfaces of the semiconductor region 312 are covered with the insulator 31. The conductor 316 is provided to cover the insulating film 4. The conductor 316 has a work function Such a transistor 300 can be fabricated by utilizing the protruding portion of the semiconductor substrate. It is also called a FIN type transistor because it uses a The insulating layer may have an insulating material that functions as a mask for forming the semiconductor portion. Although the case where a convex portion is formed by processing a part of a conductor substrate has been shown, it is also possible to process an SOI substrate to form a convex shape. Alternatively, a semiconductor film having the following structure may be formed.

[0595] The transistor 200 structure shown in FIG. 47 is similar to that shown in FIGS. 36A-36C and 37A-37C. 7C. The oxide 230c and the insulating layer 230b are formed in the openings in the insulating layer 280. The conductive body 250 and the conductive body 260 are formed. Also, the conductive body 240a and the conductive body 240 One end of b is aligned with the end of the opening formed in the insulator 280. The three ends of the conductive body 240a and the conductive body 240b are aligned with parts of the ends of the oxide 230. Therefore, the conductor 240a and the conductor 240b are formed by the oxide 230 or the insulating The opening of the body 280 can be formed at the same time. Therefore, the number of masks and processes can be reduced. Furthermore, the yield and productivity can be improved.

[0596] Furthermore, transistor 200 shown in FIGS. 41A-41D includes conductor 240a, conductor 240b, and 40b and the conductor 260 have a structure in which they hardly overlap with each other, so that the conductor 260 That is, the parasitic capacitance applied to the transistor 20 having a high operating frequency can be reduced. 0 can be provided.

[0597] <Variation 4> An example of a modification of this embodiment is shown in Figures 50A and 50B. 50B respectively represent the channel length of the transistor 200, with the dashed line A1-A2 as the axis; 10 shows a cross section in the channel width direction.

[0598] As shown in Figures 50A and 50B, a transistor 200 and an insulating layer including an excess oxygen region are The edge 280 is a laminated structure of the insulators 212 and 214, and the insulators 282 and The transistor 300 may be wrapped in a stacked structure of the insulator 284. and the capacitor element 100, and an insulator 212 between the transistor 200 and the through electrode. The insulators 214, 282, and 284 may form a laminated structure. preferable.

[0599] Therefore, oxygen released from the insulator 280 and the transistor 200 is released from the capacitor element 1 00 or the layer in which the transistor 300 is formed. Alternatively, from the layer above the insulator 282 and the layer below the insulator 214, Impurities such as hydrogen and water can be prevented from diffusing into the transistor 200. Cut.

[0600] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0601] <Variation 5> An example of a modification of this embodiment is shown in FIG. 51. FIG. 51 is a circuit diagram of a capacitor element The configuration is different.

[0602] As shown in FIG. 51, a capacitor 105 may be formed. The capacitor 105 is a transistor. A part of the wiring to the capacitor 300 also functions as a capacitance element. Therefore, it is possible to reduce the area of semiconductor devices, to increase the integration density, and to miniaturize the devices. In addition, the insulator 212 between the capacitor 105 and the transistor 200 can be The insulators 214, 282, and 284 may form a laminated structure. preferable.

[0603] Therefore, oxygen is efficiently removed from the excess oxygen region of the insulator 280 and used in the transistor 200. This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0604] <Variation 6> An example of a modification of this embodiment is shown in Figures 52A and 52B. 3A is a diagram showing a semiconductor device arranged in a matrix, in which a part of a row is extracted. 52B is a cross-sectional view of a semiconductor device corresponding to the circuit diagram of FIG. 52A. do.

[0605] 52A and 52B show transistor 300, transistor 200, and a capacitive element. A semiconductor device having a transistor 301, a transistor 201, and a capacitor element A semiconductor device having a capacitor 101, a transistor 302, a transistor 202, and a capacitor The semiconductor device having the element 102 is arranged in the same row.

[0606] As shown in FIG. 52B, a plurality of transistors (shown as transistor 200 and transistor The insulator 280 including the excess oxygen region is connected to the insulator 212, The laminated structure of the insulator 214, the laminated structure of the insulator 282, and the laminated structure of the insulator 284 are wrapped around the insulating layer. In this case, the transistor 300, the transistor 301, or the transistor The resistor 302 is connected to the capacitor 100, the capacitor 101, or the capacitor 102. and a through electrode, a transistor 200, a transistor 201, or a transistor 202. Between the insulators 212 and 214 and the insulators 282 and 284, A laminated structure is preferred.

[0607] Therefore, oxygen released from the insulator 280 and the transistor 200 is released from the capacitor element 1 00 or the layer in which the transistor 300 is formed. Alternatively, from the layer above the insulator 282 and the layer below the insulator 214, Impurities such as hydrogen and water can be prevented from diffusing into the transistor 200. Cut.

[0608] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0609] <Variation 7> An example of a modification of this embodiment is shown in Figure 53. Figure 53 is similar to Figures 52A and 52B. In the semiconductor device shown in FIG. 1, a transistor 201 and a transistor 202 are integrated. 10 is a cross-sectional view of a semiconductor device in the case where the

[0610] As shown in FIG. 53, the function of a conductor 112 which is one of the electrodes of a capacitor element 101 is changed to a transistor. The conductor 240 a may also serve as the source electrode or drain electrode of the transistor 201 . In this case, the oxide 230c of the transistor 201 and the gate insulator of the transistor 201 The region of the insulator 250 that functions as an insulating film and extends onto the conductor 240a is the capacitance element 101. Therefore, the conductor 116 serving as the other electrode of the capacitor 101 is The insulator 250 and the oxide 230c may be stacked on the conductor 240a. This configuration enables the semiconductor device to be reduced in area, highly integrated, and miniaturized.

[0611] Alternatively, the transistor 201 and the transistor 202 may be provided so as to overlap each other. This makes it possible to reduce the area, increase the integration density, and miniaturize the semiconductor device.

[0612] In addition, a plurality of transistors (transistor 201 and transistor 202 in the figure) ), and the insulator 280 including the excess oxygen region is formed by the product of the insulator 212 and the insulator 214. The insulating layer 281 may be wrapped in a laminated structure of the insulating layer 282 and the insulating layer 284. In this case, the transistor 300, the transistor 301, or the transistor 302 and a through electrode connecting the capacitor element 100, the capacitor element 101, or the capacitor element 102; Between the transistor 200, the transistor 201, or the transistor 202, an insulator 2 12 and the insulator 214, and the insulator 282 and the insulator 284 form a laminated structure. It is preferable that:

[0613] Therefore, oxygen released from the insulator 280 and the transistor 200 is released from the capacitor element 1 00 or the layer in which the transistor 300 is formed. Alternatively, from the layer above the insulator 282 and the layer below the insulator 214, Impurities such as hydrogen and water can be prevented from diffusing into the transistor 200. Cut.

[0614] That is, oxygen is efficiently removed from the excess oxygen region of the insulator 280 to This can supply oxygen to the oxide where the channel is formed, thereby reducing oxygen vacancies. Impurities cause oxygen vacancies in the oxide that forms the channel of the transistor 200. Therefore, the channel of the transistor 200 can be prevented from being formed. The oxide in which the defect state is formed is made into an oxide semiconductor having a low density of defect states and stable characteristics. That is, it is possible to suppress fluctuations in the electrical characteristics of the transistor 200 and improve reliability. It can be improved.

[0615] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0616] (Fourth embodiment) In this embodiment, a semiconductor device using a transistor according to one embodiment of the present invention will be described. An example of the circuit of the device will be described.

[0617] <Circuit> An example of a circuit of a semiconductor device using a transistor according to one embodiment of the present invention will be described below. This will be explained using Figures 54 and 55.

[0618] <Storage device 1> The semiconductor device shown in FIG. 54 is a semiconductor device having a transistor 3500 and a sixth wiring 3006. This is different from the semiconductor device described in the previous embodiment. It is possible to write and store information in the same way as in a semiconductor device. The transistor 3500 may be the same as the transistor 3200 described above. .

[0619] The sixth wiring 3006 is electrically connected to the gate of the transistor 3500. One of the source and drain of the transistor 3500 is electrically connected to the drain of the transistor 3200. The other of the source and drain of the transistor 3500 is electrically connected to a third wiring 3003. is connected to.

[0620] <Storage device 2> A modification of the semiconductor device (memory device) will be described with reference to the circuit diagram shown in FIG.

[0621] The semiconductor device shown in FIG. 55 includes transistors 4100 to 4400 and capacitors The transistor 4100 includes an element 4500 and a capacitor element 4600. A transistor similar to the transistor 300 described above can be used, and the transistor 420 0 to 4400 can be transistors similar to the transistor 200 described above. Here, the capacitance element 4500 and the capacitance element 4600 are the same as the capacitance element 100 described above. The semiconductor device shown in FIG. Although not shown in the figure, a plurality of the semiconductor devices are provided in a matrix. According to the signal or potential applied to the line 4001, the wiring 4003, and the wirings 4005 to 4009, , it is possible to control writing and reading of data voltages.

[0622] One of the source and the drain of the transistor 4100 is connected to the wiring 4003 . The other of the source and the drain of the transistor 4100 is connected to a wiring 4001. In FIG. 55, the conductivity type of the transistor 4100 is shown as a p-channel type, but it may be an n-channel type. It can also be a mold.

[0623] The semiconductor device shown in Figure 55 has two data holding units. For example, the first data holding unit is the source or drain of the transistor 4400 connected to the node FG1, One electrode of the capacitor 4600 and one of the source or drain of the transistor 4200 The second data storage unit stores charge between the transistor connected to node FG1 and the transistor connected to node FG2. The gate of the transistor 4100, the other of the source or drain of the transistor 4200, One of the source or drain of the transistor 4300 and one electrode of the capacitor element 4500 The charge is held between

[0624] The other of the source and the drain of the transistor 4300 is connected to a wiring 4003 . The other of the source and the drain of the transistor 4400 is connected to a wiring 4001. The gate of the transistor 4400 is connected to the wiring 4005. The gate of the transistor 4300 is connected to a wiring 4007. The other electrode of the capacitor 4600 is connected to the wiring 4008. The other electrode of 500 is connected to a wiring 4009 .

[0625] The transistors 4200 to 4400 control writing of data voltages and retention of electric charges. The transistors 4200 to 4400 function as switches. In this case, a transistor with a low current (off-state current) that flows between the source and drain is used. As a transistor with a low off-state current, it is preferable to use a transistor having an oxide layer in the channel formation region. Preferably, the transistor is an OS transistor having an oxide semiconductor. The advantage of silicon-based transistors is that they have low off-state current and can be stacked with silicon-based transistors. In FIG. 55, the conductivity types of the transistors 4200 to 4400 are n-channel. However, it may be a p-channel type.

[0626] The transistors 4200, 4300, and 4400 are oxides. Even if the transistor uses a nitride semiconductor, it is preferable to provide it in a separate layer. The semiconductor device shown in FIG. 55 includes a transistor 4100, a transistor 4200, and a transistor It is preferable that the transistor 4300 and the transistor 4400 are stacked. In other words, by integrating transistors, The circuit area can be reduced, and the semiconductor device can be made smaller.

[0627] Next, the operation of writing information into the semiconductor device shown in FIG. 55 will be described.

[0628] First, the data voltage is written to the data storage section connected to node FG1 (hereinafter referred to as This will be referred to as write operation 1. The data voltage to be written to the connected data storage unit is V D1 and the threshold voltage of the transistor 4100 is The voltage is Vth.

[0629] In write operation 1, the wiring 4003 is connected to V D1 After setting the wiring 4001 to ground potential, , and are electrically floating. Also, the wirings 4005 and 4006 are set to high level. 4007 to 4009 are set to a low level. Then, the node FG The potential of the wiring 4 rises, and a current flows through the transistor 4100. The potential of 001 rises. Also, the transistor 4400 and the transistor 4200 are in a conducting state. Therefore, as the potential of the wiring 4001 increases, the potentials of the nodes FG1 and FG2 The potential of the node FG2 rises, and the potential between the gate and source of the transistor 4100 rises. When the voltage (Vgs) of the transistor 4100 reaches the threshold voltage Vth of the transistor 4100, the transistor 41 Therefore, the potential of the wiring 4001 and the nodes FG1 and FG2 The rise of V stopped. D1 Vth has dropped from D1 -Vth" and becomes constant.

[0630] In other words, the V given to wire 4003 D1 is generated by the current flowing through transistor 4100. The potential is applied to the wiring 4001, and the potentials of the nodes FG1 and FG2 increase. The potential of node FG2 becomes "V D1 -Vth" and the Vgs of the transistor 4100 becomes Vth, and the current stops.

[0631] Next, a data voltage write operation (hereinafter, This will be called write operation 2. The data voltage written to the memory is V D2 It will be explained as follows.

[0632] In write operation 2, wire 4001 is connected to V D2 After setting the wiring 4003 to ground potential, , and are electrically floating. The wiring 4007 is set to a high level. 4006, 4008, and 4009 are set to low level. Transistor 4300 is set to the conductive state. Therefore, the potential of the node FG2 is also set to low level. The voltage of the wiring 4003 decreases, and a current flows through the transistor 4100. The potential rises. In addition, the transistor 4300 is turned on. As the potential at node FG2 rises, the potential at node FG3 rises. When Vgs of the transistor 4100 becomes Vth of the transistor 4100, the transistor The current flowing through 4100 becomes smaller. Therefore, the potential of the wiring 4003 and FG2 stops rising. Mari, V D2 Vth has dropped from D2 -Vth" and becomes constant.

[0633] In other words, the V given to wire 4001 D2 is generated by the current flowing through transistor 4100. is applied to the wiring 4003, and the potential of the node FG2 increases. The potential of FG2 is "V D2 -Vth", the Vgs of transistor 4100 is Vth At this time, the potential of the node FG1 is 4400 are in a non-conducting state, and the "V D1 -Vth" is maintained will be done.

[0634] In the semiconductor device shown in FIG. 55, after writing data voltages to a plurality of data holding units, The line 4009 is set to a high level, and the potentials of the nodes FG1 and FG2 are raised. The transistor is turned off, preventing the transfer of charge and maintaining the written data voltage. do.

[0635] By the above-described operation of writing data voltages to the nodes FG1 and FG2, multiple data The data voltage can be held in the data holding section. D1 -Vth" and "V D2 -Vth" were used as examples, but these are multi-value data. Therefore, each data storage unit stores 4-bit data. When holding 16 values of "V D1 -Vth" and "V D2 -Vth" can be used.

[0636] Next, the operation of reading information from the semiconductor device shown in FIG. 55 will be described.

[0637] First, the data voltage is read from the data storage unit connected to node FG2 (hereinafter referred to as (This is called read operation 1.) will now be described.

[0638] In the read operation 1, the wiring 400 is precharged and then brought into an electrically floating state. 3 is discharged. The wirings 4005 to 4008 are set to a low level. The wiring 4009 is set to a low level. The potential of the electrically floating node FG2 is set to low level. D2 -Vth" When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the wiring 4003, which is in an electrically floating state. As the potential decreases, the Vgs of transistor 4100 decreases. When the Vgs of the transistor 4100 becomes the Vth of the transistor 4100, the current flowing through the transistor 4100 That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2, D2 -Vth " is a value that is larger than Vth by "V D2 The potential of this wiring 4003 is This corresponds to the data voltage of the data storage section connected to FG2. The data voltage undergoes A / D conversion and the data is acquired from the data storage section connected to node FG2. do.

[0639] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching from high to low allows current to flow through transistor 4100. As a result, the potential of the floating wiring 4003 drops to "V D2 " Tiger In Transistor 4100, the "V D2 Vgs between "-Vth" is Vth The current stops. Then, the wiring 4003 is connected to the "V D 2" is read out.

[0640] After acquiring the data from the data storage section connected to node FG2, transistor 4300 is in a conducting state, and "V D2 -Vth" is discharged.

[0641] Next, the charge held at node FG1 is distributed to node FG2, and the charge held at node FG1 is transferred to node FG3. The data voltage of the data storage unit connected to node FG1 is transferred to the data storage unit connected to node FG2. Then, the wirings 4001 and 4003 are set to low level, and the wiring 4006 is set to high level. In addition, the wiring 4005 and the wirings 4007 to 4009 are set to low level. When node FG1 is in a conductive state, the charge of node FG1 is shared with node FG2.

[0642] Here, the potential after the charge distribution is the written potential "V D1 -Vth". Therefore, the capacitance value of the capacitor 4600 is set to be larger than the capacitance value of the capacitor 4500. Alternatively, the potential "V D1 -Vth" is the same The potential "V D2 It is preferable to set the capacitance to be larger than "-Vth". By changing the ratio of the values and increasing the potential to be written in advance, the potential after the charge distribution The change in potential due to the distribution of charge will be described later.

[0643] Next, the data voltage is read from the data storage unit connected to the node FG1 (hereinafter, This will be referred to as read operation 2.

[0644] In the read operation 2, the wiring 400 is precharged and then brought into an electrically floating state. 3 is discharged. The wirings 4005 to 4008 are set to a low level. The wiring 4009 is The line 4009 is set to a high level during precharge and then set to a low level. By using this as a bell, the electrically floating node FG2 is set to the potential "V D1 -Vth" When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the electrically floating wiring 4003. As the voltage Vgs of transistor 4100 decreases, the voltage Vgs of transistor 4100 decreases. When Vgs becomes Vth of the transistor 4100, the current flowing through the transistor 4100 becomes That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2 “V D1 -Vth" Vth is larger than Vth. D1 The potential of the wiring 4003 is The data voltage of the data storage section connected to G1 corresponds to the data of the analog value that is read out. The voltage of the capacitor undergoes A / D conversion and acquires data from the data storage section connected to node FG1. This completes the read operation of the data voltage to the data storage unit connected to node FG1. .

[0645] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching from high to low allows current to flow through transistor 4100. As a result, the potential of the floating wiring 4003 drops to "V D1 " Tiger In Transistor 4100, the "V D1 Vgs between "-Vth" is Vth The current stops. Then, the wiring 4003 is connected to the "V D "1" is read out.

[0646] By the above-described operation of reading the data voltages from the nodes FG1 and FG2, a plurality of The data voltage can be read from the data storage unit. For example, the node FG1 and the node By storing 4 bits (16 values) of data in each of the F...

Claims

[Claim 1] A metal oxide film in which a first region containing In, an element M, Zn, and O and a second region containing In, an element M, Zn, and O are mixed and present, the element M of the first region and the element M of the second region are Al, Ga, Y, or Sn; The metal oxide film, wherein the first region has a higher atomic ratio of In to element M than the second region.

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