Methods for forming image sensors
The method of cavity engineering and integrated deposition processes addresses the inefficiencies of conventional photodiode fabrication by enabling high-throughput, cost-effective, and performance-enhanced image sensors with diverse materials and structures.
Patent Information
- Application Number
- JP2025063552
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-12-30
- Filing Date
- 2025-04-08
- Publication Date
- 2025-08-28
AI Technical Summary
Conventional photodiode fabrication methods require multiple dopant treatments, leading to low throughput and high manufacturing costs, and are limited to silicon-based sensor pixel structures.
A method for forming image sensors involving cavity engineering, stress and material selection, and integrated deposition processes to create homogeneous or heterogeneous material devices, reducing the need for multiple implantation steps and enabling new materials in sensor pixel structures.
Improves manufacturing throughput, reduces costs, and enhances performance by allowing new materials and structures, while addressing lattice mismatch and wafer bow issues, and integrating emitters and sensors on the same wafer.
Smart Images
Figure 2025126168000001_ABST
Abstract
Description
[Technical Field]
[0001] FIELD OF THE INVENTION
[0001] Embodiments of the present principles relate generally to semiconductor manufacturing. [Background technology]
[0002]
[0002] Photodiodes are typically constructed using implantation techniques that require multiple (sometimes 30 or more) dopant treatments at different energy levels to form a pixel. Such complex dopant processes result in low throughput and high cost per unit of fabrication. Therefore, the present inventors have provided a method for forming photodiodes that dramatically improves manufacturing throughput, is compatible with more workflows, such as CMOS workflows, significantly reduces manufacturing costs, and provides superior performance. Summary of the Invention
[0003]
[0003] Provided herein is a method for forming an image sensor.
[0004]
[0004] In some embodiments, a method for forming an image sensor may include forming a cavity on a substrate, the cavity having a cavity profile and configured to receive a sensor pixel structure of the image sensor; forming at least one passivation layer in the cavity; forming at least one optical layer on at least a portion of one of the at least one passivation layers in the cavity, the at least one optical layer configured to at least provide inter-pixel optical isolation of the sensor pixel structure; forming the at least one optical layer on at least a portion of one of the at least one passivation layers in the cavity; and forming a sensor pixel structure on the at least one optical layer of the sensor pixel structure in the cavity, the cavity profile configured to control stress on the sensor pixel structure.
[0005]
[0005] In some embodiments, the method may further include forming a sensor pixel structure using an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, or a molecular beam epitaxy (MBE) process, and crystallizing the sensor pixel structure, wherein at least one passivation layer or at least one optical layer is conformally deposited within the cavity, and the image sensor includes multiple stacked sensor pixel structures separated by optical layers within the cavity, and the at least one optical layer includes a distributed Bragg reflector (DBR) mirror layer or a DBR filter layer. The method further includes depositing a charge passivation layer in the cavity before forming the sensor pixel structure, the charge passivation layer being configured to increase quantum efficiency of the image sensor by changing a work function or an electric field of the sensor pixel structure; and adjusting an amount of stress applied to the sensor pixel structure before or after forming the sensor pixel structure in the cavity, wherein adjusting the amount of stress increases quantum efficiency of the sensor pixel structure. and subsequently adjusting the amount of stress applied to the sensor pixel structure, wherein the amount of stress is adjusted by disposing at least one isolation structure of a material different from the substrate next to the cavity outside the cavity, and the amount of stress is further adjusted by changing the material selection of the external isolation structure to a material different from the substrate, wherein the at least one isolation structure is at least one shallow trench isolation structure or at least one deep trench isolation structure gap-filled with a material different from the substrate, and the amount of stress is adjusted by a curing process, dopant implantation, or annealing process before or after forming the sensor pixel structure.The method may further include etching a bottom of the cavity to expose the substrate material; forming a sensor pixel structure in the cavity using an epitaxial growth process; forming a plurality of stacked sensor pixel structures in the cavity separated by optical layers; and forming a plurality of electrical contact vias to each of the plurality of stacked sensor pixel structures on only one side of the image sensor, and / or at least one optical layer is formed of a metallic material or a dielectric material.
[0006]
[0006] In some embodiments, a method for forming an image sensor may include forming a hard mask pattern on a substrate; etching at least one cavity in the substrate based on the hard mask pattern, wherein the at least one cavity has a cavity profile and is configured to receive a sensor pixel structure of the image sensor; etching at least one cavity in the substrate based on the hard mask pattern; removing the hard mask pattern from the substrate; forming at least one conformal passivation layer in the at least one cavity; and forming at least one conformal optical layer on at least a portion of the at least one conformal passivation layer in the at least one cavity, wherein the at least one conformal optical layer is configured to at least provide inter-pixel optical isolation of the sensor pixel structure; forming at least one conformal optical layer on at least a portion of the at least one conformal passivation layer in the at least one cavity; and forming a sensor pixel structure on the at least one conformal optical layer of the sensor pixel structure in the at least one cavity.
[0007]
[0007] In some embodiments, the method may further include forming a sensor pixel structure using an atomic layer deposition (ALD) process or a chemical vapor deposition (CVD) process, crystallizing the sensor pixel structure, and adjusting the amount of stress applied to the sensor pixel structure by modifying a cavity profile, wherein adjusting the amount of stress increases the quantum efficiency of the sensor pixel structure; adjusting the amount of stress applied to the sensor pixel structure by modifying the cavity profile; and / or forming a charge passivation layer before forming the sensor pixel structure, wherein the charge passivation layer is configured to increase the quantum efficiency of the sensor pixel structure.
[0008]
[0008] In some embodiments, a non-transitory computer-readable medium is provided having stored thereon instructions that, when executed, cause a method of forming an image sensor to be performed, the method may include forming a cavity in a substrate, the cavity having a cavity profile and configured to receive a sensor pixel structure of the image sensor; forming at least one passivation layer in the cavity; forming at least one optical layer on the at least one passivation layer in the cavity, the at least one optical layer configured to at least provide inter-pixel optical isolation of the sensor pixel structure; and forming the sensor pixel structure on the at least one optical layer of the sensor pixel structure in the cavity.
[0009]
[0009] In some embodiments, the method may further include the cavity profile being configured to control stress on the sensor pixel structure to enhance quantum efficiency, and / or one of the at least one optical layer being a distributed Bragg reflector (DBR) configured to provide optical isolation of the sensor pixel structure.
[0010]
[0010] Other further embodiments are disclosed below.
[0011]
[0011] The embodiments of the present principles summarized above and described in more detail below can be understood by reference to exemplary embodiments of the present principles illustrated in the accompanying drawings. However, the accompanying drawings merely illustrate typical embodiments of the present principles and therefore should not be considered limiting in scope, as the present principles may also admit of other equally effective embodiments. [Brief explanation of the drawings]
[0012] [Figure 1] 10A-10C are cross-sectional views illustrating cavities with different cavity profiles, according to some embodiments of the present principles; [Figure 2] 1A-1C are cross-sectional views of a cavity with a passivation layer formed inside the cavity, according to some embodiments of the present principles; [Figure 3] 1A-1C are cross-sectional views of a cavity having a DBR layer formed on a passivation layer, in accordance with some embodiments of the present principles; [Figure 4] 1A-1C are cross-sectional views illustrating cavities with exposed bottom surfaces, according to some embodiments of the present principles; [Figure 5] 1A-1C are cross-sectional views of cavities with charge passivation layers, according to some embodiments of the present principles; [Figure 6] 1A-1C are cross-sectional views illustrating sensor pixel structures formed by deposition, according to some embodiments of the present principles; [Figure 7] 1A-1C are cross-sectional views illustrating sensor pixel structures formed by epitaxial growth or other deposition techniques, according to some embodiments of the present principles. [Figure 8] 1 is a cross-sectional view illustrating a cavity surrounded by an external isolation structure, according to some embodiments of the present principles; [Figure 9] 1 is a cross-sectional view illustrating multiple cavities surrounded by an external isolation structure, according to some embodiments of the present principles; [Figure 10] 1A-1C are cross-sectional views of image sensors having stacked sensor pixel structures, according to some embodiments of the present principles; [Figure 11] 1 is a method of forming an image sensor according to some embodiments of the present principles; [Figure 12] 1A-1C illustrate cavities formed in a substrate material, according to some embodiments of the present principles; [Figure 13] 1A-1C illustrate cavities formed in a mold layer on a substrate, according to some embodiments of the present principles;
[0013]
[0025] To facilitate understanding, the same reference numerals have been used, wherever possible, to designate identical elements common to the drawings. The drawings are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION OF THE INVENTION
[0014]
[0026] The present method enables the formation of image sensors in a simplified manufacturing workflow while improving the performance and scalability of the image sensors. The method combines image sensor material formation, composition engineering, surface passivation, work function engineering, and / or stress engineering into one single workflow step or integrated workflow steps. The method enables the fabrication of homogeneous or heterogeneous material devices by integrating material engineering, device architecture, and device design. Compared to conventional methods requiring multiple steps, the present method promises to enable new types of device structures in a greatly simplified manufacturing flow. The present method also has the advantage of reducing damage to device structures and materials during fabrication while addressing lattice mismatch, wafer bow, and other issues of heterogeneous material device structures. The present method combines mirror, filter, charge, work function, and / or isolation engineering into a single or simplified step. The present method provides a new process for quantum efficiency engineering of sensors and also enables the integration of emitters and sensors on the same wafer. Existing image sensor manufacturing workflows involve implanting dopants into silicon substrates to form sensors. Implantation can be a long and tedious process, requiring repeated implantation steps (sometimes more than 30 times). Because the implantation is performed on a silicon substrate, the sensor pixel structure is limited to being a variant of doped silicon. The method of this principle allows the introduction of new materials in the formation of the sensor pixel structure, simultaneously improving performance and throughput.
[0015]
[0027] An exemplary method 1100 is illustrated in FIG. 11 with reference to FIGS. 1-10, 12, and 13. In block 1102, one or more cavities are formed on a substrate. As used herein, the phrase "formed on a substrate" includes cavities etched into the substrate material, as well as cavities formed in a layer of molding material on top of the substrate. In some embodiments, the substrate may be a silicon-based material, or the like. In some embodiments, one or more cavities 1204 may be formed on the substrate 1202 using a patterned hard mask 1206, as shown in FIG. 12, diagram 1200A. Using an etching process, the substrate 1202 is etched away, forming one or more cavities 1204 in the substrate 1202, as shown in FIG. 12, diagram 1200B. The patterned hard mask 1206 is then removed, leaving one or more cavities 1204 in the substrate 1202, as shown in FIG. 12, diagram 1200C. The patterned hard mask 1206 may be retained to support selective deposition and may be removed after the sensor pixel structure is formed. In some embodiments, the one or more cavities 1304 may be formed by first depositing a mold layer 1308 on the substrate 1302, as shown in FIG. 13, diagram 1300A. The patterned hard mask 1306 and mold layer 1308 may also be combined as a single layer. Next, as shown in FIG. 13, diagram 1300B, an etching process is used to form one or more cavities 1304 in the mold layer 1308 on the substrate 1302. Then, as shown in FIG. 13, diagram 1300C, the patterned hard mask 1306 is removed, leaving one or more cavities 1304 on the substrate 1302. In some embodiments, the mold layer 1308 may be removed after the emitter pixel structure 1310 is formed, as shown in FIG. 13, diagram 1300D, and as described below.
[0016]
[0028] As shown in Figures 100A, 100B, 100C, and 100D of Figure 1, cavity engineering can be used to shape cavities based on cavity profiles that can affect the amount of stress acting on the sensor pixel structures formed within the cavities 104A-104D. When different materials are formed within a substrate material or within a mold layer (the substrate material or mold layer will be referred to herein as the "cavity layer" for simplicity), stress and strain are induced in the different materials due to lattice mismatch, stress memory effects (seen in the cavity-in-substrate-material or cavity-in-mold-layer approach), and the cavity profile. Here, "stress" is used for simplicity to encompass both stress and strain (compressive and tensile). In Figure 100A, the cavity 104A formed in the cavity layer 102 has parallel walls 106A that can exhibit a uniform amount of stress and / or electric field from a charge layer throughout the sensor pixel structure. In Figure 100B, cavity 104B has angled walls 106B that are closer near the top 108B of cavity 104B than the bottom 110B of cavity 104B, which may indicate an increased downward stress and / or work function / field from the charge layer below the sensor pixel structure and an increased inward stress and / or work function / field from the charge layer above the sensor pixel structure. In Figure 100C, cavity 104C has angled walls 106C that are closer near the bottom 110C of cavity 104C than the top 108C of cavity 104C, which may indicate a decreased downward stress and / or work function / field from the charge layer below the sensor pixel structure and an decreased inward stress and / or work function / field from the charge layer above the sensor pixel structure. In Figure 100D, cavity 104D has inwardly angled walls 112D at the top of cavity 104D and outwardly angled walls 114D at the bottom of cavity 104D near bottom 110D, which may present an inwardly directed stress and / or work function / field increase from the upper charge layer and a downwardly directed stress and / or work function / field from the lower charge layer that may be counteracted by outwardly angled walls 114D.Cavity engineering can be used to influence the stress and / or work function / field from charge layers on the pixel and structure and to scale the sensor pixel structure. Cavity engineering can also be used to streamline the manufacturing process by selecting and designing cavities that require less intensive processing. Those skilled in the art will also understand that the stress and / or work function / field from charge layers within the sensor pixel structure can also be influenced by isolation engineering (discussed below). The shape and angle of the cavity walls, combined with the material selection and processing of external isolation structures near the cavity, affect the amount and location of stress and / or work function / field within the cavity, and both can be used to tailor the amount of stress. Shape and angle also enable three-dimensional stress and / or work function / field engineering, facilitating quantum efficiency enhancement and modulation at different pixel locations. The use of angled cavity surfaces is not intended to be limiting. Those skilled in the art will also understand that the surfaces forming the cavity can be angled and / or curved.
[0017]
[0029] In the following description, for simplicity, a cavity having a cavity profile with parallel walls is used, but a cavity with parallel walls is not meant to be limiting in any way. In block 1104, at least one image sensor external isolation structure is optionally formed near at least one cavity formed in the cavity layer 802, as shown in diagram 800 of FIG. 8. Here, the term "external" is used to refer to an isolation structure that is not within the cavity wall. The external isolation structure 806 is used to adjust the amount of stress acting on the sensor pixel structure formed in the cavity 804. Block 1104 is optional because the external isolation structure 806 can be formed before and / or after forming the sensor pixel structure in the cavity 804 (e.g., see block 1118 below), or may not be needed at all. The external isolation structure may be, for example, but not limited to, a shallow trench isolation (STI) structure and / or a deep trench isolation (DTI) structure. When cavity 804 is formed in the mold layer, the material of the mold layer is considered an external isolation structure and can be tailored (e.g., material selection of dielectric or metallic materials, dopants, annealing processes, etc.) to create different stress levels and force directions on the sensor pixel structures subsequently formed in cavity 804 (see stress engineering examples below). In some embodiments, the mold layer can be partially removed (e.g., see top removal 1312 or side removal 1314, etc., in FIG. 13 , diagram 1300D, as non-limiting examples) or completely removed (e.g., completely removed 1316, in FIG. 13 , diagram 1300D) to create different stress levels on the emitter pixel structures.
[0018]
[0030] In block 1106, stress engineering is optionally performed. As described above, stress engineering can be performed before and / or after forming the sensor pixel structure in the cavity. Stress engineering involves varying the stress on the sensor pixel structure to enhance the performance of the sensor pixel structure by increasing its quantum efficiency. Quantum efficiency is the percentage of photons incident on the sensor pixel structure that are converted to electrons. Stress engineering of the sensor pixel structure can also further influence the amount of stress acting on the sensor pixel structure using the selection of materials used to gap-fill trenches or other isolation structures. The stress can be designed to be compressive or tensile. The amount of stress can also be further influenced or adjusted by hardening the material of the external isolation structure, implanting dopants into the material of the external isolation structure, and / or annealing the material of the external isolation structure, etc. The numerous methods available for adjusting the amount of stress acting on the sensor pixel structure (including utilizing the cavity engineering described above) enable infinite levels of stress control (amount of stress, stress direction, etc.) not achievable by other methods, resulting in substantially higher performance image sensors. 9, another technique that can be used for stress engineering is to place an external isolation structure 906 around multiple cavities 904A-C formed in a cavity layer 902. The amount of stress in the sensor pixel structures in the cavities 904A, 904C closest to the external isolation structure 906 is tuned differently than the sensor pixel structures in the cavity 904B furthest from the external isolation structure 906. Cavities 908 outside the external isolation structure experience diminishing stress control provided by the external isolation structure as they move further away from the external isolation structure.
[0019]
[0031] In block 1108, a passivation layer 216 is formed in the cavity 204 of the substrate 202, as shown in diagram 200 of FIG. 2. In some embodiments, the passivation layer 216 is a conformal layer formed on the walls 206 and bottom 210 of the cavity. The passivation layer 216 may have a thickness of about 10 Å to about 200 Å. The passivation layer 216 may be composed of a dopant or a high-dielectric-constant material. After the cavity is formed, the surface of the cavity typically exhibits crystalline damage due to the process used to form the cavity. The crystalline damage or defects can generate electrical signals (dark noise) even when no light is incident on the image sensor. The passivation layer serves to stabilize or recombine erroneous electrical signals (dark noise) to improve the signal-to-noise ratio performance of the image sensor.
[0020]
[0032] In block 1110, at least one optical layer is formed within the cavity 202, as shown in diagram 300 of FIG. 3. In some embodiments (as shown in FIG. 3), an optical layer 318 is formed on the passivation layer 216. As shown in diagram 1000 of FIG. 10, in some embodiments, multiple optical layers 1004A-B may be formed on the multiple sensor pixel structures 1002A-C to isolate and filter different wavelengths from reaching different sensor pixel structures in a stacked sensor pixel structure (see below). The optical layer 318 may have a thickness of about 50 nm to about 200 nm. The optical layer 318 may function as a reflective optical layer and / or a filter (such as, but not limited to, a bandpass filter) to provide optical isolation of the sensor pixel structures formed within the cavity 204. In some embodiments, the optical layer 318 may be enhanced through implantation or doping to also provide charge passivation and / or additional isolation functions. In some embodiments, the optical layer 318 may be composed of a dielectric and / or metallic material. In some embodiments, the optical layer 318 may form a distributed Bragg reflector (DBR) layer. A DBR layer affects light wavelengths by stacking alternating layers of different materials with different refractive indices. Light waves reflect at each layer boundary. Different layer configurations can be used to provide complete light reflection as a mirror or to provide light reflection only at specific wavelengths as a filter. In some embodiments, the optical layer 318 may form a DBR filter layer that functions as an optical filter. A DBR filter layer can be used to reflect certain wavelengths of light while passing other wavelengths. A DBR filter layer can be used in combination with a stacked sensor pixel structure found in RGB (red / green / blue) image sensors (see, for example, FIG. 10 ) as a bandpass filter to pass or reflect different wavelengths. The DBR layer can be deposited using ALD or CVD deposition processes, or grown epitaxially.
[0021]
[0033] In block 1112, the bottom 210 of the cavity 204 is optionally etched to remove any deposition from the bottom of the cavity, as shown in diagram 400 of FIG. 4 , and a charge passivation layer 502 is optionally formed on the bottom 210 of the cavity 204, as shown in diagram 500 of FIG. 5 . The bottom 210 of the cavity 204 may be etched to expose the substrate material if the subsequent sensor pixel structure formation process uses epitaxial growth. The etching can cause damage to the crystalline structure of the substrate material, and the charge passivation layer 502 can be used to repair the damage from the etching process. The charge passivation layer 502 serves the dual function of passivating or minimizing crystalline defects while carrying charge that affects the work function of the sensor pixel structure, thereby increasing the quantum efficiency of the image sensor.
[0022]
[0034] In block 1114, at least one sensor pixel structure is formed in the cavity 204. In some embodiments shown in diagram 600 of FIG. 6, the sensor pixel structure 602 is formed in a conformal manner, for example, by ALD deposition, CVD deposition, or an epitaxial growth process. "Layers" 604A-E represent the compositional control over the internal structure of the sensor pixel structure 602 obtained by performing the method of the present principles. For example, the boundaries of "layers" 604A-E may be dopant gradient transitions, etc. The number of "layers" may be more or less, and the number of five layers is not meant to be limiting in any way, nor does it imply that the internal structure of the sensor pixel structure has distinct layers. When the sensor pixel structure 602 is deposited by deposition, various dopant gases at different rates and densities can be used to dope the deposited material with high control during a single deposition process, dramatically increasing throughput while improving image sensor performance.
[0023]
[0035] As shown in diagram 700 of FIG. 7 , in some embodiments, a sensor pixel structure 702 is formed non-conformally, such as by epitaxial growth using a molecular beam epitaxy (MBE) process, or other deposition techniques, or by a selective deposition process. "Layers" 704A-E represent the compositional control over the internal structure of the sensor pixel structure 702 obtained by performing the method of the present principles. For example, the boundaries of "layers" 704A-E may be dopant gradient transitions, or the like. There may be more or fewer "layers," and the five layers are not meant to be limiting in any way, nor does it imply that the internal structure of the sensor pixel structure has distinct layers. Because the sensor pixel structure 702 is formed by an epitaxial growth or selective deposition process, various dopant gases at different rates and densities can be used to dope the deposited material with high control during a single epitaxial growth or selective deposition process, dramatically increasing throughput while improving image sensor performance. In some embodiments, multiple sensor pixel structures 1002A-C can be formed in a single cavity, as shown in diagram 1000 of FIG. 10 . In some embodiments, additional stress engineering techniques can be performed during the formation of the sensor pixel structures. During the formation of the sensor pixel structures, materials or dopants can be selected to increase / decrease stress within the pixel structures. In some embodiments, passivation, DBR mirror / filter, isolation, and work function can be achieved as a single process during the formation of the sensor pixel structures, improving throughput and performance while reducing costs. When using a backside illumination (BSI) approach, the cavity layer 202 is polished (e.g., by chemical mechanical polishing (CMP)) to remove the bottom first portion 720A or second portion 720B of the cavity layer 202, exposing layer 704A with layer 502 as an etch stop, or to expose the charge passivation layer 502, before continuing with the remaining optical layer fabrication.
[0024]
[0036] In block 1116, a crystallization process is optionally performed on the sensor pixel structure. If the sensor pixel structure is deposited in the cavity rather than epitaxially grown, the sensor pixel structure may be in an amorphous form, which may hinder the performance of the sensor pixel structure. By performing a crystallization process on the deposited sensor pixel structure, the dislocation or defect density of the crystal of the sensor pixel structure can be reduced, resulting in a higher performance image sensor. The crystallization process may include exposing the sensor pixel structure to high heat and pressure. For example, the temperature may be in the range of about 400°C to about 1200°C, the pressure may be in the range of about 1 Torr to about 760 Torr, and the duration may be in the range of a few nanoseconds to about 1 hour. The crystallization process is optional because sensor pixel structures grown by epitaxial growth do not require crystallization to improve the performance of the image sensor.
[0025]
[0037] In block 1118, at least one image sensor external isolation structure is optionally formed near at least one cavity formed in the cavity layer 802, as shown in diagram 800 of FIG. 8 . The external isolation structure may be optional if the external isolation structure is pre-formed before the sensor pixel structure formation, as described in block 1104. In some embodiments, the external isolation structure may be formed both before and after the sensor pixel structure formation, and different types of external isolation structures (e.g., a combination of shallow trenches and deep trenches using the same or different materials / processes) may be used. As mentioned above, the term “external” is used to refer to isolation structures that are not within the walls of the cavity 804. The external isolation structure 806 is used to adjust the amount of stress acting on the sensor pixel structure formed in the cavity 804. The external isolation structure 806 may be, for example, but not limited to, a shallow trench isolation (STI) structure and / or a deep trench isolation (DTI) structure. When cavity 804 is formed in a mold layer, the material of the mold layer can be considered an external isolation structure and can be tailored (e.g., material selection of dielectric or metallic materials, dopants, annealing processes, etc.) to induce different stress levels and force directions in the sensor pixel structures subsequently formed in cavity 804 (see stress engineering examples below). In some embodiments, the mold layer can be partially or completely removed to induce different stress levels in the sensor pixel structures.
[0026]
[0038] In block 1120, stress engineering is optionally performed. As described above, stress engineering can be performed before and / or after forming the sensor pixel structure in the cavity. Stress engineering of the sensor pixel structure can also utilize the selection of materials used to gap-fill trenches or other isolation structures to further influence the amount of stress acting on the sensor pixel structure. The amount of stress can also be further influenced or adjusted by hardening the material of the external isolation structure, implanting dopants into the material of the external isolation structure, and / or annealing the material of the external isolation structure, etc. The numerous methods available for adjusting the amount of stress acting on the sensor pixel structure (including utilizing the cavity engineering described above) enable finer levels of stress control not achievable by other methods, resulting in substantially higher performance from the image sensor. As shown in FIG. 9, another technique available for stress engineering is the placement of an external isolation structure 906 around multiple cavities 904A-C formed in the cavity layer 902. The amount of stress in the sensor pixel structures in the cavities 904A, 904 closest to the external isolation structure 906 is tuned differently than the sensor pixel structures in the cavities 904B furthest from the external isolation structure 906. Cavities 908 outside the external isolation structure experience a diminishing effect of stress control provided by the external isolation structure as the distance from the external isolation structure increases.
[0027]
[0039] At block 1122, vias are optionally formed for signal readout of the image sensor, as shown in diagram 1000 of Figure 10. In some embodiments utilizing multiple stacked sensor pixel structures 1002A-C, via passages may be etched into one or more of the underlying sensor pixel structures to enable the formation of vias 1006A-B that have electrical isolation 1008 from all of the sensor pixel structures through which the vias extend. The vias 1006A-C provide single-sided contact capability that can be utilized for further integration processes.
[0028]
[0040] Embodiments according to the present principles may be implemented in hardware, firmware, software, or any combination thereof. Embodiments may also be implemented as instructions stored using one or more computer-readable media, which may be read and executed by one or more processors. A computer-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing platform or a "virtual machine" running on one or more computing platforms). For example, a computer-readable medium may include any suitable form of volatile or non-volatile memory. In some embodiments, a computer-readable medium may include a non-transitory computer-readable medium.
[0029]
[0041] While the forgoing is directed to embodiments of the present principles, other and further embodiments of the present principles may be devised without departing from the basic scope thereof.
Claims
1. 1. A method of forming an image sensor, comprising: forming a cavity on a substrate, the cavity having a cavity profile and configured to receive a sensor pixel structure of the image sensor; forming at least one passivation layer within the cavity; forming at least one optical layer within the cavity over at least a portion of one of the at least one passivation layers, the at least one optical layer configured to provide at least inter-pixel optical isolation of the sensor pixel structure; forming the sensor pixel structure on the at least one optical layer of the sensor pixel structure within the cavity; Including, The method, wherein the cavity profile is configured to control stress on the sensor pixel structure.
2. forming the sensor pixel structure using an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, or a molecular beam epitaxy (MBE) process; crystallizing the sensor pixel structure; The method of claim 1 further comprising:
3. The method of claim 1 , wherein the at least one passivation layer or the at least one optical layer is conformally deposited within the cavity.
4. The method of claim 1 , wherein the image sensor includes a plurality of stacked sensor pixel structures within the cavity separated by optical layers.
5. The method of claim 1 , wherein the at least one optical layer comprises a distributed Bragg reflector (DBR) mirror layer or a DBR filter layer.
6. depositing a charge passivation layer within the cavity prior to forming the sensor pixel structure, the charge passivation layer configured to increase quantum efficiency of the image sensor by modifying a work function or an electric field of the sensor pixel structure. The method of claim 1 further comprising:
7. adjusting an amount of stress applied to the sensor pixel structure before or after forming the sensor pixel structure within the cavity, whereby the quantum efficiency of the sensor pixel structure is increased. The method of claim 1 further comprising:
8. 8. The method of claim 7, wherein the amount of stress is adjusted by placing at least one isolation structure of a different material than the substrate outside of the cavity next to the cavity, and the amount of stress is further adjusted by changing the material selection of an external isolation structure to a material different from the substrate.
9. 9. The method of claim 8, wherein the at least one isolation structure is at least one shallow trench isolation structure or at least one deep trench isolation structure gap-filled with a material different from the substrate.
10. The method of claim 7 , wherein the amount of stress is adjusted by a curing process, dopant implantation, or annealing process before or after forming the sensor pixel structure.
11. etching a bottom of the cavity to expose substrate material; forming the sensor pixel structure within the cavity using an epitaxial growth process; The method of claim 1 further comprising:
12. forming a plurality of stacked sensor pixel structures within the cavity, the stacked sensor pixel structures separated by optical layers; forming a plurality of electrical contact vias on only one side of the image sensor to each of the plurality of stacked sensor pixel structures; The method of claim 1 further comprising:
13. The method of claim 1 , wherein the at least one optical layer is formed of a metallic material or a dielectric material.
14. 1. A method of forming an image sensor, comprising: forming a hard mask pattern on a substrate; Etching at least one cavity in the substrate based on the hard mask pattern, the at least one cavity having a cavity profile and configured to receive a sensor pixel structure of the image sensor; removing the hard mask pattern from the substrate; forming at least one conformal passivation layer within the at least one cavity; forming at least one conformal optical layer over at least a portion of the at least one conformal passivation layer in the at least one cavity, the at least one conformal optical layer configured to at least provide inter-pixel optical isolation of the sensor pixel structure; forming the sensor pixel structure on the at least one conformal optical layer of the sensor pixel structure within the at least one cavity; A method comprising:
15. forming the sensor pixel structure using an atomic layer deposition (ALD) process or a chemical vapor deposition (CVD) process; crystallizing the sensor pixel structure; The method of claim 14 further comprising:
16. adjusting an amount of stress applied to the sensor pixel structure by modifying the cavity profile, wherein adjusting the amount of stress increases quantum efficiency of the sensor pixel structure. The method of claim 14 further comprising:
17. forming a charge passivation layer prior to forming the sensor pixel structure, the charge passivation layer configured to increase quantum efficiency of the sensor pixel structure. The method of claim 14 further comprising:
18. 1. A non-transitory computer-readable medium having stored thereon instructions that, when executed, cause a method of forming an image sensor to be performed, the method comprising: forming a cavity in a substrate, the cavity having a cavity profile and configured to receive a sensor pixel structure of the image sensor; forming at least one passivation layer within the cavity; forming at least one optical layer on the at least one passivation layer within the cavity, the at least one optical layer configured to at least provide inter-pixel optical isolation of the sensor pixel structure; forming the sensor pixel structure on the at least one optical layer of the sensor pixel structure within the cavity; 1. A non-transitory computer-readable medium comprising:
19. 20. The non-transitory computer-readable medium of claim 18, wherein the cavity profile is configured to control stress on the sensor pixel structure to increase quantum efficiency.
20. 20. The non-transitory computer-readable medium of claim 18, wherein one of the at least one optical layer is a distributed Bragg reflector (DBR) configured to provide optical isolation to the sensor pixel structure.