Photoelectric conversion device

Abstract

To provide a photoelectric conversion device capable of obtaining a high-accuracy focus detection signal while restricting increase in a read-out time.SOLUTION: Read-out from a pixel array is performed in a first mode in which a signal based on charge obtained by adding charge generated by a first photoelectric conversion part to charge generated by a second photoelectric conversion part is read out, and in a second mode in which a signal based on the charge generated by either the first photoelectric conversion part or the second photoelectric conversion part is read out and then a signal based on charge obtained by adding charge generated by the first photoelectric conversion part to charge generated by the second photoelectric conversion part is read out. Read-out from a first region is performed in the first mode, read-out from a second region is performed in the second mode, read-out from a part of a third region arranged between the first region and the second region is performed in the first mode, and read-out from another part is performed in the second mode.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device. [Background technology]

[0002] Digital cameras and other imaging systems equipped with CMOS image sensors, which are XY address type imaging devices, are becoming increasingly multifunctional. In addition to generating still or video images, imaging system control, such as focus adjustment, can also be performed based on subject information obtained by the imaging device.

[0003] Patent Documents 1 and 2 disclose techniques that enable split-pupil focus detection using signals obtained from an imaging device. By providing one microlens and two photodiodes for each pixel of the imaging device, each of the two photodiodes receives light that has passed through a different pupil region of the imaging lens. Focus detection can be performed by comparing the output signals from these two photodiodes. It is also possible to generate an image by adding the output signals from the two photodiodes.

[0004] Furthermore, Patent Document 2 discloses a control method for dividing a pixel area into an area where signal acquisition for focus detection is performed and an area where signal acquisition for focus detection is not performed. This method makes it possible to suppress an increase in readout time for acquiring signals for focus detection. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-124984 [Patent Document 2] Japanese Patent Application Laid-Open No. 2016-021052 Summary of the Invention [Problem to be solved by the invention]

[0006] In a configuration in which an area where focus detection signals are acquired is separated from an area where focus detection signals are not acquired, as in Patent Document 2, the accuracy of the focus detection signals may be reduced depending on the scanning method used to scan these areas.

[0007] An object of the present invention is to provide a photoelectric conversion device that can obtain a focus detection signal with high accuracy while suppressing an increase in readout time. [Means for solving the problem]

[0008] According to one disclosure of the present specification, a pixel array includes a plurality of microlenses arranged to form a plurality of rows and a plurality of columns, and a plurality of unit pixels arranged corresponding to the plurality of microlenses, each of the plurality of unit pixels including a first photoelectric conversion unit and a second photoelectric conversion unit, and a first mode in which a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out, and a second mode in which a signal based on charges generated in either the first photoelectric conversion unit or the second photoelectric conversion unit is read out, and thereafter a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out. a second mode in which data is read from the pixel array, and read control is performed on the pixel array by dividing the pixel array into a plurality of regions including a first region, a second region, and a third region disposed between the first region and the second region; readout from unit pixels of all rows included in the first region is performed in the first mode, readout from unit pixels of all rows included in the second region is performed in the second mode, readout from unit pixels of some rows included in the third region is performed in the first mode, and readout from unit pixels of some other rows is performed in the second mode. [Effects of the Invention]

[0009] According to the present invention, a photoelectric conversion device is provided that can obtain a focus detection signal with good accuracy while suppressing an increase in readout time. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a block diagram showing an example of the configuration of an imaging device according to a first embodiment. [Figure 2] 2 is a block diagram showing an example of the configuration of a vertical scanning unit and a pixel array according to the first embodiment. FIG. [Figure 3] 2 is a circuit diagram showing an example of the configuration of a pixel group according to the first embodiment. FIG. [Figure 4] 3 is a schematic diagram showing a ranging area set for the pixel array according to the first embodiment. FIG. [Figure 5] 5A and 5B are timing charts showing reset operations and readout operations of a pixel group according to the first embodiment. [Figure 6] 5A and 5B are timing charts showing reset operations and readout operations of a pixel group according to the first embodiment. [Figure 7] 4 is a timing chart showing vertical scanning of a reset operation and a readout operation in the pixel array according to the first embodiment. FIG. [Figure 8] 5 is a timing chart showing a reset operation and a read operation in each region according to the first embodiment. FIG. [Figure 9] 5 is a timing chart showing a reset operation and a read operation in each region according to the first embodiment. FIG. [Figure 10] FIG. 10 is a circuit diagram showing an example of the configuration of a pixel group according to a second embodiment. [Figure 11] FIG. 10 is a timing chart showing vertical scanning of a reset operation and a readout operation in a pixel array according to the second embodiment. [Figure 12] FIG. 10 is a block diagram showing an example of the configuration of an imaging device according to a third embodiment. [Figure 13] FIG. 11 is a timing chart showing vertical scanning of a reset operation and a readout operation in a pixel array according to the third embodiment. [Figure 14]FIG. 11 is a timing chart showing data input / output in a line memory unit according to the third embodiment. [Figure 15] FIG. 10 is a block diagram showing an example of the configuration of an imaging device according to a fourth embodiment. [Figure 16] FIG. 11 is a block diagram showing a schematic configuration of a device according to a fifth embodiment. [Figure 17] FIG. 13 is a block diagram showing a schematic configuration of a device according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The same or corresponding elements in multiple drawings are designated by common reference numerals, and their description may be omitted or simplified.

[0012] In the first to fourth embodiments described below, an imaging device will be mainly described as an example of a photoelectric conversion device. However, the photoelectric conversion device in each embodiment is not limited to an imaging device and can be applied to other devices. Examples of other devices include a distance measuring device and a photometric device. The distance measuring device may be, for example, a distance measuring device using TOF (Time-Of-Flight). The photometric device may be a device that measures the amount of light incident on the device.

[0013] [First embodiment] 1 is a block diagram showing an example of the configuration of an imaging device according to this embodiment. The imaging device includes a CPU (Central Processing Unit) 1, a control unit 2, a vertical scanning unit 3, a pixel array 4, a column circuit unit 5, a horizontal scanning unit 6, a digital signal processing unit 7, and a signal output unit 8. The various circuits that make up the photoelectric conversion device may be formed on one or more semiconductor substrates.

[0014] The CPU 1 is a processor that controls the imaging device by executing a program. The CPU 1 may be provided within the photoelectric conversion device, or may be provided within an imaging system in which the imaging device is installed, i.e., outside the imaging device.

[0015] The control unit 2 is a control circuit that receives control signals such as synchronization signals output from the CPU 1 and setting signals indicating operation modes and the like, and supplies control signals to the vertical scanning unit 3, the column circuit unit 5, and the horizontal scanning unit 6.

[0016] The vertical scanning unit 3 is a scanning circuit including a shift register, a gate circuit, a buffer circuit, etc. The vertical scanning unit 3 receives control signals such as a vertical synchronization signal, a horizontal synchronization signal, and a clock signal from the control unit 2 and performs reset scanning and readout scanning of the pixel array 4. Note that reset scanning is an operation of sequentially releasing the reset state of the photoelectric conversion units of some or all rows of pixels of the pixel array 4 and setting them into a charge accumulation state, thereby starting exposure. Also, readout scanning is an operation of sequentially outputting signals based on the charges accumulated in the photoelectric conversion units of some or all rows of pixels of the pixel array 4. The vertical scanning unit 3 corresponds to a driver that outputs drive signals to the pixel array 4 to drive the pixel array 4 row by row.

[0017] The pixel array 4 has a plurality of pixel groups P(1,1) to P(m,n) arranged in n rows and m columns to form a plurality of rows and a plurality of columns. The pixel array 4 also has a plurality of vertical output lines vline1(1) to vline1(m) in m columns and a plurality of vertical output lines vline2(1) to vline2(m) in m columns. In this embodiment, two vertical output lines are arranged per column, but three or more vertical output lines may be arranged per column. Here, the row direction refers to the horizontal direction in the drawing, and the column direction refers to the vertical direction in the drawing. The subscripts in parentheses, such as for pixel group P(m,n), indicate the column number and row number, respectively. The subscripts in parentheses, such as for vertical output line vline1(m), indicate the column number. The row number of the topmost row in FIG. 1 is the first row, and the column number of the leftmost column in FIG. 1 is the first column. Note that if it is not necessary to indicate the column and row numbers, the subscripts indicating the column and row numbers may be omitted. In this embodiment, one pixel group P includes two unit pixels. The configuration of a unit pixel will be described later.

[0018] Each of the plurality of pixel groups P includes a photoelectric conversion unit configured with a photoelectric conversion element such as a photodiode (hereinafter sometimes referred to as "PD"), and outputs a pixel signal according to the amount of incident light. Note that the pixel array 4 may also include optical black pixels whose photoelectric conversion units are shielded from light, dummy pixels that do not output signals, and the like, in addition to effective pixels that output pixel signals according to the amount of incident light.

[0019] The column circuit unit 5 may include an amplifier circuit, an analog-to-digital conversion circuit, and a memory. Each of these circuits may be arranged corresponding to each of the vertical output lines vline1(1) to vline1(m) and vline2(1) to vline2(m). The column circuit unit 5 amplifies signals read from the pixel array 4, performs analog-to-digital conversion, and stores the signals in memory as digital signals.

[0020] The horizontal scanning unit 6 is a scanning circuit including a shift register, a gate circuit, a buffer circuit, etc. Upon receiving a control signal from the control unit 2, the horizontal scanning unit 6 sequentially scans the signals held in the memory of the column circuit unit 5 and outputs them to the digital signal processing unit 7.

[0021] The digital signal processing unit 7 performs digital signal processing on the signal output from the horizontal scanning unit 6. An example of the digital signal processing performed by the digital signal processing unit 7 is processing to reduce various noises generated in the pixel array 4, the column circuit unit 5, etc.

[0022] The signal output unit 8 includes a digital processing unit, a parallel-serial conversion circuit, and an output circuit such as LVDS (Low Voltage Differential Signaling), etc. The signal output unit 8 digitally processes the signal output from the digital signal processing unit 7 and outputs it as serial data to the outside of the imaging device.

[0023] 2 is a block diagram showing an example of the configuration of the vertical scanning unit 3 and pixel array 4 according to this embodiment. FIG. 2 shows signals input to the pixel array 4 in more detail.

[0024] The vertical scanning unit 3 outputs selection signals PSEL(1) to PSEL(n) and reset signals PRES(1) to PRES(n) to the pixel array 4. The vertical scanning unit 3 also outputs transfer signals PTX1a(1) to PTX1a(n), transfer signals PTX1b(1) to PTX1b(n), transfer signals PTX2a(1) to PTX2a(n), and transfer signals PTX2b(1) to PTX2b(n) to the pixel array 4. These control signals are supplied to the plurality of pixel groups P in the corresponding rows via control lines arranged corresponding to each row of the plurality of pixel groups P. Note that the subscripts in these parentheses indicate the row numbers.

[0025] Each of the pixel groups P in the pixel array 4 is electrically connected to a pixel power supply line VCC. Each of the pixel groups P is also electrically connected to a vertical output line vline1 or a vertical output line vline2. In the example of Fig. 2, each of the pixel groups P in odd-numbered rows is electrically connected to the vertical output line vline1, and each of the pixel groups P in even-numbered rows is electrically connected to the vertical output line vline2.

[0026] Fig. 3 is a circuit diagram showing an example of the configuration of a pixel group P according to this embodiment. Four pixel groups P(j, k), P(j+1, k), P(j, k+1), and P(j+1, k+1) are extracted and shown in Fig. 3. The pixel group P(j, k) represents the pixel group P arranged in the kth row and jth column of the pixel array 4.

[0027] The pixel group P(j,k) has two unit pixels P1(j,k) (first unit pixel) and P2(j,k) (second unit pixel) arranged in two rows and one column. The unit pixels P1(j,k) and P2(j,k) are arranged in the same column and are adjacent to each other in that column. The pixel group P(j,k) also has a reset transistor M3, an amplification transistor M4, a selection transistor M5, and a floating diffusion FD. The unit pixel P1(j,k) has photoelectric conversion units PD1a and PD1b (first photoelectric conversion unit, second photoelectric conversion unit) and transfer transistors M1a and M1b. The unit pixel P2(j,k) has photoelectric conversion units PD2a and PD2b and transfer transistors M2a and M2b. The reset transistor M3, the amplification transistor M4, the selection transistor M5, and the floating diffusion FD are shared by two unit pixels P1(j,k) and P2(j,k). That is, in this embodiment, the pixel group P is configured such that four photoelectric conversion units share one floating diffusion FD. Note that the number of photoelectric conversion units sharing the floating diffusion FD is not limited to four.

[0028] Each of the photoelectric conversion units PD1a to PD2b is a photoelectric conversion element that photoelectrically converts incident light to generate and accumulate electric charges corresponding to the incident light. One microlens ML and one color filter CF are arranged on the optical path of the incident light to the photoelectric conversion units PD1a and PD1b. That is, light that passes through the microlens ML and the color filter CF is incident on the photoelectric conversion units PD1a and PD1b. In this way, the microlenses ML and the color filters CF are arranged in a plurality of rows and a plurality of columns corresponding to each of the plurality of unit pixels P1 and P2.

[0029] As shown in FIG. 3, a green color filter CF is arranged in the unit pixel P1(j,k). That is, the unit pixel P1(j,k) is a pixel sensitive to green light. Similarly, a red color filter CF is arranged in the unit pixel P2(j,k). A blue color filter CF is arranged in the unit pixel P1(j+1,k) of the pixel group P(j+1,k). A green color filter CF is arranged in the unit pixel P2(j+1,k) of the pixel group P(j+1,k). In this way, the color filters CF arranged in the unit pixels P1 and P2 in the pixel array 4 form a so-called Bayer array. The four unit pixels P1(j,k), P2(j,k), P1(j+1,k), and P2(j+1,k) form one unit of the Bayer array, and the color filters CF of the other unit pixels also form a similar repeated array.

[0030] Light that has passed through different pupil regions of the optical system is incident on the photoelectric conversion units PD1a and PD1b. A signal based on charges generated by one of the photoelectric conversion units PD1a and PD1b can be used as a focus detection signal.

[0031] Furthermore, a signal based on the charges obtained by adding the charges generated by the photoelectric conversion unit PD1a and the charges generated by the photoelectric conversion unit PD1b can be used as an image generation signal, and the focus detection signal based on the charges generated by the photoelectric conversion unit PD1b can be calculated by subtracting the focus detection signal based on the charges generated by the photoelectric conversion unit PD1a from the image generation signal.

[0032] The anodes of the photodiodes constituting the photoelectric conversion units PD1a, PD1b, PD2a, and PD2b are connected to the ground potential line. The cathode of the photodiode constituting the photoelectric conversion unit PD1a is connected to the source of the transfer transistor M1a. The cathode of the photodiode constituting the photoelectric conversion unit PD1b is connected to the source of the transfer transistor M1b. The cathode of the photodiode constituting the photoelectric conversion unit PD2a is connected to the source of the transfer transistor M2a. The cathode of the photodiode constituting the photoelectric conversion unit PD2b is connected to the source of the transfer transistor M2b.

[0033] The drains of the transfer transistors M1a, M1b, M2a, and M2b are connected to a floating diffusion FD, which is a connection node between the source of the reset transistor M3 and the gate of the amplification transistor M4. The drains of the reset transistor M3 and the amplification transistor M4 are electrically connected to the pixel power line VCC. The source of the amplification transistor M4 is connected to the drain of the selection transistor M5.

[0034] The source of the selection transistor M5 is electrically connected to a current source (not shown) via the vertical output line vline1(j). As a result, the amplification transistor M4 and the current source operate as a source follower circuit. That is, the amplification transistor M4 functions as an output unit that can output a signal corresponding to the potential of the floating diffusion FD to the vertical output line vline1(j). The floating diffusion FD includes a capacitance component (floating diffusion capacitance), and this capacitance component allows it to function as a charge storage unit.

[0035] Transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) are input to the gates of the transfer transistors M1a, M1b, M2a, and M2b, respectively, from the vertical scanning unit 3. Based on these transfer signals, the transfer transistors M1a, M1b, M2a, and M2b transfer the charges accumulated in the photoelectric conversion units PD1a, PD1b, PD2a, and PD2b, respectively, to the floating diffusion FD. That is, each of the transfer transistors M1a, M1b, M2a, and M2b functions as a charge transfer unit. The floating diffusion FD holds the transferred charges.

[0036] A reset signal PRES(k) is input to the gate of the reset transistor M3 from the vertical scanning unit 3. The reset transistor M3 resets the potential of the floating diffusion FD to a predetermined potential based on the reset signal PRES(k).

[0037] A selection signal PSEL(k) is input to the gate of the selection transistor M5 from the vertical scanning unit 3. The selection signal PSEL(k) is a signal that selects a row from which a signal is to be output, and the selection transistor M5 becomes conductive or non-conductive based on the selection signal PSEL(k). Note that each transistor becomes conductive when the control signal input to its gate is at a high level, and becomes non-conductive when the control signal is at a low level.

[0038] When the transfer transistors M1a, M1b, M2a, and M2b are non-conductive, the photoelectric conversion units PD1a, PD1b, PD2a, and PD2b are in an exposed state, accumulating charge generated by photoelectric conversion. When the transfer transistors M1a, M1b, M2a, and M2b are in a conductive state and the reset transistor M3 is in a conductive state, the photoelectric conversion units PD1a, PD1b, PD2a, and PD2b are in a non-accumulation state, i.e., a reset state, in which no charge is accumulated. When any of the transfer transistors M1a, M1b, M2a, and M2b is in a conductive state and the reset transistor M3 is in a non-conductive state, the corresponding photoelectric conversion unit is in a readout state, in which charge can be transferred to the floating diffusion FD and read out.

[0039] Note that the pixel group P in the jth column is connected to either the vertical output line vline1(j) or the vertical output line vline2(j) in the jth column. In the example of FIG. 3, the pixel group P(j,k) is connected to the vertical output line vline1(j), and the pixel group P(j,k+1) is connected to the vertical output line vline2(j). In this manner, in this embodiment, the pixel group P is connected alternately to the vertical output line vline1 and the vertical output line vline2 every two rows. The connection relationship between the pixel group P and the vertical output lines vline1 and vline2 is not limited to this, and may be modified as appropriate depending on, for example, the number of vertical output lines.

[0040] In this embodiment, each transistor is an N-channel MOS transistor, but it may be a P-channel MOS transistor, in which case the level of each control signal may be changed as appropriate.

[0041] In addition, although the color filters CF are arranged in a Bayer pattern in this embodiment, the arrangement of the color filters CF is not limited to this. For example, the arrangement of the color filters CF may be a quad-Bayer pattern.

[0042] FIG. 4 is a schematic diagram showing a ranging area set in the pixel array 4 according to this embodiment. As shown in FIG. 4, the pixel array 4 is divided into a first area, a second area, or a third area for each row. The second area in FIG. 4 indicates the ranging area from which focus detection signals are read out. The ranging area may be variable, and in that case, the range of the ranging area may be set by the CPU 1. Once the range of the ranging area is set by the CPU 1, the control unit 2 and the vertical scanning unit 3 generate a drive signal and supply it to the pixel array 4 so that the set range becomes the ranging area. Then, an area other than the ranging area is set as the first area or the third area. The third area is disposed between the first area and the second area.

[0043] Image generation signals 1a1b and 2a2b are read out from the pixel group P included in the first region, but focus detection signals are not read out. Hereinafter, the operation of reading out image generation signals from the first region will be referred to as first mode operation. Focus detection signals 1a, image generation signals 1a1b, focus detection signals 2a, and image generation signals 2a2b are read out from the pixel group P included in the second region. Hereinafter, the operation of reading out focus detection signals and image generation signals from the second region will be referred to as second mode operation. For the pixel group P included in the third region, operation in the first mode is performed for some rows, and operation in the second mode is performed for some other rows. Note that the region operating in the first mode and the region operating in the second mode may be different between multiple frames. For example, a region that operates in the first mode in one frame may operate in the second mode in another frame. Alternatively, in one frame, a portion of the pixel array 4 may operate in the first mode, another portion of the pixel array 4 may operate in the second mode, and in another frame, all of the pixel array 4 may operate in only one of the first mode and the second mode.

[0044] Figures 5(a), 5(b), 6(a), and 6(b) are timing diagrams showing the reset and readout operations of pixel group P(j,k). Figure 5(a) shows the first mode operation in the first region of Figure 4, and Figure 5(b) shows the second mode operation in the second region of Figure 4. Figures 6(a) and 6(b) show the mixed first and second mode operation in the third region of Figure 4.

[0045] Figures 5(a), 5(b), 6(a) and 6(b) show changes over time in the horizontal synchronization signal HD, the selection signal PSEL(k), the reset signal PRES(k) and the transfer signals PTX1a(k), PTX1b(k), PTX2a(k) and PTX2b(k). First, the operation of the first mode will be described with reference to Figure 5(a).

[0046] At time t10sh, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go to low level, turning off the transfer transistors M1a, M1b, M2a, and M2b.

[0047] At time t11sh, the transfer signals PTX2a(k) and PTX2b(k) go to high level. This causes the transfer transistors M2a and M2b to turn on. This action causes the charges in the photoelectric conversion units PD2a and PD2b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD2a and PD2b. Note that at time t11sh, the reset signal PRES(k) is at high level and the reset transistor M3 is in the on state, so the floating diffusion FD is also reset. Thereafter, the transfer signals PTX2a(k) and PTX2b(k) go to low level, causing the transfer transistors M2a and M2b to transition to the off state, and exposure of the photoelectric conversion units PD2a and PD2b begins.

[0048] Similarly, at time t12sh, the transfer signals PTX1a(k) and PTX1b(k) go to high level. This causes the transfer transistors M1a and M1b to turn on. This operation causes the charges in the photoelectric conversion units PD1a and PD1b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD1a and PD1b. Note that at t12sh, the reset signal PRES(k) is at high level and the reset transistor M3 is in the on state, so the floating diffusion FD is also reset. Thereafter, the transfer signals PTX1a(k) and PTX1b(k) go to low level, causing the transfer transistors M1a and M1b to transition to the off state, and exposure of the photoelectric conversion units PD1a and PD1b begins.

[0049] At time t10rd, the selection signal PSEL(k) goes high, turning on the selection transistor M5. This connects the floating diffusion FD and the vertical output line vline1, and readout begins.

[0050] At time t11rd, the reset signal PRES(k) goes low, turning off the reset transistor M3. This action releases the reset of the floating diffusion FD.

[0051] At time t12rd, the transfer signal PTX2a(k) goes high, turning on the transfer transistor M2a. This operation transfers charge corresponding to the focus detection signal 2a from the photoelectric conversion unit PD2a to the floating diffusion FD.

[0052] Also, at the same time t12rd, the transfer signal PTX2b(k) goes high. This turns on the transfer transistor M2b. This operation transfers charges corresponding to the focus detection signal 2b from the photoelectric conversion unit PD2b to the floating diffusion FD. The charges corresponding to the focus detection signal 2a and the charges corresponding to the focus detection signal 2b are added together in the floating diffusion FD. An image generation signal 2a2b based on the charges thus added is read out via the vertical output line vline1. Note that although the pixel group P(j,k) is assumed to be connected to the vertical output line vline1, it may also be connected to the vertical output line vline2 depending on the row number, as described above.

[0053] At time t13rd, the reset signal PRES(k) goes high, which turns on the reset transistor M3. This resets the floating diffusion FD.

[0054] At time t14rd, the selection signal PSEL(k) goes low, turning off the selection transistor M5, and completing the readout of the signal from the unit pixel P2 to the vertical output line vline1.

[0055] At time t15rd, the selection signal PSEL(k) goes high, which turns on the selection transistor M5 again. This operation connects the floating diffusion FD and the vertical output line vline1, and readout begins.

[0056] At time t16rd, the reset signal PRES(k) goes low, which turns the reset transistor M3 off again. This action releases the reset of the floating diffusion FD.

[0057] At time t17rd, the transfer signal PTX1a(k) goes high, turning on the transfer transistor M1a. This operation transfers charge corresponding to the focus detection signal 1a from the photoelectric conversion unit PD1a to the floating diffusion FD.

[0058] Also, at the same time t17rd, the transfer signal PTX1b(k) goes high. This turns on the transfer transistor M1b. This operation transfers charges corresponding to the focus detection signal 1b from the photoelectric conversion unit PD1b to the floating diffusion FD. The charges corresponding to the focus detection signal 1a and the charge corresponding to the focus detection signal 1b are added together in the floating diffusion FD. An image generation signal 1a1b based on the charges thus added is read out via the vertical output line vline1.

[0059] At time t18rd, the reset signal PRES(k) goes high. This turns the reset transistor M3 on again. This action resets the floating diffusion FD.

[0060] At time t19rd, the selection signal PSEL(k) goes low, turning the selection transistor M5 off again, and this operation ends the readout of the signal from the unit pixel P1 to the vertical output line vline1.

[0061] Finally, at time t20rd, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go high, turning on the transfer transistors M1a, M1b, M2a, and M2b.

[0062] This completes the readout operation of pixel group P in the kth row in the first mode. Operation in the first mode is performed in units of one horizontal synchronization signal. In operation in the first mode, image generation signals 2a2b and 1a1b are read out sequentially, but focus detection signals are not read out.

[0063] Next, the operation of the second mode will be described with reference to Fig. 5(b). Note that the operations of the reset signal PRES(k) and the selection signal PSEL(k) are generally similar to those in Fig. 5(a), and therefore will not be described here.

[0064] At time t21sh, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go to low level, turning off the transfer transistors M1a, M1b, M2a, and M2b.

[0065] At time t22sh, the transfer signal PTX2a(k) goes high. This turns on the transfer transistor M2a. This operation causes the charge in the photoelectric conversion unit PD2a to be discharged to the floating diffusion FD, resetting the photoelectric conversion unit PD2a.

[0066] At time t23sh, the transfer signals PTX2a(k) and PTX2b(k) go to high level. This causes the transfer transistors M2a and M2b to turn on. This action causes the charges in the photoelectric conversion units PD2a and PD2b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD2a and PD2b. Thereafter, the transfer signals PTX2a(k) and PTX2b(k) go to low level, causing the transfer transistors M2a and M2b to transition to the off state, and exposure of the photoelectric conversion units PD2a and PD2b begins.

[0067] At time t24sh, the transfer signal PTX1a(k) goes high, turning on the transfer transistor M1a. This causes the charge in the photoelectric conversion unit PD1a to be discharged to the floating diffusion FD, resetting the photoelectric conversion unit PD1a.

[0068] At time t25sh, the transfer signals PTX1a(k) and PTX1b(k) go to high level. This causes the transfer transistors M1a and M1b to turn on. This action causes the charges in the photoelectric conversion units PD1a and PD1b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD1a and PD1b. After that, the transfer signals PTX1a(k) and PTX1b(k) go to low level, causing the transfer transistors M1a and M1b to transition to the off state, and exposure of the photoelectric conversion units PD1a and PD1b begins.

[0069] At time t21rd, the transfer signal PTX2a(k) goes high. This turns on the transfer transistor M2a. This operation transfers charge corresponding to the focus detection signal 2a from the photoelectric conversion unit PD2a to the floating diffusion FD. The focus detection signal 2a is then read out via the vertical output line vline1.

[0070] At time t22rd, the transfer signals PTX2a(k) and PTX2b(k) go high. This turns on the transfer transistors M2a and M2b. This operation causes the charges corresponding to the focus detection signal 2b to be further transferred from the photoelectric conversion unit PD2b to the floating diffusion FD. The charges corresponding to the focus detection signal 2a and the charges corresponding to the focus detection signal 2b are added together in the floating diffusion FD. The image generation signal 2a2b based on the charges thus added is read out via the vertical output line vline1.

[0071] At time t23rd, the transfer signal PTX1a(k) goes high. This turns on the transfer transistor M1a. This operation transfers charge corresponding to the focus detection signal 1a from the photoelectric conversion unit PD1a to the floating diffusion FD. The focus detection signal 1a is then read out via the vertical output line vline1.

[0072] At time t24rd, the transfer signals PTX1a(k) and PTX1b(k) go high. This turns on the transfer transistors M1a and M1b. This operation causes the charge corresponding to the focus detection signal 1b to be further transferred from the photoelectric conversion unit PD1b to the floating diffusion FD. The charge corresponding to the focus detection signal 1a and the charge corresponding to the focus detection signal 1b are added together in the floating diffusion FD. The image generation signal 1a1b based on the charges thus added is read out via the vertical output line vline1.

[0073] Finally, at time t25rd, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go high, turning on the transfer transistors M1a, M1b, M2a, and M2b.

[0074] This completes the readout operation of pixel group P in the kth row in the second mode. Operation in the second mode is performed in units of two horizontal synchronization signals. In the second mode operation, focus detection signal 2a, image generation signal 2a2b, focus detection signal 1a, and image generation signal 1a1b are read out sequentially.

[0075] Next, operation in the third mode will be described with reference to Figures 6(a) and 6(b). Figures 6(a) and 6(b) show two types of operation in the third mode. In a first example shown in Figure 6(a), a row of unit pixels P1 to which transfer signals PTX1a(k) and PTX1b(k) are input operates in the second operation mode, and a row of unit pixels P2 to which transfer signals PTX2a(k) and PTX2b(k) are input operates in the first operation mode. On the other hand, in a second example shown in Figure 6(b), a row of unit pixels P1 to which transfer signals PTX1a(k) and PTX1b(k) are input operates in the first operation mode, and a row of unit pixels P2 to which transfer signals PTX2a(k) and PTX2b(k) are input operates in the second operation mode.

[0076] First, a first example of the operation in the third mode will be described with reference to FIG. 6(a). At time t26sh, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go to low level, turning off the transfer transistors M1a, M1b, M2a, and M2b.

[0077] At time t27sh, the transfer signals PTX2a(k) and PTX2b(k) go to high level. This causes the transfer transistors M2a and M2b to turn on. This action causes the charges in the photoelectric conversion units PD2a and PD2b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD2a and PD2b. After that, the transfer signals PTX2a(k) and PTX2b(k) go to low level, causing the transfer transistors M2a and M2b to transition to the off state, and exposure of the photoelectric conversion units PD2a and PD2b begins.

[0078] At time t28sh, the transfer signal PTX1a(k) goes high, turning on the transfer transistor M1a. This causes the charge in the photoelectric conversion unit PD1a to be discharged to the floating diffusion FD, resetting the photoelectric conversion unit PD1a.

[0079] At time t29sh, the transfer signals PTX1a(k) and PTX1b(k) go to high level. This causes the transfer transistors M1a and M1b to turn on. This action causes the charges in the photoelectric conversion units PD1a and PD1b to be discharged to the floating diffusion FD, resetting the photoelectric conversion units PD1a and PD1b. After that, the transfer signals PTX1a(k) and PTX1b(k) go to low level, causing the transfer transistors M1a and M1b to transition to the off state, and exposure of the photoelectric conversion units PD1a and PD1b begins.

[0080] At time t26rd, the transfer signal PTX2a(k) goes high, turning on the transfer transistor M2a. This operation transfers charge corresponding to the focus detection signal 2a from the photoelectric conversion unit PD2a to the floating diffusion FD.

[0081] Also, at the same time t26rd, the transfer signal PTX2b(k) goes high. This turns on the transfer transistor M2b. This operation transfers charges corresponding to the focus detection signal 2b from the photoelectric conversion unit PD2b to the floating diffusion FD. The charges corresponding to the focus detection signal 2a and the charges corresponding to the focus detection signal 2b are added together in the floating diffusion FD. An image generation signal 2a2b based on the charges thus added is read out via the vertical output line vline1.

[0082] At time t27rd, the transfer signal PTX1a(k) goes high. This turns on the transfer transistor M1a. This operation transfers charge corresponding to the focus detection signal 1a from the photoelectric conversion unit PD1a to the floating diffusion FD. The focus detection signal 1a is then read out via the vertical output line vline1.

[0083] At time t28rd, the transfer signals PTX1a(k) and PTX1b(k) go high. This turns on the transfer transistors M1a and M1b. This operation causes the charge corresponding to the focus detection signal 1b to be further transferred from the photoelectric conversion unit PD1b to the floating diffusion FD. The charge corresponding to the focus detection signal 1a and the charge corresponding to the focus detection signal 1b are added together in the floating diffusion FD. The image generation signal 1a1b based on the charges thus added is read out via the vertical output line vline1.

[0084] Finally, at time t29rd, the transfer signals PTX1a(k), PTX1b(k), PTX2a(k), and PTX2b(k) go high, turning on the transfer transistors M1a, M1b, M2a, and M2b.

[0085] This completes the readout operation of the pixel group P in the kth row in the first example of the third mode. In the operation of the first example of the third mode, the image generation signals 2a2b, the focus detection signals 1a, and the image generation signals 1a1b are read out sequentially, but the focus detection signal 2a is not read out.

[0086] Next, a second example of operation in the third mode will be described with reference to Fig. 6(b). In the first example of Fig. 6(a), the row of unit pixels P1 operates in the second operation mode and the row of unit pixels P2 operates in the first operation mode, whereas in the second example of Fig. 6(b), the row of unit pixels P1 operates in the first operation mode and the row of unit pixels P2 operates in the second operation mode. Since the other points are the same, the description of the second example will be appropriately simplified.

[0087] At time t32sh, exposure of the photoelectric conversion units PD2a and PD2b starts, and at time t33sh, exposure of the photoelectric conversion units PD1a and PD1b starts.

[0088] At time t30rd, charges corresponding to the focus detection signal 2a are transferred from the photoelectric conversion unit PD2a to the floating diffusion FD, and the focus detection signal 2a is read out via the vertical output line vline1.

[0089] At time t31rd, charges corresponding to focus detection signal 2b are further transferred from photoelectric conversion unit PD2b to floating diffusion FD. Charges corresponding to focus detection signal 2a and charge corresponding to focus detection signal 2b are added together in floating diffusion FD. Image generation signal 2a2b based on the charges thus added is read out via vertical output line vline1.

[0090] At time t32rd, charges corresponding to focus detection signal 1a are transferred from photoelectric conversion unit PD1a to floating diffusion FD, and charges corresponding to focus detection signal 1b are transferred from photoelectric conversion unit PD1b to floating diffusion FD. The charges corresponding to focus detection signal 1a and the charges corresponding to focus detection signal 1b are added together in floating diffusion FD. An image generation signal 1a1b based on the charges added in this manner is read out via vertical output line vline1.

[0091] This completes the readout operation of the pixel group P in the kth row in the second example of the third mode. In the operation of the first example of the third mode, the focus detection signal 2a, the image generation signal 2a2b, and the image generation signal 1a1b are read out sequentially, but the focus detection signal 1a is not read out.

[0092] 7 is a timing diagram showing vertical scanning of the reset operation and readout operation in the pixel array 4 according to this embodiment. Fig. 7 schematically shows the row number of the pixel group P, the PD number in each pixel group, the vertical output line number from which a signal is output, the first to third regions, the timing of the reset operation and readout operation, etc.

[0093] In the table of FIG. 7, the vertical direction indicates the row position in the pixel array 4, and the horizontal direction indicates time. In the "PD number" in FIG. 7, "1" indicates unit pixel P1, and "2" indicates unit pixel P2. In the "vertical output line number" in FIG. 7, "1" indicates that a signal is output to the vertical output line vline1, and "2" indicates that a signal is output to the vertical output line vline2. "VD" and "HD" indicate the input timing of pulses of the vertical synchronization signal VD and the horizontal synchronization signal HD, respectively. "P" to "P+36" indicate the operation timing in units of the horizontal synchronization signal HD. In the table of FIG. 7, hatched boxes indicate unit pixels for which one of a reset operation, a focus detection signal readout operation, and an image generation signal readout operation is performed, and the timing of the operation.

[0094] At timing P+16, an image generation signal 1a1b is read out to the vertical output line vline1 from unit pixel P1(j,1) in the first region, which has row number 1 and PD number 1. At the same time, an image generation signal 2a2b is read out to the vertical output line vline2 from unit pixel P2(j,2) in the first region, which has row number 2 and PD number 2. At timing P+1, a reset operation corresponding to the read operation at timing P+16 is performed. That is, at timing P+1, unit pixel P1(j,1) with row number 1 and PD number 1 and unit pixel P2(j,2) with row number 2 and PD number 2 are reset.

[0095] The operation for the unit pixels P1 and P2 included in the first region is performed in units of one horizontal synchronization signal, and the row number and PD number of the unit pixel to be processed transition as shown in Fig. 5(a). On the other hand, the operation for the unit pixels P1 and P2 included in the second region is performed in units of two horizontal synchronization signals, and the row number and PD number of the unit pixel to be processed transition as shown in Fig. 5(b).

[0096] Focusing on unit pixel P2(j,5) in the second region, which has row number 5 and PD number 2, the focus detection signal 2a is read out at timing P+19, and the image generation signal 2a2b is read out at timing P+20. Here, attention is focused on the operations at timing P+19 and timing P+20.

[0097] At timing P+19, a focus detection signal 1a is read out to the vertical output line vline2 from unit pixel P1(j,4) in the third region, which has row number 4 and PD number 1. At the same time, a focus detection signal 2a is read out to the vertical output line vline1 from unit pixel P2(j,5) in the second region, which has row number 5 and PD number 2. All of these operations are in the second mode.

[0098] At timing P+20, an image generation signal 1a1b is read out to vertical output line vline2 from unit pixel P1(j,4) in the third region, which has row number 4 and PD number 1. At the same time, an image generation signal 2a2b is read out to vertical output line vline1 from unit pixel P2(j,5) in the second region, which has row number 5 and PD number 2. Both of these operations are in the second mode.

[0099] In the third region having row number 4, unit pixel P1(j,4) having PD number 1 operates in the second mode, and unit pixel P2(j,4) having PD number 2 operates in the first mode. This allows the operation of unit pixel P1(j,4) in the third region to be synchronized with the operation of unit pixel P2(j,5) in the second region at timings P+19 and P+20.

[0100] 7 is replaced with the first region. Therefore, the time required to read out the pixel array 4 is the same whether the third region is not provided or not. Therefore, even if the third region is provided as in this embodiment, the readout time does not increase compared to when the third region is not provided.

[0101] 8 and 9 are timing diagrams showing the reset operation and read operation in each region, and are timing diagrams summarizing the reset operation and read operation shown in Figures 4 to 7, focusing on the transition of the region to be operated on.

[0102] 8 and 9 show timing charts of three consecutive rows (rows k1 to k1+2 or rows k2 to k2+2) including the first to third regions, arranged in transition order. The signal timing in each timing chart is the same as that shown in FIGS. 5A to 6B, and therefore a description thereof will be omitted. Also, FIGS. 8 and 9 show the signals and regions that are the targets of the reset operation and readout operation. In the "signal" in FIGS. 8 and 9, "a" indicates a focus detection signal, and "ab" indicates an image generation signal. Also, the "region" in FIGS. 8 and 9 indicates the target region of the reset operation or readout operation.

[0103] 8 shows an example in which, in vertical scanning of three consecutive rows (row k1, row k1+1, and row k1+2), the target area transitions in the order of area 1, area 3, and area 2. This example corresponds to rows 3 to 5 in FIG.

[0104] Time t34sh indicates the time when the reset operation switches from the first mode to the second mode. The reset operation is performed in the first mode before time t34sh, and the reset operation is performed in the second mode after time t34sh.

[0105] As shown in the "Reset Operation" column in Fig. 8, time t34sh is a time during the operation for the third region. This indicates that the reset operation for pixel group P in the third region is a mixture of reset operations in the first mode and reset operations in the second mode.

[0106] Time t34rd indicates the time when the read operation switches from the first mode to the second mode. Before time t34rd, the read operation is performed in the first mode, and after time t34sh, the read operation is performed in the second mode.

[0107] As shown in the "Readout Operation" column in Fig. 8, time t34rd is a time during the operation for the third region. This indicates that the readout operation for pixel group P in the third region is a mixture of readout operations in the first mode and readout operations in the second mode.

[0108] 9 shows an example in which, in vertical scanning of three consecutive rows (rows k2, k2+1, and k2+2), the target area transitions in the order of area 2, area 3, and area 1. This example corresponds to rows 6 to 8 in FIG.

[0109] Time t35sh indicates the time when the reset operation switches from the second mode to the first mode. The reset operation is performed in the second mode before time t35sh, and in the first mode after time t35sh.

[0110] 9, time t35sh is a time during the operation for the third region. This indicates that the reset operation for pixel group P in the third region is a mixture of reset operations in the first mode and reset operations in the second mode.

[0111] Time t35rd indicates the time when the read operation switches from the second mode to the first mode. Before time t35rd, the read operation is performed in the second mode, and after time t35sh, the read operation is performed in the first mode.

[0112] 9, time t35rd is a time during the operation for the third region. This indicates that the readout operation for pixel group P in the third region includes a mixture of readout operations in the first mode and readout operations in the second mode.

[0113] As another example of a configuration in which the pixel array 4 includes a first region in which image generation signals are read out in the first mode and a second region in which focus detection signals and image generation signals are read out in the second mode, a configuration without the third region of this embodiment is also possible. For example, replacing the third region with the first region in FIG. 7 can be modified to a configuration without the third region. However, such a configuration results in a driving method in which the readout operation of the focus detection signals and the readout operation of the image generation signals are performed simultaneously at the readout timing near the boundary between the first and second regions. In this case, the readout operation of the image generation signals may affect the quality of the focus detection signals obtained at the same time, potentially reducing the accuracy of focus detection.

[0114] In contrast, in this embodiment, a third region is disposed between the first and second regions, in which readout operations in the first mode and readout operations in the second mode are mixed. As a result, as shown in FIG. 7 , the readout operations performed simultaneously are either only readout operations of image generation signals or only readout operations of focus detection signals. In other words, a driving method is realized in which the readout operations of focus detection signals and image generation signals are not performed simultaneously during the transition between the first and second regions. Furthermore, with this driving method, the time required to read out the pixel array 4 is the same whether the third region is not provided or is provided. Therefore, the readout time does not increase.

[0115] Therefore, according to this embodiment, a photoelectric conversion device is provided that can obtain focus detection signals with good accuracy while suppressing an increase in readout time.

[0116] [Second embodiment] An imaging device according to a second embodiment will be described with reference to Fig. 10 and Fig. 11. In this embodiment, the number of vertical output lines per column in the pixel array 4 is different from that in the first embodiment. In this embodiment, descriptions of elements common to the first embodiment may be omitted or simplified.

[0117] FIG. 10 is a circuit diagram showing an example of the configuration of a pixel group P included in a pixel array 4 according to this embodiment. FIG. 10 shows eight pixel groups P(j, k), P(j+1, k), P(j, k+1), P(j+1, k+1), P(j, k+2), P(j+1, k+2), P(j, k+3), and P(j+1, k+3). The pixel group P(j, k) represents the pixel group P arranged in the kth row and jth column of the pixel array 4. In addition to the configuration of the pixel array 4 according to the first embodiment, the pixel array 4 according to this embodiment has a vertical output line vline3 and a vertical output line vline4 for each column, with four vertical output lines arranged in one column. Note that although microlenses ML are not shown in FIG. 10, it is assumed that the same microlenses ML as those in FIG. 3 are arranged.

[0118] The pixel group P in the jth column is connected to any one of the vertical output lines vline1(j) to vline4(j) in the jth column. In the example of FIG. 10, the pixel group P(j,k) is connected to the vertical output line vline1(j), and the pixel group P(j,k+1) is connected to the vertical output line vline2(j). Furthermore, the pixel group P(j,k+2) is connected to the vertical output line vline3(j), and the pixel group P(j,k+3) is connected to the vertical output line vline4(j). In this way, in this embodiment, the pixel groups P are connected to the vertical output lines vline1 to vline4 in a cycle of four rows.

[0119] 11 is a timing diagram showing vertical scanning of the reset operation and readout operation in the pixel array 4 according to this embodiment. In FIG. 11, the order of the reset operation, focus detection signal readout operation, and image generation signal readout operation in each region is generally the same as in FIG. 7 of the first embodiment. However, due to changes in the number of vertical output lines, etc., the ranges of the first region, second region, and third region in FIG. 11 have been changed from those in FIG. 7 of the first embodiment.

[0120] In this embodiment, the third region includes two rows of pixel groups P. For example, in Fig. 11, two rows of pixel groups P with row numbers 5 and 6 belong to the third region.

[0121] In the first embodiment, the third region includes one row of pixel groups P (i.e., two rows of unit pixels P1 and P2), but in the second embodiment, the third region includes two rows of pixel groups P (i.e., four rows of unit pixels P1 and P2). Thus, depending on the number of vertical output lines, the third region may include multiple rows of pixel groups P.

[0122] In this embodiment, as in the first embodiment, a third region is disposed between the first and second regions, in which readout operations in the first mode and readout operations in the second mode are mixed. This realizes a driving method in which, as shown in FIG. 11 , the readout operations of focus detection signals and image generation signals are not performed simultaneously during the transition between the first and second regions. Therefore, as in the first embodiment, this embodiment also provides a photoelectric conversion device capable of acquiring focus detection signals with high accuracy while suppressing an increase in readout time. Furthermore, since the number of vertical output lines arranged in one column in this embodiment is greater than in the first embodiment, readout speed can be increased.

[0123] In the first embodiment, the number of vertical output lines arranged in one column is exemplified as two, and in the second embodiment, the number of vertical output lines arranged in one column is exemplified as four. However, the number of vertical output lines is not limited to these. That is, the number of vertical output lines arranged in one column may be two, three, four or more.

[0124] [Third embodiment] An imaging device according to a third embodiment will be described with reference to Fig. 12, Fig. 13, and Fig. 14. In this embodiment, the configuration of the imaging device is different from that of the first embodiment. In this embodiment, descriptions of elements common to the first embodiment may be omitted or simplified.

[0125] 12 is a block diagram showing an example of the configuration of an imaging device according to this embodiment. The imaging device of this embodiment further includes a line memory unit 9 in addition to the configuration of the imaging device of the first embodiment. As shown in FIG. 12, a digital signal processing unit 7 (first processing unit) is arranged in the previous stage of the line memory unit 9, and a signal output unit 8 is arranged in the subsequent stage of the line memory unit 9. That is, the output signal of the digital signal processing unit 7 is input to the line memory unit 9, and the output signal of the line memory unit 9 is input to the signal output unit 8.

[0126] 13 is a timing diagram showing vertical scanning of the reset operation and readout operation in the pixel array 4 according to this embodiment. In Fig. 13, the arrangement of each area, the timing of the reset operation, the focus detection signal readout operation, and the image generation signal readout operation, etc. are the same as those in Fig. 7 of the first embodiment, and therefore description thereof will be omitted.

[0127] When reading out signals from the third region, an operation may occur in which one of the two unit pixels in one pixel group P outputs a focus detection signal, while the other unit pixel does not output a focus detection signal. Therefore, there may be cases in which focus detection signal 1a and focus detection signal 2a are not output as a pair from one pixel group P arranged in the third region. In Figure 13, the acquisition timing of such unpaired focus detection signals is indicated by a dashed circle.

[0128] For example, a focus detection signal 1a is read out from unit pixel P1(j,4) in the first region, which has row number 4 and PD number 1. However, a focus detection signal 2a is not read out from unit pixel P2(j,4), which is paired with unit pixel P1(j,4). Therefore, the output signals from pixel group P(j,4) do not include both focus detection signal 1a and focus detection signal 2a. Such unpaired focus detection signal 1a may not provide sufficient focus detection accuracy, and may therefore not be used in subsequent focus detection processing. The line memory unit 9 in this embodiment has a function of thinning out and outputting such unpaired focus detection signals.

[0129] Fig. 14 is a timing diagram showing data input / output to / from the line memory unit 9 according to this embodiment. Fig. 14 schematically shows changes over time in input data to the line memory unit 9, data held in the line memory unit 9, and output data from the line memory unit 9.

[0130] 14 is the timing at which the reset operation is performed at timing P in FIG. 13, and the output data of the unit pixel P2(j,1) read out at timing P+15 thereafter is input to the line memory unit 9.

[0131] In Fig. 14, notations such as "1-1" indicate the row number and the PD number, respectively. That is, "1-1" indicates output data from unit pixel P1(j,1) whose row number is 1 and PD number is 1. "1-2" indicates output data from unit pixel P2(j,1) whose row number is 1 and PD number is 2. Also in Fig. 14, "a" indicates a focus detection signal, and "ab" indicates an image generation signal. In Fig. 14, as in Fig. 13, focus detection signals that are not paired are indicated by dashed circles.

[0132] The line memory unit 9 has two data input paths (lanes). Data output from the pixel group P via the vertical output line vline1 is input from the digital signal processing unit 7 to the first lane of the line memory unit 9. Data output from the pixel group P via the vertical output line vline2 is input from the digital signal processing unit 7 to the second lane of the line memory unit 9. Input to the first lane and input to the second lane can occur in parallel.

[0133] The number of lanes in the line memory unit 9 is not limited to two. The number of lanes in the line memory unit 9 may be one, or may be three or more. Furthermore, it is not essential that the input data to the line memory unit 9 be grouped by vertical output line, and the data may be grouped by PD number, for example.

[0134] The line memory unit 9 has two line memories. Data input to the line memory unit 9 is written to the first line memory and the second line memory. Data with a PD number of 1 is written to the first line memory, and data with a PD number of 2 is written to the second line memory. At this stage, unpaired focus detection signals are also written to the first or second line memory, just like other signals.

[0135] The line memory unit 9 has two data output paths (lanes). Data in the first line memory is output to the outside from the first lane of the line memory unit 9 via the signal output unit 8. Data in the second line memory is output to the outside from the second lane of the line memory unit 9 via the signal output unit 8. Output from the first lane and output from the second lane can be performed in parallel.

[0136] When data is read from the first line memory and the second line memory, unpaired focus detection signals are not output. This operation can be achieved by erasing data of unpaired focus detection signals written to the first line memory and the second line memory. Note that erasing the data is not essential. For example, the line memory that holds the data can be deselected to prevent signals from being read from that line memory. The data held in the deselected line memory can then be overwritten by writing the next data.

[0137] Furthermore, when data is read from the second line memory, the timing of reading out some of the input data is appropriately delayed so that data for the same pixel group P is output at the same timing. This makes it possible to align the data so that data for the same pixel group P that is read out at different times is output together.

[0138] Here, when attention is paid to timing Q+4 and timing Q+13, data of non-paired focus detection signals is thinned out, so that no data is output from the line memory unit 9 at these timings.

[0139] As described above, in this embodiment, as in the first embodiment, a photoelectric conversion device is provided that can acquire focus detection signals with high accuracy while suppressing increases in readout time. Furthermore, in this embodiment, the line memory unit 9 is provided, and data is aligned so that data of the same pixel group P that is read out at different times is output together. In this process, data of non-paired focus detection signals is thinned out and output from the line memory unit 9, thereby reducing the amount of data to be output. This has the effect of reducing power consumption.

[0140] If focus detection signals are thinned out before digital signal processing, the continuity of the signal processing target will be lost due to data loss. In contrast, in this embodiment, focus detection signals are thinned out after digital signal processing by the digital signal processor 7. In other words, data of focus detection signals that are not pairs is not thinned out at the digital signal processing stage, so processing can be performed in the order in which the signals are output by vertical scanning.

[0141] [Fourth embodiment] An imaging device according to a fourth embodiment will be described with reference to Fig. 15. This embodiment is a modified example of the configuration of the digital signal processing unit 7 of the third embodiment. In this embodiment, the description of elements common to the first embodiment may be omitted or simplified.

[0142] FIG. 15 is a block diagram showing an example of the configuration of an imaging device according to this embodiment. In the imaging device of this embodiment, the digital signal processing unit 7 in the third embodiment is divided into a first digital signal processing unit 7-1 (first processing unit) and a second digital signal processing unit 7-2 (second processing unit). The processing performed by the first digital signal processing unit 7-1 and the second digital signal processing unit 7-2 in this embodiment may correspond to the processing performed by the digital signal processing unit 7 in the third embodiment. In other words, part of the digital signal processing performed by the digital signal processing unit 7 may be performed by the first digital signal processing unit 7-1, and the remaining part of the digital signal processing performed by the digital signal processing unit 7 may be performed by the second digital signal processing unit 7-2. In other words, the first digital signal processing unit 7-1 and the second digital signal processing unit 7-2 perform different digital signal processing.

[0143] 15, the first digital signal processing unit 7-1 is arranged in the preceding stage of the line memory unit 9, and the second digital signal processing unit 7-2 is arranged in the subsequent stage of the line memory unit 9. Furthermore, the signal output unit 8 is arranged in the subsequent stage of the second digital signal processing unit 7-2. That is, the output signal of the first digital signal processing unit 7-1 is input to the line memory unit 9, and the output signal of the line memory unit 9 is input to the second digital signal processing unit 7-2. The output signal of the second digital signal processing unit 7-2 is input to the signal output unit 8.

[0144] By arranging the line memory unit 9 upstream of the second digital signal processing unit 7-2, the second digital signal processing unit 7-2 performs digital signal processing on data obtained by thinning out non-paired focus detection signal data by the line memory unit 9. Reducing the amount of data reduces the power consumption of the second digital signal processing unit 7-2. Therefore, the power consumption of the first digital signal processing unit 7-1 and the second digital signal processing unit 7-2 in this embodiment can be reduced compared to the power consumption of the digital signal processing unit 7 in the third embodiment.

[0145] As described above, this embodiment provides a photoelectric conversion device that can achieve the same effects as those of the first and third embodiments. Furthermore, this embodiment can consume less power than the photoelectric conversion device of the third embodiment.

[0146] The first digital signal processing unit 7-1 may not be provided. In this case, digital signal processing is performed by the second digital signal processing unit 7-2 located after the line memory unit 9. This can further reduce power consumption.

[0147] [Fifth embodiment] A device according to a fifth embodiment of the present invention will be described with reference to Fig. 16. Fig. 16 is a block diagram showing a schematic configuration of the device according to this embodiment.

[0148] FIG. 16 is a schematic diagram showing equipment EQP including a photoelectric conversion device APR. The photoelectric conversion device APR has the functions of the photoelectric conversion devices of the first to fourth embodiments. All or part of the photoelectric conversion device APR is a semiconductor device IC. The photoelectric conversion device APR of this example can be used, for example, as an image sensor, an AF (Auto Focus) sensor, a photometry sensor, a distance measurement sensor, etc. The semiconductor device IC has a pixel area PX in which pixel circuits PXC including photoelectric conversion units are arranged in a matrix. The semiconductor device IC can have a peripheral area PR around the pixel area PX. Circuits other than pixel circuits can be arranged in the peripheral area PR.

[0149] The photoelectric conversion device APR may have a structure (chip stacking structure) in which a first semiconductor chip provided with a plurality of photoelectric conversion units and a second semiconductor chip provided with peripheral circuits are stacked. The peripheral circuits in the second semiconductor chip may be column circuits corresponding to the pixel columns of the first semiconductor chip. The peripheral circuits in the second semiconductor chip may also be matrix circuits corresponding to the pixels or pixel blocks of the first semiconductor chip. The first and second semiconductor chips may be connected by through-silicon vias (TSVs), inter-chip wiring formed by direct bonding of a conductor such as copper, connection by microbumps between chips, connection by wire bonding, or the like.

[0150] The photoelectric conversion device APR may include, in addition to the semiconductor device IC, a package PKG that houses the semiconductor device IC. The package PKG may include a base to which the semiconductor device IC is fixed, a cover such as glass that faces the semiconductor device IC, and connecting members such as bonding wires and bumps that connect terminals provided on the base to terminals provided on the semiconductor device IC.

[0151] The equipment EQP may further include at least one of an optical device OPT, a control device CTRL, a processing device PRCS, a display device DSPL, a memory device MMRY, and a mechanical device MCHN. The optical device OPT corresponds to the photoelectric conversion device APR as a photoelectric conversion device, and is, for example, a lens, a shutter, or a mirror. The control device CTRL controls the photoelectric conversion device APR and is, for example, a semiconductor device such as an ASIC. The processing device PRCS processes signals output from the photoelectric conversion device APR and constitutes an AFE (analog front end) or a DFE (digital front end). The processing device PRCS is a semiconductor device such as a CPU (central processing unit) or an ASIC (application-specific integrated circuit). The display device DSPL is, for example, an EL display device or a liquid crystal display device that displays information (images) obtained by the photoelectric conversion device APR. The memory device MMRY is, for example, a magnetic device or a semiconductor device that stores information (images) obtained by the photoelectric conversion device APR. The memory device MMRY is, for example, a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN has a moving part or a propulsion part such as a motor or an engine. The device EQP displays the signal output from the photoelectric conversion device APR on a display device DSPL and transmits the signal to the outside using a communication device (not shown) provided in the device EQP. For this purpose, the device EQP preferably further includes a memory device MMRY and a processing device PRCS in addition to the memory circuit unit and arithmetic circuit unit provided in the photoelectric conversion device APR.

[0152] The device EQP shown in FIG. 16 may be an electronic device such as an information terminal with a photographing function (e.g., a smartphone or a wearable device), a camera (e.g., an interchangeable lens camera, a compact camera, a video camera, or a surveillance camera). The mechanical device MCHN in the camera can drive components of the optical device OPT for zooming, focusing, and shutter operation. The device EQP may also be a transportation device (mobile object) such as a vehicle, a ship, or an aircraft. The device EQP may also be a medical device such as an endoscope or a CT scanner.

[0153] The mechanical device MCHN in the transportation equipment can be used as a moving device. The device EQP as a transportation equipment is suitable for transporting the photoelectric conversion device APR, assisting and / or automating driving (piloting) using a photographing function, etc. The processing device PRCS for assisting and / or automating driving (piloting) can perform processing to operate the mechanical device MCHN as a moving device based on information obtained by the photoelectric conversion device APR.

[0154] The photoelectric conversion device APR according to this embodiment can provide high value to its designer, manufacturer, seller, purchaser, and / or user. Therefore, if the photoelectric conversion device APR is installed in a device EQP, the value of the device EQP can also be increased. Therefore, when manufacturing and selling the device EQP, deciding to install the photoelectric conversion device APR according to this embodiment in the device EQP is advantageous in increasing the value of the device EQP.

[0155] [Sixth embodiment] 17(a) and 17(b) are block diagrams of devices related to an in-vehicle camera according to this embodiment. FIGS. 17(a) and 17(b) show an example in which the above-described photoelectric conversion device is applied to a moving body such as a vehicle. Device 80 includes an imaging device 800 and a signal processing device (processing device) that processes signals from the imaging device 800. Device 80 includes an image processing unit 801 that performs image processing on multiple pieces of image data acquired by the imaging device 800, and a parallax calculation unit 802 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by device 80. Device 80 also includes a distance measurement unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, parallax calculation unit 802 and distance measurement unit 803 are examples of distance information acquisition means that acquire distance information to an object. In other words, the distance information includes information on parallax, defocus amount, distance to the object, etc. The collision determination unit 804 may determine the possibility of a collision using any of these distance information. The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination of these.

[0156] The device 80 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The device 80 is also connected to a control ECU 820, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 804. The device 80 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804. For example, if the determination result of the collision determination unit 804 indicates a high collision possibility, the control ECU 820 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 830 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel. The device 80 functions as a control means for controlling the operation of controlling the vehicle as described above.

[0157] In this embodiment, the device 80 captures images of the surroundings of the vehicle, for example, the front or rear. Fig. 17(b) shows the device when capturing an image of the area in front of the vehicle (image capturing range 850). A vehicle information acquisition device 810, which serves as an image capturing control means, sends an instruction to the device 80 or the image capturing device 800 to perform an image capturing operation. This configuration can further improve the accuracy of distance measurement.

[0158] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from a lane, etc. Furthermore, the present invention is not limited to vehicles such as automobiles, but can be applied to moving objects (moving devices) such as ships, aircraft, artificial satellites, industrial robots, and consumer robots. In addition, the present invention can be applied to a wide range of devices that use object recognition or biometric recognition, such as intelligent transport systems (ITS) and surveillance systems, without being limited to moving objects.

[0159] [Modified embodiment] The present invention is not limited to the above-described embodiments and can be modified in various ways. For example, an example in which part of the configuration of one embodiment is added to another embodiment, or an example in which part of the configuration of one embodiment is replaced with part of the configuration of another embodiment, is also an embodiment of the present invention.

[0160] The disclosure of this specification includes the complement of the concepts described in this specification. In other words, if this specification states, for example, that "A is B" (A=B), then this specification is deemed to disclose or suggest that "A is not B" even if the statement that "A is not B" (A≠B) is omitted. This is because when "A is B," it is assumed that the case where "A is not B" is taken into consideration.

[0161] The disclosure of this specification includes the following configurations. (Configuration 1) a plurality of microlenses arranged in a plurality of rows and a plurality of columns; a pixel array including a plurality of unit pixels arranged corresponding to the plurality of microlenses, respectively; and Each of the plurality of unit pixels includes a first photoelectric conversion unit and a second photoelectric conversion unit, readout from the pixel array is performed in a first mode in which a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out, and a second mode in which a signal based on charges generated in either the first photoelectric conversion unit or the second photoelectric conversion unit is read out, and then a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out; readout control is performed on the pixel array divided into a plurality of regions including a first region, a second region, and a third region disposed between the first region and the second region; readout from unit pixels of all rows included in the first region is performed in the first mode; readout from unit pixels of all rows included in the second region is performed in the second mode; Readout from unit pixels of some rows included in the third region is performed in the first mode, and readout from unit pixels of other rows is performed in the second mode. A photoelectric conversion device characterized by: (Configuration 2) the plurality of unit pixels include a first unit pixel and a second unit pixel, The charges generated in the first photoelectric conversion unit of the first unit pixel, the charges generated in the second photoelectric conversion unit of the first unit pixel, the charges generated in the first photoelectric conversion unit of the second unit pixel, and the charges generated in the second photoelectric conversion unit of the second unit pixel are transferred to one floating diffusion. 2. The photoelectric conversion device according to configuration 1, (Configuration 3) The first unit pixel and the second unit pixel are arranged in the same column. 3. The photoelectric conversion device according to configuration 2. (Configuration 4) The first unit pixel and the second unit pixel are arranged adjacent to each other in the same column. 4. The photoelectric conversion device according to configuration 3. (Configuration 5) The first unit pixel and the second unit pixel are sensitive to light of different colors. 5. The photoelectric conversion device according to any one of configurations 2 to 4. (Configuration 6) each of the first unit pixel and the second unit pixel is included in the third region; readout from the first unit pixel is performed in the first mode; The readout from the second unit pixel is performed in the second mode. 5. The photoelectric conversion device according to any one of configurations 2 to 4. (Configuration 7) The readout from the first unit pixel and the readout from the second unit pixel are performed at different timings. 7. The photoelectric conversion device according to configuration 6, (Configuration 8) further comprising a plurality of output lines arranged corresponding to each of the plurality of columns; The signal read out from the first unit pixel and the signal read out from the second unit pixel are both output to the same output line among the plurality of output lines. 8. The photoelectric conversion device according to any one of configurations 2 to 7, wherein: (Configuration 9) Further, four or more output lines are arranged corresponding to each of the plurality of columns, The signal read out from the first unit pixel and the signal read out from the second unit pixel are both output to the same output line among the four or more output lines. 9. The photoelectric conversion device according to any one of configurations 2 to 8, wherein: (Configuration 10) further comprising a memory for storing digital signals based on signals read out in the first mode and the second mode; The memory does not output a digital signal based on charges generated by either the first photoelectric conversion unit or the second photoelectric conversion unit among signals read out from the unit pixels in the third region in the second mode. 10. The photoelectric conversion device according to any one of configurations 1 to 9, wherein: (Configuration 11) When the memory holds a digital signal based on charges generated by either the first photoelectric conversion unit or the second photoelectric conversion unit among signals read out from the unit pixels in the third region in the second mode, the digital signal is erased. 11. The photoelectric conversion device according to configuration 10. (Configuration 12) The memory delays a part of the input digital signal and outputs it. 12. The photoelectric conversion device according to configuration 10 or 11. (Configuration 13) further comprising a first processing unit for performing digital signal processing; The first processing unit is disposed in front of the memory. 13. The photoelectric conversion device according to any one of configurations 10 to 12. (Configuration 14) further comprising a second processing unit for performing digital signal processing; The second processing unit is disposed at a subsequent stage of the memory. 13. The photoelectric conversion device according to any one of configurations 10 to 12. (Configuration 15) further comprising a first processing unit and a second processing unit each performing a different digital signal processing; the first processing unit is disposed in a stage preceding the memory, The second processing unit is disposed at a subsequent stage of the memory. 13. The photoelectric conversion device according to any one of configurations 10 to 12. (Configuration 16) the signal read out in the first mode is used to generate an image; The signal read out in the second mode is used for image generation and focus detection. 16. The photoelectric conversion device according to any one of configurations 1 to 15. (Configuration 17) two unit pixels arranged in the same column among the plurality of unit pixels are simultaneously read out in the first mode; In two other unit pixels arranged in the same column among the plurality of unit pixels, readout in the second mode is simultaneously performed at a time different from that in the first mode. 17. The photoelectric conversion device according to any one of configurations 1 to 16. (Configuration 18) In all of the unit pixels arranged in the same column among the plurality of unit pixels, the readout in the first mode and the readout in the second mode are not performed simultaneously. 18. The photoelectric conversion device according to any one of configurations 1 to 17. (Configuration 19) The photoelectric conversion device according to any one of configurations 1 to 18, an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device. (Configuration 20) The device according to configuration 19, wherein the processing device acquires distance information from the photoelectric conversion device to the target object.

[0162] The present invention can also be realized by supplying a program that realizes one or more functions of the above-described embodiments to a system or device via a network or a storage medium, and having one or more processors in the computer of the system or device read and execute the program. It can also be realized by a circuit (e.g., ASIC) that realizes one or more functions.

[0163] It should be noted that the above-described embodiments are merely examples of specific embodiments for carrying out the present invention, and the technical scope of the present invention should not be construed as being limited by these embodiments. In other words, the present invention can be carried out in various forms without departing from its technical concept or main features. [Explanation of symbols]

[0164] 4 pixel array ML Micro Lens P1, P2 unit pixel PD1a, PD1b, PD2a, PD2b photoelectric conversion section

Claims

1. a plurality of microlenses arranged in a plurality of rows and a plurality of columns; a pixel array including a plurality of unit pixels arranged corresponding to the plurality of microlenses, respectively; and Each of the plurality of unit pixels includes a first photoelectric conversion unit and a second photoelectric conversion unit, reading from the pixel array is performed in a first mode in which a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out, and a second mode in which a signal based on charges generated in either the first photoelectric conversion unit or the second photoelectric conversion unit is read out, and then a signal based on charges obtained by adding together charges generated in the first photoelectric conversion unit and charges generated in the second photoelectric conversion unit is read out; readout control is performed on the pixel array divided into a plurality of regions including a first region, a second region, and a third region disposed between the first region and the second region; readout from unit pixels of all rows included in the first region is performed in the first mode; readout from unit pixels of all rows included in the second region is performed in the second mode; Readout from unit pixels of some rows included in the third region is performed in the first mode, and readout from unit pixels of other rows is performed in the second mode. A photoelectric conversion device characterized by:

2. the plurality of unit pixels include a first unit pixel and a second unit pixel, The charges generated in the first photoelectric conversion unit of the first unit pixel, the charges generated in the second photoelectric conversion unit of the first unit pixel, the charges generated in the first photoelectric conversion unit of the second unit pixel, and the charges generated in the second photoelectric conversion unit of the second unit pixel are transferred to one floating diffusion.

2. The photoelectric conversion device according to claim 1.

3. The first unit pixel and the second unit pixel are arranged in the same column.

3. The photoelectric conversion device according to claim 2.

4. The first unit pixel and the second unit pixel are arranged adjacent to each other in the same column.

4. The photoelectric conversion device according to claim 3.

5. The first unit pixel and the second unit pixel are sensitive to light of different colors.

3. The photoelectric conversion device according to claim 2.

6. each of the first unit pixel and the second unit pixel is included in the third region; The readout from the first unit pixel is performed in the first mode, The readout from the second unit pixel is performed in the second mode.

3. The photoelectric conversion device according to claim 2.

7. The readout from the first unit pixel and the readout from the second unit pixel are performed at different timings.

7. The photoelectric conversion device according to claim 6.

8. further comprising a plurality of output lines arranged corresponding to each of the plurality of columns; The signal read out from the first unit pixel and the signal read out from the second unit pixel are both output to the same output line among the plurality of output lines.

3. The photoelectric conversion device according to claim 2.

9. Further, four or more output lines are arranged corresponding to each of the plurality of columns, The signal read out from the first unit pixel and the signal read out from the second unit pixel are both output to the same output line among the four or more output lines.

3. The photoelectric conversion device according to claim 2.

10. further comprising a memory for storing digital signals based on signals read out in the first mode and the second mode; The memory does not output a digital signal based on charges generated by either the first photoelectric conversion unit or the second photoelectric conversion unit among signals read out from the unit pixels in the third region in the second mode.

2. The photoelectric conversion device according to claim 1.

11. When the memory holds a digital signal based on charges generated by either the first photoelectric conversion unit or the second photoelectric conversion unit among signals read out from the unit pixels in the third region in the second mode, the memory erases the digital signal.

11. The photoelectric conversion device according to claim 10.

12. The memory delays a part of the input digital signal and outputs it.

11. The photoelectric conversion device according to claim 10.

13. further comprising a first processing unit for performing digital signal processing; The first processing unit is disposed in front of the memory.

11. The photoelectric conversion device according to claim 10.

14. further comprising a second processing unit for performing digital signal processing; The second processing unit is disposed at a subsequent stage of the memory.

11. The photoelectric conversion device according to claim 10.

15. further comprising a first processing unit and a second processing unit each performing a different digital signal processing; the first processing unit is disposed in a stage preceding the memory, The second processing unit is disposed at a subsequent stage of the memory.

11. The photoelectric conversion device according to claim 10.

16. the signal read out in the first mode is used to generate an image; The signal read out in the second mode is used for image generation and focus detection.

2. The photoelectric conversion device according to claim 1.

17. two unit pixels arranged in the same column among the plurality of unit pixels are simultaneously read out in the first mode; In other two unit pixels arranged in the same column among the plurality of unit pixels, readout in the second mode is simultaneously performed at a time different from that in the first mode.

2. The photoelectric conversion device according to claim 1.

18. In all unit pixels arranged in the same column among the plurality of unit pixels, the readout in the first mode and the readout in the second mode are not performed simultaneously.

2. The photoelectric conversion device according to claim 1.

19. The photoelectric conversion device according to any one of claims 1 to 18, an optical device corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device.

20. 20. The device of claim 19, wherein the processing device acquires distance information from the photoelectric conversion device to an object.

Images