Photosensitive chip, its manufacturing method, and photosensitive module

Abstract

To provide a photosensitive chip, a manufacturing method thereof, and a photosensitive module, and more particularly to a photosensitive chip with an increased photosensitive area that is easy to produce, a manufacturing method thereof, and a photosensitive module.SOLUTION: A photosensitive chip includes an isosceles trapezoidal body, a positive electrode, and a negative electrode. The isosceles trapezoidal body includes an N-type semiconductor layer and a P-type semiconductor layer. The P-type semiconductor layer is disposed adjacent to the N-type semiconductor layer. The positive electrode is electrically connected to the P-type semiconductor layer. The negative electrode is electrically connected to the N-type semiconductor layer.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to a photosensitive chip, a manufacturing method thereof, and a photosensitive module, and more particularly to a photosensitive chip with an increased photosensitive area and easy production, a manufacturing method thereof, and a photosensitive module. [Background technology]

[0002] A photosensitive chip is a photoelectric conversion element. When light shines on a photosensitive chip, the photosensitive chip produces a corresponding change in current or voltage. Photosensitive chips are widely used in various optical devices, such as optical communication, photoelectric detection, automatic brightness control, spectroscopy, photosensitive circuits, photodetectors, and cameras. These chips are usually used to detect light intensity, measure spectra, or detect optical signals.

[0003] The performance of a photosensitive chip is affected by many factors, including the material, structure, manufacturing process, and spectral characteristics. Figure 1 shows a photosensitive module 10 for use in a wearable device. This photosensitive module 10 is composed of six regular hexagonal photosensitive chips 20 arranged in a ring shape. An appropriate optical distance is provided between adjacent chips, allowing the photosensitive chips 20 to be placed on a circuit board 30 within the wearable device with maximum surface area. The light-emitting chip 40 in this conventional photosensitive module 10 emits light primarily upward. The light is diffusely reflected by the surface of the test object, returns to the photosensitive chip 20, and is absorbed by the photosensitive chip 20 and converted into an electronic signal. This conventional light-emitting photosensitive module can be used in devices such as smartwatches to provide users with real-time physiological signals.

[0004] FIG. 2 shows a layout of a conventional hexagonal photosensitive chip 20 arranged on a wafer 50. Because the photosensitive chip has a polygonal shape, it cannot be connected in a long straight line. Therefore, after the chip growth process is completed, it cannot be cut with a conventional low-cost dicing saw, or after drawing a line with a laser beam, it cannot be cut by a conventional cutting process. Instead, plasma etching is used. However, when processing wafers with a thickness of 100 to 300 micrometers (μm) using plasma etching, the plasma process has the disadvantages of being expensive, time-consuming, and having low product yields. These disadvantages need to be improved as soon as possible. Summary of the Invention

[0005] The primary objective of the present invention is to provide an innovative photosensitive chip, its manufacturing method, and a photosensitive module. This photosensitive chip has the structural characteristics of an isosceles trapezoidal body and can be applied to the traditional linear cutting process for cutting wafers. This can replace the traditional plasma etching process, which requires a long process time and a large amount of etching material. Furthermore, a photosensitive module using this photosensitive chip has a larger light-receiving area, which saves power. It also has advantages such as design flexibility, allowing the area to be adjusted according to demand. This is particularly advantageous for applications in smart wearable devices.

[0006] To achieve the above object, the present invention provides a photosensitive chip including an isosceles trapezoidal body, a positive electrode, and a negative electrode. The isosceles trapezoidal body has an N-type semiconductor layer and a P-type semiconductor layer. The P-type semiconductor layer is disposed adjacent to the N-type semiconductor layer. The positive electrode is electrically connected to the P-type semiconductor layer. The negative electrode is electrically connected to the N-type semiconductor layer.

[0007] In an embodiment of the present invention, in the photosensitive chip, the two non-parallel sides of the isosceles trapezoidal body form an angle with the longer side of the two parallel sides, the angle being between 50° and 70°.

[0008] In an embodiment of the present invention, in the photosensitive chip, the angle is 60°.

[0009] In an embodiment of the present invention, in the photosensitive chip, the height of the isosceles trapezoid body is 0.87 to 5.22 times the shorter side of the two parallel sides.

[0010] In the embodiment of the present invention, in the photosensitive chip, the height of the isosceles trapezoid body is 1.44 times the shorter side of the two parallel sides.

[0011] In an embodiment of the present invention, the photosensitive chip is a silicon-based photosensitive chip.

[0012] In an embodiment of the present invention, the photosensitive chip is a photosensitive diode or a photosensitive transistor.

[0013] In an embodiment of the present invention, in the photosensitive chip, the positive and negative electrodes are located on two opposite sides of an isosceles trapezoidal body.

[0014] In an embodiment of the present invention, in the photosensitive chip, the positive and negative electrodes are located on the same side of the isosceles trapezoidal body.

[0015] In an embodiment of the present invention, in the photosensitive chip, a P-type semiconductor layer is disposed on an N-type semiconductor layer, or an N-type semiconductor layer is disposed on a P-type semiconductor layer.

[0016] To achieve the above object, the present invention provides a method for manufacturing a photosensitive chip, which includes the steps of: providing a wafer; linearly cutting the wafer to form a plurality of parallel first cutting lines on the wafer; linearly cutting the wafer to form a plurality of parallel second cutting lines on the wafer to cut the wafer into a plurality of parallelogram units; and cutting the parallelogram units to form a plurality of isosceles trapezoidal bodies.

[0017] In an embodiment of the present invention, the method for manufacturing a photosensitive chip includes, before the step of cutting the parallelogram units, a step of rearranging the parallelogram units so that the midlines of adjacent parallelogram units are aligned and connected to each other to form a plurality of planned cutting lines, the midlines of the parallelogram units being lines that divide the parallelogram units into two isosceles trapezoidal bodies connected in opposite directions.

[0018] In the embodiment of the present invention, in the method for manufacturing a photosensitive chip, in the step of cutting the parallelogram unit, cutting is performed along the planned cutting lines with a dicing saw.

[0019] In the embodiment of the present invention, in the method for manufacturing a photosensitive chip, the step of linearly cutting the wafer is performed by using a dicing saw.

[0020] In the embodiment of the present invention, in the method for manufacturing a photosensitive chip, the step of cutting the parallelogram unit is performed by using a laser.

[0021] To achieve the above object, the present invention provides a photosensitive module including a conductive circuit board and six of the photosensitive chips. The conductive circuit board has a central portion and an outer periphery, and the outer periphery surrounds the central portion. The photosensitive chips are arranged in a ring shape on the outer periphery, and are spaced at intervals of approximately 60° from each other.

[0022] In an embodiment of the present invention, the photosensitive module further comprises at least one active chip located at the center.

[0023] In an embodiment of the present invention, in the photosensitive module, the active chip is a light-emitting chip, which emits light of at least one wavelength, which is diffusely reflected by the surface of the test object, and is absorbed back by the photosensitive chip and converted into an electronic signal.

[0024] In an embodiment of the present invention, in the photosensitive module, the light-emitting chip is a green light-emitting diode, a red light-emitting diode, a short-wavelength infrared light-emitting diode, a long-wavelength infrared light-emitting diode, or a combination thereof.

[0025] In an embodiment of the present invention, in the photosensitive module, the height of the isosceles trapezoid body is adjustable, so that the area of ​​each photosensitive chip is adjustable.

[0026] In an embodiment of the present invention, there is a gap between adjacent photosensitive chips in the photosensitive module.

[0027] In an embodiment of the present invention, in the photosensitive module, the spacing is about 20 mils.

[0028] Those skilled in the art can understand other objects of the present invention, as well as the technical means and embodiments of the present invention, by referring to the drawings and the embodiments described below. [Brief explanation of the drawings]

[0029] [Figure 1] Schematic diagram of a conventional photosensitive module applied to a wearable device [Figure 2] Schematic diagram showing the layout of conventional hexagonal photosensitive chips arranged on a wafer. [Figure 3A] 1 is a top view showing a photosensitive chip according to an embodiment of the present invention; [Figure 3B] 1 is a side view showing a photosensitive chip according to an embodiment of the present invention; [Figure 4] FIG. 1 is a schematic diagram showing a wafer layout before cutting of photosensitive chips having an isosceles trapezoidal outer shape in an embodiment of the present invention. [Figure 5A] Schematic diagram of the wafer after cutting and removing the incomplete chips on the periphery of the wafer shown in Figure 4. [Figure 5B] Schematic diagram of the parallelogram unit after cutting the wafer and rearranging it [Figure 6] Schematic diagram of a photosensitive module in an embodiment of the present invention. [Figure 7] Schematic diagram of a comparison between the photosensitive module of the present invention and a conventional photosensitive module. DETAILED DESCRIPTION OF THE INVENTION

[0030] The present invention will be described below through examples. Note that the examples of the present invention are merely examples of embodiments and are not intended to limit the present invention to the environments, applications, or specific aspects described in the examples. Therefore, the explanation of the examples is intended to explain the present invention, but does not limit the present invention. Note that components not directly related to the present invention are omitted and not shown in the embodiments and drawings. The dimensional relationships between the components in the drawings are intended to facilitate understanding and do not limit the actual dimensions.

[0031] 3A and 3B. FIG. 3A is a top view of a photosensitive chip 100 according to an embodiment of the present invention. FIG. 3B is a side view of the photosensitive chip 100 according to the present invention. The photosensitive chip 100 has an isosceles trapezoidal body. The lengths of the two non-parallel sides of the isosceles trapezoidal body are substantially equal, and the two non-parallel sides form an angle of 50° to 70° with the longer of the two parallel sides. Preferably, the angle is 60°. The height of the isosceles trapezoidal body is 0.87 to 5.22 times the shorter of the two parallel sides. Preferably, the height of the isosceles trapezoidal body is 1.44 times the shorter of the two parallel sides. In a preferred embodiment, the height of the isosceles trapezoidal body is approximately 144 mils, the length of the shorter of the two parallel sides is approximately 100 mils, the length of the longer of the two parallel sides is approximately 267 mils, and the thickness is approximately 8 mils.

[0032] The following description will be given with reference to FIGS. 3A and 3B. In terms of function, the photosensitive chip 100 has an isosceles trapezoidal body and includes an N-type semiconductor layer 120 and a P-type semiconductor layer 140. The photosensitive chip 100 further includes a positive electrode 160 and a negative electrode 180. The P-type semiconductor layer 140 is a P-type semiconductor diffusion layer, and the N-type semiconductor layer 120 is a substrate layer. The P-type semiconductor layer 140 is disposed adjacent to the N-type semiconductor layer 120. The positive electrode 160 is electrically connected to the P-type semiconductor layer 140. The negative electrode 180 is electrically connected to the N-type semiconductor layer 120. The photosensitive chip 100 is a chip type in which the positive electrode is connected by wire bonding. That is, as shown in FIG. 3B, the positive electrode 160 and the negative electrode 180 are disposed on two opposite side surfaces of the N-type semiconductor layer 120 (the isosceles trapezoidal body). However, the present invention is not limited to this. For example, the photosensitive chip 100 may be a flip-chip type. That is, the positive electrode 160 and the negative electrode 180 may be disposed on the same side of the isosceles trapezoidal body, i.e., the side of the P-type semiconductor layer 140. The photosensitive chip 100 may be a photosensitive diode or a photosensitive transistor. For example, the photosensitive chip 100 is a silicon-based photosensitive diode chip that absorbs photons to generate a photocurrent and converts it into an electronic signal.

[0033] FIG. 4 shows a layout of photosensitive chips 100 having the aforementioned isosceles trapezoidal contours arranged on a wafer 250 before cutting. As shown in FIG. 4, the wafer layout is such that the isosceles trapezoid bodies of two adjacent photosensitive chips 100 are connected upside down to form parallelogram units 200. That is, one of the two non-parallel sides of the horizontally adjacent isosceles trapezoid bodies overlaps with another, and two parallel sides of the horizontally adjacent isosceles trapezoid bodies are connected with another. The multiple parallelogram units 200 thus formed are arranged parallel to each other and as densely packed as possible on the wafer 250. In this way, the parallel sides of the horizontally and vertically adjacent parallelogram units 200 form a plurality of parallel first cutting lines 210 and a plurality of parallel second cutting lines 220 to be cut on the wafer 250.

[0034] In the method for manufacturing a photosensitive chip of the present invention, first, a semiconductor device layout as shown in FIG. 4 is formed on a wafer 250, and then linear cutting is performed along the connected parallel sides of the parallelogram units to form a plurality of parallel first cutting lines 210 on the wafer 250. Next, linear cutting is performed along other connected parallel sides of the parallelogram units to form a plurality of parallel second cutting lines 220 on the wafer 250. After this cutting, the wafer 250 becomes a plurality of parallelogram units 200, each independently separated. Specifically, because the first cutting lines 210 and the second cutting lines 220 on the wafer 250 are each long, parallel straight lines, the wafer can be cut using a low-cost dicing saw in the two cutting processes.

[0035] After removing any defective chips from the periphery of the wafer, the cut wafer becomes an array of parallelogram chips, as shown in FIG. 5A. Next, a device such as a sorter or die bonder is used to move the parallelogram units horizontally, repositioning them, and fixing them to the blue film. These parallelogram units are arranged by aligning the midlines of adjacent parallelogram units vertically to form multiple cutting lines 230, as shown in FIG. 5B. The midline of a parallelogram unit is formed by overlapping one of the non-parallel sides of two isosceles trapezoidal bodies connected in opposite directions in the parallelogram unit. In other words, the midline of a parallelogram unit is the line that divides the parallelogram unit into two isosceles trapezoidal bodies connected in opposite directions. Next, the multiple parallelogram units 200 on the blue film are cut along the multiple cutting lines 230 to form multiple isosceles trapezoidal bodies, thereby forming the photosensitive chips 100 of the present invention. As shown in Figure 5B, the cutting line 230 is a long straight line connecting the midlines of adjacent parallelogram units, allowing cutting along the cutting line 230 using a conventional dicing saw. While conventional technologies require special plasma etching to separate chips with special shapes, the present invention allows the chip cutting process to be performed using a conventional dicing saw. This not only significantly reduces manufacturing time and costs, but also improves manufacturing yield and overcomes the various problems of the prior art described above.

[0036] In addition to the above-mentioned cutting process, after obtaining the parallelogram chips arranged as shown in Figure 5A, laser cutting can also be used to form the midlines of the parallelogram units (i.e., the non-parallel sides where the isosceles trapezoidal bodies overlap). That is, the lines are drawn with a laser beam and then the chips are cut. These two wafer cutting processes can significantly reduce production costs and manufacturing time compared to the conventional plasma etching process, and do not require the purchase of expensive plasma etching equipment or large amounts of etching materials.

[0037] FIG. 6 shows a photosensitive module 110 of the present invention. The photosensitive module 110 includes a conductive circuit board 130, at least one active chip 150, and six of the above-described photosensitive chips 100. The conductive circuit board 130 has a center portion 132 and an outer periphery 134. The outer periphery 134 surrounds the center portion 132. Specifically, the conductive circuit board 130 is a substantially circular conductive circuit board (PCB) with a diameter of approximately 568 mils. The center portion 132 of the conductive circuit board is a light-emitting chip mounting area and houses at least one active chip 150. The active chip 150 functions as an active element in a smart wearable device that emits light or a signal. In this embodiment, the active chip 150 is a light-emitting chip that emits light of at least one wavelength. The light is diffusely reflected by the surface of the test object, returned to the photosensitive chip 100, and absorbed and converted into an electronic signal. Specifically, the active chip 150 is a green light emitting diode chip with a size of 20 mils (mils) and a wavelength of 495 to 570 nanometers (nm), a red light emitting diode chip with a wavelength of 620 to 750 nanometers (nm), an infrared light emitting diode chip with a wavelength of 940 nanometers (nm), or a combination thereof.

[0038] The outer periphery 134 of the conductive circuit board 130 is the photosensitive chip mounting area. In this embodiment, six photosensitive chips 100, each having an isosceles trapezoidal shape as shown in FIG. 3, are fixed to the outer periphery 134. These six isosceles trapezoidal photosensitive chips are arranged in a ring shape on the outer periphery 134. The photosensitive chips are spaced apart at approximately 60° intervals. Specifically, as shown in FIG. 6, the shorter of the two parallel sides of the isosceles trapezoidal body of the photosensitive chip 100 is closest to the center 132. The angle between adjacent chips is 60°. There is a predetermined spacing b between adjacent chips. This spacing b may be, but is not limited to, 20 mils. This arrangement allows the chips to cover the outer periphery 134 of the conductive circuit board 130 to the maximum extent possible. Compared to a conventional photosensitive module using regular hexagonal chips, the photosensitive module of the present invention has an approximately 2% increase in the total area of ​​the photosensitive chips and an increased light-receiving area, as shown in FIG. 7, when using a conductive circuit board of the same diameter as a reference. For wearable devices, a larger light-receiving area means greater power consumption savings. Therefore, the photosensitive module of the present invention not only achieves the aforementioned advantages of reducing the cost of photosensitive chips and improving yield, but also combines the advantages of power saving and improved performance.

[0039] As shown in FIG. 6, another feature of the photosensitive module 110 of the present invention is that the height h of the isosceles trapezoidal body of the photosensitive chip 100 within the module can be adjusted according to actual needs, thereby adjusting the area of ​​the photosensitive chip. This feature increases the flexibility of the photosensitive module in practical applications. In contrast, the size and area of ​​the regular hexagonal chips of the prior art cannot be adjusted. Specifically, the height of the photosensitive chip in the photosensitive module 110 of the present invention is substantially 0.87 to 5.22 times the short side of its parallel side. The angle between the non-parallel side and the long side of the parallel side is 50 to 70 degrees. This allows for a high light receiving rate.

[0040] The conductive circuit board of the photosensitive module of the present invention includes one conductive circuit (not shown) and an insulating substrate (with the same area as the conductive circuit board) on which the circuit is mounted. The conductive circuit board has circuits on both sides (i.e., the conductive circuits are arranged on opposite sides of the insulating substrate), and these circuits are connected to each other. Most of the circuits are arranged on the opposite side of the active chip and the photosensitive chip, and the electrodes of the active chip and six photosensitive chips in the module are electrically connected to the conductive circuit board, and then electrically connected to the outside (not shown) through the conductive circuit board. The insulating substrate is substantially circular, carries the above-mentioned conductive circuit, and is housed in the wearable device and used to secure the photosensitive module to the wearable device.

[0041] The above examples are intended to explain embodiments of the present invention and to explain the characteristic configurations of the present invention. The present invention is not limited to the above examples. Modifications or equivalent arrangements that can be easily made by those skilled in the art are also within the scope of the present invention. The scope of protection of the rights of the present invention is based on the claims. [Explanation of symbols]

[0042] 10 Photosensitive Module 20 Photosensitive chip 30 Conductive circuit board 40 Light Emitting Chips 50 wafers 100 photosensitive chips 110 Photosensitive module 120 N-type semiconductor layer 130 Conductive circuit board 132 Center 134 Outer periphery 140 P-type semiconductor layer 150 active chips 160 positive electrode 170 negative electrode 200 parallelogram units 210 1st cutting line 220 2nd cutting line 230 Cutting line 250 wafers b interval h height

Claims

1. A photosensitive chip, an isosceles trapezoidal body having an N-type semiconductor layer and a P-type semiconductor layer disposed adjacent to the N-type semiconductor layer; a positive electrode electrically connected to the P-type semiconductor layer; a negative electrode electrically connected to the N-type semiconductor layer.

2. 2. The photosensitive chip according to claim 1, wherein the two non-parallel sides of the isosceles trapezoidal body form an angle with the longer side of the two parallel sides, the angle being between 50° and 70°.

3. 3. The photosensitive chip according to claim 2, wherein the angle is 60 degrees.

4. 2. The photosensitive chip according to claim 1, wherein the height of the isosceles trapezoid body is 0.87 to 5.22 times the shorter side of the two parallel sides.

5. 5. The photosensitive chip according to claim 4, wherein the height of the isosceles trapezoid body is 1.44 times the shorter side of the two parallel sides.

6. 2. The photosensitive chip according to claim 1, wherein the photosensitive chip is a silicon-based photosensitive chip.

7. 2. The photosensitive chip according to claim 1, wherein the photosensitive chip is a photosensitive diode or a photosensitive transistor.

8. 2. The photosensitive chip according to claim 1, wherein the positive electrode and the negative electrode are located on two opposite sides of the isosceles trapezoidal body.

9. 2. The photosensitive chip according to claim 1, wherein the positive electrode and the negative electrode are located on the same side of the isosceles trapezoidal body.

10. 2. The photosensitive chip according to claim 1, wherein the P-type semiconductor layer is disposed on the N-type semiconductor layer, or the N-type semiconductor layer is disposed on the P-type semiconductor layer.

11. A method for manufacturing a photosensitive chip, comprising: providing a wafer; linearly cutting the wafer to form a plurality of parallel first cutting lines in the wafer; cutting the wafer into a plurality of parallel second cutting lines by linearly cutting the wafer, and cutting the wafer into a plurality of parallelogram units; and cutting the parallelogram unit to form a plurality of isosceles trapezoidal bodies according to claim 1.

12. before the step of cutting the parallelogram units, a step of rearranging the parallelogram units so that midlines of the parallelogram units adjacent to each other in the vertical direction are aligned and connected to each other to form a plurality of planned cutting lines; 12. The method of claim 11, wherein the midline of the parallelogram unit is a line dividing the parallelogram unit into two isosceles trapezoidal bodies connected in opposite directions.

13. 13. The method for manufacturing a photosensitive chip according to claim 12, wherein in the step of cutting the parallelogram unit, cutting is performed along the planned cutting lines with a dicing saw.

14. 12. The method for manufacturing a photosensitive chip according to claim 11, wherein the step of cutting the wafer in a straight line is performed by using a dicing saw.

15. 12. The method for manufacturing a photosensitive chip according to claim 11, wherein the step of cutting the parallelogram unit uses a laser.

16. A photosensitive module, a conductive circuit board having a central portion and an outer periphery surrounding the central portion; and six photosensitive chips according to claim 1 arranged in a ring around the outer periphery at intervals of approximately 60 degrees.

17. 17. The photosensitive module of claim 16, further comprising at least one active chip located in the central portion.

18. The photosensitive module of claim 17, wherein the active chip is a light-emitting chip that emits light of at least one wavelength, which is diffusely reflected on the surface of the test object, absorbed back to the photosensitive chip, and converted into an electronic signal.

19. 20. The photosensitive module of claim 18, wherein the light emitting chip is a green light emitting diode, a red light emitting diode, a short wavelength infrared light emitting diode, a long wavelength infrared light emitting diode, or a combination thereof.

20. 17. The photosensitive module according to claim 16, wherein the height of the isosceles trapezoidal body is adjustable, thereby adjusting the area of ​​the photosensitive chip.

21. 17. The photosensitive module according to claim 16, wherein there is a gap between adjacent photosensitive chips.

22. 22. The photosensitive module of claim 21, wherein the spacing is approximately 20 mils.

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