Semiconductor device

The semiconductor device structure addresses high contact resistance and miniaturization challenges by optimizing the arrangement of conductive films and electrodes, ensuring high on-current and low resistance in oxide semiconductor transistors.

JP2025137671APending Publication Date: 2025-09-19SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025121430
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2011-09-22
Filing Date
2025-07-18
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Transistors using oxide semiconductors face challenges with high contact resistance between the source/drain electrodes and the gate electrode, leading to reduced on-current and difficulty in miniaturization due to overlapping electrodes and increased resistance.

Method used

A semiconductor device structure is designed with a specific arrangement of conductive films and a semiconductor film, where the distance between source and drain electrodes is controlled by the distance between first conductive films, and the gate electrode is positioned to minimize overlap, ensuring a high on-current even in miniaturized transistors.

Benefits of technology

The structure achieves a high on-state current and low resistance in miniaturized transistors by reducing contact resistance and minimizing electrode overlap, allowing for efficient transistor operation.

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Abstract

To provide a semiconductor device using a transistor which can obtain a high ON-state current even when the transistor is microfabricated.SOLUTION: A semiconductor device includes a transistor which has: a pair of first conductive films on an insulation surface; a semiconductor film on the pair of first conductive films; a pair of second conductive films connected to the pair of first conductive films, respectively; an insulation film on the semiconductor film; and a third conductive film on the insulation film, which is provided at a position overlapping the semiconductor film. An end of the third conductive film above the semiconductor film and a region where the pair of second conductive films are provided are separated from each other.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a semiconductor device using an insulated gate field effect transistor. [Background technology]

[0002] In recent years, the high mobility achieved by polysilicon and microcrystalline silicon and the high mobility achieved by amorphous silicon have been Oxide semiconductors are being developed as new semiconductor materials that combine uniform device characteristics obtained by Metal oxides, which are called conductors and exhibit semiconducting properties, are attracting attention. For example, indium oxide, a well-known metal oxide, is used in liquid It is used as a transparent electrode material in liquid crystal display devices, etc. It is a metal oxide that exhibits semiconducting properties. Examples of oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Transistors using metal oxides that exhibit such semiconducting properties in the channel formation region are already known. It has been reported (Patent Document 1 and Patent Document 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0004] By the way, in a silicon transistor, the addition of a small amount of impurity to the semiconductor film However, in transistors using oxide semiconductors, the valence electrons are controlled by the silicon Unlike transistors using silicon, the technology for controlling valence electrons by adding impurities has been established. Therefore, a transistor using an oxide semiconductor has a source electrode or a drain electrode. In some cases, a conductive film that functions as a semiconductor film is directly connected to a channel forming region of the semiconductor film. Therefore, in a transistor using an oxide semiconductor, a semiconductor film and a source electrode or The contact resistance between the drain electrode and the gate electrode is large, which prevents the improvement of the on-current. do.

[0005] In addition, in the case of a silicon-based transistor, a gate electrode or a resist is used as a mask. By adding impurities to the semiconductor film, a source region and a drain region are formed. The channel length can be controlled by adjusting the size of the gate electrode and resist. On the other hand, in a transistor using an oxide semiconductor, the channel length is controlled by the This is done by adjusting the spacing between the in-electrodes. The distance between the source and drain electrodes needs to be shortened, and depending on the size of the gate electrode The gate electrode and the source electrode or the drain electrode may partially overlap each other.

[0006] In the case of a top-gate transistor, where the gate electrode is located on top of the semiconductor film, the source electrode It is desirable to provide the source and drain electrodes under the semiconductor film. In order to ensure the step coverage of the semiconductor film at the edge of the doped electrode, It is necessary to reduce the film thickness of the source electrode and the drain electrode. Therefore, the resistance of the source and drain electrodes increases. However, it is difficult to increase the on-state current of a transistor.

[0007] Based on the above-mentioned technical background, the present invention is capable of increasing the on-current of a transistor. One of the objectives is to provide a semiconductor device that can [Means for solving the problem]

[0008] In a semiconductor device according to one aspect of the present invention, a transistor includes a pair of first conductive films on an insulating surface. a semiconductor film on the pair of first conductive films; and a pair of semiconductor films connected to the pair of first conductive films. the second conductive film, the insulating film on the semiconductor film, and the insulating film provided at a position overlapping the semiconductor film. The pair of first conductive films and the pair of second conductive films are connected to the source electrode. The first conductive film can function as a gate electrode or a drain electrode, and the third conductive film can function as a gate electrode. It is possible.

[0009] In one embodiment of the present invention, the direction in which carriers move in the semiconductor film, that is, the channel length direction, The distance between the source electrode and the drain electrode can be determined by the distance between the pair of first conductive films. Therefore, the distance between the pair of second conductive films is longer than the distance between the pair of first conductive films. Thus, the arrangement of the pair of second conductive films can be determined. When it becomes necessary to shorten the distance between the source electrode and the drain electrode due to miniaturization of transistors, In this case, the distance between the pair of first conductive films may be shortened, and the pair of second and third conductive films may be formed by the semiconductor device. The distance between the pair of second conductive films can be increased so that they do not overlap on the conductive film. Specifically, a pair of second conductive films are formed on the semiconductor film, with a gap therebetween, sandwiching the third conductive film. Therefore, even if the transistor is miniaturized, the third conductive film can be The electric field applied to the semiconductor film is not easily obstructed by the pair of second conductive films, resulting in a high on-state current. You can get the flow.

[0010] In one embodiment of the present invention, a pair of first conductive films is provided under a semiconductor film, and a pair of first conductive films is provided over the semiconductor film. The third conductive film is present. Therefore, as transistors are miniaturized, the gap between the pair of first conductive films By shortening the distance, the third conductive film functioning as the gate electrode and the pair of first conductive films overlap. However, the electric field applied to the semiconductor film from the third conductive film is blocked by the pair of first conductive films. Therefore, even if the transistor is miniaturized, a high on-state current can be obtained.

[0011] In order to improve the step coverage of the semiconductor film at the ends of the pair of first conductive films, Even if the film thickness of the pair of first conductive films is kept small, the pair of first conductive films and the pair of second conductive films By connecting the first conductive film and the second conductive film to each other, Therefore, the resistance of the source electrode or drain electrode can be kept low.

[0012] Alternatively, in a semiconductor device according to one aspect of the present invention, in addition to the above configuration, a pair of second conductive films It may be located on the semiconductor film.

[0013] When the pair of second conductive films is located on the semiconductor film, the pair of second conductive films is spaced apart from the semiconductor film. In the case where a pair of first conductive films and a second conductive film functioning as a source electrode or a drain electrode are formed, A large area can be secured where the pair of second conductive films contact the semiconductor film. Therefore, even if the transistor is miniaturized, it is possible to form a transistor that is made up of a pair of first conductive films and a pair of second conductive films. Therefore, the contact resistance between the source electrode or drain electrode and the semiconductor film can be reduced. Therefore, a high on-current can be obtained. [Effects of the Invention]

[0014] In one embodiment of the present invention, a semiconductor device including a transistor with high on-state current having the above structure is provided. This can be achieved. [Brief explanation of the drawings]

[0015] [Figure 1] 1A and 1B are diagrams illustrating the structure of a transistor included in a semiconductor device according to one embodiment of the present invention. [Figure 2] 1A and 1B are diagrams illustrating the structure of a transistor included in a semiconductor device according to one embodiment of the present invention. [Figure 3] 1A and 1B are diagrams illustrating the structure of a transistor included in a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A and 1B are diagrams illustrating the structure of a transistor included in a semiconductor device according to one embodiment of the present invention. [Figure 5] 1A and 1B are diagrams illustrating the structure of a transistor included in a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 9] FIG. 2 is a diagram showing the configuration of a memory cell. [Figure 10] FIG. 1 is a diagram showing the configuration of a storage device. [Figure 11] FIG. 2 is a diagram showing the configuration of an inverter. [Figure 12] Electronic equipment illustration. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and aspects thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0017] The present invention can be applied to any device using transistors, such as integrated circuits, RF tags, and semiconductor display devices. The category includes all semiconductor devices. logic circuit, DSP (Digital Signal Processor), microcomputer LSI (Large Scale Integrated Circuit) including the t), FPGA (Field Programmable Gate Array) and C Programmable logic circuits (PLD: Programmable Logic Devices) such as PLD (Complex PLD) The category includes semiconductor devices. The display device uses a light-emitting element, typically a liquid crystal display (LCD) or an organic light-emitting diode (OLED), for each pixel. Equipped with light-emitting device, electronic paper, DMD (Digital Micromirror Display) device), PDP (Plasma Display Panel), FED (Fie LD Emission Display) and other LCDs that have transistors in the drive circuit Semiconductor display devices fall into this category.

[0018] (Embodiment 1) FIG. 1 illustrates a structure of a transistor in a semiconductor device according to one embodiment of the present invention. ) is an example of a cross-sectional view of the transistor in the channel length direction.

[0019] The transistor shown in FIG. 1A has a first conductive film 101 and a first conductive film 102 on an insulating surface. and a semiconductor film 103 on the first conductive film 101 and the first conductive film 102, and and a second conductive film 104 and a second conductive film 105 connected to the first conductive film 102, respectively. , an insulating film 106 on the semiconductor film 103, and a second conductive film 10 A third conductive film is provided between the second conductive film 105 and the semiconductor film 103. and a membrane 107.

[0020] The first conductive film 101 and the second conductive film 104, and the first conductive film 102 and the second conductive film 105 The third conductive film 107 functions as a gate electrode. It works.

[0021] The semiconductor film 103 does not completely cover the first conductive film 101 and the first conductive film 102. The first conductive film 101 and the second conductive film 102 are partially covered with the first conductive film 101 and the second conductive film 102. The portions of the film 101 and the first conductive film 102 that are not covered by the semiconductor film 103 That is, in the portion other than the portion overlapping with the semiconductor film 103, the first conductive film 101 and The first conductive film 102 is connected to the second conductive film 104 and the second conductive film 105, respectively. There are.

[0022] The first conductive film 101 and the first conductive film 102, and the second conductive film 104 and the second conductive film 10 The connection between the first conductive film 101 and the second conductive film 104 or the first conductive film 105 is not necessarily the same as the connection between the first conductive film 101 and the second conductive film 104. This does not mean that the second conductive film 102 is in direct contact with the second conductive film 105. An insulating film such as a native oxide film having a thickness small enough to ensure an electrical connection is formed on the first conductor. Between the conductive film 101 and the second conductive film 104, or between the first conductive film 102 and the second conductive film 105 It may be provided in.

[0023] In one embodiment of the present invention, the end 107 of the third conductive film 107 on the semiconductor film 103 The second conductive film 104 and the second conductive film 105 are provided on either side of the insulating film e and spaced apart from each other. That is, the second conductive film 104, the second conductive film 105, and the third conductive film 107 are semiconductors. They do not overlap on the body membrane 103.

[0024] In addition, in the channel length direction, the end 104e of the second conductive film 104 and the end 104f of the second conductive film 105 Between the ends 105e, an end 101e of the first conductive film 101 located under the semiconductor film 103; and an end 102e of the first conductive film 102. 102e is the end of the first conductive film 101 located at the closest position in the channel length direction. and the end of the first conductive film 102. The distance Lsd between the end 104e of the first conductive film 104 and the end 105e of the second conductive film 105 is 1 and the end 102e of the first conductive film 102.

[0025] In one embodiment of the present invention, the first conductive film 101 and the second conductive film 102 function as a source electrode or a drain electrode. The semiconductor film 1 is disposed between the first conductive film 102 and the third conductive film 107 which functions as a gate electrode. Therefore, the third conductive film 107 and the semiconductor film 103 are located in the insulating film 106. Unlike the case where the first conductive film 101 and the first conductive film 102 are provided between the transistors, Even if the distance Lc is shortened due to miniaturization of the photoresist, the electric field applied from the third conductive film 107 to the semiconductor film 103 The electric field obtained is less likely to be obstructed by the first conductive film 101 and the first conductive film 102. Therefore, even if the transistor is miniaturized, a high on-current can be obtained.

[0026] In addition, at the end 101e of the first conductive film 101 and the end 102e of the first conductive film 102, In order to increase the step coverage of the semiconductor film 103, the first conductive film 101 and the first conductive film Even if the thickness of the first conductive film 101 and the second conductive film 102 is kept small, The conductive film 104 and the second conductive film 105 are connected to each other, so that the first conductive film 101 and the second conductive film 105 are connected to each other. The source electrode is composed of the first conductive film 102 and the second conductive film 104 and the second conductive film 105. Therefore, the resistance of the source or drain electrode can be kept low.

[0027] Next, FIG. 1B shows a top view of a transistor having the cross-sectional structure shown in FIG. An example is shown in FIG. 1B. However, in order to clarify the layout of the transistors, 1B. The insulating film 106 is omitted from the top view. The cross-sectional view corresponds to FIG. 1(A).

[0028] In the top view shown in FIG. 1B, the semiconductor film 103 has an opening 108 and an opening 109. In the opening 108, the first conductive film 101 and the second conductive film 104 are connected. In addition, the first conductive film 102 and the second conductive film 105 are connected in the opening 109. are.

[0029] Next, FIG. 1C shows a top view of a transistor having the cross-sectional structure shown in FIG. Another example is shown in FIG. 1C. However, in order to clarify the layout of the transistors, 1(C) shows a top view in which the insulating film 106 is omitted. The cross-sectional view in this case corresponds to FIG. 1(A).

[0030] In the top view shown in FIG. 1(C), the semiconductor film 103 is separated into three parts. The gap between the semiconductor film 103 corresponds to the opening 108 and the opening 109. In the opening 10, the first conductive film 101 and the second conductive film 104 are connected. In 9, the first conductive film 102 and the second conductive film 105 are connected.

[0031] In the transistor shown in FIG. 1, the second conductive film 104 or the second conductive film 105 is The conductive film 101 is connected only to the upper portion of the first conductive film 102. However, in one embodiment of the present invention, the second conductive film 104 or the second conductive film 105 is The upper and end portions of the conductive film 101 or the first conductive film 102 are connected to each other. is also good.

[0032] FIG. 2 illustrates an example of a structure of a transistor in a semiconductor device according to one embodiment of the present invention. 2B is an example of a cross-sectional view of the transistor shown in FIG. 2B is an example of a top view of a transistor having a cross-sectional structure. In order to clarify the layout of the transistors, the insulating film 106 is omitted from the top view. Also, the cross-sectional view taken along the dashed dotted line B1-B2 in FIG. 2(B) corresponds to FIG. 2(A).

[0033] The transistor shown in FIG. 2 has a first conductive film 101 and a second conductive film 102 on an insulating surface. The semiconductor film 103 on the first conductive film 101 and the first conductive film 102, and the semiconductor film 103 on the first conductive film 101 and the first conductive film 102 The second conductive film 102 is connected to the conductive film 102 and is located on the semiconductor film 103. the insulating film 106 on the semiconductor film 103; and a third conductive film 107 provided at a position overlapping the semiconductor film 103.

[0034] In the transistor shown in FIG. 2, the second conductive film 104 and the second conductive film 105 are The upper part of the conductive film 101 or the upper part of the first conductive film 102 is not limited to the end of the first conductive film 101. 1 in that it is also connected to the end of the first conductive film 102. Therefore, the first conductive film 101 and the first conductive film 102 are formed on the insulating surface. The area of ​​the region where the transistor is provided (occupied area) is different from that of the transistor shown in FIG. If the transistor shown in FIG. 2 is the same as the transistor shown in FIG. The area of ​​the portion where the first conductive film 102 and the second conductive film 104 are connected, or the area of ​​the portion where the first conductive film 102 and the second conductive film The area of ​​the portion where the film 105 is connected is secured to be larger than that of the transistor shown in FIG. Therefore, the contact resistance between the first conductive film 101 and the second conductive film 104 or the first The contact resistance between the conductive film 102 and the second conductive film 105 can be reduced.

[0035] 1 and 2, the second conductive film 104 and the second conductive film 105 are semiconductor films. However, in one embodiment of the present invention, the second conductive film 10 The fourth or second conductive film 105 may be separated from the semiconductor film 103 .

[0036] FIG. 3 illustrates a structure of a transistor in a semiconductor device according to one embodiment of the present invention. 3B is an example of a cross-sectional view of the transistor shown in FIG. 3B is an example of a top view of a transistor having a cross-sectional structure. In order to clarify the layout of the transistors, the insulating film 106 is omitted from the top view. Also, the cross-sectional view taken along the dashed dotted line C1-C2 in FIG. 3(B) corresponds to FIG. 3(A).

[0037] The transistor shown in FIG. 3 has a first conductive film 101 and a second conductive film 102 on an insulating surface. The semiconductor film 103 on the first conductive film 101 and the first conductive film 102, and the semiconductor film 103 on the first conductive film 101 and the first conductive film 102 The second conductive film 102 is connected to the conductive film 102 and is separated from the semiconductor film 103. the conductive film 104 and the second conductive film 105, the insulating film 106 on the semiconductor film 103, and the insulating film 106 A third conductive film 107 is provided on the semiconductor film 103 at a position overlapping the semiconductor film 103 .

[0038] In the transistor shown in FIG. 3, the second conductive film 104 or the second conductive film 105 is a semiconductor film 10 1 and 2 in that it is separated from the transistor 3. The structure is different.

[0039] As shown in FIGS. 1 and 2, the second conductive film 104 and the second conductive film 105 are When the semiconductor film 103 is in contact with the second conductive film 104, as shown in FIG. 105 is separated from the semiconductor film 103, the semiconductor film 105 is more likely to function as a source electrode or a drain electrode. The first conductive film 101 and the second conductive film 104 functioning as a conductive film. The area where the semiconductor film 105 comes into contact with the semiconductor film 103 can be secured to be large. Even if the transistor is miniaturized, the second conductive film 104 and the second conductive film 105 are semiconductors. By configuring the first conductive film 101 and the second conductive film 104 to be in contact with the conductive film 103, The contact resistance of the conductive film 103, or the contact resistance of the first conductive film 102 and the second conductive film 105 with the semiconductor film 1 The contact resistance of 03 can be kept small, and a high on-current can be obtained.

[0040] In addition, the transistor of the semiconductor device according to one aspect of the present invention includes a first conductive film 101 or a first A fourth conductive film may be provided under the conductive film 102. 1 illustrates an example of a cross-sectional view of a transistor of a semiconductor device according to the present invention.

[0041] The transistor shown in FIG. 4A has the cross-sectional structure shown in FIG. , a fourth conductive film 110 and a fourth conductive film 111 are added. The transistor shown in (A) has a first conductive film 101 and a first conductive film 102, and a first conductive film 1 The semiconductor film 103 on the first conductive film 101 and the first conductive film 102, and the first conductive film 101 and the first conductive film 10 2, the second conductive film 104 and the second conductive film 105, and the semiconductor film 103 and a first insulating film 106 on the first insulating film 106 at a position overlapping the semiconductor film 103. and a third conductive film 107 formed on the first conductive film 1. The first conductive film 101 and the second conductive film 102 are connected to the first conductive film 101 and the second conductive film 102, respectively. The fourth conductive film 110 and the fourth conductive film 111 are connected to each other. The layer has a second insulating film 120 provided between the first insulating film 1 and the second insulating film 120. Chemical Mechanical Polishin (CMP) g) It is desirable to flatten the surface by etching or the like.

[0042] The fourth conductive film 110 and the fourth conductive film 111 are connected to the first conductive film 101 and the first conductive film 102, The second conductive film 104 and the second conductive film 105 together form a source electrode or a drain electrode of a transistor. Therefore, by providing the fourth conductive film 110 and the fourth conductive film 111, , the first conductive film 101 and the second conductive film 104 functioning as a source electrode or a drain electrode. , and the resistance of the entire fourth conductive film 110, and the resistance of the first conductive film 102, the second conductive film 105, and the fourth conductive film 110. The resistance of the entire conductive film 111 can be kept low.

[0043] The fourth conductive film 110 or the fourth conductive film 111 and the first conductive film 101 or the first conductive film A semiconductor film may be provided between the electrodes 102. 1 illustrates an example of a cross-sectional view of a transistor of a semiconductor device according to an embodiment.

[0044] The transistor shown in FIG. 4B includes a first conductive film 101, a second conductive film 102, and a fourth conductive film. The semiconductor film 112 and the semiconductor film 113 are provided between the film 110 and the fourth conductive film 111, respectively. In this respect, the structure of the transistor in FIG. 4A is different from that of the transistor in FIG.

[0045] In FIG. 4, a fourth conductive film is provided under the transistor having the cross-sectional structure shown in FIG. However, one embodiment of the present invention is not limited to this configuration. A fourth conductive film is provided under a transistor having a cross-sectional structure shown in FIG. That's fine.

[0046] In the transistors shown in FIGS. 1 to 4, the first conductive film 101 and the first conductive film 102 However, the second conductive film 107 overlaps the first conductive film 107 via the semiconductor film 103 and the insulating film 106. In one aspect of the present invention, the first conductive film 101, the first conductive film 102, and the third conductive film 107 The second conductive film 107 must not overlap with the semiconductor film 103 and the insulating film 106 interposed therebetween. is also good.

[0047] FIG. 5A shows the cross-sectional structure of the transistor shown in FIG. 1A. The distance Lc between the end 101e of the first conductive film 101 and the end 102e of the first conductive film 102 is 5A shows the relationship between the length Lg of the third conductive film 107 and the spacing Lc 5A, the third conductive film 107 is a semiconductor film 103 and the Lov region 114 overlapping the first conductive film 101 with the insulating film 106 sandwiched therebetween. The third conductive film 107 is formed on the first conductive film 10 with the semiconductor film 103 and the insulating film 106 sandwiched therebetween. 2 and an overlapping Lov region 115.

[0048] By providing the Lov region 114 or the Lov region 115, the on-current of the transistor can be increased. It can be done.

[0049] FIG. 5B shows a cross-sectional view of the transistor shown in FIG. 1A. The distance Lc between the end 101e of the first conductive film 101 and the end 102e of the second conductive film 102, and the channel length 5B shows the relationship between the length Lg of the third conductive film 107 in the direction of the arrow. The transistor shown in FIG. 5B has a first conductive film 101 and a first Between the conductive films 102, there is a region where the third conductive film 107 and the first conductive film 101 do not overlap. area, i.e., an area different from the area where the third conductive film 107 and the first conductive film 101 are provided. The transistor shown in FIG. Between the first conductive film 101 and the first conductive film 102, the third conductive film 107 and the first conductive film The area where the third conductive film 107 and the first conductive film 102 do not overlap, i.e., the area where the third conductive film 107 and the first conductive film 102 are provided. The Loff region 117 corresponds to a region different from the region where the Loff region is located.

[0050] By providing the Loff region 116 or the Loff region 117, the first conductive film 101 and Since the parasitic capacitance between the first conductive film 102 and the third conductive film 107 is kept small, the transistor This allows for faster operation of the star.

[0051] In the transistor of the semiconductor device according to one embodiment of the present invention, the semiconductor film 103 is formed of an oxide The semiconductor film 103 can be made of a wide-gap semiconductor such as an oxide semiconductor. When a conductor is used, dopants are added to the semiconductor film 103 to form source regions or An impurity region that functions as a drain region may be formed. The dopant may be, for example, helium, argon, xenon, etc. rare gases, and group 15 atoms such as nitrogen, phosphorus, arsenic, and antimony can be used. For example, when nitrogen is used as a dopant, the concentration of nitrogen atoms in the impurity region is 5× 10 19 / cm 3 More than 1×10 22 / cm 3 It is desirable that the following:

[0052] The oxide semiconductor contains at least indium (In) or zinc (Zn). It is preferable that the oxide contains In and Zn. In addition to these, as a stabilizer to reduce the variation in the electrical characteristics of the transistors It is preferable to have gallium (Ga). Also, tin (Sn) is used as a stabilizer. It is also preferable to have hafnium (Hf) as a stabilizer. It is also preferable to have aluminum (Al) as a stabilizer.

[0053] Other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Ru It may contain one or more of tetraethion (Tetrium) (Lu).

[0054] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and oxides of binary metals. In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides Oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, ternary metal oxides In-Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide Oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides , In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, I n-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In -Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides, which are oxides of quaternary metals, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide are used. The oxide semiconductor may contain silicon.

[0055] For example, an In-Ga-Zn oxide means an oxide containing In, Ga, and Zn. The ratio of In, Ga, and Zn is not important. In-Ga-Zn oxides have a sufficiently high resistance in the absence of an electric field, and It is possible to sufficiently reduce the current and the mobility is high, so it is suitable for use in semiconductor devices. It is suitable as a semiconductor material.

[0056] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3) or In:G In-Ga-Zn oxide with an atomic ratio of a:Zn=2:2:1 (=2 / 5:2 / 5:1 / 5) Alternatively, In:Sn:Zn=1: 1:1(=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn=2:1:5(=1 / 4:1 / 8:5 / 8) It is preferable to use an In-Sn-Zn oxide with a molecular ratio or an oxide with a composition close to that.

[0057] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. Therefore, even in In-Ga-Zn oxides, the mobility can be increased by reducing the defect density in the bulk. It can be done.

[0058] In addition, impurities such as water or hydrogen, which act as electron donors (donors), are reduced, and the acid The oxide semiconductor (purified Oxide) is highly purified by reducing the electron vacancies. An i-type semiconductor is an intrinsic semiconductor or is very close to an i-type semiconductor. Therefore, the transistor including the oxide semiconductor has a characteristic of having an extremely low off-state current. The band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more. The concentration of impurities such as moisture and hydrogen is sufficiently reduced. and a highly purified oxide semiconductor film having reduced oxygen vacancies is used. This allows the off-state current of the transistor to be reduced.

[0059] Specifically, the off-state current of a transistor using a highly purified oxide semiconductor for a semiconductor film is low. For example, when the channel width is 1×10 6 μm Even in a device with a channel length of 10 μm, the voltage between the source and drain electrodes (drain voltage When the voltage is in the range of 1V to 10V, the off-state current is measured by a semiconductor parameter analyzer. Below the limit, i.e., 1×10 -13 In this case, the characteristic of A or less can be obtained. The off-state current, which is the value obtained by dividing the on-state current by the channel width of the transistor, is 100 zA / μ m or less. Also, by connecting the capacitor and the transistor, A circuit that controls the charge flowing in or out of a capacitor element using the transistor is used to In this measurement, a highly purified oxide semiconductor film was used for the transistor. It is used in the channel formation region, and the charge amount per unit time of the capacitance element is used to calculate the capacitance of the transistor. The off-state current of the transistor was measured. It was found that an even lower off-state current of several tens of yA / μm can be obtained when the Therefore, a transistor using a highly purified oxide semiconductor film for a channel formation region has the following characteristics: The off-state current is significantly lower than that of a transistor using crystalline silicon.

[0060] Unless otherwise specified, the off-state current in this specification refers to the off-state current in an n-channel transistor. In this case, the drain electrode is set to a higher potential than the source and gate electrodes. When the potential of the gate electrode is 0 or less with respect to the potential of the source electrode, The off-state current in this specification refers to the current that flows between the drain electrode and the p In a channel type transistor, the drain electrode is lower than the source electrode and gate electrode. When the potential of the gate electrode is set to a reference potential, the potential of the gate electrode is set to 0 or less. This refers to the current that flows between the source and drain electrodes when the gate is on.

[0061] For example, the oxide semiconductor film may contain In (indium), Ga (gallium), and Zn ( It can be formed by sputtering using a target containing In-Ga- When the Zn-based oxide semiconductor film is formed by sputtering, it is preferable that the atomic ratio of In :Ga:Zn=1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or An In-Ga-Zn oxide target with an atomic ratio of 3:1:4 is used. an oxide semiconductor film is formed using an In-Ga-Zn oxide target having Polycrystals or CAAC (C Axis Aligned Crystal) are formed. In addition, the filling rate of the target containing In, Ga, and Zn is 90% or more. 0% or less, preferably 95% or more but less than 100%. As a result, the formed oxide semiconductor film becomes a dense film.

[0062] When an In-Zn oxide material is used as the oxide semiconductor, The atomic ratio of the metal elements is In:Zn=50:1 to 1:2 (converted to molar ratio, In2 O3:ZnO=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (molar number In terms of ratio, In2O3:ZnO=10:1 to 1:2), more preferably In:Zn = 1.5:1 to 15:1 (converted to mole ratio In2O3:ZnO = 3:4 to 15:2 For example, a target used to form an oxide semiconductor film made of an In-Zn oxide is When the atomic ratio is In:Zn:O=X:Y:Z, Z>1.5X+Y. The ratio of Zn By keeping the ratio within the above range, it is possible to achieve an improvement in mobility.

[0063] The oxide semiconductor film may be in a single-crystal, polycrystalline (also referred to as polycrystalline), amorphous, or other state. Take a stance.

[0064] Preferably, the oxide semiconductor film is a CAAC-OS (C Axis Aligned Cr The film is a crystalline oxide semiconductor.

[0065] The CAAC-OS film is neither completely single crystalline nor completely amorphous. is an oxide semiconductor film with a crystalline-amorphous mixed phase structure in which the amorphous phase contains crystalline and amorphous parts. The crystal part must be small enough to fit inside a cube with one side less than 100 nm. In addition, transmission electron microscopes (TEM) In the observation image by a microscope, the amorphous part and the amorphous part contained in the CAAC-OS film were The boundary between the crystal and the CAAC-OS film is not clear. Therefore, the CAAC-OS film has no grain boundary. The resulting decrease in electron mobility is suppressed.

[0066] The crystal part included in the CAAC-OS film has a c-axis that is the normal vector of the surface on which the CAAC-OS film is formed. The triangle is aligned parallel to the normal vector of the hole or surface and perpendicular to the ab plane. The metal atoms are arranged in a layered or hexagonal shape when viewed perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. The orientation of the a and b axes may be different. The range of 5° to 95° is also included. This also includes the range of 10° to 5°.

[0067] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be higher near the surface than near the growing surface. By adding impurities to the AC-OS film, the crystalline part in the impurity-doped region becomes amorphous. It may also be pawned.

[0068] The c-axis of the crystalline part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The CAAC-OS film shape (on which the film is formed) is Depending on the cross-sectional shape of the surface, the directions may differ from each other. The direction of the c-axis of the crystal is the normal vector of the surface on which the CAAC-OS film is formed. The direction of the crystal is parallel to the normal vector of the film or surface. is formed by carrying out a crystallization treatment such as a heat treatment after the film formation.

[0069] The electrical characteristics of a transistor using a CAAC-OS film change when irradiated with visible light or ultraviolet light. Therefore, the transistor has high reliability.

[0070] The CAAC-OS film can be formed by sputtering a polycrystalline oxide semiconductor target. The sputtering target is used to form a film by sputtering. Upon impact, the crystalline regions contained in the sputtering target cleave from the ab plane, forming a -b Peels off as flat or pellet-shaped sputtered particles with surfaces parallel to the plane In this case, the plate-like sputtered particles may be transferred to the substrate while maintaining their crystalline state. By reaching the plate, a CAAC-OS film can be formed.

[0071] In addition, the following conditions are preferably applied to form the CAAC-OS film.

[0072] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas can be reduced. A deposition gas at a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0073] In addition, by increasing the substrate heating temperature during film formation, the migration of sputtered particles after they reach the substrate is reduced. Specifically, the substrate heating temperature is set to 100°C or higher and 740°C or lower, preferably The film is formed at a temperature between 200°C and 500°C. When a plate-shaped sputtering particle reaches the substrate, migration occurs on the substrate, The flat surface of the sputtered particle adheres to the substrate.

[0074] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition can be reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. The product is %.

[0075] As an example of a sputtering target, an In-Ga-Zn-O compound target is The following are the results:

[0076] InO X powder, GaO Y Powder and ZnO Z The powders are mixed in a specified number of moles and then pressurized. By heat treatment at a temperature between 1000℃ and 1500℃, polycrystalline In-Ga -Zn-O compound target, where X, Y, and Z are any positive numbers. , the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z Powder, 2 :2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2. The type of powder and the molar ratio of the powder to be mixed depend on the sputtering target to be prepared. This can be changed as appropriate depending on the kit.

[0077] (Embodiment 2) The semiconductor device according to one embodiment of the present invention may have a stacked structure of transistors. In particular, when a transistor having the structure shown in FIG. 4A is used, the fourth conductive film 110 or The fourth conductive film 111 is formed as a gate electrode, a source electrode, or a drain electrode of a transistor in a lower layer. By making it function as a contact electrode, the increase in device area due to the contact area is suppressed. To realize miniaturization of semiconductor devices or to realize reduction in the number of manufacturing steps of transistors can be done.

[0078] In this embodiment, a memory device, which is one of semiconductor devices, is taken as an example. The present invention has a configuration in which another transistor is provided below a transistor having a structure. A method for manufacturing a semiconductor device according to one embodiment will be described.

[0079] First, before describing a manufacturing method, a structure of a memory cell included in a memory device will be described. .

[0080] FIG. 9A shows a circuit diagram of a memory cell. The memory cell shown in FIG. 9A is a transistor. The gate of the transistor 202 is connected to the gate of the transistor 201. The source electrode of the transistor 202 is connected to the first word line WLa. One of the source electrode and drain electrode is connected to the data line DL, and the other is connected to the transistor 2. The transistor 201 has a source electrode and a drain electrode connected to the gate electrode of the transistor 201. One of the electrodes is connected to the data line DL, and the other is connected to a node to which a predetermined potential is applied. One of the pair of electrodes of the capacitor 203 is connected to the transistor 201. The other end is connected to the gate electrode of the second word line WLb.

[0081] In the memory cell shown in FIG. 9A, the transistor 202 is turned on when data is written. The potential of a signal including data is applied from the data line DL to the transistor 202. The potential of the signal is applied to the gate electrode of the transistor 201. The gate capacitance of 201 and the amount of charge stored in the capacitance element 203 are controlled. Data is written to the transistor 201 and the capacitor element 203 .

[0082] When data is held, the transistor 202 is turned off and the transistor 201 The charge stored in the gate capacitance and the capacitor 203 is held. When an oxide semiconductor is used for the semiconductor film, the off-state current of the transistor 202 can be made extremely small. Therefore, the stored charge is less likely to leak, and the transistor 202 It retains data for a longer period of time than semiconductor materials such as silicon. It is possible.

[0083] When reading data, the potential of the second word line WLb is changed. The potential difference between the pair of electrodes connected to the second word line WL The change in the potential of b is applied to the gate electrode of transistor 201. The threshold voltage of a gate transistor varies depending on the amount of charge stored in the gate capacitance. The potential of the gate electrode of the transistor 201 is changed. The difference in the amount of accumulated charge can be read from the magnitude of the drain current. can be read out.

[0084] Note that the transistor 201 may have a semiconductor film formed using an oxide semiconductor. Alternatively, the transistor 201 may have a semiconductor film made of silicon or germanium. The semiconductor films of all the transistors in the memory cell may be made of oxide semiconductor. By using a thin film, the process can be simplified. The semiconductor film may be made of a material other than an oxide semiconductor, such as polycrystalline or single-crystalline silicon. By using a semiconductor with high mobility, data can be read from memory cells at high speed. This can be done.

[0085] In this embodiment, silicon is used for the semiconductor film of the lower transistor 201, and silicon is used for the semiconductor film of the upper transistor. An example of manufacturing a semiconductor device will be described below, taking the case where an oxide semiconductor is used for the semiconductor film of the transistor 202 as an example. However, as described above, the lower layer transistor 201 is made of silicon. In addition to silicon, semiconductor materials such as germanium, silicon germanium, and single-crystal silicon carbide are also used. For example, a silicon-based transistor may be formed on a silicon wafer or the like. Any single crystal semiconductor substrate, silicon thin film produced by SOI method, produced by vapor phase epitaxy Alternatively, the lower transistor 2 may be formed using a silicon thin film or the like. Like the upper transistor, O1 may be made of an oxide semiconductor.

[0086] In this embodiment, first, as shown in FIG. 6(A), an insulating film 701 and a single layer are formed on a substrate 700. A semiconductor film 702 separated from the crystalline semiconductor substrate is formed.

[0087] There is no significant limitation on the material that can be used for the substrate 700, but at least it is necessary to use a material that can be used for subsequent processing. The substrate 700 must have heat resistance sufficient to withstand the heat treatment. Glass substrates manufactured by the fusion method or float method, quartz substrates, semiconductor substrates, ceramic A glass substrate can be used when the temperature of the subsequent heat treatment is high. It is advisable to use a material with a strain point of 730°C or higher.

[0088] In this embodiment mode, the semiconductor film 702 is made of single crystal silicon. A method for manufacturing the transistor 201 will be described below. An example of a method for manufacturing the film 702 will be briefly described. An ion beam consisting of ions accelerated by an electric field is injected into the bond substrate, and the surface of the bond substrate is The crystal structure is disrupted and a locally weakened embrittlement layer is formed in a region at a certain depth from the surface. The depth of the region where the embrittlement layer is formed depends on the acceleration energy of the ion beam and the The incident angle can be adjusted by the incident angle. Then, the bond substrate and the insulating film 701 are formed. The insulating film 701 is sandwiched between the substrate 700 and the insulating film 701. After the bond substrate and the substrate 700 are superposed, a 1N / cm 2 More than 500N / cm 2 Less than 11N / cm, preferably 2 More than 20N / cm 2 below When pressure is applied, the bond substrate and the insulating film 701 are bonded from that point. The bonding process begins, and eventually the entire surface is bonded. The volume of microvoids in the embrittlement layer increases, and the microvoids merge together. At the embrittlement layer, the single crystal semiconductor film, which is a part of the bond substrate, is separated from the bond substrate. The temperature of the heat treatment is set so as not to exceed the strain point of the substrate 700. The conductive film is processed into a desired shape by etching or the like to form a semiconductor film 702. This can be done.

[0089] The semiconductor film 702 is doped with boron, aluminum, gallium, or the like to control the threshold voltage. Impurity elements that impart p-type conductivity, or impart n-type conductivity such as phosphorus or arsenic An impurity element may be added. The addition of an impurity element to control the threshold voltage is performed by patterning. It may be performed on the semiconductor film before patterning, or on the semiconductor film 7 formed after patterning. The addition of impurity elements to control the threshold voltage may be performed on the BN layer. Alternatively, the addition of impurity elements may be performed on the substrate to roughly adjust the threshold voltage. To fine-tune the threshold voltage, the device is patterned on a bond substrate. This is performed on the previous semiconductor film or on the semiconductor film 702 formed by patterning. That's fine.

[0090] In this embodiment mode, an example in which a single crystal semiconductor film is used is described. For example, a multilayer film formed on the insulating film 701 by vapor deposition may be used. A crystalline, microcrystalline, or amorphous semiconductor film may be used, and the semiconductor film may be sintered by a known technique. Known crystallization methods include laser crystallization using laser light, catalytic element crystallization, and the like. Alternatively, a crystallization method using a catalytic element and a laser crystallization method may be combined. In addition, when a substrate with excellent heat resistance such as quartz is used, In this case, thermal crystallization method using an electric furnace, lamp annealing crystallization method using infrared light, catalytic element Alternatively, a crystallization method using a high-temperature annealing method at about 950° C. may be used.

[0091] Next, as shown in FIG. 6(B), after forming a gate insulating film 703 on the semiconductor film 702, A mask 705 is formed on the gate insulating film 703, and an impurity element that gives conductivity is introduced into the semiconductor film By doping a part of 702, an impurity region 704 is formed.

[0092] The gate insulating film 703 is formed by performing high density plasma treatment, heat treatment, etc. The surface of the silicon dioxide film can be formed by oxidizing or nitriding the silicon dioxide film. For example, rare gases such as He, Ar, Kr, and Xe, and oxygen, nitrogen oxide, ammonia, nitrogen, and hydrogen. In this case, the plasma is excited by introducing microwaves. This allows for the generation of high density plasma at low electron temperatures. Oxygen radicals (which may contain OH radicals) and nitrogen radicals (NH The surface of the semiconductor film is oxidized or nitrided by the reaction (which may contain radicals), An insulating film having a thickness of 1 to 20 nm, preferably 5 to 10 nm, can be formed so as to be in contact with the semiconductor film. For example, nitrous oxide (NO) is diluted 1 to 3 times (flow ratio) with Ar to obtain a pressure of 10 Pa to 30 A microwave (2.45 GHz) power of 3 kW to 5 kW was applied at a pressure of 100 Pa to form a semiconductor film. The surface of 702 is oxidized or nitrided by this treatment. An insulating film (2nm to 6nm) is formed. Nitrous oxide (N2O) and silane (SiH4) are then and microwaves (2.45 GHz) of 3 kW to 5 kW at a pressure of 10 Pa to 30 Pa were introduced. ) Electric power is applied to form a silicon oxynitride film by vapor phase growth to form a gate insulating film. By combining solid-state reactions and reactions using vapor phase growth methods, the interface state density is low and the dielectric strength is high. Therefore, a gate insulating film having excellent properties can be formed.

[0093] The oxidation or nitridation of the semiconductor film by the high-density plasma treatment described above proceeds as a solid-phase reaction. The interface state density between the insulating film 703 and the semiconductor film 702 can be made extremely low. The insulating film formed by directly oxidizing or nitriding the semiconductor film 702 by high-density plasma treatment In addition, when the semiconductor film has crystallinity, it is possible to suppress the variation in the thickness of the insulating film. By using a high-temperature plasma treatment to oxidize the surface of the semiconductor film through a solid-phase reaction, This prevents oxidation from progressing too quickly only at the gate electrode, resulting in a gate with good uniformity and low interface state density. The insulating film formed by the high density plasma treatment can be used as a gate insulating film. The transistor formed by including the insulating film in part or all of the insulating film can suppress the variation in characteristics. can be done.

[0094] In addition, silicon oxide, silicon nitride oxide, and oxide are formed by using a plasma CVD method or a sputtering method. Silicon nitride, silicon nitride, hafnium oxide, aluminum oxide or tantalum oxide, tantalum oxide Thorium, hafnium silicate (HfSi x O y (x>0, y>0)), nitrogen is added Hafnium silicate (HfSi x O y (x>0, y>0)), nitrogen-added ha HfAl x O y (x>0, y>0)) etc., as a single layer, or The gate insulating film 703 may be formed by stacking.

[0095] In this specification, an oxynitride is a compound having a composition in which oxygen is contained more than nitrogen. Nitrogen oxide is a substance that contains more nitrogen than oxygen. It means substance.

[0096] The thickness of the gate insulating film 703 is, for example, 1 nm or more and 100 nm or less, preferably 10 nm. In this embodiment, the thickness can be increased to 50 nm or less by using a plasma CVD method. A single layer insulating film containing silicon oxide is used as the gate insulating film 703 .

[0097] Next, after removing the mask 705, as shown in FIG. 6(C), a portion of the gate insulating film 703 is The portion is removed, and an opening 706 is formed in the region overlapping the impurity region 704 by etching or the like. After forming the conductive film 707, a conductive film 708 is formed. 01 and the source or drain electrode of the transistor 202. The conductive film 708 is formed as a source electrode or a drain electrode of the transistor 201, and serves as a source electrode or a drain electrode of the transistor 202.

[0098] The conductive films 707 and 708 are formed by forming a conductive film so as to cover the opening 706 and then removing the conductive film. The conductive film 7 can be formed by processing (patterning) the conductive film into a predetermined shape. The conductive film 708 is in contact with the impurity region 704 at the opening 706. The VD method, sputtering method, vapor deposition method, spin coating method, etc. can be used. The conductive film is made of tantalum (Ta), tungsten (W), titanium (Ti), and molybdenum (Mo). , aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc. An alloy containing the above metal as a main component may be used, or a compound containing the above metal may be used. Alternatively, a multi-layer semiconductor film may be formed by doping an impurity element such as phosphorus that provides conductivity to the semiconductor film. It may also be formed using a semiconductor such as crystalline silicon.

[0099] Note that in this embodiment mode, the conductive films 707 and 708 are formed as single-layer conductive films. However, this embodiment is not limited to this structure. It may be formed of a plurality of conductive films.

[0100] The combination of two conductive films is tantalum nitride or tantalum for the first layer and tantalum for the second layer. In addition to the above examples, tungsten nitride and tungsten nitride can be used. Examples include molybdenum and molybdenum, aluminum and tantalum, and aluminum and titanium. Tungsten and tantalum nitride have high heat resistance, so they can be used in the process after forming the two-layer conductive film. In this process, a heat treatment can be performed for the purpose of thermal activation. As a combination, for example, silicon doped with an impurity element that gives n-type conductivity and nickel silicide, and silicon and nickel silicide doped with impurity elements that give n-type conductivity. Also usable are tungsten silicide and the like.

[0101] In the case of a three-layer structure in which three conductive films are stacked, a molybdenum film, an aluminum film, and a molybdenum film are used. It is advisable to adopt a laminated film structure.

[0102] The conductive films 707 and 708 are formed using indium oxide or a mixture of indium oxide and tin oxide. , indium oxide zinc oxide mixture, zinc oxide, zinc aluminum oxide, zinc aluminum oxide nitride A light-transmitting conductive oxide film such as aluminum or zinc gallium oxide can also be used. .

[0103] Note that the conductive films 707 and 708 are selectively formed by a droplet discharge method without using a mask. The droplet ejection method is a method of ejecting or spraying droplets containing a predetermined composition from a fine hole. This refers to a method of forming a predetermined pattern by printing, and inkjet methods are included in this category. can be.

[0104] The conductive films 707 and 708 are formed by ICP (Inductively Coupled Plasma) deposition. Inductively Coupled Plasma (Inductively Coupled Plasma) etching method is used to The switching conditions (amount of power applied to the coil-type electrode layer, amount of power applied to the substrate-side electrode layer) By appropriately adjusting the temperature of the electrode on the substrate side, etc., a desired tapered shape can be obtained. The tapered shape can be adjusted by etching depending on the shape of the mask. The etching gas can also be chlorine, boron chloride, or silicon chloride. or chlorine-based gases such as carbon tetrachloride, fluorine-based gases such as carbon tetrafluoride, sulfur fluoride, or nitrogen fluoride. Nitrogen-based gases or oxygen can be used as appropriate.

[0105] Next, as shown in FIG. 6D, a conductive film is formed by using the conductive film 707 and the conductive film 708 as a mask. By adding an impurity element that imparts a conductivity to the semiconductor film 702, a channel overlapping with the conductive film 707 is formed. a pair of impurity regions 709 sandwiching the channel forming region 710; The impurity region 711, which is a region of the pure material 704 to which an impurity element is further added, is formed in the semiconductor film 7. Formed at 02.

[0106] In this embodiment, an impurity element (for example, boron) that imparts p-type conductivity is added to the semiconductor film 702. Let us take the following example.

[0107] Next, as shown in FIG. 7(A), the gate insulating film 703, the conductive film 707, and the conductive film 708 are Insulating films 712 and 713 are formed to cover the insulating film 712 and the insulating film 713. 713 is silicon oxide, silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum nitride, nitride An inorganic insulating film such as aluminum oxide can be used. By using a low-k material for the film 713, it is possible to overlap various electrodes and wiring. This is preferable because it is possible to sufficiently reduce the capacitance caused by the insulating film 712. The insulating film 713 may be a porous insulating film made of the above-mentioned material. Since the dielectric constant is lower than that of a high-density insulating film, the parasitic capacitance caused by electrodes and wiring can be reduced. Further reductions are possible.

[0108] In this embodiment mode, the insulating film 712 is made of silicon oxynitride, and the insulating film 713 is made of silicon nitride oxide. In this embodiment, the conductive film 707 and the conductive film 708 are formed on the conductive film 707 and the conductive film 708. In the example shown, insulating films 712 and 713 are formed on the conductive film 7 Only one insulating layer may be formed over the conductive film 707 and the conductive film 708, or a plurality of insulating layers of three or more may be formed. The insulating film may be formed by laminating layers.

[0109] Next, as shown in FIG. 7B, the insulating film 712 and the insulating film 713 are subjected to CMP or etching. By performing etching or the like, the surfaces of the conductive films 707 and 708 are exposed. , an insulating film 712, an insulating film 202, and an insulating film 302 are formed in order to improve the characteristics of the transistor 202 to be formed later. It is preferable to keep the surface of 713 as flat as possible.

[0110] Through the above steps, the transistor 201 can be formed.

[0111] Next, a manufacturing method of the transistor 202 will be described. Then, a conductive film 714 and a conductive film 715 are formed over the conductive film 707 or the conductive film 708. The conductive film 714 and the conductive film 715 are connected to the source electrode and the drain electrode of the transistor 202. It functions as such.

[0112] Specifically, the conductive films 714 and 715 are formed by the conductive films 707 and 708 and the insulating film After forming a conductive film by sputtering or vapor deposition so as to cover the insulating film 712 and the insulating film 713, It can be formed by processing (patterning) the conductive film into a predetermined shape. The conductive film 714 and the conductive film 715 are formed by an oxide film that is later formed on the conductive film 714 and the conductive film 715. To ensure good step coverage of the compound semiconductor film 716, its edges are tapered. Specifically, the conductive film 714 and the conductive film The taper angle at the end of 715 is 20 degrees or more and 80 degrees or less, more preferably 30 degrees or more. The angle is preferably 60 degrees or less. The thickness is 10 nm or more and 300 nm or less, more preferably 100 nm or more and 200 nm or less. It is desirable to do so.

[0113] The conductive films to be the conductive films 714 and 715 may be formed of aluminum, chromium, copper, tantalum, or An element selected from titanium, molybdenum, and tungsten, or a composite containing the above elements Examples of the metal include gold and alloy films made of the above elements. chromium, tantalum, titanium, molybdenum, tungsten, etc. on the underside or on the top of the metal film Any high melting point metal film may be laminated. Aluminum or copper has a heat resistance. To avoid problems with corrosion, it is recommended to use it in combination with high melting point metal materials. Metal materials include molybdenum, titanium, chromium, tantalum, tungsten, neodymium, Scandium, yttrium, etc. can be used.

[0114] The conductive films to be the conductive films 714 and 715 may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, A two-layer structure in which a titanium film is laminated on top of the titanium film, and an aluminum film is laminated on top of the titanium film. A three-layer structure is also possible, where a titanium film is deposited on top of the first layer. -Al alloy, Cu-Mg-O mixed oxide, Cu-Ca-O mixed oxide, Cu-Mg-Al -O mixed oxide, Mo-Ti alloy, Ti, and Mo have high adhesion to the oxide film. The layer contains Cu-Mg-Al alloy, Cu-Mg-O mixed oxide, Cu-Ca-O mixed oxide, C Conductive film consisting of U-Mg-Al-O mixed oxide, Mo-Ti alloy, Ti, or Mo A conductive film made of Cu with a low resistance value is laminated on the upper layer, and the laminated conductive film is By using the insulating film 714 and the conductive film 715, the insulating film 712 or the insulating film 713 can be formed as an oxide film. In this case, the adhesiveness between the insulating film 712 or the insulating film 713 and the conductive film 714 or the conductive film 715 is low. In addition, the resistance of the conductive films 714 and 715 can be reduced. This can be done.

[0115] The conductive films 714 and 715 are formed using a conductive metal oxide. Conductive metal oxides include indium oxide, tin oxide, zinc oxide, and indium oxide. Indium tin oxide mixture, indium oxide zinc oxide mixture or the above metal oxide material with silicon A material containing silicon or silicon oxide can be used.

[0116] Next, as shown in FIG. 8A, an oxide semiconductor film 714 is formed over the conductive film 715. The oxide semiconductor film 716 has an opening 717 over the conductive film 714. The oxide semiconductor film 716 has an opening 718 over the conductive film 715. 12 and an oxide semiconductor film formed over the insulating film 713, the conductive film 714, and the conductive film 715. can be formed by processing the above into the above shape.

[0117] The thickness of the oxide semiconductor film is 2 nm to 200 nm, preferably 3 nm to 50 nm. The oxide semiconductor film has a thickness of 100 nm or less, and more preferably 3 nm or more and 20 nm or less. The oxide semiconductor film is formed by sputtering using a rare gas as a target. under a gas (e.g., argon) atmosphere, an oxygen atmosphere, or a mixture of a noble gas (e.g., argon) and oxygen It can be formed by sputtering in a mixed atmosphere.

[0118] The oxide semiconductor film may be formed of any of the above-mentioned indium oxide, tin oxide, zinc oxide, and binary metal oxide. In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn -Mg-based oxides, Sn-Mg-based oxides, In-Mg-based oxides, In-Ga-based oxides, ternary In-Ga-Zn oxide (also called IGZO), which is an oxide of In-Al -Zn-based oxides, In-Sn-Zn-based oxides, Sn-Ga-Zn-based oxides, Al-Ga- Zn-based oxide, Sn-Al-Zn-based oxide, In-Hf-Zn-based oxide, In-La-Z n-based oxides, In-Ce-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides Oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides oxides, In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides In-Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides, which are oxides of quaternary metals oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-Sn -Al-Zn oxide, In-Sn-Hf-Zn oxide, In-Hf-Al-Zn oxide The oxide semiconductor may contain silicon.

[0119] In this embodiment, a tantalum containing In (indium), Ga (gallium), and Zn (zinc) is used. In-Ga-Zn oxide semiconductor with a thickness of 30 nm obtained by sputtering using a Zn target A thin film of a conductor is used as an oxide semiconductor film. The oxide target was In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. In addition, oxide ternary oxides with a molar ratio of In2O3:Ga2O3:ZnO=1:1:2 were used. A target containing In, Ga, and Zn may be used. The filling rate of the target is 90%. The target with a high filling rate is 95% or more and 100% or less, preferably 95% or more and less than 100%. By using the above, the formed oxide semiconductor film becomes a dense film.

[0120] When an In-Zn oxide is used as the oxide semiconductor, the metal in the target used The atomic number of elements is In:Zn = 50:1 to 1:2 (converted to molar ratio: In2O3: ZnO=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (molar ratio) In terms of conversion, In2O3:ZnO=10:1 to 1:2), more preferably In:Zn=1 5:1 to 1.5:1 (converted to molar ratio In2O3:ZnO = 15:2 to 3:4) For example, the target used to form an In-Zn oxide semiconductor has an atomic ratio of I When n:Zn:O=X:Y:Z, Z>1.5X+Y.

[0121] In addition, the target used for In-Sn-Zn oxide is The numerical ratio is In:Sn:Zn=1:2:2, 2:1:3, 1:1:1, or 20:45: An oxide target such as 35 is used.

[0122] In this embodiment, the substrate is held in a processing chamber maintained in a reduced pressure state, and the remaining moisture in the processing chamber is removed. While removing the hydrogen and moisture, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the target is used. During the deposition, the substrate temperature is set to 100° C. or higher and 600° C. or lower, preferably The temperature may be 200°C or higher and 400°C or lower. The concentration of impurities contained in the sputtered oxide semiconductor film can be reduced. To remove residual moisture in the processing chamber, an adsorption type vacuum pump is used. For example, a cryopump, an ion pump, a titanium sublimation pump, etc. It is preferable to use a displacement pump. As an exhaust means, a turbo pump with a A cryopump may be used to evacuate the processing chamber. For example, hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (more preferably carbon atoms Since the exhaust gas contains the oxide semiconductor film formed in the treatment chamber, The concentration of impurities can be reduced.

[0123] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, if a pulsed direct current (DC) power supply is used, dust generated during film formation can be reduced, and the film This is preferable because the thickness distribution is uniform.

[0124] Note that the etching for forming the oxide semiconductor film 716 can be dry etching or wafer etching. Dry etching may be used, or both may be used. The gases include chlorine-containing gases (chlorine-based gases, such as chlorine (Cl2) and boron trichloride (BCl 3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc.) are preferred. Fluorine-containing gases (fluorine-based gases, such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), Nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr), Oxygen (O2), and rare gases such as helium (He) and argon (Ar) added to these gases Gases such as those mentioned above can be used.

[0125] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A plasma-coupled plasma etching method can be used. As shown in the figure, the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) The amount of power, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0126] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Organic acids such as phosphoric acid and oxalic acid can be used. (manufactured by Kanto Chemical Co., Ltd.) is used.

[0127] The resist mask for forming the oxide semiconductor film 716 may be formed by an inkjet method. When a resist mask is formed by the inkjet method, a photomask is not used, Manufacturing costs can be reduced.

[0128] Note that the oxide semiconductor film formed by sputtering or the like contains moisture or hydrogen (water) as impurities. It may contain a large amount of water or hydrogen, which easily forms donor levels. Therefore, in one embodiment of the present invention, In order to reduce impurities such as water or hydrogen in the conductive film (dehydration or dehydrogenation), oxidation is performed. The compound semiconductor film 716 is subjected to a treatment under a reduced pressure atmosphere, an inert gas atmosphere such as nitrogen or a rare gas, or an acid atmosphere. Under nitrogen gas atmosphere or ultra-dry air (CRDS (Cavity Ring-Down Laser Spectroscopy) When measured using a dew point meter, the moisture content is 20 ppm (-55°C in dew point equivalent) or less. In an atmosphere of air, preferably 1 ppm or less, preferably 10 ppb or less, an oxide semiconductor The film 716 is subjected to a heat treatment.

[0129] By performing heat treatment on the oxide semiconductor film 716, moisture or hydrogen in the oxide semiconductor film 716 is removed. Specifically, the temperature is 250°C or higher and 750°C or lower, preferably 400°C or lower. The heat treatment may be performed at a temperature of 500°C or higher and lower than the distortion point of the substrate. For example, the heat treatment may be performed at 500°C for 3 minutes or more. The heat treatment can be carried out for approximately 6 minutes or less. If the RTA method is used for the heat treatment, dehydration or dehydration can be achieved in a short time. Since siliconization can be performed, processing can be performed at temperatures exceeding the strain point of the glass substrate.

[0130] In this embodiment, an electric furnace, which is one of the heat treatment devices, is used. The material to be treated is heated not only by the gas furnace but also by the heat conduction or heat radiation from a heating element such as a resistance heating element. A heating device may be provided. For example, a GRTA (Gas Rapid Therm al Anneal) equipment, LRTA (Lamp Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid Thermal Anneal) equipment, Use an RTA (Rapid Thermal Anneal) device such as a LRTA devices can be used with halogen lamps, metal halide lamps, and xenon arc lamps. lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps, etc. The GRTA device heats the object to be treated by radiating light (electromagnetic waves) emitted from the This equipment uses high-temperature gas for heat treatment. The gas can be a rare gas such as argon, or An inert gas such as nitrogen that does not react with the object to be treated by the heat treatment is used.

[0131] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is mixed with water or water. It is preferable that the nitrogen or helium introduced into the heat treatment device is not included. The purity of rare gases such as neon and argon is 6N (99.9999%) or more, preferably 7N (99.9999%) or more. N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm) pm or less).

[0132] Note that oxide semiconductors are insensitive to impurities, and the film contains a considerable amount of metal impurities. There is no problem even if it is used in a low-cost sodalite, which contains a large amount of alkali metals such as sodium. It has been pointed out that ash glass can also be used (Kamiya, Nomura, Hosono, "Amorphous Oxide Semiconductors" "Current Status of Physical Properties and Device Development," Solid State Physics, September 2009, Vol. 44, pp. 62 1-633.) However, this is not an appropriate indication. Alkali metals do not form oxide semiconductors. Alkaline earth metals are not constituent elements of oxide semiconductors, so they are considered impurities. In particular, Na, among alkali metals, is an impurity when it is not an element that is present in the alloy. When the insulating film in contact with the semiconductor film is an oxide, Na diffuses into the insulating film. + It becomes. In addition, Na breaks the bond between the metal and oxygen that constitute the oxide semiconductor in the oxide semiconductor film. As a result, for example, the threshold voltage may change in the negative direction. This shift leads to deterioration of transistor characteristics, such as normally-on and reduced mobility. This impurity causes transistor characteristics to vary. The deterioration and variation of the characteristics occur when the hydrogen concentration in the oxide semiconductor film is sufficiently low. Therefore, the hydrogen concentration in the oxide semiconductor film is 1×10 18 / cm 3 below, Especially 1×10 17 / cm 3 If the concentration of the impurities is less than 100%, it is desirable to reduce the concentration of the impurities. Specifically, the measured value of the Na concentration by secondary ion mass spectrometry is 5 × 10 16 / cm 3 Less than 1 × 1016 / cm 3 or less, more preferably 1 × 10 15 / cm 3 Below Similarly, the measured value of Li concentration is 5×10 15 / cm 3 Below, preferably 1×10 15 / cm 3 Similarly, the measured value of the K concentration should be 5 x 10 15 / c m 3 Less than 1 × 10 15 / cm 3 The following would be appropriate.

[0133] Through the above steps, the hydrogen concentration in the oxide semiconductor film 716 can be reduced and the oxide semiconductor film 716 can be highly purified. This makes it possible to stabilize the oxide semiconductor film. The following heat treatment produces an oxide semiconductor film with extremely low carrier density and a wide band gap. Therefore, a transistor can be manufactured using a large-area substrate. This allows for improved mass production. By using a compound semiconductor film, it is possible to fabricate a transistor with high voltage resistance and extremely low off-current. It is possible.

[0134] Note that the oxide semiconductor film may be amorphous or may have crystallinity. As the oxide semiconductor film having the c-axis orientation, Even if the oxide semiconductor contains ionized crystal, the reliability of the transistor is still high. This is preferable because it can provide the effect of increasing the

[0135] An oxide semiconductor film composed of CAAC can also be fabricated by a sputtering method. To obtain CAAC by sputtering, the oxide semiconductor film must be deposited at the initial stage. The crystals are grown using the hexagonal crystals as seeds. To achieve this, it is important to keep the distance between the target and the substrate as large as possible (for example, For example, about 150 mm to 200 mm), and the substrate heating temperature is set to 100°C to 500°C, preferably 20 The temperature is preferably 0 to 400°C, more preferably 250 to 300°C. In addition, the deposited oxide semiconductor film is heat-treated at a temperature higher than the substrate heating temperature during film formation. This makes it possible to repair micro defects contained in the film and defects at the interface of the stacked layers.

[0136] CAAC-OS(C Axis Aligned Crystalline Oxide Compared to amorphous oxide semiconductors, amorphous oxide semiconductors are made of metal and oxygen bonds. In other words, when the oxide semiconductor is amorphous, the individual metal atoms form an ordered structure. The coordination number of the metal atom in CAAC-OS is almost constant. Therefore, microscopic oxygen vacancies are reduced, and hydrogen atoms (including hydrogen ions) and alkalis are released. This has the effect of reducing charge transfer and instability due to the release and bonding of lithium metal atoms.

[0137] Therefore, a transistor can be manufactured using an oxide semiconductor film formed of CAAC-OS. After applying light or bias-thermal stress (BT) to the transistor, The amount of change in the threshold voltage of the transistor that occurs can be reduced. Therefore, a transistor having the desired electrical characteristics can be manufactured.

[0138] Next, as shown in FIG. 8B, a conductive film in contact with the conductive film 714 and the oxide semiconductor film 716 is A conductive film 719 and a conductive film 720 in contact with the conductive film 715 and the oxide semiconductor film 716 are formed. The conductive films 719 and 720 are made of the same material as the conductive films 714 and 715. The laminated structure of can be formed by using a similar manufacturing method.

[0139] Note that in the etching for forming the conductive films 719 and 720, the oxide semiconductor The materials and etching conditions are appropriately adjusted so that the film 716 is removed as little as possible. Depending on the etching conditions, the exposed portion of the oxide semiconductor film 716 may be partially etched. As a result of this, grooves (recesses) may be formed.

[0140] In this embodiment, a titanium film is used for the conductive film 719 and the conductive film 720. A solution containing ammonium hydroxide and hydrogen peroxide (ammonia hydrogen peroxide) is used to selectively form the conductive film 719 and The conductive film 720 can be wet-etched. Ammonia was prepared by mixing hydrogen chloride water, 28% by weight of ammonia water, and water in a volume ratio of 5:2:2. Alternatively, gases containing chlorine (Cl2), boron chloride (BCl3), etc. may be used. The conductive film may then be dry-etched.

[0141] In addition, the oxide semiconductor film 716 and the conductive film 71 functioning as a source electrode or a drain electrode Between the conductive film 720 and the conductive film 720, zinc oxide, zinc aluminum oxide, zinc aluminum oxide nitride Alternatively, a conductive metal oxide film such as zinc oxide or zinc gallium oxide may be provided. For example, in the case of forming a metal oxide film, patterning for forming the metal oxide film, The conductive film 719 and the conductive film 720 are patterned together. By providing the metal oxide film, the oxide semiconductor film 716, the conductive film 719, and the conductive film 719 can be formed. The resistance between the conductive film 720 can be reduced, thereby realizing high-speed operation of the transistor. Furthermore, by providing a metal oxide film, the withstand voltage of the transistor can be increased. can.

[0142] Next, a plasma treatment using a gas such as N2O, N2, or Ar may be performed. This plasma treatment removes water and the like attached to the exposed surface of the oxide semiconductor film. Alternatively, a plasma treatment may be performed using a mixed gas of oxygen and argon.

[0143] After the plasma treatment, the conductive film 719 and the conductive film 72 A gate insulating film 721 is formed to cover the oxide semiconductor film 716. A conductive film 722 is formed over the gate insulating film 721 so as to overlap with the oxide semiconductor film 716. A conductive film 722 is formed on the transistor, and a conductive film 723 is formed in a position overlapping with the conductive film 719. It functions as the gate electrode of the gate electrode 202.

[0144] The gate insulating film 721 is formed using the same material and the same stacked structure as the gate insulating film 703. Note that the gate insulating film 721 is formed to prevent impurities such as moisture and hydrogen as much as possible. It is preferable that the insulating film does not contain any insulating film, and it may be a single layer insulating film or may be composed of a plurality of laminated insulating films. When hydrogen is contained in the gate insulating film 721, the hydrogen is absorbed into the oxide semiconductor. The hydrogen penetrates into the oxide semiconductor film 716 or extracts oxygen from the oxide semiconductor film 716. The film 716 may become low-resistance (n-type), which may result in the formation of a parasitic channel. Therefore, the hydrogen content of the gate insulating film 721 is reduced to a minimum by the film formation method. It is important not to use a material with high barrier properties for the gate insulating film 721. For example, as an insulating film with high barrier properties, a silicon nitride film, a silicon nitride oxide film, An aluminum nitride film, an aluminum nitride oxide film, or the like can be used. When a layered insulating film is used, a silicon oxide film or a silicon oxynitride film having a low nitrogen content is used. The insulating film is formed closer to the oxide semiconductor film 716 than the insulating film with high barrier properties. Then, the conductive films 719, 720, and An insulating film with high barrier properties is formed so as to overlap with the oxide semiconductor film 716. By using a thick insulating film, the oxide semiconductor film 716, the gate insulating film 721, or Impurities such as moisture or hydrogen enter the interface between the oxide semiconductor film 716 and another insulating film and the vicinity thereof. In addition, when the ratio of nitrogen is set to 0.01, the oxide semiconductor film 716 is in contact with the oxide semiconductor film 716. By forming insulating films such as low-resistance silicon oxide films and silicon oxynitride films, materials with high barrier properties can be used. This can prevent the insulating film from being in direct contact with the oxide semiconductor film 716.

[0145] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed by sputtering. Gate insulating film 7 has a structure in which a silicon nitride film having a thickness of 100 nm is laminated by the method. The substrate temperature during film formation may be set to a temperature between room temperature and 300° C. In this state, the temperature is 100°C.

[0146] Note that heat treatment may be performed after the gate insulating film 721 is formed. , ultra-dry air or rare gas (argon, helium, etc.) atmosphere, preferably The temperature is 200°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. The content is 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppb or less. In this embodiment, for example, heating is performed in a nitrogen atmosphere at 250° C. for 1 hour. Alternatively, before the conductive films 719 and 720 are formed, moisture or hydrogen may be reduced. Similar to the previous heat treatment performed on the oxide semiconductor film to reduce the After the gate insulating film 721 containing oxygen is provided, heat treatment is performed. By this, the oxide semiconductor film 716 is free from the oxide semiconductor film 718 by the heat treatment. Even if oxygen vacancies occur in the semiconductor film 716, the oxide semiconductor Oxygen is supplied to the oxide semiconductor film 716. In the oxide semiconductor film 716, oxygen vacancies serving as donors are reduced and the stoichiometric composition is The oxide semiconductor film 716 contains oxygen in an amount exceeding the stoichiometric composition. As a result, the oxide semiconductor film 716 can be made closer to i-type. This reduces variations in the electrical characteristics of transistors due to oxygen deficiency, improving the electrical characteristics. The timing of this heat treatment is determined depending on the shape of the gate insulating film 721. There are no particular limitations as long as it is after formation, and other processes, such as heat treatment during resin film formation, transparent conductive film This process also serves as a heat treatment to lower the resistance of the oxide semiconductor, The membrane 716 can be made closer to an i-shape.

[0147] Further, by performing heat treatment on the oxide semiconductor film 716 in an oxygen atmosphere, the oxide semiconductor By adding oxygen, oxygen vacancies that serve as donors in the oxide semiconductor film 716 may be reduced. The temperature of the heat treatment is, for example, 100°C or higher and lower than 350°C, preferably 150°C or higher and lower than 250°C. The oxygen gas used in the heat treatment in the oxygen atmosphere contains water, hydrogen, etc. It is preferable that the purity of the oxygen gas introduced into the heat treatment device is not more than 6N (9 9.9999%) or more, preferably 7N (99.99999%) or more (i.e., impurities in oxygen It is preferable to keep the concentration of impurities at 1 ppm or less, preferably 0.1 ppm or less.

[0148] Alternatively, an oxide semiconductor film 716 may be formed by adding an oxide thereto by an ion implantation method, an ion doping method, or the like. The oxygen vacancies that act as donors may be reduced by adding a 2.45GH Oxygen plasma generated by microwaves at 2000 kJ / s may be added to the oxide semiconductor film 716.

[0149] The conductive films 722 and 723 are formed after the conductive films are formed over the gate insulating film 721. The conductive film 722 and the conductive film 72 can be formed by patterning the conductive film. 3 is made of the same material as the conductive films 707 and 708 or the conductive films 714 and 715. It is possible to form it using a material.

[0150] The thickness of the conductive film 722 and the conductive film 723 is 10 nm to 400 nm, preferably 100 nm. In this embodiment, a sputtering method using a tungsten target is used. After forming a conductive film for the gate electrode of 150 nm, the conductive film is etched to the desired thickness. The conductive films 722 and 723 are formed by processing (patterning) the conductive films 722 and 723 into the shapes shown in FIG. The resist mask may be formed by an ink-jet method. When the film is formed by the jet method, no photomask is used, and therefore the manufacturing cost can be reduced.

[0151] Through the above steps, the transistor 202 is formed.

[0152] Note that the portion where the conductive film 719 and the conductive film 723 overlap with each other with the gate insulating film 721 therebetween is It corresponds to the capacitance element 203 .

[0153] Although the transistor 202 has been described as a single-gate transistor, If necessary, a plurality of electrically connected gate electrodes may be provided to form a channel forming region. A transistor having a multi-gate structure can also be formed.

[0154] Note that the insulating film in contact with the oxide semiconductor film 716 (in this embodiment, the gate insulating film 7 21 corresponds to the above.) may be made of an insulating material containing a Group 13 element and oxygen. Many oxide semiconductor materials contain Group 13 elements, and insulating materials containing Group 13 elements are It has good compatibility with oxide semiconductors, and by using it as an insulating film in contact with an oxide semiconductor film, Therefore, the state of the interface with the nitride semiconductor film can be maintained in a good condition.

[0155] An insulating material containing a Group 13 element means that the insulating material contains one or more Group 13 elements. Examples of insulating materials containing Group 13 elements include gallium oxide and aluminum oxide. gallium oxide, aluminum gallium oxide, gallium aluminum oxide, etc. Aluminum gallium is a material that has a higher aluminum content (atomic %) than the gallium content (atomic %). %), and gallium aluminum oxide is a material with a high gallium content (atomic %). Indicates an aluminum content (atomic %) of 100 or more.

[0156] The insulating film in contact with the oxide semiconductor film 716 is subjected to heat treatment in an oxygen atmosphere or oxygen doping. It is preferable to make the insulating material have more oxygen than the stoichiometric composition by using a filter or the like. The element doping may be performed by ion implantation or ion doping.

[0157] By performing oxygen doping treatment, an insulating film having a region with more oxygen than the stoichiometric composition is formed. When the insulating film having such a region is in contact with the oxide semiconductor film, As a result, excess oxygen in the insulating film is supplied to the oxide semiconductor film, and oxygen is transferred to the oxide semiconductor film or the oxide semiconductor film. The oxygen defects at the interface between the oxide semiconductor film and the insulating film are reduced, and the oxide semiconductor film is made i-type or It can be made as close as possible to

[0158] FIG. 9B shows another circuit diagram of a memory cell included in a semiconductor device according to one embodiment of the present invention. The figure is shown.

[0159] The memory cell shown in FIG. 9B includes a transistor 204 and a capacitor 205. The gate electrode of the transistor 204 is connected to the word line WL. 204, one of the source electrode and the drain electrode is connected to the data line DL, and the other is The other electrode of the capacitance element 205 is connected to the ground potential. The potential is connected to a node to which a fixed potential such as a potential is applied.

[0160] In the memory cell shown in FIG. 9B, the transistor 204 is turned on when data is written. The potential of a signal including data is applied from the data line DL to the capacitor element 204 via the transistor 204. The potential of the signal is applied to one electrode of the capacitor 205. By controlling the amount of accumulated charge, data is written to the capacitor element 205. can be.

[0161] Next, when data is held, the transistor 204 is turned off and the capacitor 205 The transistor 204 has the characteristic of having an extremely low off-state current. Therefore, the charge stored in the capacitor 205 is unlikely to leak, and the transistor 20 4) Data can be retained for a longer period of time compared to when semiconductor materials such as silicon are used. It is possible to do so.

[0162] When reading data, the transistor 204 is turned on, and the capacitance is transferred via the data line DL. The charge stored in the element 205 is extracted. Then, the difference in the amount of charge is read. The data can be read out by

[0163] FIG. 10A shows an example of a cross-sectional view of the memory cell shown in FIG. 4 is a diagram showing a substrate 750 having an insulating surface, a conductive film 751, a conductive film 752, and a conductive film 751. and a semiconductor film 753 over the conductive film 752, and a semiconductor film 754 connected to the conductive film 751 and the conductive film 752, respectively. The conductive films 754 and 755 are formed on the insulating film 756 over the semiconductor film 753. A conductive film 757 is provided over the film 756 so as to overlap with the semiconductor film 753. .

[0164] The capacitor 205 is formed by a conductive film 755 on a substrate 750 having an insulating surface and a conductive film 75 5, and a conductive film 755 formed on the insulating film 756 at a position overlapping the conductive film 755. A conductive film 758 is also included.

[0165] Note that in the semiconductor device according to one embodiment of the present invention, a memory cell is provided below the memory cell. In FIG. 10B, a memory cell and a driver circuit are stacked. 1 illustrates an example cross-sectional view of a layered memory device.

[0166] In the memory device shown in FIG. 10B, the transistor 206 included in the driver circuit has an insulating surface. A semiconductor film 761, an insulating film 762 on the semiconductor film 761, and an insulating film A conductive film 763 provided over the film 762 in a position overlapping with the semiconductor film 761, and a semiconductor film The conductive film 764 and the conductive film 765 are connected to the semiconductor film 761. The insulating film 761, the insulating film 762, and the conductive film 763 are covered with an insulating film 766. The semiconductor film 761 is connected to the conductive film 764 and the insulating film 766 through an opening provided in the insulating film 766. It is connected to the conductive film 765.

[0167] In addition, the transistor 204 includes a conductive film 780 and a conductive insulating film 766 over the conductive film 764 and the insulating film 766. The conductive film 780 includes a conductive film 781 and an insulating film 782 provided between the conductive film 780 and the conductive film 781. The conductive film 764 is connected to the conductive film 781. Furthermore, the transistor 204 is On the layer composed of the conductive film 780, the conductive film 781, and the insulating film 782, Conductive films 771 and 772 connected to the conductive film 781, respectively; The semiconductor film 773 on the conductive film 772 and the conductive film 771 and the conductive film 772 are connected to each other. The conductive films 774 and 775 are formed by the semiconductor film 773, the conductive films 774, and the conductive films 775. The insulating film 776 is provided at a position overlapping with the semiconductor film 773. and a conductive film 777.

[0168] The capacitor 205 includes a conductive film 775, an insulating film 776 over the conductive film 775, and a thin film and a conductive film 783 located over the conductive film 775.

[0169] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0170] (Embodiment 3) A structural example of an inverter, which is one of semiconductor devices according to one embodiment of the present invention, will be described.

[0171] 11 shows an example of an inverter according to one embodiment of the present invention. 0 includes transistors 501 to 505 and a capacitor 506.

[0172] The transistor 501 has a gate electrode connected to a wiring 508 and a source electrode connected to a transistor The drain electrode of the transistor 502 is connected to the wiring 507. The transistor 502 has a gate electrode connected to a wiring 509 and a source electrode is connected to the wiring 510, and its drain electrode is connected to the source electrode of the transistor 501. The transistor 503 has a gate electrode connected to a wiring 507 and a source One of the electrode and drain electrode of the transistor 501 is the source electrode of the transistor 502 the drain electrode of the transistor 501, and the other end of the transistor 501 is connected to the gate electrode of the transistor 504. The source electrode of the transistor 504 is connected to the drain electrode of the transistor 505. The transistor 5 is connected to the line 511 and its drain electrode is connected to the wiring 507. 505 has its gate electrode connected to a wiring 509 and its source electrode connected to a wiring 510. The drain electrode is connected to the source electrode of the transistor 504 and the wiring 511. do.

[0173] One electrode of the capacitor 506 is connected to the gate electrode of the transistor 504. The other electrode is connected to a wiring 511 .

[0174] When the transistor 502 and the transistor 505 are n-channel transistors, specifically, A high-level potential VDD is applied to the wiring 507, and a low-level potential VSS is applied to the wiring 510. A potential CL of a clock signal is applied to the wiring 508, and a potential CL of a clock signal is applied to the wiring 509. A potential Vin is applied to the wiring 511. A potential Vin that inverts the polarity of the potential Vin is applied to the wiring 512. The potential Vinb obtained by this is output.

[0175] In the semiconductor device according to one embodiment of the present invention, even when the transistor is miniaturized, the source electrode or The resistance of the conductive film that functions as the drain electrode can be kept low, ensuring a high on-current. Therefore, by applying the configuration of the present invention to the inverter 500, the inverter 500 Even when the size is reduced, high operating speed can be ensured and current supply capacity can be increased.

[0176] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0177] (Fourth embodiment) A semiconductor device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium. Image playback devices (typically DVD: Digital Versatile Disc) (Devices having a display that can play back recording media such as DVDs and display the images) In addition, electronic devices in which the semiconductor device according to one embodiment of the present invention can be used are Mobile phones, portable game consoles, personal digital assistants, e-books, video cameras, digital cameras, still camera, goggle-type display (head-mounted display), navigation audio systems, audio playback devices (car audio, digital audio players, etc.), Copiers, fax machines, printers, multi-function printers, automated teller machines (AT) M), vending machines, etc. Specific examples of these electronic devices are shown in Figure 12.

[0178] FIG. 12A shows a portable game machine, which includes a housing 5001, a housing 5002, a display unit 5003, Display unit 5004, microphone 5005, speaker 5006, operation keys 5007, The semiconductor according to one embodiment of the present invention is used in a driver circuit of a portable game machine. By using the device, it is possible to provide a portable game machine with a high operating speed. By using a semiconductor device according to one embodiment of the present invention, a portable game console can be made smaller. The portable game machine shown in FIG. 12A has two display units 5003 and a display However, the number of display units that a portable game machine has is not limited to this. do not have.

[0179] FIG. 12B shows a display device, which includes a housing 5201, a display portion 5202, a support stand 5203, and the like. By using a semiconductor device according to one embodiment of the present invention in a driver circuit of a display device, the operating speed can be improved. Alternatively, a display device with high image quality can be provided by using a semiconductor device according to one embodiment of the present invention. By using this technology, it is possible to make the display device smaller. This includes all information display devices, such as those for personal computers, TV broadcast reception, and advertising displays. It can be enjoyed.

[0180] FIG. 12C shows a notebook personal computer, which includes a housing 5401 and a display portion 5402. , a keyboard 5403, a pointing device 5404, etc. By using a semiconductor device according to one embodiment of the present invention for a driver circuit of a mobile computer, the operating speed can be improved. It is possible to provide a notebook personal computer with high speed. By using the semiconductor device according to the embodiment, miniaturization of notebook personal computers is realized. It is possible.

[0181] FIG. 12D shows a portable information terminal, which includes a first housing 5601, a second housing 5602, a first display unit, and a 5603, a second display unit 5604, a connection unit 5605, operation keys 5606, etc. Table 1 The display unit 5603 is provided in the first housing 5601, and the second display unit 5604 is provided in the second housing 5602. The first housing 5601 and the second housing 5602 are connected by a connection portion 56 5605, and the angle between the first housing 5601 and the second housing 5602 is The video on the first display unit 5603 can be changed by the The switching is performed according to the angle between the first housing 5601 and the second housing 5602 at the section 5605. In addition, at least the first display unit 5603 and the second display unit 5604 may be configured to have a display area of ​​1000×1000 mm. On the other hand, a semiconductor display device with a function as a position input device may be used. The function as a position input device can be realized by providing a touch panel on the semiconductor display device. Alternatively, the function as a position input device can be added to a device called a photosensor. The light can also be added by providing a photoelectric conversion element in the pixel portion of a semiconductor display device. By using a semiconductor device according to one embodiment of the present invention for a driver circuit of a mobile information terminal, the operating speed can be improved. Alternatively, a semiconductor device according to one embodiment of the present invention can be used to provide a portable information terminal with high speed. By using this, it is possible to realize a miniaturization of portable information terminals.

[0182] FIG. 12(E) shows a mobile phone, which includes a housing 5801, a display portion 5802, an audio input portion 5803, It has an audio output unit 5804, operation keys 5805, a light receiving unit 5806, etc. By converting the light received in the camera into an electrical signal, it is possible to capture an external image. By using a semiconductor device according to one embodiment of the present invention in a driver circuit of a mobile phone, the operating speed can be increased. Alternatively, a mobile phone can be provided by using a semiconductor device according to one embodiment of the present invention. This will enable the miniaturization of mobile phones.

[0183] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0184] 101 Conductive film 101e End 102 Conductive film 102e end 103 Semiconductor film 104 Conductive film 104e end 105 Conductive film 105e end 106 insulating film 107 Conductive film 107e End 108 Opening 109 Opening 110 Conductive film 111 Conductive film 112 Semiconductor film 113 Semiconductor Film 114 Lov area 115 Lov area 116 Loff area 117 Loff area 120 insulating film 201 Transistor 202 Transistor 203 Capacitor 204 Transistor 205 Capacitive element 206 Transistor 500 inverter 501 Transistor 502 transistor 503 Transistor 504 Transistor 505 Transistor 506 Capacitor element 507 Wiring 508 Wiring 509 Wiring 510 Wiring 511 Wiring 700 boards 701 Insulating film 702 Semiconductor film 703 Gate insulating film 704 Impurity region 705 Mask 706 Opening 707 Conductive film 708 Conductive film 709 Impurity region 710 Channel formation region 711 Impurity region 712 insulating film 713 Insulating Film 714 Conductive film 715 Conductive film 716 Oxide semiconductor film 717 Opening 718 Opening 719 Conductive Film 720 Conductive film 721 Gate insulating film 722 Conductive film 723 Conductive Film 750 board 751 Conductive film 752 Conductive film 753 Semiconductor Film 754 Conductive film 755 Conductive film 756 Insulating film 757 Conductive Film 758 Conductive film 760 board 761 Semiconductor Film 762 insulating film 763 Conductive Film 764 Conductive film 765 Conductive Film 766 Insulating Film 771 Conductive Film 772 Conductive film 773 Semiconductor Film 774 Conductive film 775 Conductive Film 776 insulating film 777 Conductive Film 780 Conductive Film 781 Conductive Film 782 insulating film 783 Conductive Film 5001 Case 5002 Case 5003 Display section 5004 Display section 5005 Microphone 5006 Speaker 5007 Operation key 5008 Stylus 5201 Case 5202 Display section 5203 Support stand 5401 Housing 5402 Display section 5403 Keyboard 5404 Pointing Device 5601 Housing 5602 Housing 5603 Display section 5604 Display section 5605 Connection 5606 Operation Key 5801 Housing 5802 Display section 5803 Audio input unit 5804 Audio output unit 5805 Operation key 5806 Light receiving section

Claims

1. a first transistor, a second transistor, and a capacitor are included in one circuit; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the first transistor is electrically connected to one electrode of the capacitor element; A semiconductor device in which a signal is input to the other electrode of the capacitive element, a first conductive film overlapping a channel formation region of the second transistor; a second conductive film; an oxide semiconductor film disposed over the first conductive film and the second conductive film, the oxide semiconductor film having a channel formation region of the first transistor; a third conductive film disposed above the oxide semiconductor film, electrically connected to the first conductive film, and functioning as one of a source electrode and a drain electrode of the first transistor; a fourth conductive film disposed above the oxide semiconductor film, electrically connected to the second conductive film, and functioning as the other of the source electrode and the drain electrode of the first transistor; a fifth conductive film disposed over the oxide semiconductor film and functioning as a gate electrode of the first transistor; the third conductive film functions as one electrode of the capacitor element, the third conductive film has a region in contact with a top surface of the oxide semiconductor film, the fourth conductive film has a region in contact with a top surface of the oxide semiconductor film, the fifth conductive film is separated from the third conductive film and the fourth conductive film in a plan view; Semiconductor device.

2. a first transistor, a second transistor, and a capacitor are included in one circuit; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; one of a source electrode and a drain electrode of the first transistor is electrically connected to one electrode of the capacitor element; A semiconductor device in which a signal is input to the other electrode of the capacitive element, a first conductive film overlapping a channel formation region of the second transistor; a second conductive film; an oxide semiconductor film disposed over the first conductive film and the second conductive film, the oxide semiconductor film having a channel formation region of the first transistor; a third conductive film disposed over the oxide semiconductor film, having a region in contact with the first conductive film, and functioning as one of a source electrode and a drain electrode of the first transistor; a fourth conductive film disposed over the oxide semiconductor film, having a region in contact with the second conductive film, and functioning as the other of the source electrode and the drain electrode of the first transistor; a fifth conductive film disposed over the oxide semiconductor film and functioning as a gate electrode of the first transistor; the third conductive film functions as one electrode of the capacitor element, the third conductive film has a region in contact with a top surface of the oxide semiconductor film, the fourth conductive film has a region in contact with a top surface of the oxide semiconductor film, the fifth conductive film is separated from the third conductive film and the fourth conductive film in a plan view; Semiconductor device.

3. a first transistor, a second transistor, and a capacitor are included in one circuit; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; a first potential is applied to one of a source electrode or a drain electrode of the second transistor; one of a source electrode and a drain electrode of the first transistor is electrically connected to one electrode of the capacitor element; A semiconductor device in which a signal is input to the other electrode of the capacitive element, a first conductive film overlapping a channel formation region of the second transistor; a second conductive film; an oxide semiconductor film disposed over the first conductive film and the second conductive film, the oxide semiconductor film having a channel formation region of the first transistor; a third conductive film disposed above the oxide semiconductor film, electrically connected to the first conductive film, and functioning as one of a source electrode and a drain electrode of the first transistor; a fourth conductive film disposed above the oxide semiconductor film, electrically connected to the second conductive film, and functioning as the other of the source electrode and the drain electrode of the first transistor; a fifth conductive film disposed over the oxide semiconductor film and functioning as a gate electrode of the first transistor; the third conductive film functions as one electrode of the capacitor element, the third conductive film has a region in contact with a top surface of the oxide semiconductor film, the fourth conductive film has a region in contact with a top surface of the oxide semiconductor film, the fifth conductive film is separated from the third conductive film and the fourth conductive film in a plan view; Semiconductor device.

4. a first transistor, a second transistor, and a capacitor are included in one circuit; one of a source electrode and a drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor; a first potential is applied to one of a source electrode or a drain electrode of the second transistor; one of a source electrode and a drain electrode of the first transistor is electrically connected to one electrode of the capacitor element; A semiconductor device in which a signal is input to the other electrode of the capacitive element, a first conductive film overlapping a channel formation region of the second transistor; a second conductive film; an oxide semiconductor film disposed over the first conductive film and the second conductive film, the oxide semiconductor film having a channel formation region of the first transistor; a third conductive film that is disposed over the oxide semiconductor film, has a region in contact with the first conductive film, and functions as one of a source electrode and a drain electrode of the first transistor; a fourth conductive film disposed over the oxide semiconductor film, having a region in contact with the second conductive film, and functioning as the other of the source electrode and the drain electrode of the first transistor; a fifth conductive film disposed over the oxide semiconductor film and functioning as a gate electrode of the first transistor; the third conductive film functions as one electrode of the capacitor element, the third conductive film has a region in contact with a top surface of the oxide semiconductor film, the fourth conductive film has a region in contact with a top surface of the oxide semiconductor film, the fifth conductive film is separated from the third conductive film and the fourth conductive film in a plan view; Semiconductor device.

5. In any one of claims 1 to 4, the oxide semiconductor film contains indium oxide; Semiconductor device.

Citation Information

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