Semiconductor device

Abstract

To provide a semiconductor device with excellent reliability, and a manufacturing method for the same.SOLUTION: A semiconductor device includes a transistor 200. The transistor includes a first insulator 222, a second insulator 224, a first oxide 230a, a second oxide 230b, a third oxide 230c, a first conductor 242a and a second conductor 242b, a third insulator 254, a third conductor 260, a fourth insulator 280, and a fifth insulator 274. In the fourth insulator and the fifth insulator, an opening that reaches the second oxide is provided. The third oxide, the third insulator, and the third conductor are disposed in order from an inner wall side of the opening so as to fill the opening. At least a part of the third oxide in a region where the third oxide and the second oxide do not overlap in a channel width direction of the transistor is in contact with the first insulator.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the present invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, electronic device etc. may be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the [Background technology]

[0004] Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as other materials. For example, not only oxides of single metals such as indium oxide and zinc oxide, but also oxides of multi-component metals Among the oxides of multi-component metals, In-Ga-Zn oxide (hereinafter referred to as In-Ga-Zn oxide) is particularly Research into IGZO (Inorganic Glycerol, also known as IGZO) is currently being actively conducted.

[0005] Research on IGZO has revealed that, among oxide semiconductors, it is neither single crystal nor amorphous. AAC (c-axis aligned crystalline) structure and nc(n A crystalline structure was found (see Non-Patent Documents 1 to 3). In Non-Patent Documents 1 and 2, oxide semiconductors having a CAAC structure are used. Furthermore, a technique for fabricating a transistor using a CAAC structure and an nc structure has also been disclosed. Even oxide semiconductors with lower crystallinity than those described above have minute crystals, as reported in Non-Patent Document 4 and and Non-Patent Document 5.

[0006] Furthermore, transistors using IGZO as the active layer have extremely low off-state current (non- See Patent Document 6.) LSIs and displays that utilize these properties have been reported ( See Non-Patent Document 7 and Non-Patent Document 8. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-patent document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-patent document 3] S. Ito et al., “The Proceedings of AM-FPD'13 Digest of Technical Papers”, 2013, p.151-154 [Non-patent document 4] S. Yamazaki et al., “ECS Journal of Solid State Science and Technology”, 2014, volume 3, issue 9, p.Q3012-Q3022 [Non-patent document 5] S. Yamazaki, “ECS Transactions”,2014, volume 64, issue 10, p.155-164 [Non-patent document 6] K. Kato et al., “Japanese Journal of Applied Physics”, 2012, volume 51, p.021201-1-021201-7 [Non-Patent Document 7] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, p.T216-T217 [Non-patent document 8] S. Amano et al., “SID Symposium Digest of Technical Papers”, 2010, volume 41, issue 1, p.626-629 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a semiconductor device with large on-state current. Another object of one embodiment of the present invention is to provide a semiconductor device having high frequency characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another embodiment of the present invention provides a semiconductor device that can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a semiconductor having favorable electrical characteristics. Another object of the present invention is to provide a semiconductor device with high productivity. One of the objectives is to provide a device.

[0009] One embodiment of the present invention is to provide a semiconductor device that can retain data for a long period of time. One object of one embodiment of the present invention is to provide a semiconductor device with a high data writing speed. One object of one embodiment of the present invention is to provide a semiconductor device with high design freedom. One object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device. This is one of the challenges.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor device including a transistor, the transistor comprising: an insulator of the first insulator, a second insulator on the first insulator, a first oxide on the second insulator, and a first a second oxide on the first oxide, a third oxide on the second oxide, and a first oxide on the second oxide. a third conductor and a second conductor, a third insulator on the third oxide, and a third insulator on the third insulator; a third conductor, a fourth insulator on the first conductor and the second conductor, and a fourth insulator on the fourth insulator; a fifth insulator, and the fourth insulator and the fifth insulator are covered with a second oxide. An opening is provided, and a third oxide is disposed to cover an inner wall of the opening, and the third insulator is The third conductor is disposed so as to cover the inner wall of the opening via the third oxide. and a third insulator, the third insulator being disposed to fill the opening, and the third insulator being disposed to fill the opening. In the longitudinal direction of the filter, the fourth insulator and the second oxide do not overlap each other. At least a part of the body is in contact with the first insulator, and in the channel width direction of the transistor, The third conductor and the second oxide do not overlap with each other based on the height of the bottom surface of the first insulator. The height of the bottom surface of the third conductor in the thin region is lower than the height of the bottom surface of the second oxide, A region where the third oxide and the second oxide do not overlap in the channel width direction of the transistor. At least a portion of the third oxide is in contact with the first insulator.

[0012] In the semiconductor device, the third oxide has a stacked structure including the first layer and the second layer. the first layer is in contact with a second oxide and a fifth insulator, and the second layer is in contact with the first layer and the third insulator. Preferably, the first layer and the second layer are both: In, an element M (M is Al, Ga, Y, or Sn), and Zn, and the second layer In the first layer, the atomic ratio of In in the constituent elements is It is preferable that the ratio is smaller than the above.

[0013] Another embodiment of the present invention is a semiconductor device including a transistor, The capacitor includes a first insulator, a second insulator on the first insulator, and a first oxide layer on the second insulator. a second oxide on the first oxide; a third oxide on the second oxide; a third insulator on the substrate; a conductor on the third insulator; and at least a portion of the third oxide; At least a portion of the top surface of the second oxide, at least a portion of the side surface of the second oxide, At least a portion of the side of the object, at least a portion of the side of the second insulator, and the first insulator a fourth insulator in contact with at least a portion of the third insulator; a fifth insulator on the fourth insulator; At least a portion of the top surface of the oxide, at least a portion of the top surface of the third insulator, and at least a portion of the top surface of the conductor a sixth insulator in contact with at least a portion of the upper surface of the fifth insulator and at least a portion of the upper surface of the fifth insulator; , and the second oxide has a first region, a second region, and a first region and a second region. and a third region located between the first region and the second region, and the resistance of the third region is The resistance of the conductor is lower than that of the third region, and the conductor is provided above the third region so as to overlap with the third region. A part of the third oxide and a part of the third insulator are connected to the side of the conductor and the fifth insulator. The fourth insulator is provided between the first region and the region in contact with the second region. In the channel width direction of the transistor, the height of the bottom surface of the first insulator is used as a reference. The height of the bottom surface of the conductor in the region where the conductor and the second oxide do not overlap is a third oxide layer formed on the bottom surface of the structure in a channel width direction of the transistor; At least a portion of the third oxide in the region where it does not overlap with the second oxide is the first insulator. and come into contact with them.

[0014] In the semiconductor device, the first region and the second region are each formed of one of phosphorus and boron. It is preferable that the method includes the following.

[0015] In the semiconductor device, the first region and the second region are larger than the third region. It is preferable that the silicon dioxide has many oxygen vacancies.

[0016] In the semiconductor device, the fourth insulator is a laminate including the third layer and the fourth layer. The semiconductor device has a layer structure, wherein the third layer is in contact with the first insulator and the fourth layer is in contact with the fifth insulator. Preferably, the third layer contains silicon oxide, and the fourth layer contains aluminum oxide. It is preferable that the composition contains the compound.

[0017] In the semiconductor device, the third oxide is a multilayer structure including the first layer and the second layer. The first layer is in contact with the second oxide and the fifth insulator, and the second layer is in contact with the first oxide and the fifth insulator. Preferably, the insulating layer is provided between the first layer and the third insulator. The second layer is made of In, element M (M is Al, Ga, Y, or Sn), and Zn. and in the second layer, the atomic ratio of In to the element M is It is preferable that the atomic ratio is smaller than the atomic ratio of In to the element M. [Effects of the Invention]

[0018] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high frequency characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided. .

[0019] In addition, a semiconductor device capable of retaining data for a long period of time can be provided. This makes it possible to provide a semiconductor device with a high data writing speed. In addition, a semiconductor device capable of reducing power consumption can be provided. Furthermore, a novel semiconductor device can be provided.

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0021] [Figure 1] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 2] FIG. 1 is a perspective view of a semiconductor device according to one embodiment of the present invention. [Figure 3] FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 5] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8]1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 14] FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 19] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 20] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 21] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 22] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 23] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 24] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 25] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 26] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 27] FIG. 1 is a block diagram illustrating a configuration example of a storage device according to one embodiment of the present invention. [Figure 28] FIG. 1 is a circuit diagram illustrating a configuration example of a memory device according to one embodiment of the present invention. [Figure 29] 1A and 1B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 30] FIG. 1 is a schematic diagram of a memory device according to one embodiment of the present invention. [Figure 31] 1A to 1C are diagrams illustrating electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0022] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be practiced in various different ways without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0023] In the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in the drawings as a schematic illustration, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this may not be reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals between different drawings. In addition, when referring to similar functions, In such cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0024] In addition, the invention can be easily understood, especially in top views (also called "plan views") and perspective views. In order to simplify the description, some components may be omitted. The information may be omitted.

[0025] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" The term "the" or "third" can be used interchangeably in the description. The ordinal numbers listed may not match the ordinal numbers used to identify an aspect of the present invention. There may be cases where this is the case.

[0026] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in describing the same with reference to the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and can be rephrased appropriately depending on the situation.

[0027] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. It shall be.

[0028] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, layer, etc.).

[0029] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The channel forming region is formed in the channel. A current can be passed between the source and the drain through the channel forming region. In this specification and the like, the channel formation region refers to a region through which current mainly flows.

[0030] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0031] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source electrode) in the region where the source is formed or the channel forming region This refers to the distance between the transistor and the drain (drain region or drain electrode). In a transistor, the channel length does not necessarily have the same value in all regions. The channel length of the transistor may not be determined to a single value. In the case of the channel formation region, the channel length is either one value, a maximum value, a minimum value, or is the average value.

[0032] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part of the semiconductor where current flows when the semiconductor is on). In the channel forming region, the channel is formed in a direction perpendicular to the channel length direction. The length of the formation region. In one transistor, the channel width is the length of the entire region. In other words, the channel width of a transistor does not necessarily take the same value. Therefore, in this specification, the channel width is determined based on the channel forming region. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0033] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the transistor is The channel width shown in a top view of the star (hereinafter also referred to as the "apparent channel width") For example, if the gate electrode covers the side of the semiconductor, the effective When the channel width becomes larger than the apparent channel width and its effect cannot be ignored For example, in a transistor that is miniaturized and in which the gate electrode covers the side of the semiconductor, The proportion of the channel formation region formed on the side surface may become large. The effective channel width is larger than the upper channel width.

[0034] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0035] In this specification, when simply referring to the channel width, it refers to the apparent channel width. In this specification, when simply referred to as a channel width, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, The channel width and other parameters can be determined by analyzing cross-sectional TEM images. can.

[0036] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. This can cause problems such as an increase in the density of defect levels in semiconductors and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, , Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and oxides There are transition metals other than the main components of semiconductors, such as hydrogen, lithium, sodium, and silicon. In the case of oxide semiconductors, water also functions as an impurity. In the case of an oxide semiconductor, for example, oxygen vacancies can be created by the inclusion of impurities. In addition, when the semiconductor is silicon, there are cases where an impurity that changes the properties of the semiconductor is formed. The pure substances include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 1 elements. Group 5 elements, etc.

[0037] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains a large amount of silicon dioxide rather than oxygen. It has a high nitrogen content.

[0038] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0039] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes cases where the angle is between -5 degrees and 5 degrees. "Almost parallel" means that the two lines are arranged at an angle of between -30 degrees and 30 degrees. "Perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. " refers to a state in which two straight lines are arranged at an angle of between 60 degrees and 120 degrees.

[0040] In this specification, the term "barrier film" refers to a film that prevents impurities such as water and hydrogen from permeating, and oxygen. If the barrier film has conductivity, it is called a conductive barrier. It is sometimes called the membrane.

[0041] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, Such a metal oxide may be referred to as an oxide semiconductor. In this case, the transistor can be referred to as a transistor including an oxide or an oxide semiconductor. Cut.

[0042] In this specification, normally off means that no potential is applied to the gate, or The current per 1 μm of channel width that flows through a transistor when a ground potential is applied to the gate is 1×10 at room temperature -20 A or less, 1 x 10 at 85°C -18 A or below, or 1 x 10 at 125°C -16 This means that it is A or below.

[0043] (Embodiment 1) An example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described below. I will explain.

[0044] <Configuration Example 1 of Semiconductor Device> 1A to 1C illustrate a transistor 200 according to one embodiment of the present invention and a transistor 2A and 2B are a top view and a cross-sectional view of the periphery of a transistor 200. FIG.

[0045] FIG. 1A is a top view of a semiconductor device including a transistor 200. 1B) and 1C are cross-sectional views of the semiconductor device. 1A is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 1A, showing the channel of the transistor 200. Also, Figure 1(C) is a cross-sectional view in the longitudinal direction of the tube. 1 is a cross-sectional view of the portion shown in FIG. In the top view of FIG. 1(A), some elements are omitted for clarity.

[0046] FIG. 2 is a perspective view of a transistor 200 according to one embodiment of the present invention. In the perspective view of FIG. 1, some elements have been omitted for clarity.

[0047] The semiconductor device of one embodiment of the present invention includes a transistor 200 and an insulator serving as an interlayer film. 214, an insulator 280, an insulator 274, and an insulator 281. The conductor 240 (conductor 240a, and conductor 240b). An insulator 241 (insulator 241a and insulator 241b) is provided thereon.

[0048] In addition, the side walls of the openings of the insulators 254, 280, 274, and 281 An insulator 241 is provided in contact with the first conductor of the conductor 240, and the first conductor of the conductor 240 is provided in contact with the side surface of the insulator 241. The second conductor of the conductor 240 is provided further inside. The height of the upper surface of the transistor 200 and the height of the upper surface of the insulator 281 can be made to be approximately the same. In FIG. 00, a first conductor of the conductor 240 and a second conductor of the conductor 240 are stacked. However, the present invention is not limited to this configuration. The structure may be a single layer or a laminated structure of three or more layers. If they have such structures, they may be distinguished by assigning ordinal numbers in the order of their formation.

[0049] [Transistor 200] As shown in FIG. 1, transistor 200 comprises an insulating substrate (not shown) disposed above the substrate. the insulator 216, the conductor 205 disposed so as to be embedded in the insulator 216, and the insulator 21 6 and the conductor 205, and an insulator 222 disposed on the insulator 222. The insulator 224 is made of a metal, and the oxide 230 (oxide 230a, oxide) is disposed on the insulator 224. oxide 230b, and oxide 230c), and an insulator 250 disposed on the oxide 230. and a conductor 260 (conductor 260a and conductor 260b) disposed on the insulator 250. ), conductors 242a and 242b in contact with a portion of the top surface of oxide 230b, and an insulating A part of the upper surface of the insulator 222, a side surface of the insulator 224, a side surface of the oxide 230a, and an oxide 230b the side of the conductor 242a, the top surface of the conductor 242a, the side of the conductor 242b, and and an insulator 254 disposed in contact with the upper surface of the conductor 242b.

[0050] Conductor 260 serves as the gate electrode of transistor 200, and conductors 242a and The conductor 242b functions as a source electrode and a drain electrode, respectively. In the photodiode 200, a conductor 260 that functions as a gate electrode is formed on an insulator 280 or the like. The conductor 260 is formed in a self-aligned manner so as to fill the opening. By doing so, the conductor 260 is positioned in the region between the conductor 242a and the conductor 242b. This allows for reliable placement without any overlapping.

[0051] The conductor 260 is made up of a conductor 260a and a conductor 260b arranged on the conductor 260a. For example, the conductor 260a has a bottom surface 60b. It is preferable that the lead wire is arranged so as to wrap around the sides of the lead wire. The top surface of the insulator 260 is substantially flush with the top surface of the insulator 250 and the top surface of the oxide 230c. Although the conductor 260 in the transistor 200 has a two-layer structure, The present invention is not limited to this. For example, the conductor 260 may have a single layer structure. Alternatively, it may have a laminated structure of three or more layers.

[0052] The insulators 222, 254, and 274 are hydrogen (e.g., hydrogen atoms, hydrogen It is preferable that the insulating material has a function of suppressing the diffusion of at least one of molecules. 222, insulator 254, and insulator 274 are oxygen (e.g., oxygen atoms, oxygen molecules, etc.). For example, the insulator 222 , insulator 254, and insulator 274 have higher hydrogen and oxygen content than insulator 224, respectively. Preferably, one or both of the insulators have low permeability. The insulator 274 is more permeable to one or both of hydrogen and oxygen than the insulator 250, respectively. The insulators 222, 254, and 274 are each an insulator It is preferable that the permeability to one or both of hydrogen and oxygen is lower than that of the insulator 280 .

[0053] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the insulator 224. and an oxide 230b disposed on the oxide 230b, at least a portion of which is oxide. and an oxide 230c in contact with the upper surface of the oxide 230b.

[0054] In the transistor 200, a region where a channel is formed (hereinafter, referred to as a channel forming region) ) and in the vicinity thereof, oxide 230a, oxide 230b, and oxide 2 30c are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b, a two-layer structure of oxide 230a and oxide 230b, The structure may be a two-layer structure of the material 230b and the oxide 230c, or a laminated structure of four or more layers. Good too.

[0055] The transistor 200 also includes an oxide 230 (oxide 230a) including a channel formation region. , oxide 230b, and oxide 230c) are added with a metal oxide (hereinafter It is preferable to use a semiconductor material other than a metal oxide semiconductor (also called an oxide semiconductor).

[0056] The transistor 200 having an oxide semiconductor in a channel formation region has a Since the leakage current (off-state current) is extremely small, a semiconductor device with low power consumption can be provided. In addition, oxide semiconductors can be deposited using a sputtering method or the like, making them suitable for highly integrated semiconductors. It can be used for the transistor 200 that constitutes the device.

[0057] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum, gallium, etc.). Smoke, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium one or more selected from the group consisting of aluminum, tantalum, tungsten, magnesium, etc. Metal oxides are preferably used. In particular, the element M is aluminum, gallium, yttrium, Alternatively, tin may be used. In addition, the oxide 230 may be an In-Ga oxide or an In-Zn oxide. Alternatively, Ga—Zn oxide or Ga—Zn oxide may be used.

[0058] In addition, a transistor using an oxide semiconductor has an insufficient region in a channel formation region of the oxide semiconductor. The presence of impurities and oxygen vacancies can cause fluctuations in electrical characteristics and reduce reliability. Furthermore, if oxygen vacancies are present in the channel formation region of an oxide semiconductor, Therefore, oxygen vacancies in the channel formation region are unlikely to occur. For example, the oxide 23 is formed by interposing an insulator 250 or the like therebetween. Oxygen is supplied to the SiO2 layer to compensate for the oxygen vacancies. This suppresses fluctuations in electrical properties. and a transistor having stable electrical characteristics and improved reliability. can be done.

[0059] Also, the oxide 230 is provided on the substrate 230 so as to be in contact with the oxide 230, and functions as a source electrode and a drain electrode. The elements contained in the conductor 242 (conductor 242a and conductor 242b) are oxides. When the oxide 230 has a function of absorbing oxygen, the oxide 230 is formed between the conductor 242 or between the oxide 230 and the conductor 242. In some cases, a low resistance region may be formed in part near the surface of the oxide 230. In the low resistance region, impurities (hydrogen, nitrogen, metal elements, etc.) that have entered oxygen vacancies act as donors. In the following, the oxygen vacancies may function as carriers, increasing the carrier density. The hydrogen that is o It may be called H.

[0060] 3A is an enlarged view of a portion of the transistor 200 shown in FIG. 1B. As shown in FIG. 3(A), a conductor 242 is provided on and in contact with the oxide 230. The oxide 230 has a low resistance region at the interface with the conductor 242 and in the vicinity thereof. (region 243a and region 243b) may be formed. At least one of the region 234 and the region 243 functions as a channel forming region of the transistor 200. The region 231 (region 231a) also includes a portion thereof, and functions as a source region or a drain region. , and region 231b). In the following drawings, region 2 Even when 43 is not shown, a similar region 243 may be formed.

[0061] The region 243a and the region 243b are formed in the vicinity of the conductor 242 of the oxide 230b. In this example, the electrons are diffused in the depth direction, but the present invention is not limited to this. The regions 243a and 243b are appropriately selected according to the desired electrical characteristics of the transistor. Furthermore, in the oxide 230, the boundaries of the respective regions can be clearly detected. The concentrations of elements detected within each region are not limited to gradual changes from region to region. Furthermore, the color may change continuously (also called gradation) within each region.

[0062] As shown in FIG. 1B, the insulator 254 is formed between the conductor 242a and the conductor 242b. b and the opposing side surfaces of the conductors 242a and 242b. The side surfaces of the conductive body 242a and the conductive body 242b and the side surfaces of the oxide 230a and the oxide 230b It is preferable that the insulating member 224 contacts the side surface of the insulating member 224 and a part of the upper surface of the insulating member 222. As a result, the insulator 280 is protected by the insulator 254 from the insulator 224, the oxide 230a, and the Therefore, hydrogen and the like contained in the insulator 280 and the like are separated from the oxide 230b. The insulator 224, the oxide 230a, and the oxide 230b are prevented from being mixed with impurities. It is possible.

[0063] The insulator 274 is formed on each of the conductor 260, the insulator 250, and the oxide 230c. The transistor 200 of one embodiment of the present invention is in contact with the surface as shown in FIG. In this structure, the insulator 274 and the insulator 250 are in contact with each other. By this, impurities such as hydrogen contained in the insulator 281 etc. are mixed into the insulator 250. Therefore, the electrical characteristics and reliability of the transistor can be improved. It can suppress the adverse effects on sexuality.

[0064] 3A, the bottom surface of the insulator 224 is used as a reference, and the area overlapping the region 234 is The height of the bottom surface of the conductor 260 in the area is equal to that of the conductors 242a and 242b. For example, in the area overlapping with the area 234, The height of the bottom surface of the conductor 260 and the height of the top surfaces of the conductors 242a and 242b are The difference in height is set to 0 nm or more and 30 nm or less, or 0 nm or more and 15 nm or less.

[0065] 3B is an enlarged view of a portion of the transistor 200 shown in FIG. 1C. As shown in FIG. 1C and FIG. 3B, In this case, the conductor 260 and the oxide 230b overlap with each other, with the bottom surface of the insulator 222 as a reference. The height of the bottom surface of the conductor 260 in the region where the oxide 230b is not present is lower than the height of the bottom surface of the oxide 230b. It is preferable that the conductor 260 functioning as the gate electrode is formed on the oxide 23 of the channel forming region. The side and top surfaces of the insulating layer 230b are covered with the oxide 230c and the insulator 250. This makes it easier for the electric field of the conductor 260 to act on the entire region 234 of the oxide 230b. This increases the on-state current of the transistor 200, thereby improving the frequency characteristics. The oxide 230a and the oxide 230b are formed on the conductor 260 in the region where they do not overlap. If the difference between the height of the bottom surface of the dielectric 260 and the height of the bottom surface of the oxide 230b is T2, then T2 is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably , 5 nm or more and 20 nm or less.

[0066] As shown in FIG. 3B, the oxidized layer is formed in the channel width direction of the transistor 200. The oxide 230c in the region that does not overlap with the insulator 224 is formed by the oxide 230a. At least a part of the insulating material 222 is preferably in contact with the insulating material 222. The oxygen contained in the material 230c diffuses to the outside of the transistor 200 through the insulator 224. Alternatively, the oxide 230b and the oxide 230a may be formed to prevent the oxide 230b from scattering. Preventing oxygen from diffusing through the insulator 224 to the outside of the transistor 200 Alternatively, the area of ​​the insulator 224 may be reduced, and the amount of the electrons absorbed by the insulator 224 may be increased. The amount of oxygen is reduced, and the reduction in the amount of oxygen supplied to the oxide 230 can be suppressed. The oxygen contained in the oxide 230c is efficiently converted into the oxide 230b and the oxide 230a. Therefore, the resistance of the oxide 230 in the region 234 can be prevented from decreasing. Therefore, it is possible to suppress fluctuations in the electrical characteristics of the transistor and achieve stable electrical characteristics. This also improves reliability.

[0067] Alternatively, by adopting the above-described structure, impurities such as hydrogen contained in the insulator 224 or the like can be converted into oxides. In other words, the decrease in the resistance of the oxide 230 can be prevented. Therefore, the fluctuation of the electrical characteristics of the transistor can be suppressed, and stable electrical characteristics can be obtained. This structure can realize the high performance and improve the reliability. 30b, and the insulator 224 in the area not overlapping with the oxide 230a, thereby forming It is possible.

[0068] Also, the oxide 230b and the insulator 224 in the area not overlapping with the oxide 230a are removed. As a result, as shown in FIG. 1C, in the channel width direction of the transistor 200, The oxide 230a and the oxide 230b are connected to the conductor 26 with the bottom surface of the insulator 222 as a reference. The height of the bottom surface of the conductor 260 in the region where the oxide 230b does not overlap is Therefore, the on-current of the transistor 200 is increased. The frequency characteristics can be improved.

[0069] As described above, a semiconductor device including a transistor with large on-state current can be provided. Furthermore, a semiconductor device having a transistor with high frequency characteristics can be provided. In addition, fluctuations in electrical characteristics are suppressed, resulting in stable electrical characteristics and improved reliability. In addition, a semiconductor device having a low off-state current can be provided. It is possible to provide a semiconductor device that

[0070] The following describes in detail the configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. This article explains:

[0071] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulators 214 and 216. Here, it is preferable to improve the flatness of the upper surface of the conductor 205. For example, The average surface roughness (Ra) of the upper surface of 205 is 1 nm or less, preferably 0.5 nm or less, more preferably This allows the insulating layer formed on the conductor 205 to be 224, and the oxide 230a, the oxide 230b, and the oxide 230c are formed. The crystallinity can be improved.

[0072] Here, the conductor 260 functions as a first gate (also called a top gate) electrode. In addition, the conductor 205 may function as a second gate electrode. In this case, the potential applied to the conductor 205 is not linked to the potential applied to the conductor 260. By independently varying the threshold voltage (Vth) of the transistor 200, In particular, applying a negative potential to the conductor 205 can turn on the transistor 200. Therefore, it is possible to increase the Vth of the conductor 2 and reduce the off-state current. The application of a negative potential to the conductor 260 is more effective than the application of no negative potential to the conductor 260. The drain current when the gate is at 0V can be reduced.

[0073] As shown in FIG. 1A, the conductor 205 is formed by forming a channel in the oxide 230. In particular, as shown in FIG. 1C, the conductor 205 is The oxide 230 extends in the region outside the end portion intersecting with the channel width direction. That is, it is preferable that the conductive layer is formed on the outer side of the side surface of the oxide 230 in the channel width direction. The conductor 205 and the conductor 260 are preferably overlapped with an insulator interposed therebetween.

[0074] With the above configuration, the electric field of the conductor 260 functioning as the first gate electrode and the The electric field of the conductor 205, which acts as the gate electrode of the semiconductor 2, causes the channel shape of the oxide 230 to change. In this specification, the first gate electrode and The electric field of the second gate electrode electrically surrounds the channel formation region of the transistor. The structure is called a surrounded channel (S-channel) structure.

[0075] As shown in FIG. 1C, the conductor 205 is extended to function as a wiring. However, the present invention is not limited to this, and a conductive material that functions as a wiring may be provided under the conductive material 205. In addition, the conductor 205 does not necessarily have to be provided for each transistor. For example, the conductor 205 may be shared by multiple transistors. Good too.

[0076] The conductor 205 is a conductive material mainly composed of tungsten, copper, or aluminum. Although the conductor 205 is illustrated as a single layer, it may be a laminated structure. For example, a laminate of titanium, titanium nitride and the above conductive material may be used.

[0077] Also, hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitric oxide are present under the conductor 205. It has the function of suppressing the diffusion of impurities such as elementary molecules (N2O, NO, NO2, etc.) and copper atoms. Alternatively, a conductive material that is impervious to impurities (such as oxygen) may be used. The film has a function of suppressing the diffusion of at least one of oxygen atoms, oxygen molecules, etc. (the film has a function of suppressing the diffusion of at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductor that is difficult to be impurities or acids. The function of suppressing diffusion of elements is to suppress either one or all of the above impurities or the above oxygen. It has the function of suppressing diffusion.

[0078] By using a conductor having a function of suppressing oxygen diffusion under the conductor 205, It is possible to prevent the conductor 205 from being oxidized and the conductivity from decreasing. Examples of conductive materials having a controlling function include tantalum, tantalum nitride, ruthenium, and oxide. Therefore, it is preferable to use ruthenium chloride or the like. In general, the conductive material may be a single layer or a multilayer.

[0079] The insulator 214 prevents impurities such as water and hydrogen from diffusing into the transistor 200 from the substrate side. Therefore, the insulator 214 preferably functions as a barrier insulating film that suppresses the , hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, N O2, etc.), and copper atoms, etc. It is preferable to use an insulating material. Alternatively, oxygen (for example, oxygen atoms, oxygen molecules) The insulating material has a function of suppressing the diffusion of at least one of oxygen and oxygen atoms (the oxygen is less likely to permeate). Preferably, a soluble material is used.

[0080] For example, the insulator 214 is preferably made of aluminum oxide, silicon nitride, or the like. This allows impurities such as water and hydrogen to flow from the substrate side to the transistor rather than the insulator 214. Diffusion to the insulator 200 side can be suppressed. This can prevent oxygen from diffusing toward the substrate side of the insulator 214.

[0081] The insulators 216, 280, and 281, which function as interlayer films, are insulating films. It is preferable that the dielectric constant is lower than that of the insulating layer 214. By using a material with a low dielectric constant as the interlayer film, , the parasitic capacitance occurring between the wirings can be reduced. For example, the insulator 216 and the insulator 28 0, and as the insulator 281, silicon oxide, silicon oxynitride, silicon nitride oxide, Silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and Silicon oxide doped with nitrogen, silicon oxide having vacancies, etc. may be used appropriately.

[0082] The insulator 216 may have a laminated structure. In any case, an insulator similar to the insulator 214 is provided at the portion in contact with the side surface of the conductor 205. With this configuration, the oxygen contained in the insulator 216 can The conductor 205 can prevent the insulator 21 from being oxidized. 6 can be prevented from absorbing oxygen.

[0083] The insulator 222 and the insulator 224 function as gate insulators.

[0084] Here, it is preferable that the insulator 224 in contact with the oxide 230 releases oxygen by heating. In this specification, the oxygen released by heating may be referred to as excess oxygen. The insulator 224 may be made of silicon oxide, silicon oxynitride, or the like. By providing the insulating layer in contact with the oxide 230, oxygen vacancies in the oxide 230 are reduced, and the The reliability of the transistor 200 can be improved.

[0085] Specifically, the insulator 224 is made of an oxide material from which part of the oxygen is released by heating. The oxide film that releases oxygen when heated is called a TDS (Thermal Distribution System). Oxygen converted to oxygen atoms in the ion absorption spectroscopy analysis The amount of desorption is 1.0×10 18 atoms / cm 3 or more, preferably 1.0 × 10 19 at oms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 That's all, is 3.0 x 10 20 atoms / cm 3 The oxide film is as above. The surface temperature of the film at this time is 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower. ° C. or less is preferred.

[0086] The insulator 222 prevents impurities such as water and hydrogen from diffusing into the transistor 200 from the substrate side. For example, the insulator 222 is preferably an insulating material. It is preferable that the hydrogen permeability is lower than that of the insulator 224. Therefore, by surrounding the insulator 224, oxide 230, etc., impurities such as water and hydrogen are Diffusion from the outside into the insulator 224 and the oxide 230 can be suppressed.

[0087] Furthermore, the insulator 222 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). The insulator 222 preferably has a lower oxygen permeability than the insulator 224. The oxide 230 has a function of suppressing the diffusion of atoms and impurities, so that the oxygen contained in the oxide 230 is In addition, the conductor 205 is preferably made of an insulator 224 or This can prevent the oxide 230 from reacting with oxygen.

[0088] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is recommended to use an insulator containing oxide. Oxide-containing insulators include aluminum oxide, hafnium oxide, aluminum and hafnium oxide. It is preferable to use an oxide containing hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 is oxidized by the oxide 230. The diffusion of impurities such as hydrogen from the periphery of the transistor 200 into the oxide 230 is prevented. The insulator 222 functions as a layer that suppresses the electric field. Hafnium oxide is preferably used. For example, the insulator 222 is used as a gate insulating film. In this case, by using hafnium oxide for the insulator 222, the interface is more stable than with aluminum oxide. The level density can be reduced in some cases.

[0089] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, or the like may be added to these insulators. um, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0090] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT Insulators including so-called high-k materials such as (Ba,Sr)TiO3 and (Ba,Sr)TiO3 (BST) The insulating layer may be a single layer or a multilayer. However, thinning the gate insulator may cause problems such as leakage current. By using a high-k material as an insulator that functions as a body, the thickness of the This makes it possible to reduce the gate potential during transistor operation.

[0091] As shown in FIG. 1C, the insulator 222 is formed in the region where it does not overlap with the oxide 230b. In some cases, the thickness of the insulator 222 may be thinner than that of the other regions. The thickness of the region that does not overlap with 230b is determined by the following when forming an opening in the insulator 280, etc. The thickness of the film is such that it can function as an etching stopper film, or the film is thick enough to function as an insulator 216 or a conductive film. It is preferable that the thickness is sufficient so that the surface of the body 205 is not exposed.

[0092] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, it is not limited to a laminated structure made of the same material, but may be a laminated structure made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222. stomach.

[0093] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230b. The oxide 230c is located on the surface of the oxide 230b. The oxide 230a is located under the oxide 230b. As a result, impurities from the structure formed below the oxide 230a are transferred to the oxide 230b. The diffusion can be suppressed. In addition, by having the oxide 230c on the oxide 230b, Diffusion of impurities from structures formed above oxide 230c into oxide 230b can be suppressed.

[0094] It is preferable that the oxide 230 has a layered structure of oxides with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the number of atoms of element M in the constituent elements is The ratio is the atomic ratio of element M among the constituent elements in the metal oxide used for oxide 230b. In addition, in the metal oxide used for the oxide 230a, it is preferable that the The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is It is preferable that the atomic ratio of the metal oxide used for the oxide 230b is larger than that of the element M. In the metal oxide used for the oxide 230a, the atomic ratio of In to the element M is is preferably greater than the atomic ratio of In to the element M. In addition, the oxide 230c is Metal oxides that can be used for oxide 230a or oxide 230b can be used. can.

[0095] Moreover, it is preferable that the oxide 230b and the oxide 230c have crystallinity. For example, the c-axis aligned crystalline lattice (CAAC-OS) It is preferable to use CAAC-OS Crystalline oxides such as these have few impurities and defects (oxygen vacancies, etc.) and are highly crystalline. Therefore, the oxide 23 formed by the source electrode or the drain electrode This prevents oxygen from being extracted from the 0b. Since oxygen extraction from the oxide 230b can be reduced, the transistor 200 can be manufactured It is stable against high temperatures (so-called thermal budget) in the manufacturing process.

[0096] In addition, the conduction band minimums of the oxides 230a and 230c are greater than the conduction band minimum of the oxide 230b. It is preferable that the oxide 230a and the oxide 230b are closer to the vacuum level than the lower end. Preferably, the electron affinity of the oxide 230c is smaller than the electron affinity of the oxide 230b. In this case, the oxide 230c uses a metal oxide that can be used for the oxide 230a. Specifically, in the metal oxide used for the oxide 230c, it is preferable that the constituent elements The atomic ratio of element M is the atomic ratio of element M in the constituent elements of the metal oxide used for oxide 230b. It is preferable that the atomic ratio of M is larger than that of M. In addition, the metal oxide used for the oxide 230c is In the metal oxide used for the oxide 230b, the atomic ratio of the element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element M. In the metal oxides used, the atomic ratio of In to element M is It is preferable that the atomic ratio of In to M in the metal oxide is larger than that of In.

[0097] The oxide 230c has a laminated structure including an oxide 230c1 and an oxide 230c2. , the conduction band minimum of the oxide 230a and the oxide 230c2 is It is preferable that the oxide 230c1 is closer to the vacuum level than the bottom of the conduction band of the oxide 230c1. In other words, the electron affinity of the oxide 230a and the oxide 230c2 is greater than that of the oxide 230b and the oxide 230c2. It is preferable that the electron affinity of the oxide 230c2 is smaller than that of the oxide 230c1. The oxide 230c1 is made of a metal oxide that can be used for the oxide 230a. It is preferable to use a metal oxide that can be used for the object 230b.

[0098] Here, at the junctions of oxide 230a, oxide 230b, and oxide 230c, In other words, the oxide 230a, the oxide 230b, and the The conduction band edge at the junction of the oxide 230c and the silicon dioxide 230c changes continuously or is called a continuous junction. In order to achieve this, the interface between the oxide 230a and the oxide 230b , and the defect levels of the mixed layer formed at the interface between oxide 230b and oxide 230c. It is better to lower the density.

[0099] Specifically, oxide 230a and oxide 230b, and oxide 230b and oxide 230c, By having a common element other than oxygen (as the main component), a mixed layer with low defect level density can be formed. For example, when the oxide 230b is an In-Ga-Zn oxide, the oxide The oxide 230a and the oxide 230c include In-Ga-Zn oxide, Ga-Zn oxide, Gallium oxide may also be used. In the case of forming a laminated structure with 230c2, for example, In-Ga-Zn oxide and the In-G Layered structure of Ga-Zn oxide on a-Zn oxide, or In-Ga-Zn oxide, A laminated structure of gallium oxide on the In-Ga-Zn oxide can be used. Then, the laminated structure of the In-Ga-Zn oxide and the oxide not containing In was formed as oxide 23 It may also be used as 0c.

[0100] Specifically, the oxide 230a is composed of In:Ga:Zn=1:3:4 [atomic ratio], Alternatively, a metal oxide with an atomic ratio of In:Ga:Zn=1:1:0.5 may be used. , as oxide 230b, In:Ga:Zn=4:2:3 [atomic ratio], or In:G A metal oxide having an atomic ratio of Al:Zn=3:1:2 may be used. As the atomic ratio, In:Ga:Zn=1:3:4, In:Ga:Zn=4:2:3 atomic ratio], Ga:Zn=2:1 [atomic ratio], or Ga:Zn=2:5 [atomic ratio] In addition, as a specific example of the case where the oxide 230c has a laminated structure, The atomic ratios are In:Ga:Zn=4:2:3 and In:Ga:Zn=1:3:4. In:Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn= 2:1 [atomic ratio], In:Ga:Zn=4:2:3 [atomic ratio], and Ga :Zn=2:5[atomic ratio], In:Ga:Zn=4:2:3[atomic ratio] and a laminated structure with gallium oxide.

[0101] At this time, the main path of the carriers is the oxide 230b. When the oxide 230c1 has a stacked structure including the oxide 230c2, the oxide 2 In some cases, not only the oxide 230b but also the oxide 230c1 may become the main path for carriers. By configuring the oxide 230a and the oxide 230c as described above, the oxide 230a and the oxide 230b and the interface between the oxide 230b and the oxide 230c. Therefore, the influence of interface scattering on carrier conduction is reduced, and The transistor 200 can obtain a high on-state current and high frequency characteristics. When the oxide 230c is made into a laminated structure, the oxide 230b and the oxide 230c are formed at the interface. In addition to the effect of lowering the defect level density in the oxide 230c, the constituent elements of the oxide 230c It is expected that the oxide 230c will be prevented from diffusing to the 250 side. The stacked structure is made by placing an oxide that does not contain In above the stacked structure, so that In acts as an insulator. The insulator 250 functions as a gate insulator. Therefore, if In gets mixed into the insulator 250 or the like, it will cause poor transistor characteristics. Therefore, by forming the oxide 230c into a stacked structure, a highly reliable semiconductor device can be provided. This makes it possible to

[0102] The oxide 230 is preferably a metal oxide that functions as an oxide semiconductor. For example, the metal oxide that becomes the region 234 has a band gap of 2 eV or more, preferably It is preferable to use a material with a band gap of 2.5 eV or more. By using a metal oxide, the off-state current of a transistor can be reduced. By using a transistor, a semiconductor device with low power consumption can be provided.

[0103] On the oxide 230b, a conductor 242 is formed, which functions as a source electrode and a drain electrode. The thickness of the conductor 242 is, for example, For example, it may be 1 nm or more and 50 nm or less, and preferably 2 nm or more and 25 nm or less.

[0104] The conductor 242 may be aluminum, chromium, copper, silver, gold, platinum, tantalum, or nickel. Titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metal element selected from rontium and lanthanum, or an alloy containing the above metal elements Alternatively, it is preferable to use an alloy of the above-mentioned metal elements. tantalum, titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum, an oxide containing lanthanum and nickel, or the like. Tantalum oxide, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing strontium, ruthenium oxide, ruthenium nitride, and oxides containing strontium and ruthenium The oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation or absorb oxygen. This is preferable because it is a material that maintains its conductivity even when absorbed.

[0105] The insulator 254, like the insulator 214, is a material that prevents impurities such as water and hydrogen from penetrating the insulator 280. It is preferable that the insulating film functions as a barrier insulating film that suppresses diffusion from the side into the transistor 200. For example, it is preferable that the insulator 254 has a lower hydrogen permeability than the insulator 224. Furthermore, as shown in FIGS. 1B and 1C, the insulator 254 is The top and side surfaces of the conductor 242b, the top and side surfaces of the oxide 230a and the oxide 230b. It is preferable that the insulating layer 224 contacts the side surface of the insulating layer 224 and the side surface of the insulating layer 224. Thus, the insulator 280 is connected to the insulator 224 and the oxide 230 by the insulator 254. As a result, hydrogen contained in the insulator 280 is separated from the conductor 242a, the conductor 242b, oxide 230a, oxide 230b and insulator 224 from the top or side surfaces. Since the diffusion of the ions into the oxide 230 can be suppressed, the transistor 200 can be provided with good electrical conductivity. It can provide properties and reliability.

[0106] Furthermore, the insulator 254 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). Preferably, the rim 254 has a lower oxygen permeability than the insulator 280 or the insulator 224 .

[0107] The insulator 254 is preferably formed by sputtering. The insulating film of the insulator 224 is formed by sputtering in an atmosphere containing oxygen. Oxygen can be added to the area adjacent to the body 254. This allows oxygen to be released from the area. Oxygen can be supplied to the oxide 230 through the insulator 224. 54 has the function of suppressing the upward diffusion of oxygen, and oxygen is isolated from the oxide 230. The insulator 222 can prevent oxygen from diffusing downward. By having the function of suppressing diffusion, it is possible to prevent oxygen from diffusing from the oxide 230 to the substrate side. In this way, oxygen is supplied to the channel forming region of the oxide 230. This reduces the oxygen vacancy in the oxide 230 and prevents the transistor from becoming normally on. It can be controlled.

[0108] The insulator 254 may be, for example, an oxide of one or both of aluminum and hafnium. It is preferable to form an insulator containing an oxide of aluminum or hafnium. Insulators containing both oxides include aluminum oxide, hafnium oxide, and aluminum and It is preferable to use oxides containing hafnium (hafnium aluminate) and the like. In this case, the insulator 254 is formed by atomic layer deposition (ALD). The ALD method is preferred for forming a film with good coating properties. This method can prevent the formation of discontinuities due to the unevenness of the insulator 254. do.

[0109] In this way, the insulator 254 having a barrier property against hydrogen prevents the insulator 224 and By covering the insulator 224 and the oxide 230, the insulator 280 is insulated from the insulator 224 and the oxide 230. This prevents impurities such as hydrogen from entering the transistor 200 from the outside. This can prevent the transistor 200 from becoming unstable, thereby providing the transistor 200 with good electrical characteristics and reliability. It is possible.

[0110] The insulator 254 may be, for example, an insulator containing aluminum nitride. The insulator 254 has a composition formula of AlNx (x is a real number greater than 0 and less than or equal to 2, preferably It is preferable to use a nitride insulator that satisfies the following condition: x is a real number greater than 0.5 and less than or equal to 1.5. This allows the film to have excellent insulation and thermal conductivity, This can improve the heat dissipation performance of the heat generated when the transistor 200 is driven. Aluminum titanium nitride, titanium nitride, etc. can also be used as 254. In this case, by forming the film using the sputtering method, oxidizing gas such as oxygen or ozone is used in the film formation gas. This is preferable because it allows film formation without using highly reactive gases. Silicon nitride oxide or the like can also be used.

[0111] The insulator 254 may have a multi-layer structure of two or more layers. 4, the first layer is formed using the sputtering method in an oxygen-containing atmosphere, and then the second layer is formed using the ALD method. The ALD method is a film formation method with good coating properties. Therefore, it is possible to prevent the formation of step discontinuities due to the unevenness of the first layer. When the insulator 254 has a multi-layer structure of two or more layers, the multi-layer structure may be made of different materials. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon nitride. The laminated structure is made of an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. In addition, an insulating material having a function of suppressing the permeation of impurities such as hydrogen and oxygen may be used. For example, an insulator containing oxides of one or both of aluminum and hafnium is used. You can be there.

[0112] The insulator 250 functions as a gate insulator. The insulator 250 is preferably made of silicon oxide, oxynitride, or the like. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies In particular, silicon oxide and silicon oxynitride are resistant to heat. It is preferred because it is stable.

[0113] The insulator 250 is made of an insulator that releases oxygen when heated, similar to the insulator 224. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing the oxide 230b in contact with at least a portion of the oxide 230c, the region 23 4. In addition, similar to the insulator 224, the insulator 250 It is preferable that the concentration of impurities such as water and hydrogen in the insulating layer is reduced. , and it is preferable that the thickness is 1 nm or more and 20 nm or less.

[0114] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0115] The metal oxide may function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant. By making the insulation layer of the insulation layer 250 and the metal oxide, it is possible to improve the thermal stability. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0116] The metal oxide may also function as a part of the first gate. For example, The oxide semiconductor that can be used as the oxide 230 can be used as the metal oxide. In this case, the conductor 260 is formed by sputtering, and the metal oxide This is called OC (Oxide Carbon Dioxide). The electrode can be called a conductor.

[0117] By including the metal oxide, the influence of the electric field from the conductor 260 is not weakened. This can improve the on-current of the transistor 200. The physical thickness of the metal oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress leakage current between the conductor 260 and the oxide 230. By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide the physical distance between the conductor 260 and the oxide 230, and the electric field strength from the conductor 260 to the oxide 230. can be easily adjusted appropriately.

[0118] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, selected from tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. Metal oxides containing one or more of these metals can be used. aluminum oxide, which is an insulator containing oxides of one or both of aluminum and hafnium; Hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate ) is preferably used. By lowering the resistance of the metal oxide, it can be used as the metal oxide.

[0119] Although the conductor 260 is shown as having a two-layer structure in FIG. 1, it may have a single layer structure or a structure having three or more layers. The above laminated structure may also be used.

[0120] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N2O, NO, NO2, etc.), conductive material with the function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (for example, oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material that has the function of suppressing the diffusion of at least (i).

[0121] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can prevent the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitride. It is preferable to use tantalum chloride, ruthenium, ruthenium oxide, or the like.

[0122] In addition, since the conductor 260 also functions as wiring, a conductor with high conductivity should be used. For example, the conductor 260b is preferably made primarily of tungsten, copper, or aluminum. The conductor 260b may have a laminated structure. For example, a laminated structure of titanium, titanium nitride and the above conductive material may be used.

[0123] The insulator 280 is connected to the insulator 222, the insulator 224, the oxide 230 through the insulator 254. and the conductor 242. For example, the insulator 280 may be silicon oxide, oxide, or the like. Silicon nitride, silicon oxide nitride, silicon oxide with fluorine addition, and carbon-added oxide silicon oxide, silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, etc. In particular, silicon oxide and silicon oxynitride are thermally stable. In particular, silicon oxide, silicon oxynitride, silicon oxide having vacancies, etc. These materials are preferred because they can easily form regions containing oxygen that is desorbed by heating. It's nice.

[0124] It is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. The top surface of the insulator 280 may be planarized.

[0125] The insulator 274, like the insulator 214, prevents impurities such as water and hydrogen from entering from above. It is preferable that the insulator 2 functions as a barrier insulating film that suppresses diffusion into the insulator 280. As 74, for example, an insulator that can be used for the insulator 214, the insulator 254, etc. is used. That's good enough.

[0126] In addition, it is preferable to provide an insulator 281 that functions as an interlayer film on the insulator 274. The insulator 281, like the insulator 224, has a low concentration of impurities such as water and hydrogen in the film. It is preferable that it is reduced.

[0127] Also, the insulating material 281, the insulating material 274, the insulating material 280, and the insulating material 254 are formed. The conductor 240a and the conductor 240b are placed in the opening. 240b are provided facing each other with the conductor 260 in between. The top surface of 240b may be flush with the top surface of insulator 281.

[0128] The side walls of the openings of the insulators 281, 274, 280, and 254 The insulator 241a is provided in contact with the first conductor of the conductor 240a. A conductor 242a is located at least partially on the bottom of the opening. , the conductor 240a contacts the conductor 242a. Similarly, the insulator 281, the insulator 274, the insulator An insulator 241b is provided in contact with the edge 280 and the side wall of the opening of the insulator 254, and The first conductor of the conductor 240b is formed in contact with the side surface of the opening. The conductor 242b is located at least in a part of the area where the conductor 240b is in contact with the conductor 242b. do.

[0129] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing the conductive material 240a and the conductive material 240b. 0b may have a laminated structure.

[0130] In addition, when the conductor 240 has a laminated structure, the oxide 230a, the oxide 230b, the conductor 242, insulator 254, insulator 280, insulator 274, and conductive material in contact with insulator 281. The body can be made of conductive materials that have the function of suppressing the permeation of impurities such as water and hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, It is preferable to use ruthenium or the like. In addition, it is preferable to use a material that has a function of suppressing the permeation of impurities such as water and hydrogen. The conductive material having the function may be used in a single layer or a multilayer structure. The oxygen added to the insulator 280 is absorbed by the conductors 240a and 240b. In addition, impurities such as water and hydrogen contained in the layer above the insulator 281 can be prevented. is prevented from diffusing into the oxide 230 through the conductor 240a and the conductor 240b. It is possible.

[0131] The insulators 241a and 241b may be used, for example, as the insulator 254. The insulator 241a and the insulator 241b are made of an insulator 254. Since the insulator 280 is provided in contact with the conductor, impurities such as water and hydrogen contained in the insulator 280 can be easily absorbed by the conductor. 240a and the conductor 240b, the diffusion of the oxide 230 can be suppressed. In addition, oxygen contained in the insulator 280 is absorbed into the conductors 240a and 240b. It should be noted that the insulators 241a and 241b are formed by A LD method and chemical vapor deposition (CVD) ) method can be used.

[0132] Although not shown, the conductive material 240a and the conductive material 240b are arranged in contact with each other on their upper surfaces. A conductor functioning as a wire may be disposed. The conductor functioning as a wiring may be made of tungsten. It is preferable to use a conductive material containing copper or aluminum as a main component. The conductor may have a laminated structure, for example, a layer of titanium, titanium nitride and the above conductive material. The conductor may be formed so as to be embedded in an opening provided in the insulator. You may do so.

[0133] Although not shown, a thin film having a resistivity of 1.0×10 13 Ωcm or more 1.0×10 15 Ωcm or less, preferably 5.0×10 13 Ωcm or more 5.0×10 14 It is preferable to provide an insulator having a resistivity of Ωcm or less on the conductor. By providing the insulator, the insulator can maintain insulation properties while preventing the transistor 200 and the wiring The charge accumulated in the line (for example, the conductor) is dispersed, and the transistor and the This is preferable because it can suppress characteristic defects and electrostatic breakdown in electronic devices having transistors.

[0134] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0135] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate The semiconductor substrate may be a semiconductor such as silicon or germanium. Body substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of zinc oxide, gallium oxide, etc. A semiconductor substrate having an insulating region inside the substrate, such as SOI (Silicon On Insulator) Conductive substrates include graphite substrates, metal substrates, and alloy substrates. substrates, conductive resin substrates, etc. Or, substrates with metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or a semiconductor is provided on an insulating substrate, A substrate in which a conductor or an insulator is provided on a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided on a conductive substrate Alternatively, a substrate on which an element is provided may be used. The elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light emitting element, a recording element, and the like. There are memory elements, etc.

[0136] <<Insulators>> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0137] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using igh-k materials, the voltage required for transistor operation can be reduced while maintaining the physical film thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. Therefore, materials should be selected accordingly.

[0138] Insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. oxides with aluminum, aluminum and hafnium, oxides with silicon and hafnium, oxides with silicon and hafnium, Examples include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0139] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, or resin be.

[0140] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. Insulators having a function of controlling the temperature (insulator 214, insulator 222, insulator 254, and insulator By surrounding the transistor with a metal layer (such as 274), the electrical characteristics of the transistor can be stabilized. Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include porosity. Uron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine , argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium Insulators including titanium, hafnium, or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or thiamin oxide Metal oxides such as tantalum, aluminum nitride, titanium aluminum nitride, titanium nitride, and nitride Metal nitrides such as silicon oxide or silicon nitride can be used.

[0141] In addition, the insulator that functions as the gate insulator has a region containing oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, the oxide The oxygen deficiency of 230 can be compensated for.

[0142] <<Conductors>> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Metal elements selected from ammonium, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel, or an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation or absorb oxygen. It is a material that maintains conductivity even after oxidation, and is therefore preferred. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, Silicide may also be used.

[0143] Alternatively, a plurality of conductive layers made of the above materials may be stacked. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated layer that combines the material containing the metal element and the conductive material containing nitrogen is also available. In addition, a material containing the above-mentioned metal element, a conductive material containing oxygen, and a material containing nitrogen may be used. A laminated structure may be formed by combining a conductive material containing a silicon dioxide.

[0144] When an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a material containing the above-mentioned metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which a conductive material containing oxygen is used. It is preferable to provide the conductive material containing oxygen on the channel forming region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel formation region.

[0145] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate electrode. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing metal elements and nitrogen may also be used, such as titanium nitride and tantalum nitride. Alternatively, a conductive material containing nitrogen, such as indium tin oxide or tungsten oxide, may be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide, indium zinc oxide Indium tin oxide containing nitrogen may also be used. Mugallium zinc oxide may also be used. By using such a material, the channel is formed. In some cases, hydrogen contained in the metal oxides surrounding the outer insulating layer can be captured. It may be possible to capture hydrogen that is mixed in from the surroundings.

[0146] <<Metal oxides>> It is preferable to use a metal oxide that functions as a semiconductor as the oxide 230. Next, metal oxides applicable to the oxide 230 according to the present invention will be described.

[0147] The metal oxide preferably contains at least indium or zinc. It is preferable that the alloy contains aluminum and zinc. It is preferable that the alloy contains boron, titanium, iron, or the like. , nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, or Or, multiple types may be included.

[0148] Here, the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. The element M can be aluminum, gallium, yttrium, or Other elements that can be used for element M include boron, titanium, iron, and nickel. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, Examples include fluorine, tantalum, tungsten, and magnesium. However, the element M is: In some cases, a combination of the aforementioned elements may be used.

[0149] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). Metal oxides containing nitrogen are sometimes collectively called metal oxynitrides (metal oxynitrides). It may also be called tal oxynitride.

[0150] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors are, for example, CAAC-OS, polycrystalline nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS) and amorphous oxide semiconductors There is the body.

[0151] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure is distorted by the connection of multiple nanocrystals. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. This refers to the point where the direction of the

[0152] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, the distortion may have a lattice arrangement such as a pentagon or heptagon. In CAAC-OS, clear grain boundaries are observed even near the strain. It is difficult to confirm the grain boundary due to the distortion of the lattice arrangement. This is because the CAAC-OS has a high SiO2 content in the ab-plane direction. The oxygen atoms are not densely packed, and the bond distance between atoms changes due to the substitution of metal elements. This is because distortion can be tolerated by, for example, adjusting the distortion.

[0153] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). When the element M in the (M,Zn) layer is replaced with indium, the (In,M,Zn) ) layer. Also, when indium in the In layer is replaced with element M, it can be expressed as (In, It can also be expressed as the M layer.

[0154] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to identify grain boundaries, the decrease in electron mobility caused by grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides can be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS should be free from impurities and defects (oxygen vacancies (V O :oxygen v It can also be called a metal oxide with low acancy. Metal oxides with CAAC-OS have stable physical properties. The metal oxides used are heat resistant and highly reliable.

[0155] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0156] Indium gallium oxide, a type of metal oxide containing indium, gallium, and zinc, is used. The IGZO nanocrystals mentioned above are stable. In particular, IGZO tends to have difficulty growing crystals in the atmosphere. , small crystals (e.g., crystals of several mm or several cm) are more likely to be formed than large crystals (here, crystals of several mm or several cm). For example, the nanocrystals mentioned above may be structurally more stable.

[0157] The a-like OS is a metal oxide semiconductor with a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has pores or low density regions. The ke-OS has lower crystallinity than the nc-OS and CAAC-OS.

[0158] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention may be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more of them.

[0159] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0160] When alkali metals or alkaline earth metals are contained in metal oxides, defect levels are formed, Therefore, alkali metals or alkaline earth metals may generate carriers. Transistors that use metal oxides in the channel formation region have normally-on characteristics. Therefore, the concentration of alkali metals or alkaline earth metals in the metal oxides is low. Specifically, secondary ion mass spectrometry (SIMS) The amount of arsenic in metal oxides obtained by ion mass spectrometry (IMS) The concentration of alkaline metals or alkaline earth metals (obtained by SIMS) is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0161] In addition, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, metal oxides containing hydrogen can be used. Such a transistor is likely to have normally-on characteristics.

[0162] For this reason, it is preferable that the amount of hydrogen in the metal oxide is reduced as much as possible. is the hydrogen concentration obtained by SIMS in metal oxides, expressed as 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 Less than 5x1 0 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 less than A metal oxide with sufficiently reduced impurities is used for the channel formation region of a transistor. By doing so, stable electrical properties can be imparted.

[0163] It is preferable to use a thin film with high crystallinity as the metal oxide used as the semiconductor of a transistor. Use of the thin film can improve the stability or reliability of the transistor. The thin film may be, for example, a thin film of a single crystal metal oxide or a thin film of a polycrystalline metal oxide. However, thin films of single crystal metal oxides or thin films of polycrystalline metal oxides are Formation on a substrate requires high temperature or laser heating processes. This increases the cost of the process and also reduces throughput.

[0164] In 2009, we developed an In-Ga-Zn oxide (CAAC-IGZO) with a CAAC structure. The discovery of the compound α-hydroxybenzoic acid (α-hydroxybenzoic acid) is reported in Non-Patent Document 1 and Non-Patent Document 2. In this case, CAAC-IGZO has a c-axis orientation, the grain boundaries are not clearly visible, and the It has been reported that it can be formed on a substrate at low temperatures. The transistors made using this method have been reported to have excellent electrical properties and reliability.

[0165] In 2013, we also developed an In-Ga-Zn oxide (nc-IGZO) with an nc structure. nc-IGZO is a material that can be grown in a small area. The atomic arrangement has periodicity in the region (for example, the region of 1 nm or more and 3 nm or less), and different It has been reported that there is no regularity in the crystal orientation between the regions.

[0166] In Non-Patent Documents 4 and 5, the above-mentioned CAAC-IGZO, nc-IGZO, The average crystal size of IGZO thin films and low-crystalline IGZO thin films was measured by electron beam irradiation. The change in the thickness is shown in Fig. 1. In a thin film of IGZO with low crystallinity, before the electron beam irradiation, Even in thin films, crystalline IGZO of about 1 nm has been observed. In this case, completely amorphous structure Furthermore, it has been reported that the presence of IGZO with low crystallinity could not be confirmed. Compared with the thin films of CAAC-IGZO and nc-IGZO, the thin films of CAAC-IGZO and nc-IGZO are more resistant to electron beam irradiation. Therefore, CAA is a promising semiconductor for transistors. It is preferable to use a thin film of C-IGZO or a thin film of nc-IGZO.

[0167] Transistors using metal oxides have extremely low leakage current when they are off. Specifically, the off-state current per 1 μm of the transistor channel width is yA / μm (10-2 4 A / μm) order is shown in Non-Patent Document 6. For example, Low-power CPUs that utilize the low leakage current characteristics of the transistors used It has been disclosed (see Non-Patent Document 7).

[0168] In addition, the leakage current of a transistor using a metal oxide is low. The application of transistors to display devices has been reported (see Non-Patent Document 8). The displayed image changes several tens of times per second. The number is called the refresh rate. The refresh rate is also called the drive frequency. Such high-speed screen switching, which is difficult for the human eye to perceive, can cause eye fatigue. Therefore, the refresh rate of the display device is reduced to improve image quality. It has been proposed to reduce the number of times the screen is rewritten. By driving the display device, it is possible to reduce the power consumption of the display device. This is called Idling Stop (IDS) drive.

[0169] The discovery of the CAAC and nc structures was based on the discovery of metal oxides with the CAAC or nc structures. The electrical characteristics and reliability of the transistor using the material are improved, and the manufacturing process cost is reduced. This contributes to improving throughput and reducing power consumption. Taking advantage of this property, research into the application of this transistor to display devices and LSIs is underway. are.

[0170] <Method for manufacturing semiconductor device> Next, a semiconductor device including a transistor 200 according to one embodiment of the present invention, which is shown in FIG. The manufacturing method will be described with reference to FIGS. 4 to 11. (A) in the figure shows a top view. Also, (B) in each figure shows the dashed line A1-A2 shown in (A). 1 is a cross-sectional view corresponding to the portion indicated by the arrow . Also, (C) in each figure is a cross section corresponding to the area indicated by the dashed line A3-A4 in (A). 1A and 1B are cross-sectional views of the transistor 200 in the channel width direction. In the top view of FIG. 1, some elements have been omitted for clarity.

[0171] First, a substrate (not shown) is prepared, and an insulator 214 is formed on the substrate. The deposition of 214 is performed by sputtering, CVD, and molecular beam epitaxy (MBE). cular beam epitaxy (PLD), pulsed laser deposition (PLD) This can be done using a laser deposition method, an ALD method, or the like.

[0172] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (TCVD) method, and thermal CVD (TCVD) method. These methods can be further classified into the VD method, which uses light, and the Photo CVD method. Depending on the source gas, metal CVD (MCVD) and metal organic CVD are used. (MOCVD: Metal Organic CVD) method.

[0173] The plasma CVD method can produce high-quality films at relatively low temperatures. This film formation method does not use a plasma, so it is possible to reduce plasma damage to the object being treated. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc. included in a semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. In addition, the thermal CVD method can increase the yield of semiconductor devices. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0174] In addition, the ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time. This allows for ultra-thin film deposition, film deposition on structures with high aspect ratios, and pinholes. It is possible to form films with few defects such as holes, and to form films with excellent coverage, and to form films at low temperatures. In addition, the ALD method uses plasma, which is called PEALD (Plasma ALD). The use of plasma allows for growth at lower temperatures. The precursors used in the ALD method include carbon and other Some films contain impurities. For this reason, films deposited by ALD are not easily etched by other deposition methods. In some cases, the film may contain more impurities such as carbon than the film provided by the conventional method. The amount is measured using X-ray Photoelectron Spectroscopy (XPS). This can be done using CT.

[0175] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. However, the ALD method is relatively slow in forming films. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a high deposition rate. may be preferable.

[0176] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transport or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0177] In this embodiment, the insulator 214 is formed by sputtering aluminum oxide. The insulator 214 may have a multilayer structure. For example, a sputtering method is used. Then, an aluminum oxide film is formed by the ALD method. Alternatively, aluminum oxide may be deposited by the ALD method. A film of aluminum oxide is formed on the aluminum oxide by a sputtering method. A membrane structure may also be used.

[0178] Next, a conductive film that will become the conductor 205 is formed on the insulator 214. The deposition of the conductive film is performed using methods such as sputtering, CVD, MBE, PLD, and ALD. The conductive film that becomes the conductor 205 can be a multilayer film. In this embodiment, a tungsten film is formed as the conductive film that becomes the conductor 205.

[0179] Next, a conductive film that will become the conductor 205 is processed using lithography. Form.

[0180] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the resist patterned area using a developer. By etching through the resist mask, conductors, semiconductors, insulators, etc. are formed as desired. For example, KrF excimer laser light, ArF excimer laser light, etc. Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the substrate to light. It is also possible to use a liquid immersion technique in which the substrate is exposed to light by filling it with a liquid (for example, water). Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not required. dry etching, wet etching, or wet etching after dry etching wet etching, or wet etching followed by dry etching. This can be removed.

[0181] In addition, a hard mask made of an insulator or a conductor may be used instead of the resist mask. When a hard mask is used, an insulating layer that is a hard mask material is formed on the conductive film that is to be the conductor 205. An insulating film or a conductive film is formed, a resist mask is formed on it, and a hard mask material is etched. By this etching, a hard mask of a desired shape can be formed. The etching of the conductive film may be carried out after removing the resist mask, or after removing the resist mask. In the latter case, the resist mask may be removed during etching. After etching the conductive film that will become the conductor 205, the hard mask is removed by etching. On the other hand, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, If the hard mask can be removed, it is not necessary to remove the hard mask.

[0182] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. (Capacitively Coupled Plasma) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power supply may be applied to one of the parallel plate type electrodes. Alternatively, a parallel plate electrode may be used. Alternatively, a parallel plate electrode may be used. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching device or the like can be used.

[0183] Next, an insulating film to become the insulator 216 is formed on the insulator 214 and the conductor 205 . The insulating film is formed so as to be in contact with the upper surface and side surfaces of the conductor 205. Film formation is performed using methods such as sputtering, CVD, MBE, PLD, and ALD. In this embodiment, the insulating film that becomes the insulator 216 is formed by the CVD method. A silicon oxide film is formed.

[0184] Here, the thickness of the insulating film that becomes the insulator 216 is preferably equal to or greater than the thickness of the conductor 205. For example, if the thickness of the conductor 205 is 1, the thickness of the insulating film that becomes the insulator 216 is , is set to 1 or more and 3 or less. In this embodiment, the film thickness of the conductor 205 is set to 150 nm, and the insulating The thickness of the insulating film that becomes the body 216 is set to 350 nm.

[0185] Next, the insulating film that will become the insulator 216 is subjected to CMP (Chemical Mechanical Polishing). By performing a polishing process, a part of the insulating film that will become the insulator 216 is removed, The surface of the conductor 205 is exposed. This allows the conductor 205 and the conductor An insulator 216 can be formed in contact with the side surface of the insulating layer 205 (see FIG. 4). By improving the flatness of the top surfaces of the oxide 216 and the conductor 205, the oxide 230b and the oxide The crystallinity of the CAAC-OS forming 230c can be improved.

[0186] Hereinafter, a method for forming the conductor 205 that differs from the above will be described.

[0187] An insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by a sputtering method. The deposition can be carried out by using a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0188] Next, an opening is formed in the insulator 216 that reaches the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216 to form grooves. It is preferable to select an insulator that functions as an etching stopper film when etching. When a silicon oxide film is used for the insulator 216 forming the groove, the insulator 214 is made of silicon nitride. It is preferable to use a tantalum oxide film, an aluminum oxide film, or a hafnium oxide film.

[0189] After the opening is formed, a conductive film is formed to become the conductor 205. The conductive film has properties to suppress the permeation of oxygen. It is desirable to include a conductor having a function of controlling the temperature. For example, tantalum nitride, tungsten nitride, etc. Alternatively, the conductor may be a combination of tantalum, titanium, or titanium nitride. Tungsten, titanium, molybdenum, aluminum, copper, molybdenum-tungsten alloy The conductive film that becomes the conductor 205 can be formed by a sputtering method, a CV method, or the like. This can be done using the D method, MBE method, PLD method, ALD method, etc.

[0190] In this embodiment, the conductive film that becomes the conductor 205 has a multi-layer structure. A tantalum nitride film is formed by a deposition method, and titanium nitride is laminated on the tantalum nitride. By using such a metal nitride as the lower layer of the conductive film that becomes the conductor 205, The conductive film on the upper layer of the conductive film that becomes the conductor 205 is made of a metal that easily diffuses, such as copper. This also prevents the metal from diffusing out of the conductor 205.

[0191] Next, a conductive film is formed on the conductive film that will become the conductor 205. The conductive film is formed by plating. This can be done using methods such as the CVD method, MBE method, PLD method, and ALD method. In this embodiment, the conductive film on the conductive film that becomes the conductor 205 is made of a material such as copper. A low resistance conductive material is deposited.

[0192] Next, by performing CMP processing, the upper layer of the conductive film that will become the conductor 205 and the conductor 20 5, a portion of the lower layer of the conductive film is removed to expose the insulator 216. As a result, only the opening The conductive film that will become the conductor 205 remains on the surface of the conductor 205. It should be noted that the CMP process removes a part of the insulator 216. The above are the different methods for forming the conductor 205.

[0193] Next, the insulator 222 is formed on the insulator 216 and the conductor 205. As the insulating layer, an insulating film containing oxides of one or both of aluminum and hafnium is formed. It is recommended to use an insulator containing oxides of either or both of aluminum and hafnium. Examples include aluminum oxide, hafnium oxide, and oxides containing aluminum and hafnium. It is preferable to use aluminum and hafnium. Insulators containing oxides of one or both of these metals have barrier properties against oxygen, hydrogen, and water. The insulator 222 has a barrier property against hydrogen and water, and thus the transistor The hydrogen and water contained in the structure provided around the rotor 200 pass through the insulator 222. Diffusion into the inside of the transistor 200 is suppressed, and oxygen vacancies are generated in the oxide 230. can be suppressed.

[0194] The insulator 222 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using, for example.

[0195] Next, an insulating film 224A that will become the insulator 224 is formed on the insulator 222. The film A is formed using methods such as sputtering, CVD, MBE, PLD, and ALD. It can be done.

[0196] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250°C or higher and 650°C or lower. Preferably, the temperature is 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or in an atmosphere of oxidizing gas for 10 minutes. The heat treatment is carried out in an atmosphere containing more than ppm, more than 1%, or more than 10%. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere. After treatment, oxidizing gas is added at 10 ppm or more, 1% or more, or The heat treatment may be carried out in an atmosphere containing 10% or more of silicon.

[0197] In this embodiment, the insulating film 224A is heated at 400 The heat treatment is carried out at a temperature of 0°C for 1 hour. The heat treatment can remove impurities such as hydrogen. It can also be done at a later time.

[0198] Here, in order to form an excess oxygen region in the insulating film 224A, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be performed using, for example, a high-density microwave plasma. It is preferable to use a device having a power source for generating plasma. Alternatively, RF is applied to the substrate side. The plasma may have a power source that applies radio frequency (RF) to generate high density plasma. By using this, high density oxygen radicals can be generated, and RF is applied to the substrate side. This allows oxygen radicals generated by high-density plasma to be efficiently transported into the insulating film 224A. Alternatively, after performing plasma treatment containing an inert gas using this apparatus, In addition, plasma treatment containing oxygen may be performed to compensate for the desorbed oxygen. By appropriately selecting the conditions for the smear treatment, impurities such as water and hydrogen contained in the insulating film 224A can be removed. Impurities can be removed, in which case heat treatment is not necessary.

[0199] Here, aluminum oxide is deposited on the insulating film 224A by, for example, a sputtering method. After forming the insulating film 224A, CMP may be performed until the insulating film 224A is reached. By carrying out this oxidation treatment, the surface of the insulating film 224A can be flattened and smoothed. By disposing aluminum on the insulating film 224A and performing CMP processing, Furthermore, the CMP process polishes a part of the insulating film 224A, making it easier to detect. Although the thickness of the insulating film 224A may become thin, this can be achieved by adjusting the thickness during the formation of the insulating film 224A. By flattening and smoothing the surface of the insulating film 224A, the oxide film to be formed later can be prevented from being damaged. This may prevent the coverage rate from deteriorating and may prevent a decrease in the yield of semiconductor devices. On the insulating film 224A, an aluminum oxide film is formed by sputtering. This is preferable because oxygen can be added to the insulating film 224A.

[0200] Next, an oxide film 230A which will become an oxide 230a, an oxide film 230b and an oxide film 230c which will become an oxide 230b are formed on the insulating film 224A. The oxide film 230B is then formed in this order (see FIG. 4). It is preferable to form the oxide film 23 continuously without exposing it to the atmosphere. 0A and oxide film 230B, and prevents impurities or moisture from the atmospheric environment from adhering to the surface. This allows the vicinity of the interface between the oxide film 230A and the oxide film 230B to be kept clean.

[0201] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, or the like. The method can be carried out using a method such as a PLD method or an ALD method.

[0202] For example, the oxide film 230A and the oxide film 230B are formed by sputtering. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen ratio in the sputtering gas, the excess oxygen in the oxide film to be formed can be reduced. In addition, when the oxide film is formed by sputtering, In-M-Zn oxide targets can be used. A direct current (DC) power supply or an alternating current (AC) power supply such as a radio frequency (RF) power supply is connected to the Depending on the electrical conductivity of the target, the required power can be applied.

[0203] In particular, when forming the oxide film 230A, part of the oxygen contained in the sputtering gas is converted into the insulating film. Therefore, the sputtering gas for the oxide film 230A may be supplied to the The oxygen content is 70% or more, preferably 80% or more, and more preferably 100%. That's fine.

[0204] In addition, when the oxide film 230B is formed by sputtering, the oxide film 230B is formed by sputtering. The film is formed by setting the ratio of oxygen to be added at 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. The transistors used in this region have a relatively high field effect mobility. By performing film formation while However, one embodiment of the present invention is not limited to this. When forming by the sputtering method, the ratio of oxygen contained in the sputtering gas is set to more than 30% and less than 100%. %, preferably 70% to 100%, to form a film. A transistor using an oxygen-excess oxide semiconductor for the channel formation region is , relatively high reliability can be obtained.

[0205] In this embodiment, the oxide film 230A is formed by sputtering In:Ga:Zn =1:1:0.5 [atomic ratio] (2:2:1 [atomic ratio]), or In:Ga:Zn The film is formed using an In-Ga-Zn oxide target with an atomic ratio of 1:3:4. The oxide film 230B is formed by sputtering with a composition of In:Ga:Zn=4:2:4.1[ The film is formed using an In-Ga-Zn oxide target with the following atomic ratio. By appropriately selecting the film formation conditions and atomic ratio, it is possible to obtain the desired properties of oxide 230. It is good to form.

[0206] Here, the insulator 222, the insulating film 224A, the oxide film 230A, and the oxide film 230B are It is preferable to form the film without exposing it to the atmosphere. For example, a multi-chamber film formation method is used. A device can be used.

[0207] Next, a heat treatment may be carried out. The heat treatment may be carried out under the heat treatment conditions described above. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0208] Next, a conductive film 242A is formed on the oxide film 230B. This can be done using a deposition method, CVD method, MBE method, PLD method, ALD method, etc. See Figure 4.

[0209] Next, the insulating film 224A, the oxide film 230A, the oxide film 230B, and the conductive film 242A are formed into an island. The insulating layer 224, the oxide 230a, the oxide 230b, and the conductive layer 242B are formed. (See Figure 5.)

[0210] Here, the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B are The insulating layer 224 and the oxide layer 225 are formed so as to overlap at least a part of the conductor 205. 30a, oxide 230b, and the side surfaces of conductive layer 242B are in contact with the top surface of insulator 222. The insulating material 224, the oxide 230a, the oxide 230b, and the The side surfaces of the conductive layer 242B are approximately perpendicular to the upper surface of the insulator 222, When the transistor 200 is provided, it is possible to reduce the area and increase the density. 24, oxide 230a, oxide 230b, and the side of conductive layer 242B, and insulator 222 In this case, the insulator 224, the oxide 230a, oxide 230b, and the side surfaces of conductive layer 242B and the top surface of insulator 222. The angle is preferably between 60 degrees and 70 degrees. In this case, the covering property of the insulator 254 etc. is improved, and defects such as voids can be reduced.

[0211] In addition, a curved surface is provided between the side surface of the conductive layer 242B and the upper surface of the conductive layer 242B. It is preferable that the end of the side surface and the end of the top surface are curved (hereinafter referred to as "round"). The curved surface has a radius of curvature of, for example, 3 nm at the end of the conductive layer 242B. The thickness is from 10 nm to 100 nm, preferably from 5 nm to 6 nm. This improves the film coverage in the subsequent film formation process.

[0212] The insulating film 224A, the oxide film 230A, the oxide film 230B, and the conductive film 242A are processed. The process can be performed by lithography. Dry etching is suitable for microfabrication. In addition, the insulating film 224A, the oxide film 230A, the oxide film 230B, and the conductive film 24 The processing of 2A may be carried out under different conditions.

[0213] Next, the insulator 222, the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer An insulating film 254A is formed on 242B (see FIG. 6).

[0214] The insulating film 254A is preferably an insulating film having a function of suppressing oxygen permeation. For example, it is preferable to form an aluminum oxide film by sputtering. Depositing an aluminum oxide film by sputtering using a gas containing oxygen This allows oxygen to be implanted into the insulator 224. That is, the insulator 224 is made of excess It can have oxygen.

[0215] Next, an insulating film that will become the insulator 280 is formed on the insulating film 254A. The insulating film is formed by the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. Next, the insulating film that will become the insulator 280 is subjected to CMP processing, so that the upper surface A flat insulator 280 is formed (see FIG. 6).

[0216] Next, a part of the insulator 280, a part of the insulating film 254A, and a part of the conductive layer 242B are heated. The opening is formed so as to overlap the conductor 205. The openings allow the conductors 242a, 242b, and and an insulator 254 is formed (see FIG. 7).

[0217] In addition, a part of the insulator 280, a part of the insulating film 254A, and a part of the conductive layer 242B are heated. For example, a part of the insulator 280 may be dry etched. The insulating film 254A is processed by a wet etching method, and a part of the insulating film 254B is processed by a wet etching method. A part of 2B may be processed by dry etching.

[0218] By using conventional dry etching and other processes, the etching gas The resulting impurities adhere to or diffuse into the surface or interior of the oxide 230a, oxide 230b, etc. Impurities include, for example, fluorine and chlorine.

[0219] In order to remove the above impurities, cleaning is performed. There are various cleaning methods, such as wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. Cleaning may be carried out in combination as appropriate.

[0220] For wet cleaning, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are diluted with carbonated water or pure water. Alternatively, the cleaning process may be carried out using an aqueous solution of purified water or carbonated water. Wave washing may also be performed.

[0221] Next, a heat treatment may be carried out. The heat treatment is carried out under reduced pressure without exposure to the atmosphere. The oxide film 230C may be formed continuously. The moisture and hydrogen adsorbed on the surface of 230b are removed, and the oxide 230 The moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b can be reduced. The temperature of the heat treatment is preferably 100° C. or more and 400° C. or less. is set to 200°C (see Figure 8).

[0222] Oxide film 230C is formed by sputtering, CVD, MBE, PLD, and ALD methods. The oxide film 230C can be formed by using the following method. A film that becomes the oxide film 230C is formed using the same film formation method as that for the oxide film 230B. In this embodiment, the oxide film 230C is formed by sputtering In. :Ga:Zn=1:3:4[atomic ratio], or In:Ga:Zn=4:2:4.1[ The film is formed using an In-Ga-Zn oxide target with a [atomic ratio].

[0223] In particular, when forming the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide. 230a and oxide 230b. The proportion of oxygen contained in the sputtering gas is 70% or more, preferably 80% or more, and more preferably Preferably, it should be 100%.

[0224] Next, a heat treatment may be carried out. The heat treatment is carried out under reduced pressure without exposure to the atmosphere. The insulating film 250A may be formed continuously. Remove the moisture and hydrogen adsorbed on the surface of 230C, etc., and further remove the oxide 230 a, oxide 230b, and oxide film 230C. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower (see FIG. 9).

[0225] The insulating film 250A can be formed by a method such as sputtering, CVD, MBE, PLD, or ALD. The insulating film 250A can be formed by using a silicon oxynitride film by a CVD method. It is preferable to form a film of the insulating film 250A. The temperature is preferably 0° C. or higher and lower than 450° C., and particularly preferably around 400° C. By forming the film at 00°C, an insulating film with few impurities can be formed.

[0226] Next, the conductive film 260A and the conductive film 260B are formed. 260B can be formed by sputtering, CVD, MBE, PLD, ALD, etc. For example, it is preferable to use a CVD method. The conductive film 260A is formed by the ALD method, and the conductive film 260B is formed by the CVD method. (See Figure 10.)

[0227] Next, the oxide film 230C, the insulating film 250A, the conductive film 260A, and The oxide 230c is then removed by polishing the conductive film 260B until the insulator 280 is exposed. , the insulator 250, and the conductor 260 (the conductor 260a and the conductor 260b) are formed. (See FIG. 11.) As a result, the oxide 230c is formed in the opening that reaches the oxide 230b. The insulator 250 is disposed so as to cover the inner wall (side wall and bottom surface). The conductor 260 is disposed so as to cover the inner wall of the opening via the oxide. 230c and the insulator 250 are disposed to fill the opening.

[0228] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. The degree and hydrogen concentration can be reduced.

[0229] Next, an insulating layer is formed on the oxide 230c, the insulator 250, the conductor 260, and the insulator 280. The insulator 274 may be formed by a sputtering method, a CVD method, an MB method, or the like. The insulator 274 can be formed by, for example, an E method, a PLD method, an ALD method, or the like. For example, it is preferable to form an aluminum oxide film by sputtering. By forming an aluminum oxide film by a deposition method, the insulator 281 In some cases, it may be possible to suppress the diffusion of hydrogen into the oxide 230. By forming an insulator 274 in contact with the conductor 260, oxidation of the conductor 260 can be suppressed. Furthermore, the formation of the insulator 274 allows oxygen to be supplied to the insulator 280. The oxygen supplied to the insulator 280 passes through the oxide 230c and is transferred to the oxide 23 Oxygen may be supplied to the region 234 having the insulator 280. By this, the oxygen contained in the insulator 280 before the formation of the insulator 274 is converted into the oxide 230c. The oxide 230b may be supplied to the region 234 via the silicon dioxide.

[0230] Next, a heat treatment may be carried out. The heat treatment may be carried out under the above-mentioned heat treatment conditions. The heat treatment can reduce the moisture concentration and hydrogen concentration of the insulator 280. Also, oxygen contained in the insulator 274 can be implanted into the insulator 280.

[0231] As a method for forming the insulator 274 on the insulator 280, first, An insulating film made of the same material as that of the insulator 274 is formed by the same method as that of the insulator 274. Then, the insulating film is removed by CMP. Then, the insulator 274 is formed, and then the heat treatment is performed using the heating conditions described above. This method allows for the formation of more excess oxygen regions in the insulator 280. In the process of removing the insulating film, a part of the insulator 280, a part of the conductor 260, A portion of the insulator 250 and a portion of the oxide 230c may be removed.

[0232] An insulator may be provided between the insulator 280 and the insulator 274. For example, a silicon oxide film formed by sputtering may be used. By providing the body, an excess oxygen region can be formed in the insulator 280.

[0233] Next, an insulating film that will become the insulator 281 may be formed on the insulator 274. The insulating film is formed by the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. This can be done using (see Figure 11).

[0234] Next, conductor 2 is applied to insulator 254, insulator 280, insulator 274, and insulator 281. An opening is formed that reaches the conductive material 42a and the conductive material 242b. The opening is formed by lithography. This can be done using the - method.

[0235] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator The insulating film 241 is formed by sputtering, CVD, MBE, PL The insulating film can be formed by a method such as ALD or ALD. For example, an insulating film made of aluminum oxide by the ALD method is preferably used. It is preferable to form a silicon nitride film by using the ALD method or the CVD method. When a silicon nitride film is formed using the ALD method, silicon and Precursors containing halogen and precursors of aminosilanes can be used. Silicon and halogen-containing precursors include SiCl4, SiH2Cl2, and Si2C 16, Si3Cl8, etc. can be used. Also, as a precursor of aminosilanes, The nitriding gas may be monovalent, divalent, or trivalent aminosilanes. Ammonia or hydrazine can be used for the anisotropic etching. Dry etching or the like can be used. By configuring the sidewall of the opening in this way, This prevents oxygen from permeating from the other side, and prevents oxidation of the conductors 240a and 240b to be formed next. In addition, it is possible to prevent water, hydrogen, etc. from conductor 240a and conductor 240b. It is possible to prevent impurities from diffusing to the outside.

[0236] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. It is desirable to have a laminated structure including a conductor that has the function of suppressing the diffusion of impurities such as water and hydrogen. For example, tantalum nitride, titanium nitride, etc., and tungsten, molybdenum, copper, etc. The conductive film can be formed by a method such as sputtering or CVD. The deposition can be carried out by using an MBE method, a PLD method, an ALD method, or the like.

[0237] Next, a part of the conductive film is removed by CMP processing to expose the insulator 281. As a result, the conductive film remains only in the opening, forming a conductor 240 having a flat upper surface. a and conductor 240b can be formed (see FIG. 1). As a result, a part of the insulator 281 may be removed.

[0238] Through the above steps, a semiconductor device including the transistor 200 shown in FIG. 1 can be manufactured. As shown in FIGS. 4 to 11, the semiconductor device can be manufactured by using the manufacturing method of the semiconductor device described in this embodiment mode. In this way, the transistor 200 can be manufactured.

[0239] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high frequency characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided. .

[0240] <Configuration Example 2 of Semiconductor Device> FIG. 12 shows a transistor 200A according to one embodiment of the present invention and a transistor 200A 1 shows a top view and a cross-sectional view of the surroundings. Here is an example.

[0241] FIG. 12A is a top view of a semiconductor device including a transistor 200A. 12(B) and 12(C) are cross-sectional views of the semiconductor device. 12(A) is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 12(A), and is a cross-sectional view of the transistor 20 12(A) is also a cross-sectional view of the channel length direction of 0A. 1 is a cross-sectional view of a portion indicated by a dashed line in A4, and is a cross-section in the channel width direction of a transistor 200A. In the top view of FIG. 12(A), some elements are omitted for clarity. are.

[0242] In the semiconductor device shown in FIG. 12, the semiconductor device shown in <Configuration example 1 of the semiconductor device> The same reference numerals are used to designate structures having the same functions as those constituting the device.

[0243] The configuration of the semiconductor device will be described below with reference to FIG. The materials used for the semiconductor device are explained in detail in <Configuration example 1 of semiconductor device>. It is possible.

[0244] [Transistor 200A] As shown in FIG. 12, the transistor 200A is disposed on a substrate (not shown). an insulator 216, a conductor 205 disposed so as to be embedded in the insulator 216, and an insulator An insulator 222 is disposed on the conductor 216 and on the conductor 205, and a and an oxide 230 (oxide 230a) disposed on the insulator 224. , oxide 230b, oxide 230c1, and oxide 230c2), and on the oxide 230 and a conductor 260 (conductor 260) disposed on the insulator 250. a, and conductor 260b), and conductor 242a and conductor 242b in contact with a part of the top surface of oxide 230b. and conductor 242b, a barrier film 244a disposed on conductor 242a, and conductor 242b. 42b, a part of the upper surface of the insulator 222, and the insulator 224 the side of the oxide 230a, the side of the oxide 230b, the side of the conductor 242a, the barrier The conductive film 242b is disposed in contact with the upper surface of the film 244a, the side surface of the conductive film 242b, and the upper surface of the barrier film 244b. and an insulator 254 (insulator 254a and insulator 254b) formed therebetween.

[0245] The insulator 254 is configured by laminating two layers of an insulator 254a and an insulator 254b. The oxide 230c has a structure in which two layers of oxide 230c1 and oxide 230c2 are stacked. The barrier film 244a and the barrier film 244b are the same as those of the transistor 2 described above. 00. The differences from transistor 200 will be described below.

[0246] As shown in FIG. 12, the insulator 254 is made up of an insulator 254a and a For example, the insulator 254a is formed to prevent impurities such as water and hydrogen from being absorbed. However, it functions as a barrier film that prevents diffusion from the insulator 280 side to the transistor 200A. In addition, for example, the insulator 254b is formed by insulating the oxygen in the oxide 230. It is preferable to suppress the diffusion of the insulating layer 280 toward the insulating layer 280. This can prevent hydrogen from entering the channel formation region of the oxide 230. In addition, it is possible to prevent oxygen from being released from the channel forming region of the oxide 230. The insulator 254a is made of silicon nitride formed by sputtering. The insulator 254b may be made of aluminum oxide formed by ALD.

[0247] For example, the insulator 254a may be an insulating material having an excess oxygen region or an excess An insulating material that easily forms an excess oxygen region is used as the insulator 254b. It is preferable to use an insulating material that easily forms an oxygen region. a is a silicon oxide film formed by sputtering, and the insulator 254b is Therefore, it is possible to use aluminum oxide formed by sputtering. By laminating two layers, the excess oxygen in the insulator 254a is converted into the oxide 230. can be efficiently supplied to

[0248] If the insulator 254a contains excess oxygen, the barrier A barrier film 244b is provided in contact with the upper surface of the conductor 242b. The barrier film 244a and the barrier film 244b are preferably formed to prevent impurities such as water and hydrogen, and The oxide 230c and the insulator 250 have a function of suppressing the permeation of oxygen. Preventing excess oxygen in the conductive material from diffusing into the conductive material 242a and the conductive material 242b. In other words, excess oxygen in the surrounding area is used to oxidize the conductors 242a and 242b. Furthermore, it is possible to prevent the conductors 242a and 242b from being oxidized. This prevents the electrical resistance of the conductors 242a and 242b from increasing. The electrical resistance of a conductor can be measured using the two-terminal method. Cut.

[0249] The barrier film 244a and the barrier film 244b may be made of, for example, aluminum oxide, oxide, or the like. Magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide metal oxides such as tantalum oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and nitride oxide; Silicon oxide, silicon nitride, or the like may be used.

[0250] In addition, the barrier film 244a and the barrier film 244b are made of conductive material that is difficult for impurities to penetrate. A conductive material may be used for the barrier film 244a and the barrier film 244b. In this case, it is preferable to use a conductive material that is less likely to release or absorb oxygen. It is to be noted that the barrier film 244a and the barrier film 244b may not be provided.

[0251] The insulator 254 is not limited to a configuration in which the insulator 254a and the insulator 254b are stacked. Alternatively, the insulating layer 254 may be a single layer, or the insulating layer 254 may be a layer of the insulator 254a, the insulator 254b, and the insulator 254c. Three layers may be laminated. When three layers are laminated, for example, the insulator 25 4a: An insulating material that has the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. As the insulator 254b, an insulating material having an excess oxygen region is used, and as the insulator 25 For 4c, it is preferable to use an insulating material that has the function of suppressing the diffusion of oxygen. By using a three-layer stack, the excess oxygen in the insulator 254b is absorbed into the insulator 254a. Therefore, the diffusion of the insulating material 254c to the outside can be suppressed. The excess oxygen contained in the body 254b can be efficiently supplied to the oxide 230.

[0252] When the insulator 254 is configured to have two or more layers stacked, the insulating layer The combination of materials and the layering order can be designed appropriately depending on the desired transistor characteristics. stomach.

[0253] As shown in FIG. 12, the oxide 230c is composed of an oxide 230c1 and an oxide 230c and an oxide 230c2 disposed on the oxide 230c1. It is preferable that the metal oxide used in b contains at least one of the metal elements constituting the metal oxide, It is more preferable that all of the metal elements are contained. The defect level density at the interface with the oxide 230c2 can be reduced. The oxide 230c1 is preferably a metal oxide that inhibits oxygen diffusion or permeation. By providing the oxide 230c2 between the insulator 250 and the oxide 230c1, This can prevent oxygen contained in the insulator 280 from diffusing into the insulator 250. Therefore, the oxygen is easily supplied to the oxide 230 via the oxide 230c1.

[0254] Moreover, the oxide 230c1 and the oxide 230c2 preferably have crystallinity. It is more preferable that the oxide 230c2 has higher crystallinity than the oxide 230c1. It is preferable to use CAAC-OS as the oxide 230c1 and the oxide 230c2. Preferably, the c-axes of the crystals of the oxide 230c1 and the oxide 230c2 are the same as those of the oxide 230c1 and the oxide 230c2. 230c1 and the oxide 230c2 are oriented in a direction substantially perpendicular to the surface on which the oxide 230c1 is formed or the upper surface thereof. It is preferable that the CAAC-OS has a property of making it difficult for oxygen to move in the c-axis direction. Therefore, by providing the oxide 230c2 between the oxide 230c1 and the insulator 250, The oxygen contained in the oxide 230c1 is prevented from diffusing into the insulator 250, and the oxygen is The oxide 230 can be efficiently supplied.

[0255] Specifically, the oxide 230c1 is a compound of In:Ga:Zn=4:2:3 [atomic ratio]. Metal oxide was used, and the oxide 230c2 was In:Ga:Zn=1:3:4 [atomic ratio In the metal oxide used for the oxide 230c2, the constituent elements The atomic ratio of In in the metal oxide used for oxide 230c1 is By making the atomic ratio smaller than that of In, the diffusion of In into the insulator 250 side is suppressed. Since the insulator 250 functions as a gate insulator, In is If the oxide 230c is mixed in the semiconductor layer, the transistor characteristics will be deteriorated. By adopting this structure, it is possible to provide a highly reliable semiconductor device.

[0256] The insulator 280 may also be configured to have a two-layer laminated structure. As described above, the insulator 280 is made up of an insulator 280a and an insulator 280b arranged on the insulator 280a. 80b, the insulator 280a preferably has an excess oxygen region. The insulator 280a is physically closer to the channel forming region of the oxide 230 than the insulator 280b. Because the distance is short, the oxygen contained in the insulator 280 is effectively transported to the channel forming region of the oxide 230. It can be supplied efficiently.

[0257] Specifically, the insulator 280a is a silicon oxide film formed by sputtering. and silicon oxynitride formed by CVD is used as the insulator 280b. The thickness of the insulator 280a is preferably 30 nm or more and 100 nm or less, and more preferably 40 It is more preferable that the thickness of the transistor 200A is between 100 nm and 80 nm. Although the configuration in which the edge body 280 is stacked is shown, the present invention is not limited to this. For example, the insulator 280 may be a single layer or a laminated structure of three or more layers. stomach.

[0258] As shown in FIG. 12, an insulator 282 is provided between the insulator 274 and the insulator 281. The insulator 282 has a function of suppressing the diffusion of impurities such as hydrogen and oxygen. For example, it is preferable to use an insulating film formed by sputtering or ALD. It is preferable to form a film of silicon nitride, aluminum oxide, or the like. By doing so, oxygen contained in the insulators 280 and 250 diffuses to the insulator 281 side. This can prevent this from happening.

[0259] As described above, the configurations, methods, etc. shown in this embodiment may be different from the configurations, methods, etc. shown in other embodiments. They can be used in appropriate combinations.

[0260] (Embodiment 2) An example of a semiconductor device including a transistor 200B according to one embodiment of the present invention will be described below. and explain.

[0261] <Configuration Example 3 of Semiconductor Device> 13A to 13D show a transistor 200B according to one embodiment of the present invention and 1A and 1B are a top view and a cross-sectional view of the transistor 200B and the periphery thereof. This is a modified example of the transistor 200.

[0262] In the semiconductor device described in this embodiment mode, the semiconductor device described in the previous embodiment mode may be The same reference numerals are used to designate structures having the same functions as those of the structures constituting the same embodiment. The structure of the semiconductor device shown in this embodiment is common to the structure, materials, and the like of the semiconductor device shown in For details of the structures, materials, etc., and details of the structures, materials, etc., to which the same reference numerals are attached, please refer to the previous embodiment. Please refer to the description of the form.

[0263] FIG. 13A is a top view of a semiconductor device including a transistor 200B. 13(B) to 13(D) are cross-sectional views of the semiconductor device. 13A is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 13A, and is a cross-sectional view of the transistor 20 13(C) is also a cross-sectional view of the channel length direction of 0B. 10 is a cross-sectional view of the portion indicated by the dashed line A4, and is a cross-section in the channel width direction of the transistor 200B. FIG. 13(D) is also a side view. The area indicated by the dashed line A5-A6 in FIG. 13(A) is 1 is a cross-sectional view of the transistor 200B in the vicinity of the region 243b that functions as a low-resistance region. It is also a cross-sectional view. In the top view of FIG. 13(A), some elements are omitted for clarity. It is.

[0264] The semiconductor device of one embodiment of the present invention includes a transistor 200B and an insulating film serving as an interlayer film. The insulator 214, the insulator 280, the insulator 274, and the insulator 281. A conductor 240 (conductor 240) electrically connected to the transistor 200B and functioning as a plug The side of the conductor 240 that functions as a plug is An insulator 241 (insulator 241a and insulator 241b) is provided in contact with the insulating material 241.

[0265] In addition, the insulator 254 (insulator 254a and insulator 254b), the insulator 280, the insulator The insulator 241 is provided in contact with the side walls of the openings of the body 274 and the insulator 281. The first conductor of the conductor 240 is provided in contact with the first conductor, and the second conductor of the conductor 240 is provided further inward. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 are In the transistor 200B, the first and second conductors of the conductor 240 are The present invention is not limited to this configuration, but may be applied to a configuration in which the first conductor and the second conductor of the conductor 240 are stacked. For example, the conductor 240 may be a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, an ordinal number is assigned to indicate the order of formation to distinguish the layers. This may occur.

[0266] [Transistor 200B] As shown in FIG. 13, the transistor 200B is disposed on a substrate (not shown). an insulator 216, a conductor 205 disposed so as to be embedded in the insulator 216, and an insulator An insulator 222 is disposed on the conductor 216 and on the conductor 205, and a and an oxide 230 (oxide 230a) disposed on the insulator 224. , oxide 230b, oxide 230c1, and oxide 230c2), and on the oxide 230 and a conductor 260 (conductor 260) disposed on the insulator 250. a, and conductor 260b), a part of the top surface of insulator 222, the side surface of insulator 224, and oxide The oxide 230b is disposed in contact with the side of the oxide 230a, the side of the oxide 230b, and the top surface of the oxide 230b. and an insulator 254 (insulator 254a and insulator 254b) formed therebetween.

[0267] In the following, the oxide 230c1 and the oxide 230c2 are collectively referred to as oxide 2 It is sometimes called 30c.

[0268] As shown in FIG. 13, the top surface of oxide 230b is provided with regions 243a and 243b. are formed apart from each other. The insulator 280 also includes a region 243a and a region An opening is provided that is formed so as to overlap the area between the area 243b.

[0269] Conductor 260 functions as the gate electrode of the transistor and is connected to regions 243a and 243b. 43b function as a source region or a drain region, respectively. In B, the conductor 260 is exposed through an opening formed in the insulator 280 and the insulator 254. and a self-aligned structure is formed so as to be embedded in the region between the region 243a and the region 243b. By forming the conductor 260 in this manner, the region 243a and the region 24 3b, the conductor 260 can be reliably placed without alignment. Therefore, the area occupied by the transistor 200B can be reduced. This allows for miniaturization and high integration of semiconductor devices.

[0270] The conductor 260 is made up of a conductor 260a and a conductor 260b arranged on the conductor 260a. For example, the conductor 260a has a bottom surface 60b. It is preferable that the casing is arranged so as to wrap around the sides. The top surface of conductor 260 is approximately the same as the top surfaces of insulator 250, oxide 230c, and insulator 280. Preferably they match.

[0271] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the insulator 224. and an oxide 230b disposed on the oxide 230b, at least a portion of which is oxide. The oxide 230c1 is in contact with the top surface of the oxide 230b, and the oxide 230c1 is disposed on the oxide 230c1. It is preferable that the compound 230c1 has a fluorine-containing compound 230c2.

[0272] In the transistor 200B, oxide 2 is formed in the channel formation region and its vicinity. 30a, oxide 230b, oxide 230c1, and oxide 230c2 are stacked. However, the present invention is not limited to this. A single layer of oxide 230b, a two-layer structure of oxide 230a and oxide 230b, and oxide 230b and oxide 230c. Two-layer structure of oxide 230c, three-layer structure of oxide 230a, oxide 230b and oxide 230c1, oxide A three-layer structure of the oxide 230a, the oxide 230b, and the oxide 230c2, or a stacked structure of five or more layers. Alternatively, the oxide 230a and the oxide 230b may be formed as follows: The oxide 230c may have a single layer structure or a stacked structure of three or more layers. The above laminated structure may also be used.

[0273] Also, for example, the oxide 230c is formed by the oxide 230c1 and the oxide 230c1. In the case of a laminate structure consisting of oxide 230c1 and oxide 230b, oxide 230c1 is The oxide 230c2 preferably has a composition similar to that of the oxide 230a. .

[0274] The transistor 200B also includes an oxide 230 (oxide 230 a, oxide 230b, oxide 230c1, and oxide 230c2) function as semiconductors. It is preferable to use a metal oxide (hereinafter also referred to as an oxide semiconductor) that can perform the function.

[0275] The transistor 200B using an oxide semiconductor for a channel formation region is in a non-conducting state. Therefore, the leakage current (off-state current) is extremely small, so that a semiconductor device with low power consumption can be provided. In addition, oxide semiconductors can be deposited by sputtering or other methods, making them suitable for highly integrated semiconductors. This can be used for the transistor 200B that constitutes the entire device.

[0276] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum, gallium, etc.). Smoke, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium one or more selected from the group consisting of aluminum, tantalum, tungsten, magnesium, etc. Metal oxides are preferably used. In particular, the element M is aluminum, gallium, yttrium, Alternatively, tin may be used. Indium oxide, zinc oxide, In In-Ga oxide, In-Zn oxide, Ga-Zn oxide, or gallium oxide may be used. stomach.

[0277] Here, the oxide 230 contains an element that forms an oxygen vacancy or an element that bonds with the oxygen vacancy. Addition of such elements can increase the carrier density and reduce the resistance. Typical examples of these elements include boron and phosphorus. In addition to boron and phosphorus, hydrogen, carbon, The following gases can be used: silicon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gases, etc. Representative examples include helium, neon, argon, krypton, and xenon. , oxide 230 is aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Add one or more metal elements selected from metal elements such as ammonium, lanthanum, etc. Among the above, boron and phosphorus are preferred as the added elements. For the addition of silicon and phosphorus, amorphous silicon or low-temperature polysilicon production lines This allows the use of equipment with a lower investment in facilities. can be measured using SIMS or the like.

[0278] 13B is an enlarged view of a part of the transistor 200B shown in FIG. 14A. ) The region 243 is a region formed by adding the above elements to the oxide 230. As shown in FIG. 13(B) and FIG. 14(A), the region 243a and the region 243b are The conductive material 260 is formed so as to face each other, and it is preferable that the upper surface of the conductive material 260 contacts the insulator 254. In top view, the side surfaces of the region 243a and the region 243b facing the conductor 260 are The area 243a and the area 243b are aligned with the side of the conductive material 260, or a part of the conductive material 260 is aligned with the side of the conductive material 260. It is preferable that the concentration of the above elements in the region 243 overlaps with that of the oxide 260. The concentration of the above elements is equal to or greater than that of the portion where the region 243 of 30 is not formed. The amount of oxygen vacancies in the region 243 is preferably higher than that in the region 230. It is preferable that the amount of oxygen vacancies is equal to or higher than the amount of oxygen vacancies in the area where 243 is not formed. This allows the region 243 to be formed in the area where the region 243 of the oxide 230 is not formed. Compared to , the carrier density is higher and the resistance is lower.

[0279] In the oxide 230, the region overlapping with the conductor 260 is referred to as a region 234, and the insulator 254 is referred to as a region 234. The area overlapping with the area 231 (area 231a and area 231b) is area 231, and the area 234 is area 231a. The area between the areas 231 is referred to as area 232 (area 232a and area 232b). As shown in FIG. 4(A), the region 234 is located between the region 231a and the region 231b. 232a is located between the region 231a and the region 234, and the region 232b is located between the region 231b and the region 234. Here, the region 231 has a higher carrier density than the region 234. The region 232 has a high carrier density and a low resistance compared to the region 234. The region 231 has a high carrier density and is a low-resistance region. Alternatively, the region 232 has the same carrier density as the region 231 and the same resistance. Therefore, the region 234 may serve as a channel forming region of the transistor 200B. region 231 functions as a source or drain region, and region 232 functions as a contact. It functions as a merge area.

[0280] By adopting such a structure, the channel forming region of the oxide 230 and the source region or the drain region are The offset region is prevented from being formed between the drain region and the effective channel length. This prevents the width of the transistor 20 from becoming larger than the width of the body 260. By increasing the ON current of 0B, the S value (also called Subthreshold Swing, SS) This improves the frequency characteristics.

[0281] The oxide 230 is formed with regions 231 that function as source or drain regions. Thus, the region 231 can be formed without providing a source electrode and a drain electrode made of metal. A conductor 240 that acts as a plug can be connected. When the source electrode and the drain electrode formed by the method described above are provided, the manufacturing process of the transistor 200B is completed. When high-temperature heat treatment is performed during the process or after the process, the source electrode and The drain electrode and the gate electrode are oxidized, and the on-state current, the S value, and the frequency characteristics of the transistor 200B are However, in the semiconductor device described in this embodiment, Therefore, there is no need to provide separate source and drain electrodes. Even if high-temperature heat treatment is performed during the manufacturing process or post-process, good on-state current, S value, and For example, a semiconductor device shown in this embodiment can be provided. In the semiconductor device, after the transistor 200B is fabricated, it is heated at a high temperature of about 750° C. or more and 800° C. or less. This process can be carried out at high temperatures.

[0282] As described above, an element that forms oxygen vacancies in the region 243 is added and then heat treatment is performed. By this, hydrogen contained in the region 234 functioning as a channel formation region is transferred to the region 243. This allows the transistor 200B to have a stable current. This provides thermal characteristics and improves reliability.

[0283] In FIG. 14A, the region 243 is formed by the oxide 230b in the film thickness direction. However, the present invention is not limited to this. For example, the region Region 243 may have a thickness approximately the same as that of oxide 230b, or may have a thickness greater than that of oxide 230. In FIG. 14(A), the region 243 may be formed only in the region 231. However, the present invention is not limited to this. For example, the regions 231 and 232 are Alternatively, the region 231 and a part of the region 232 may be formed. 231, region 232, and part of region 234.

[0284] In addition, it may be difficult to clearly detect the boundaries of each region in the oxide 230. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region are It is not limited to gradual changes in each area, but also to continuous changes within each area (also known as gradation). In other words, the closer to the channel forming region, the more metal elements, etc. It is sufficient that the concentrations of impurity elements such as hydrogen and nitrogen are reduced.

[0285] 13(B), the insulator 224, the oxide 230a, and the oxide 23 Preferably, an insulator 254 is disposed between the insulator 254 and the insulator 280. The edge 254 is formed on the upper and side surfaces of the region 243a, the upper and side surfaces of the region 243b, and the acid The side surfaces of the oxide 230a and the oxide 230b, the side surfaces of the insulator 224, and the top surface of the insulator 222 are It is preferable that the insulator 280 contacts the surface of the insulator 254. The insulating material 224, the oxide 230a, and the oxide 230b are separated from each other. Impurities such as hydrogen contained in the oxide 280 and the insulator 281 are transferred to the insulator 224 and the oxide 23. 0a and the inclusion of the oxide 230b can be suppressed.

[0286] The insulator 254 has a layered structure including an insulator 254a and an insulator 254b. In this case, the insulator 254a may be formed on the upper surface and side surface of the region 243a and on the The top and side surfaces of the oxide 230a and oxide 230b, and the insulator 22 4 and the upper surface of the insulator 222. The insulator 254b is provided on the insulator 254a and is provided to be in contact with the insulator 280. When the insulator 254 has a layered structure as described above, the insulator 254a One of the insulators 254a and 254b has a function of suppressing the diffusion of hydrogen, and the other has a function of suppressing the diffusion of oxygen. The configuration may have a function to suppress this.

[0287] Also, the insulator 254a provides an oxide layer to the insulator 224, the oxide 230a, and the oxide 230b. The device may have a function of supplying the element.

[0288] Insulator 274 is made up of conductor 260, insulator 250, oxide 230c, and insulator 280. The transistor 200B according to one embodiment of the present invention is in contact with the top surface of each of the transistors shown in FIG. As shown in FIG. 4(A), the insulator 274 and the insulator 250 are in contact with each other. By adopting such a structure, impurities such as hydrogen contained in the insulator 281 are absorbed into the insulator 2 Therefore, the electrical characteristics and This can suppress adverse effects on the reliability of the transistor.

[0289] 13(C) is an enlarged view of a part of the transistor 200B shown in FIG. 14(B). As shown in FIG. 13(C) and FIG. 14(B), the channel of the transistor 200B In the width direction of the panel, the conductor 260 and the oxide 230 are spaced apart from each other with the bottom surface of the insulator 222 as the reference. The height of the bottom surface of the conductor 260 in the region where it does not overlap with the oxide 230b is The conductor 260 serving as the gate electrode is preferably The side and top surfaces of the oxide 230b are covered with the oxide 230c and the insulator 250. By forming the oxide 230b in this manner, the electric field of the conductor 260 can be easily applied to the entire region 234 of the oxide 230b. This increases the on-state current of the transistor 200B and improves the frequency characteristics. The oxide 230a and the oxide 230b do not overlap with the conductor 260. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the region is defined as T2 Then, T2 is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, More preferably, it is set to 5 nm or more and 20 nm or less.

[0290] As shown in FIG. 14B, in the channel width direction of the transistor 200B, The oxide 230b, the oxide 230a, and the oxide 230 in the area that does not overlap with the insulator 224 It is preferable that at least a part of c contacts the insulator 222. By adopting this configuration, The oxygen contained in the oxide 230c passes through the insulator 224 and reaches the outside of the transistor 200B. Alternatively, the oxide 230b and the oxide 230a can be prevented from diffusing to the other side. The oxygen contained therein is prevented from diffusing through the insulator 224 to the outside of the transistor 200B. Alternatively, the area of ​​the insulator 224 can be reduced, so that the insulator 224 can be prevented from being broken. The amount of oxygen taken in is reduced, and the reduction in the amount of oxygen supplied to the oxide 230 can be suppressed. Therefore, the oxygen contained in the oxide 230c is efficiently transferred to the oxide 230b and the oxide 230c. 230a, which prevents the oxide 230 in the region 234 from becoming low in resistance. Therefore, the fluctuation of the electrical characteristics of the transistor can be suppressed, and the electrical characteristics can be stabilized. This can achieve the above and improve reliability.

[0291] Alternatively, by adopting the above-described structure, impurities such as hydrogen contained in the insulator 224 or the like can be converted into oxides. In other words, the decrease in the resistance of the oxide 230 can be prevented. Therefore, the fluctuation of the electrical characteristics of the transistor can be suppressed, and stable electrical characteristics can be obtained. This structure can realize the high performance and improve the reliability. 30b, and the insulator 224 in the area not overlapping with the oxide 230a, thereby forming It is possible.

[0292] As shown in FIG. 14(B), the oxide 230b and the oxide 230a are not overlapped. The insulator 224 in the thin area is removed, and the oxide 230a and the oxide 230b are formed in the form of islands. By adopting such a configuration, the channel of the transistor 200B is preferably formed. In the width direction of the insulating film 222, the oxide 230a and the oxide 23 The height of the bottom surface of the conductor 260 in the region where the conductor 260 does not overlap with the oxide film 0b is Therefore, the height of the bottom surface of the transistor 200B is likely to be lower than the height of the bottom surface of the object 230b. The on-current can be increased and the frequency characteristics can be improved.

[0293] As described above, a semiconductor device including a transistor with large on-state current can be provided. Furthermore, a semiconductor device having a transistor with high frequency characteristics can be provided. In addition, fluctuations in electrical characteristics are suppressed, resulting in stable electrical characteristics and improved reliability. In addition, a semiconductor device having a low off-state current can be provided. It is possible to provide a semiconductor device that

[0294] The following describes in detail the structure of a semiconductor device including a transistor 200B according to one embodiment of the present invention. Note that the structure, materials, and the like of the semiconductor device shown in the previous embodiment will be described. The details of the structure, materials, and the like of the semiconductor device shown in this embodiment and the semiconductor devices having the same reference numerals will be described. For details of the structure, materials, etc., please refer to the description of the previous embodiment.

[0295] The oxide 230b and the oxide 230c preferably have crystallinity. It is preferable to use AAC-OS. Crystalline oxides such as CAAC-OS are It has few impurities and defects (oxygen deficiency, etc.), a highly crystalline, and dense structure. By having such oxide 230, transistor 200B can withstand high temperatures during the manufacturing process. It becomes stable against temperature (so-called thermal budget).

[0296] As shown in FIGS. 13B and 13C, the insulator 254 is disposed on the side of the oxide 230c. A portion of the surface, the top and side surfaces of region 243a, and the top and side surfaces of region 243b, i.e., oxide 2 a part of the top surface and a part of the side surface of 30b, a side surface of the oxide 230a, a side surface of the insulator 224, and It is preferable that the insulator 222 contacts the upper surface of the insulator 28. 0 is separated from the insulator 224 and the oxide 230 by the insulator 254. As a result, hydrogen contained in the insulator 280 is transferred to the oxide 230a, the oxide 230b, and the insulator 280. This can prevent diffusion from the top or side of the body 224 into the oxide 230. This can provide the transistor 200B with good electrical characteristics and reliability.

[0297] As will be described later, the insulator 254 is formed when the region 243a and the region 243b are formed. The region 243a and the region 243b may have a function as a protective film. When ion implantation or ion doping is used, an insulator 254 is used as a protective film. By providing the oxide 230, the surface of the oxide 230 is not directly exposed to ions or plasma, and the region This is because damage to the oxide 230 during the formation of the regions 243a and 243b can be suppressed. Here, the damage to the oxide 230 refers to excessive oxidation in the oxide 230. This refers to the formation of electron vacancies and the deterioration of the crystallinity of the excessive oxide 230. For example, As the silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine doped silicon oxide, carbon doped silicon oxide, carbon and nitrogen doped silicon oxide Silicon, silicon oxide having voids, etc. can be used.

[0298] In this embodiment, the insulator 254 has a layered structure. In the case of a laminated structure of the insulator 254a and the insulator 254b, for example, the insulator 254a is Then, the insulator 254b is formed by the ALD method. The ALD method is a film formation method with good coating properties, so the unevenness of the insulator 254a can be formed. This can prevent the formation of discontinuities and the like. The body 254b may be made of the same material or different materials selected from the above-mentioned materials. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride may be used. The product of silicon and an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen It may have a layer structure. It also has the function of suppressing the permeation of impurities such as hydrogen and oxygen. The insulator may include, for example, oxides of one or both of aluminum and hafnium. An insulator can be used. Note that the insulator 254 is shown as a two-layer structure in FIG. However, it may have a single layer structure or a laminated structure of three or more layers.

[0299] The insulator 280 is connected to the insulator 222, the insulator 224, and the oxide via the insulator 254. 230.

[0300] The insulating material 281, the insulating material 274, the insulating material 280, and the insulating material 254 are in contact with the side walls of the openings. An insulator 241a is provided, and a first conductor of the conductor 240a is formed in contact with the side surface of the insulator 241a. A region 243a is located at least in a part of the bottom of the opening, and a conductor Similarly, the insulator 281, the insulator 274, and the insulator 280 are in contact with each other. The insulator 241b is provided in contact with the side wall of the opening of the insulator 254, and the insulator 241b is provided in contact with the side wall of the opening of the insulator 254. The first conductor of the conductor 240b is formed at least part of the bottom of the opening. A region 243b is located in the region 240b, and the conductor 240b contacts the region 243b.

[0301] When the conductor 240 has a laminated structure, the oxide 230a, the oxide 230b, the insulator 254 The conductors in contact with the insulators 280, 274, and 281 contain water, hydrogen, etc. It is preferable to use a conductive material that has the function of suppressing the permeation of impurities.

[0302] <Method for manufacturing semiconductor device> Next, a semiconductor device including a transistor 200B according to one embodiment of the present invention, which is illustrated in FIG. The manufacturing method will be described with reference to FIGS. 15 to 22. In each figure, (A) shows a top view. Also, (B) shows the A1-A2 shown in (A). 1 is a cross-sectional view corresponding to the portion indicated by the dashed line in the channel length direction of the transistor 200B. (C) in each figure corresponds to the area indicated by the dashed line A3-A4 in (A). 1 is a cross-sectional view of the transistor 200B taken along the channel width direction. (D) in each figure is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in (A), It is also a cross-sectional view of the vicinity of the region 243b of the transistor 200B. In order to clarify the diagram, some elements have been omitted. The explanation for this will be omitted.

[0303] First, a substrate (not shown) is prepared, and an insulator 214 is formed on the substrate. 14, a conductor 205 and an insulator 216 are formed on the conductor 205 and the insulator 216. An insulator 222 is formed on the insulating film 224A, and an insulating film 224A is formed on the insulating film 224A. An oxide film 230A and an oxide film 230B are formed in this order (see FIG. 15).

[0304] In the method for manufacturing a semiconductor device including the transistor 200B, the oxide film 230B The steps up to the deposition of the film are the same as those for the semiconductor device including the transistor 200 described in Embodiment 1. Since the steps are similar, detailed explanation of the steps up to forming the oxide film 230B will be omitted.

[0305] Next, the insulating film 224A, the oxide film 230A, and the oxide film 230B are processed into an island shape to form an insulating film. The insulator 224, the oxide 230a, and the oxide 230b are formed. Therefore, the thickness of the insulator 222 in the region where it does not overlap with the insulator 224 may be thin (see FIG. 16). reference.).

[0306] Here, the insulator 224, the oxide 230a, and the oxide 230b are at least partially The insulating layer 224, the oxide 230a, and the oxide 230b are formed so as to overlap the conductor 205. The side surface of the insulator 230b is preferably approximately perpendicular to the upper surface of the insulator 222. The sides of the insulator 224, the oxide 230a, and the oxide 230b are in contact with the top surface of the insulator 222. However, since the transistors 200B are arranged substantially perpendicularly, it is possible to reduce the area and increase the density when providing a plurality of transistors 200B. Alternatively, the insulator 224, the oxide 230a, and the oxide 230b may be The angle between the surface of the insulating body 222 and the upper surface of the insulating body 222 may be small. The side surfaces of the insulator 224, the oxide 230a, and the oxide 230b and the top surface of the insulator 222 The angle is preferably 60 degrees or more and less than 70 degrees. In this process, the covering property of the insulator 254 etc. is improved, and defects such as voids can be reduced. .

[0307] In addition, there is a curved surface between the side surface of the oxide 230b and the top surface of the oxide 230b. It is preferable that the end of the side surface and the end of the top surface are curved (hereinafter referred to as "round"). The curved surface has a radius of curvature of, for example, 3 nm at the end of the oxide 230b. The thickness is from 10 nm to 100 nm, preferably from 5 nm to 6 nm. This improves the film coverage in the subsequent film formation process.

[0308] The insulating film 224A, the oxide film 230A, and the oxide film 230B are processed by lithography. The processing can be performed using a dry etching method or a wet etching method. Dry etching is suitable for microfabrication. The insulating film 224A, the oxide film 230A, and the oxide film 230B are processed under different conditions. It may also be processed.

[0309] In addition, by performing processes such as dry etching, the etching gas The impurities adhere to or diffuse into the surface or the interior of the oxide 230a, the oxide 230b, etc. Impurities include, for example, fluorine and chlorine.

[0310] In order to remove the above impurities, cleaning is performed. There are various cleaning methods, such as wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. Cleaning may be carried out in combination as appropriate.

[0311] For wet cleaning, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are diluted with carbonated water or pure water. Alternatively, the cleaning process may be carried out using an aqueous solution of purified water or carbonated water. In this embodiment, ultrasonic cleaning is performed using pure water or carbonated water. .

[0312] Subsequently, a heat treatment may be carried out. The heat treatment conditions may be the same as those described above. Alternatively, it is preferable to perform a heat treatment before forming the insulating film 254A. The treatment may be carried out at a temperature of 100°C or higher and 400°C or lower, for example, at 200°C. It is preferable that the temperature for forming the insulating film 254A is the same as that for forming the insulating film 254B. This includes not only the substrate temperature during film formation but also the set temperature of the film formation apparatus. When A is formed at 200°C, the heat treatment is preferably performed at 200°C. The treatment is preferably carried out under reduced pressure, for example, in a vacuum atmosphere. The pressure in the processing chamber is maintained by exhausting the gas using a turbo molecular pump or the like. is 1 x 10 -2 Pa or less, preferably 1×10 -3 Pa or less.

[0313] Next, on the insulator 222, the insulator 224, the oxide 230a, and the oxide 230b, An insulating film 254A that will become the insulator 254a is formed (see FIG. 16). This is done using methods such as sputtering, CVD, MBE, PLD, and ALD. The insulating film 254A is formed to suppress the permeation of impurities such as water and hydrogen, and oxygen. In this embodiment, a sputtering method is used. Then, a silicon nitride film is formed.

[0314] Next, an insulating film 254B that will become the insulator 254b is formed on the insulating film 254A (FIG. 1 6). The insulating film 254B can be formed by a sputtering method, a CVD method, an MBE method, or a PLD method. The insulating film 254B can be formed by using an ALD method or the like. It is preferable to use an insulator that has the function of suppressing the permeation of impurities and oxygen. For example, It is preferable to form the aluminum oxide film by sputtering. By forming an aluminum oxide film using a gas containing oxygen by a coating method, Oxygen can be implanted into the insulator 224. That is, the insulator 224 has excess oxygen. It is possible.

[0315] In addition, as the insulating film 254B, aluminum oxide is formed while the substrate is heated at a high temperature. The substrate heating temperature during the formation of the insulating film 254B is 200° C. or higher, preferably 250° C. ℃ or more, more preferably 350℃ or more. A film of aluminum oxide is formed by the method.

[0316] Next, a dummy gate film that will become the dummy gate layer 262A is formed on the insulating film 254B. The dummy gate film is processed and used as a dummy gate. This is a temporary gate electrode. In other words, by processing the dummy gate film, a temporary gate In a later step, the dummy gate is removed and replaced with a conductive film or the like. Therefore, the dummy gate film can be easily microfabricated. It is preferable to use a film that is easy to remove.

[0317] The dummy gate film can be formed by sputtering, CVD, MBE, PLD, or A This can be done using the LD method, etc. For example, an insulator, a semiconductor, or a conductor can be used. Specifically, polysilicon, microcrystalline silicon, amorphous silicon, etc. A silicon film, a metal film such as aluminum, titanium, or tungsten, or the like may be used. Alternatively, carbon-containing films, SOG (Spin On Glass), resins, etc. can be applied by coating. The resin film may be made of, for example, photoresist or polyester. , polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate SOG and resin films are formed by coating methods, In this way, the surface of the dummy gate film can be made flat. This facilitates fine processing and also facilitates removal.

[0318] The dummy gate film may also be a multi-layer film using different film types. The dummy gate film may be a two-layer structure film having a conductive film and a resin film formed on the conductive film. By making the dummy gate film have such a structure, for example, in the subsequent CMP process, In this case, the conductive film may function as a stopper film in the CMP process. It may be possible to detect the end point of the process, and it may be possible to reduce processing variations.

[0319] Next, the dummy gate film is etched by lithography to form a dummy gate. The dummy gate layer 262A is formed by at least partially , is formed to overlap the conductor 205 and the oxide 230.

[0320] Next, the dummy gate layer 262A is used as a mask to dope the oxide 230b with the dopant 257. As a result, the oxide 230b overlaps the dummy gate layer 262A. In the unfolded region, regions 243a and 243b containing dopant 257 are formed. 17, the dopant 257 is formed on the dummy gate layer of the oxide 230b. 262A is not doped in the area overlapping with 262A. For example, the dopant 257 overlaps with the dummy gate layer 262A. In some cases, the doping occurs by diffusion into a region (for example, the region 232 shown in FIG. 14(A)). The region 243a and a part of the region 243b overlap with the dummy gate layer 262A. In this way, the distance between the region 243a and the region 243b, that is, the channel The length of the cable can be controlled.

[0321] The dopant 257 is added by mass separating the ionized source gas. ion implantation, in which ionized source gas is added without mass separation; and ion doping, in which ionized source gas is added without mass separation. , plasma immersion ion implantation, etc. can be used. When separation is performed, the type and concentration of ions to be added can be strictly controlled. When mass separation is not performed, high concentration ions can be added in a short time. Ion doping may be used, in which clusters of atoms or molecules are generated and ionized. The dopant can also be referred to as an ion, donor, acceptor, impurity, element, etc. good.

[0322] The dopant 257 may be an element that forms the oxygen vacancy or an element that bonds with the oxygen vacancy. Representative examples of such elements include boron and phosphorus. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gases, etc. can be used. Representative examples of rare gases include helium, neon, argon, krypton, Xenon, etc. Also, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel Titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium One or more metal elements selected from metal elements such as rontium and lanthanum Among the above, boron and phosphorus are preferred as the dopant 257. When boron or phosphorus is used as the dopant 257, amorphous silicon or or low-temperature polysilicon production line equipment can be used, reducing capital investment. It is possible.

[0323] In addition, in FIG. 17, the dopant 257 is added almost vertically to the upper surface of the insulator 214. However, the dopant 257 may be added at an angle to the upper surface of the insulator 214. By adding dopants at an angle to the top surface of the insulator 214, The region 243a and the region 243b are formed in a part of the region overlapping with the dummy gate layer 262A. It can be easily formed.

[0324] In the manufacturing method of this embodiment, the dopant 257 is introduced into the insulating film 254A and the insulating film 254B. The insulating film 254B is added to the oxide 230. The dopant 257 is also added to the oxide 254A and the insulating film 254B. 30, and both the insulating film 254A and the insulating film 254B contain the dopant 257. In addition, when the insulating film 254A and the insulating film 254B contain excess oxygen, In this case, the dopant 257 may be able to suppress the diffusion of excess oxygen to the outside.

[0325] As described above, by forming the region 243, the conductor 260 to be formed in a later step can be formed. , can be disposed in a self-aligned manner between the region 243a and the region 243b.

[0326] Next, an insulating film 254B and an insulating film 262A are formed on the insulating film 254B and the dummy gate layer 262A to form an insulator 280. The insulating film 280A is formed by sputtering (see FIG. 18). This can be done using a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0327] Next, the insulating film 280A and a part of the dummy gate layer 262A are removed by the dummy gate layer 26 2A is removed until a part of the insulating layer 280 and the dummy gate 262 are formed. (See FIG. 19.) The insulator 280 and the dummy gate 262 are formed using a CMP process. It is preferable that

[0328] As described above, the dummy gate layer 262A is formed on, for example, the first layer and the second layer on the first layer. By forming a two-layer structure film that forms a second layer, the first layer is CMP processed. Alternatively, the first layer may function as a stopper film for the CMP process. This may make it possible to reduce variations in the height of the dummy gate 262. As shown in FIG. 19(B), the upper surface of the dummy gate 262 and the upper surface of the insulator 280 are Approximately matches.

[0329] Next, the dummy gate 262 and the insulating film 254A overlapping the dummy gate 262 are 20. Then, a part of the insulating film 254B is removed to form an opening 263 (see FIG. 20). The gate 262, the insulating film 254A, and the insulating film 254B are removed by wet etching. This can be done by dry etching, ashing, or the like. A combination of the above treatments may be performed. For example, after the ashing treatment, a wet For example, etching is performed to remove a part of the insulating film 254A and the insulating film 254B. By this, an insulator 254a and an insulator 254b are formed. 2. By removing the insulating film 254A and the insulating film 254B, the oxide film is removed from the opening 263. At this time, a part of the surface of the object 230b is exposed. may be exposed.

[0330] Next, it is preferable to perform a heat treatment before forming the oxide film 230C1. The temperature may be 0° C. or higher and 400° C. or lower, for example, 200° C. Alternatively, the oxide film 2 It is preferable to perform this at the same temperature as the temperature at which the oxide film 30C1 or the oxide film 230C2 is formed. The film formation temperature is not limited to the substrate temperature during film formation, but also includes the set temperature of the film formation apparatus. When the oxide film 230C1 or the oxide film 230C2 is formed at 300° C., the heat treatment The heating temperature is preferably 300° C. The heating treatment is preferably carried out under reduced pressure, for example. For example, the process may be performed in a vacuum atmosphere. The vacuum atmosphere can be evacuated using a turbo molecular pump or the like. In the vacuum atmosphere, the pressure in the processing chamber is maintained at 1×10 -2 Pa or less, preferably 1× 10 -3 Pa or less.

[0331] Next, oxide films 230C1 and 230C2 are formed in this order so as to fill the openings 263. (See FIG. 21.) After the heat treatment, the substrate is continuously oxidized without being exposed to the atmosphere. For example, it is preferable to form a film 230C1 and an oxide film 230C2. Using a multi-chamber film-forming device, the heating process and film-forming process are performed in different chambers. By performing such treatment, the oxide 230a and impurities such as moisture, hydrogen, and carbon adsorbed on the surface of the oxide 230b. and further reducing the moisture concentration and hydrogen concentration in the oxide 230a and the oxide 230b. The impurities removed by the heat treatment include those having hydrogen-carbon bonds. These include impurities that have hydrogen-oxygen bonds and impurities that have hydrogen-oxygen bonds. By performing heat treatment and film formation consecutively, impurities such as hydrogen re-enter the oxide 230. This can be prevented.

[0332] The oxide film 230C1 and the oxide film 230C2 are formed by a sputtering method, a CVD method, an M method, or the like. The oxide film 230C1 and the oxide film 230C2 can be formed by the BE method, the PLD method, the ALD method, or the like. Depending on the characteristics required for the oxide film 230C2, the oxide film 230C2 may be formed of the same material as the oxide film 230A or the oxide film 230B. The oxide film 230C1 and the oxide film 230C2 may be formed using the same film forming method. The oxide film 230C1 and the oxide film 230C2 may be made of In-Ga-Zn oxide or In. As an oxide that does not contain In, Ga-Zn oxide can be used. The oxide film 230C1 and the oxide film 230C2 can be formed of gallium oxide or the like. For 30C2, a stacked structure of In-Ga-Zn oxide and oxide not containing In was used. The oxide film 230C1 and the oxide film 230C2 are formed by sputtering. In:Ga:Zn=1:3:4 [atomic ratio], In:Ga:Zn=4:2:4.1 [atomic ratio] Ga:Zn=2:1 [atomic ratio], or Ga:Zn=2:5 [atomic ratio] In this embodiment, the film is formed by sputtering using an oxide target. Using an oxide target with an atomic ratio of n:Ga:Zn=4:2:4.1, oxide film 23 0C1 was deposited and sputtered to form a film with an atomic ratio of In:Ga:Zn=1:3:4. The oxide film 230C2 is formed using an oxide target of

[0047] .

[0333] That is, the same target as that used to form the oxide film 230B was used for oxidation. The oxide film 230C1 was formed using the same target as that used to form the oxide film 230A. The oxide film 230C2 may be formed using the same.

[0334] The oxide film 230C1 and the oxide film 230C2 can be formed while the substrate is heated. At this time, by setting the substrate temperature to 300° C. or higher, the oxide 230a and the oxide 230b are formed. 30b, the oxide film 230C1, and the oxide film 230C2 can be reduced. In addition, for example, the film may be formed at the same temperature as the film formation temperature of the insulating film 250A described later. In addition, by forming the film while heating the substrate in this way, oxide 230a, oxide 230b, The crystallinity of the oxide film 230C1 and the oxide film 230C2 can also be improved.

[0335] In particular, when forming the oxide film 230C1 and the oxide film 230C2, the sputtering gas Some of the contained oxygen may be supplied to oxide 230a and oxide 230b. Therefore, the oxide film 230C1 and the oxide film 230C2 are formed by sputtering gas containing The oxygen ratio is 70% or more, preferably 80% or more, and more preferably 100%. In addition, by forming the film while heating the substrate, the crystallinity of the oxide film can be improved. It is possible.

[0336] Next, it is preferable to perform a heat treatment before forming the insulating film 250A. The temperature may be between 0° C. and 400° C., for example, 200° C. Alternatively, the insulating film 25 It is preferable to perform the film formation at the same temperature as the film formation temperature in 0A. This is not limited to temperature, but includes the set temperature of the film forming equipment. For example, if an insulating film of 250A is formed at 350°C, In the case of film formation, the heat treatment is preferably performed at 350° C. The heat treatment is performed under reduced pressure. It is preferable to carry out the process in a vacuum atmosphere, for example. This is maintained by exhausting the gas with a pump, etc. In a vacuum atmosphere, the pressure in the processing chamber is 1×10 - 2Pa or less, preferably 1×10 -3 Pa or less.

[0337] Next, an insulating film 250A is formed (see FIG. 21). The insulating film 250A is formed by sputtering. The film can be formed using methods such as the CVD method, MBE method, PLD method, and ALD method. The insulating film 250A is formed by using the ALD method using silicon oxide, hafnium oxide, or oxide. It is preferable to form a film of gallium or the like. For example, the insulating film 250A may be formed of silicon oxide. In this case, a laminated film of gallium oxide on silicon oxide may be used. The film formation temperature is 300°C or higher and lower than 450°C, preferably 350°C or higher and 400°C or higher. For example, the insulating film 250A is formed at 400° C. It is possible to form a dense film with little impurities.

[0338] In addition, oxygen is excited by microwaves to generate high-density oxygen plasma, and the oxygen plasma By exposing the insulating film 250A to the oxygen, oxygen can be introduced into the insulating film 250A.

[0339] Heat treatment may also be carried out. The heat treatment may be carried out under the above-mentioned heat treatment conditions. The heat treatment reduces the moisture concentration and hydrogen concentration of the insulating film 250A. can be done.

[0340] Next, the conductive film 260A and the conductive film 260B are formed. 260B can be formed by sputtering, CVD, MBE, PLD, ALD, etc. For example, it is preferable to use a CVD method. The conductive film 260A is formed by the ALD method, and the conductive film 260B is formed by the CVD method. (See Figure 21.)

[0341] Next, by CMP processing, the oxide film 230C1, the oxide film 230C2, the insulating film 250A, The conductive film 260A and the conductive film 260B are polished until the insulator 280 is exposed. The oxide 230c (oxide 230c1 and oxide 230c2), the insulator 250, and forming the conductor 260 (conductor 260a and conductor 260b) (see FIG. 22). As a result, the oxide 230c is formed on the inner wall (side wall, The insulator 250 is disposed so as to cover the upper and lower surfaces of the insulating layer 230 via the oxide 230c. The conductor 260 is disposed so as to cover the inner wall of the opening. The insulator 250 is disposed so as to fill the opening.

[0342] Next, a heat treatment may be performed at a temperature of 100° C. or higher and 400° C. or lower. For example, the temperature may be 200° C. Alternatively, the temperature may be the same as the temperature at which the insulator 274 is formed. Here, the film formation temperature is not limited to the substrate temperature during film formation, but also includes the set temperature of the film formation apparatus. For example, when the insulator 274 is formed at 250° C., the heat treatment is performed at 250° C. The heat treatment is preferably carried out under reduced pressure, for example, under vacuum. The vacuum atmosphere can be maintained by evacuating the atmosphere with a turbo molecular pump or the like. In a vacuum atmosphere, the pressure in the processing chamber is 1×10 -2 Pa or less, preferably 1×10 -3 By this heat treatment, the moisture concentration and hydrogen concentration in the insulator 280 are The degree can be reduced.

[0343] Next, an insulating layer is formed on the oxide 230c, the insulator 250, the conductor 260, and the insulator 280. The insulator 274 may be formed by a sputtering method, a CVD method, an MB method, or the like. The insulator 274 can be formed by, for example, an E method, a PLD method, an ALD method, or the like. For example, it is preferable to form an aluminum oxide film by sputtering. By forming an aluminum oxide film by a deposition method, the insulator 281 In some cases, it may be possible to suppress the diffusion of hydrogen into the oxide 230. By forming an insulator 274 in contact with the conductor 260, oxidation of the conductor 260 can be suppressed. Furthermore, the formation of the insulator 274 allows oxygen to be supplied to the insulator 280. The oxygen supplied to the insulator 280 passes through the oxide 230c1 and is converted into the oxide 230c2. 30b. Oxygen may be supplied to the insulator 280. As a result, the oxygen contained in the insulator 280 before the formation of the insulator 274 is converted into the oxide 230c. 1 to the region 234 having the oxide 230b.

[0344] Next, a heat treatment may be carried out. The heat treatment may be carried out under the above-mentioned heat treatment conditions. The heat treatment can reduce the moisture concentration and hydrogen concentration of the insulator 280. Also, oxygen contained in the insulator 274 can be implanted into the insulator 280.

[0345] As a method for forming the insulator 274 on the insulator 280, first, An insulating film made of the same material as that of the insulator 274 is formed by the same method as that of the insulator 274. Then, the insulating film is removed by CMP. Then, the insulator 274 is formed, and then the heat treatment is performed using the heating conditions described above. This method allows for the formation of more excess oxygen regions in the insulator 280. In the process of removing the insulating film, a part of the insulator 280, a part of the conductor 260, A portion of the insulator 250 and a portion of the oxide 230c may be removed.

[0346] An insulator may be provided between the insulator 280 and the insulator 274. For example, a silicon oxide film formed by sputtering may be used. By providing the body, an excess oxygen region can be formed in the insulator 280.

[0347] Next, an insulating film that will become the insulator 281 may be formed on the insulator 274. The insulating film is formed by the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. This can be done using (see Figure 22).

[0348] Next, insulator 254, insulator 280, insulator 274, and insulator 281 are coated with a layer of insulating material in region 24. An opening is formed that reaches the region 3a and the region 243b. The opening is formed by a lithography method. This can be done using:

[0349] In the semiconductor device having the transistor 200B, after the opening is formed, The process is similar to that of the semiconductor device including the transistor 200 described in Embodiment 1. A detailed description of the steps after the opening is formed will be omitted.

[0350] According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high frequency characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided. .

[0351] As described above, the configurations, methods, etc. shown in this embodiment may be different from the configurations, methods, etc. shown in other embodiments. They can be used in appropriate combinations.

[0352] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0353] [Storage device 1] FIG. 2 shows an example of a semiconductor device (memory device) using a transistor according to one embodiment of the present invention. 3 is a diagram showing a semiconductor device according to one embodiment of the present invention. The capacitor element 100 is provided above the transistor 300 and the transistor 200. The transistor 200 is the same as the transistor described in the previous embodiment. A resistor 200 or the like can be used.

[0354] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0355] In the semiconductor device shown in FIG. 23, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of transistor 300 and the other of the source and drain of transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. In the following, the gate of the transistor 300 and the other of the source and the drain of the transistor 200 and one of the electrodes of the capacitor 100; The node to which is connected is sometimes called node FG.

[0356] The semiconductor device shown in FIG. 23 is configured such that the transistor 200 is switched on and off. The potential of the gate (node ​​FG) of the transistor 300 can be maintained, which allows for writing information. It can be written, stored, and read.

[0357] In addition, the memory device shown in FIG. 23 has a memory cell array arranged in a matrix. It can be configured.

[0358] <Transistor 300> The transistor 300 is provided on a substrate 311 and has a conductor 312 serving as a gate electrode. 16, an insulator 315 serving as a gate insulator, and a semiconductor region consisting of a portion of the substrate 311 313, and low resistance regions 314a which function as source or drain regions, and low-resistance region 314b. The transistor 300 may be a p-channel or n-channel type. Either a panel type or a filter type may be used.

[0359] Here, the transistor 300 shown in FIG. 23 has a semiconductor region 313 ( The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may also be used. It is also called a FIN type transistor because it uses a convex part. In addition, the insulating layer may have an insulating material that functions as a mask for forming the convex portions. Here, we have shown a case where a protrusion is formed by processing a part of a semiconductor substrate, but it is also possible to process an SOI substrate. A semiconductor film having a convex shape may be formed by the above process.

[0360] The transistor 300 shown in FIG. 23 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method.

[0361] <Capacitor element 100> The capacitor 100 is provided above the transistor 200. Conductor 110 functions as the first electrode, conductor 120 functions as the second electrode, and It has an insulator 130 that functions as a conductor.

[0362] Also, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used in the capacitor 100, the transistor 200, and has a function as a plug or wiring electrically connected to the transistor 300.

[0363] In FIG. 23, the conductor 112 and the conductor 110 are shown as single-layer structures, but the present invention is not limited to this configuration. For example, a conductive material having a barrier property and a conductive material having a high conductivity may be used. Conductors with barrier properties between weak conductors and highly conductive conductors with good adhesion may form a highly conductive material.

[0364] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, nitride Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride The material may be aluminum or the like, and may be provided as a laminated layer or a single layer.

[0365] For example, the insulator 130 may be made of a material with high dielectric strength such as silicon oxynitride and a material with high dielectric strength such as silicon oxynitride. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By using an insulator with a high dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0366] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium; oxide nitrides having silicon and hafnium; Nitrides containing ammonium.

[0367] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies There are various types of resins, such as kon and resin.

[0368] <Wiring layer> Between each structure, a wiring layer including an interlayer film, wiring, plugs, etc. may be provided. In addition, multiple wiring layers can be provided depending on the design. Conductors that function as lines may have multiple structures collectively assigned the same symbol. In addition, in this specification and the like, the wiring and the plug electrically connected to the wiring are integrated. That is, when a part of the conductor functions as a wiring, or when a part of the conductor It may also function as a plug.

[0369] For example, on the substrate 311, an insulator 320, an insulator 322, an insulator 323, and an insulator 324 are provided as interlayer films. 4 and an insulator 326 are laminated in this order. The conductive material 316 is embedded in the insulator 320. , insulator 322, insulator 324, and insulator 326 are connected to the capacitive element 100 or the transformer. The conductive material 328 and the conductive material 330 are embedded in the insulating film 200. The conductor 328 and the conductor 330 function as plugs or wiring.

[0370] In addition, the insulator that functions as an interlayer film acts as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be subjected to chemical mechanical polishing (CMP) to improve flatness. The surface may be planarized by a planarization process using a CMP method or the like.

[0371] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0372] On the insulator 354 and the conductor 356, the insulator 210, the insulator 212, the insulator 21 4, and an insulator 216 are laminated in this order. 12, insulator 214, and insulator 216 are provided with conductor 218 and transistor 200. The conductor 218 is embedded with a conductor (conductor 205) that constitutes a capacitance. As a plug or wiring electrically connecting to the element 100 or the transistor 300 Furthermore, an insulator 150 is provided on the conductor 120 and the insulator 130. It is being done.

[0373] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides that have insulating properties. Examples of such materials include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0374] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0375] For example, the insulators 212, 352, and 354 are made of insulators with low relative dielectric constants. For example, the insulator may be silicon oxide, silicon oxynitride, or nitride. Silicon oxide, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide silicon dioxide with added carbon and nitrogen, silicon dioxide with vacancies, resin, etc. Alternatively, the insulator may be made of silicon oxide, silicon oxynitride, or nitride. Silicon oxide, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide Silicon oxide with carbon and nitrogen added or silicon oxide with vacancies, and resin It is preferable that the silicon oxide and silicon oxynitride have a laminated structure of It is thermally stable, so when combined with resin, it creates a laminated structure that is thermally stable and has a low dielectric constant. Examples of the resin include polyester, polyolefin, and polyamide. Examples include nylon, aramid, polyimide, polycarbonate, and acrylic.

[0376] In addition, the insulator 130 provided on the conductor 112 or the conductor 120, and the insulator 150 or both with a resistivity of 1.0 x 10 12 Ωcm or more 1.0×10 15 Ωc m or less, preferably 5.0 × 10 12 Ωcm or more 1.0×10 14 Ωcm or less, more preferred Or 1.0 x 10 13 Ωcm or more 5.0×10 13 It is preferable to use an insulator with a resistance of Ωcm or less. It is preferable that one or both of the insulators 130 and 150 have the above-mentioned resistivity. By using an insulator having such a structure, the insulator can maintain its insulating properties while preventing the transistor 200 from being damaged. Between the transistor 300, the capacitor 100, and the wirings of the conductor 112, the conductor 120, etc. Dispersing accumulated charge, transistor using the charge, memory device having the transistor As such an insulator, nitride is preferable because it can suppress the deterioration of characteristics and electrostatic breakdown. Silicon or silicon oxynitride can be used.

[0377] In addition, as an insulator having the above-mentioned resistivity, the insulator 140 is formed as a lower layer of the conductor 112. In this case, the insulator 140 may be formed on the insulator 281. Openings are formed in the insulator 281, the insulator 274, the insulator 280, the insulator 254, etc., and the openings The insulator 241 is formed in the opening, and the transistor 200 and the conductor 218 are electrically connected. The insulator 140 may be formed by forming a conductor 240 having a thickness of 1000 Å or less. The same materials as those in 50 can be used.

[0378] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 210, 350, etc. contain impurities such as hydrogen and oxygen. An insulator having a function of suppressing the transmission of light may be used.

[0379] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide Metal oxides such as silicon nitride oxide, silicon nitride, etc. can be used.

[0380] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as silicon, Silicides such as nickel silicide may also be used.

[0381] For example, conductor 328, conductor 330, conductor 356, conductor 218, conductor 110, The conductors 112, 120, etc. may be made of metal materials, alloy materials, or the like, which are made of the above-mentioned materials. Conductive materials such as metal nitride materials and metal oxide materials can be used as single layers or laminated layers. It is possible to use high-melting-point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity. It is preferable to use tungsten, and it is particularly preferable to use aluminum or copper. It is preferable to form the wiring layer from a low-resistance conductive material such as the above. The line resistance can be reduced.

[0382] <<Wiring or plug in a layer provided with an oxide semiconductor>> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the insulator having the excess oxygen region and a conductor provided on the insulator. It is preferable to provide such a function.

[0383] For example, in FIG. 23, an insulator 280 and an insulator 281 are provided between the conductor 240 and the insulator 281. It is preferable to provide an insulator 241. The insulator 241 is connected to the insulators 280 and 281 and the conductor. The insulator 280 and the insulator Absorption of oxygen contained in 281, that is, oxidation of the conductor 240, can be suppressed.

[0384] In other words, by providing the insulator 241, the excess oxygen contained in the insulator 280 is absorbed by the conductor 24 Furthermore, by having the insulator 241, it is possible to suppress the absorption of impurities. The diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 240 is suppressed. It is possible.

[0385] The insulator 241 has a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. It is advisable to use insulating materials with this property, such as aluminum oxide and hafnium oxide. It is preferable to use other oxides such as magnesium oxide, gallium oxide, and oxide. Germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, Metal oxides such as tantalum oxide, silicon nitride oxide, silicon nitride, etc. can be used. Cut.

[0386] The above is a description of the configuration example. By using this configuration, In semiconductor devices using transistors, the fluctuation of electrical characteristics is suppressed and reliability is improved. In addition, a transistor including an oxide semiconductor with high on-state current can be provided. In addition, a transistor including an oxide semiconductor with low off-state current can be provided. Furthermore, a semiconductor device with reduced power consumption can be provided.

[0387] [Storage device 2] FIG. 2 shows an example of a semiconductor device (memory device) using a transistor according to one embodiment of the present invention. 4 is a diagram showing a semiconductor device according to one embodiment of the present invention. The capacitor element 100 is provided above the transistor 300 and the transistor 200. The transistor 200 is the same as the transistor described in the previous embodiment. A resistor 200B or the like can be used.

[0388] In addition, in the semiconductor device (memory device) shown in [Memory device 2], The same reference numerals are used to designate structures that have the same functions as those of the semiconductor device (memory device). In addition, the structure and materials of the semiconductor device (memory device) shown in [Memory Device 1] are common to those of the semiconductor device (memory device). The details of the configuration, materials, etc. of the semiconductor device (memory device) shown in [Memory Device 2] and the same reference numerals For details of the structures, materials, etc. marked with numbers, please refer to the above descriptions.

[0389] [Storage device 3] An example of a memory device using a semiconductor device according to one embodiment of the present invention is shown in FIG. The memory device shown in FIG. 2 includes the transistor 200, the transistor 300, and the capacitor In addition to the semiconductor device having the capacitor 100, the semiconductor device also has a transistor 400.

[0390] The transistor 400 can control the second gate voltage of the transistor 200. For example, the first gate and the second gate of the transistor 400 are connected to the source and the diode. and connect the source of transistor 400 to the second gate of transistor 200. In this configuration, when the second gate of the transistor 200 is held at a negative potential, The first gate-source voltage and the second gate-source voltage of the transistor 400 are In the transistor 400, the second gate voltage and the first gate voltage The drain current at 0V is very small, so the transistor 200 and the transistor Even if power is not supplied to the transistor 400, the negative potential of the second gate of the transistor 200 can be maintained for a long time. This allows the transistor 200 and the transistor 400 to be maintained. A storage device having the above structure can retain stored contents for a long period of time.

[0391] Therefore, in FIG. 25, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the gate of the transistor 200, and the wiring 1006 is electrically connected to the gate of the transistor 200. The second gate of the transistor 200 is electrically connected to the second gate of the transistor 300. The gate and the other of the source and drain of the transistor 200 are connected to the capacitor 100. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. The wiring 1007 is electrically connected to the source of the transistor 400. The wiring 1008 is electrically connected to the gate of the transistor 400, and the wiring 1009 is electrically connected to the gate of the transistor 400. The wiring 1010 is electrically connected to the drain of the transistor 400. Here, the wiring 1006, the wiring 1007, the wiring 1008, and a wiring 1009 are electrically connected.

[0392] 25 is arranged in a matrix, similar to the storage device shown in FIG. By doing so, a memory cell array can be configured. 0 can control the second gate voltages of the plurality of transistors 200. It is preferable to provide fewer transistors 400 than transistors 200.

[0393] <Transistor 400> The transistor 400 is formed in the same layer as the transistor 200 and is fabricated in parallel. The transistor 400 has a first gate electrode and a second gate electrode. The conductor 460 (conductor 460a and conductor 460b) functions as a gate electrode. Conductors 405 (conductors 405a and 405b) functioning as electrodes and gate insulators The insulators 222, 424a, 424b, and 45 function as insulators. 0, an oxide 430c having an area where a channel will be formed, and one of the source and drain The conductor 442a, the oxide 431a, and the oxide 431b function as a gate electrode, and the source The conductor 442b, which functions as the other of the gate and drain electrodes, the oxide 432a, and the oxide 43 2b and conductor 440 (conductor 440a and conductor 440b).

[0394] In the transistor 400, the conductor 405 is formed in the same layer as the conductor 205. The insulator 424a and the insulator 424b are formed in the same layer as the insulator 224. The oxide 431a and oxide 432a are formed in the same layer as the oxide 230a. The conductor 431b and oxide 432b are formed in the same layer as the oxide 230b. 42 is formed in the same layer as the conductor 242. The oxide 430c is formed in the same layer as the oxide 230c. The insulator 450 is formed in the same layer as the insulator 250. 60 is formed in the same layer as the conductor 260 .

[0395] It should be noted that structures formed in the same layer can be formed simultaneously. For example, oxide 4 The oxide 30c can be formed by processing an oxide film that will become the oxide 230c.

[0396] The oxide 430c that functions as the active layer of the transistor 400 is the same as the oxide 230. Similarly, oxygen vacancies are reduced, and impurities such as water and hydrogen are reduced. The threshold voltage of the transistor 400 is increased, the off-current is reduced, and the second gate voltage and When the first gate voltage is 0V, the drain current can be made very small.

[0397] <<Dicing line>> In the following, a large-area substrate is divided into individual semiconductor elements to form multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The dividing method is as follows: First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut by a grinder and divided (divided) into a plurality of semiconductor devices.

[0398] The transistor 200 described in the previous embodiment and the transistor shown in this embodiment At the outer edge of 400, as shown in FIG. 25, the insulator 254 and the insulator 222 come into contact. Therefore, the area where the insulator 254 and the insulator 222 contact each other is set as a dicing line. When designing the dicing line, the degree of freedom in designing the dicing line can be increased. The insulator 222 and the insulator 254 may be formed using the same material and method. By providing the insulating material 254 and the insulating material 255 using the same material and method, adhesion can be improved. For example, it is preferable to use aluminum oxide.

[0399] With this structure, the insulator 222 and the insulator 254 form a transistor 200, and can encapsulate the transistor 400. Insulator 222, and The body 254 has a function of suppressing the diffusion of oxygen, hydrogen, and water. The substrate is divided into multiple chips by dividing it into circuit regions where semiconductor elements shown in Even if the substrate is processed into a chip, impurities such as water and hydrogen can enter from the side of the divided substrate, causing damage to the transistor. Therefore, diffusion to the transistor 200 and the transistor 400 can be prevented.

[0400] In addition, this structure allows excess oxygen in the insulator 224 to migrate to the insulator 254 and the insulator 222. Therefore, the excess oxygen in the insulator 224 can be prevented from diffusing to the outside. The oxide on which the channel of the transistor 200 or the transistor 400 is formed is The oxygen is supplied to the transistor 200 or the transistor 400. This reduces the oxygen vacancies in the oxide in which the channel is formed. The oxide on which the channel in transistor 200 or transistor 400 is formed is then subjected to a defect-level An oxide semiconductor having low potential density and stable characteristics can be obtained. The fluctuation of the electrical characteristics of the transistor 200 or the transistor 400 is suppressed, and the reliability is improved. It can be raised.

[0401] [Storage device 4] An example of a memory device using a semiconductor device according to one embodiment of the present invention is shown in FIG. The memory device shown in FIG. 2 includes the transistor 200, the transistor 300, and the capacitor In addition to the semiconductor device having the capacitor 100, the semiconductor device also has a transistor 400.

[0402] In addition, in the storage device shown in [Storage device 4], the storage device shown in [Storage device 3] is configured. The same reference numerals are used to designate structures having the same functions as those of the storage device 3. The configuration and materials of the memory device shown in [Memory Device 4] are the same as those of the memory device shown in [Memory Device 5]. For details of the materials and structures with the same reference numerals, please refer to the above description. I can pour drinks.

[0403] <Transistor 400> The transistor 400 is formed in the same layer as the transistor 200 and is fabricated in parallel. The transistor 400 has a first gate electrode and a second gate electrode. The conductor 460 (conductor 460a and conductor 460b) functions as a gate electrode. Conductors 405 (conductors 405a and 405b) functioning as electrodes and gate insulators The insulators 222, 424a, 424b, and 45 function as insulators. 0 and an oxide 430c having a region where a channel is to be formed (oxide 430c1 and oxide oxide 430c2), and a region 443a that functions as either a source or a drain; 431a, and oxide 431b, and the region 4 that functions as the other of the source or drain. 43b, oxide 432a, and oxide 432b, and conductor 440 (conductor 440a, and and conductor 440b).

[0404] In the transistor 400, the conductor 405 and the conductor 205 are formed in the same layer. The insulators 424a and 424b and the insulator 224 are formed in the same layer. The oxide 431a, the oxide 432a, and the oxide 230a are formed in the same layer. Oxide 431b, oxide 432b, and oxide 230b are formed in the same layer. The regions 443a and 443b and the regions 243a and 243b are formed in the same process. The oxide 430c1 and the oxide 430c2 are formed. The insulator 450 and the insulator 250 are formed in the same layer. Conductor 460 and conductor 260 are formed in the same layer.

[0405] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. is possible.

[0406] (Fourth embodiment) In this embodiment, a semiconductor device using an oxide according to one embodiment of the present invention will be described with reference to FIGS. 27 and 28. A transistor used as a conductor (hereinafter, sometimes referred to as an OS transistor) and a capacitor The following describes a storage device to which the device is applied (hereinafter, sometimes referred to as an OS memory device). The OS memory device includes at least a capacitance element and an OS transistor that controls charging and discharging of the capacitance element. The off-state current of an OS transistor is extremely small. The OS memory device has excellent retention characteristics and can function as a non-volatile memory. .

[0407] <Storage device configuration example> FIG. 27A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 1 411, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 142 0, column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. do.

[0408] The column circuitry 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, a write The precharge circuit has a function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDA TA to the outside of the storage device 1400. It has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0409] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 The high power supply voltage (VDD) for the 11 and the high power supply voltage (VIL) for the memory cell array 1470 are The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0410] The control logic circuit 1460 processes external control signals (CE, WE, RE). The control signal CE is generated by processing the The control signal WE is a write enable signal, and the control signal RE is a read enable signal. The signal processed by the control logic circuit 1460 is However, the present invention is not limited to this, and other control signals may be input as required.

[0411] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc.

[0412] In FIG. 27A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. Although an example in which the film is formed on a surface has been shown, the present embodiment is not limited to this. For example, as shown in FIG. 27(B), the memory cell array 1411 is provided on a part of the peripheral circuit 1411. 70 may be provided so as to overlap the memory cell array 1470. For example, In this way, a sense amplifier may be provided.

[0413] FIG. 28 illustrates an example of the configuration of a memory cell that can be applied to the above-described memory cell MC.

[0414] [DOSRAM] 28A to 28C show examples of circuit configurations of memory cells in a DRAM. In this case, a DRAM using a memory cell of one OS transistor and one capacitor element type is called DOSRA. The memory cell 1471 shown in FIG. 28A includes a transistor M1 and a , and a capacitance element CA. The transistor M1 has a gate (called a top gate) ) and a back gate.

[0415] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0416] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used to apply a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0417] Furthermore, the memory cells MC are not limited to the memory cells 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as a memory cell 1472 shown in FIG. In addition, the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be configured as the memory cell 14 shown in FIG. 73, a transistor with a single gate structure, i.e., a transistor without a back gate. The memory cell may be configured with a transistor M1.

[0418] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This makes it possible to make the leakage current of the transistor M1 very small. The transistor M1 allows the data to be retained for a long time, reducing the frequency of refreshing the memory cells. Alternatively, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very small, the memory cell 1471 and the memory cell 14 72, multi-value data or analog data can be stored in the memory cell 1473. Cut.

[0419] In addition, in the DOSRAM, as described above, the memory cell array 1470 is overlapped with the By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0420] [NOSRAM] 28(D) to 28(G) show the structure of a gain cell type memory cell having two transistors and one capacitor. A circuit configuration example is shown in FIG. 28D. A memory cell 1474 shown in FIG. 28D includes a transistor M2 and The transistor M2 is a top gate. In this specification, etc., The memory cell has a gain cell type memory cell using an OS transistor as the transistor M2. The memory device is NOSRAM (Nonvolatile Oxide Semiconductor It is sometimes called EEPROM (RAM).

[0421] The first terminal of the transistor M2 is connected to the first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of transistor B is connected to the line CAL. The first terminal of transistor M3 is connected to the line R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to the first terminal of the capacitance element CB.

[0422] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL functions as the second wiring of the capacitance element CB. It functions as a wiring for applying a predetermined potential to the terminal. During the data read operation, a low level potential is applied to the wiring CAL. The wiring BGL is a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the The threshold voltage can be increased or decreased.

[0423] Furthermore, the memory cells MC are not limited to the memory cells 1474, and the circuit configuration may be changed as appropriate. For example, the memory cell MC can be the memory cell 1475 shown in FIG. In this way, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be configured as shown in FIG. Like the 1476, it is a single-gate transistor, i.e., it does not have a back gate. The memory cell may be configured with a transistor M2. As shown in FIG. 28(G), the wiring WBL and the wiring RBL are connected in a single line. The wiring BIL may be integrated.

[0424] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as the transistor M2, and the transistor 300 is used as the transistor M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very small. This allows the written data to be stored for a long time by the transistor M2. Since the memory cells can be maintained at the same level, the frequency of refreshing the memory cells can be reduced. Alternatively, the refresh operation of the memory cells can be made unnecessary. Because it is so small, it is possible to store multi-value data or analog data in the memory cell 1474. The same applies to memory cells 1475 to 1477.

[0425] The transistor M3 is a transistor having silicon in the channel forming region (hereinafter referred to as The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. The field effect mobility may be higher than that of a read transistor. A Si transistor may be used as the transistor M3 that functions as a By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since the memory cell can be provided with the transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0426] The transistor M3 may be an OS transistor. When an OS transistor is used for the transistor M3, the memory cell array 1470 is The circuit can be constructed using only transistors.

[0427] FIG. 28(H) shows an example of a gain cell type memory cell with three transistors and one capacitor. The memory cell 1478 shown in FIG. 28(H) includes transistors M4 to M 6 and a capacitor CC. The capacitor CC is provided as appropriate. is electrically connected to the wiring BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. The wiring GNDL is a wiring that applies a low level potential. The wiring 478 may be electrically connected to the wiring RBL and the wiring WBL instead of the wiring BIL.

[0428] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0429] The transistors M5 and M6 are n-channel Si transistors. Alternatively, the transistors M4 to M5 may be p-channel Si transistors. In this case, the memory cell array 1470 may be an n-type transistor. The circuit can be constructed using only transistors.

[0430] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor M4 is a transistor 200, and the transistors M5 and M6 are transistors M1 and M2. The transistor 300 can be used as the capacitor element CC, and the capacitor element 100 can be used as the capacitor element CC. By using an OS transistor as the transistor M4, the leakage current of the transistor M4 can be reduced. The flow can be very small.

[0431] Note that the configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment are However, the present invention is not limited to the above. These circuits, wiring connected to the circuits, and circuit elements The arrangement or functions may be changed, deleted, or added as needed.

[0432] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0433] (Embodiment 5) In this embodiment, a chip 1200 on which the semiconductor device of the present invention is mounted is shown in FIG. A chip 1200 is implemented with multiple circuits (systems). The technology of integrating multiple circuits (systems) on a single chip is called system-on-chip ( It is sometimes called System on Chip (SoC).

[0434] As shown in FIG. 29(A), the chip 1200 includes a CPU (Central Processor). ssing Unit) 1211, GPU (Graphics Processing a memory controller 1212, one or more analog calculation units 1213, and one or more memory controllers 1214. controller 1214, one or more interfaces 1215, one or more networks It has a work circuit 1216 and the like.

[0435] The chip 1200 is provided with bumps (not shown), and as shown in FIG. 29(B), Printed Circuit Board (PCB) 1201 No.1 The first surface of the PCB 1201 is connected to the second surface. It is provided and connected to the motherboard 1203.

[0436] The motherboard 1203 is equipped with memory devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be configured as The NOSRAM shown in FIG.

[0437] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1 have multiple GPU cores. Each of the CPs 212 may have a memory for temporarily storing data. The memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the above-mentioned NOSRAM or DOSRAM. The GPU1212 is also suitable for parallel calculation of large amounts of data, and is ideal for image processing and multiply-and-accumulate operations. The GPU 1212 can be used as an image processing circuit or By providing a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. This becomes possible.

[0438] In addition, the CPU 1211 and GPU 1212 are mounted on the same chip, The wiring between the CPU1211 and GPU1212 can be shortened, and Data transfer from CPU 1211 to GPU 1212, memory Data transfer between GPU1212 and CPU12 after calculation in GPU1212. The calculation results can be transferred to 11 at high speed.

[0439] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit. The product-sum calculation circuit may be provided in the

[0440] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. , and a circuit that functions as an interface to the flash memory 1222.

[0441] The interface 1215 includes a display device, a speaker, a microphone, a camera, a computer, and the like. The controller has an interface circuit with external devices such as a This includes devices such as mice, keyboards, and game controllers. USB (Universal Serial Bus), HDMI (registered trademark) High-Definition Multimedia Interface) You can be there.

[0442] The network circuit 1216 is a LAN (Local Area Network) or the like. It also has a circuit for network security. Good too.

[0443] The above circuits (systems) can be formed on the chip 1200 in the same manufacturing process. Therefore, even if the number of circuits required for the chip 1200 increases, the manufacturing process can be increased. This eliminates the need for a soldering iron, and the chip 1200 can be produced at low cost.

[0444] A PCB 1201 on which a chip 1200 having a GPU 1212 is mounted, a DRAM 122 1 and a motherboard 1203 provided with a flash memory 1222. It can be called module 1204.

[0445] The GPU module 1204 includes a chip 1200 using SoC technology. Its size can be reduced. Also, it has excellent image processing capabilities, making it suitable for smart devices. Phones, tablets, laptops, portable (portable) game consoles, etc. It is suitable for use in portable electronic devices. Deep neural networks (DNNs), convolutional neural networks (CNN), recurrent neural network (RNN), autoencoder, deep Boltzmann It can implement techniques such as deep belief networks (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is an AI chip, or the GPU module 1204 is an AI system module. It can be used as a module.

[0446] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0447] (Embodiment 6) This embodiment mode will describe an application example of a memory device using the semiconductor device described in the above embodiment. The semiconductor device described in the above embodiment can be used in various electronic devices (for example, Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video playback devices, and navigation systems. Here, computers include tablet computers, notebook computers, desktop computers, This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device described in the above embodiment may be used in a memory card (for example, an SD card). Various removable drives such as flash drives, USB flash drives, and SSDs (Solid State Drives) This is applied to removable storage devices. Figure 30 shows some configuration examples of removable storage devices. For example, the semiconductor device shown in the above embodiment is a packaged memory chip. It is processed and used in various storage devices and removable memory.

[0448] 30(A) is a schematic diagram of a USB memory. The USB memory 1100 is a housing 1101. 1102, a USB connector 1103, and a substrate 1104. 4 is housed in a housing 1101. For example, the substrate 1104 includes a memory chip 110 5, the controller chip 1106 is installed. The semiconductor device shown in the embodiment can be incorporated.

[0449] Figure 30(B) is a schematic diagram of the external appearance of an SD card, and Figure 30(C) is a schematic diagram of the internal structure of an SD card. The SD card 1110 is a schematic diagram of the structure. The SD card 1110 comprises a housing 1111, a connector 1112, and a base. The substrate 1113 is housed in a housing 1111. For example, 13 has a memory chip 1114 and a controller chip 1115 attached thereto. By providing a memory chip 1114 on the back side of the substrate 1113, the SD card 1110 The capacity can be increased. In addition, a wireless chip having a wireless communication function can be installed on the substrate 1113. This allows the host device and the SD card 1110 to communicate wirelessly. This allows data to be read from and written to the memory chip 1114. The semiconductor device described in the above embodiment can be incorporated into such a device.

[0450] Figure 30(D) is a schematic diagram of the external appearance of the SSD, and Figure 30(E) is a schematic diagram of the internal structure of the SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a board 1153. The substrate 1153 is housed in the housing 1151. For example, the substrate 1153 has a memory The memory chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156. For example, a DOSRAM chip may be used. By providing the memory chip 115, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 4 or the like.

[0451] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. is possible.

[0452] (Embodiment 7) A semiconductor device according to one aspect of the present invention is a processor such as a CPU or a GPU, or a chip. FIG. 31 shows a processor such as a CPU or a GPU according to one embodiment of the present invention. Specific examples of electronic devices equipped with the chip are shown below.

[0453] <Electronic devices and systems> A GPU or chip according to one embodiment of the present invention can be mounted in various electronic devices. Examples of electronic devices include television sets, desktop or laptop personal computers, Computers, computer monitors, digital signage Signage: Digital signage), pachinko machines and other large game machines with relatively large screens In addition to the electronic devices provided, there are also digital cameras, digital video cameras, and digital photo frames. , mobile phones, portable game machines, personal digital assistants, sound reproducing devices, etc. By providing an integrated circuit or chip according to one embodiment of the present invention in an electronic device, It can be equipped with artificial intelligence.

[0454] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0455] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared) It may have.

[0456] The electronic device of one embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar Functions such as displaying date and time, running various software (programs) functions, wireless communication functions, and functions to read programs or data recorded on recording media. It can have functions, etc. Figure 31 shows an example of an electronic device.

[0457] [mobile phone] FIG. 31(A) illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511. As an interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 551. It is provided for 0.

[0458] The information terminal 5500 uses a chip according to one embodiment of the present invention to perform a function using artificial intelligence. It is possible to run applications that utilize artificial intelligence. For example, the application recognizes conversations and displays the conversation contents on the display unit 5511. The display unit 5511 recognizes characters, figures, etc. input by the user on the touch panel. and applications to be displayed on the display unit 5511, applications that perform biometric authentication such as fingerprints and voiceprints, etc. Applications, etc.

[0459] [Information terminal] 31(B) shows a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display 5302, and a keyboard. It has a code 5303.

[0460] The desktop information terminal 5300 is one of the features of the present invention, similar to the information terminal 5500 described above. By applying the chip of the present invention, it is possible to execute applications using artificial intelligence. Examples of applications that use artificial intelligence include design support software. , writing correction software, automatic menu generation software, etc. By using the laptop information terminal 5300, new artificial intelligence can be developed.

[0461] In the above, a smartphone and a desktop information terminal are used as examples of electronic devices. As shown in Figure 31(A) and (B), the smartphone and desktop The present invention can be applied to information terminals other than personal information terminals, such as smartphones and desktops. Examples of information terminals other than personal information terminals include PDAs (Personal Digital Assistants). Assistant), notebook information terminals, and workstations.

[0462] [electric appliances] FIG. 31(C) shows an electric refrigerator-freezer 5800, which is an example of the electric appliance. The refrigerator 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like. do.

[0463] By applying the chip of one embodiment of the present invention to the electric refrigerator-freezer 5800, artificial intelligence By utilizing artificial intelligence, an electric refrigerator-freezer 5800 can be realized. The Electric Refrigerator-Freezer 5800 is a refrigerator-freezer that can be used to store food and drink. It has a function to automatically generate menus based on the expiration date of ingredients, and a function to automatically generate menus based on the expiration date of ingredients stored in the electric refrigerator-freezer 5800. It can have a function to automatically adjust the temperature to suit the ingredients being cooked.

[0464] In this example, an electric refrigerator-freezer was described as an electrical appliance, but other electrical appliances may also be used. Examples include vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, and induction cookers. , water dispenser, heating and cooling appliances including air conditioners, washing machines, dryers, Examples include audiovisual equipment.

[0465] [Game consoles] FIG. 31(D) shows a portable game machine 5200, which is an example of a game machine. The computer includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0466] By applying the GPU or chip of one embodiment of the present invention to the portable game console 5200, It is possible to realize a portable game machine 5200 with low power consumption. Since heat generation from the circuit can be reduced, the circuit itself, peripheral circuits, and The impact on the module can be reduced.

[0467] Furthermore, by applying a GPU or chip according to one embodiment of the present invention to the portable game console 5200, This makes it possible to realize a portable game machine 5200 with artificial intelligence.

[0468] Originally, the progress of the game, the behavior of the creatures that appear in the game, the phenomena that occur in the game, etc. The expression is determined by the program that the game has, but the portable game machine 520 By applying artificial intelligence to 0, it becomes possible to express things that are not limited to game programs. For example, the content of the player's questions, the game progress, the time, and the characters that appear in the game. This makes it possible to express how a person's behavior changes depending on the situation.

[0469] In addition, when playing games that require multiple players on the handheld game console 5200, artificial intelligence This allows you to create anthropomorphic game players, so you can turn your opponents into AI. By using multiple game players, you can play the game alone.

[0470] In FIG. 31(D), a portable game machine is shown as an example of a game machine. The game machine to which the GPU or chip of the present invention is applied is not limited to this. Examples of game machines that can use PU or chips include home-use stationary game machines, Arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.), sports facilities Examples include pitching machines for batting practice that are installed in the facility.

[0471] [Moving object] The GPU or chip of one embodiment of the present invention is used in automobiles, which are moving objects, and in the vicinity of the driver's seat of the automobile. can be applied to.

[0472] FIG. 31(E1) shows an automobile 5700 as an example of a moving object, and FIG. 31(E2) shows an automobile FIG. 31(E2) is a diagram showing the area around the windshield in the interior of a car. Display panels 5701, 5702, and 5703 attached to the board Also shown is a display panel 5704 mounted on the pillar.

[0473] The display panels 5701 to 5703 display a speedometer, a tachometer, It provides various information by displaying the driving distance, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be adjusted by the user. It can be changed as needed to suit your taste, enhancing the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0474] The display panel 5704 displays an image from an imaging device (not shown) provided in the automobile 5700. By projecting the image from the pillar, it is possible to compensate for the blind spot (obstructed view) caused by the pillar. That is, by displaying an image from an imaging device provided on the outside of the automobile 5700, This can compensate for blind spots and increase safety. By displaying the image on the display panel 57, safety checks can be performed more naturally and without discomfort. 04 can also be used as a lighting device.

[0475] The GPU or chip of one aspect of the present invention can be applied as a component of artificial intelligence, e.g. For example, the chip can be used in the autonomous driving system of the automobile 5700. The chip can be used in systems that provide road guidance, risk prediction, etc. Display panel 57 The display panels 5701 to 5704 are configured to display information such as road guidance and risk prediction. Good too.

[0476] In the above description, an automobile is used as an example of a moving body. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, These include vehicles such as drones, airplanes, and rockets. Applying the chip of one aspect of the present invention to a moving object and providing it with a system that utilizes artificial intelligence can be done.

[0477] [Broadcasting System] The GPU or chip according to one aspect of the present invention can be applied to a broadcasting system.

[0478] FIG. 31(F) shows a schematic diagram of data transmission in a broadcasting system. 31(F) shows how radio waves (broadcast signals) transmitted from a broadcasting station 5680 are transmitted to televisions in each home. The diagram shows the path the signal takes to reach the TV receiver (TV) 5600. The broadcast signal received by the antenna 5650 is transmitted to the receiving device (not shown). It is sent to the TV5600 via

[0479] In FIG. 31(F), the antenna 5650 is a UHF (Ultra High Frequency) The antenna shown is a BS 110°CS antenna. Antennas, CS antennas, etc. can also be applied.

[0480] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 The received radio wave 5675A is amplified and radio wave 5675B is transmitted. By receiving radio waves 5675B with Na 5650, you can watch terrestrial TV broadcasts on TV 5600. The broadcasting system is not limited to the terrestrial broadcasting shown in FIG. 31(F), but may be any other type of broadcasting system. It may also be satellite broadcasting using an industrial satellite, data broadcasting via optical fiber lines, or the like.

[0481] The above-described broadcasting system applies the chip according to one aspect of the present invention to broadcast using artificial intelligence. The broadcasting station 5680 transmits broadcast data to the TV 5600 in each home. When the encoder is activated, the broadcast data is compressed and the antenna 5650 receives the broadcast data. When the data is received, the decoder of the receiving device included in the TV 5600 converts the broadcast data into By using artificial intelligence, for example, the compression method of the encoder can be Recognizing display patterns contained in displayed images in motion compensation prediction, which is one of the methods It is also possible to perform intra-frame prediction using artificial intelligence. For example, low-resolution broadcast data is received and then displayed on the TV5600 with high resolution. When displaying the broadcast data, the decoder may perform up-conversion or other operations to restore the broadcast data. Image interpolation can be performed.

[0482] The AI-based broadcasting system described above is expected to be a key component of the ultra-high definition television broadcasting system, which will see an increase in the amount of broadcast data. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0483] In addition, as an application of artificial intelligence on the TV5600 side, for example, By using such a configuration, the recording device By having AI learn user preferences, it can automatically record programs that match the user's preferences. It can be depicted.

[0484] Electronic devices described in the present embodiment, functions of the electronic devices, application examples of artificial intelligence, and their effects etc. can be appropriately combined with descriptions of other electronic devices.

[0485] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. is possible. [Explanation of symbols]

[0486] 100 capacitance element, 110 conductor, 112 conductor, 120 conductor, 13 0 insulator, 140 insulator, 150 insulator, 200 transistor, 200 A transistor, 200B transistor, 205 conductor, 210 insulator , 212 insulators, 214 insulators, 216 insulators, 218 conductors, 222 Insulators, 224 Insulators, 224A Insulating films, 230 Oxides, 230a Oxide, 230A Oxide film, 230b Oxide, 230B Oxide film, 230c Oxide, 230c1 Oxide, 230c2 Oxide, 230C Oxide film, 230C 1 oxide film, 230C2 oxide film, 231 area, 231a area, 231b area, 232 area, 232a area, 232b area, 234 area, 24 0 Conductor, 240a Conductor, 240b Conductor, 241 Insulator, 241a Insulators, 241b Insulators, 242 Conductors, 242a Conductors, 242A Conductive film, 242b conductor, 242B conductive layer, 243 area, 243a area area, 243b area, 250 insulator, 250A insulating film, 254 insulator, 2 54a insulator, 254A insulating film, 254b insulator, 254B insulating film, 2 54c Insulators, 260 Conductors, 260a Conductors, 260A Conductive Films, 26 0B conductive film, 260b conductor, 262 dummy gate, 262A dummy gate layer, 274 insulation, 280 insulation, 280a insulation, 280A insulation Membranes, 280b Insulators, 281 Insulators, 282 Insulators, 300 Transistors 311 substrate, 313 semiconductor region, 314a low resistance region, 314b low Resistive area, 315 insulator, 316 conductor, 320 insulator, 322 insulator , 324 insulators, 326 insulators, 328 conductors, 330 conductors, 350 Insulators, 352 Insulators, 354 Insulators, 356 Conductors, 400 Tractors Transistor, 405 Conductor, 405a Conductor, 405b Conductor, 424a Insulators, 424b Insulators, 430c Oxides, 430c1 Oxides, 430c2 Oxides, 431a Oxides, 431b Oxides, 432a Oxides, 432b Oxides, 440 Conductors, 440a Conductors, 440b Conductors, 442 conductor, 442a conductor, 442b conductor, 443a area, 443b area area, 450 insulator, 460 conductor, 460a conductor, 460b conductor, 1001 wiring, 1002 wiring, 1003 wiring, 1004 wiring, 1005 Wiring, 1006 Wiring, 1007 Wiring, 1008 Wiring, 1009 Wiring , 1010 Wiring, 1100 USB memory, 1101 Housing, 1102 Carrier 1103 USB connector, 1104 board, 1105 memory chip, 1 106 Controller chip, 1110 SD card, 1111 Housing, 1112 Connector, 1113 Board, 1114 Memory chip, 1115 Controller chip, 1150 SSD, 1151 housing, 1152 connector, 1153 Board, 1154 memory chip, 1155 memory chip, 1156 controller 1200 chip, 1201 PCB, 1202 bump, 1203 Motherboard, 1204 GPU module, 1211 CPU, 1212 GPU, 1213 Analog arithmetic unit, 1214 Memory controller, 1215 Interface, 1216 Network circuit, 1221 DRAM, 1222 Flash memory, 1400 storage device, 1411 peripheral circuit, 1420 row circuit circuit, 1430 column circuit, 1440 output circuit, 1460 control logic circuit 1470 memory cell array; 1471 memory cell; 1472 memory cell ,1473 memory cell,1474 memory cell,1475 memory cell,147 6 memory cells, 1477 memory cells, 1478 memory cells, 5200 Band game machine, 5201 housing, 5202 display unit, 5203 buttons, 5300 Desktop information terminal, 5301 Main unit, 5302 Display, 5303 Keyboard, 5500 Information terminal, 5510 Housing, 5511 Display, 560 0 TV, 5650 Antenna, 5670 Radio tower, 5675A Radio, 567 5B Radio waves, 5680 Broadcasting stations, 5700 Automobiles, 5701 Display panels, 5 702 display panel, 5703 display panel, 5704 display panel, 5800 Electric refrigerator-freezers, 5801 housings, 5802 refrigerator compartment doors, 5803 freezer compartment doors door

Claims

[Claim 1] A semiconductor device having a transistor, a first insulator; and a second insulator having a region on the first insulator; a first oxide having a region on the second insulator; a second oxide having a region on the first oxide; a third oxide having a region on the second oxide; a first conductor having a region on the second oxide; a second conductor having a region on the second oxide; a third insulator having a region on the third oxide; a third conductor having a region on the third insulator; a fourth insulator having a region on the first conductor and a region on the second conductor; a fifth insulator having a region on the fourth insulator; a sixth insulator having a region on the fifth insulator; a seventh insulator having a region on the first conductor or a region on the second conductor; a fourth conductor having a region on the first conductor or a region on the second conductor; the fourth insulator and the fifth insulator are provided with at least a portion of a first opening; the third oxide is disposed so as to cover an inner wall of the first opening; the third insulator is disposed so as to cover an inner wall of the first opening with the third oxide interposed therebetween; the third conductor is disposed so as to fill the first opening via the third oxide and the third insulator; At least a portion of a second opening is provided in the fourth insulator, the fifth insulator, and the sixth insulator; the fourth conductor is in contact with the first conductor or the second conductor at a bottom of the second opening; the seventh insulator is provided in contact with a sidewall of the second opening, the transistor has a channel formation region in a region where the first oxide, the second oxide, and the third oxide overlap with each other; the fourth insulator has a region in contact with the first insulator in a region that does not overlap with the first opening and where the first insulator and the second insulator do not overlap, in a region overlapping with the first opening, the height of the bottom surface of the third conductor in a region where the third conductor and the second oxide do not overlap is lower than the height of the bottom surface of the second oxide, with the height of the bottom surface of the first insulator as a reference; In a region overlapping with the first opening, the third oxide contacts at least a part of an upper surface of the second oxide, at least a part of a side surface of the second oxide, at least a part of a side surface of the first oxide, and at least a part of a side surface of the second insulator; the third oxide has a region in contact with the first insulator in a region overlapping the first opening and where the first insulator and the second insulator do not overlap, the first insulator has a lower permeability to hydrogen or oxygen than the second insulator; the fourth insulator has a lower hydrogen permeability than the second insulator; The seventh insulator has a lower hydrogen permeability than the second insulator.

Images