High-side driver circuit, low-side driver circuit, and motor drive device

Abstract

To provide a driver circuit capable of adjusting the slew rate according to the characteristics of a power transistor being driven.SOLUTION: A first line Ln1 generates gate high voltage VH_HS to be applied to a gate of a high-side transistor MH. A high-side gate driver 320 controls the gate voltage of the high-side transistor MH according to a high-side control signal. A source rise transition detection circuit 330 generates a first slew rate detection signal S1 indicating a current I1 flowing through a path 332 from the first line Ln1 to a first detection capacitor Cd1 when a bridge circuit 110 transitions to a rise in a source mode. A high-side slew rate adjustment circuit 370 adjusts the drive capability of the high-side gate driver 320 on the basis of the first slew rate detection signal S1.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a driver circuit for a bridge circuit. [Background technology]

[0002] Half-bridge circuits, H-bridge circuits, and three-phase bridge circuits (hereinafter collectively referred to as bridge circuits) using power transistors are widely used in motor driver circuits, DC / DC converters, power conversion devices, and the like.

[0003] The bridge circuit has an upper arm provided between the input line IN and the output line OUT, and a lower arm provided between the output line OUT and a ground line. The upper arm includes a high-side transistor and a flywheel diode connected in parallel. The lower arm includes a low-side transistor and a flywheel diode connected in parallel.

[0004] The bridge circuit can switch between a high output state, where the high-side transistor is on and the low-side transistor is off, and a low output state, where the high-side transistor is off and the low-side transistor is on. In the high output state, the output line OUT carries the voltage V of the input line. IN The output voltage V is at substantially the same voltage level as OUT In the low output state, the output line OUT has an output voltage V that is substantially at the same voltage level as the ground line. OUT occurs. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. WO2022 / 259780

[0006] In high-power applications, the high-side and low-side transistors that make up the bridge circuit are often constructed using discrete components or formed on a chip separate from the driver circuit chip.

[0007] In these cases, the load impedance seen by the driver circuit, i.e., the input impedance (gate capacitance and gate resistance) of the power transistors, will change depending on the type and size of the high-side and low-side transistors actually used. The gate capacitance and gate resistance of the power transistors affect the rate of change (slew rate) of the output voltage of the bridge circuit.

[0008] The characteristics of the power transistor are affected by process variations, and so when the power transistor is integrated on the same chip as the driver circuit, the slew rate of the output voltage changes due to process variations.

[0009] The slew rate of the output voltage has the problem of affecting the efficiency of the inverter circuit and switching noise.

[0010] [overview] The present disclosure has been made in view of the above-mentioned problems, and one exemplary purpose of an embodiment thereof is to provide a driver circuit capable of adjusting a slew rate in accordance with the characteristics of a power transistor to be driven.

[0011] An aspect of the present disclosure relates to a high-side driver circuit for driving a high-side transistor, the high-side driver circuit including: a first line generating a gate high voltage to be applied to the gate of the high-side transistor; a second line connected to an output of a bridge circuit; a high-side gate driver controlling the gate voltage of the high-side transistor in response to a high-side control signal; a high-side control circuit generating the high-side control signal; a first detection capacitor having one end grounded; a source-rise transition detection circuit generating a first slew rate detection signal indicating a current flowing through a path from the first line to the first detection capacitor when the bridge circuit undergoes a rise transition in source mode; and a high-side slew rate adjustment circuit adjusting the drive capability of the high-side gate driver based on the first slew rate detection signal.

[0012] Another aspect of the present disclosure relates to a low-side driver circuit for driving a low-side transistor, the low-side driver circuit including: a fifth line generating a gate high voltage to be applied to a gate of the low-side transistor; a sixth line connected to ground; a low-side gate driver controlling the gate voltage of the low-side transistor in response to a low-side control signal; a low-side control circuit generating the low-side control signal; a second detection capacitor having one end connected to the first line generating the gate high voltage to be applied to the high-side transistor; a sink-rise transition detection circuit generating a third slew rate detection signal indicating a current flowing through a path from the fifth line to the second detection capacitor when the bridge circuit makes a rise transition in sink mode; and a low-side slew rate adjustment circuit adjusting the drive capability of the low-side gate driver based on the third slew rate detection signal.

[0013] Any combination of the above components, or mutual substitution of components or expressions between methods, devices, systems, etc. are also valid aspects of the present invention. [Brief explanation of the drawings]

[0014] [Figure 1]FIG. 1 is a circuit diagram of a switching circuit according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating the operation of the high-side driver circuit when the bridge circuit operates in source mode. [Figure 3] FIG. 3 is a diagram illustrating the operation of the low-side driver circuit when the bridge circuit operates in the sink mode. [Figure 4] FIG. 4 is a circuit diagram of a source rise transition detection circuit and a source fall transition detection circuit according to one embodiment. [Figure 5] FIG. 5 is a circuit diagram of a synch rise transition detection circuit and a synch fall transition detection circuit according to an embodiment. [Figure 6] FIG. 6 is a circuit diagram of a switching circuit according to an embodiment. [Figure 7] FIG. 7 is an operational waveform diagram of the switching circuit of FIG. [Figure 8] FIG. 8 is a circuit diagram of a motor drive device including a switching circuit according to an embodiment.

[0015] [Detailed explanation] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0016] A high-side driver circuit according to one embodiment drives a high-side transistor and includes: a first line generating a gate high voltage to be applied to the gate of the high-side transistor; a second line connected to the output of a bridge circuit; a high-side gate driver controlling the gate voltage of the high-side transistor in response to a high-side control signal; a high-side control circuit generating the high-side control signal; a first detection capacitor having one end grounded; a source-rise transition detection circuit generating a first slew rate detection signal indicating a current flowing through a path from the first line to the first detection capacitor when the bridge circuit makes a rise transition in source mode; and a high-side slew rate adjustment circuit adjusting the drive capability of the high-side gate driver based on the first slew rate detection signal.

[0017] During the source-rise transition, the voltage on the first line rises in conjunction with the rise in the output voltage of the bridge circuit. As the voltage on the first line rises, a current corresponding to the rate of rise flows into the first detection capacitor. In other words, the magnitude of the current flowing into the first detection capacitor is correlated with the rate of rise of the voltage on the first line, i.e., the rate of rise of the output voltage, and the first slew rate detection signal indicates the slew rate during the source-rise transition of the output voltage. With this configuration, the slew rate during the source-rise transition of the output voltage of the bridge circuit can be brought closer to a desired rate by adjusting the drive capability of the high-side gate driver in accordance with the first slew rate detection signal.

[0018] The driving capability of a gate driver refers to the speed at which it changes the gate voltage of the power transistor (high-side transistor or low-side transistor) it is driving. Therefore, if the gate driver is a current-driven type, the driving capability is understood as the amount of source current or sink current. If the gate driver is a voltage-driven type, the driving capability is understood as the output impedance of the gate driver.

[0019] In one embodiment, the high-side gate driver is current-driven, and the high-side slew rate adjustment circuit may adjust the drive current sourced by the high-side gate driver based on the first slew rate detection signal.

[0020] In one embodiment, the high-side gate driver may be configured such that the drive current changes over time in multiple stages during a source mode rise transition, and the drive current in each stage may be adjusted at the same ratio in response to the first slew rate detection signal.

[0021] In one embodiment, the source-rise transition detection circuit may include a first transistor having a source connected to a first line and a gate and a drain connected to a first detection capacitor, a second transistor having a source connected to the first line and a gate connected to the gate of the first transistor, a third line generating a voltage lower than that of the first line, a first resistor connected between the drain of the second transistor and the third line, and an A / D converter converting the voltage drop across the first resistor into a digital first slew rate detection signal.

[0022] In one embodiment, the high-side driver circuit may further include a source fall transition detection circuit that generates a second slew rate detection signal indicative of a current flowing through a path from the first detection capacitor to the second line when the bridge circuit falls in source mode. The high-side slew rate adjustment circuit may adjust the driving capability of the high-side gate driver based on the second slew rate detection signal.

[0023] During a source-fall transition, the voltage on the first line drops in conjunction with the drop in the output voltage of the bridge circuit. When the voltage on the first line drops, a current corresponding to the rate of drop flows out of the first detection capacitor. In other words, the magnitude of the current flowing out of the first detection capacitor is correlated with the rate of drop in the voltage on the first line, i.e., the rate of drop in the output voltage, and the second slew rate detection signal indicates the slew rate during the source-fall transition of the output voltage. With this configuration, by adjusting the drive capability of the high-side gate driver in response to the first slew rate detection signal, the slew rate during the source-fall transition of the output voltage of the bridge circuit can be made closer to a desired rate.

[0024] In one embodiment, the high-side gate driver is a current-driven type, and the high-side slew rate adjustment circuit may adjust the drive current sunk by the high-side gate driver based on the second slew rate detection signal.

[0025] In one embodiment, the high-side gate driver may be configured such that the drive current changes over time in multiple stages during a fall transition of the source mode, and the drive current of each stage may be adjusted at the same ratio according to the second slew rate detection signal.

[0026] In one embodiment, the source fall transition detection circuit may include a fourth transistor having a source connected to the second line and a gate and a drain connected to the first detection capacitor; a fifth transistor having a source connected to the second line and a gate connected to the gate of the fourth transistor; a fourth line generating a voltage higher than that of the second line; a second resistor connected between the drain of the fifth transistor and the fourth line; and an A / D converter that converts the voltage drop across the second resistor into a digital second slew rate detection signal.

[0027] A low-side driver circuit according to one embodiment is a low-side driver circuit for driving a low-side transistor, and includes: a fifth line on which a gate high voltage to be applied to the gate of the low-side transistor is generated; a sixth line connected to ground; a low-side gate driver for controlling the gate voltage of the low-side transistor in accordance with a low-side control signal; a low-side control circuit for generating the low-side control signal; a second detection capacitor having one end connected to the first line on which the gate high voltage to be applied to the high-side transistor is generated; a sink-rise transition detection circuit for generating a third slew rate detection signal indicative of a current flowing in a path from the fifth line to the second detection capacitor when the bridge circuit makes a rise transition in sink mode; and a low-side slew rate adjustment circuit for adjusting the drive capability of the low-side gate driver based on the third slew rate detection signal.

[0028] During the sinc-rise transition, the voltage on the fifth line rises in conjunction with the rise in the output voltage of the bridge circuit. As the voltage on the fifth line rises, a current corresponding to the rate of rise flows into the second detection capacitor. In other words, the magnitude of the current flowing into the second detection capacitor is correlated with the rate of rise of the voltage on the fifth line, i.e., the rate of rise of the output voltage, and the third slew rate detection signal indicates the slew rate during the sinc-rise transition of the output voltage. With this configuration, the slew rate during the sinc-rise transition of the output voltage of the bridge circuit can be made closer to a desired rate by adjusting the drive capability of the low-side gate driver in accordance with the third slew rate detection signal.

[0029] In one embodiment, the low-side gate driver is a current-driven type, and the low-side slew rate adjustment circuit may adjust the drive current sunk by the low-side gate driver based on the third slew rate detection signal.

[0030] In one embodiment, the low-side gate driver may be configured such that the drive current changes over time in multiple stages during a rise transition in the sink mode, and the drive current in each stage may be adjusted at the same ratio according to the third slew rate detection signal.

[0031] In one embodiment, the sync rise transition detection circuit may include a seventh transistor having a source connected to the sixth line and a gate and a drain connected to the second detection capacitor, an eighth transistor having a source connected to the sixth line and a gate connected to the gate of the seventh transistor, an eighth line generating a voltage higher than that of the sixth line, a third resistor connected between the drain of the eighth transistor and the eighth line, and an A / D converter converting the voltage drop of the third resistor into a digital third slew rate detection signal.

[0032] In one embodiment, the low-side driver circuit may further include a sink fall transition detection circuit that generates a fourth slew rate detection signal indicative of a current flowing from the second detection capacitor to the sixth line when the bridge circuit makes a fall transition in sink mode. The low-side slew rate adjustment circuit may adjust the driving capability of the low-side gate driver based on the fourth slew rate detection signal.

[0033] During a sink-fall transition, the voltage on the fifth line drops in conjunction with the drop in the output voltage of the bridge circuit. When the voltage on the fifth line drops, a current corresponding to the rate of drop flows out of the second detection capacitor. In other words, the magnitude of the current flowing out of the second detection capacitor is correlated with the rate of drop in the voltage on the fifth line, i.e., the rate of drop in the output voltage, and the third slew rate detection signal indicates the slew rate during the sink-fall transition of the output voltage. With this configuration, the slew rate during the sink-fall transition of the output voltage of the bridge circuit can be brought closer to a desired rate by adjusting the drive capability of the low-side gate driver in response to the fourth slew rate detection signal.

[0034] In one embodiment, the low-side gate driver is a current-driven type, and the low-side slew rate adjustment circuit may adjust the drive current sourced by the low-side gate driver based on the fourth slew rate detection signal.

[0035] In one embodiment, the low-side gate driver may be configured such that the drive current changes over time in multiple stages during a fall transition of the sink mode, and the drive current of each stage may be adjusted at the same ratio according to the fourth slew rate detection signal.

[0036] In one embodiment, the sinkfall transition detection circuit may include a tenth transistor having a source connected to the fifth line and a gate and a drain connected to the second detection capacitor, an eleventh transistor having a source connected to the fifth line and a gate connected to the gate of the tenth transistor, a seventh line generating a voltage lower than that of the fifth line, a fourth resistor connected between the drain of the eleventh transistor and the seventh line, and an A / D converter converting the voltage drop of the third resistor into a digital fourth slew rate detection signal.

[0037] In one embodiment, the motor drive device may include a bridge circuit including a high-side transistor and a low-side transistor connected to a coil of the motor, and a low-side driver circuit that drives the high-side transistor.

[0038] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be designated by the same reference numerals, and redundant descriptions will be omitted where appropriate. Furthermore, the embodiments are merely examples and do not limit the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

[0039] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0040] Similarly, "a state in which component C is provided between component A and component B" includes not only cases in which components A and C, or components B and C, are directly connected, but also cases in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or impair the functions or effects achieved by their combination.

[0041] The vertical and horizontal axes of the waveform diagrams and time charts referred to in this specification have been appropriately enlarged or reduced to facilitate understanding, and the waveforms shown have been simplified, exaggerated, or emphasized to facilitate understanding.

[0042] 1 is a circuit diagram of a switching circuit 100 according to an embodiment. The switching circuit 100 includes a bridge circuit 110 and a driver circuit 200. Although only the configuration of one phase of the switching circuit 100 is shown here, the switching circuit 100 may be a three-phase circuit or an H-bridge circuit.

[0043] The input line 102 is connected to the input voltage V IN The technology according to the present disclosure is provided by IN This is particularly useful in applications where the input voltage V IN It can also be used in applications with voltages of several tens of volts.

[0044] The bridge circuit 110 includes a high-side transistor MH connected between an input line (input terminal) 102 and an output line (output terminal) 104, and a low-side transistor ML connected between the output line 104 and a ground line 106. The high-side transistor MH and the low-side transistor ML are N-channel transistors. An operating mode in which current flows out from the bridge circuit 110 toward the load is called a source mode, and an operating mode in which current flows from the load toward the bridge circuit 110 is called a sink mode.

[0045] The driver circuit 200 controls the high-side transistor MH and the low-side transistor ML of the bridge circuit 110. The driver circuit 200 controls a high output state φ in which the high-side transistor MH is on and the low-side transistor ML is off. H , the high-side transistor MH is off and the low-side transistor ML is on in the low output state φ L The bridge circuit 110 switches between two states: a high-impedance state φ in which both the high-side transistor MH and the low-side transistor ML are off; HZ In some cases, the high output state φ H The output voltage V OUT is the input voltage V IN The low output state φ L At this point, the output voltage V OUT takes on a voltage level substantially equal to the ground voltage (0V).

[0046] The driver circuit 200 includes a high-side driver circuit 300 and a low-side driver circuit 400. The high-side driver circuit 300 and the low-side driver circuit 400 may be separate integrated circuits (ICs), or may be integrated into a single IC.

[0047] First, the configuration of the high-side driver circuit 300 will be described.

[0048] The high-side driver circuit 300 includes a high-side control circuit 310, a high-side gate driver 320, a source-rise transition detection circuit 330, a source-fall transition detection circuit 340, and a high-side slew rate adjustment circuit 370.

[0049] The high-side gate driver 320 controls the gate voltage V of the high-side transistor MH in response to the high-side control signal HCTRL generated by the high-side control circuit 310. HG The high-side gate driver 320 may be a voltage-driven type or a current-driven type. When the high-side gate driver 320 turns on the high-side transistor MH based on the high-side control signal HCTRL, the high-side gate driver 320 controls the gate-source voltage V HGS From 0V to the gate high voltage V H Gate high voltage V H is the gate-source voltage of the NMOS transistor, V GS(th) It is a higher voltage.

[0050] The first line Ln1 is connected to the source voltage of the high-side transistor MH, i.e., the output voltage V of the bridge circuit 110. OUT than the gate high voltage V H A voltage V H_HS The high-side gate driver 320 is supplied with a voltage V H_HS is supplied, and when the high-side transistor MH is turned on, the gate voltage V G voltage V H_HS Increase to.

[0051] On the other hand, when the high-side gate driver 320 turns off the high-side transistor MH in response to the high-side control signal HCTRL, the gate-source voltage V HGS The gate high voltage V H to 0V (or a negative voltage).

[0052] The high-side control circuit 310 generates a high-side control signal HCTRL that indicates the state of the high-side gate driver 320 in response to an input signal HIN.

[0053] The second line Ln2 is connected to the output of the bridge circuit 110. A first terminal of the first detection capacitor Cd1 is grounded, and a second terminal thereof is connected to the second terminal N1 of the first detection capacitor Cd1.

[0054] The source-rise transition detection circuit 330 generates a first slew rate detection signal S1 indicating the current I1 flowing through the path 332 from the first line Ln1 to the second terminal N1 of the first detection capacitor Cd1 when the bridge circuit 110 undergoes a rise transition in source mode.

[0055] In this embodiment, the high-side gate driver 320 has a driving capability, in other words, a gate-source voltage V HGS The rate of change of the value is adjustable.

[0056] The high-side slew rate adjustment circuit 370 adjusts the driving capability of the high-side gate driver 320, more specifically, the gate-source voltage V of the high-side transistor MH, based on the first slew rate detection signal S1. HGS Adjust the speed at which the temperature rises.

[0057] The source fall transition detection circuit 340 generates a second slew rate detection signal S2 that indicates the current I2 flowing through a path 342 from the second terminal N1 of the first detection capacitor Cd1 to the second line Ln.

[0058] The high-side slew rate adjustment circuit 370 adjusts the driving capability of the high-side gate driver 320, more specifically, the gate-source voltage V of the high-side transistor MH, based on the second slew rate detection signal S2. HGS Adjust the rate at which the voltage is lowered.

[0059] The above is the configuration of the high-side driver circuit 300. Next, the operation of the high-side driver circuit 300 will be described.

[0060] FIG. 2 is a diagram illustrating the operation of the high-side driver circuit 300 when the bridge circuit 110 operates in source mode.

[0061] First, adjustment of the slew rate of the source-rise transition in the high-side driver circuit 300 will be described.

[0062] Before time t0, the output is in a low state, and the output voltage V OUT is 0V. At time t0, the low-side transistor ML is turned off. At time t1, a command to turn on the high-side transistor MH is issued. The high-side gate driver 320 controls the gate-source voltage V HGS Increases.

[0063] At time t2, the gate-source voltage V HGS is the threshold voltage V GS(th) When the gate-source voltage V exceeds HGS As the on-resistance of the high-side transistor MH increases, the voltage drop across the high-side transistor MH decreases, and the output voltage V OUT rise transition.

[0064] Voltage V of the first line Ln1 H_HS is the output voltage V OUT than V H is a voltage higher than the output voltage V OUT Then, a current I1 flows from the first line Ln1 to the first detection capacitor Cd1 through the path 332. The current I1 increases in accordance with the output voltage V OUT continues to flow while continues to rise.

[0065] The current I1 is proportional to the output voltage V OUT It has a correlation with the transition speed (slew rate) of the output voltage V OUTThe higher the slew rate, the larger the current I1 will be, and the lower the slew rate, the smaller the current I1 will be.

[0066] Output voltage V at source-rise transition OUT The slew rate of the high-side transistor MH is HGS Therefore, the output voltage V can be controlled by adjusting the driving capability of the high-side gate driver 320 so that the first slew rate detection signal S1 indicating the current I1 has an appropriate value. OUT It is possible to make the transition at a desired slew rate.

[0067] The above is the adjustment of the slew rate of the source rise transition. Next, the adjustment of the slew rate of the source fall transition will be described.

[0068] At time t4, a command to turn off the high-side transistor MH is issued. The high-side gate driver 320 controls the gate-source voltage V HGS Decreases.

[0069] Gate-source voltage V of high-side transistor MH HGS As the on-resistance of the high-side transistor MH decreases, the voltage drop of the high-side transistor MH increases, and the output voltage V OUT will undergo a fall transition.

[0070] At time t5, the gate-source voltage V HGS is the threshold voltage V GS(th) When the voltage Vcc becomes lower, the high-side transistor MH is turned off. After that, at time t6, the low-side transistor ML is turned on.

[0071] Focusing on the period t4 to t5, the voltage V of the first line Ln1 H_HS is the output voltage V OUT than V H is a voltage higher than the output voltage V OUTThen, a current I2 flows from the first detection capacitor Cd1 to the second line Ln2 through the path 342. The current I2 decreases in accordance with the output voltage V OUT continues to decrease.

[0072] The current I2 is the output voltage V OUT It has a correlation with the transition speed (slew rate) of the output voltage V OUT The higher the slew rate, the larger the current I2, and the lower the slew rate, the smaller the current I2.

[0073] Output voltage V at source-fall transition OUT The slew rate of the high-side transistor MH is HGS Therefore, the output voltage V can be controlled by adjusting the driving capability of the high-side gate driver 320 so that the second slew rate detection signal S2 indicating the current I2 has an appropriate value. OUT This allows the source fall transition to occur at a desired slew rate.

[0074] Next, the configuration of the low-side driver circuit 400 will be described.

[0075] 1, the low-side driver circuit 400 includes a low-side control circuit 410, a low-side gate driver 420, a sink-rise transition detection circuit 430, and a sink-fall transition detection circuit 440.

[0076] The low-side gate driver 420 controls the gate voltage V of the low-side transistor ML in response to the low-side control signal LCTRL generated by the low-side control circuit 410. LG The low-side gate driver 420 may be a voltage-driven type or a current-driven type. When the low-side gate driver 420 turns on the low-side transistor ML in response to the low-side control signal LCTRL, the low-side gate driver 420 controls the gate-source voltage V LGS From 0V to the gate high voltage V HGate high voltage V H is the gate-source voltage of the NMOS transistor, V GS(th) It is a higher voltage.

[0077] The fifth line Ln5 is connected to a gate high voltage V H A voltage V H_LS The low-side gate driver 420 is supplied with a voltage V H_LS is supplied, and when the low-side transistor ML is turned on, the gate voltage V G voltage V H_LS Increase to.

[0078] On the other hand, when the low-side gate driver 420 turns off the low-side transistor ML in response to the low-side control signal LCTRL, the gate-source voltage V LGS The gate high voltage V H to 0V (or negative voltage).

[0079] The low-side control circuit 410 generates a low-side control signal LCTRL that indicates the state of the low-side gate driver 420 in response to an input signal LIN.

[0080] The sixth line Ln6 is grounded. A first end of the second detection capacitor Cd2 is connected to the first line Ln1.

[0081] When the bridge circuit 110 undergoes a rise transition in sink mode, the sink-rise transition detection circuit 430 generates a third slew rate detection signal S3 indicating the current I3 flowing through the path 432 from the second terminal N2 of the second detection capacitor Cd2 to the sixth line Ln6.

[0082] The low-side slew rate adjustment circuit 470 adjusts the driving capability of the low-side gate driver 420, more specifically, the gate-source voltage V of the low-side transistor ML, based on the third slew rate detection signal S3. LGSAdjust the rate at which the voltage is lowered.

[0083] When the bridge circuit 110 undergoes a fall transition in sink mode, the source fall transition detection circuit 340 generates a fourth slew rate detection signal S4 indicating the current I4 flowing through the path 442 from the fifth line Ln5 to the second end N2 of the second detection capacitor Cd2.

[0084] The low-side slew rate adjustment circuit 470 adjusts the driving capability of the low-side gate driver 420, more specifically, the gate-source voltage V of the low-side transistor ML, based on the fourth slew rate detection signal S4. LGS Adjust the speed at which the temperature rises.

[0085] The above is the configuration of the low-side driver circuit 400. Next, the operation of the low-side driver circuit 400 will be described.

[0086] FIG. 3 is a diagram illustrating the operation of the low-side driver circuit 400 when the bridge circuit 110 operates in the sink mode.

[0087] First, adjustment of the slew rate of the source fall transition in the low-side driver circuit 400 will be described.

[0088] Before time t0, the output is in a high state, and the output voltage V OUT is the input voltage V IN At time t0, the high-side transistor MH is turned off. At time t1, a command to turn on the low-side transistor ML is issued. The low-side gate driver 420 controls the gate-source voltage V LGS Increases.

[0089] At time t2, the gate-source voltage V HGS is the threshold voltage V GS(th) When the gate-source voltage V exceeds LGSAs the on-resistance of the low-side transistor ML increases, the voltage drop across the low-side transistor ML decreases, and the output voltage V OUT will undergo a fall transition.

[0090] Voltage V of the first line Ln1 H_HS is the output voltage V OUT than V H is a voltage higher than the output voltage V OUT Then, a current I4 flows from the fifth line Ln5 to the second detection capacitor Cd2 through the path 442. The current I4 increases in accordance with the output voltage V OUT continues to decrease.

[0091] The current I4 is the output voltage V OUT It has a correlation with the transition speed (slew rate) of the output voltage V OUT The higher the slew rate, the larger the current I4 will be, and the lower the slew rate, the smaller the current I4 will be.

[0092] Output voltage V at sinkfall transition OUT The slew rate of the low-side transistor ML is HGS Therefore, the output voltage V can be controlled by adjusting the driving capability of the low-side gate driver 420 so that the fourth slew rate detection signal S4 indicating the current I4 has an appropriate value. OUT It is possible to make the transition at a desired slew rate.

[0093] The above is the adjustment of the slew rate of the sink-fall transition. Next, the adjustment of the slew rate of the sink-rise transition will be described.

[0094] At time t4, a command to turn off the low-side transistor ML is issued. The low-side gate driver 420 controls the gate-source voltage V LGS Decreases.

[0095] Gate-source voltage V of low-side transistor ML LGS As the on-resistance of the low-side transistor ML decreases, the voltage drop across the low-side transistor ML increases, and the output voltage V OUT rise transition.

[0096] At time t5, the gate-source voltage V LGS is the threshold voltage V GS(th) When the voltage Vcc becomes lower than the reference voltage Vcc, the low-side transistor ML is turned off. After that, at time t6, the high-side transistor MH is turned on.

[0097] Focusing on the period t4 to t5, the voltage V of the first line Ln1 H_HS is the output voltage V OUT than V H is a voltage higher than the output voltage V OUT Then, a current I3 flows from the second detection capacitor Cd2 to the sixth line Ln6 through the path 442. The current I3 decreases in accordance with the output voltage V OUT continues to flow while continues to rise.

[0098] The current I3 is the output voltage V OUT It has a correlation with the transition speed (slew rate) of the output voltage V OUT The higher the slew rate, the larger the current I3, and the lower the slew rate, the smaller the current I3.

[0099] Output voltage V at the sync-rise transition OUT The slew rate of the low-side transistor ML is HGS Therefore, the output voltage V can be controlled by adjusting the driving capability of the low-side gate driver 420 so that the third slew rate detection signal S3 indicating the current I3 has an appropriate value. OUT This allows the transition to occur at a desired slew rate. This completes the adjustment of the slew rate of the synchronous transition.

[0100] Next, configuration examples of the source rise transition detection circuit 330 and the source fall transition detection circuit 340 on the high-side driver circuit 300 side will be described.

[0101] FIG. 4 is a circuit diagram of a source rise transition detection circuit 330A and a source fall transition detection circuit 340A according to one embodiment.

[0102] The source-rise transition detection circuit 330A includes a first transistor MP1, a second transistor MP2, a first resistor R1, and a first switch SW1.

[0103] The first transistor MP1 is a P-type transistor, with its source connected to the first line Ln1 and its gate and drain connected to the terminal N1 of the first detection capacitor Cd1 via the first switch SW1. The first transistor MP1 and the first switch SW1 form a path 332 in FIG. 1. The first switch SW1 is turned on during a period when a rise transition may occur and turned off during a period when a rise transition does not occur.

[0104] The second transistor MP2 has a source connected to the first line Ln1 and a gate connected to the gate of the first transistor MP1. The first transistor MP1 and the second transistor MP2 form a current mirror circuit. A current I1' proportional to the current I1 flowing through the first transistor MP1 flows through the second transistor MP2.

[0105] The third line Ln3 generates a voltage that is lower by a predetermined voltage (for example, 5V) than the first line Ln1.

[0106] The first resistor R1 is connected between the drain of the second transistor MP2 and the third line Ln3. A voltage drop V proportional to the current I1′ is generated across the first resistor R1. R1 occurs.

[0107] The A / D converter 334 detects the voltage drop V across the first resistor R1. R1is converted into a digital signal and output as the first slew rate detection signal S1. Note that if the period during which the current I1 flows is very short, the voltage drop V R1 is sampled by a sample-and-hold circuit and then converted into a digital signal.

[0108] The source fall transition detection circuit 340A includes a fourth transistor MN4, a fifth transistor MN5, a second resistor R2, a second switch SW2, and an A / D converter 344.

[0109] The fourth transistor MN4 is an N-type transistor, with its source connected to the second line Ln2 and its gate and drain connected to the terminal N1 of the first detection capacitor Cd1 via the second switch SW2. The fourth transistor MN4 and the second switch SW2 form the path 342 in FIG. 1. The second switch SW2 is turned on during a period when a fall transition may occur and turned off during a period when a fall transition will not occur.

[0110] The fifth transistor MN5 has a source connected to the second line Ln2 and a gate connected to the gate of the fourth transistor MN4. The fourth transistor MN4 and the fifth transistor MN5 form a current mirror circuit. A current I2' proportional to the current I2 flowing through the fourth transistor MN4 flows through the fifth transistor MN5.

[0111] The fourth line Ln4 generates a voltage that is higher by a predetermined voltage (for example, 5V) than the second line Ln2.

[0112] The second resistor R2 is connected between the drain of the fifth transistor MN5 and the fourth line Ln4. A voltage drop V R2 occurs.

[0113] The A / D converter 344 detects the voltage drop V across the second resistor R2. R1 is converted into a digital second slew rate detection signal S2.

[0114] Next, an example of the configuration of the synch-rise transition detection circuit 430 and the synch-fall transition detection circuit 440 on the low-side driver circuit 400 side will be described.

[0115] FIG. 5 is a circuit diagram of a synch rise transition detection circuit 430A and a synch fall transition detection circuit 440A according to one embodiment.

[0116] The sync-rise transition detection circuit 430A includes a seventh transistor MN7, an eighth transistor MN8, a third resistor R3, a third switch SW3, and an A / D converter 434. The configuration of the sync-rise transition detection circuit 430A is similar to that of the source-fall transition detection circuit 340A in Fig. 4. This sync-rise transition detection circuit 430A can generate a third slew rate detection signal S3 indicating the current I3.

[0117] The sink fall transition detection circuit 440A includes a tenth transistor MP10, an eleventh transistor MP11, a twelfth transistor MN12, a fourth resistor R4, a fourth switch SW4, and an A / D converter 444. The configuration of the sink fall transition detection circuit 440A is similar to that of the source rise transition detection circuit 330A in FIG.

[0118] 6 is a circuit diagram of a switching circuit 100C according to one embodiment. The high-side driver circuit 300C and the low-side driver circuit 400C are separate ICs. The first detection capacitor Cd1 and the second detection capacitor Cd2 are provided outside the ICs. The high-side driver circuit 300C has a pin CD1, and the first detection capacitor Cd1 is connected between the pin CD1 and ground.

[0119] The low-side driver circuit 400C has a pin CD2, and a second detection capacitor Cd2 is connected between the pin CD2 and the first line Ln1.

[0120] The high-side driver circuit 300C includes a high-side sensor 350. The high-side sensor 350 detects the gate-source voltage V of the high-side transistor MH. HGSThe high-side control circuit 310 compares the voltage Vcc with a threshold voltage Vcc and generates a high-side sense signal HS indicative of the comparison result.

[0121] Furthermore, an on-fixed switch 360 and an off-fixed switch 362 are connected to the gate of the high-side transistor MH.

[0122] The high-side gate driver 320 is a current-driven type, and supplies a drive current I ON By sourcing the gate-source voltage V HGS The drive current I OFF By sinking the gate-source voltage V HGS The high-side gate driver 320 includes a source current source 322 and a sink current source 324. The source current source 322 and the sink current source 324 are variable current sources, and generate a drive current I ON ,I OFF It is possible to switch between multiple levels.

[0123] The high-side control circuit 310 controls the drive current I generated by the source current source 322 or the sink current source 324 in response to the high-side sense signal HS and other sense signals (not shown). ON ,I OFF The amount of the voltage is switched in multiple stages, and the states of the switches 360 and 362 are switched.

[0124] The low-side driver circuit 400C includes a low-side sensor 450. The low-side sensor 450 detects the gate-source voltage V of the low-side transistor ML. LGS is compared with a decision threshold and a low-side sense signal LS is generated indicative of the comparison result.

[0125] The low-side sense signal LS is supplied to the low-side control circuit 410 .

[0126] Furthermore, an on-fix switch 460 and an off-fix switch 462 are connected to the gate of the low-side transistor ML.

[0127] The low-side gate driver 420 is a current-driven type, and supplies a drive current I ON By sourcing the gate-source voltage V LGS The drive current I OFF By sinking the gate-source voltage V LGS The low-side gate driver 420 includes a source current source 422 and a sink current source 424. The source current source 422 and the sink current source 424 are variable current sources, and generate a drive current I ON ,I OFF It is possible to switch between multiple levels.

[0128] The low-side control circuit 410 controls the drive current I generated by the source current source 422 or the sink current source 424 in response to the low-side sense signal LS and other detection signals (not shown). ON ,I OFF The amount of the voltage is changed and the states of the switches 460 and 462 are changed.

[0129] The above is the configuration of the switching circuit 100C. Next, the operation of the switching circuit 100C will be described.

[0130] 7 is an operational waveform diagram of the switching circuit 100C of FIG. 6. Here, we will explain the rise transition in source mode, in which the output current flows toward the load. This rise transition is realized by the turn-on operation of the high-side transistor MH by the high-side driver circuit 300C.

[0131] At time t0, the source current source 322 is enabled. Initially, the drive current I ON is supplied to the gate of the high-side transistor MH. This causes the gate-source voltage V HGS At time t1, the gate-source voltage VHGS When the drive current I exceeds the decision threshold of the high-side sensor 350, the high-side sense signal HS is asserted. ON is switched to a second current amount I2, which is less than the first current amount I1.

[0132] At time t2, the output voltage V OUT When begins the rise transition, the drive current I ON The current flow rate is switched to the third current amount I3. The third current amount I3 is greater than the first current amount I1. At time t3, the output voltage V OUT is the input voltage V IN When the voltage rises to around 1 V, the fixed-on switch 360 turns on, and the high-side transistor MH is fixed to the full-on state.

[0133] The high-side slew rate adjustment circuit 370 adjusts the drive current I ON For example, the high-side slew rate adjustment circuit 370 adjusts the amount of drive current I so that the first slew rate detection signal S1 approaches a predetermined target value. ON The third current I3 is adjusted to optimize the slew rate.

[0134] The first current amount I1 and the second current amount I2 are OUT Although it does not affect the slew rate of the third current amount I3, it is preferable to adjust it in the same ratio in conjunction with the third current amount I3.

[0135] The fall transition in the source mode corresponds to the turn-off operation of the high-side transistor MH by the high-side gate driver 320. The high-side slew rate adjustment circuit 370 adjusts the drive current I OFF For example, the high-side slew rate adjustment circuit 370 adjusts the amount of drive current I so that the second slew rate detection signal S2 approaches a predetermined target value. OFF This allows you to optimize the slew rate.

[0136] The rise transition in the sink mode corresponds to the turn-off operation of the low-side transistor ML by the low-side gate driver 420. The low-side slew rate adjustment circuit 470 adjusts the drive current I OFF For example, the low-side slew rate adjustment circuit 470 adjusts the amount of the driving current I so that the third slew rate detection signal S3 approaches a predetermined target value. OFF This allows you to optimize the slew rate.

[0137] The fall transition in the sink mode corresponds to the turn-off operation of the low-side transistor ML by the low-side gate driver 420. The low-side slew rate adjustment circuit 470 adjusts the drive current I ON For example, the low-side slew rate adjustment circuit 470 adjusts the amount of the drive current I so that the fourth slew rate detection signal S4 approaches a predetermined target value. ON This allows you to optimize the slew rate.

[0138] Next, we will explain the uses of the switching circuit 100. The switching circuit 100 can be suitably used in a motor driver circuit.

[0139] 8 is a circuit diagram of a motor driving device 500 including a switching circuit 100 according to an embodiment. The motor driving device 500 drives a three-phase motor 502, which is a load, and controls the rotation state.

[0140] Motor driving device 500 includes a bridge circuit 110 and a driver circuit 600. Bridge circuit 110 is a three-phase inverter and has U-phase, V-phase, and W-phase legs, and each phase leg has an upper arm and a lower arm.

[0141] The driver circuit 600 includes high-side driver circuits 300U to 300W, low-side driver circuits 400U to 400W, and a control circuit 610. The control circuit 610 includes a feedback circuit that performs feedback control so that the state of the three-phase motor 502 approaches a target state, and generates control signals that indicate the states of the six arms that make up the bridge circuit 110.

[0142] Although a three-phase motor is used as an example here, a single-phase motor may also be used, in which case the bridge circuit 110 becomes an H-bridge circuit.

[0143] Next, applications of the motor drive device 500 will be described. The motor drive device 500 can be used to drive motors in electric vehicles, hybrid vehicles, and the like. Alternatively, the motor drive device 500 can be used to control the spindle motor of a hard disk, or the lens drive motor of an imaging device. Alternatively, it can be used to drive the head drive motor of a printer, or the paper feed motor.

[0144] The embodiments are merely examples, and it will be understood by those skilled in the art that various modifications are possible in the combination of the respective components and the respective treatment processes, and that such modifications are also within the scope of the present disclosure and the present invention. Such modifications will be described below.

[0145] (Variation 1) In the embodiment, the bridge circuit 110 is configured with discrete components, but this is not a limitation, and the bridge circuit 110 may be integrated on an IC chip separate from the driver circuit 200. Alternatively, the bridge circuit 110 may be integrated on the same IC chip as the driver circuit 200.

[0146] (Variation 2) The high-side transistor MH and the low-side transistor ML may be configured by an IGBT (Insulated Gate Bipolar Transistor).

[0147] (Variation 3) The application of the switching circuit 100 is not limited to the motor drive device 500. For example, the switching circuit 100 can be suitably used in switching regulators (DC / DC converters), various power conversion devices (inverters and converters), inverters for lighting discharge lamps, digital audio amplifiers, etc. Therefore, the switching circuit 100 can be used in consumer devices including electronic devices and home appliances, automobiles and on-board components, industrial vehicles and industrial machinery.

[0148] The embodiments merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are possible to the embodiments without departing from the spirit of the present invention as defined in the claims.

[0149] (Addendum) The present specification discloses the following techniques.

[0150] (Item 1) A high-side driver circuit that drives a high-side transistor, a first line on which a gate high voltage to be applied to the gate of the high-side transistor is generated; a second line connected to the output of the bridge circuit; a high-side gate driver that controls a gate voltage of the high-side transistor in response to a high-side control signal; a high-side control circuit that generates the high-side control signal; a first detection capacitor having one end grounded; a source-rise transition detection circuit that generates a first slew rate detection signal indicative of a current flowing through a path from the first line to the first detection capacitor when the bridge circuit undergoes a rise transition in a source mode; a high-side slew rate adjustment circuit that adjusts the driving capability of the high-side gate driver based on the first slew rate detection signal; 1. A high-side driver circuit comprising:

[0151] (Item 2) the high-side gate driver is a current-driven type; 2. The high-side driver circuit of claim 1, wherein the high-side slew rate adjustment circuit adjusts the drive current sourced by the high-side gate driver based on the first slew rate detection signal.

[0152] (Item 3) the high-side gate driver is configured such that the drive current changes in multiple steps over time during a rise transition of the source mode; 3. The high-side driver circuit of item 2, wherein the drive current of each stage is adjusted at the same ratio according to the first slew rate detection signal.

[0153] (Item 4) The source-rise transition detection circuit includes: a first transistor having a source connected to the first line and a gate and a drain connected to the first detection capacitor; a second transistor having a source connected to the first line and a gate connected to the gate of the first transistor; a third line generating a voltage lower than that of the first line; a first resistor connected between the drain of the second transistor and the third line; an A / D converter that converts the voltage drop across the first resistor into the first slew rate detection signal; 4. The high-side driver circuit of any one of items 1 to 3, comprising:

[0154] (Item 5) a source fall transition detection circuit for generating a second slew rate detection signal indicative of a current flowing through a path from the first detection capacitor to the second line when the bridge circuit undergoes a fall transition in source mode; 5. The high-side driver circuit according to any one of items 1 to 4, wherein the high-side slew rate adjustment circuit adjusts the driving capability of the high-side gate driver based on the second slew rate detection signal.

[0155] (Item 6) the high-side gate driver is a current-driven type; 6. The high-side driver circuit of item 5, wherein the high-side slew rate adjustment circuit adjusts the drive current sunk by the high-side gate driver based on the second slew rate detection signal.

[0156] (Item 7) the high-side gate driver is configured such that the drive current changes in multiple stages over time during a fall transition of the source mode; 7. The high-side driver circuit of claim 6, wherein the drive current of each stage is adjusted in the same proportion according to the second slew rate detection signal.

[0157] (Item 8) The source fall transition detection circuit a fourth transistor having a source connected to the second line and a gate and a drain connected to the first detection capacitor; a fifth transistor having a source connected to the second line and a gate connected to the gate of the fourth transistor; a fourth line generating a voltage higher than that of the second line; a second resistor connected between the drain of the fifth transistor and the fourth line; an A / D converter that converts the voltage drop across the second resistor into the second slew rate detection signal; 9. The high-side driver circuit of any of items 5 to 8, comprising:

[0158] (Item 9) A low-side driver circuit that drives a low-side transistor, a fifth line on which a gate high voltage to be applied to the gate of the low-side transistor is generated; A sixth line that is grounded; a low-side gate driver that controls a gate voltage of the low-side transistor in response to a low-side control signal; a low-side control circuit that generates the low-side control signal; a second detection capacitor having one end connected to a first line on which a gate high voltage to be applied to the high-side transistor is generated; a sink-rise transition detection circuit that generates a third slew rate detection signal indicating a current flowing through a path from the fifth line to the second detection capacitor when the bridge circuit makes a rise transition in a sink mode; a low-side slew rate adjustment circuit that adjusts the driving capability of the low-side gate driver based on the third slew rate detection signal; 1. A low-side driver circuit comprising:

[0159] (Item 10) the low-side gate driver is a current-driven type; 10. The high-side driver circuit of claim 9, wherein the low-side slew rate adjustment circuit adjusts the drive current sunk by the low-side gate driver based on the third slew rate detection signal.

[0160] (Item 11) the low-side gate driver is configured such that the drive current changes in multiple stages over time during a rise transition of the sink mode; Item 11. The high-side driver circuit of item 10, wherein the drive current of each stage is adjusted in the same proportion according to the third slew rate detection signal.

[0161] (Item 12) The sync rise transition detection circuit a seventh transistor having a source connected to the sixth line and a gate and a drain connected to the second detection capacitor; an eighth transistor having a source connected to the sixth line and a gate connected to a gate of the seventh transistor; an eighth line generating a voltage higher than that of the sixth line; a third resistor connected between the drain of the eighth transistor and the eighth line; an A / D converter that converts the voltage drop across the third resistor into the third slew rate detection signal; 12. The low-side driver circuit of any of items 9 to 11, comprising:

[0162] (Item 13) a sink fall transition detection circuit that generates a fourth slew rate detection signal indicating a current flowing from the second detection capacitor to the sixth line when the bridge circuit undergoes a fall transition in a sink mode; 13. The low-side driver circuit according to any one of items 9 to 12, wherein the low-side slew rate adjustment circuit adjusts the driving capability of the low-side gate driver based on the fourth slew rate detection signal.

[0163] (Item 14) the low-side gate driver is a current-driven type; Item 14. The high-side driver circuit of item 13, wherein the low-side slew rate adjustment circuit adjusts the drive current sourced by the low-side gate driver based on the fourth slew rate detection signal.

[0164] (Item 15) the low-side gate driver is configured such that the drive current changes in multiple stages over time during a fall transition of the sink mode; Item 15. The high side driver circuit of item 14, wherein the drive current of each stage is adjusted in the same proportion according to the fourth slew rate detection signal.

[0165] (Item 16) The sinkfall transition detection circuit a tenth transistor having a source connected to the fifth line and a gate and a drain connected to the second detection capacitor; an eleventh transistor having a source connected to the fifth line and a gate connected to a gate of the tenth transistor; a seventh line generating a voltage lower than that of the fifth line; a fourth resistor connected between the drain of the eleventh transistor and the seventh line; an A / D converter that converts the voltage drop across the third resistor into the fourth slew rate detection signal; 16. The low-side driver circuit of any of items 13 to 15, comprising:

[0166] (Item 17) a bridge circuit including a high-side transistor and a low-side transistor connected to a coil of the motor; A high-side driver circuit according to any one of items 1 to 8 that drives the high-side transistor; A low-side driver circuit according to any one of items 9 to 16, which drives the low-side transistor; A motor drive device comprising: [Explanation of symbols]

[0167] 100 Switching Circuit 102 input lines 104 output lines 106 Ground Line 110 Bridge Circuit MH high-side transistor ML low-side transistor 200 Driver Circuit 300 High-side driver circuit 310 High-side control circuit 320 High-Side Gate Driver 322 Source Current Source 324 Sink Current Source 330 Source-Rise Transition Detection Circuit 332 Routes 334 A / D converter 340 Source Fall Transition Detection Circuit 342 Routes 344 A / D converter 350 High Side Sensor 370 High-side slew rate adjustment circuit 400 Low-side driver circuit 410 Low-side control circuit 420 Low-Side Gate Driver 422 Source Current Source 424 Sink Current Source 430 Synchro Transition Detection Circuit 432 Routes 434 A / D converter 440 Sinkfall Transition Detection Circuit 442 Routes 444 A / D converter 450 Low Side Sensor 470 Low-side slew rate adjustment circuit MP1 First transistor MP2 Second transistor MN4 Fourth transistor MN5 fifth transistor MN7 7th transistor MN8 8th transistor MP9 9th transistor MP10 10th transistor MP11 11th transistor MN12 12th transistor SW1 First switch SW2 Second switch SW3 Third switch SW4 4th switch R1 First resistor R2 2nd resistor R3 3rd resistor R4 4th resistor Cd1 First detection capacitor Cd2 Second detection capacitor Ln1 1st line Ln2 Second line Ln3 Third Line Ln4 4th line Ln5 5th line Ln6 6th Line S1 First slew rate detection signal S2 Second slew rate detection signal S3 Third slew rate detection signal S4 4th slew rate detection signal

Claims

1. A high-side driver circuit that drives high-side transistors that form a bridge circuit, a first line on which a gate high voltage to be applied to the gate of the high-side transistor is generated; a second line connected to the output of the bridge circuit; a high-side gate driver that controls a gate voltage of the high-side transistor in response to a high-side control signal; a high-side control circuit that generates the high-side control signal; a first detection capacitor having one end grounded; a source-rise transition detection circuit that generates a first slew rate detection signal indicative of a current flowing through a path from the first line to the first detection capacitor when the bridge circuit undergoes a rise transition in a source mode; a high-side slew rate adjustment circuit that adjusts a driving capability of the high-side gate driver based on the first slew rate detection signal; 1. A high-side driver circuit comprising:

2. the high-side gate driver is a current-driven type; 2. The high-side driver circuit of claim 1, wherein the high-side slew rate adjustment circuit adjusts a drive current sourced by the high-side gate driver based on the first slew rate detection signal.

3. the high-side gate driver is configured such that the drive current changes in multiple steps over time during a rise transition of the source mode; 3. The high-side driver circuit of claim 2, wherein the drive current of each stage is adjusted in the same proportion in response to the first slew rate detection signal.

4. The source-rise transition detection circuit includes: a first transistor having a source connected to the first line and a gate and a drain connected to the first detection capacitor; a second transistor having a source connected to the first line and a gate connected to the gate of the first transistor; a third line generating a voltage lower than that of the first line; a first resistor connected between the drain of the second transistor and the third line; an A / D converter that converts the voltage drop across the first resistor into the first slew rate detection signal; 4. The high-side driver circuit of claim 1, comprising:

5. a source fall transition detection circuit for generating a second slew rate detection signal indicative of a current flowing through a path from the first detection capacitor to the second line when the bridge circuit undergoes a fall transition in source mode; 4. The high-side driver circuit according to claim 1, wherein the high-side slew rate adjustment circuit adjusts a driving capability of the high-side gate driver based on the second slew rate detection signal.

6. the high-side gate driver is a current-driven type; 6. The high-side driver circuit according to claim 5, wherein the high-side slew rate adjustment circuit adjusts a drive current sunk by the high-side gate driver based on the second slew rate detection signal.

7. the high-side gate driver is configured such that the drive current changes in multiple stages over time during a fall transition of the source mode; 7. The high-side driver circuit of claim 6, wherein the drive current of each stage is adjusted in the same proportion in response to the second slew rate detection signal.

8. The source fall transition detection circuit a fourth transistor having a source connected to the second line and a gate and a drain connected to the first detection capacitor; a fifth transistor having a source connected to the second line and a gate connected to the gate of the fourth transistor; a fourth line generating a voltage higher than that of the second line; a second resistor connected between the drain of the fifth transistor and the fourth line; an A / D converter that converts the voltage drop across the second resistor into the second slew rate detection signal; 6. The high-side driver circuit of claim 5, comprising:

9. A low-side driver circuit that drives a low-side transistor that configures a bridge circuit together with a high-side transistor, a fifth line on which a gate high voltage to be applied to the gate of the low-side transistor is generated; a sixth line that is grounded; a low-side gate driver that controls a gate voltage of the low-side transistor in response to a low-side control signal; a low-side control circuit that generates the low-side control signal; a second detection capacitor having one end connected to a first line on which a gate high voltage to be applied to the high-side transistor is generated; a sink-rise transition detection circuit that generates a third slew rate detection signal indicative of a current flowing through a path from the fifth line to the second detection capacitor when the bridge circuit makes a rise transition in a sink mode; a low-side slew rate adjustment circuit that adjusts the driving capability of the low-side gate driver based on the third slew rate detection signal; 1. A low-side driver circuit comprising:

10. the low-side gate driver is a current-driven type; 10. The low-side driver circuit according to claim 9, wherein the low-side slew rate adjustment circuit adjusts a drive current sunk by the low-side gate driver based on the third slew rate detection signal.

11. the low-side gate driver is configured such that the drive current changes in multiple stages over time during a rise transition of the sink mode; 11. The low-side driver circuit of claim 10, wherein the drive current of each stage is adjusted in the same proportion in response to the third slew rate detection signal.

12. The sync rise transition detection circuit a seventh transistor having a source connected to the sixth line and a gate and a drain connected to the second detection capacitor; an eighth transistor having a source connected to the sixth line and a gate connected to the gate of the seventh transistor; an eighth line generating a voltage higher than that of the sixth line; a third resistor connected between the drain of the eighth transistor and the eighth line; an A / D converter that converts the voltage drop across the third resistor into the third slew rate detection signal; 12. A low-side driver circuit as claimed in any one of claims 9 to 11, comprising:

13. a sink fall transition detection circuit that generates a fourth slew rate detection signal indicating a current flowing from the second detection capacitor to the sixth line when the bridge circuit undergoes a fall transition in a sink mode; 12. The low-side driver circuit according to claim 9, wherein the low-side slew rate adjustment circuit adjusts a driving capability of the low-side gate driver based on the fourth slew rate detection signal.

14. the low-side gate driver is a current-driven type; The low-side driver circuit of claim 13 , wherein the low-side slew rate adjustment circuit adjusts the drive current sourced by the low-side gate driver based on the fourth slew rate detection signal.

15. the low-side gate driver is configured such that the drive current changes in multiple stages over time during a fall transition of the sink mode; 15. The low-side driver circuit of claim 14, wherein the drive current of each stage is adjusted in the same proportion in response to the fourth slew rate detect signal.

16. The sinkfall transition detection circuit a tenth transistor having a source connected to the fifth line and a gate and a drain connected to the second detection capacitor; an eleventh transistor having a source connected to the fifth line and a gate connected to a gate of the tenth transistor; a seventh line generating a voltage lower than that of the fifth line; a fourth resistor connected between the drain of the eleventh transistor and the seventh line; an A / D converter that converts the voltage drop across the fourth resistor into the fourth slew rate detection signal; 14. The low-side driver circuit of claim 13, comprising:

17. a bridge circuit including a high-side transistor and a low-side transistor connected to a coil of the motor; a high-side driver circuit according to any one of claims 1 to 3 that drives the high-side transistor; a low-side driver circuit according to any one of claims 9 to 11 that drives the low-side transistor; A motor drive device comprising:

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