Semiconductor device

Abstract

To provide a semiconductor device having a transistor capable of further reducing a current flowing between a source and a drain when a voltage at a gate electrode is 0 V.SOLUTION: A semiconductor device comprises a transistor having a multi gate structure that has: an oxide semiconductor film formed on an insulation surface; a first gate insulating film contacted with a first surface of the oxide semiconductor film; a first gate electrode provided on the insulation surface and the oxide semiconductor film; a second gate insulating film contacted with a second surface of the oxide semiconductor film; and a second gate electrode contacted with the second gate insulating film. The oxide semiconductor film has: a first region overlapped with the first gate electrode; and a second region not overlapped with the first gate electrode. The second gate electrode is overlapped with the first region and the second region of the oxide semiconductor film.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The invention relates to the manufacture or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, and a driving method thereof. In particular, one aspect of the present invention relates to a transistor having a multi-gate structure. Another embodiment of the present invention relates to a transistor having a multi-gate structure. The present invention relates to a semiconductor device.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Compared to silicon, it is used in electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.) and a high-voltage device having a high withstand voltage, an integrated circuit having the high-voltage device, a power supply circuit or a power supply The conversion circuit and the electronic device may include a semiconductor device. [Background technology]

[0003] A technology for constructing transistors using semiconductor thin films formed on substrates with insulating surfaces The transistor is used in integrated circuits (ICs) and image display devices (simply called display devices). These are widely used in electronic devices such as semiconductors that can be applied to transistors. Silicon-based semiconductor materials are widely known as conductive thin films, but other materials include oxides. Semiconductors are attracting attention.

[0004] A transistor including an oxide semiconductor material has a characteristic of having a low off-state current. As a result, the potential of the node that is in a floating state when the transistor is turned off is It is possible to maintain the charge (amount of charge held in the node) for a long period of time. Therefore, it is expected that these transistors will be used to configure memory devices. In the patent document 1, Dynamic Random Access Memory (DRAM A memory device using the transistor as a transistor constituting a memory cell of is shown. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-109084 Summary of the Invention [Problem to be solved by the invention]

[0006] One aspect of the present invention is to calculate the current flowing between the source and drain when the gate voltage is 0V. One of the objects of the present invention is to provide a semiconductor device having a transistor capable of further reducing Alternatively, the object is to provide a semiconductor device with little variation in transistor characteristics. Another embodiment of the present invention provides a semiconductor device capable of passing a large current. Another object of one embodiment of the present invention is to provide a semiconductor device that can be stably driven at a high driving voltage. Another object of one embodiment of the present invention is to provide a semiconductor device that can operate at high temperatures. Another object of the present invention is to provide a semiconductor device that can Another object of the present invention is to provide a semiconductor device with reduced power consumption. Another object of the present invention is to provide a highly reliable semiconductor device. An object of the present invention is to provide a novel semiconductor device.

[0007] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0008] One embodiment of the present invention is a transistor having a single gate structure and a transistor having a dual gate structure. The semiconductor device has a multi-gate structure in which transistors are connected in series.

[0009] Another embodiment of the present invention is a method for manufacturing a semiconductor device using an oxide semiconductor film formed on an insulating surface. a first gate insulating film in contact with the first surface, and a second gate insulating film provided between the insulating surface and the oxide semiconductor film; a first gate electrode, a second gate insulating film in contact with the second surface of the oxide semiconductor film; a multi-gate transistor having a gate insulating film and a second gate electrode in contact with the gate insulating film; The oxide semiconductor film includes a first region overlapping with the first gate electrode, a second region that does not overlap with the first gate electrode, the second gate electrode being made of an oxide semiconductor The first region and the second region of the membrane overlap.

[0010] Note that a multi-gate transistor is in contact with an oxide semiconductor film and has a first gate a first conductive film and a second conductive film overlapping with the electrode and the second gate electrode, and an oxide semiconductor film; and a third conductive film that is in contact with the first gate electrode and overlaps the second gate electrode. It is preferable that a lower potential be applied to the second conductive film than to the first conductive film.

[0011] Another aspect of the present invention is a multi-gate transistor in which a first element and a second element are connected in series. The first element is a first oxide film formed on an insulating surface. a first gate insulating film in contact with a first surface of the first oxide semiconductor film; a first gate electrode provided between the surface and the first oxide semiconductor film; a second gate insulating film in contact with the second surface of the film; and a second gate insulating film in contact with the second surface of the film. The second element has a first gate insulating film, a second gate insulating film, and a first electrode. a second oxide semiconductor film in contact with the gate insulating film and the second gate insulating film on a different surface; The second gate electrode is in contact with the gate insulating film of the first oxide. The first oxide semiconductor film and the second oxide semiconductor film overlap each other.

[0012] Note that the first element includes a first conductive film and a second conductive film in contact with the first oxide semiconductor film. the second element has a second conductive film and a third conductive film in contact with the second oxide semiconductor film. It is preferable that a potential lower than that of the first conductive film is applied to the first gate electrode. It's nice. [Effects of the Invention]

[0013] According to one aspect of the present invention, when the gate voltage is 0V, the current flowing between the source and the drain is It is possible to provide a semiconductor device having a transistor with reduced current. It is possible to provide a semiconductor device with little variation in transistor characteristics. According to one embodiment, a semiconductor device having a transistor capable of passing a large current in an on-state is provided. According to one aspect of the present invention, a semiconductor device can be provided that is stable at a high driving voltage. According to one embodiment of the present invention, a semiconductor device that can be driven at high temperature can be provided. According to one embodiment of the present invention, a semiconductor device capable of operating A semiconductor device with reduced power consumption can be provided. A highly reliable semiconductor device can be provided. [Brief explanation of the drawings]

[0014] [Figure 1] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 2] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 3] 1A to 1C illustrate a method for manufacturing a semiconductor device according to an embodiment. [Figure 4] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 5] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 6] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 7] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 8] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 9] 1A to 1C illustrate a semiconductor device according to an embodiment. [Figure 10] 1A and 1B are diagrams illustrating a configuration example of a power conversion circuit according to an embodiment. [Figure 11] 1A and 1B are diagrams illustrating a configuration example of a power conversion circuit according to an embodiment. [Figure 12] 1A and 1B illustrate a configuration example of a power supply circuit according to an embodiment. [Figure 13] 1A and 1B illustrate a configuration example of a power supply circuit according to an embodiment. [Figure 14] 1A and 1B are diagrams illustrating a configuration example of a buffer circuit according to an embodiment. [Figure 15] 1A and 1B illustrate a memory device according to an embodiment. [Figure 16] 1A to 1C illustrate a structure of a display panel according to an embodiment. [Figure 17] 1. An electronic device according to an embodiment. [Figure 18] 1A to 1C are diagrams illustrating external views of electronic devices according to an embodiment. [Figure 19] 1A to 1C illustrate a semiconductor device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0015] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiments, and various changes and modifications may be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention is based on the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0016] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and repeated explanations thereof will be omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be assigned.

[0017] In each figure described in this specification, the size, layer thickness, or area of ​​each component is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0018] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The number is not a numerical limitation.

[0019] The functions of the "source" and "drain" are also different when the direction of the current changes during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0020] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) of a unit charge in a particle. However, in general, the potential difference between the potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, the term "potential" may be read as "voltage." , voltage may be read as potential.

[0021] A transistor is a type of semiconductor device that controls the amplification of current and voltage, and conduction or non-conduction. In this specification, the transistor can be , IGFET(Insulated Gate Field Effect Trans istor) and thin film transistor (TFT) ) is included.

[0022] (Embodiment 1) In this embodiment, a transistor with a multi-gate structure included in a semiconductor device of one embodiment of the present invention is An example of the configuration of the register will be described with reference to the drawings.

[0023] The transistor included in the semiconductor device described in this embodiment will be described with reference to FIGS. 1 and 2. explain.

[0024] 1A is a circuit diagram of a transistor 50. The transistor 50 has a source terminal S and the drain terminal D, a transistor 51 of a dual gate structure and a transistor 52 of a single gate structure are connected. The gate structure transistor 52 is a multi-gate structure transistor connected in series. .

[0025] In this specification, the multi-gate structure refers to a structure in which multiple gate electrodes are connected to the source terminal. By connecting the drain terminals in series, multiple channel regions are connected via low resistance regions. A dual gate structure is a structure in which two gate electrodes are connected in series. This refers to a structure in which

[0026] The transistor 51 has a dual gate structure, and either the source electrode or the drain electrode is a The other terminal is connected to either the source electrode or the drain electrode of the transistor 52. The first gate electrode is connected to the first gate terminal GE_1, and the second gate electrode is connected to the second gate terminal GE_2.

[0027] The transistor 52 has a single gate structure. Either the source electrode or the drain electrode is a transistor. The gate electrode is connected to the second gate transistor 51, and the other is connected to the drain terminal D. Connect to terminal GE_2.

[0028] The first gate terminal GE_1 is connected to a voltage source for controlling the threshold voltage of the transistor 51. Preferably, the potential of the source electrode or the drain electrode connected to the source terminal S is applied. A potential lower than the potential applied to one of the terminals is applied to the first gate electrode of the transistor 51. As a result, the threshold voltage of the transistor 51 can be shifted in the positive direction.

[0029] The second gate terminal GE_2 is connected to the on state of the transistor 51 and the transistor 52. A potential for controlling the off state is applied to the second gate of the transistor 51. The potential applied to the gate electrode of transistor 51 and the gate electrode of transistor 52 and transistor 52, and the on and off states of transistor 50 with a multi-gate structure. is controlled.

[0030] FIG. 1B shows a multi-gate transistor 50 and a single-gate transistor 51. 1B shows a schematic diagram of the transistor characteristics of the transistor 52. The horizontal axis of FIG. The vertical axis represents the voltage of the gate electrode of the transistor 51 and the gate electrode of the transistor 52, and the vertical axis represents the source voltage at room temperature. The current Id (A / μm) per μm of channel width between the source and drain electrodes is shown. In measuring the transistor characteristics, the source electrode is set to 0V and the drain electrode is set to +1V. When the gate electrode voltage is 0 V or less, the current smaller than 1 fA is directly is difficult to measure, but it is a circuit in which a capacitance element and a transistor are connected, and the capacitance element A circuit that controls the charge flowing into or out of a capacitor element using the transistor. The off-state current can be measured.

[0031] In FIG. 1B, the solid line represents the transistor characteristics of the multi-gate structure transistor 50. The dashed line represents the transistor characteristics of the transistor 52 having a single gate structure. The threshold voltage of the transistor 50 is denoted as Vth_50. The threshold voltage of the resistor 52 is denoted as Vth_52.

[0032] Compared with the threshold voltage Vth_52 of the transistor 52 having a single gate structure, The threshold voltage Vth_50 of the transistor 50 with the gate structure is increased (plus It can be seen that the object is moving in the direction of the arrow.

[0033] In the dual-gate transistor 51, a positive voltage is applied to the second gate electrode. At the same time, a voltage is applied to either the source electrode or the drain electrode connected to the source terminal S. When a voltage lower than the voltage at which the first gate electrode is applied to the first gate electrode, the transistor of the single gate structure Compared to the transistor 52, the threshold voltage increases (shifts in the positive direction).

[0034] The multi-gate transistor 50 has a transistor 51 and a transistor 52 connected in series. Because of the column connection, even if the gate voltage is higher than the threshold voltage of transistor 52, When a gate voltage lower than the threshold voltage of transistor 51 is applied, transistor 5 0 is the off state. That is, a voltage equal to or greater than the threshold voltage of the second transistor 51 When applied to the gate electrode, the multi-gate transistor 50 is turned on. A single-gate transistor is connected in series with a dual-gate transistor. By this, the threshold voltage of the multi-gate structure transistor 50 is increased (in a positive direction). (moving in the opposite direction).

[0035] In the transistor 51, a source terminal S is connected to the first gate electrode. When a voltage lower than the voltage applied to either the source or drain electrode is applied, Compared with the channel length (L_51) of transistor 51, the channel length ( It is preferable to increase the channel length (L_52) of transistor 52. L_52) is set to a value equal to or larger than the channel length (L_51) of the transistor 51, preferably 2 By making the capacitance of the multi-gate transistor 50 at least 100 times, and more preferably at least 300 times, This increases the threshold voltage (shifts it to the positive direction). When the voltage of the gate electrode is 0V, the current flowing between the source and drain can be reduced. The power consumption can be reduced. By minimizing the number of gates, it is possible to fabricate transistors with a multi-gate structure. can.

[0036] The channel width of the transistor 51 and the channel width of the transistor 52 may be the same. However, the channel width of the transistor 51 is set to be 1 times larger than the channel width of the transistor 52. 0 times or less, preferably more than 1 time and less than 3 times, As a result, the threshold current of the multi-gate transistor 50 can be increased. The value voltage can be increased (moved in the positive direction) and the I The on-current can be rapidly increased in the subthreshold region of the d-Vg characteristics. As a result, the current flowing between the source and drain when the voltage of the gate electrode is 0V is reduced. This allows for a reduction in power consumption.

[0037] In the multi-gate transistor 50, the threshold voltage increases ( When the gate voltage Vg is 0 V, the The current (Id / μm) flowing between the -15 A / μm) Below, for example, 1 aA / μm (1 × 10 -18 A / μm) or more and 1 fA / μm or less, preferably 1zA / μm(1×10 -21 A / μm) or more and 1aA / μm or less, more preferably 1y A / μm(1×10 -24 A / μm) or more and 1zA / μm or less. The gate structure of the transistor can reduce power consumption in the off state. The power consumption of the semiconductor device can be reduced.

[0038] Furthermore, the electric field concentration in the vicinity of the drain of the multi-gate transistor 50 is reduced. This allows for the breakdown voltage between the source and drain (also called drain breakdown voltage) to be improved. This can be done.

[0039] Alternatively, in the transistor 51, the first gate electrode and the second gate electrode are connected to the transistor A voltage can be applied to control the on-state of the transistor. For example, The voltage applied to the first gate electrode and the second gate electrode is set to the same voltage. The channel region is enlarged, and the field effect mobility of the multi-gate structure transistor 50 is improved. , the on-current can be increased.

[0040] Alternatively, in the transistor 51, the first gate electrode has a higher potential than the second gate electrode. A voltage or a low voltage may be applied to the second gate electrode. On the other hand, a voltage with a different rise and fall timing is applied to the first gate electrode. You may do so.

[0041] The circuit configuration is not limited to that shown in FIG. 1(A). For example, As shown, the source and drain can be swapped.

[0042] As shown in FIG. 19B, a transistor 52A having a single gate structure and a dual gate structure are The transistor 51 having a double gate structure and the transistor 52B having a single gate structure are In this case, the first gate of the transistor 51 of the dual gate structure The electrode is connected to the first gate terminal GE_1. the gate electrode of the transistor 52A, the second gate electrode of the transistor 51 having a dual gate structure, and The gate electrode of the single-gate transistor 52B is connected to the second gate terminal GE_2. Connect to.

[0043] Also, as shown in FIG. 19(C), a transistor 51A having a dual gate structure and a single The transistor 52 having a double gate structure and the transistor 51B having a dual gate structure are In this case, the first gate of the transistors 51A and 51B of the dual gate structure may be connected in series. The gate electrode of the first gate electrode is connected to the first gate terminal GE_1. The second gate electrode of the transistor 51A, the gate of the transistor 52 having a single gate structure The second gate electrode of the transistor 51B having a dual gate structure is connected to the second gate electrode of the transistor 51B. Connect to port terminal GE_2.

[0044] In FIG. 19C, the first gate of the transistor 51A having a dual gate structure is The first gate electrode of the transistor 51B having a dual gate structure is connected to the first gate electrode of the transistor 51B. may be connected to separate gate terminals.

[0045] Next, a more specific example of a multi-gate transistor and an example of a manufacturing method thereof will be described. Here, a transistor will be described as an example of a semiconductor device. Note that explanations of parts that overlap with those described above may be omitted.

[0046] <Configuration example> FIG. 2A is a schematic top view of a multi-gate transistor 100. 2(B), 2(C), and 2(D) are cut along the cutting lines AB and C- in FIG. 2(A), respectively. The cross-sectional schematic diagrams at D and EF are shown. Note that in Fig. 2(A), some components are omitted for clarity. The direction of the cutting line AB is the channel length direction, the direction of the cutting line CD is the E The -F direction may be referred to as the channel width direction.

[0047] The channel length is the length in a region where the semiconductor film and the gate electrode overlap in a top view. The source (source region or source electrode) and the drain (drain region or drain electrode) The channel width is the distance between the semiconductor film 109 and the gate electrode 117. This refers to the length in the region where the source and drain face each other in parallel.

[0048] That is, in the transistor 100a shown in FIG. 2A, the channel length is The distance between the conductive film 111 and the conductive film 112 in the region where the gate electrode 117 overlaps with the conductive film 111 is The channel width is the width of the conductive film in the region where the semiconductor film 109 and the gate electrode 117 overlap. This is the length over which the film 111 and the conductive film 112 face each other in parallel.

[0049] In addition, in the transistor 100b shown in FIG. 2A, the channel length is The distance between the conductive film 112 and the conductive film 113 in the region where the gate electrode 117 overlaps is The channel width is the width of the conductive film 117 in the region where the semiconductor film 109 and the gate electrode 117 overlap. This corresponds to the length over which the conductive film 113 and the conductive film 12 face each other in parallel.

[0050] The multi-gate structure transistor 100 is a dual-gate structure transistor 100. A transistor 100a having a single gate structure and a transistor 100b having a single gate structure are connected in series.

[0051] The transistor 100a includes an island-shaped semiconductor film 109 provided on a substrate 101 and a The gate electrode 103 between the gate electrode 101 and the semiconductor film 109, and the gate electrode 103 and the semiconductor film 10 The insulating film 107 and the conductive film 109 are in contact with each other between the insulating film 107 and the semiconductor film 109. 111 and 112, an insulating film 115 in contact with the semiconductor film 109, and a semiconductor film The gate electrode 117 overlaps the body membrane 109 .

[0052] In the transistor 100a, the insulating film 107 and the insulating film 115 serve as gate insulating films. It works.

[0053] The transistor 100b has an island-shaped semiconductor film 109 in contact with the insulating film 107 and a semiconductor film 1 conductive films 112 and 113 in contact with the semiconductor film 109, an insulating film 115 in contact with the semiconductor film 109, and an insulating film The gate electrode 117 overlaps with the semiconductor film 109 via the gate electrode 115 .

[0054] In the transistor 100b, the insulating film 115 functions as a gate insulating film.

[0055] The conductive film 111 functions as a source electrode of the multi-gate transistor 100. The conductive film 113 functions as a drain electrode of the multi-gate transistor 100. .

[0056] The multi-gate structure transistor 100 is a dual-gate structure transistor 100. In the single-gate transistor 100a, the semiconductor film 109, the conductive film 112 and the gate electrode 117 are connected in series.

[0057] In the multi-gate transistor 100 shown in FIG. An insulating film 105 is provided in contact with the gate electrode 103. It is preferable that the upper surfaces of the substrates are flattened so that the heights of the upper surfaces of the substrates are the same. At least, by planarizing the lower part of the semiconductor film 109, the uniformity of the thickness and film quality of the semiconductor film 109 can be improved. This increases the stability of the electrical characteristics of the transistor and reduces variations. Note that when the gate electrode 103 is thin, the insulating film 105 does not need to be provided.

[0058] As shown in FIG. 2C, in a cross section of the transistor 100 in the channel width direction, The semiconductor film 109 is surrounded by the gate electrode 103 and the gate electrode 117. The gate electrode 117 is formed not only on the upper surface of the semiconductor film 109 but also on the end portion in the channel width direction. By adopting such a configuration, the current from the gate electrode 117 Since the field is applied to the semiconductor film 109 not only in the vertical direction but also in the horizontal direction, the semiconductor film 109 This expands the region where the channel is formed, further increasing the on-current of the transistor 100. It is possible.

[0059] Next, each component of the multi-gate structure transistor 100 will be described.

[0060] <Semiconductor film 109> The semiconductor film 109 contains a semiconductor such as silicon in a region where a channel is to be formed. However, it is preferable to include a semiconductor having a band gap larger than that of silicon. Preferably, the semiconductor film 109 includes an oxide semiconductor. Other semiconductors include silicon, silicon carbide, gallium nitride, or diamond. Although semiconductors with bandgaps larger than any silicon can be used, they are difficult to fabricate. From the viewpoints of the performance and stability of electrical properties, it is preferable to use an oxide semiconductor.

[0061] Unless otherwise specified, the following description will be given for the case where an oxide semiconductor is used for the semiconductor film 109. explain.

[0062] The oxide semiconductor contains at least indium (In) or zinc (Zn). More preferably, In-M-Zn oxides (wherein M is Al, Ti, Ga, Ge, Y) are used. , Zr, Sn, La, Ce or Hf).

[0063] A semiconductor film in which a channel is formed using an oxide semiconductor with a larger band gap than silicon By applying 109, the fluctuation of the electrical characteristics of the transistor is extremely small even at high temperatures. Therefore, by using an oxide semiconductor for the semiconductor film 109, This makes it possible to realize a transistor that can operate stably at high temperatures.

[0064] Furthermore, the semiconductor film 109 is made of an oxide semiconductor having a larger band gap than silicon. This increases resistance to hot carrier degradation and allows the transistor to have a high drain current. Therefore, it is possible to produce a transistor that operates stably at a high driving voltage. This can be realized.

[0065] Here, hot carrier degradation is the phenomenon in which electrons accelerated to high speeds travel to the vicinity of the drain in the channel. In this case, the charge is injected into the gate insulating film and becomes a fixed charge, and a trap level is generated at the interface of the gate insulating film. This leads to deterioration of transistor characteristics such as threshold voltage fluctuation and gate leakage. The cause of hot carrier degradation is the channel hot electrons. injection (CHE injection) and drain avalanche hot carrier injection (DAHC injection) .

[0066] Since silicon has a narrow band gap, electrons are generated in an avalanche manner due to avalanche breakdown. The number of electrons accelerated to a high enough speed to overcome the barrier of the gate insulating film increases. However, since the oxide semiconductor described in this embodiment has a wide band gap, it is possible to form an avalanche It is less susceptible to shear breakdown and has higher resistance to hot carrier degradation than silicon.

[0067] Thus, the transistor can be said to have a high drain breakdown voltage. Insulated-Gate Field-Effect Transistor (IGFET) High-voltage devices with higher breakdown voltage than silicon devices such as silicon-based It is suitable for

[0068] In addition, the semiconductor film 109 is made of a material having a wider band gap than silicon and a higher carrier density. A small oxide semiconductor is preferably used because leakage current in an off state can be suppressed.

[0069] The semiconductor film 109 may be a single layer of an oxide semiconductor film or a layer of oxide semiconductors having different compositions. The membranes may be laminated.

[0070] For example, two oxide semiconductor films may be stacked, and the oxide semiconductor film closer to the gate electrode 117 may be stacked. The conductive film is made of a material whose conduction band lower energy is higher than that of the underlying oxide semiconductor film. Alternatively, the oxide semiconductor film may have a structure in which three or more oxide semiconductor layers are stacked, and the oxide semiconductor film provided on the inner side may have a layer structure in which three or more oxide semiconductor layers are stacked. The material used for the film has a lower energy at the bottom of its conduction band than other materials. By doing so, the channel is mainly formed in the oxide semiconductor film having the lowest energy at the bottom of the conduction band. is formed.

[0071] When an In-M-Zn oxide film is used as an oxide semiconductor film, the ratio of the number of M atoms in the film is The higher the ratio of the number of In atoms, the lower the energy of the conduction band. The larger the proportion of Zn, the more stable the crystal structure becomes. The larger the value, the more oxygen release from the oxide semiconductor film can be suppressed.

[0072] The channel is mainly formed in the oxide semiconductor film, which is the main current path. By providing an oxide semiconductor film containing an element in contact with the oxide semiconductor film, generation of these interface states can be suppressed. The reliability of the electrical characteristics of the transistor is improved. The oxide semiconductor film provided in contact with the oxide semiconductor film is formed by adding M atoms. When a material with a high ratio is used, oxygen vacancies in the oxide semiconductor film where the channel is formed are mainly can be reduced.

[0073] Preferable forms of oxide semiconductors that can be used for the semiconductor film 109 and their formation The method will be described in detail in a later embodiment. When the semiconductor film 109 is formed of a conductive film 112, the conductive film 112 contacts the semiconductor film 109, forming a low resistance region. can be formed.

[0074] <Substrate 101> There is no significant limitation on the material of the substrate 101, but it should be strong enough to withstand the heat generated during the process. Use a material with high heat resistance. For example, a glass substrate, a ceramic substrate, a quartz substrate, a silicon substrate, A substrate such as a fire substrate or an yttria-stabilized zirconia (YSZ) substrate is used as the substrate 101. In addition, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate such as silicon or silicon carbide may be used. Substrates, compound semiconductor substrates such as silicon germanium, and SOI substrates can also be used. can.

[0075] In addition, various semiconductor substrates and SOI substrates on which semiconductor elements are provided are referred to as substrate 101. In this case, a multi-gate structure transistor may be formed on the substrate 101 via an interlayer insulating film. The transistor 100 is formed. At this time, the connection electrode embedded in the interlayer insulating film , the gate electrodes 103 and 117 of the multi-gate transistor 100, the conductive film 111, At least one of 112 and 113 is a semiconductor provided on a semiconductor substrate or an SOI substrate. The multi-layer insulating film is formed on the semiconductor element via the interlayer insulating film. By providing a transistor 100 with a gate structure, the transistor 100 can be added. It is possible to suppress an increase in area due to the above.

[0076] <Gate electrodes 103 and 117> The gate electrodes 103 and 117 are made of aluminum, chromium, copper, tantalum, titanium, molybdenum, etc. a metal selected from the group consisting of nickel, tungsten, or an alloy containing the above-mentioned metals; It can be formed by using an alloy combining metals such as manganese and zirconia. One or more metals selected from the group consisting of ammonium, ammonium, ammonium hydroxide, ammonium nitrate ... Semiconductors such as doped polycrystalline silicon, and silicon such as nickel silicide The gate electrodes 103 and 117 may have a single layer structure or a double or more layer structure. For example, a single layer structure of an aluminum film containing silicon, an aluminum film containing silicon, or a silicon-containing aluminum film may be used. Two-layer structure in which a titanium film is laminated on a titanium nitride film, two-layer structure in which a titanium film is laminated on a titanium nitride film, Two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film stacked on stainless film, titanium film and aluminum film on the titanium film There are three-layer structures, such as a laminated aluminum film and a titanium film on top of that. Titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium An alloy film made by combining one or more metals selected from aluminum, or a nitride film of these metals It may be used.

[0077] The gate electrodes 103 and 117 are made of indium tin oxide and indium oxide containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide Alternatively, a conductive material having light-transmitting properties, such as indium tin oxide doped with indium, can be used. Alternatively, the light-transmitting conductive material and the metal may be laminated together.

[0078] <Insulating films 107, 115> The insulating films 107 and 115 function as gate insulating films.

[0079] The insulating films 107 and 115 are made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based metal oxide, nitrogen Silicon oxide or the like may be used, and the layer may be a laminated layer or a single layer.

[0080] The insulating films 107 and 115 are made of hafnium silicate (HfSiO x ), nitrogen Doped hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium Aluminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of hk materials can reduce gate leakage of transistors.

[0081] At least one of the insulating films 107 and 115 may contain a film that releases oxygen when heated. For example, an insulating film having an oxygen excess region may be included. As an insulating film having this property, for example, an oxide film containing more oxygen than the oxygen that satisfies the stoichiometric composition can be used. It is preferable to use an insulating film. Such an oxide insulating film has a property that oxygen is partly released by heating. do.

[0082] The thermal treatment in the transistor manufacturing process released the oxides from the insulating films 107 and 115. Oxygen is supplied to the semiconductor film 109, and oxygen vacancies in the semiconductor film 109 are compensated for. This makes it possible to reduce oxygen vacancies in the semiconductor film 109.

[0083] <Conductive films 111, 112, 113> The conductive films 111, 112, and 113 are made of aluminum, titanium, chromium, nickel, copper, or iron. Monolithic alloys consisting of tritium, zirconium, molybdenum, silver, tantalum, or tungsten The metal or alloy containing it as the main component is used as a single layer structure or a laminated structure. , a single layer structure of aluminum film containing silicon, and a two-layer structure of aluminum film stacked on titanium film. Layer structure, two-layer structure with aluminum film laminated on tungsten film, copper-magnesium-aluminum Two-layer structure with copper film laminated on aluminum alloy film, two-layer structure with copper film laminated on titanium film, Two-layer structure with copper film laminated on tungsten film, titanium film or titanium nitride film and its titanium An aluminum film or a copper film is laminated on the silicon film or titanium nitride film, and then an aluminum film or a copper film is laminated on top of that. Three-layer structure forming titanium film or titanium nitride film, molybdenum film or molybdenum nitride film Then, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film. There are three-layer structures, such as a layer of silicon dioxide and a molybdenum film or molybdenum nitride film formed on top of that. It is to be noted that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used.

[0084] The conductive film 111 functions as a source electrode of the multi-gate transistor 100. The conductive film 113 functions as a drain electrode of the multi-gate transistor 100. .

[0085] <Insulating film 105> The insulating film 105 has a function of supplying oxygen to the semiconductor film 109 and also a function of preventing oxygen from entering the semiconductor film 109. It may also have a function of preventing impurities contained therein from diffusing.

[0086] The insulating film 105 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. It is preferable to use an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. When the film is heated, some oxygen is desorbed. The oxide insulating film containing In the ion spectroscopy analysis, the amount of oxygen released in terms of oxygen atoms was 1 .0×10 18 atoms / cm 3 or more, preferably 3.0 × 10 20 atoms / cm 3 The oxide insulating film is the above. The temperature range is preferably 00°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower.

[0087] By using such an insulating film for the insulating film 105, Oxygen can be supplied to the semiconductor film 109, and oxygen vacancies in the semiconductor film 109 can be reduced.

[0088] <Insulating film 119> The insulating film 119 can be formed using a material that is not easily permeable to oxygen. It is preferable that the insulating film 119 has a property of being difficult to permeate. Materials that are difficult to penetrate include silicon nitride, silicon oxynitride, aluminum oxide, and oxide. Aluminum nitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride Insulating materials such as thorium, hafnium oxide, and hafnium oxynitride can be used. The above-mentioned materials are materials that do not allow oxygen, hydrogen, or water to pass through. By using such a material, the amount of oxygen released from at least one of the insulating films 107 and 115 can be reduced. It is possible to simultaneously suppress the diffusion of hydrogen, water, etc. into the semiconductor film 109 and the like from the outside. can.

[0089] Note that an insulating film is formed between the conductive film 111, the insulating film 115, the conductive film 113, and the insulating film 119. A film that releases oxygen similar to the insulating film 119 may be provided. When a structure such as a wiring is provided in the layer, an insulating film that functions as a planarization layer is formed on the insulating film 119. A membrane may be provided.

[0090] This concludes the explanation of each component.

[0091] The transistor 100a has a channel length determined by the distance between the conductive films 111 and 112. That is, the first gate electrode 103 and the second gate electrode 11 can be controlled. The layout of the transistor 100a can be designed with a margin of error. The variation in the channel length of the transistor 100 can be reduced. This can reduce variations in the characteristics of the laser.

[0092] Next, a method for manufacturing the multi-gate transistor 100 will be described with reference to FIGS. 3A to 3C show the steps involved in the manufacturing process of a multi-gate transistor 100. FIG.

[0093] <Formation of the second gate electrode> First, a conductive film that will become the gate electrode 103 is formed on the substrate 101. A resist mask is formed on the conductive film by using a lithography method or the like, and unnecessary portions of the conductive film are etched. After that, the resist mask is removed to reveal the gate electrode 103. It can be formed.

[0094] The conductive film that becomes the gate electrode 103 can be formed by, for example, sputtering, vapor deposition, CVD (Chemical Vapor Deposition), or the like. The film can be formed by a method such as chemical vapor deposition.

[0095] Before forming the conductive film that will become the gate electrode 103, a conductive film that functions as a barrier layer is formed on the substrate 101. An insulating film may be formed on the insulating film.

[0096] The light used to form the resist mask is, for example, i-line (wavelength 365 nm) or g-line (wavelength 43 6nm), H-line (wavelength 405nm), or a mixture of these can be used. In addition, ultraviolet light, KrF laser light, ArF laser light, or the like can also be used. Alternatively, the exposure may be performed by an immersion exposure technique. Light (EUV: Extreme Ultraviolet) or X-rays may also be used. Instead of light used for exposure, electron beams can also be used. The use of an electron beam is preferable because it allows for extremely fine processing. When exposure is performed by scanning a beam such as a photomask, no photomask is required.

[0097] Subsequently, an insulating film that will become the insulating film 105 is formed. Then, the top of the gate electrode 103 and the insulating film are polished. In order to make the surface of 105 approximately flat, the insulating film is formed thicker than the gate electrode 103. It is preferable that:

[0098] Next, the insulating film is etched by a CMP method or the like so that the upper surface of the gate electrode 103 is exposed. By performing planarization treatment on the resulting film, the insulating film 105 can be formed.

[0099] The insulating film that becomes the insulating film 105 is formed by sputtering, CVD (Chemical Vapor Deposition), etc. or Deposition) method, MBE (Molecular Beam Epita xy) method, ALD (Atomic Layer Deposition) method or PLD It can be formed using methods such as Pulsed Laser Deposition (PLD). Cut.

[0100] To make the insulating film 105 contain excess oxygen, for example, the insulating film 105 is heated in an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film after the film formation to remove excess oxygen. Alternatively, both methods may be combined.

[0101] For example, oxygen (at least oxygen radicals, oxygen atoms, or oxygen ions) is present in the insulating film after film formation. The oxygen-introducing method includes introducing oxygen into the film to form a region containing excess oxygen. ion implantation, ion doping, plasma immersion ion implantation, plasma Treatment etc. can be used.

[0102] For the treatment of introducing oxygen, a gas containing oxygen can be used. For example, oxygen, nitrous oxide, nitrogen dioxide, carbon dioxide, carbon monoxide, etc. can be used. In addition, in the process of introducing oxygen, it is possible to add a dilution gas such as a rare gas to the gas containing oxygen. It is okay to do so.

[0103] <Formation of insulating film 107> Subsequently, the insulating film 107 is formed (see FIG. 3A). The film can be formed by using a deposition method, a CVD method, an MBE method, an ALD method, a PLD method, or the like. .

[0104] The insulating film 107 can be made to contain excess oxygen by the same method as the insulating film 105. preferable.

[0105] <Formation of Semiconductor Film 109> Subsequently, a semiconductor film that will later become the semiconductor film 109 is formed on the insulating film 107. A resist mask is formed on the semiconductor film by photolithography or the like, and unnecessary portions of the semiconductor film are removed. The resist mask is then removed, leaving an island-like The semiconductor film 109 can be formed (FIG. 3(B)).

[0106] Semiconductor films are formed by sputtering, CVD, MBE, ALD, or PLD. Alternatively, a liquid material such as a sol-gel method, a spray method, or a mist method can be used. A thin film formation technique using a material can also be used. As the sputtering method, RF sputtering, DC sputtering, etc. In particular, the use of a sputtering method, AC sputtering method, etc. can be used to prevent the generation of dust during film formation. DC sputtering is used because it can reduce the thickness and make the film thickness distribution uniform. is preferred.

[0107] After the semiconductor film is formed, heat treatment may be performed. Preferably, the temperature is 300°C or higher and 500°C or lower, and the inert gas atmosphere and the oxidizing gas are mixed for 10 minutes. The heat treatment can be carried out in an atmosphere containing at least ppm or under reduced pressure. After heat treatment in an oxidizing gas atmosphere, an oxidizing gas of 10 ppm or less is added to compensate for the oxygen that has been removed. The heat treatment may be performed in an atmosphere containing the above-mentioned. As a result, oxygen vacancies in the oxide semiconductor included in the semiconductor film 109 can be reduced. The heat treatment may be performed immediately after the semiconductor film is formed, or after the semiconductor film is processed to form island-shaped semiconductors. This may be performed after the conductive film 109 is formed.

[0108] In addition, before forming the resist film that will become the resist mask, the processed film (here, the semiconductor film An organic resin film having the function of improving the adhesion between the resist film and the insulating layer may be formed. The organic resin film is formed by, for example, spin coating so as to cover the steps of the underlying layer. The thickness of the resist mask provided on the organic resin film can be reduced. In particular, when fine processing is performed, the organic resin film can be formed by using the same material as that used for exposure. It is preferable to use a material that functions as an anti-reflection film against light that passes through the substrate. As the organic resin film, for example, BARC (Bottom Anti-Reflect The organic resin film is removed in the same way as the resist mask. It may be removed at the same time as removing the resist mask, or after removing the resist mask.

[0109] <Formation of Conductive Films 111, 112, and 113> Subsequently, conductive films 111, 112, and 113 are formed on the insulating film 107 and the semiconductor film 109. Then, a resist is formed on the conductive film by using a photolithography method or the like. A mask is formed, and unnecessary portions of the conductive film are removed by etching. By removing the mask, conductive films 111, 112, and 113 can be formed (FIG. 3). (C)).

[0110] The conductive films that will later become the conductive films 111, 112, and 113 are formed by, for example, sputtering or vapor deposition. The film can be formed by a method such as a CVD method.

[0111] Here, when etching the conductive films that will later become the conductive films 111, 112, and 113, A part of the upper part of the conductive film 109 is etched so that it does not overlap with the conductive films 111, 112, and 113. Therefore, the thickness of the semiconductor film that becomes the semiconductor film 109 may be reduced by It is preferable to form the etching layer thick in advance, taking into consideration the etching depth.

[0112] <Formation of insulating film 115 and gate electrode 117> Subsequently, an insulating film is formed on the insulating film 107, the semiconductor film 109, and the conductive films 111, 112, and 113. An insulating film that will become the insulating film 115 is formed on the insulating film. A conductive film is formed.

[0113] The insulating film that will later become the insulating film 115 can be formed by a sputtering method, a CVD method, an MBE method, or an ALD method. Alternatively, the insulating film can be formed by a PLD method or the like. In particular, the insulating film can be formed by a CVD method, preferably a Alternatively, it is preferable to form the film by plasma CVD, since this can improve the coating property. It's nice.

[0114] The conductive film that will later become the gate electrode 117 can be formed by, for example, sputtering, evaporation, CVD, etc. The film can be formed by the following methods.

[0115] Subsequently, a resist mask is formed over the conductive film by photolithography or the like. After that, unnecessary portions of the conductive film and insulating film are removed by etching in that order. By removing the mask, the insulating film 115 and the gate electrode 117 can be formed. (Figure 3(D)).

[0116] After the conductive film is etched to form the gate electrode 117, the resist mask is removed. Alternatively, the insulating film 115 may be formed using the gate electrode 117 as a hard mask.

[0117] <Formation of insulating film 119> Next, the insulating film 107, the conductive films 111, 112, 113, the insulating film 115, and the gate electrode 1 An insulating film 119 is formed on the film 17 (FIG. 3(E)).

[0118] The insulating film 119 is formed by a method such as sputtering, CVD, MBE, ALD, or PLD. In particular, the insulating film 119 can be formed by a CVD method, preferably a plasma Forming the film by CVD is preferable because it can provide good coverage.

[0119] Through the above steps, the transistor 100 having a multi-gate structure can be formed.

[0120] <Heat treatment> After the insulating film 119 is formed, heat treatment may be performed. Oxygen is supplied to the semiconductor film 109 from one or more of the electrodes 07 and 115, and the oxygen in the semiconductor film 109 is In this case, the insulating film 119 is formed on the inner side of the insulating film 10. By providing the insulating films 105, 107, and 115, one or more of the insulating films 105, 107, and 115 and the semiconductor The oxygen released from the membrane 109 is effectively trapped, and the release of the oxygen to the outside is suppressed. Therefore, the electrons are released from one or more of the insulating films 105, 107, and 115 and reach the semiconductor film 10. The amount of oxygen that can be supplied to the semiconductor film 109 can be increased, and oxygen vacancies in the semiconductor film 109 can be effectively eliminated. can be reduced to

[0121] Through the above steps, the transistor 100 having a multi-gate structure can be manufactured.

[0122] Next, an example of a transistor configuration that is partially different from the transistor 100 described above will be described. The explanation will be omitted for the parts that overlap with the above, and only the differences will be explained in detail. Reveal.

[0123] <Variation 1> In FIG. 2, a gate electrode formed in common in the multi-gate structure transistor 100 is The electrode 117 is above the semiconductor film 109, and the gate electrode 117 is formed in the transistor 100. 03 is provided between the semiconductor film 109 and the substrate 101, and the gate electrode 117 is a semiconductor The semiconductor film 109 is disposed between the substrate 101 and the gate electrode 103. Even with this structure, since it has a multi-gate structure, the threshold voltage Furthermore, the This can alleviate the electric field concentration that occurs between the source and drain, and the breakdown voltage between the source and drain (also called drain breakdown voltage) can be improved.

[0124] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0125] <Variation 2> The structure of the multi-gate transistor 130 will be described with reference to FIG. 4. 4(B) shows a schematic top view of a multi-gate transistor 130. 4(A) shows a schematic cross-sectional view taken along the line AB in FIG. 4(A). Therefore, some components are not clearly stated.

[0126] The transistor 130 shown in FIG. 4 includes a transistor 130a having a dual gate structure and A single-gate transistor 130b is connected in series.

[0127] The transistor 130a has an insulating film 135 over the conductive films 111 and 112. 5 has a gate electrode 137 thereon.

[0128] The transistor 130b has an insulating film 135 over the conductive films 112 and 113. 5 has a gate electrode 137 thereon.

[0129] The insulating film 135 and the gate electrode 137 are the insulating films shown in the transistor 100. The film 115 and the gate electrode 117 can be formed using the same material.

[0130] The insulating film 135 is formed by dividing the first region 135a and the second region 135b into two regions separated on the semiconductor film 109. The gate electrode 137 has a first region 135b separated on the semiconductor film 109. That is, the gate electrode 137 has a first region 137a and a second region 137b. Therefore, the surface where the conductive film 112 and the gate electrode 137 overlap is Since the capacitance is reduced, the parasitic capacitance generated between the conductive film 112 and the gate electrode 137 is reduced. As a result, the multi-gate structure transistor 130 can operate at high speed. In addition, since the transistor 130 has a multi-gate structure, the threshold voltage Furthermore, the electric field concentration near the drain can be reduced. This makes it possible to improve the breakdown voltage between the source and drain (also called drain breakdown voltage). can.

[0131] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0132] <Variation 3> The structure of the multi-gate transistor 140 will be described with reference to FIG. 5. 5B is a schematic top view of a multi-gate transistor 140. 5(A) shows a schematic cross-sectional view taken along the line AB in FIG. 5(A). Therefore, some components are not clearly stated.

[0133] The transistor 140 shown in FIG. 5 includes a transistor 140a having a dual gate structure and A single-gate transistor 140b is connected in series.

[0134] The transistor 140a has a semiconductor film 149a between the insulating film 107 and the insulating film 115. do.

[0135] The transistor 140b has a semiconductor film 149b between the insulating film 107 and the insulating film 115. do.

[0136] The semiconductor films 149a and 149b are the same as the semiconductor film 109 in the transistor 100. The various materials can be used to form the substrate.

[0137] The semiconductor film 149a and the semiconductor film 149b are separated from each other. The transistor 140a and the semiconductor film 149b are in contact with each other. The transistor 140 has a multi-gate structure. Therefore, the threshold voltage can be shifted to the positive side. It is possible to alleviate the electric field concentration, and the breakdown voltage between the source and drain (also called drain breakdown voltage) It can be improved.

[0138] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0139] <Variation 4> The structure of a multi-gate transistor 150 will be described with reference to FIG. 6. 6(B) and 6(C) show schematic top views of a multi-gate transistor 150. 6(C) are schematic cross-sectional views taken along the cutting lines CD and EF in FIG. 6(A), respectively. In FIG. 6(A), some components are not shown for clarity.

[0140] The transistor 150 shown in FIG. 6 includes a transistor 150a having a dual gate structure and A single-gate transistor 150b is connected in series.

[0141] The transistor 150a includes a first insulating film 159 between the insulating film 107 and the insulating film 115. The area 159a has the following structure.

[0142] The transistor 150b includes a second insulating film 159 between the insulating film 107 and the insulating film 115. The region 159b has:

[0143] Note that the semiconductor film 159 is formed using the same material as the semiconductor film 109 in the transistor 100. It can be formed by

[0144] The first region 159a and the second region 159b have different lengths in the channel width direction. That is, the length of the first region 159a in the channel width direction is longer than that of the second region 159b. That is, the channel width Wa of the transistor 150a is longer than that of the transistor 150b. The channel width Wa of the transistor 150a is larger than the channel width Wb of the transistor 150b. The channel width Wb of 0b is greater than 1 time and less than 10 times, preferably greater than 1 time and less than 3 times This makes it possible to increase the on-state current of the transistor 150a. As a result, the threshold voltage of the multi-gate structure transistor 150 is increased (in the positive direction). It is possible to move the Id-Vg characteristics of the transistor to the subthreshold level. This allows the on-current to rise sharply in the gate region.

[0145] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0146] <Variation 5> The semiconductor device of one embodiment of the present invention includes an oxide semiconductor film formed as the semiconductor film 109 and a Between the insulating film overlapping with the oxide semiconductor film, It is preferable to provide an oxide semiconductor film containing at least one metal element as a constituent element. This allows for the formation of a trap at the interface between the oxide semiconductor film and the insulating film overlapping the oxide semiconductor film. Therefore, the formation of a P level can be suppressed.

[0147] That is, one embodiment of the present invention is a method for forming a semiconductor film by forming a semiconductor layer on an upper surface of at least a channel region of an oxide semiconductor film. and the bottom surface is an oxide semiconductor film that functions as a barrier film for preventing the formation of interface states in the oxide semiconductor film. It is preferable that the oxide film is in contact with the oxide semiconductor film. Oxygen vacancies and impurities that cause carrier generation in semiconductor films and at interfaces Since it is possible to suppress the inclusion of other elements, the oxide semiconductor film can be made highly purified and intrinsic. High-purification to intrinsic oxide semiconductor film means making the oxide semiconductor film intrinsic or substantially intrinsic. Therefore, fluctuations in the electrical characteristics of a transistor including the oxide semiconductor film can be suppressed, and a highly reliable transistor can be obtained. It is possible to provide a semiconductor device.

[0148] Note that in this specification and the like, when the term "substantially intrinsic" is used, the carrier density of the oxide semiconductor film is , 1×10 17 / cm 3 Less than 1×10 15 / cm 3 Less than or equal to 1 x 10 13 / cm 3 By making the oxide semiconductor film highly purified and intrinsic, the transistor has stable electrical characteristics. Sex can be assigned.

[0149] More specifically, for example, the following configuration can be adopted.

[0150] FIG. 7 shows a schematic cross-sectional view of a transistor exemplified below. Figure 2(A) can be used.

[0151] The transistor shown in FIG. 7A has an oxide semiconductor layer between the insulating film 107 and the semiconductor film 109. It is characterized by having a membrane 169.

[0152] The transistor shown in FIG. 7B has an oxide semiconductor layer between the insulating film 107 and the semiconductor film 109. The insulating film 115 includes an oxide semiconductor film 179 between the semiconductor film 109 and the insulating film 115. It is characterized by the following.

[0153] The oxide semiconductor films 169 and 179 each contain at least one of the same metal elements as the semiconductor film 109. It is formed from metal oxides including the above.

[0154] Note that the boundary between the semiconductor film 109 and the oxide semiconductor film 169 and the boundary between the semiconductor film 109 and the oxide semiconductor film 169 are The boundary of the conductive film 179 may be unclear.

[0155] For example, the oxide semiconductor films 169 and 179 contain In or Ga, typically I n-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ti, G a, Y, Zr, La, Ce, Nd or Hf) and has a conduction band lower than that of the semiconductor film 109 A material whose energy level at the bottom is close to the vacuum level is used. , 179 and the energy of the bottom of the conduction band of the semiconductor film 109. The difference is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more. and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less. preferable.

[0156] The oxide semiconductor films 169 and 179 sandwiching the semiconductor film 109 are By using an oxide with a higher Ga content that acts as a stabilizer compared to 09, Therefore, release of oxygen from the semiconductor film 109 can be suppressed.

[0157] The semiconductor film 109 is made of, for example, In:Ga:Zn=1:1:1 or 3:1:2 atoms. When an In-Ga-Zn-based oxide having a numerical ratio is used, the oxide semiconductor films 169 and 179 are For example, In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:6:4, 1:6: In-Ga-Zn oxides with atomic ratios of 8, 1:6:10, or 1:9:6 are used. The atomic ratio of the semiconductor film 109 and the oxide semiconductor films 169 and 179 can be Each includes a variation of plus or minus 40% of the above atomic ratio as an error. Further, the oxide The semiconductor films 169 and 179 may be made of the same composition material or materials with different compositions may be used.

[0158] Also, when an In-M-Zn-based oxide is used as the semiconductor film 109, for the target used to form the film that becomes the semiconductor film 109, when the atomic ratio of the metal elements contained in the target is In:M:Zn = x1:y1:z1, the value of x1 / y1 is 1 / 3 or more and 6 or less, preferably 1 or more and 6 or less, and z1 / y1 is 1 / 3 or more and 6 or less, preferably 1 or more and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc. and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc. and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc. and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc. and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc. and 6 or less, and it is preferable to use a metal oxide having an atomic ratio within this range. By setting z1 / y1 to 6 or less, it becomes easier to form the CAAC-OS film described later. Representative examples of the atomic ratio of the metal elements of the target include In:M:Zn = 1:1:1, 3:1:2, etc.<00011​​​​​​​​​​​​​​​​​​​​By using a material whose energy is close to the vacuum level, the channel is mainly formed in the semiconductor film 109. The semiconductor film 109 is formed as a main current path. The conductive film 109 is sandwiched between oxide semiconductor films 169 and 179 containing the same metal element. This suppresses the generation of these interface states, improving the reliability of the transistor's electrical characteristics. do.

[0161] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the semiconductor film 109, the oxide semiconductor films 169 and 17 9 carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density It is preferable to set the degree etc. appropriately.

[0162] Here, the thickness of the semiconductor film 109 is at least thicker than that of the oxide semiconductor film 169. The thicker the semiconductor film 109, the higher the on-state current of the transistor. In addition, the oxide semiconductor film 169 has the effect of suppressing generation of interface states in the semiconductor film 109. For example, the thickness of the semiconductor film 109 is set to a value that is not too large for an oxide semiconductor. The thickness of the membrane 169 is more than 1 time, preferably 2 times or more, more preferably 4 times The on-state current of the transistor is increased by a factor of 1 or more, and more preferably by a factor of 6 or more. This is not the case if it is not necessary, and the thickness of the oxide semiconductor film 169 is It may be thicker than that.

[0163] In addition, like the oxide semiconductor film 169, the oxide semiconductor film 179 also has a structure in which the oxide semiconductor film 179 is formed at the interface with the semiconductor film 109. The thickness may be such that the effect of suppressing the generation of levels is not lost. The thickness of the oxide semiconductor film 179 may be equal to or less than that of the oxide semiconductor film 169. Since the electric field from the gate electrode 117 may not reach the semiconductor film 109 easily, the oxide semiconductor It is preferable that the conductor film 179 is formed thin. For example, it is thinner than the semiconductor film 109. Note that the thickness of the oxide semiconductor film 179 is not limited to this and may be set to a value that satisfies the withstand voltage of the insulating film 115. Taking this into consideration, it may be set appropriately according to the voltage at which the transistor is driven.

[0164] Here, for example, the semiconductor film 109 is an insulating film having a different constituent element (for example, a silicon oxide film). When the material is in contact with a silicon dioxide film (such as an insulating film containing silicon dioxide), an interface state is formed at the interface between the material and the silicon dioxide film. In such cases, a new transistor with a different threshold voltage is created. appears, and the apparent threshold voltage of the transistor may fluctuate. In the transistor of this configuration, the semiconductor film 109 contains one or more metal elements. Since the oxide semiconductor film 169 is provided, the oxide semiconductor film 169 and the semiconductor film 109 Therefore, by providing the oxide semiconductor film 169, Variation and fluctuation in electrical characteristics such as the threshold voltage of the transistor can be reduced.

[0165] In addition, when a channel is formed at the interface between the insulating film 115 and the semiconductor film 109, Interface scattering occurs, and the field-effect mobility of the transistor decreases. In the transistor, the semiconductor film 109 is made of an oxide semiconductor containing one or more metal elements. Since the conductive film 179 is provided, the interface between the semiconductor film 109 and the oxide semiconductor film 179 is Carrier scattering is less likely to occur, and the field effect mobility of the transistor can be increased.

[0166] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. This embodiment can be used in conjunction with other embodiments described in this specification. They can be implemented in any suitable combination.

[0167] (Embodiment 2) In this embodiment mode, the multi-gate transistor shown in Embodiment Mode 1 is appropriately used. A transistor capable of achieving this will be described with reference to FIG.

[0168] 8A to 8D show a multi-gate structure included in a semiconductor device of one embodiment of the present invention. 8A and 8B are a top view and a cross-sectional view of a transistor having the same structure. 8(A) shows a schematic cross-sectional view taken along the line AB in FIG. 8(A), and FIG. 8(C) and FIG. 8(D) show schematic cross-sectional views taken along the line AB in FIG. 8(A) shows a schematic cross-sectional view taken along the cutting lines CD and EF.

[0169] The multi-gate structure transistor 200 is a dual-gate structure transistor 200 A transistor 200a having a single gate structure and a transistor 200b having a single gate structure are connected in series. The multi-gate structure transistor 200 is a dual-gate structure transistor 200a The single-gate transistor 200b has a conductive film 212 and a gate electrode 2 17 is common, so they are connected in series.

[0170] The transistor 200a includes an island-shaped oxide semiconductor film 269a and an oxide semiconductor film 269b provided over a substrate 201. and the oxide semiconductor film 209a, and a gate electrode between the substrate 201 and the oxide semiconductor film 269a. 203, and the oxide semiconductor film 269a between the gate electrode 203 and the oxide semiconductor film 269a. The insulating film 207 in contact with the oxide semiconductor film 209a and the conductive films 211 and 212 in contact with the oxide semiconductor film 209a and an oxide semiconductor film 279a in contact with the oxide semiconductor film 209a and the conductive films 211 and 212. the insulating film 215 in contact with the oxide semiconductor film 279a; The transistor 200a has a gate electrode 217 overlapping the semiconductor film 209a. Thus, the first region 217a of the gate electrode 217 functions as the gate electrode.

[0171] The transistor 200b includes an island-shaped oxide semiconductor film 269b and an oxide semiconductor film 269c provided over the substrate 201. and the oxide semiconductor film 209b, and the conductive films 212 and 213 in contact with the oxide semiconductor film 209b. the oxide semiconductor film 279b in contact with the oxide semiconductor film 209b and the conductive films 212 and 213; the insulating film 215 in contact with the oxide semiconductor film 279b; The transistor 200b has a gate electrode 217 overlapping the film 209b. The second region 217b of the gate electrode 217 functions as the gate electrode.

[0172] In the transistor 200a, the insulating film 207 and the insulating film 215 serve as gate insulating films. In the transistor 200b, the insulating film 215 functions as a gate insulating film. The insulating film 207 has a protrusion, and the oxide semiconductor layer is formed on the protrusion of the insulating film 207. The oxide semiconductor film 269a and the oxide semiconductor film 209a are stacked together with the oxide semiconductor film 269b and the oxide semiconductor film 209b. A compound semiconductor film 209b is provided for each transistor.

[0173] As shown in FIG. 8B, the oxide semiconductor film 279a is , the upper and side surfaces of the conductive films 211 and 212 are in contact with each other, and as shown in FIG. 8(C), the insulating film The top surface of the oxide semiconductor film 207 and the side surfaces of the protrusions, the side surfaces of the oxide semiconductor film 269a, and the oxide semiconductor film 209a The oxide semiconductor film 279b is in contact with the side surface and the top surface of the oxide semiconductor film 279b. As shown in FIG. 1, the top surface of the oxide semiconductor film 209b and the top and side surfaces of the conductive films 212 and 213 are in contact with each other. 8D, the upper surface of the insulating film 207, the side surfaces of the protrusions, and the oxide semiconductor film 26 The side surface of the oxide semiconductor film 9b is in contact with the side surface and top surface of the oxide semiconductor film 209b.

[0174] The conductive film 211 functions as a source electrode of the multi-gate transistor 200. The conductive film 213 functions as a drain electrode of the multi-gate transistor 200. .

[0175] As shown in FIG. 8C, in the channel width direction of the transistor 200a, the gate voltage The first region 217a of the electrode 217 is in contact with the upper surface of the oxide semiconductor film 209a via the insulating film 215. 8(D), the channel of the transistor 200b In the width direction, the second region 217b of the gate electrode 217 is oxidized via the insulating film 215. The insulating layer 209 faces the top and side surfaces of the semiconductor film 209b.

[0176] The first region 217a of the gate electrode 217 electrically surrounds the oxide semiconductor film 209a. The second region of the gate electrode 217 electrically surrounds the oxide semiconductor film 209b. This structure increases the on-state current of the transistor 200a and the transistor 200b. This type of transistor structure is called a Surrounded Channel. In the S-Channel structure, the current is The oxide semiconductor film 209a flows through the entire oxide semiconductor film 209a and the bulk of the oxide semiconductor film 209b. Since the current flows through the inside of 209b, it is less susceptible to the influence of interface scattering, and therefore a high on-state current can be obtained. Note that when the oxide semiconductor films 209a and 209b are thick, the on-state current can be reduced. The flow can be improved.

[0177] Furthermore, when the channel length and the channel width of a transistor are reduced, a resist mask When electrodes and semiconductor films are formed while the substrate is being retracted, the edges of the electrodes and semiconductor films become rounded. In this structure, the oxide semiconductor film 209a , 209b, oxide semiconductor films 279a and 279b, an insulating film 215, and a gate electrode The covering property of the electrode 217 can be improved. This can mitigate the electric field concentration that may occur in the area, and suppress the deterioration of the transistor. This can be done.

[0178] Furthermore, by miniaturizing transistors, the degree of integration can be increased, resulting in higher density. For example, the channel length of the transistor is set to 100 nm or less, preferably 40 nm or less, and Preferably, the thickness is 30 nm or less, more preferably 20 nm or less, and the thickness of the transistor channel is The channel width is 100 nm or less, preferably 40 nm or less, more preferably 30 nm or less, The channel width of the transistor according to one embodiment of the present invention is preferably 20 nm or less. Even with the above-mentioned reduction, the on-current can be increased by having an S-channel structure It is possible.

[0179] The substrate 201, the gate electrode 203, the insulating film 205, the insulating film 207, the oxide semiconductor film 209a, 209b, conductive film 211, conductive film 212, conductive film 213, insulating film 215, The gate electrode 217 and the insulating film 219 are the same as those of the substrate 101 and the gate electrode 102 shown in the first embodiment, respectively. 03, insulating film 105, insulating film 107, semiconductor film 109, conductive film 111, conductive film 112, The materials and manufacturing methods of the conductive film 113, the insulating film 115, the gate electrode 117, and the insulating film 119 are appropriately selected. It can be used.

[0180] The oxide semiconductor films 269a and 269b are the same as those of the oxide semiconductor film 16 described in Embodiment 1. The materials of 9a and 169b can be used appropriately. Before forming the film to be the oxide semiconductor films 269a and 269b, Next, the film to be the oxide semiconductor films 269a and 269b and the film to be the semiconductor film 109 are processed. As a result, the oxide semiconductor films 269a and 269b and the oxide semiconductor films 209a and 209b can be formed.

[0181] The oxide semiconductor films 279a and 279b are the same as those of the oxide semiconductor films 179a and 179b described in Embodiment 1. 3D, the insulating film 115 and the insulating film 179b can be formed of the same material. Before forming the oxide semiconductor films 279a and 279b, films to be the oxide semiconductor films 279a and 279b are formed. The film to be the oxide semiconductor films 279a and 279b and the film to be the insulating film 115 are processed. Then, the oxide semiconductor films 279a and 279b and the insulating film 115 can be formed.

[0182] To increase the integration density of semiconductor devices, miniaturization of transistors is essential. It is known that the electrical characteristics of transistors deteriorate as the channel width decreases. Shrinking reduces the on-current.

[0183] However, in the transistor of one embodiment of the present invention, as described above, An oxide semiconductor film 279a covers the regions where channels 209a and 209b are formed. 279b is formed, and the insulating film 215 which functions as a channel region and a gate insulating film is formed. Therefore, the oxide semiconductor films 209a and 209b and the gate insulating film 209b are not in contact with each other. This suppresses the scattering of carriers at the interface with the film, increasing the on-current of the transistor. It is possible.

[0184] In addition, if the semiconductor film is intrinsic or substantially intrinsic, the number of carriers contained in the semiconductor film is However, the decrease in the field-effect mobility of the transistor of one embodiment of the present invention is a concern. In the transistor, the oxide semiconductor films 209a and 209b are subjected to a gate electric field in a direction perpendicular to the oxide semiconductor films 209a and 209b. In addition, a gate electric field is applied from the side. A gate electric field is applied to the entire region 209b, and current flows through the bulk of the semiconductor film. This allows for the suppression of fluctuations in electrical characteristics through highly purified intrinsic materials, while also improving the transistor performance. This makes it possible to improve the field effect mobility of the semiconductor.

[0185] In the transistor of one embodiment of the present invention, the oxide semiconductor films 209a and 209b are formed of an oxide By forming the semiconductor film 269a, 269b, it is possible to prevent the formation of an interface state. By providing the oxide semiconductor films 209a and 209b between the oxide semiconductor films, impurities from above and below can be prevented. The oxide semiconductor film 209a also has an effect of eliminating the influence of contamination. , 209b are oxide semiconductor films 269a, 269b and oxide semiconductor films 279a, 279b. The structure is surrounded by the gate electrode 217 (and electrically surrounded by the gate electrode 217). In addition to the improvement of the on-state current of the transistor, the threshold voltage can be stabilized. Furthermore, the multi-gate structure allows the threshold voltage to be shifted to the positive side. Therefore, when the voltage of the gate electrode is 0V, the current that flows between the source and drain is This reduces the threshold voltage of the transistor, which reduces power consumption. Since the voltage is stabilized, the long-term reliability of the semiconductor device can be improved.

[0186] <Variation 1> 8, the insulating film 207 has a convex portion, but it does not have to have a convex portion. , oxide semiconductor films 269a and 269b, oxide semiconductor films 209a and 209b, and insulating film 2 By increasing the etching selectivity with 07, the insulating film 207 is over-etched. Even with this structure, the on-current of the transistor is In addition, the multi-gate structure allows the threshold voltage to be increased. can be shifted to.

[0187] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0188] <Variation 2> In FIG. 8, oxide semiconductor films 269a and 269b and oxide semiconductor films 279a and 279b are 79b, and oxide semiconductor films 209a and 209b are stacked over the insulating film 207. The insulating film 215 may be formed on the compound semiconductor films 209a and 209b. Even with this structure, the on-state current of the transistor can be increased. The multi-gate structure allows the threshold voltage to be shifted to the positive side.

[0189] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0190] <Variation 3> In FIG. 8, the oxide semiconductor films 269a and 269b are not provided, and an oxide semiconductor film is formed on the insulating film 207. Semiconductor films 209a and 209b are formed, and an oxide semiconductor film is formed on the oxide semiconductor films 209a and 209b. A structure in which semiconductor films 279a and 279b are formed can be used. Even if the gate electrode is a multi-gate structure, the on-state current of the transistor can be increased. Therefore, the threshold voltage can be shifted to the positive side.

[0191] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. It can be used.

[0192] <Variation 4> In FIG. 8, the oxide semiconductor films 279a and 279b are not provided, and the oxide semiconductor film 279b is formed on the insulating film 207. Semiconductor films 269a and 269b are formed, and an oxide semiconductor film is formed on the oxide semiconductor films 269a and 269b. oxide semiconductor films 209a and 209b are formed on the insulating film 209a and the insulating film 209b. The film 215 can be formed. In addition, the multi-gate structure allows the threshold voltage to be increased. The voltage can be shifted positively.

[0193] This modification is applicable to the present embodiment, other embodiments, and their modifications as appropriate. This embodiment can be used in conjunction with other embodiments described in this specification. They can be implemented in any suitable combination.

[0194] (Embodiment 3) In this embodiment, the transistors of the multi-gate structure exemplified in the first and second embodiments are An example of a transistor having a configuration partially different from that of a conventional transistor will be described with reference to the drawings. Note that we will omit explanations of the parts that overlap with the above, and will only explain the differences in detail. In addition, even if the position or shape of the components is different, if the functions are equivalent, The same reference numerals may be used and the description may be omitted.

[0195] <Configuration example 1> 9A to 9D are schematic top views of a transistor 300 according to this configuration example. Also, FIG. 9(E) shows all the cut lines AB in FIGS. 9(A) to 9(D). 9A is a schematic cross-sectional view of the gate electrode 303. 9(B) is a schematic top view of the semiconductor film 309, and FIG. 9(C) is a schematic top view of the conductive film 3 9(D) is a schematic top view of the gate electrode 317 and the wiring 3 21, 322, and 323 are top schematic views.

[0196] The transistor 300 is different from the transistors illustrated in the first and second embodiments. The main difference is that the top surface of the gate electrode is annular and the top surface of the semiconductor film is circular. is doing.

[0197] As shown in FIG. 9A, the gate electrode 303 has a circular upper surface shape with an opening. In addition, a part of the gate electrode 303 is drawn outward beyond the conductive film 311 when viewed from above. It has been done.

[0198] As shown in FIG. 9B, the island-shaped semiconductor film 309 overlaps a part of the gate electrode 303. As shown, the upper surface has a circular shape.

[0199] As shown in FIG. 9C, the conductive film 311 is formed on the gate electrode 303 and the semiconductor film 309. The conductive film 312 has a circular top surface shape so as to overlap with a part of the conductive film 311. The upper surface of the conductive film 304 is annular and overlaps with a part of the semiconductor film 309. The conductive film 313 is disposed inside the conductive film 312 and overlaps a part of the semiconductor film 309. , and has a circular top surface shape.

[0200] As shown in FIG. 9(D), the gate electrode 317 is formed by stacking the gate electrode 303, the semiconductor film 309, The upper surface of the conductive film 311 has an opening so as to overlap with a part of the conductive film 312, and the upper surface of the conductive film 313 has an opening. The wiring 321 is formed in an opening 331 in the opening of the gate electrode 317. The wiring 322 is connected to the conductive film 313. The wiring 322 is connected to the conductive film 311 in the opening 332. The wiring 323 is connected to the gate electrode 317 through the opening 333 .

[0201] As shown in FIG. 9E, the multi-gate transistor 300 has a dual gate A transistor 300a having a gate structure and a transistor 300b having a single gate structure are connected in series. Specifically, the multi-gate transistor 300 has a dual gate structure. The transistor 300a having a single gate structure and the transistor 300b having a single gate structure are semiconductor The film 309, the conductive film 312, and the gate electrode 317 are connected in series by being shared.

[0202] The transistor 300a is a semiconductor film 309 formed on a substrate 301 and a semiconductor layer 302 formed on a substrate 303. The gate electrode 303 between the gate electrode 301 and the semiconductor film 309, and the gate electrode 303 and the semiconductor film 309 9, the insulating film 307 in contact with the semiconductor film 309 and the conductive film 309 in contact with the semiconductor film 309. 311 and 312, an insulating film 315 in contact with the semiconductor film 309, and a semiconductor film 309 The gate electrode 317 overlaps the body membrane 309 .

[0203] In the transistor 300a, the insulating film 307 and the insulating film 315 serve as gate insulating films. It works.

[0204] The transistor 300b has an island-shaped semiconductor film 309 in contact with the insulating film 307 and a semiconductor film 308. Conductive films 312 and 313 in contact with the semiconductor film 309, an insulating film 315 in contact with the semiconductor film 309, and an insulating film It has a gate electrode 317 overlapping with the semiconductor film 309 via 315 .

[0205] In the transistor 300b, the insulating film 315 functions as a gate insulating film.

[0206] The substrate 301, the gate electrode 303, the insulating film 305, the insulating film 307, the semiconductor film 309 , a conductive film 311, a conductive film 312, a conductive film 313, an insulating film 315, a gate electrode 317, an insulating film The film 319 is the same as the substrate 101, the gate electrode 103, and the insulating film 105 shown in Embodiment 1. , insulating film 107, semiconductor film 109, conductive film 111, conductive film 112, conductive film 113, insulating film The materials and manufacturing methods of the gate electrode 115, the gate electrode 117, and the insulating film 119 can be appropriately used. .

[0207] The wirings 321, 322, and 323 are made of the same material as the conductive films 311, 312, and 313. The wirings 321, 322, and 323 can be formed through openings in the insulating film 319. After that, a film that will become wirings 321, 322, and 323 is formed on the insulating film 319. By processing the film that will become the wires 321, 322, and 323, the wiring 321, 322, and 323 are formed. It can be achieved.

[0208] In this way, the conductive film 312 is provided inside the conductive film 311, and the conductive film 312 is provided inside the conductive film 312. By providing 313, the transistors of the multi-gate structure are The channel width relative to the area occupied by the transistor 300 can be made large. This configuration allows for a larger drain current to be obtained. The present invention can be suitably applied to pressure devices.

[0209] The semiconductor film 309 and the conductive film 313 have circular top surfaces. The top surface of the semiconductor film 309 is formed in a ring shape surrounding the semiconductor film 309 and the conductive film 313. It is possible to make the channel length L constant in the direction of the upper surface of the semiconductor film 309. Shapes are not limited to these, and may be polygonal, including squares and rectangles, ovals, or shapes with rounded corners. The transistor 300 may have a multi-gate structure. Therefore, the threshold voltage can be shifted to the positive side. This can reduce the electric field concentration in the source-drain region, and the breakdown voltage between the source and drain (also called drain breakdown voltage) ) can be improved.

[0210] <Variation 1> In FIG. 9, the gate electrode 303 is formed in a shape that overlaps with parts of the conductive films 311 and 312. However, it may be configured so as to overlap with parts of the conductive films 312 and 313. A transistor with a dual gate structure is disposed inside a transistor 300b with a single gate structure. 300a is located here.

[0211] Even in such a configuration, the area occupied by the multi-gate transistor 300 is This allows for a larger channel width, making it possible to obtain a larger drain current. .

[0212] <Variation 2> In FIG. 9, the transistor 300a and the transistor 300b are commonly formed. The gate electrode 317 is above the semiconductor film 309, and the gate electrode 317 is formed in the transistor 300a. The gate electrode 303 is provided between the semiconductor film 309 and the substrate 301. 7 is provided between the semiconductor film 309 and the substrate 301, and the gate electrode 303 is It may be provided above.

[0213] Even in such a configuration, the area occupied by the multi-gate transistor 300 is This allows for a larger channel width, making it possible to obtain a larger drain current. .

[0214] <Variation 3> In the transistor 300b shown in FIG. 9, the gate electrode 317 is formed by the conductive films 312 and 313. That is, the conductive films 312 and 313 overlap with the ends of the semiconductor film 309. On the other hand, in the transistor shown in the third modification, the gate electrode The conductive film 317 can be configured to overlap only one of the conductive films 312 and 313. In the semiconductor film 309, a region that does not overlap with the gate electrode 317 becomes an offset region. As a result, even if the withstand voltage of the insulating film 315 that functions as a gate insulating film is low, the offset By providing the gate region, the generation of leakage current in the semiconductor film 309 and the gate electrode 317 can be prevented. It can suppress growth.

[0215] In addition, the channel width relative to the occupied area of ​​the multi-gate structure transistor 300 is increased. This allows a larger drain current to be obtained.

[0216] As described above, the multi-gate transistor according to one embodiment of the present invention has a large drain. It is possible to simultaneously achieve high drain current and high drain breakdown voltage, making it suitable for use as a semiconductor for high power applications. It can be suitably applied to devices (such as high-voltage devices with higher withstand voltages than silicon). In addition, by using a semiconductor material with a wider band gap than silicon for the semiconductor film, In particular, the multi-gate structure shown in this embodiment can be stably operated even at high temperatures. Transistors can pass large currents, and self-heating during operation can become significant. In addition, in the case of semiconductor devices for high power applications, the environment in which they are used can become very hot due to heat generated by other elements. However, in the case of a multi-gate structure transistor according to one embodiment of the present invention, The transistor can maintain stable electrical characteristics even in such a high-temperature environment. The reliability of a semiconductor device using a transistor in a high-temperature environment can be improved.

[0217] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0218] (Fourth embodiment) In this embodiment, a semiconductor film that can be suitably used for a semiconductor film of a semiconductor device according to one embodiment of the present invention will be described. The oxide semiconductor will be described.

[0219] Oxide semiconductors have a large energy gap of 3.0 eV or more, making them suitable for The oxide semiconductor film obtained by processing under suitable conditions and sufficiently reducing the carrier density is applied. In a transistor with this structure, the leakage current between the source and drain in the off state (off current) can be made extremely low compared to conventional silicon-based transistors. .

[0220] In addition, as an oxide semiconductor, InMO3(ZnO) m (m>0 and m is not an integer ) may be used, where M is selected from Ga, Fe, Mn and Co. It indicates one or more metal elements, or the above-mentioned stabilizer elements. In addition, as an oxide semiconductor, In2SnO5(ZnO) n (n>0 and n is an integer) Materials expressed as follows may also be used.

[0221] When a large amount of hydrogen is contained in the oxide semiconductor film, the hydrogen is bonded to the oxide semiconductor. Some of the elements become donors, generating electrons as carriers. Therefore, the threshold voltage of the oxide semiconductor film is shifted in the negative direction. After that, dehydration treatment (dehydrogenation treatment) is performed to remove hydrogen or moisture from the oxide semiconductor film. It is preferable to remove impurities to achieve high purity so that the impurities are not included as much as possible.

[0222] Note that dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film Oxygen may also decrease at the same time. A process of adding oxygen to an oxide semiconductor film to fill oxygen vacancies increased by oxidation. In this specification and the like, the case where oxygen is supplied to an oxide semiconductor film is preferably described as follows: This may be referred to as oxygen addition treatment, or oxygen in the oxide semiconductor may be increased to a level higher than the stoichiometric composition. When more oxygen is used, it is sometimes referred to as hyperoxygenation treatment.

[0223] In this way, the oxide semiconductor film is dehydrated by dehydration treatment (dehydrogenation treatment). By removing oxygen and filling the oxygen vacancies through oxygen addition treatment, the i-type (intrinsic) or The oxide semiconductor film can be an oxide semiconductor film that is very close to i-type and is substantially i-type (intrinsic). Note that the term "substantially intrinsic" means that there are very few carriers derived from donors in the oxide semiconductor film. (close to zero), and the carrier density is 1×10 17 / cm 3 Below, 1×10 16 / cm 3 below , 1×10 15 / cm 3 Below, 1×10 14 / cm 3 Below, 1×10 13 / cm 3 Below It says something.

[0224] In addition, a transistor including an i-type or substantially i-type oxide semiconductor film can be For example, a transistor using an oxide semiconductor film can be The drain current when the capacitor is off is 1×10 at room temperature (approximately 25°C). -18 Below A, Preferably 1 x 10 -21 A or less, more preferably 1×10 -24 A or below, or 85 1 x 10 at °C -15 A or less, preferably 1×10 -18 A or less, more preferably 1x 10 -21 A or less. Note that the transistor being in the off state is an n-channel In the case of a transistor of this type, this refers to a state in which the gate voltage is sufficiently smaller than the threshold voltage. In general, if the gate voltage is 1V or more, 2V or more, or 3V or more less than the threshold voltage, , the transistor is turned off.

[0225] The structure of the oxide semiconductor film will be described below.

[0226] Oxide semiconductor films are roughly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. The non-single-crystal oxide semiconductor film is a CAAC-OS (C Axis Aligned Crystal Polycrystalline oxide semiconductor film The oxide semiconductor film includes a film, a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, and the like.

[0227] First, the CAAC-OS film will be described.

[0228] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it also includes the case where the angle is between -5° and 5°. "Perpendicular" refers to two straight lines that form an angle of 80° or more and 100° or less. Therefore, the angle may be between 85° and 95°.

[0229] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0230] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts aligned along the c-axis. .

[0231] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed under a tron ​​microscope, the bright field image and diffraction pattern By observing a composite analysis image (also called a high-resolution TEM image), multiple crystalline regions can be identified. On the other hand, high-resolution TEM images also reveal clear boundaries between crystalline parts, i.e., grain boundaries. It is difficult to confirm the grain boundary. It can be said that the -OS film is less susceptible to the decrease in electron mobility caused by the grain boundaries.

[0232] A high-resolution TEM image of the cross section of the CAAC-OS film was observed from a direction roughly parallel to the sample surface (cross section). Surface TEM observation confirmed that metal atoms were arranged in layers in the crystalline region. Each layer of metal atoms is formed on a surface on which the CAAC-OS film is to be formed (also referred to as a surface on which the film is to be formed). The shape reflects the unevenness of the top surface, and is arranged parallel to the surface on which the CAAC-OS film is formed or the top surface. Line up.

[0233] On the other hand, a high-resolution TEM image of the plane of the CAAC-OS film was observed from a direction roughly perpendicular to the sample surface. When observed (plane TEM observation), metal atoms are arranged in triangular or hexagonal shapes in the crystalline part. However, there is no regularity in the arrangement of metal atoms between different crystal regions. Gender is not visible.

[0234] The high-resolution TEM images of the cross section and the plane reveal the crystal structure of the CAAC-OS film. It can be seen that the part has orientation.

[0235] Most of the crystals in the CAAC-OS film are cubic crystals with sides of less than 100 nm. Therefore, the crystal part in the CAAC-OS film has a side length of 10 This also includes cases where the size fits within a cube of less than 5 nm, or less than 3 nm. However, multiple crystals in the CAAC-OS film are connected to form a single large crystal domain. For example, in a high-resolution TEM image of a plane, a region of 2500 nm or more may be formed. In some cases, crystalline regions of 5 μm2 or more or 1000 μm2 or more may be observed.

[0236] X-ray diffraction (XRD) of the CAAC-OS film When structural analysis is performed using this device, for example, CAAC-OS with InGaZnO4 crystals can be seen. In the out-of-plane analysis of the film, the diffraction angle (2θ) peaks around 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis faces the surface on which the film is formed or the upper surface. It can be seen that the direction is roughly vertical.

[0237] On the other hand, the in-p X-rays incident on the CAAC-OS film are perpendicular to the c-axis. In the Lane analysis, a peak may appear around 2θ of 56°. The crystal structure of InGaZnO4 is composed of a single crystal of InGaZnO4. In the case of a nitride semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is the axis (φ axis). When the sample is rotated and analyzed (φ scan), a crystal plane equivalent to the (110) plane is detected. In contrast, in the case of the CAAC-OS film, six peaks are observed, which are assigned to 2θ. Even when the φ is fixed at around 56° and scanned, no clear peak appears.

[0238] From the above, it can be concluded that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, it can be seen that the orientation of the crystals is in the same direction as that confirmed by the high-resolution TEM observation of the cross section mentioned above. Each layer of metal atoms arranged in a layered fashion is parallel to the ab plane of the crystal.

[0239] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization treatment such as a heat treatment. As described above, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is to be formed. Therefore, for example, in the CAAC-OS film, When the shape is changed by etching, the c-axis of the crystal is aligned with the CAAC-OS film. It may not be parallel to the normal vector of the face or top surface.

[0240] Furthermore, the distribution of c-axis oriented crystals in the CAAC-OS film does not need to be uniform. For example, the crystalline part of the CAAC-OS film is grown from the top surface of the CAAC-OS film. Therefore, when the crystal is formed, the region near the top surface has a crystal orientation that is more c-axis oriented than the region near the surface on which the crystal is formed. In addition, the CAAC-OS film containing impurities may have a high percentage of impurities. The crystallinity of the region where the Cr is added changes, and the proportion of the crystal part with c-axis orientation is different. may also be formed.

[0241] In addition, the out-of-plane structure of the CAAC-OS film with InGaZnO4 crystals In the analysis by the NMR method, in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ around 36° is due to the presence of c-axis orientation in part of the CAAC-OS film. The CAAC-OS film contains crystals that do not have crystalline structure. It is preferable that the peak is exhibited at 2θ of about 36° and that the peak is not exhibited at 2θ of about 36°.

[0242] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is made of an element other than the main component, such as silicon or a transition metal element. The elements such as ZnO, which have stronger bonding strength with oxygen than the metal elements constituting the oxide semiconductor film, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Because the diameter (or molecular radius) is large, when the molecule is contained inside the oxide semiconductor film, The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement of the oxide semiconductor film, which may result in a decrease in crystallinity. The pure material may act as a carrier trap or a carrier generation source.

[0243] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films can act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0244] The low impurity concentration and low defect level density (low oxygen vacancies) are called high-purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small number of carrier generation sources, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) such that the threshold voltage is negative. It is also called "marine.") It is rare for it to become pure or substantially pure. An intrinsic oxide semiconductor film has few carrier traps. Transistors using this film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes time for the charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it is fixed. Therefore, a transistor using an oxide semiconductor film with a high density of defect states has unstable electrical characteristics. This may be the case.

[0245] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. There is little gender variation.

[0246] Next, a microcrystalline oxide semiconductor film will be described.

[0247] The microcrystalline oxide semiconductor film has crystalline parts that can be confirmed in high-resolution TEM images. It has regions where crystals are easily visible and regions where it is difficult to identify clear crystals. The crystalline part contained in the body membrane is 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. Often the size is between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor film having nanocrystals (nc), which are microcrystals, nc-OS(nanocrystalline Oxide Semiconductor In addition, the nc-OS film is called a crystalline (r) film when observed by high-resolution TEM. It may be difficult to clearly identify the grain boundaries.

[0248] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analytical method. For example, when X-rays with a beam diameter larger than the crystalline part are used for nc-OS films, When structural analysis was performed using an XRD device, the results were No peaks indicating crystal planes were detected. Electron diffraction (also called selected area electron diffraction) uses an electron beam with a beam diameter (for example, 50 nm or more). ) a halo-like diffraction pattern is observed. In contrast, electron diffraction is performed using an electron beam with a probe diameter close to or smaller than the size of the crystal part. When nanobeam electron diffraction is performed on the nc-OS film, spots are observed. In some cases, a bright area that appears circular (ring-shaped) may be observed. When nanobeam electron diffraction is performed on the OS film, multiple spots are observed within the ring-shaped region. This may be the case.

[0249] The nc-OS film is an oxide semiconductor film with higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0250] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, or a C The AAC-OS film may be a laminate film having two or more kinds of films.

[0251] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0252] (Embodiment 5) In this embodiment, the semiconductor device illustrated in the above embodiment will be described as one mode of the semiconductor device of one embodiment of the present invention. Regarding the configuration example of a power conversion circuit such as an inverter and a converter equipped with the transistor I will explain.

[0253] <DCDCコンバータ> The DC-DC converter 501 shown in FIG. 10(A) uses a chopper circuit as an example. The DC-DC converter 501 is a step-down DC-DC converter. A transistor 503, a control circuit 504, a diode 505, a coil 506, and a capacitor 5 It has 07.

[0254] The DC-DC converter 501 is a circuit that controls the switching of the transistor 503 by the control circuit 504. The DC-DC converter 501 operates by applying a voltage to the input terminals IN1 and IN2. The input voltage V1 is stepped down from the output terminals OUT1 and OUT2 to V2, which is then applied to the load 5V. The transistor 503 of the DC-DC converter 501 has the above The transistors having the multi-gate structure exemplified in the embodiment can be applied. Therefore, the off-current can be reduced. This allows for data to be realized.

[0255] Figure 10(A) shows a step-down converter using a chopper circuit as an example of a non-isolated power conversion circuit. We have also shown a DC / DC converter using a boost type DC / DC converter with a chopper circuit. A transistor equipped in a step-up / step-down DC / DC converter using a converter and chopper circuit The transistor with the multi-gate structure exemplified in the above embodiment can also be applied to the Therefore, the off-state current can be reduced. A DC converter can be realized.

[0256] Next, the DC-DC converter 511 shown in FIG. 10(B) is an example of an isolated power converter. The circuit configuration of a flyback converter is shown in Fig. 5. The DC-DC converter 511 is The capacitor 512, the transistor 513, the control circuit 514, the primary coil, and the secondary coil are included. The transformer 515 includes a diode 516 and a capacitance element 517.

[0257] The DC-DC converter 511 shown in FIG. 10B is a transistor control circuit 514. It operates by the switching operation of the DC-DC converter 513. The input voltage V1 applied to IN1 and IN2 is boosted or output from the output terminals OUT1 and OUT2. can be output to the load 518 as a stepped-down V2. The transistor 513 is a multi-gate transistor as exemplified in the above embodiment. Therefore, the off-state current can be reduced. This allows for a DC-DC converter with reduced power consumption.

[0258] The transistors included in the forward DC-DC converter are also The multi-gate structure transistor exemplified in 1 can be applied.

[0259] <Inverter> The inverter 601 shown in FIG. 11 is, for example, a full-bridge inverter. The inverter 601 includes a transistor 602, a transistor 603, a transistor 604, and a transistor 605. It includes a transistor 605 and a control circuit 606 .

[0260] The inverter 601 shown in FIG. 11 is a control circuit 606 that controls the operation of transistors 602 to 604. It operates by the switching action of 5. DC voltage V applied to input terminals IN1 and IN2 The inverter 1 can output AC voltage V2 from the output terminals OUT1 and OUT2. The transistors 602 to 605 included in the inverter 601 are the same as those shown in the above embodiment. A multi-gate transistor can be applied. Therefore, the off-state current can be reduced. Therefore, the inverter can consume less power.

[0261] The transistors exemplified in the above embodiments are applied to the circuits exemplified in FIGS. 10 and 11. In this case, the source electrode is electrically connected to the low potential side and the drain electrode is electrically connected to the high potential side. Furthermore, the potential of the first gate electrode (and the third gate electrode) is controlled by a control circuit. The second gate electrode is controlled to have a potential lower than that applied to the source electrode, as in the above example. The potential shown may be input via wiring (not shown).

[0262] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0263] (Embodiment 6) In this embodiment, the semiconductor device illustrated in the above embodiment will be described as one mode of the semiconductor device of one embodiment of the present invention. A configuration example of a power supply circuit including such a transistor will be described.

[0264] FIG. 12 illustrates an example of the configuration of a power supply circuit 400 according to one embodiment of the present invention. The power supply circuit 400 shown includes a control circuit 413, a power switch 401, and a power switch 402. 02 and a voltage adjusting unit 403.

[0265] The power supply circuit 400 is supplied with a voltage from a power supply 416, and the power switch 401 and The power switch 402 has a function of controlling the input of the voltage to the voltage adjusting unit 403. do.

[0266] When the voltage output from the power supply 416 is an AC voltage, as shown in FIG. a power switch 401 that controls the input of a first potential to a voltage adjusting unit 403; The power supply circuit 400 is provided with a power switch 402 that controls the input of the second potential to the power supply 3. When the voltage output from the power supply 416 is a DC voltage, as shown in FIG. a power switch 401 for controlling the input of a first potential to a voltage adjusting unit 403; The power supply circuit 400 may be provided with a power switch 402 that controls the input of two potentials. Alternatively, the second potential is set to the ground potential, and a power supply that controls the input of the second potential to the voltage adjustment unit 403 is used. The power switch 402 is not provided, and the power switch 402 controls the input of the first potential to the voltage adjusting unit 403. The switch 401 may be provided in the power supply circuit 400 .

[0267] In one aspect of the present invention, the power switches 401 and 402 are For example, the transistors in the above embodiments are used. The transistors exemplified in can be used.

[0268] The power switches 401 and 402 are made of an oxide having the above crystal structure. By using a multi-gate transistor with a semiconductor film, a high output current can be achieved. It is possible to allow the material to flow and increase the pressure resistance.

[0269] A field effect transistor using the above semiconductor material as a film in which a channel region is formed is By using it for the power switch 401 or the power switch 402, silicon carbide or gallium nitride can be In the field effect transistor using the above as an active layer, The off current of the switch 402 can be reduced, thereby reducing the Power loss can be kept small.

[0270] The voltage regulator 403 is connected to the power supply 4 via the power switch 401 and the power switch 402. When a voltage is input from 16, it has the function of adjusting the voltage. The voltage adjustment in the unit 403 means converting AC voltage into DC voltage, changing the voltage level, and smoothing the voltage level.

[0271] The voltage adjusted by the voltage adjusting unit 403 is applied to the load 417 and the control circuit 413. do.

[0272] In addition, the power supply circuit 400 shown in FIG. 12 includes a power storage device 404, an auxiliary power supply 405, and a voltage A generating circuit 406, transistors 407 to 410, a capacitor 414, The capacitor 415 is also included.

[0273] The power storage device 404 has a function of temporarily storing the power provided by the voltage adjustment unit 403. Specifically, the power storage device 404 uses the voltage provided by the voltage adjustment unit 403 to store power. The device has a storage unit such as a capacitor or secondary battery that can store electricity.

[0274] The auxiliary power supply 405 controls the power storage device 404 when the power that can be output from the power storage device 404 is insufficient. The auxiliary power supply 405 has a function of supplementing the power required for the operation of the circuit 413. etc. can be used.

[0275] The voltage generating circuit 406 uses the voltage output from the power storage device 404 or the auxiliary power supply 405. for controlling the switching of the power switch 401 and the power switch 402. Specifically, the voltage generating circuit 406 has a function of generating a voltage. and a function of generating a voltage to turn on power switch 402; 401 and the power switch 402.

[0276] The radio signal input circuit 411 is configured to switch transistors 407 to 410. The power switch 401 and the power switch 402 are controlled in accordance with the timing.

[0277] Specifically, the wireless signal input circuit 411 receives the power from the power switch 401 and and a command superimposed on the radio signal for controlling the operating state of the power switch 402 is transmitted as an electric signal. an input section that converts the electrical signal into a signal from a transistor 407; 4. Generate a signal to control the switching of transistor 410 according to the above command. and a signal processing unit.

[0278] The transistors 407 to 410 are generated in the radio signal input circuit 411. Specifically, the transistor 408 and the transistor When the switch 410 is on, the voltage generated by the voltage generating circuit 406 is applied to the power switch 401. The voltage for turning on the power switch 402 is The voltage is applied to the switch 402. Also, the transistor 408 and the transistor 410 are turned off. When the power switch 401 and the power switch 402 are The state in which the voltage for turning on the power switch 402 is applied is maintained. When the transistor 407 and the transistor 409 are on, the voltage generating circuit 4 06 for turning off the power switch 401 and the power switch 402. A voltage is applied to power switch 401 and power switch 402. When power switch 401 and transistor 410 are off, The switch 402 is provided with a power supply for turning off the power switch 401 and the power switch 402. The state in which the voltage is applied is maintained.

[0279] In one aspect of the present invention, the voltage is applied to power switch 401 and power switch 402. To maintain the state given to transistor 402, transistors 407 to 410 In this case, a transistor with extremely low off-state current is used. In this case, a voltage for determining the operating state of the power switch 401 and the power switch 402 is Even if the generation of pressure is stopped, the operation state of the power switch 401 and the power switch 402 is maintained. Therefore, the power consumption in the voltage generating circuit 406 can be reduced, and The power consumption in the power supply circuit 400 can be kept low.

[0280] Note that the transistors 407 to 410 are provided with back gates. By applying a voltage to the transistors 407 to 410, the threshold voltages of the transistors 407 to 410 are The pressure may be controlled.

[0281] A wide-gap semiconductor with a band gap more than twice that of silicon is used as the active layer. Since the off-state current of the transistors is extremely small, the transistors 407 to 41 The wide-gap semiconductor is preferably an oxide semiconductor. etc. can be used.

[0282] In addition, oxide semiconductors such as In-Ga-Zn oxides and In-Sn-Zn oxides Unlike silicon carbide or gallium nitride, these are electrically deposited by sputtering or wet methods. It is possible to fabricate transistors with excellent electrical properties, and it has the advantage of being suitable for mass production. Moreover, unlike silicon carbide or gallium nitride, the oxide semiconductor In-G Since a-Zn oxide can be formed into a film even at room temperature, it can be formed into a film on a glass substrate or on a silicon substrate. It is possible to fabricate transistors with excellent electrical characteristics on integrated circuits using this technology. It is also possible to accommodate larger substrates.

[0283] The capacitor 414 is connected to the power supply 411 when the transistor 407 and the transistor 408 are turned off. The capacitor element 4 has a function of holding the voltage applied to the power switch 401. 15 is a power switch when transistor 409 and transistor 410 are off. The capacitors 414 and 415 have a function of holding the voltage applied to the capacitor 402. One of the pair of electrodes is connected to a wireless signal input circuit 411. As shown in FIG. The capacitors 414 and 415 do not necessarily have to be provided.

[0284] When the power switch 401 and the power switch 402 are on, the power supply 41 6 to the voltage adjusting unit 403. Electricity is stored in 404 .

[0285] When the power switch 401 and the power switch 402 are off, the power supply 416 Therefore, the supply of power to the power storage device 404 is stopped. However, in one embodiment of the present invention, as described above, the power storage device 404 or the auxiliary power The power stored in the power source 405 can be used to operate the control circuit 413. That is, in the power supply circuit 400 according to one aspect of the present invention, the power switch by the control circuit 413 While controlling the operating states of the switch 401 and the power switch 402, The supply of voltage to the voltage adjusting unit 403 can be stopped. By doing so, when no voltage is supplied to the load 417, the capacity of the voltage adjusting unit 403 is This can prevent power consumption due to charging and discharging of a large amount of Power consumption can be kept low.

[0286] The transistors exemplified in the above embodiments are applied to the circuits exemplified in FIGS. 12 and 13. In this case, the source electrode (first electrode) is on the low potential side and the drain electrode (second electrode) is on the high potential side. Furthermore, the first gate electrode (and and the third gate electrode), and the second gate electrode is controlled to have a potential equal to that given to the source electrode. A potential lower than the potential Vcc can be input via a wiring (not shown).

[0287] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0288] (Embodiment 7) In this embodiment, a buffer circuit including a transistor according to one embodiment of the present invention will be described. explain.

[0289] The transistor according to one aspect of the present invention is a barrier for supplying a voltage to the gate of a power switch. The present invention can be applied to a buffer circuit.

[0290] FIG. 14A shows a circuit including a buffer circuit 701 of one embodiment of the present invention.

[0291] The buffer circuit 701 is electrically connected to a drive circuit 702 and a power switch 721. The buffer circuit 701 receives a positive potential from a power supply 715 and a negative potential from a power supply 716. The potentials are given respectively.

[0292] The drive circuit 702 outputs a signal for controlling the on / off operation of the power switch 721. The signal output from the driver circuit 702 is input via the buffer circuit 701. This is input to the gate of the power switch 721 .

[0293] The power switch 721 can be formed using any of the transistors described in the above embodiments. In addition, power trains using semiconductors such as silicon, silicon carbide, and gallium nitride are Hereinafter, it is assumed that the power switch 721 is an n-channel transistor. Although the case where the transistor is a p-channel transistor will be described, the transistor may also be a p-channel transistor.

[0294] The buffer circuit 701 includes a transistor 711, a transistor 712, and an inverter 7 It has 13.

[0295] The transistor 711 has one of its source and drain connected to the high potential output terminal of the power supply 715. The other of the source and drain is electrically connected to the source or drain of the transistor 712. The gate of the power switch 721 is electrically connected to one of the drains of the inverter 722. The transistor 712 is electrically connected to the output terminal of the transistor 713. The other input is electrically connected to the low potential output terminal of the power supply 716. The portion is electrically connected to the input terminal of the inverter 713 and the gate of the transistor 712. can be.

[0296] A high-level potential or a low-level potential is output from the driver circuit 702. The low level potential is a potential that turns on at least the transistor 712. The potential is at least a potential that puts the transistor 712 into a state.

[0297] When a high-level potential is input from the driver circuit 702, the transistor A low-level potential is input to the gate of the transistor 711, and the transistor 711 is turned off. At the same time, a high-level potential is input to the gate of the transistor 712, and the transistor 7 12 is turned on. Therefore, the gate of the power switch 721 is supplied with a current from the power supply 716. A negative potential is input, and the power switch 721 is turned off.

[0298] On the other hand, when a low-level potential is input from the driver circuit 702, A high-level potential is input to the gate of the transistor 711, and the transistor 711 is turned on. At the same time, a low-level potential is input to the gate of the transistor 712, and the transistor Therefore, the gate of the power switch 721 is connected to the power supply 71. A positive potential is input from 5, and the power switch 721 is turned on.

[0299] In this way, the driving circuit 702 outputs a pulse signal that takes a high level potential or a low level potential. By outputting a signal, it is possible to control the on / off of the power switch 721. The control method for the power switch 721 is pulse width modulation (PWM). Width Modulation (PFM) and Pulse Frequency Modulation (PFM) Control methods such as Frequency Modulation (FFM) can be used. .

[0300] Here, the transistors 711 and 712 are the same as those described in the above embodiment. Therefore, a multi-gate transistor can be applied to the power switch 7. 21 can be driven at a high potential. Furthermore, stable operation at high temperatures is possible. Therefore, it is possible to stably control the operation of the power switch even in high temperature environments. It can also be placed near the power switch 721 that generates a lot of heat. The switching operation of transistors 711 and 712 allows a large output current to flow. This reduces power consumption and enables high-speed operation. It can be a buffer that can

[0301] In addition, in FIG. 14, a power supply 716 that outputs a negative potential is provided. The other of the source and drain of the transistor 712 is connected to a ground potential (or a reference potential) ) may be input.

[0302] In addition, the inverter 713 is electrically connected to the transistor 712 side instead of the transistor 711 side. In this case, in the above operation, the buffer circuit 701 An inverted potential is output.

[0303] Here, instead of the power switch 721, a bipolar power transistor or an insulating Insulated Gate Bipolar Transistor (IGBT) ar Transistor), thyristor, gate turn-off thyristor (GTO), Triac or MESFET (Metal Semiconductor Field Effect Transistor) High withstand voltage compared to silicon devices such as diode effect transistors A pressure device may also be used.

[0304] At this time, the output signal of the driving circuit 702 is not limited to the above, and may be used to control the driving of each element. Any suitable signal may be used to achieve this.

[0305] FIG. 14B shows a case where an IGBT 722 is provided instead of the power switch 721. This shows that.

[0306] When the transistors exemplified in the above embodiments are applied to the circuit illustrated in FIG. The source electrode (first electrode) is on the low potential side, and the drain electrode (second electrode) is on the high potential side. Furthermore, the first gate electrode (and the third gate The potential of the second gate electrode is controlled, and a potential lower than that applied to the source electrode is applied to the second gate electrode. The potential may be input through wiring (not shown).

[0307] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0308] (Embodiment 8) In this embodiment, a transistor including an oxide semiconductor according to one embodiment of the present invention is used. It is possible to retain memory contents even when power is not supplied, and there is no limit to the number of times it can be written. An example of a semiconductor device (memory device) without a memory element will be described with reference to the drawings.

[0309] FIG. 15 shows a circuit diagram of the semiconductor device.

[0310] The semiconductor device shown in FIG. 15 includes a transistor 3200 using a first semiconductor material and a second The semiconductor device includes a transistor 3300 and a capacitor 3400 made of a semiconductor material. The transistor 3300 may be any of the transistors described in the previous embodiment. can be done.

[0311] Here, the first semiconductor material and the second semiconductor material are materials having different forbidden band widths. For example, the first semiconductor material may be a semiconductor material other than an oxide semiconductor (silicon, ruthenium, silicon germanium, silicon carbide, or gallium arsenide, etc.), The second semiconductor material can be the oxide semiconductor described in the above embodiment. Transistors that use materials other than semiconductors, such as single-crystal silicon, are easy to operate at high speeds. On the other hand, a transistor including an oxide semiconductor has a low off-state current.

[0312] The transistor 3300 has a channel region formed in a semiconductor film containing an oxide semiconductor. The transistor 3300 has a small off-state current, so that it can be used. This allows the stored contents to be retained for a long period of time. It is possible to make a storage device that does not require a refresh operation or that requires an extremely low frequency of refresh operations. This makes it possible to sufficiently reduce power consumption.

[0313] In FIG. 15, a first wiring 3001 is electrically connected to a source electrode of a transistor 3200. The second wiring 3002 is electrically connected to the drain electrode of the transistor 3200. The third wiring 3003 is connected to the source electrode or drain electrode of the transistor 3300. The fourth wiring 3004 is electrically connected to one of the gate electrodes of the transistor 3300. The gate electrode of the transistor 3200 and the The other of the source electrode and the drain electrode of the transistor 3300 is connected to the electrode of the capacitor 3400. The fifth wiring 3005 is electrically connected to the other electrode of the capacitor 3400. are actively connected.

[0314] In the semiconductor device shown in FIG. 15, the potential of the gate electrode of the transistor 3200 can be maintained. By utilizing this feature, it is possible to write, store, and read information as follows.

[0315] Writing and holding of data will be described. First, the potential of the fourth wiring 3004 is set to The transistor 3300 is turned on by applying a potential to the transistor 3300. As a result, the potential of the third wiring 3003 is applied to the gate electrode of the transistor 3200 and and the capacitor element 3400. That is, the gate electrode of the transistor 3200 is A predetermined charge is applied (write). Here, two different potential levels are applied. Either a low-level charge or a high-level charge is applied. After that, the potential of the fourth wiring 3004 is set to a potential at which the transistor 3300 is turned off. By turning the transistor 3300 to the off state, the The charge applied to the gate electrode is retained (retention).

[0316] Since the off-state current of the transistor 3300 is extremely small, the gate The charge on the electrode is maintained for a long period of time.

[0317] Next, reading of information will be described. In this state, when an appropriate potential (read potential) is applied to the fifth wiring 3005, the transistor Depending on the amount of charge held in the gate electrode of the transistor 3200, the second wiring 3002 has different potentials. Generally, if the transistor 3200 is an n-channel type, the transistor 320 The apparent threshold voltage Vth_ when a high level charge is applied to the gate electrode of 0 H is the voltage when a low level charge is applied to the gate electrode of transistor 3200. This is because the apparent threshold voltage is lower than the apparent threshold voltage Vth_L. The potential of the fifth wiring 3005 required to turn on the transistor 3200 is Therefore, the potential of the fifth wiring 3005 is set between Vth_H and Vth_L. By setting the potential to V0, the charge applied to the gate electrode of the transistor 3200 can be determined. For example, in writing, when a high-level charge is applied, if the potential of the fifth wiring 3005 becomes V0 (> Vth_H), the transistor 3200 is in the " on state". When a low-level charge is applied, even if the potential of the fifth wiring 3005 becomes V0 (< Vth_L), the transistor 3200 remains in the "off state". Therefore, by discriminating the potential of the second wiring 3002, the stored information can be read out.

[0318] When the memory cells are arranged and used in an array, it is necessary to be able to read out only the information of the desired memory cell. If the information is not read out in this way, a potential such that the transistor 3200 is in the "off state" regardless of the state of the gate electrode, that is, a potential smaller than Vth_H, may be applied to the fifth wiring 3005. Or, a potential such that the transistor 3200 is in the "on state" regardless of the state of the gate electrode, that is, a potential larger than Vth_L, may be applied to the fifth wiring 3005.

[0319] In the semiconductor device shown in this embodiment, by applying a transistor with an extremely small off-current using an oxide semiconductor film as the semiconductor film, it is possible to hold the stored content for an extremely long time. That is, the refresh operation becomes unnecessary, or the frequency of the refresh operation can be made extremely low, so that the power consumption can be sufficiently reduced. Also, even when there is no power supply (however, it is desirable that the potential is fixed), it is possible to hold the stored content for a long time.

[0320] In addition, the semiconductor device described in this embodiment does not require a high voltage for writing data. There is no problem of element degradation. For example, unlike conventional non-volatile memory, This eliminates the need to inject electrons into the floating gate or extract electrons from the floating gate. Therefore, problems such as deterioration of the gate insulating film are unlikely to occur. The device does not have the limit on the number of times it can be rewritten, which is a problem with conventional non-volatile memory, and Furthermore, the on / off state of the transistor determines the amount of information Since writing is performed, high speed operation can be easily achieved.

[0321] When the transistors exemplified in the above embodiments are applied to the circuit illustrated in FIG. The source electrode (first electrode) is on the low potential side, and the drain electrode (second electrode) is on the high potential side. Furthermore, the first gate electrode (and the third gate electrode) are electrically connected by a control circuit or the like. The potential of the second gate electrode is controlled to be lower than the potential applied to the source electrode. A low potential may be input via wiring (not shown).

[0322] This embodiment may be combined as appropriate with other embodiments or examples described in this specification. This can be implemented.

[0323] (Embodiment 9) In this embodiment, a structural example of a display panel according to one embodiment of the present invention will be described.

[0324] <Configuration example> FIG. 16A is a top view of a display panel of one embodiment of the present invention, and FIG. 16B is a top view of a display panel of one embodiment of the present invention. A pixel circuit that can be used when a liquid crystal element is applied to a pixel of a display panel according to one embodiment of the present invention. 16C is a circuit diagram illustrating a display panel according to one embodiment of the present invention. A circuit for explaining a pixel circuit that can be used when an organic EL element is applied to a pixel. Figure.

[0325] The transistors disposed in the pixel portion can be formed according to the above-described embodiment modes. In addition, since the transistor can be easily made into an n-channel type, the n-channel transistor in the driver circuit can be easily made into an n-channel type. A part of the driver circuit can be configured with a panel-type transistor, and the transistors in the pixel section can be In this way, the transistor shown in the above embodiment mode is formed in the pixel portion and the driver circuit. By using the capacitor, a highly reliable display device can be provided.

[0326] An example of a block diagram of an active matrix display device is shown in FIG. On this substrate 900, a pixel portion 901, a first scanning line driving circuit 902, a second scanning line driving circuit 903, and a The pixel portion 901 has a signal line driver circuit 903 and a signal line driver circuit 904. A plurality of scanning lines are arranged extending from a first scanning line driving circuit 902 and a second scanning line driving circuit 904. The scanning lines are arranged extending from the second scanning line driving circuit 903. In the area, pixels each having a display element are arranged in a matrix. The substrate 900 of the device is a connection board such as an FPC (Flexible Printed Circuit). It is connected to a timing control circuit (also called a controller or control IC) via a connection. do.

[0327] In FIG. 16A, a first scanning line driver circuit 902, a second scanning line driver circuit 903, a signal The line driver circuit 904 is formed on the same substrate 900 as the pixel portion 901. The number of components such as drive circuits to be provided is reduced, which contributes to cost reduction. 900 If a drive circuit is provided externally, the wiring must be extended, and the number of connections between the wiring increases. When a driver circuit is provided on the same substrate 900, the number of connections between the wirings can be reduced. This can improve reliability or yield.

[0328] <LCD panel> An example of the circuit configuration of a pixel is shown in Figure 16(B). 1 shows a pixel circuit that can be applied to the pixel of FIG.

[0329] This pixel circuit can be applied to a configuration in which one pixel has a plurality of pixel electrodes. The pixel electrodes are connected to different transistors, and each transistor can be driven by a different gate signal. This allows the individual pixel voltages of the multi-domain designed pixels to be The signals applied to the poles can be controlled independently.

[0330] The gate wiring 912 of the transistor 916 and the gate wiring 913 of the transistor 917 are separated so that different gate signals can be applied. The source or drain electrode 914, which functions as a 17. Transistors 916 and 917 are used in common in the above embodiment. The transistors described in the following embodiments can be used as appropriate. A display panel can be provided.

[0331] A first pixel electrode electrically connected to the transistor 916 and a second pixel electrode electrically connected to the transistor 917 The shape of the second pixel electrode that is electrically connected to the first pixel electrode and the second pixel electrode will be described. The first pixel electrode has a V-shaped shape and is separated by a slit. The second pixel electrode is formed so as to surround the outside of the first pixel electrode.

[0332] The gate electrode of the transistor 916 is connected to the gate wiring 912, and the gate electrode of the transistor 917 is connected to the gate wiring 912. The gate electrode of the gate electrode 912 is connected to the gate wiring 913. 3, different gate signals are applied to transistors 916 and 917. By varying the voltage, the orientation of the liquid crystal can be controlled.

[0333] Also, a capacitance wiring 910, a gate insulating film functioning as a dielectric, and a first pixel electrode or A storage capacitor may be formed by a capacitor electrode electrically connected to the second pixel electrode.

[0334] The multi-domain structure has a first liquid crystal element 918 and a second liquid crystal element 919 in one pixel. The first liquid crystal element 918 is composed of a first pixel electrode, a counter electrode, and a liquid crystal layer therebetween. The second liquid crystal element 919 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer therebetween.

[0335] Note that the pixel circuit shown in FIG. 16(B) is not limited to this. For example, The pixel shown may be newly equipped with a switch, a resistor, a capacitor, a transistor, a sensor, or a logic circuit. etc. may be added.

[0336] <Organic EL panel> Another example of the circuit configuration of a pixel is shown in FIG. 16(C). 1 shows the pixel structure of the display panel.

[0337] In an organic EL element, when a voltage is applied to the light-emitting element, electrons are emitted from one of the pair of electrodes. and holes are injected from the other side into the layer containing the light-emitting organic compound, causing a current to flow. The electrons and holes recombine to form an excited state in the light-emitting organic compound, When the excited state returns to the ground state, light is emitted. The optical element is called a current-excited light-emitting element.

[0338] FIG. 16C is a diagram showing an example of an applicable pixel circuit. An example in which a transistor is used in a pixel is shown. The pixel circuit is driven by digital time gray scale. can be applied.

[0339] Regarding the configuration of applicable pixel circuits and pixel operation when digital time gray scale driving is applied, and explain.

[0340] The pixel 920 includes a switching transistor 921, a driving transistor 922, and a light emitting element. The switching transistor 921 has a gate element 924 and a capacitor element 923. The gate electrode is connected to the scanning line 926, and the first electrode (one of the source electrode and the drain electrode) is The second electrode (the other of the source electrode and the drain electrode) is connected to the signal line 925. The driving transistor 922 is connected to the gate electrode of the driving transistor 922. The first electrode is connected to a power supply line 927 via a capacitor element 923, and the second electrode is connected to the power supply line 927. The second electrode is connected to the first electrode (pixel electrode) of the light emitting element 924. The second electrode of 4 corresponds to the common electrode 928. The common electrode 928 is formed on the same substrate. It is electrically connected to the common potential line.

[0341] The switching transistor 921 and the driving transistor 922 are the same as those in the above embodiment. This allows for the development of highly reliable organic EL devices. A display panel can be provided.

[0342] The potential of the second electrode (common electrode 928) of the light-emitting element 924 is set to a low power supply potential. The low power supply potential is a potential lower than the high power supply potential set to the power supply line 927, for example, GN The low power supply potential can be set to D, 0 V, or the like. The high power supply potential and the low power supply potential are set so that the potential difference is equal to or greater than the light emitting element 92 By applying a voltage to the light emitting element 924, a current flows through the light emitting element 924, causing it to emit light. The forward voltage of 24 refers to the voltage required to achieve the desired brightness, and is at least Includes threshold voltage.

[0343] The capacitor 923 is substituted for the gate capacitance of the driving transistor 922. The gate capacitance of the driving transistor 922 can be omitted. A capacitance may be formed between the

[0344] Next, a description will be given of the signal input to the driving transistor 922. Voltage input voltage driving In this method, the driving transistor 922 is in two states: fully on and fully off. A video signal that becomes a pixel value is input to the driving transistor 922. In order to operate the transistor 922 in the subthreshold region, a voltage higher than the voltage of the power supply line 927 is set. A high voltage is applied to the gate electrode of the driving transistor 922. A voltage equal to or greater than the sum of the power supply voltage and the threshold voltage Vth of the driving transistor 922 is applied. do.

[0345] When analog gradation driving is performed, the gate electrode of the driving transistor 922 is connected to the light emitting element 92 4 plus the threshold voltage Vth of the driving transistor 922. It should be noted that a video signal is input so that the driving transistor 922 operates in the saturation region. The driving transistor 922 is operated in the saturation region. In order to do this, the potential of the power supply line 927 is set higher than the gate potential of the driving transistor 922. By converting the video signal into an analog signal, a current corresponding to the video signal is supplied to the light emitting element 924. It is possible to perform analog gradation driving.

[0346] The configuration of the pixel circuit is not limited to the pixel configuration shown in FIG. 6(C) in the pixel circuit, a switch, a resistor, a capacitor, a sensor, a transistor or a logic A logic circuit or the like may be added.

[0347] When the transistors exemplified in the above embodiments are applied to the circuit illustrated in FIG. The source electrode (first electrode) is on the low potential side, and the drain electrode (second electrode) is on the high potential side. Furthermore, the first gate electrode (and the third gate electrode) are electrically connected by a control circuit or the like. The potential of the second gate electrode is controlled to be lower than the potential applied to the source electrode. A low potential may be input via wiring (not shown).

[0348] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0349] (Embodiment 10) A semiconductor device according to one aspect of the present invention (including a power conversion circuit, a power supply circuit, a buffer circuit, etc.) ) is suitable for controlling the power supply to devices, especially devices that require large amounts of power. For example, the drive of a motor or the like, which is controlled by power, can be used. It can be suitably used in devices that have a heating or cooling unit or devices that control heating or cooling using electricity. can.

[0350] Examples of electronic devices that can use the semiconductor device according to one embodiment of the present invention include display devices, panel displays, and the like. personal computers, image playback devices equipped with recording media (typically DVD: Digital A disc that can play recording media such as Versatile Disc and display the images. In addition, there are also other devices using the semiconductor device according to one embodiment of the present invention. Examples of electronic devices that can be used include mobile phones, portable game consoles, personal digital assistants, and Books, video cameras, digital still cameras, goggle-type displays (head-mounted displays), navigation systems, sound reproduction devices (car audio, digital audio audio players, copiers, fax machines, printers, printer-combined machines, cash Automatic teller machines (ATMs), vending machines, microwave ovens and other high-frequency heating devices, electric rice cookers Electric washing machines, fans, hair dryers, air conditioning equipment such as air conditioners, elevators elevators and escalators, electric refrigerators, electric freezers, electric refrigerator-freezers, electric mixers In addition, the semiconductor device according to one aspect of the present invention can be used in various applications, such as a power tool, a semiconductor testing device, and the like. The device may be used in a moving body that is propelled by an electric motor using electric power. includes motor vehicles (motorcycles, ordinary vehicles with three or more wheels), and motor vehicles including electrically assisted bicycles. This category includes bicycles, aircraft, ships, and railway vehicles. , the above-mentioned mobile objects, steel, semiconductor equipment, civil engineering, architecture, construction, and other industrial fields. It can also be used to control the drive of industrial robots.

[0351] A specific example of an electronic device is shown in FIG.

[0352] FIG. 17A shows a microwave oven 1400, which includes a housing 1401 and a heater for placing an object to be processed. The processing chamber 1402, the display unit 1403, the input device 1404 such as an operation panel, and the housing 140 Electromagnetic waves generated from a high frequency generator installed inside 1 are supplied to the processing chamber 1402. and an irradiation unit 1405 for irradiating the light.

[0353] A semiconductor device according to an aspect of the present invention is, for example, a semiconductor device for controlling the supply of power to a high frequency generator. It can be used in power supply circuits.

[0354] FIG. 17B shows a washing machine 1410, which includes a housing 1411 and a An opening / closing part 1412 for opening and closing the entrance of the washing tub, an input device 1413 such as an operation panel, and a washing and a water inlet 1414 for the washing tank.

[0355] The semiconductor device according to one aspect of the present invention is, for example, a device for supplying power to a motor that controls the rotation of a washing tub. It can be used in circuits that control the supply of force.

[0356] FIG. 17(C) is an example of an electric refrigerator-freezer. The electronic device shown in FIG. 17(C) is a housing 1451, a refrigerator compartment door 1452, and a freezer compartment door 1453.

[0357] The electronic device shown in FIG. 17C includes a housing 1451 inside which a semiconductor device according to one embodiment of the present invention is mounted. By adopting the above configuration, for example, the temperature inside the housing 1451 can be adjusted or the opening and closing of the refrigerator compartment door 1452 and the freezer compartment door 1453. The supply of power supply voltage to the device can be controlled.

[0358] FIG. 17(D) is an example of an air conditioner. The electronic device shown in FIG. 17(D) is The air conditioner is composed of an indoor unit 1460 and an outdoor unit 1464.

[0359] The indoor unit 1460 includes a housing 1461 and an air outlet 1462 .

[0360] The electronic device shown in FIG. 17D includes a housing 1461 containing a semiconductor device according to one embodiment of the present invention. With the above configuration, for example, the The power supply voltage for the semiconductor device in the housing 1461 may be adjusted depending on the temperature and humidity in the room. The supply of can be controlled.

[0361] Furthermore, the semiconductor device of one embodiment of the present invention is a semiconductor device for controlling the rotation of a fan included in the outdoor unit 1464. It can also be used in circuits that control the supply of power to motors.

[0362] In addition, in Figure 17(D), a separate type air conditioner consisting of an indoor unit and an outdoor unit is shown. The example shows an air conditioner that has both the indoor and outdoor functions in one housing. It may also be a conditioner.

[0363] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0364] (Embodiment 11) In this embodiment, structural examples of electronic devices to which a semiconductor device of one embodiment of the present invention is applied will be described. I will explain.

[0365] FIG. 18 is an external view of an electronic device including a semiconductor device of one embodiment of the present invention.

[0366] Examples of electronic devices include television sets (televisions or television receivers) (also called "computer monitors"), cameras such as digital cameras and digital video cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), Examples include large game machines such as small game machines, mobile information terminals, sound reproduction devices, and pachinko machines. can be.

[0367] FIG. 18A shows a portable information terminal, which includes a main body 1001, a housing 1002, a display unit 1003, and a display unit 1004. The display unit 1003a, 1003b, etc. The display unit 1003b is a touch panel. By touching the keyboard button 1004 displayed on the display unit 1003b, Of course, the display unit 1003a can be configured as a touch panel. The transistor described in the above embodiment may be used as a switching element in a liquid crystal panel. By fabricating a display panel or an organic light-emitting panel and applying it to the display parts 1003a and 1003b, This makes it possible to provide a highly reliable portable information terminal.

[0368] The portable information terminal shown in FIG. 18(A) displays various information (still images, moving images, text images, etc.) Functions that display calendars, dates, or times on the display, functions that display Functions for manipulating or editing displayed information, processing by various software (programs) In addition, external connection terminals can be provided on the back and sides of the housing. It may also be configured to include a connector (such as an earphone jack or USB terminal), a recording medium insertion section, etc.

[0369] The portable information terminal shown in FIG. 18(A) is configured to be capable of transmitting and receiving information wirelessly. You can also purchase and download desired book data from an electronic book server wirelessly. It is also possible to configure it so that it is downloaded.

[0370] FIG. 18(B) shows a portable music player, and the main body 1021 has a display unit 1023 and earphones. a fixing part 1022 for attaching to a speaker, an operation button 1024, an external memory slot, The transistor shown in the above embodiment is a switching transistor. By manufacturing a liquid crystal panel or an organic light-emitting panel as an element and applying it to the display unit 1023, This makes it a more reliable portable music player.

[0371] Furthermore, the portable music player shown in FIG. 18(B) is equipped with an antenna, a microphone function, and a wireless function. If you carry it and connect it to your mobile phone, you can enjoy wireless hands-free driving while driving a car. Conversations in Lee are also possible.

[0372] FIG. 18C shows a mobile phone, which is composed of two housings, a housing 1030 and a housing 1031. The housing 1031 is provided with a display panel 1032, a speaker 1033, a microphone, and the like. a phone 1034, a pointing device 1036, a camera lens 1037, an external connection terminal The housing 1030 also includes a solar cell for charging the mobile phone. The device is equipped with a cell 1040, an external memory slot 1041, and the like. 031. The transistor described in the above embodiment is built in the display panel 10 32, a highly reliable mobile phone can be obtained.

[0373] The display panel 1032 is equipped with a touch panel, and the image displayed on the display panel 1032 is shown in FIG. The multiple operation keys 1035 are shown by dotted lines. A boost circuit is also implemented to boost the input voltage to the voltage required for each circuit.

[0374] For example, the power transistor used in a power supply circuit such as a booster circuit may be the same as that of the above embodiment. The transistors described can be applied.

[0375] The display direction of the display panel 1032 changes appropriately depending on the usage mode. The camera lens 1037 is located on the same surface as the lens 1032, so video calls are possible. The speaker 1033 and the microphone 1034 are not limited to voice calls, but also to video calls. Furthermore, the housing 1030 and the housing 1031 can be slid apart. As shown in Figure 18(C), it can be folded from the unfolded state to the overlapped state, making it easy to carry. Suitable miniaturization is possible.

[0376] The external connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 1041, it is possible to store and transfer a larger amount of data. Cut.

[0377] In addition to the above functions, it also has infrared communication functions, TV reception functions, etc. Good too.

[0378] FIG. 18(D) shows an example of a television device. The television device 1050 is A display unit 1053 is built into the housing 1051. The display unit 1053 displays an image. In addition, the CPU is built into the stand 1055 that supports the housing 1051. The transistor described in the above embodiment is incorporated in the display portion 1053 and the CPU. By applying this, the television device 1050 can be made highly reliable.

[0379] The television device 1050 can be operated using an operation switch provided on the housing 1051 or a separate remote control. This can be done by a remote controller. A display unit for displaying information output from the machine may be provided.

[0380] The television device 1050 is configured to include a receiver, a modem, and the like. It is possible to receive general television broadcasts, and also to receive wired or wireless signals via a modem. By connecting to a communication network, it can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between a sender and a receiver, or between receivers). .

[0381] The television device 1050 also includes an external connection terminal 1054 and a storage medium playback / recording unit 1055. 052, and an external memory slot. The external connection terminal 1054 is for connecting a USB cable or the like. It can be connected to any type of cable, enabling data communication with a personal computer, etc. In the storage medium playback / recording unit 1052, a disk-shaped recording medium is inserted and It is possible to read the stored data and write it to the recording medium. Images and videos stored in the external memory 1056 inserted in the reslot It is also possible to display it on the display unit 1053.

[0382] In addition, when the off-leak current of the transistor described in the above embodiment is extremely small, By applying this transistor to the external memory 1056 or the CPU, power consumption can be reduced sufficiently. This can result in a highly reliable television device 1050 with reduced power consumption.

[0383] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

Claims

[Claim 1] a first electrode; a first insulating film on the first electrode; an oxide semiconductor film on the first insulating film; a second insulating film on the oxide semiconductor film; a second electrode on the second insulating film; a third electrode on the second insulating film, each of the first electrode, the second electrode, and the third electrode has a region overlapping with the oxide semiconductor film; the second electrode does not overlap with the first electrode in a region where the second electrode overlaps with the oxide semiconductor film; the second electrode is electrically connected to the third electrode in a region that does not overlap with the oxide semiconductor film; the second electrode is separated from the third electrode in a region overlapping with the oxide semiconductor film; an end of the first electrode is located beyond an end of the oxide semiconductor film in a channel width direction of the oxide semiconductor film, and an end of the third electrode is located between an end of the oxide semiconductor film and an end of the first electrode; Semiconductor device.

Images