Photoelectric conversion device, imaging system, mobile object

Abstract

To solve the problem that a circuit scale is likely to increase in a configuration in which each pixel has a pixel counter.SOLUTION: A photoelectric conversion device includes: a first photoelectric conversion unit; a first pulse generation unit that generates a first pulse signal based on charges generated by a photoelectric conversion in the first photoelectric conversion unit; a first count unit that counts the first pulse signal; a second photoelectric conversion unit; a second pulse generation unit that generates a second pulse signal based on the charges generated by the photoelectric conversion in the second photoelectric conversion unit; a switching unit that selects a pulse signal from among a plurality of pulse signals including the first pulse signal and the second pulse signal; and a second counting unit that counts the pulse signal selected by the switching unit. When the switching unit selects the first pulse signal as the pulse signal and when the switching unit selects the second pulse signal as the pulse signal, an initial count value of the second counting unit after the selection is different.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device, an imaging system, and a moving object. [Background technology]

[0002] Single-photon avalanche diodes (SPADs) are known as detectors capable of detecting weak light at the single-photon level. SPADs amplify signal charges excited by photons by several to several million times by utilizing the avalanche multiplication phenomenon that occurs due to a strong electric field induced at the pn junction of a semiconductor. The number of incident photons can be measured by converting the current generated by the avalanche multiplication phenomenon into a pulse signal and counting the number of pulse signals. In order to prevent an increase in the circuit scale of such photoelectric conversion devices, Patent Documents 1 and 2 disclose techniques in which, when the count value of a SPAD pixel exceeds a predetermined value, counting is performed using counters in surrounding SPAD pixels. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-140537 [Patent Document 2] Patent Publication No. 2021-022875 Summary of the Invention [Problem to be solved by the invention]

[0004] When capturing images of bright scenes, it is expected that the count values ​​of pixels surrounding a pixel whose count value exceeds a predetermined value will also be high, requiring a counter circuit with a large number of bits, so there is room for consideration in reducing the circuit size. [Means for solving the problem]

[0005] One aspect of the present invention is a photoelectric conversion device comprising: a first photoelectric conversion unit; a first pulse generation unit that generates a first pulse signal based on charges generated by photoelectric conversion in the first photoelectric conversion unit; a first counting unit that counts the first pulse signal; a second photoelectric conversion unit; a second pulse generation unit that generates a second pulse signal based on charges generated by photoelectric conversion in the second photoelectric conversion unit; a switching unit that selects a pulse signal from a plurality of pulse signals including the first pulse signal and the second pulse signal; and a second counting unit that counts the pulse signal selected by the switching unit, wherein an initial count value of the second counting unit after the selection differs between when the switching unit selects the first pulse signal as the pulse signal and when the switching unit selects the second pulse signal as the pulse signal. [Effects of the Invention]

[0006] According to the present invention, the circuit scale of a photoelectric conversion device can be reduced. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a block diagram showing an example of the configuration of a photoelectric conversion device according to a first embodiment. [Figure 2] 1 is a block diagram showing an example of the configuration of a photoelectric conversion device according to a first embodiment. [Figure 3] 4 is a timing chart of a counting process according to the first embodiment. [Figure 4] FIG. 10 is a block diagram illustrating a configuration example of a photoelectric conversion device according to a second embodiment. [Figure 5] FIG. 10 is a schematic diagram illustrating driving of a pixel circuit of a photoelectric conversion device according to a third embodiment. [Figure 6] FIG. 10 is a block diagram illustrating a configuration example of a photoelectric conversion device according to a third embodiment. [Figure 7] 10 is a timing chart of an imaging process according to the third embodiment. [Figure 8] FIG. 10 is a block diagram illustrating an example of the configuration of a detection unit of a photoelectric conversion device according to a third embodiment. [Figure 9] 10A and 10B are diagrams illustrating correction values ​​used in a pixel value correction unit of a photoelectric conversion device according to a third embodiment. [Figure 10] FIG. 10 is a block diagram illustrating a configuration example of a photoelectric conversion device according to a fourth embodiment. [Figure 11] 13 is a timing chart of an A / D conversion process in the fourth embodiment. [Figure 12] FIG. 10 is a block diagram illustrating an example of the configuration of a photoelectric conversion device according to a fifth embodiment. [Figure 13] FIG. 10 is a block diagram illustrating an example of the configuration of a photoelectric conversion device according to a fifth embodiment. [Figure 14] FIG. 10 is a functional block diagram of a photoelectric conversion system according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] The embodiments shown below are intended to embody the technical concept of the present invention and are not intended to limit the present invention. The size and positional relationship of components shown in each drawing may be exaggerated for clarity. In the following description, the same components may be designated by the same reference numerals and their description may be omitted.

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, terms indicating specific directions or positions (for example, "upper," "lower," "right," "left," and other terms including these terms) will be used as necessary. The use of these terms is intended to facilitate understanding of the embodiments with reference to the drawings, and the meaning of these terms does not limit the technical scope of the present invention.

[0010] In this specification, a planar view refers to a view from a direction perpendicular to the light incident surface of the semiconductor layer. A cross-sectional view refers to a surface perpendicular to the light incident surface of the semiconductor layer. When the light incident surface of the semiconductor layer is a rough surface when viewed microscopically, the planar view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0011] In this specification, when the term "impurity concentration" is used simply, it means the net impurity concentration minus the amount compensated for by impurities of the opposite conductivity type. In other words, "impurity concentration" refers to the NET doping concentration. A region where the P-type doped impurity concentration is higher than the N-type doped impurity concentration is a P-type semiconductor region. Conversely, a region where the N-type doped impurity concentration is higher than the P-type doped impurity concentration is an N-type semiconductor region.

[0012] In the following embodiments, the connection between elements of a circuit may be described. In this case, even if another element is interposed between the elements of interest, the elements of interest are treated as being connected to each other unless otherwise specified. For example, assume that element A is connected to one node of a capacitive element C having multiple nodes, and element B is connected to the other node. Even in such a case, element A and element B are treated as being connected to each other unless otherwise specified.

[0013] (First embodiment) The first embodiment will be described with reference to Figures 1 to 3. Note that the following configuration is merely an example, and the present invention is not limited to the configuration shown in the drawings.

[0014] The photoelectric conversion device 107 shown in FIG. 1 includes a first photoelectric conversion unit 101, a first counting unit 102, a second photoelectric conversion unit 103, a switching unit 104, a second counting unit 105, and an output unit 106.

[0015] The first pulse generation unit includes a first photoelectric conversion unit 101, which generates charges in response to incident light. The first pulse generation unit generates a first pulse signal P101 in response to the charges generated by the first photoelectric conversion unit 101. The first photoelectric conversion unit 101 is, for example, a first avalanche photodiode (APD).

[0016] The first counting unit 102 has a function of counting the first pulse signal P101 output from the first pulse generating unit 102. The count value counted by the first counting unit 102 is called a first count value.

[0017] The second pulse generating unit 103 includes a second photoelectric conversion unit that generates charges in response to incident light. The second pulse generating unit 103 generates a second pulse signal in response to the charges generated by the second photoelectric conversion unit. The second photoelectric conversion unit is, for example, a second avalanche photodiode.

[0018] The switching unit 104 selects the first pulse signal P101 or the second pulse signal P102 in response to the input control signal, and outputs the selected pulse signal to the second counting unit 105.

[0019] The second counting unit 105 has a function of counting the pulse signal selected by the switching unit 104 .

[0020] The output unit 106 outputs at least one of the first count value, the control signal for the switching unit 104, and the second count value to the outside of the photoelectric conversion device 107. By performing the exposure of the photoelectric conversion unit and the counting of pixel values ​​a predetermined number of times, it is possible to capture an image of a subject. While FIG. 1 illustrates only a configuration having two photoelectric conversion units, a configuration in which multiple pixels including the first photoelectric conversion unit 101 and the second photoelectric conversion unit 103 are arranged in an array may also be used. The first count unit 102, the switching unit 104, and the second count unit 105 may also be arranged in an array. The output unit 106 may be implemented outside the photoelectric conversion device 107. While an avalanche photodiode is given as an example of a photoelectric conversion unit, the photoelectric conversion unit may also be a CMOS image sensor. In this case, each pulse generation unit has an ADC that converts a signal based on photoelectric conversion in the photoelectric conversion unit into a pulse signal.

[0021] Next, the configuration of the switching unit 104 will be described with reference to Fig. 2. Fig. 2 illustrates the first counting unit 102, the switching unit 104, and the second counting unit 105. The switching unit 104 has an AND circuit 201, a latch circuit 202, a selector circuit 203, and a reset control unit 204.

[0022] The first pulse signal P101 output from the first pulse generating unit is counted by the first counting unit 102. Each bit of the first counting unit 102 is connected to an input terminal of an AND circuit 201. For example, if the number of bits of the first counting unit 102 is seven, the AND circuit has seven input terminals. The number of input terminals of the AND circuit 201 does not have to be equal to the number of bits of the first counting unit 102, and may be fewer than the number of bits of the first counting unit 102. If the number of input terminals of the AND circuit 201 is fewer than the number of bits of the first counting unit 102, for example, a signal of bits equal to the number of input terminals of the first counting unit 102 starting from the maximum bit, or a signal of bits equal to the number of input terminals of the first counting unit 102 starting from the minimum bit, may be output.

[0023] The switching signal output from the AND circuit 201 is input to a latch circuit 202 and a reset control unit 204. The latch circuit 202 has a function of holding a control circuit that is input to a subsequent selector circuit 203. The reset control unit 204 receives the reset signal and the output signal from the AND circuit 201, and outputs a signal that changes the value of the second counting unit 105. The output signal from the reset control unit 204 changes the value of the second counting unit 105 to, for example, 0.

[0024] The selector circuit 203 receives the maximum bit signal of the first counting unit 102 and the second pulse signal P102. The output of the selector circuit 203 is controlled by a control signal output from the latch circuit 202 and is input to the second counting unit 105.

[0025] With this configuration, when the first counting unit 102 reaches its maximum value and the maximum bit of the first counting unit 102 transitions, the count value of the second counting unit 105 can be reset to 0 and the first count value can be counted by the second counting unit 105. In other words, the number of bits of the first counting unit 102 is extended, and it can be considered as continuing to count the first pulse signal P101.

[0026] It can also be said that the initial count value of the second count unit 105 after selection differs depending on whether the switching unit selects the first pulse signal P101 or the second pulse signal P102 as the pulse signal to be counted by the second count unit 105. When the switching unit selects the second pulse signal P102 as the pulse signal to be counted by the second count unit 105, the count operation continues from the count value before the switching operation, so the number of second pulse signals P102 that have already been counted becomes the initial count value. On the other hand, when the switching unit selects the first pulse signal P101 as the pulse signal to be counted by the second count unit 105, the count value of the second count unit 105, which is reset simultaneously with the switching operation, becomes the initial count value. By making the initial count values ​​different, the count number of the first pulse signal P101 counted after the switching operation can be distinguished from the count value of the second pulse signal P102 counted before the switching operation.

[0027] In the above explanation, the count value of the second count unit 105 is reset when the maximum bit of the first count unit 102 transitions, but the transition that serves as the starting point for the reset is not limited to the maximum bit. The count value may be reset when it reaches a predetermined value by using the transition of any bit of the count unit as a signal to control the implementation of the reset. Furthermore, the count value of the second count unit 105 after resetting may be 0 or another predetermined value. If the second count unit 105 is a countdown counter, it may start counting from the maximum count value.

[0028] The flow of the imaging operation of the photoelectric conversion device 107 according to this embodiment will be described in detail using the timing chart in Fig. 3. The period from time t300 to time t306 is one frame period during which exposure is performed to generate signals that constitute one image, and the number of bits of the first count unit 102 and the second count unit 105 is each 7 bits.

[0029] First, at time t301, the first photoelectric conversion unit 101 receives photons emitted from the light source, and generates a first pulse signal P101, which is a received light pulse (FIG. 3(A)). At this time, as shown in FIG. 3(B), the first count value of the first counting unit 102 is incremented by one.

[0030] At time t302, the second photoelectric conversion unit 103 receives photons emitted from the light source and generates a second pulse signal P102, which is a received light pulse, as shown in FIG. 3(C). At this time, the second count value of the second counting unit 105 is incremented by one, as shown in FIG. 3(D). Here, the switching signal output from the AND circuit 201, as shown in FIG. 3(E), is Low, and the switching signal latch held by the latch circuit 202, as shown in FIG. 3(F), is Low. The second pulse signal P102 selected by the selector circuit 203 inside the switching unit 104 is input to the second counting unit 105.

[0031] At time t303, a photon is incident on the first photoelectric conversion unit 101, and a first pulse signal P101 is generated. The first count value is counted up and reaches the maximum value of 127 (binary: 1111111) of the first count unit 102. At this time, the switching signal (E) becomes High, and the value of the switching signal (E) is held in the switching signal latch (F). The count value (D) of the second count unit is reset to 0, and the first pulse signal P101 generated thereafter is input to the second count unit 105 by selection of the selector circuit 203.

[0032] At time t304, light is incident on the second photoelectric conversion unit 103, and a second pulse signal P102 is generated. However, the second pulse signal P102 is not input to the second counting unit 105, and the second count value does not change.

[0033] At time t305, light is incident on the first photoelectric conversion unit 101, and a first pulse signal P101 is generated. When the generated first pulse signal P101 is input to the first counting unit 102, a carry signal generated at the maximum bit of the first count value (B) is input to the second counting unit 105. As a result, the first count value (B)=0 and the second count value (D)=1. At this time, if the 7 bits of the first counting unit 102 are considered to be the lower 7 bits and the second counting unit 105 is considered to be the upper 7 bits, then 128, which is the sum of the maximum first count value and the second count value, is obtained as the extended count value (G).

[0034] After this, even if a second pulse (C) is input, as at time t305, the second count value (D) is not counted. At this point, the second photoelectric conversion unit may stop receiving photons and applying a voltage to the avalanche photodiode. By stopping the reception of photons and the application of a voltage to the avalanche photodiode, the power consumption of the photoelectric conversion device can be reduced. When imaging is completed and image frame information is output, the first count value (B), second count value (D), and switching signal latch (F) immediately before time t306 are output to the outside of the photoelectric conversion device 107 via the output unit 106. At time t306, the first count value (B) = 113 (binary: 1110001) and the second count value (D) = 6 (binary: 110) are obtained, and therefore, a count result of 881 (binary: 1101110001) can be obtained as the extended count value (G). That is, in a photoelectric conversion device having two 7-bit counters, this operation makes it possible to count up to 16,383, which is the maximum value of a 14-bit binary number.

[0035] When the frame period ends at time t306, the count values ​​of the first count unit 102 and the second count unit 105 are reset. The switch signal latch is also reset to low, and the next frame period begins.

[0036] At time t307, light is incident on the second photoelectric conversion unit 103, and a second pulse signal P102 is generated. The second count value is incremented by one in response to the generated second pulse signal P102.

[0037] At time t308, light is incident on the first photoelectric conversion unit 101, and a first pulse signal P101 is generated. The first count value is incremented by one in response to the generated first pulse signal P101.

[0038] Here, the counting operation of the first counting unit 102 and the second counting unit 105 is not limited to adding 1 for each pulse signal, but may add a value other than 1. The value to be added may be changed depending on the point in time during the exposure period when the light-receiving pulse occurs. For example, if the light-receiving pulse occurs earlier than halfway through the exposure period, it is likely that the subject is bright, so the value to be added to the count value is increased. Conversely, if the light-receiving pulse occurs later than halfway through the exposure period, it is likely that the subject is dark, so the count value of the pixel value counting unit is decreased. If sensitivity is simply to be improved, a value greater than 1 may be added to the count value. If HDR (High Dynamic Range) performance is to be improved, the value to be added may be changed depending on the timing during the exposure period when the pulse rises. Furthermore, although the first counting unit 102 and the second counting unit 105 have been described as up-counters, each counting unit may also be a down-counter.

[0039] Also, while Figure 3 shows an example in which one or more photons are received at regular time intervals, it is common for the timing of photon reception to be sparse depending on the shooting conditions.

[0040] As described above, according to this embodiment, it is possible to reduce the scale of the counter circuit of the entire photoelectric conversion device by sharing the second counting unit corresponding to the second photoelectric conversion unit 103 with the first photoelectric conversion unit 101. Furthermore, by varying the initial count value depending on the selection of the switching unit, it is possible to distinguish between the count value counted before the switching operation and the count number counted after the switching operation.

[0041] (Second embodiment) The second embodiment will be described with reference to Fig. 4. Explanations of the parts common to the first embodiment will be omitted, and differences will be mainly described.

[0042] The switching unit 404 of the photoelectric conversion device according to the second embodiment can detect that the second count value has reached its maximum value by providing a circuit for the output of the second count unit 105 similar to the circuit provided for the output of the first count unit 102 in the first embodiment. The switching unit 404 of the photoelectric conversion device according to the second embodiment includes an AND circuit 401, a latch circuit 402, and a selector circuit 403 in addition to the AND circuit 201, the latch circuit 402, the selector circuit 203, and the reset control unit 405. A signal from each bit of the second count unit 105 is input to the AND circuit 401, and the output terminal of the AND circuit 401 is connected to the input terminal of the latch circuit 402 and the input terminal of the reset control unit 405. The outputs of the AND circuit 201 and the AND circuit 401 are input to the reset control unit 405. With this configuration, when either the first count unit 102 or the second count unit 105 reaches its maximum count value, a carry signal is input to the other counter circuit, thereby expanding the countable value.

[0043] The following describes the operation when neither the first counting unit 102 nor the second counting unit 105 has saturated its count value during the exposure period of each photoelectric conversion unit. That is, this is the case when the control signal held in the latch circuit 202 and the control signal held in the latch circuit 402 are both low. In this case, a first pulse signal P101 is input to the first counting unit 102, and a second pulse signal P102 is input to the second counting unit 105, and the pulse signals are counted in each counting unit.

[0044] Thereafter, the counting of each counting unit progresses in response to the incidence of photons and the generation of pulse signals, and the first counting unit 102 reaches its maximum count value before the count value of the second counting unit 105 saturates. At this time, the latch circuit 402 holds a voltage corresponding to a low level (hereinafter simply referred to as low), and the latch circuit 202 holds a voltage corresponding to a high level (hereinafter simply referred to as high). In this case, the count value of the second counting unit 105 is reset to 0 by the reset control unit 405. Then, the carry signal of the maximum bit of the first counting unit 102 is input to the second counting unit 105, and the first pulse signal P101 generated thereafter is counted as an extended count value in the second counting unit 105.

[0045] Conversely, consider a case where the second counting unit 105 reaches the maximum count value before the count value of the first counting unit 102 saturates. The latch circuit 202 holds low, and the latch circuit 402 holds high. In this case, the count value of the first counting unit 102 is reset to 0 by the reset control unit 405. Then, the carry signal of the maximum bit of the second counting unit 105 is input to the first counting unit 102, and the second pulse signal P102 generated thereafter is counted as an extended count value in the first counting unit 102.

[0046] It is possible that the count value of the first count unit 102 and the count value of the second count unit 105 reach their maximum count value at the same time. In other words, when the latch circuit 202 and the latch circuit 402 are simultaneously held high, the reset control unit 405 may reset the value of either the first count unit 102 or the second count unit 105 to 0. When the value of the first count unit 102 is reset to 0, a carry signal of the maximum bit of the second count unit 105 is input to the first count unit 102, and extended counting of the second pulse signal P102 is performed. When the value of the second count unit 105 is reset to 0, a carry signal of the maximum bit of the first count unit 102 is input to the second count unit 105, and extended counting of the first pulse signal P101 is performed.

[0047] Furthermore, if the signal held by one of the latch circuits 202 and 402 becomes High after the other holds High, reset processing is not performed on the first counting unit 102 and the second counting unit 105. This is to prevent resetting of the counting units that are already being used for extended counting.

[0048] Furthermore, in the photoelectric conversion device according to this embodiment, the control signal held in the latch circuit 202 and the control signal held in the latch circuit 402 are output from the output unit 106. This makes it possible to determine whether the pixel value output outside the pixel is based on the first pulse signal P101 or the second pulse signal P102.

[0049] In this way, according to the photoelectric conversion device of this embodiment, even if any of the multiple count circuits shared by the multiple photoelectric conversion units becomes saturated, the countable value of the counter circuit can be extended. Furthermore, by varying the initial count value depending on the selection of the switching unit, it is possible to distinguish between the count value counted before the switching operation and the count number counted after the switching operation.

[0050] (Third embodiment) The APD, which is the photoelectric conversion unit of the photoelectric conversion device according to this embodiment, and a method for driving the APD will be described with reference to FIG.

[0051] The APD 201 in FIG. 5(a) generates charge pairs in response to incident light through photoelectric conversion. A voltage VL (first voltage) is supplied to the anode of the APD 201. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD 201. A reverse bias voltage is supplied to the anode and cathode so that the APD 201 performs avalanche multiplication. With this voltage supplied, charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0052] When a reverse bias voltage is supplied, the APD can be operated in either a Geiger mode, where the potential difference between the anode and cathode is greater than the breakdown voltage, or a linear mode, where the potential difference between the anode and cathode is close to or less than the breakdown voltage. An APD operated in the Geiger mode is called a SPAD. For example, the voltage VL (first voltage) is −30 V, and the voltage VH (second voltage) is 1 V. The APD 201 may be operated in either the linear mode or the Geiger mode. The APD according to this embodiment is assumed to operate in the Geiger mode.

[0053] The switch 202 is connected to a control line supplied with a drive voltage VH and the APD 201. The switch 202 is connected to one of the anode and cathode nodes of the APD. The switch 202 switches the potential difference between the anode and cathode of the APD between a first potential difference that causes avalanche multiplication and a second potential difference that does not cause avalanche multiplication. Hereinafter, switching from the second potential difference to the first potential difference is also referred to as turning on the switch 202, and switching from the first potential difference to the second potential difference is also referred to as turning off the switch 202. The switch 202 functions as a quenching element. The switch 202 functions as a load circuit (quenching circuit) during signal multiplication by avalanche multiplication, and suppresses the voltage supplied to the APD 201 to suppress avalanche multiplication (quenching operation). The switch 202 also functions to return the voltage supplied to the APD 201 to the drive voltage VH by passing a current equivalent to the voltage drop caused by the quench operation (recharge operation). In other words, the switch 202 functions as a control circuit that controls the occurrence of avalanche multiplication in the APD 201.

[0054] The switch 202 can be configured, for example, by a MOS transistor. A control signal P_CLK for the switch 202, supplied from the signal generating unit 215, is applied to the gate electrode of the MOS transistor that configures the switch 202. In this embodiment, the on / off state of the switch 202 is controlled by controlling the voltage applied to the gate electrode of the switch 202.

[0055] The waveform shaping unit 210 shapes the potential change at the cathode of the APD 201 obtained upon photon detection and outputs a pulse signal. The input node of the waveform shaping unit 210 is designated as nodeA, and the output node is designated as nodeB. The waveform shaping unit 210 changes the output potential from nodeB depending on whether the input potential to nodeA is equal to or higher than a predetermined value. For example, in FIG. 5(b), when the input potential to nodeA is equal to or higher than a threshold, the output potential from nodeB becomes low. When the input potential to nodeA is lower than the threshold, the output potential from nodeB becomes high. For example, an inverter circuit is used as the waveform shaping unit 210. While FIG. 5(a) illustrates an example in which a single inverter is used as the waveform shaping unit 210, a circuit in which multiple inverters are connected in series or another circuit with a waveform shaping effect may also be used.

[0056] Although the switch 202 can perform quenching and recharging operations in response to avalanche multiplication in the APD 201, depending on the timing of photon detection, the charge generated in the APD may not be recognized as an output signal. For example, assume that avalanche multiplication occurs in the APD, causing node A to go low and a recharge operation is in progress. Generally, the decision threshold of the waveform shaping unit 210 is set to a potential higher than the potential difference at which avalanche multiplication occurs in the APD. When a photon is incident on the APD while the potential at node A is lower than the decision threshold due to the recharge operation and at a potential at which avalanche multiplication is possible in the APD, avalanche multiplication occurs in the APD, causing the voltage at node A to drop. In other words, because the potential at node A drops below the decision threshold, no potential change occurs across the decision threshold, and the output potential from node B remains unchanged. Therefore, even though avalanche multiplication is occurring, the photon detection is not recognized as a signal. Particularly under high illuminance, photons enter the APD continuously in a short period of time, making it difficult for the incident light to be detected as a signal. As a result, even under high illuminance, the actual number of incident photons and the output signal tend to diverge.

[0057] In contrast, by applying a control signal P_CLK to the switch 202 to switch the switch 202 between its on and off states, it is possible to determine a signal even when photons continuously enter the APD in a short period of time. FIG. 5(b) illustrates an example in which the control signal P_CLK is a pulse signal with a repetitive cycle. In other words, FIG. 5(b) illustrates a mode in which the switch 202 is switched on and off at a predetermined clock frequency. However, the effect of suppressing an increase in power consumption of a photoelectric conversion device can be obtained even if the pulse signal is not a signal with a repetitive cycle.

[0058] FIG. 5B is a diagram illustrating the relationship between the control signal P_CLK of the switch, the potential of node A, the potential of node B, and the output signal. In this embodiment, when the control signal P_CLK is at a high level, the drive voltage VH is not easily supplied to the APD, and when the control signal P_CLK is at a low level, the drive voltage VH is supplied to the APD. The high level of the control signal P_CLK is, for example, 1 V, and the low level of the control signal P_CLK is, for example, 0 V. When the control signal P_CLK is at a high level, the switch is turned off, and when the control signal P_CLK is at a low level, the switch is turned on. The resistance of the switch when the control signal P_CLK is at a high level is higher than the resistance of the switch when the control signal P_CLK is at a low level. When the control signal P_CLK is at a high level, recharging is not easily performed even if avalanche multiplication occurs in the APD, so the potential supplied to the APD is a potential below the breakdown voltage of the APD. Therefore, the avalanche multiplication operation in the APD stops.

[0059] As mentioned above, it is preferable to configure switch 202 using a single transistor, and to perform the quenching and recharging operations using a single transistor. This makes it possible to reduce the number of circuits compared to when the quenching and recharging operations are performed using different circuit elements. In particular, when each pixel has a counter circuit and the SPAD signal is read out for each pixel, it is preferable to reduce the circuit area used for the switch in order to accommodate the counter circuit, and the effect of configuring switch 202 using a single transistor is significant.

[0060] At time t1, the control signal P_CLK changes from high to low, turning on the switch and starting the APD recharge operation. This causes the potential of the APD's cathode to transition to high. The potential difference between the potentials applied to the APD's anode and cathode then becomes a state in which avalanche multiplication is possible. The potential of the cathode is the same as that of node nodeA. Therefore, when the potential of the cathode transitions from low to high, the potential of node nodeA becomes equal to or greater than the decision threshold at time t2. At this time, the pulse signal output from node nodeB is inverted, transitioning from high to low. After that, a potential difference of drive voltage VH - drive voltage VL is applied to the APD 201. The control signal P_CLK transitions to high, turning off the switch.

[0061] Next, at time t3, when a photon is incident on the APD 201, avalanche multiplication occurs in the APD 201, and the voltage at the cathode drops. That is, the voltage at nodeA drops. As the voltage drop increases and the voltage difference applied to the APD 201 decreases, avalanche multiplication in the APD 201 stops, as at time t2, and the voltage level at nodeA no longer drops below a certain value. As the voltage at nodeA drops, if the voltage at nodeA falls below the decision threshold, the voltage at nodeB changes from low to high. That is, the portion of the output waveform at nodeA that exceeds the decision threshold is shaped by the waveform shaping unit 210 and output as a signal at nodeB. The portion is then counted by the counter circuit, and the count value of the counter signal output from the counter circuit increases by 1 LSB.

[0062] Between time t3 and time t4, photons are incident on the APD, but the switch is in the off state and the voltage applied to the APD 201 does not have a potential difference that allows avalanche multiplication, so the voltage level of node A does not exceed the decision threshold.

[0063] At time t4, the control signal P_CLK changes from high to low, turning on the switch. As a result, a current flows through node A to compensate for the voltage drop from drive voltage VH, and the voltage at node A returns to its original voltage level. At this time, at time t5, the voltage at node A exceeds the threshold, causing the pulse signal at node B to invert and change from high to low.

[0064] At time t6, node A returns to its original voltage level, and the control signal P_CLK changes from low to high. This turns the switch off. From this point onward, the potentials of the nodes and signal lines change in response to the control signal P_CLK and the incidence of photons, as explained from time t1 to time t6.

[0065] However, when capturing an image of a subject whose brightness changes frequently within the period when avalanche growth may occur, it may not be possible to obtain pixel values ​​that reflect the actual conditions of the subject as viewed. For example, this problem may occur when capturing an image of a subject whose light intensity changes drastically within the frame, such as a high-brightness, short-pulse light source.

[0066] To solve this problem, a photoelectric conversion device according to a third embodiment of the present invention will be described with reference to Figures 6 to 9. Since the basic functional block diagram of the photoelectric conversion device has many parts in common with the first and second embodiments, differences will mainly be described.

[0067] The light receiving unit 501 in Fig. 6 has the function of photoelectrically converting the received light into a first pulse signal P501 (received light pulse). The function of converting light into a received light pulse is realized by a photoelectric conversion element such as the avalanche photodiode described above. The APD 201, switch 202, and waveform shaping unit 210 shown in Fig. 5 correspond to the light receiving unit 601, and a clock signal is input to the switch 202 as a recharge pulse.

[0068] The first counting unit 502 has a function of counting the number of received light pulses emitted by the light receiving unit 501. The flow of this counting process is similar to that of the first count value (B) in FIG.

[0069] The detection unit 503 has a function of receiving the light-receiving pulse emitted by the light-receiving unit 501 and the detection pulse as inputs and generating a second pulse signal P502.

[0070] As in the first embodiment, the switching unit 504 selects the second pulse signal P502 when the latch circuit 202 is in the 0 state, and selects the first pulse signal P501 when the latch circuit 202 is in the 1 state.

[0071] The second counting unit 505 counts the first pulse signal P501 or the second pulse signal P502 depending on the selection of the switching unit 504. The flow of the counting process of the second counting unit 505 when the latch circuit 202 is in the 0 state is the same as the second count value (D) in the first embodiment. In this embodiment, this second count value is called a detection count value. The detection count value is used to correct pixel values.

[0072] The output unit 506 transfers at least one of the first count value, the second count value, and the selection of the switching unit 504 to the outside of the photoelectric conversion device 507. When the second count unit 505 counts the detection count value, the first count value counted by the first count unit 502 is corrected by the detection count value.

[0073] When the light receiving units 501 form a pixel array arranged in multiple rows and multiple columns, the first counting unit 502 and the second counting unit 505 are also arranged in multiple rows and multiple columns. The second counting unit 505 and the output unit 506 are not limited to being arranged in an array corresponding to the pixel array, and any number of them may be mounted, for example, around the pixel array. In this case, one second counting unit 505 or one output unit 506 may be shared and operated among multiple light receiving units 501.

[0074] Furthermore, correction processing by the output unit 506 may be performed by pipeline processing in the periphery of the pixel array while reading out the data held in the first count unit 502 and the second count unit 505. In the description of FIG. 6 , the photoelectric conversion device 507 has the output unit 506, but the output unit 506 may be implemented outside the photoelectric conversion device 507.

[0075] In this way, by implementing a smaller number of second counting units 505 and output units 506 than the number of light receiving units 501, the circuit scale of the photoelectric conversion device 507 can be reduced.

[0076] Next, the flow of operations from the generation of a light-receiving pulse by the light-receiving unit 501 in FIG. 6 to the first counting unit 502 and second counting unit 505 will be described in detail using the timing chart in FIG.

[0077] FIG. 7(a) is a timing chart when the first count value does not reach the first counter upper limit within one frame period.

[0078] Figure 7(a)(A) shows the relationship between time and light intensity of a light source that is a subject. This light source has a cyclical sequence of high and low light intensity periods. For example, it is a light source such as an LED light source that uses PWM (Pulse Width Modulation) dimming. We will explain the case where the ratio of high light intensity periods to a unit period (hereinafter referred to as the duty ratio) is 10% as an example.

[0079] (B) in Figure 7(a) shows a recharge pulse input to the light receiving unit 501. The avalanche photodiode is recharged during the High period of this pulse. This allows for the creation of continuous exposure periods as shown in (C) in Figure 7. One exposure period from the first recharge pulse (first signal) to the second recharge pulse (second signal) is called a subframe.

[0080] At time t901 during subframe 1, the light receiving unit 601 receives photons emitted from the light source (A) and generates a light receiving pulse as shown in (D). At this time, the first count value of the first counting unit 502 is incremented by one as shown in (E).

[0081] However, the counting method is not limited to this, and the first counter may add a value other than 1 in response to one received light pulse, and the amount of change in the count may be changed depending on when the received light pulse occurs during an arbitrary exposure period. For example, if a received light pulse occurs early during an arbitrary exposure period, the subject is considered to be in a bright state, and the count value of the first counter is corrected to a larger value by the output unit 506. Conversely, if a received light pulse occurs late during an arbitrary exposure period, the subject is considered to be in a dark state, and the count value of the first counter is corrected to a smaller value by the output unit 506. An example will be described in which there are 1000 subframes in one exposure period. Let n be the value added to the first count value in response to the received light pulse during the period from subframe 1 to subframe 500, which is the period before the center timing of the exposure period. Let m be the value added to the first count value in response to the received light pulse during the period from subframe 501 to subframe 1000, which is the period after the center timing of the exposure period. In this case, n is greater than m.

[0082] To improve the sensitivity of the photoelectric conversion device, a value greater than 1 may be added to the count value of the first count unit. Furthermore, to improve HDR performance, the value added to the count value of the first count unit may be changed depending on the timing at which the pulse rises during the subframe period.

[0083] In the example of Fig. 7(a), there are 1000 subframes, and one light-receiving pulse is generated in each subframe, and the value of the first counter is incremented by 1. By changing the increment value according to the timing of light reception described above, it is possible to obtain pixel values ​​that correspond to the actual state of the subject as seen by the human eye to some extent.

[0084] 7(a) shows an example in which one or more photons are received in each subframe, but there may be subframes in which no photons are received depending on the shooting conditions. However, in the case of a light source whose brightness changes frequently between subframes, an extremely large number of photons may flow into the light receiving unit 501 during a specific subframe period, which may result in pixel values ​​that do not reflect the actual state of the subject as seen by the human eye.

[0085] To solve this problem, as shown in (F), a detection pulse that is active (high) for only a portion of the subframe period and inactive (low) for the other period is input to the detection unit 503. The detection pulse may be generated within the imaging device or input from outside the imaging device. It may also be generated in synchronization with the recharge pulse.

[0086] 8 shows an example of the configuration of the detection unit 503 and the second counting unit 505. The light-receiving pulse, which is input from the light-receiving unit 501, and the detection pulse are input to an AND circuit 1001, which is the detection unit 503, and the output of the AND circuit 1001 is input to a counter circuit 1002, which is the second counting unit 505. With this circuit configuration, the second counting unit 505 can count the logical product of the light-receiving pulse and the detection pulse, as shown in the second count value (G).

[0087] At time t901, since both the light receiving pulse (D) and the detection pulse (F) are High, the second count value (G) of the second counting unit 505 is incremented by one.

[0088] As at time t901, the light receiving pulse (D) and the detection pulse (F) are also high at time t902, and the first count value (E) and the second count value (G) are each incremented by one.

[0089] At times t903, t904, and t905, the light intensity of the light source is low, and the detection pulse is Low when the received light pulse rises. That is, the first count value (E) that counts the received light pulse is incremented, but the second count value (G) that is the logical product of the received light pulse and the detection pulse is not incremented.

[0090] At time t906 and time t907, the light receiving pulse (D) and the detection pulse (F) both go high, and an operation is performed to add the count value to both the first count value (E) and the second count value (G).

[0091] At time t908 and time t909, the received light pulse (D) is High and the detection pulse (F) is Low. As at time t903, only the first count value (E) is incremented, and the second count value (G) is not incremented.

[0092] In the example shown in Figure 7, after the time equivalent to 1000 subframes has elapsed, the first count value (E) = 1000 and the second count value (G) = 100 can be obtained. In this case, it is clear that out of the 1000 subframes, 100 subframes had a strong light intensity from the light source, and information can be obtained that the duty ratio of the light source is 10%. Note that this explanation shows an example in which photons are received every time a subframe period is reached and the first count value is incremented, but there may also be subframe periods in which no light is received depending on the light source conditions.

[0093] 7B is a timing chart showing the case where the first count value reaches the first counter upper limit during one frame period. Explanation of the parts common to FIG. 7A will be omitted.

[0094] 7(b), the detection pulse is low when the received light pulse rises at time t905. That is, the first count value (E) that counts the received light pulse is incremented, but the second count value (G) that is the logical product of the received light pulse and the detection pulse is not incremented.

[0095] At time t906, in response to the rising edge of the received light pulse (D), the first count value (E) reaches the maximum value of 127 (binary: 1111111). The switching signal (H) goes high, the second count value (G) is reset, and the switching signal latch (I) also holds high.

[0096] At time t907, light is incident on the light receiving unit 501, and a second pulse signal P502 is generated. In response to the generated second pulse signal P502, the second count value (G) counts up by one, so that the first count value (E) = 0 and the second count value (G) = 1. Thereafter, the logical product of the received light pulse (D) and the detection pulse (F) is not counted as the second count value (G). At this time, if the 7 bits of the first count unit 502 are considered to be the lower 7 bits and the second count unit 505 is considered to be the upper 7 bits, then 128, which is the sum of the maximum value of the first count value and the second count value, is obtained as the extended count value (J).

[0097] 7(a) and 7(b) show an example in which a detection pulse is input during every subframe period, but the detection pulse may be input once every any number of subframes. In this case, the duty ratio of the light source can be calculated by using the number of times the detection pulse is input as the denominator and the second count value as the numerator. The greater the number of detection pulses, the larger the circuit size of the first counting unit 502. If the number of detection pulses is reduced by inputting the detection pulse once every any number of subframes, the accuracy of the light source duty ratio may decrease, but the circuit size of the counter circuit can be reduced.

[0098] Although the above description assumes that one pixel has one second count unit, one pixel may have multiple second count units. In this case, multiple detection pulses with different high periods are input to each second count unit, and a second count value is counted for each detection pulse. This makes it possible to calculate duty ratios for various brightness levels, thereby optimizing the correction value used in the output unit 506. Furthermore, by extending the high period of the detection pulse, the intensity of the light source light corresponding to the second count value can be changed. This makes it possible to calculate a second count value that corresponds to the amount of light that needs to be corrected depending on the imaging environment.

[0099] Next, a method for generating a correction value used by the output unit 506 in the case of FIG. 7(a) will be described with reference to FIG. 9. FIG. 9 is a table showing a method for generating a correction value, with the light source duty ratio on the vertical axis and the first count value on the horizontal axis. The gain, which is a correction value by which the first count value is multiplied, is switched based on the light source duty ratio and the first count value. The light source duty ratio is calculated by using the number of detection pulses input as the denominator and the second count value as the numerator. For simplicity, the possible range of the first count value is divided equally into large (first count value 1000 to 668), medium (first count value 667 to 333), and small (first count value 332 to 0). The first count value values ​​included in each range may be determined appropriately. Similarly, the light source duty ratio will be described as high (100 to 66%), medium (66 to 33%), and low (33 to 0%), but the duty ratios included in each range may be set appropriately.

[0100] If the first count value is large, the output unit 506 does not perform correction processing regardless of the duty ratio of the light source. This is because there is a high possibility that pixel values ​​that correspond to the actual conditions of the subject are obtained. This is the case in FIG. 7(b).

[0101] Even if the first count value is medium and the duty ratio of the light source is high, there is a high possibility that a pixel value that matches the actual state of the subject is obtained, so no correction processing is performed by the output unit 506. Note that it is expected that such a situation is unlikely to occur in actual imaging.

[0102] If the first count value is medium and the light source duty ratio is medium, the pixel value correction unit applies a relatively low gain to the obtained pixel value. Similarly, if the first count value is medium and the light source duty ratio is low, the pixel value is applied with a higher gain than when the light source duty ratio is medium. Here, when comparing the same count values, the gain when the light source duty ratio is medium is higher than the gain when the light source duty ratio is low.

[0103] When the first count value is small and the duty ratio of the light source is low, a stronger gain is applied than when the pixel value count is medium. Here, when comparing the same duty ratios, the gain is higher when the first count value is small than when the first count value is medium.

[0104] It should be noted that when the first count value is small and the duty is high to medium, it is highly likely that pixel values ​​that correspond to the actual state of the subject are obtained, and therefore correction processing is not performed by the output unit 506, but it is expected that such imaging conditions are unlikely to occur in practice.

[0105] In the above example, the correction value is calculated so that the smaller the second count value, the larger the change in the first count value. When the second count value is the first value, the first count value after the correction process is set as the first correction count value, and when the second count value is the second value smaller than the first value, the first count value after the correction process is set as the second correction count value larger than the first correction count value.

[0106] This example is merely an example, and the correction value used by the output unit 506 may be a value determined based on the first count value and the duty ratio of the light source. The absolute value of the gain is calculated from the characteristics of the duty ratio and the count value, but the combination of the magnification relationship of the duty ratio and the strength of the gain, or the combination of the magnitude relationship of the count value and the strength of the gain, is maintained under each imaging condition. The correction value may be an additional value to be added to the first count value instead of a gain to be multiplied by the first count value. Furthermore, in this description, the duty ratio and the first count value are each divided into three patterns and correction values ​​are set, but the number of classifications may be increased or decreased.

[0107] As described above, the photoelectric conversion device according to this embodiment can correct pixel values ​​when capturing an image of a subject whose luminance changes within a frame.

[0108] As described above, according to this embodiment, when capturing an image of a subject in which the amount of light changes drastically within a frame, such as a high-brightness, short-pulse light source, pixel values ​​can be corrected to be brighter. Furthermore, the circuit size of the photoelectric conversion device can be reduced. Furthermore, by varying the initial count value depending on the selection of the switching unit, it is possible to distinguish between the count value counted before the switching operation and the count number counted after the switching operation.

[0109] (Fourth embodiment) In the first to third examples, a counter circuit of a photoelectric conversion device using a SPAD was described. In this embodiment, a photoelectric conversion device having a counter circuit and using a CMOS (Complementary Metal-Oxide-Semiconductor) sensor (hereinafter referred to as a CMOS sensor) will be described.

[0110] Photoelectric conversion devices using CMOS sensors generate analog signals based on the photons received by the photodiode. This analog signal is then converted to digital (A / D) to generate a digital signal. In photoelectric conversion devices where photodiodes are arranged in a pixel array, the A / D conversion function is generally performed on the periphery of the pixel array, but in some cases, an A / D converter is placed for each pixel or group of multiple pixels to increase the readout speed of the photoelectric conversion device. In this case, the circuit size of the A / D converter may put a strain on the circuit size of the entire photoelectric conversion device.

[0111] A photoelectric conversion device according to the fourth embodiment will be described with reference to Fig. 10 and Fig. 11. Since the basic functional block diagram of the photoelectric conversion device has many parts in common with the first to third embodiments, differences will mainly be described.

[0112] The photoelectric conversion device 611 according to this embodiment includes a clock generation unit 601, a first counting unit 602, a switching unit 604, a second counting unit 605, a first comparing unit 606, a second comparing unit 607, a first photoelectric conversion unit 608, a second photoelectric conversion unit 609, and an output unit 610. This differs from the photoelectric conversion device according to the first embodiment in that both a first pulse signal P601 and a second pulse signal P602 are generated by the clock generation unit 601. The configuration of the switching unit 604 is equivalent to that of the switching unit 204 according to the first embodiment.

[0113] A clock generating unit 601 generates a first pulse signal P601 and a second pulse signal P602 at an arbitrary interval. A first counting unit 602 receives the first pulse signal P601 and holds a first count value, and a second counting unit 605 receives the second pulse signal P602 and holds a second count value.

[0114] The first photoelectric conversion unit 608 and the second photoelectric conversion unit 609 are photoelectric conversion elements that convert received photons into analog electrical signals. Generally, a CMOS sensor is used, but any other sensor that can achieve a similar function is also suitable.

[0115] The first comparing unit 606 has a function of comparing the value of the analog electrical signal output from the first photoelectric conversion unit 608 with the ramp signal, and stopping the count-up of the first counting unit 602 if they match. Similarly, the second comparing unit 607 has a function of comparing the value of the analog electrical signal output from the second photoelectric conversion unit 609 with the ramp signal, and stopping the count-up of the second counting unit 605 if they match. This ramp signal may be generated internally in the photoelectric conversion device 611 or may be input from outside the photoelectric conversion device 611. Furthermore, the cycle at which the clock generating unit 601 generates the first pulse signal P601 and the second pulse signal P602 and the rate of increase of the ramp signal are adjusted according to the shooting scene.

[0116] Here, the flow of the imaging operation of the photoelectric conversion device 611 in FIG. 10 will be described with reference to the timing chart in FIG.

[0117] (A) is the electrical signal value output from the first photoelectric conversion unit 608. Here, an example will be described in which the analog electrical signal values ​​generated by the first photoelectric conversion unit 608 and the second photoelectric conversion unit 609 are equivalent. Also, the times when the first photoelectric conversion unit 608 and the second photoelectric conversion unit 609 generate electric charges are not shown.

[0118] (B) shows a ramp signal. A ramp signal is a signal whose value increases over time.

[0119] (C) is a match pulse, which becomes High when the electrical signal value (A) of the first photoelectric conversion unit 608 and the value of the ramp signal (B) compared by the first comparison unit 606 match. If the analog electrical signal values ​​of the first photoelectric conversion unit 608 and the second photoelectric conversion unit 609 are not equivalent, a match pulse is generated in each of the comparison operations performed by the first comparison unit 606 and the second comparison unit 607.

[0120] At time t1201, the clock generating unit 601 generates a first pulse signal P601 (D) and a second pulse signal P602 (F). At this time, the first count value of the first counting unit 602 is incremented by one (E), and the second count value of the second counting unit 605 is incremented by one (G).

[0121] At this time, the switching signal (H) that is the output of the AND circuit 201 to which the first pulse signal P601 is input is Low, and the latch circuit inside the switching unit 604 holds it at Low (I). Therefore, the second pulse signal P602 selected by the selector circuit inside the switching unit 604 is input to the second counting unit 605.

[0122] At time t1202, the first count value (E) and the second count value (G) both reach their maximum values ​​of 127 (binary: 1111111). At this time, the switching signal (H), which is the output of the AND circuit 201, becomes High. At the same time, the value of the switching signal (H) is held in the switching signal latch (I). Furthermore, the reset control unit 204 resets the value of the second count value (G) to 0.

[0123] At time t1203, a first pulse (D) is input to the first count unit 602. A carry signal of the maximum bit of the first count value (E) is input to the second count unit 605, and the first count value (E) becomes 0 and the second count value (G) becomes 1. At this time, if the 7 bits of the first count unit 602 are considered to be the lower 7 bits of the extended count value and the second count unit 605 is considered to be the upper 7 bits of the extended count value, then 128 is obtained as the extended count value (J).

[0124] At time t1204, the electrical signal value (A) and the ramp signal (B) match. The match pulse (C) generated by the first comparator 606 goes high, stopping the counting of the first count unit 602. At this point, the electrical signal value, which is an analog signal generated by the CMOS sensor, has been converted into a digital signal. Therefore, when the exposure ends and data is output, the first count value (E), second count value (G), and switching signal latch (I) immediately before time t1205 are output to the photoelectric conversion device 611 via the output unit 610. In the example of FIG. 11, the first count value (E) = 113 (binary: 1110001) and the second count value (G) = 6 (binary: 110), resulting in a count result of 881 (binary: 1101110001) as the extended count value (J). The configuration and operation described in this embodiment makes it possible to count up to the maximum value of 14 bits, 16383 (binary: 11111111111111). In other words, a counter circuit with a smaller number of bits can perform A / D conversion on electrical signal values ​​corresponding to brighter scenes.

[0125] At time t1205, the photoelectric conversion device 611 resets the first count value (E), the second count value (G), and the switching signal latch (I).

[0126] Exposure for constructing the next frame begins at time t1206. In response to the input of a first pulse (D) and a second pulse (F), a first count value (E) and a second count value (G) are counted. In this way, the counting operations of the first counting unit 602 and the second counting unit 605 are again performed in succession to perform A / D conversion.

[0127] If the timing at which the match pulse (C) goes high is earlier than time t1202, the first comparing unit 606 and the second comparing unit 607 each generate a match pulse (C). The counting of the first counting unit 602 is stopped in response to the match pulse output from the first comparing unit 606, and the counting of the second counting unit 605 is stopped in response to the match pulse output from the second comparing unit 607. A / D conversion of two pixels can be achieved by separately reading out the first count value (E) and the second count value (G).

[0128] The above explanation is merely an example. For example, ramp signals with two or more different increase rates may be used to speed up A / D conversion. Furthermore, noise may be reduced by dividing the analog electrical signal value into a signal value component and a noise component, converting them separately, and then performing calculations. The counter circuit may be a Gray code counter, for example.

[0129] In this embodiment, an example has been described in which a counter circuit is shared between a first photoelectric conversion unit 608 and a second photoelectric conversion unit 609 corresponding to two pixels, but the counter circuit may also be shared between a plurality of photoelectric conversion units that share one microlens, for example. Also, as shown in the fifth embodiment, the counter circuit may be shared among some of the Bayer pixels.

[0130] According to this embodiment, in a photoelectric conversion device having one counter circuit for A / D conversion for each pixel or for each group of pixels, the size of the counter circuit can be reduced. Also, by varying the initial count value depending on the selection of the switching unit, it is possible to distinguish between the count value counted before the switching operation and the count number counted after the switching operation.

[0131] (Fifth embodiment) The photoelectric conversion device described in the first embodiment has a problem in that the resolution is halved because two pixels share a counter circuit. A fifth embodiment that solves this problem will be described using Figures 12 and 13. The basic functional block diagram of the photoelectric conversion device has many parts in common with the first to fourth embodiments, so differences will mainly be described.

[0132] In this embodiment, the functions corresponding to the first photoelectric conversion unit 101 in the first embodiment are a first light receiving unit 711, a first second light receiving unit 712, and a first third light receiving unit 713. The first light receiving unit 711 is a first photoelectric conversion unit sensitive to a wavelength range corresponding to red (R), and the first second light receiving unit 712 is a second photoelectric conversion unit sensitive to a wavelength range corresponding to blue (B). The first third light receiving unit 713 is a third photoelectric conversion unit sensitive to a wavelength range corresponding to green (G1).

[0133] The function corresponding to the second photoelectric conversion unit 103 in the first embodiment is the second light receiving unit 703. The second light receiving unit 703 is a fourth photoelectric conversion unit having sensitivity in the wavelength range corresponding to green (G2).

[0134] PIX1 having a first light receiving section 711, PIX2 having a first second light receiving section 712, PIX3 having a first third light receiving section 713, and PIX4 having a second light receiving section 703 are arranged in a Bayer array of, for example, two rows and two columns.

[0135] The first light receiving unit 711 generates an eleventh pulse signal P711 as a received light pulse. Similarly, the second light receiving unit 712 generates a second pulse signal P712, and the third light receiving unit 713 generates a thirteenth pulse signal P713. The eleventh pulse signal P711 is counted by an eleventh counting unit 721, the second pulse signal P712 is counted by a second counting unit 722, and the thirteenth pulse signal P713 is counted by a thirteenth counting unit 723. The carry signals of the maximum bits of the eleventh counting unit 721, the second counting unit 722, and the thirteenth counting unit 723 are input to the switching unit 704.

[0136] The second light receiving section 703 generates a second pulse signal P702 as a received light pulse.

[0137] With this configuration, in a photoelectric conversion device having Bayer pixels, the number of bits that can be counted can be expanded for the remaining three pixels in the Bayer array by stopping imaging of one pixel out of the four pixels that make up the Bayer array. In this description, green is assigned to the second light receiving unit 703, but any other color may be assigned to the pixel. Here, the color assignment may be achieved by providing a corresponding color filter. Furthermore, instead of a color, the pixel may be a pixel for receiving reflected light of laser light emitted for distance measurement, or a pixel for receiving light of a wavelength other than visible light.

[0138] The configuration of the switching unit 704 of the photoelectric conversion device according to this embodiment will be described using Fig. 13. Fig. 13 shows only the 11th count unit 721, the 12th count unit 722, the 13th count unit 723, the switching unit 704, and the second count unit 705.

[0139] The signal of each bit of the first 11th counting unit 721 is input to an AND circuit 201-1. The signal of each bit of the first 2nd counting unit 722 is input to an AND circuit 201-2. The signal of each bit of the first 3rd counting unit 723 is input to an AND circuit 201-3. The outputs of the AND circuit 201-1, AND circuit 201-2, and AND circuit 201-3 are input to an OR circuit 801, and the output of the OR circuit 801 is input to a latch circuit 202.

[0140] With this configuration, it is possible to determine that the count value of at least one of the three pixels of RG1B corresponding to each of the first eleventh counting unit 721, the first twelfth counting unit 722, and the first thirteenth counting unit 723 has reached the maximum or is equal to or greater than a specified value.

[0141] Furthermore, the second count unit 705 of this embodiment is divided into a second-first count unit 802, a second-second count unit 803, and a second-third count unit 804. Here, the explanation will continue using as an example a case where the first-first count unit 721, the first-second count unit 722, the first-third count unit 723, and the second count unit 705 are each 9 bits, and the second-first count unit 802, the second-second count unit 803, and the second-third count unit 804 are each 3 bits.

[0142] The selector circuit 203-1 inputs the carry signal of the maximum bit of the second-first counting unit 802 to the second-second counting unit 803. The selector circuit 203-2 inputs the carry signal of the maximum bit of the second-second counting unit 803 to the second-third counting unit 804.

[0143] First, when the latch circuit 202 is in the 0 state, that is, when the switching unit selects the second pulse signal P702, each of the R, G1, G2, and B pixels can count up to 511 (binary: 111111111).

[0144] When the latch circuit 202 is in the 1 state, that is, when at least one of the R, G1, and B pixels is at its maximum or above a predetermined value, the selector circuit 203-1 selects the carry signal of the maximum bit of the first 1 count unit 721. Furthermore, the selector circuit 203-2 selects the carry signal of the maximum bit of the first 2 count unit 722, and the selector circuit 203-3 selects the carry signal of the maximum bit of the first 3 count unit 723. At the same time, the value held in the second count unit 705 is reset to 0. The signal selected by the selector circuit 203-1 is input to the second 1 count unit 802, the signal selected by the selector circuit 203-2 is input to the second 2 count unit 803, and the signal selected by the selector circuit 203-3 is input to the second 3 count unit 804. This allows R, G1, and B pixels to continue counting after 512, making it possible to count pixel values ​​up to 4095 (binary: 111111111111), which is an expansion of 9 bits by an additional 3 bits.

[0145] In this case, counting of the G2 pixel is not performed, so photon reception and recharging of the applied voltage to the photoelectric conversion unit that constitutes the G2 pixel may also be stopped. Furthermore, if counting of the G2 pixel is stopped, the data of the G2 pixel located at PIX4 in FIG. 12 will be lost, but this data may be interpolated using data output from PIX1, PIX2, and PIX3. In the case of a photoelectric conversion device in which a Bayer pixel consisting of four pixels PIX1, PIX2, PIX3, and PIX4 is arranged in an array, the data may also be interpolated using the values ​​of the surrounding Bayer pixels PIX1, PIX2, PIX3, and PIX4. This interpolation process may be performed during readout processing within the photoelectric conversion device or may be performed outside the photoelectric conversion device.

[0146] According to this embodiment, it is possible to suppress a decrease in resolution and image distortion compared to the first embodiment. Also, by varying the initial count value depending on the selection of the switching unit, it is possible to distinguish between the count value counted before the switching operation and the count number counted after the switching operation.

[0147] (Sixth embodiment) The sixth embodiment can be applied to either the first or second embodiment. FIG. 14(a) is a schematic diagram illustrating a device 9191 including a semiconductor device 930 of this embodiment. The photoelectric conversion device of each of the above-described embodiments can be used for the semiconductor device 930. The device 9191 including the semiconductor device 930 will be described in detail. In addition to the semiconductor device 910, the semiconductor device 930 can include a package 920 that houses the semiconductor device 910. The package 920 can include a base to which the semiconductor device 910 is fixed and a lid such as glass that faces the semiconductor device 910. The package 920 can further include bonding members such as bonding wires or bumps that connect terminals provided on the base to terminals provided on the semiconductor device 910.

[0148] The equipment 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, a shutter, or a mirror, and includes an optical system that guides light to the semiconductor device 930. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0149] The processing device 960 processes the signal output from the semiconductor device 930. The processing device 960 is a semiconductor device such as a CPU or ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0150] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the semiconductor device 930 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) provided in the device 9191. For this purpose, the device 9191 preferably further includes a memory device 980 and a processing device 960 in addition to the memory circuit and arithmetic circuit provided in the semiconductor device 930. The mechanical device 990 may be controlled based on the signal output from the semiconductor device 930.

[0151] The device 9191 is also suitable for electronic devices such as information terminals with a photographing function (for example, smartphones and wearable devices) and cameras (for example, interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for vibration isolation operations.

[0152] Furthermore, the device 9191 may be transportation equipment such as a vehicle, a ship, or an aircraft. The mechanical device 990 in transportation equipment can be used as a moving device. The device 9191 as transportation equipment is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (piloting) using a photographing function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a moving device based on information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot.

[0153] According to the above-described embodiment, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. In this case, increasing the value corresponds to at least one of adding functions, improving performance, improving characteristics, improving reliability, improving manufacturing yield, reducing environmental impact, reducing costs, reducing size, and reducing weight.

[0154] Therefore, if the semiconductor device 930 according to this embodiment is used in the equipment 9191, the value of the equipment can also be improved. For example, by installing the semiconductor device 930 in a transport equipment, excellent performance can be obtained when photographing the exterior of the transport equipment or measuring the external environment. Therefore, when manufacturing and selling transport equipment, deciding to install the semiconductor device according to this embodiment in the transport equipment is advantageous in terms of improving the performance of the transport equipment itself. In particular, the semiconductor device 930 is suitable for transport equipment that performs driving assistance and / or automatic driving of the transport equipment using information obtained by the semiconductor device.

[0155] The photoelectric conversion system and the moving object of this embodiment will be described with reference to FIGS. 14(b) and 14(c).

[0156] FIG. 14(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 8 includes a photoelectric conversion device 80. The photoelectric conversion device 80 is the photoelectric conversion device (image capture device) described in any of the above embodiments. The photoelectric conversion system 8 includes an image processing unit 801 that performs image processing on multiple pieces of image data acquired by the photoelectric conversion device 80, and a parallax acquisition unit 802 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the photoelectric conversion system 8. The photoelectric conversion system 8 also includes a distance acquisition unit 803 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquire information about the distance to the object. That is, the distance information is information about the parallax, the defocus amount, the distance to the object, etc. The collision determination unit 804 may determine the possibility of a collision using any of this distance information. The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination thereof.

[0157] The photoelectric conversion system 8 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 8 is also connected to a control ECU 820, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 804. The photoelectric conversion system 8 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804. For example, if the determination result of the collision determination unit 804 indicates a high possibility of a collision, the control ECU 820 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 830 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0158] In this embodiment, the photoelectric conversion system 8 captures an image of the surroundings of the vehicle, for example, the front or rear.

[0159] 14(c) shows the photoelectric conversion system when capturing an image of the area ahead of the vehicle (image capturing range 850). A vehicle information acquisition device 810 sends instructions to the photoelectric conversion system 8 or the photoelectric conversion device 80. This configuration can further improve the accuracy of distance measurement.

[0160] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, and control of automatic driving to prevent deviation from a lane. Furthermore, the photoelectric conversion system is not limited to vehicles such as automobiles, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0161] The above-described embodiments can be modified as appropriate without departing from the spirit of the present invention. The disclosure of this specification includes not only what is described herein but also all matters that can be understood from the specification and the accompanying drawings. The disclosure of this specification also includes the complement of the concepts described herein. In other words, if the specification contains a statement that "A is greater than B," even if the statement that "A is not greater than B" is omitted, the specification can still be said to disclose that "A is not greater than B." This is because the statement that "A is greater than B" presupposes that the case in which "A is not greater than B" is taken into consideration.

[0162] The disclosure of this embodiment includes the following configurations and methods.

[0163] (Configuration 1) The photoelectric conversion device includes a first photoelectric conversion unit, a first pulse generation unit that generates a first pulse signal based on charges generated by photoelectric conversion in the first photoelectric conversion unit, and a first count unit that counts the first pulse signals.The photoelectric conversion device includes a second photoelectric conversion unit and a second pulse generation unit that generates a second pulse signal based on charges generated by photoelectric conversion in the second photoelectric conversion unit.The photoelectric conversion device includes a switch that selects a pulse signal from a plurality of pulse signals including the first pulse signal and the second pulse signal, and a second count unit that counts the pulse signals selected by the switch.The photoelectric conversion device includes a first photoelectric conversion unit, a first pulse generation unit that generates a first pulse signal based on charges generated by photoelectric conversion in the first photoelectric conversion unit, and a first count unit that counts the first pulse signals.The photoelectric conversion device includes a first photoelectric conversion unit and a second photoelectric conversion unit that generates a second pulse signal based on charges generated by photoelectric conversion in the second photoelectric conversion unit.The photoelectric conversion device includes a switch that selects a pulse signal from a plurality of pulse signals including the first pulse signal and the second pulse signal, and a second count unit that counts the pulse signals selected by the switch.The photoelectric conversion device includes a first photoelectric conversion unit and a second photoelectric conversion unit that selects a pulse signal from a plurality of pulse signals including the first pulse signal and the second pulse signal ... counts the pulse signals selected by the switch.

[0164] (Configuration 2) The photoelectric conversion device according to configuration 1, further comprising an output unit that outputs at least one of the count value of the first count unit, the selection of the switching unit, and the count value of the second count unit.

[0165] (Configuration 3) The photoelectric conversion device according to the first or second configuration is characterized in that the switching unit includes a selector circuit that selects between the first pulse signal and the second pulse signal, and a latch circuit that holds a signal that controls the selection, and further includes a reset control unit that resets the second count unit or the latch circuit.

[0166] (Configuration 4) 4. The photoelectric conversion device according to configuration 3, wherein the output section outputs the signal held in the latch circuit.

[0167] (Configuration 5) The photoelectric conversion device according to any one of configurations 1 to 4, wherein the switching unit switches the pulse signal selected in response to a signal indicating saturation of the first counting unit from the second pulse signal to the first pulse signal.

[0168] (Configuration 6) The photoelectric conversion device according to any one of configurations 1 to 5, wherein the switching unit switches the pulse signal selected in response to the carry signal of the first counting unit from the second pulse signal to the first pulse signal.

[0169] (Configuration 7) 7. The photoelectric conversion device according to any one of configurations 1 to 6, wherein the first photoelectric conversion unit is a first avalanche photodiode, and the second photoelectric conversion unit is a second avalanche photodiode.

[0170] (Configuration 8) The photoelectric conversion device according to any one of configurations 1 to 7 includes a third photoelectric conversion unit, a third pulse generation unit that generates a third pulse signal based on charges generated by photoelectric conversion in the third photoelectric conversion unit, and a third count unit that counts the third pulse signals.The photoelectric conversion device also includes a fourth photoelectric conversion unit, a fourth pulse generation unit that generates a fourth pulse signal based on charges generated by photoelectric conversion in the fourth photoelectric conversion unit, and a fourth count unit that counts the fourth pulse signals.The photoelectric conversion device according to any one of configurations 1 to 7, wherein the switching unit selects one of a plurality of pulse signals including the first pulse signal, the second pulse signal, the third pulse signal, and the fourth pulse signal.

[0171] (Configuration 9) The photoelectric conversion device described in configuration 8, wherein the first photoelectric conversion unit, the third photoelectric conversion unit, and the fourth photoelectric conversion unit are photoelectric conversion elements each having a color filter corresponding to a different wavelength range.

[0172] (Configuration 10) The photoelectric conversion device described in configuration 8 or 9, characterized in that the first photoelectric conversion unit, the second photoelectric conversion unit, the third photoelectric conversion unit, and the fourth photoelectric conversion unit are arranged in two rows and two columns.

[0173] (Configuration 11) 11. The photoelectric conversion device according to any one of configurations 1 to 10, further comprising an avalanche photodiode whose applied voltage is controlled by a clock signal, the avalanche photodiode receiving light during a period between a first signal and a second signal of the clock signal to generate the first pulse signal, the second pulse generation unit generating a detection pulse that is active during a portion of the period and inactive during another portion of the period, and the second pulse signal generated using the first pulse signal and the detection pulse.

[0174] (Configuration 12) The photoelectric conversion device according to any one of configurations 1 to 11, further comprising: a first comparison unit that stops the counting operation of the first counting unit when the count value of the first counting unit matches the value of a ramp signal; and a second comparison unit that stops the counting operation of the second counting unit when the count value of the second counting unit matches the value of a ramp signal.

[0175] (Configuration 13) 13. A photoelectric conversion system comprising: the photoelectric conversion device according to any one of configurations 1 to 12; and a processing unit that generates an image using a signal output by the photoelectric conversion device.

[0176] (Configuration 14) 13. A moving body comprising the photoelectric conversion device according to claim 1, further comprising a control unit that controls movement of the moving body using a signal output from the photoelectric conversion device. [Explanation of symbols]

[0177] 101 First pulse generating unit 102 First Counting Department 103 Second pulse generating unit 104 Switching section 105 Second Counting Department

Claims

1. a first photoelectric conversion unit; a first pulse generating unit that generates a first pulse signal based on charges generated by photoelectric conversion in the first photoelectric conversion unit; a first counting unit that counts the first pulse signals; A second photoelectric conversion unit; a second pulse generating unit that generates a second pulse signal based on charges generated by photoelectric conversion in the second photoelectric conversion unit; a switching unit that selects a pulse signal from a plurality of pulse signals including the first pulse signal and the second pulse signal; a second counting unit that counts the pulse signal selected by the switching unit, A photoelectric conversion device characterized in that the initial count value of the second counting unit after the selection differs between when the switching unit selects the first pulse signal as the pulse signal and when the switching unit selects the second pulse signal as the pulse signal.

2. 2. The photoelectric conversion device according to claim 1, further comprising an output section that outputs at least one of the count value of the first count section, the selection of the switching section, and the count value of the second count section.

3. the switching unit includes a selector circuit that selects between the first pulse signal and the second pulse signal; a latch circuit for holding a signal that controls the selection; 3. The photoelectric conversion device according to claim 2, further comprising a reset control section that resets the second count section or the latch circuit.

4. 4. The photoelectric conversion device according to claim 3, wherein the output section outputs the signal held in the latch circuit.

5. 2. The photoelectric conversion device according to claim 1, wherein the switching unit switches the pulse signal selected in response to a signal indicating saturation of the first counting unit from the second pulse signal to the first pulse signal.

6. 2. The photoelectric conversion device according to claim 1, wherein the switching unit switches the pulse signal selected in response to the carry signal of the first counting unit from the second pulse signal to the first pulse signal.

7. the first photoelectric conversion unit is a first avalanche photodiode, 2. The photoelectric conversion device according to claim 1, wherein the second photoelectric conversion unit is a second avalanche photodiode.

8. a third photoelectric conversion unit; a third pulse generating unit that generates a third pulse signal based on charges generated by photoelectric conversion in the third photoelectric conversion unit; a third counting unit that counts the third pulse signals; a fourth photoelectric conversion unit; a fourth pulse generating unit that generates a fourth pulse signal based on charges generated by photoelectric conversion in the fourth photoelectric conversion unit; a fourth counting unit that counts the fourth pulse signals, 2. The photoelectric conversion device according to claim 1, wherein the switching unit selects one of a plurality of pulse signals including the first pulse signal, the second pulse signal, the third pulse signal, and the fourth pulse signal.

9. The photoelectric conversion device according to claim 8, characterized in that the first photoelectric conversion unit, the third photoelectric conversion unit, and the fourth photoelectric conversion unit are photoelectric conversion elements each having a color filter corresponding to a different wavelength range.

10. The first photoelectric conversion unit, the second photoelectric conversion unit, the third photoelectric conversion unit, and the fourth photoelectric conversion unit are arranged in two rows and two columns.

10. The photoelectric conversion device according to claim 9.

11. an avalanche photodiode whose applied voltage is controlled by a clock signal; the avalanche photodiode receives light during a period between a first signal and a second signal of the clock signal to generate the first pulse signal; the second pulse generating unit generates a detection pulse that is active during a portion of the period and inactive during another portion of the period; generating the second pulse signal using the first pulse signal and the detection pulse; 2. The photoelectric conversion device according to claim 1.

12. a first comparing unit that stops the counting operation of the first counting unit when the count value of the first counting unit matches the value of a ramp signal; a second comparison unit that stops the counting operation of the second counting unit when the count value of the second counting unit matches the value of the ramp signal; 2. The photoelectric conversion device according to claim 1, wherein:

13. The photoelectric conversion device according to any one of claims 1 to 12, a processing unit that generates an image using a signal output from the photoelectric conversion device; A photoelectric conversion system comprising:

14. A moving object comprising the photoelectric conversion device according to any one of claims 1 to 12, A moving body comprising a control unit that controls the movement of the moving body using a signal output from the photoelectric conversion device.

Images